Multilayer ceramic capacitor
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- MURATA MFG CO LTD
- Filing Date
- 2025-01-24
- Publication Date
- 2026-07-30
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Figure JP2025002242_30072026_PF_FP_ABST
Abstract
Description
Multilayer ceramic capacitor
[0001] This disclosure relates to multilayer ceramic capacitors.
[0002] With advancements in electronic components and electronic devices, there is a growing demand for further miniaturization and increased capacitance of multilayer ceramic capacitors. Patent Document 1 describes a multilayer ceramic capacitor in which the crystalline particles contained in the dielectric layer contain Mg, Mn, and rare earth elements, and these Mg, Mn, and rare earth elements have a concentration gradient in which the concentration increases from the center of the crystalline particle to the particle surface, and the concentration gradient of the rare earth elements among Mg, Mn, and rare earth elements is 0.02 atomic% / nm or higher.
[0003] Japanese Patent Publication No. 2005-217000
[0004] The multilayer ceramic capacitor described in Patent Document 1 had areas of low concentration of rare earth elements within its crystal grains, which meant there was room for improvement in its DC bias characteristics.
[0005] The purpose of this disclosure is to provide a multilayer ceramic capacitor that exhibits excellent capacitance temperature characteristics and high-temperature load reliability, as well as improved DC bias characteristics.
[0006] A multilayer ceramic capacitor according to one embodiment of the present disclosure comprises a substrate including a plurality of dielectric ceramic layers and a plurality of internal electrode layers, and an external electrode provided on the surface of the substrate and electrically connected to the internal electrode layers. The dielectric ceramic layers mainly contain a perovskite-type compound. The perovskite-type compound includes at least one of barium (Ba), calcium (Ca), and strontium (Sr), titanium (Ti), and at least one rare earth element (Re). In the elemental mapping image obtained by STEM-EDS analysis (scanning transmission electron microscopy-energy dispersive X-ray spectroscopy) of the dielectric ceramic layer, the Re / Ti ratio of each pixel, converted to atom%, is divided into intervals of 0.002 within the range of 0 ≤ Re / Ti < 2. In the frequency distribution obtained by counting the number of pixels belonging to each interval, there are first and second peak tops in order from the smallest Re / Ti ratio, and the ratio of the frequency f2 of the second peak top to the frequency f1 of the first peak top (f2 / f1) is 0.3 or greater.
[0007] A multilayer ceramic capacitor according to another embodiment of the present disclosure comprises a substrate including a plurality of dielectric ceramic layers and a plurality of internal electrode layers, and an external electrode provided on the surface of the substrate and electrically connected to the internal electrode layers. The dielectric ceramic layers mainly consist of a perovskite compound. The perovskite compound includes at least one of barium (Ba), calcium (Ca), and strontium (Sr), at least one of titanium (Ti) and zirconium (Zr), and at least one of a rare earth element (Re). In the elemental mapping image obtained by STEM-EDS analysis (scanning transmission electron microscopy-energy dispersive X-ray spectroscopy) of the dielectric ceramic layer, the Re / (Ti+Zr) ratio of each pixel, converted to atom%, is divided into intervals of 0.002 within the range of 0 ≤ Re / (Ti+Zr) < 2. In the frequency distribution obtained by counting the number of pixels belonging to each interval, there are first and second peak tops in order from the smallest Re / (Ti+Zr) ratio, the ratio of the frequency f2 of the second peak top to the frequency f1 of the first peak top (f2 / f1) is 0.3 or greater, and when the Re / (Ti+Zr) ratio of the first peak top is P1 and the Re / (Ti+Zr) ratio of the second peak top is P2, P2-P1 is 0.01 or greater.
[0008] According to this disclosure, it is possible to provide a multilayer ceramic capacitor that has excellent capacitance temperature characteristics and high-temperature load reliability, as well as improved DC bias characteristics.
[0009] Figure 1 is a perspective view showing the appearance of a multilayer ceramic capacitor according to the first embodiment. Figure 2 is a cross-sectional view of the multilayer ceramic capacitor shown in Figure 1 along the line II-II. Figure 3 is a cross-sectional view of the multilayer ceramic capacitor shown in Figure 1 along the line III-III. Figure 4 is an example of an elemental mapping image showing the distribution of Ti elements in the dielectric ceramic layer. Figure 5 is an example of an elemental mapping image showing the distribution of Dy elements in the dielectric ceramic layer. Figure 6 is an example of the frequency distribution of the Re / Ti ratio in the dielectric ceramic layer constituting a multilayer ceramic capacitor within the scope of the present invention. Figure 7 is a diagram showing the results of peak separation processing on the frequency distribution of the Re / Ti ratio in the dielectric ceramic layer constituting the multilayer ceramic capacitor according to Example 1. Figure 8 is an elemental mapping image corresponding to the region occupied by the curve shown by the dashed line in Figure 7. Figure 9 is an elemental mapping image corresponding to the region occupied by the curve shown by the dashed line in Figure 7. Figure 10 is the frequency distribution of the Re / Ti ratio in the dielectric ceramic layer constituting a multilayer ceramic capacitor according to Example 2. Figure 11 shows the frequency distribution of the Re / Ti ratio in the dielectric ceramic layer constituting the multilayer ceramic capacitor according to Comparative Example 1. Figure 12 is a perspective view showing the appearance of the multilayer ceramic capacitor according to the second embodiment. Figure 13 is a cross-sectional view of the multilayer ceramic capacitor shown in Figure 12 along the line IV-IV.
[0010] The multilayer ceramic capacitor according to the first embodiment (hereinafter also referred to as the first multilayer ceramic capacitor) will be described below with reference to the figures.
[0011] Figure 1 is a perspective view showing the external appearance of a multilayer ceramic capacitor according to the first embodiment.
[0012] The first multilayer ceramic capacitor 100 shown in Figure 1 comprises a base body 110 and external electrodes provided on the surface of the base body 110. The multilayer ceramic capacitor 100 includes a first external electrode 120 and a second external electrode 130 as external electrodes.
[0013] The base body 110 has a first main surface 111 and a second main surface 112 facing the stacking direction T, a first side surface 113 and a second side surface 114 facing the width direction W perpendicular to the stacking direction T, and a first end surface 115 and a second end surface 116 facing the length direction L perpendicular to the stacking direction T and the width direction W.
[0014] At least one of the corners and edges of the base body 110 may be rounded. Here, the corners are the parts where the three faces of the base body 110 intersect, and the edges are the parts where the two faces of the base body 110 intersect.
[0015] The first external electrode 120 is formed on the first end face 115 of the base body 110 so as to be electrically connected to the first internal electrode layer 151, which will be described later. The first external electrode 120 extends from the first end face 115 to the first main surface 111 and the second main surface 112, as well as the first side surface 113 and the second side surface 114.
[0016] The second external electrode 130 is formed on the second end face 116 of the base body 110 so as to be electrically connected to the second internal electrode layer 152, which will be described later. The second external electrode 130 extends from the second end face 116 to the first main surface 111 and the second main surface 112, as well as the first side surface 113 and the second side surface 114.
[0017] The dimensions of the multilayer ceramic capacitor 100 are not particularly limited, but for example, the dimension in the stacking direction T may be 0.08 mm or more and 0.8 mm or less, the dimension in the width direction W may be 0.08 mm or more and 0.8 mm or less, and the dimension in the length direction L may be 0.1 mm or more and 5.0 mm or less.
[0018] Figure 2 is a cross-sectional view of the multilayer ceramic capacitor shown in Figure 1 along the line II-II. Figure 3 is a cross-sectional view of the multilayer ceramic capacitor shown in Figure 1 along the line III-III.
[0019] The base body 110 includes a plurality of dielectric ceramic layers 140 and a plurality of internal electrode layers 150. The plurality of dielectric ceramic layers 140 and the plurality of internal electrode layers 150 are stacked alternately along the stacking direction T.
[0020] The multiple internal electrode layers 150 include a first internal electrode layer 151 and a second internal electrode layer 152. The first internal electrode layer 151 includes a counter electrode portion that faces the second internal electrode layer 152 via a dielectric ceramic layer 140, and a lead-out electrode portion extending from the counter electrode portion to the first end face 115 of the base body 110. The second internal electrode layer 152 includes a counter electrode portion that faces the first internal electrode layer 151 via a dielectric ceramic layer 140, and a lead-out electrode portion extending from the counter electrode portion to the second end face 116 of the base body 110.
[0021] A capacitor is formed when the first internal electrode layer 151 and the second internal electrode layer 152 face each other via the dielectric ceramic layer 140. The multilayer ceramic capacitor 100 can be described as having multiple capacitors connected in parallel via the first external electrode 120 and the second external electrode 130.
[0022] The base body 110 may have an inner layer portion 160 in which a plurality of dielectric ceramic layers 140 and a plurality of internal electrode layers 150 are alternately stacked, an outer ceramic layer 170 arranged on both sides of the stacking direction T of the inner layer portion 160, and a side ceramic portion 180 arranged on both sides in the width direction W perpendicular to the stacking direction T of the inner layer portion 160 and the outer ceramic layer 170. The outer ceramic layer 170 and the side ceramic portion 180 may be composed of one or more dielectric ceramic layers 140. In this specification, the dielectric ceramic layer 140, the outer ceramic layer 170, and the side ceramic portion 180 are collectively referred to as the ceramic portion. The base body 110 may further have end face ceramic portions 190 arranged on both sides of the length direction L of the inner layer portion 160. In this case, the base body 110 can be divided into an inner layer portion 160, two outer ceramic layers 170, two side ceramic portions 180, and two end face ceramic portions 190.
[0023] The dielectric ceramic layer 140 mainly contains a perovskite-type compound. In this specification, the main component is the component that has the largest mass among the constituent components, and may be, for example, 90% by mass or more, 95% by mass or more, or 99% by mass or more, based on the total mass of all constituent components.
[0024] The perovskite compound comprises at least one of barium (Ba), calcium (Ca), and strontium (Sr), titanium (Ti), and at least one rare earth element (Re).
[0025] Examples of perovskite-type compounds include barium titanate (BaTiO2). 3 ) compounds, calcium titanate (CaTiO 3 ) compounds, strontium titanate (SrTiO 3 ) compounds or calcium zirconate (CaZrO 3 Examples include ) type compounds. Perovskite type compounds are ABO 3 In the case of a perovskite-type compound represented by , the perovskite-type compound may have some of the A-site element and B-site element substituted with other elements. Specifically, the perovskite-type compound is BaTiO 3 If it is a compound system, then BaTiO 3 The compound system is BaTiO 3 It may be that Ba is partially substituted with alkaline earth metal elements such as Ca and Sr, and Ti may be partially substituted with transition metal elements such as Zr and hafnium (Hf). Furthermore, the ratio of A-site elements to B-site elements in a perovskite compound is not strictly limited to 1:1. As long as the perovskite crystal structure is maintained, deviations in the ratio of A-site elements to B-site elements are acceptable.
[0026] The perovskite-type compound contains at least one selected from the group consisting of scandium (Sc), yttrium (Y), lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), promethium (Pm), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), and lutetium (Lu). The perovskite-type compound preferably contains at least one selected from the group consisting of Dy, Y, Gd, Tb, Ho, and Er, and more preferably contains Dy. A part of the elements in the crystal lattice of the perovskite-type compound is Re, which is an ion of a rare earth element (Re). 3+ It may be substituted by. By including a rare earth element (Re) in the dielectric ceramic layer 140, the capacitance temperature characteristics and / or high-temperature load reliability of the multilayer ceramic capacitor 100 can be improved. The dielectric ceramic layer 140 may contain only Dy as the rare earth element (Re), or may contain other rare earth elements (Re) together with Dy.
[0027] FIG. 4 is an example of an element mapping image showing the distribution of Ti elements in the dielectric ceramic layer. FIG. 5 is an example of an element mapping image showing the distribution of Dy elements in the dielectric ceramic layer. FIGS. 4 and 5 are also element mapping images in the dielectric ceramic layer of the multilayer ceramic capacitor according to Example 1 described later.
[0028] The elemental mapping image can be obtained by performing STEM-EDS analysis (scanning transmission electron microscopy-energy dispersive X-ray spectroscopy) on the dielectric ceramic layer 140. Specifically, first, a STEM observation image of a cross-section of the dielectric ceramic layer 140 in the stacking direction T is acquired. The STEM observation image of the cross-section of the dielectric ceramic layer 140 may be, for example, an observation image at 60,000 times magnification by STEM. Next, by performing component analysis on the obtained STEM observation image using an EDS device, an elemental mapping image is obtained. The elemental mapping image may be composed of, for example, 256×256 pixels. The size of each pixel constituting the elemental mapping image may be, for example, 9.2 nm / 1 pixel. Thus, by performing STEM-EDS analysis on the dielectric ceramic layer 140, in addition to those shown in FIGS. 4 and 5, the distribution of multiple elements (elemental mapping image) can be simultaneously obtained as a separate image. The Re / Ti ratio such as the Dy / Ti ratio can be calculated from the pixel information at the same coordinates in each elemental mapping image.
[0029] FIG. 6 is an example of the frequency distribution of the Re / Ti ratio in the dielectric ceramic layer constituting the multilayer ceramic capacitor within the scope of the present invention. FIG. 6 is also the frequency distribution of the Re / Ti ratio in the dielectric ceramic layer constituting the multilayer ceramic capacitor according to Example 1 described later.
[0030] Regarding the Re / Ti ratio of each pixel of the elemental mapping image in atom% conversion obtained by STEM-EDS analysis of the dielectric ceramic layer 140, the range of 0≦Re / Ti<2 is divided at an interval width of 0.002, and the number of pixels belonging to each interval is counted to obtain the frequency distribution of the Re / Ti ratio. As shown in FIG. 6, the frequency distribution of the Re / Ti ratio is obtained by plotting the number of pixels (frequency) belonging to each interval every 0.002 of the interval width. In FIG. 6, the range of 0≦Re / Ti≦0.1 is enlarged.
[0031] The multilayer ceramic capacitor 100 has a first peak top and a second peak top in the frequency distribution of the Re / Ti ratio, in order from the side where the Re / Ti ratio is small, and the ratio (f2 / f1) of the frequency f2 of the second peak top to the frequency f1 of the first peak top is 0.3 or more. Thereby, a multilayer ceramic capacitor 100 excellent in capacitance temperature characteristics and high-temperature load reliability and having improved DC bias characteristics can be obtained.
[0032] In the frequency distribution of the Re / Ti ratio, when there is no second peak top, or even if there is a second peak top, but the ratio (f2 / f1) of the frequency f2 of the second peak top to the frequency f1 of the first peak top is less than 0.3, it becomes difficult to improve the DC bias characteristics of the multilayer ceramic capacitor 100. In such a case, in the core-shell structure of the grains described later, it is expected that Re is solid-dissolved at a high concentration in the shell part, while the solid solution of Re in the core part is insufficient. If Re is not solid-dissolved in the core part or the solid solution of Re in the core part is insufficient, it may cause a decrease in capacitance, so it is推测 that it is difficult to improve the DC bias characteristics. On the other hand, in the first multilayer ceramic capacitor 100, in the frequency distribution of the Re / Ti ratio, there is a second peak top in a range where the Re / Ti ratio is relatively large. In such a case, it is expected that Re is solid-dissolved at a high concentration in the shell part of the grain and the solid solution of Re is also progressing in the core part of the grain. As a result, in addition to the capacitance temperature characteristics and high-temperature load reliability, the DC bias characteristics can be improved.
[0033] In the multilayer ceramic capacitor 100, f2 / f1 is 0.3 or more, and may be 0.4 or more, or may be 0.5 or more. f2 / f1 is preferably 0.8 or less, and may be 0.7 or less. f2 / f1 may be 0.3 or more and 0.8 or less, or may be 0.3 or more and 0.7 or less.
[0034] In the multilayer ceramic capacitor 100, when the Re / Ti ratio of the first peak top is P1 and the Re / Ti ratio of the second peak top is P2, P2-P1 may be 0.01 or greater, or 0.02 or greater. P2-P1 may be 0.1 or less, 0.08 or less, or 0.05 or less.
[0035] The multilayer ceramic capacitor 100 may have only a first peak top and a second peak top in the frequency distribution of the Re / Ti ratio, in order from the side with a small Re / Ti ratio, or it may have one or more peak tops on the side with a Re / Ti ratio greater than the second peak top.
[0036] In the first multilayer ceramic capacitor 100, the first and second peak tops are determined by the following procedure. First, a point where the frequency shows a maximum value (hereinafter also referred to as the maximum point) is detected in the frequency distribution of the Re / Ti ratio. A "point where the frequency shows a maximum value" refers to a point where the frequency is higher than the frequency of any adjacent interval. If the frequencies of two or more consecutive intervals are the same, these intervals are considered together as a single maximum point. In this case, the frequency of the single maximum point is the same as the frequency of each interval that constitutes the single maximum point. Next, the frequency of the maximum point is compared with the frequency of the interval two steps away from the maximum point. If the frequency of the maximum point is higher than the frequency of any of the intervals two steps away from the maximum point, the maximum point is designated as the peak top. If there are multiple peak tops in four consecutive intervals, these peak tops are considered together as a single peak top. In this case, the frequency of the single peak top is the same as the highest frequency among the frequencies of each peak top that constitutes the single peak top. In this case, the Re / Ti ratio of the single peak top shall be the median of the four intervals. The peak tops determined by the above procedure shall be designated as the first peak top and the second peak top, in order from the side with the smallest Re / Ti ratio.
[0037] The dielectric ceramic layer 140 may further contain at least one element selected from the group consisting of magnesium (Mg), manganese (Mn), aluminum (Al), silicon (Si), and nickel (Ni), and preferably further contains Mg, Mn, Al, Si, and Ni.
[0038] The dielectric ceramic layer 140 preferably further contains Mg. The Mg content in the dielectric ceramic layer 140 is preferably 0.05 mol% to 1 mol% relative to the total amount of Ti and Zr in the perovskite-type compound (100 mol%). By having an Mg content within the above range, grain growth during firing is suppressed, and DC bias characteristics can be improved.
[0039] If the base body 110 has an inner layer 160, an outer ceramic layer 170, and a side ceramic portion 180, the dielectric ceramic layer 140, the outer ceramic layer 170, and the side ceramic portion 180 may further contain a rare earth element (Re). Preferably, the dielectric ceramic layer 140, the outer ceramic layer 170, and the side ceramic portion 180 further contain Dy.
[0040] The content of Dy in the outer ceramic layer 170 is the content of BaTiO in the outer ceramic layer 170. 3 The content of Dy in the side ceramic portion 180 is preferably 1.5 mol% or more and 1.7 mol% or less per 100 mol%. 3 The amount is preferably 1.5 mol% or more and 1.7 mol% or less, relative to 100 mol%.
[0041] The dielectric ceramic layer 140, the outer ceramic layer 170, and the side ceramic portion 180 may further contain at least one other element selected from the group consisting of silicon (Si), aluminum (Al), magnesium (Mg), manganese (Mn), nickel (Ni), iron (Fe), copper (Cu), and vanadium (V). By including these elements, the density of the grain can be controlled during the firing process.
[0042] The dielectric ceramic layer 140, the outer ceramic layer 170, and the side ceramic portion 180 preferably further contain at least one of Si, Al, and Mn.
[0043] If the dielectric ceramic layer 140, the outer ceramic layer 170, and the side ceramic portion 180 contain Si, it is preferable that the Si content in the outer ceramic layer 170 and the side ceramic portion 180 is higher than the Si content in the dielectric ceramic layer 140. If the dielectric ceramic layer 140, the outer ceramic layer 170, and the side ceramic portion 180 contain Al, it is preferable that the Al content in the outer ceramic layer 170 and the side ceramic portion 180 is higher than the Al content in the dielectric ceramic layer 140. If the dielectric ceramic layer 140, the outer ceramic layer 170, and the side ceramic portion 180 contain Mn, it is preferable that the Mn content in the outer ceramic layer 170 and the side ceramic portion 180 is higher than the Mn content in the dielectric ceramic layer 140.
[0044] The Si content in the outer ceramic layer 170 is the BaTiO content in the outer ceramic layer 170. 3 The Al content in the outer ceramic layer 170 is preferably 1.0 mol% to 2.6 mol% relative to 100 mol%. 3 The content of Mn in the outer ceramic layer 170 is preferably 0.08 mol% or more and 0.27 mol% or less per 100 mol%. 3 The content is preferably 0.2 mol% to 1.0 mol% relative to 100 mol%. The relationship between the Si, Al, and Mn content in the outer ceramic layer 170 is preferably Si > Mn > Al.
[0045] The Si content in the side ceramic portion 180 is the BaTiO content in the side ceramic portion 180. 3 The Al content in the side ceramic portion 180 is preferably 1.0 mol% to 2.6 mol% relative to 100 mol%. 3The content of Mn in the side ceramic portion 180 is preferably 0.08 mol% or more and 0.27 mol% or less, relative to 100 mol%. 3 The content is preferably 0.2 mol% to 1.0 mol% relative to 100 mol%. The relationship between the Si, Al, and Mn content in the side ceramic portion 180 is preferably Si > Mn > Al.
[0046] When the outer ceramic layer 170 further contains Si, Al, and Mn, it is preferable that the Si content in the outer ceramic layer 170 is higher than the Si content in the dielectric ceramic layer 140, the Al content in the outer ceramic layer 170 is higher than the Al content in the dielectric ceramic layer 140, and the Mn content in the outer ceramic layer 170 is higher than the Mn content in the dielectric ceramic layer 140. This makes it possible to suppress the difference in density of grains contained in the dielectric ceramic layer 140 and the outer ceramic layer 170.
[0047] When the side ceramic portion 180 further contains Si, Al, and Mn, it is preferable that the Si content in the side ceramic portion 180 is higher than the Si content in the dielectric ceramic layer 140, the Al content in the side ceramic portion 180 is higher than the Al content in the dielectric ceramic layer 140, and the Mn content in the side ceramic portion 180 is higher than the Mn content in the dielectric ceramic layer 140. This makes it possible to suppress the difference in density of grains contained in the dielectric ceramic layer 140 and the side ceramic portion 180.
[0048] The content of rare earth elements and other elements in the ceramic portion can be determined from the mixing ratio of the ceramic raw materials. Furthermore, the content of rare earth elements and other elements in the ceramic portion can be quantified using methods such as X-ray fluorescence analysis (XRF), inductively coupled plasma emission spectroscopy (ICP-AES), and energy-dispersive X-ray spectroscopy (EDX). When quantifying by EDX, for example, observation images at a magnification of 150,000x using a scanning transmission electron microscope (STEM / EDX) can be performed.
[0049] The dielectric ceramic layer 140 may contain multiple grains. A grain is a particle surrounded by grain boundaries and is also called a crystal grain. The grain may form a core-shell structure including a core portion and a shell portion.
[0050] The particle sizes of multiple grains can be measured using a scanning electron microscope (SEM). In this specification, the particle size of a single grain refers to the diameter of a circle having an area equal to the area of the grain's cross-section in an SEM image of the cross-section of the dielectric ceramic layer 140 in the stacking direction T (hereinafter also referred to as the area circle equivalent diameter). The SEM image of the above cross-section of the dielectric ceramic layer 140 may be, for example, a 40,000x magnification image obtained by SEM. The cumulative particle size distribution of multiple grains can be determined, for example, from the particle sizes of 200 or more grains. Note that it is not necessary for a single SEM image to contain 200 or more grains; it is sufficient if the total number of grains contained in multiple SEM images is 200 or more.
[0051] In the particle size distribution of multiple grains with an area circle equivalent diameter, when the particle size that accounts for 50% of the cumulative area is defined as D50, it is preferable that D50 be between 60 nm and 150 nm from the viewpoint of improving high-temperature load reliability and / or DC bias characteristics.
[0052] In the particle size distribution of multiple grains with an area circle equivalent diameter, when the particle size that accounts for 50% of the cumulative area is defined as D50 and the particle size that accounts for 99% of the cumulative area is defined as D99, it is preferable that D99 / D50 be between 1.4 and 2.2 from the viewpoint of improving high-temperature load reliability and / or DC bias characteristics.
[0053] In the particle size distribution of multiple grains with an area circle equivalent diameter, when the particle size that accounts for 50% of the cumulative area is defined as D50 and the particle size that accounts for 99% of the cumulative area is defined as D99, from the viewpoint of improving high-temperature load reliability and / or DC bias characteristics, it is preferable that D50 is between 60 nm and 150 nm, and that D99 / D50 is between 1.4 and 2.2.
[0054] The grain size and particle size distribution are determined, for example, by the ceramic raw material (e.g., BaTiO) used to fabricate the dielectric ceramic layer 140. 3The above range can be achieved by selecting the particle size and composition of the powder, and by adjusting the firing conditions such as the firing temperature and heating rate in the firing process of the manufacturing method of the multilayer ceramic capacitor described later.
[0055] The internal electrode layer 150 contains a conductive metal. Examples of the conductive metal include at least one metal selected from the group consisting of nickel (Ni), copper (Cu), silver (Ag), gold (Au), and palladium (Pd), or an alloy containing such metals. The internal electrode layer 150 may further contain tin (Sn). The internal electrode layer may contain magnesium (Mg), or it may not contain Mg.
[0056] The internal electrode layer 150 may contain dielectric particles of the same composition as the dielectric ceramic contained in the dielectric ceramic layer 140 as a common material, or it may contain dielectric particles of a different composition. The common material may contain Mg, or it may not contain Mg.
[0057] The dielectric ceramic layer 140 may have a thickness of, for example, 0.1 μm or more and 5.0 μm or less, 0.2 μm or more and 1.0 μm or less, or 0.3 μm or more and 0.6 μm or less.
[0058] The internal electrode layer 150 may have a thickness of, for example, 0.1 μm or more and 1.0 μm or less, or 0.2 μm or more and 0.5 μm or less.
[0059] In this specification, the thickness of the dielectric ceramic layer 140 and the internal electrode layer 150 is measured in an SEM observation image of the cross-section of the substrate 110 in the stacking direction T.
[0060] The number of layers of dielectric ceramic layer 140 may be, for example, 100 to 1000. The number of layers of internal electrode layer 150 may be, for example, 100 to 1000.
[0061] The first external electrode 120 and the second external electrode 130 each have, for example, a base electrode layer and a plating layer disposed on the base electrode layer. The base electrode layer includes, for example, at least one selected from a sintered body layer, a conductive resin layer, and a metal thin film layer.
[0062] The sintered body layer is formed by baking a paste containing glass powder and metal powder, and includes a glass portion and a metal portion. The glass constituting the glass portion is B 2 O 3 -SiO 2 - Examples include BaO-based glass. The metal constituting the metal part may be at least one selected from Ni, Cu, and Ag, or an alloy containing such metal. Multiple layers of different components may be formed in the sintered body layer. Furthermore, the sintered body layer may be fired simultaneously with the base body 110 in the manufacturing method described later, or it may be baked on after the base body 110 has been fired.
[0063] The conductive resin layer comprises conductive particles, such as metal nanoparticles, and a resin portion. The metal constituting the metal nanoparticles may be at least one selected from Ni, Cu, and Ag, or an alloy containing such metal. The resin constituting the resin portion may be an epoxy-based thermosetting resin. The conductive resin layer may be formed from multiple layers of different components.
[0064] The metal thin film layer is a layer with a thickness of 1 μm or less, formed by a thin film formation method such as sputtering or vapor deposition, and in which metal nanoparticles are deposited. The metal constituting the metal thin film layer may be at least one selected from Ni, Cu, Ag, and Au, or an alloy containing such metal. Multiple metal thin film layers may be formed with different components.
[0065] Examples of metals constituting the plating layer include at least one selected from Ni, Cu, Ag, Au, and Sn, or alloys containing such metals. The plating layer may be formed in multiple layers with different components.
[0066] The first external electrode 120 and the second external electrode 130 may each be a plating layer directly provided on the base body 110 and directly connected to the corresponding internal electrode layer described above.
[0067] The first multilayer ceramic capacitor 100 is manufactured, for example, as follows. First, a ceramic raw material powder is prepared by mixing the main component raw material and the additive raw material. At this time, by adjusting the mixing ratio of each raw material, two or more types of ceramic raw material powders with different Re content are prepared.
[0068] For example, BaTiO 3 A powder of the compound is used. BaTiO 3 The compound can be synthesized using known ceramic synthesis methods such as solid-phase reaction, hydrothermal synthesis, or alkoxide synthesis, with known ceramic raw materials such as oxides, carbonates, hydroxides, nitrates, organic acid salts, alkoxides, and / or chelate compounds.
[0069] BaTiO 3 When synthesizing compound iontochemistry, for example, in addition to Ba, Ti, and Re raw materials, Ca, Sr, Zr, etc., as needed, are wet-mixed in a ball mill, dried, and then heated. At this time, in order to facilitate solid solution of Re, the Re raw material may be pre-milled (also called fine powdering). Furthermore, in order to facilitate solid solution of elements such as Re, Ca, Sr, and Zr, the wet-mixing and heating process may be repeated after heating.
[0070] The additive raw materials may also include raw materials for other additive components such as Mg, Mn, Al, Si, and Ni. The additive raw materials can be mixed in the form of oxides or carbonates. Furthermore, the main component is BaTiO 3 To adjust the composition of the compound system, barium carbonate (BaCO3) is used. 3 ) and titanium dioxide (TiO 2 Ba raw materials and Ti raw materials such as ) may be added to the additive raw materials.
[0071] Next, a ceramic slurry is prepared by mixing two or more types of ceramic raw material powders with different Re content, a binder, and a solvent in a predetermined mixing ratio. By using two or more types of ceramic raw material powders with different Re content, it is possible to obtain a multilayer ceramic capacitor in which the frequency distribution of the Re / Ti ratio obtained by STEM-EDS analysis of the dielectric ceramic layer has a first peak top and a second peak top, and the ratio of the frequency of the second peak top (f2 / f1) to the frequency of the first peak top (f1) is 0.3 or higher.
[0072] Next, the ceramic slurry is formed into a sheet on a carrier film using a die coater, gravure coater, or microgravure coater, thereby forming a green sheet.
[0073] Next, a conductive paste is printed onto a green sheet using a screen printing method or gravure printing method, etc., so that it has a predetermined pattern, thereby forming a conductive pattern that will become the internal electrode.
[0074] Next, multiple green sheets are stacked and pressed together along the stacking direction using a hydrostatic press or a rigid press to form a stacked block. Green sheets with conductive patterns that serve as internal electrodes are used, but some green sheets without conductive patterns may also be used.
[0075] Next, the laminated block is divided into a matrix by pressing, dicing, or laser cutting, separating it into multiple laminated chips. At least a portion of the conductive pattern that will become the internal electrodes is exposed in the cross-section of the laminated chip formed by the separation. The laminated chips may be barrel polished.
[0076] Next, after the stacked chips have been degreased, N 2 In an atmosphere, the chip is heated to a predetermined temperature, and the binder is burned off. After that, the laminated chip is N 2 -H 2 -H 2In a reducing atmosphere consisting of oxygen gas, the material is heated to a predetermined temperature at a predetermined heating rate to form the base material. The firing temperature is set appropriately according to the composition of the ceramic raw material powder and the size of the multilayer ceramic capacitor to be manufactured, but is preferably 1100°C to 1300°C. The heating rate is set appropriately according to the composition of the ceramic raw material powder and the size of the multilayer ceramic capacitor to be manufactured, but is preferably 15°C / min or more. Heat treatment (annealing) may be performed after firing. Annealing is preferable to the firing process as it has a lower maximum temperature and is performed in a weakly reducing atmosphere. The annealing temperature may be, for example, 900°C to 1100°C.
[0077] Next, after a base electrode layer is formed on the surface of the base material, a plating layer is formed by a plating process so as to cover the base electrode layer.
[0078] The first multilayer ceramic capacitor 100 is manufactured through the above-described series of processes.
[0079] The first multilayer ceramic capacitor 100 may be a two-terminal capacitor as shown in Figure 1. Alternatively, the first multilayer ceramic capacitor 100 may be a three-terminal capacitor.
[0080] Next, the differences between the multilayer ceramic capacitor according to the second embodiment (hereinafter also referred to as the second multilayer ceramic capacitor) and the first multilayer ceramic capacitor will be mainly described. In the description of the second multilayer ceramic capacitor, the description for the first multilayer ceramic capacitor applies to components that have the same reference numerals as the components of the first multilayer ceramic capacitor. Figure 12 is a perspective view showing the external appearance of the second multilayer ceramic capacitor. Figure 13 is a cross-sectional view of the multilayer ceramic capacitor shown in Figure 12 along the line IV-IV.
[0081] The second multilayer ceramic capacitor 200 shown in Figure 12 comprises a base body 210 and external electrodes provided on the surface of the base body 210. The multilayer ceramic capacitor 200 includes a first external electrode 120 and a second external electrode 130 as external electrodes. The base body 210 may have an inner layer portion 160 in which a plurality of dielectric ceramic layers 140 and a plurality of internal electrode layers 150 are alternately stacked, external ceramic layers 170 arranged on both sides of the stacking direction T of the inner layer portion 160, and side ceramic portions 180 arranged on both sides in the width direction W perpendicular to the stacking direction T of the inner layer portion 160 and the external ceramic layers 170. The base body 210 may further have end face ceramic portions 190 arranged on both sides in the length direction L of the inner layer portion 160.
[0082] The dimensions of the second multilayer ceramic capacitor 200 are not particularly limited, but for example, the dimension in the stacking direction T may be 0.08 mm or more and 0.8 mm or less, the dimension in the width direction W may be 0.08 mm or more and 0.8 mm or less, and the dimension in the length direction L may be 0.1 mm or more and 5.0 mm or less.
[0083] In the second multilayer ceramic capacitor 200, the perovskite compound includes at least one of barium (Ba), calcium (Ca), and strontium (Sr), at least one of titanium (Ti) and zirconium (Zr), and at least one of a rare earth element (Re). The description of the perovskite compound is the same as the description for the first multilayer ceramic capacitor.
[0084] In the second multilayer ceramic capacitor 200, the frequency distribution of the Re / (Ti+Zr) ratio can be obtained by dividing the range 0 ≤ Re / (Ti+Zr) < 2 into intervals of 0.002 and counting the number of pixels belonging to each interval, based on the Re / (Ti+Zr) ratio of each pixel in the elemental mapping image converted to atom%, obtained by STEM-EDS analysis of the dielectric ceramic layer 140. The frequency distribution of the Re / (Ti+Zr) ratio can be obtained by plotting the number of pixels (frequency) belonging to each interval for intervals of 0.002.
[0085] The second multilayer ceramic capacitor 200 has a first peak top and a second peak top in the frequency distribution of the Re / (Ti+Zr) ratio, in order from the smallest Re / (Ti+Zr) ratio, and the ratio of the frequency f2 of the second peak top to the frequency f1 of the first peak top (f2 / f1) is 0.3 or more. This makes it possible to create a multilayer ceramic capacitor with excellent capacitance temperature characteristics and high-temperature load reliability, as well as improved DC bias characteristics.
[0086] In the frequency distribution of the Re / (Ti+Zr) ratio, if there is no second peak top, or if there is a second peak top but the ratio of the frequency f2 of the second peak top to the frequency f1 of the first peak top (f2 / f1) is less than 0.3, it becomes difficult to improve the DC bias characteristics of the multilayer ceramic capacitor 200. In such cases, it is expected that in the core-shell structure of the grain described later, Re is dissolved at a high concentration in the shell portion, while the solid solution of Re is insufficient in the core portion. If Re is not dissolved in the core portion, or if the solid solution of Re into the core portion is insufficient, it can cause a decrease in capacitance, and therefore it is presumed that it becomes difficult to improve the DC bias characteristics. On the other hand, in the second multilayer ceramic capacitor 200, the frequency distribution of the Re / (Ti+Zr) ratio has a second peak top in a range where the Re / (Ti+Zr) ratio is relatively large. In such cases, it is expected that Re is dissolved at a high concentration in the shell portion of the grain, and that the solid solution of Re is also progressing in the core portion of the grain. As a result, in addition to capacitance temperature characteristics and high-temperature load reliability, DC bias characteristics can be improved.
[0087] In the second multilayer ceramic capacitor 200, f2 / f1 is 0.3 or more, may be 0.4 or more, or may be 0.5 or more. Preferably f2 / f1 is 0.8 or less, but may be 0.7 or less. f2 / f1 may be 0.3 or more and 0.8 or less, or 0.3 or more and 0.7 or less.
[0088] In the second multilayer ceramic capacitor 200, when the Re / (Ti+Zr) ratio of the first peak top is P1 and the Re / (Ti+Zr) ratio of the second peak top is P2, P2-P1 is 0.01 or greater, and may be 0.02 or greater. P2-P1 may be 0.1 or less, 0.08 or less, or 0.05 or less.
[0089] The second multilayer ceramic capacitor 200 may have only a first peak top and a second peak top in the frequency distribution of the Re / (Ti+Zr) ratio, in order from the side with a small Re / (Ti+Zr) ratio, or it may have one or more additional peak tops on the side with a Re / (Ti+Zr) ratio larger than the second peak top.
[0090] In the second multilayer ceramic capacitor 200, the first and second peak tops are determined by the following procedure. First, a point where the frequency is at its maximum (hereinafter also referred to as the maximum point) is detected in the frequency distribution of the Re / (Ti+Zr) ratio. A "point where the frequency is at its maximum" is a point where the frequency is higher than that of any adjacent interval. If the frequencies of two or more consecutive intervals are the same, these intervals are considered together as a single maximum point. In this case, the frequency of the single maximum point is the same as the frequency of each interval that constitutes the single maximum point. Next, the frequency of the maximum point is compared with the frequency of the interval two steps away from the maximum point. If the frequency of the maximum point is higher than the frequency of any of the intervals two steps away from the maximum point, the maximum point is designated as the peak top. If there are multiple peak tops in four consecutive intervals, these peak tops are considered together as a single peak top. In this case, the frequency of the single peak top shall be the same as the highest frequency among the frequencies of each peak top that constitutes the single peak top. Also in this case, the Re / (Ti+Zr) ratio of the single peak top shall be the median of the four intervals. The peak tops determined by the above procedure shall be designated as the first peak top and the second peak top, in order from the one with the smallest Re / (Ti+Zr) ratio.
[0091] If the base body 210 has an inner layer 160, an outer ceramic layer 170, and a side ceramic portion 180, the dielectric ceramic layer 140, the outer ceramic layer 170, and the side ceramic portion 180 may further contain a rare earth element (Re). The description of the dielectric ceramic layer 140, the outer ceramic layer 170, and the side ceramic portion 180 is the same as the description for the first multilayer ceramic capacitor.
[0092] The method for manufacturing the second multilayer ceramic capacitor 200 is described in the same way as for the first multilayer ceramic capacitor.
[0093] The second multilayer ceramic capacitor 200 may be a two-terminal capacitor as shown in Figure 12. Alternatively, the second multilayer ceramic capacitor 200 may be a three-terminal capacitor.
[0094] The present invention will be described in more detail below with reference to examples, but the present invention is not limited thereto.
[0095] [STEM-EDS Analysis] The dielectric ceramic layer located at approximately half the length, width, and height of the multilayer ceramic capacitor was observed using a scanning transmission electron microscope (STEM), and component analysis of the fine region was performed using the attached energy-dispersive X-ray spectroscopy (EDS) system. The observation sample was prepared by thinning the dielectric ceramic layer using the focused ion beam (FIB) lift-out method. Observation and analysis were performed under the following conditions: - Instrument: JEOL Ltd., JEM-2200FS / Noran System 7 - Field of view: n=1 - Magnification: 60,000x - Pixel size: 9.2 nm / 1 pixel - Number of image pixels: 256 × 256 - Spot diameter: 1 nmφ - Measurement: 100 EDS cumulative measurements - EDS analysis software: Thermo Fisher Scientific K.K., NSS
[0096] The elemental mapping data obtained by EDS was processed using EDS analysis software as follows. First, quantitative analysis was performed on Ba, Ca, Sr, Ti, Zr, Ni, and rare earth elements so that their total was 100 atom%. For the quantification, the characteristic X-ray used was the K-line for Ca, Ti, and Ni, and the L-line for the other elements.
[0097] Since the STEM-EDS analysis field includes not only the dielectric ceramic layer but also the internal electrode layer, the region where the sum of Ti and Zr is 10 atom% or more was defined as the dielectric ceramic layer.
[0098] For the dielectric ceramic layer defined earlier in the elemental mapping image, the Re / Ti ratio, converted to atom percent, was determined using the quantitative values of each pixel with the same coordinates in the mapping images for rare earth elements (Re) and Ti.
[0099] For the Re / Ti ratio obtained in this way, data within the range 0 ≤ Re / Ti < 2 was extracted. Next, the data was divided into equal intervals of 0.002, such as 0 ≤ Re / Ti < 0.002 as the first interval, 0.002 ≤ Re / Ti < 0.004 as the second interval, and so on, up to 1.998 ≤ Re / Ti < 2. The data was then examined to determine which interval each extracted data point belonged to, and the number of data points (number of pixels) for each interval was calculated and defined as the frequency of each interval.
[0100] Here, we plotted a frequency distribution with frequency on the vertical axis and the Re / Ti ratio on the horizontal axis. In this frequency distribution, the frequency of the first interval is plotted at the position where Re / Ti = 0, the frequency of the second interval is plotted at the position where Re / Ti = 0.002, and so on, with the frequencies of each interval plotted at equal intervals of 0.002.
[0101] Next, the peak top was determined using the procedure described above. If there was a first and second peak top, the ratio of the frequency f2 of the second peak top to the frequency f1 of the first peak top (f2 / f1) was calculated.
[0102] [Evaluation of Capacitance Temperature Characteristics] To evaluate the capacitance temperature characteristics of the multilayer ceramic capacitor, the capacitance change rate was measured from the capacitance C0 at an ambient temperature of 25°C, the capacitance C1 at an ambient temperature of -55°C, and the capacitance C2 at an ambient temperature of 85°C, according to the following formula. If any of the obtained capacitance change rates fell below -15%, the capacitor was judged to be unsatisfactory. Capacitance change rate = (C1 - C0) / C0 × 100 or (C2 - C0) / C0 × 100
[0103] [High-Temperature Load Reliability Evaluation] Fifty multilayer ceramic capacitors were prepared, and their reliability was evaluated by high-temperature load testing at an ambient temperature of 125°C, a voltage of 16–32 V / μm, and a test duration of 10 hours. Capacitors that short-circuited after the test were judged to be faulty. Capacitors that failed were judged to pass if one or fewer failed, and failed if more than one failed.
[0104] [Evaluation of DC Bias Characteristics] To evaluate the DC bias characteristics of the multilayer ceramic capacitor, the capacitance change rate was measured from the no-load capacitance C0 and the capacitance C6 when a DC voltage of 6V / μm was applied, according to the following formula. A capacitance change rate below -35% was judged as unsatisfactory. Capacitance change rate = (C6 - C0) / C0 × 100
[0105] <Example 1> A multilayer ceramic capacitor was manufactured according to the manufacturing method described above. BaTiO2 containing Ba raw material, Ti raw material and Dy raw material 3 A compound was used as the main component raw material. Two types of ceramic raw material powder with different Dy content were prepared by adjusting the mixing ratio of the raw materials. The firing temperature in the firing process was 1200°C, and the heating rate from the start of firing to reaching the firing temperature was 15°C / min. The dimensions of the multilayer ceramic capacitor were 0.377 mm in the stacking direction, 0.377 mm in the width direction, and 0.675 mm in the length direction. The thickness of the dielectric ceramic layer was 0.50 μm, and the thickness of the internal electrode layer was 0.37 μm. The grain D50 was 110.1 nm, and the D99 / D50 was 1.78. Figure 6 shows the frequency distribution of the Dy / Ti ratio (Re / Ti ratio), and Table 1 shows the evaluation results of the ratio of the frequency of the second peak top (f2 / f1) to the frequency of the first peak top (f1), capacitance temperature characteristics, high-temperature load reliability, and DC bias characteristics.
[0106] As shown in Figure 6, the multilayer ceramic capacitor of Example 1 had a first peak top and a second peak top in the frequency distribution of the Re / Ti ratio, and the ratio of the frequency f2 of the second peak top to the frequency f1 of the first peak top (f2 / f1) was 0.3 or higher.
[0107] Next, peak separation processing was performed on the frequency distribution shown in Figure 6 using a known method, and the results of separating it into two curves are shown in Figure 7. In Figure 7, the dashed and dotted lines show the two curves after separation, and the solid line shows the composite curve of the two curves after separation. Figure 8 is an elemental mapping image corresponding to the region occupied by the curve shown by the dashed line in Figure 7. Figure 9 is an elemental mapping image corresponding to the region occupied by the curve shown by the dotted line in Figure 7. As shown in Figures 7 to 9, in addition to regions with relatively low concentrations of rare earth elements (Re), there were also many regions with relatively high concentrations of rare earth elements (Re). Furthermore, as shown in Figure 9, it is inferred that regions with relatively high concentrations of rare earth elements (Re) also exist in positions corresponding to the core of the grain, suggesting that solid solution of Re is progressing in the core.
[0108] <Example 2> A multilayer ceramic capacitor was fabricated in the same manner as in Example 1. The dimensions of the multilayer ceramic capacitor were 0.377 mm in the stacking direction, 0.377 mm in the width direction, and 0.675 mm in the length direction. The thickness of the dielectric ceramic layer was 0.50 μm, and the thickness of the internal electrode layer was 0.37 μm. The grain D50 was 106.5 nm, and the D99 / D50 was 1.89. The frequency distribution of the Dy / Ti ratio is shown in Figure 10, and the evaluation results are shown in Table 1.
[0109] As shown in Figure 10, the multilayer ceramic capacitor of Example 2 had a first peak top and a second peak top in the frequency distribution of the Re / Ti ratio, and the ratio of the frequency f2 of the second peak top to the frequency f1 of the first peak top (f2 / f1) was 0.3 or higher.
[0110] <Comparative Example 1> A multilayer ceramic capacitor was fabricated in the same manner as in Example 1, except that one type of ceramic raw material powder was used. The dimensions of the multilayer ceramic capacitor were 0.377 mm in the stacking direction, 0.377 mm in the width direction, and 0.675 mm in the length direction. The thickness of the dielectric ceramic layer was 0.51 μm, and the thickness of the internal electrode layer was 0.37 μm. The grain D50 was 115 nm, and the D99 / D50 was 1.88. The frequency distribution of the Dy / Ti ratio is shown in Figure 11, and the evaluation results are shown in Table 1.
[0111] As shown in Figure 11, the multilayer ceramic capacitor of Comparative Example 1 had only a first peak in the frequency distribution of the Re / Ti ratio, and no second peak appeared.
[0112]
[0113] As shown in Table 1, Examples 1 and 2 yielded good results not only in capacitance-temperature characteristics and high-temperature load reliability, but also in DC bias characteristics.
[0114] By using two types of ceramic raw material powders with different Re content, and by setting appropriate firing conditions (firing temperature, heating rate, etc.) in the firing process, we were able to manufacture a multilayer ceramic capacitor having a first peak top and a second peak top, with a ratio of the frequency f2 of the second peak top to the frequency f1 of the first peak top (f2 / f1) of 0.3 or more.
[0115] In the description of the embodiments described above, the combinable configurations may be combined with each other.
[0116] The embodiments disclosed herein should be considered in all respects to be illustrative and not restrictive. The scope of the invention is indicated by the claims rather than by the foregoing description, and all modifications within the meaning and scope of equivalents of the claims are intended.
[0117] Those skilled in the art will understand that the above-described exemplary embodiments are specific examples of the following embodiments.
[0118] <Clause 1> A multilayer ceramic capacitor comprising a substrate including a plurality of dielectric ceramic layers and a plurality of internal electrode layers, and an external electrode provided on the surface of the substrate and electrically connected to the internal electrode layer, wherein the dielectric ceramic layer mainly contains a perovskite compound, the perovskite compound contains at least one of barium (Ba), calcium (Ca), and strontium (Sr), titanium (Ti), and at least one rare earth element (Re), and in the frequency distribution obtained by STEM-EDS analysis (scanning transmission electron microscopy-energy dispersive X-ray spectroscopy) of the dielectric ceramic layer, with respect to the Re / Ti ratio of each pixel of the elemental mapping image converted to atom%, the range 0 ≤ Re / Ti < 2 is divided into intervals with a width of 0.002, and the number of pixels belonging to each interval is counted, and the Re / Ti ratio has a first peak top and a second peak top in order from the smallest Re / Ti ratio, A multilayer ceramic capacitor in which the ratio of the frequency f2 of the second peak top to the frequency f1 of the first peak top (f2 / f1) is 0.3 or more. <Clause 2> The multilayer ceramic capacitor in which, when the Re / Ti ratio of the first peak top is P1 and the Re / Ti ratio of the second peak top is P2, P2-P1 is 0.01 or more. <Clause 3> The multilayer ceramic capacitor in which, the dielectric ceramic layer further comprises at least one selected from the group consisting of magnesium (Mg), manganese (Mn), aluminum (Al), silicon (Si), and nickel (Ni). <Clause 4> The multilayer ceramic capacitor in which, the dielectric ceramic layer further comprises Mg, and the content of Mg in the dielectric ceramic layer is 0.05 mol% or more and 1 mol% or less with respect to 100 mol% of the total amount of Ti and Zr in the perovskite-type compound. <Clause 5> The dielectric ceramic layer comprises a plurality of grains, and when the particle size distribution of the area circle equivalent diameter of the plurality of grains is defined as D50, D50 is 60 nm or more and 150 nm or less, according to any one of the first to fourth paragraphs.<Clause 6> The dielectric ceramic layer contains a plurality of grains, and in the particle size distribution of the area circle equivalent diameter of the plurality of grains, when the particle size that accounts for 50% of the cumulative area is D50 and the particle size that accounts for 99% of the cumulative area is D99, D99 / D50 is 1.4 or more and 2.2 or less, as described in any one of Clauses 1 to 5. <Clause 7> The element comprises an inner layer portion in which a plurality of dielectric ceramic layers and a plurality of internal electrode layers are alternately stacked, an outer ceramic layer arranged on both sides in the stacking direction of the inner layer portion, and a side ceramic portion arranged on both sides in the width direction perpendicular to the stacking direction of the inner layer portion and the outer ceramic layer, as described in any one of Clauses 1 to 6. <Clause 8> The dielectric ceramic layer, the outer ceramic layer and the side ceramic portion further contain dysprosium (Dy), as described in Clause 7. <Clause 9> The dielectric ceramic layer, the outer ceramic layer, and the side ceramic portion contain silicon (Si), and the Si content in the outer ceramic layer and the side ceramic portion is higher than the Si content in the dielectric ceramic layer, as described in Clause 7 or Clause 8. <Clause 10> The dielectric ceramic layer, the outer ceramic layer, and the side ceramic portion contain aluminum (Al), and the Al content in the outer ceramic layer and the side ceramic portion is higher than the Al content in the dielectric ceramic layer, as described in any one of Clauses 7 to 9. <Clause 11> The dielectric ceramic layer, the outer ceramic layer, and the side ceramic portion contain manganese (Mn), and the Mn content in the outer ceramic layer and the side ceramic portion is higher than the Mn content in the dielectric ceramic layer, as described in any one of Clauses 7 to 10.<Clause 12> A multilayer ceramic capacitor comprising a substrate including a plurality of dielectric ceramic layers and a plurality of internal electrode layers, and an external electrode provided on the surface of the substrate and electrically connected to the internal electrode layers, wherein the dielectric ceramic layers mainly contain a perovskite-type compound, and the perovskite-type compound contains at least one of barium (Ba), calcium (Ca), and strontium (Sr), at least one of titanium (Ti) and zirconium (Zr), and at least one of a rare earth element (Re), A multilayer ceramic capacitor in which, for each pixel of the elemental mapping image obtained by STEM-EDS analysis (scanning transmission electron microscopy-energy dispersive X-ray spectroscopy) of the dielectric ceramic layer, the Re / (Ti+Zr) ratio of each pixel is divided into intervals of width 0.002 within the range of 0 ≤ Re / (Ti+Zr) < 2, and the number of pixels belonging to each interval is counted, and in the frequency distribution, there are a first peak top and a second peak top in order from the smallest Re / (Ti+Zr) ratio, the ratio of the frequency f2 of the second peak top to the frequency f1 of the first peak top (f2 / f1) is 0.3 or more, and when the Re / (Ti+Zr) ratio of the first peak top is P1 and the Re / (Ti+Zr) ratio of the second peak top is P2, P2-P1 is 0.01 or more. <Clause 13> The multilayer ceramic capacitor according to Clause 12, wherein the dielectric ceramic layer further comprises at least one selected from the group consisting of magnesium (Mg), manganese (Mn), aluminum (Al), silicon (Si), and nickel (Ni). <Clause 14> The multilayer ceramic capacitor according to Clause 12 or 13, wherein the dielectric ceramic layer further comprises Mg, and the content of Mg in the dielectric ceramic layer is 0.05 mol% or more and 1 mol% or less with respect to 100 mol% of the total amount of Ti and Zr in the perovskite-type compound. <Clause 15> The multilayer ceramic capacitor according to any one of Clauses 12 to 14, wherein the dielectric ceramic layer comprises a plurality of grains, and when the particle size that accounts for 50% of the cumulative area based on the area in the particle size distribution of the plurality of grains is defined as D50, D50 is 60 nm or more and 150 nm or less.<Clause 16> The dielectric ceramic layer contains a plurality of grains, and in the particle size distribution of the area circle equivalent diameter of the plurality of grains, when the particle size that accounts for 50% of the cumulative area is D50 and the particle size that accounts for 99% of the cumulative area is D99, D99 / D50 is 1.4 or more and 2.2 or less, as described in any one of Clauses 12 to 15. <Clause 17> The element comprises an inner layer in which a plurality of dielectric ceramic layers and a plurality of internal electrode layers are alternately stacked, an outer ceramic layer disposed on both sides in the stacking direction of the inner layer, and a side ceramic portion disposed on both sides in the width direction perpendicular to the stacking direction of the inner layer and the outer ceramic layer, as described in any one of Clauses 12 to 16. <Clause 18> The dielectric ceramic layer, the outer ceramic layer, and the side ceramic portion further contain dysprosium (Dy), as described in Clause 17. <Clause 19> The dielectric ceramic layer, the outer ceramic layer, and the side ceramic portion contain silicon (Si), and the Si content in the outer ceramic layer and the side ceramic portion is higher than the Si content in the dielectric ceramic layer, as described in Clause 17 or Clause 18. <Clause 20> The dielectric ceramic layer, the outer ceramic layer, and the side ceramic portion contain aluminum (Al), and the Al content in the outer ceramic layer and the side ceramic portion is higher than the Al content in the dielectric ceramic layer, as described in any one of Clauses 17 to 19. <Clause 21> The dielectric ceramic layer, the outer ceramic layer, and the side ceramic portion contain manganese (Mn), and the Mn content in the outer ceramic layer and the side ceramic portion is higher than the Mn content in the dielectric ceramic layer, as described in any one of Clauses 17 to 20.
[0119] 100 Multilayer ceramic capacitor, 110 Base body, 111 First main surface, 112 Second main surface, 113 First side surface, 114 Second side surface, 115 First end surface, 116 Second end surface, 120 First external electrode, 130 Second external electrode, 140 Dielectric ceramic layer, 150 Internal electrode layer, 151 First internal electrode layer, 152 Second internal electrode layer, 160 Inner layer portion, 170 External ceramic layer, 180 Side ceramic portion, 190 End ceramic portion, 200 Multilayer ceramic capacitor, 210 Base body, L Length direction, T Stacking direction, W Width direction.
Claims
1. A multilayer ceramic capacitor comprising a substrate including a plurality of dielectric ceramic layers and a plurality of internal electrode layers, and an external electrode provided on the surface of the substrate and electrically connected to the internal electrode layers, wherein the dielectric ceramic layer mainly contains a perovskite compound, the perovskite compound contains at least one of barium (Ba), calcium (Ca), and strontium (Sr), titanium (Ti), and at least one rare earth element (Re), and the Re / Ti ratio of each pixel in the elemental mapping image obtained by STEM-EDS analysis (scanning transmission electron microscopy-energy dispersive X-ray spectroscopy) of the dielectric ceramic layer, divided into intervals of 0.002 in the range of 0 ≤ Re / Ti < 2, and counting the number of pixels belonging to each interval, has a first peak top and a second peak top in order from the smallest Re / Ti ratio, A multilayer ceramic capacitor in which the ratio of the frequency f2 of the second peak top to the frequency f1 of the first peak top (f2 / f1) is 0.3 or greater.
2. The multilayer ceramic capacitor according to claim 1, wherein when the Re / Ti ratio of the first peak top is P1 and the Re / Ti ratio of the second peak top is P2, P2 - P1 is 0.01 or greater.
3. The multilayer ceramic capacitor according to claim 1 or claim 2, wherein the dielectric ceramic layer further comprises at least one selected from the group consisting of magnesium (Mg), manganese (Mn), aluminum (Al), silicon (Si), and nickel (Ni).
4. The multilayer ceramic capacitor according to any one of claims 1 to 3, wherein the dielectric ceramic layer further contains Mg, and the content of Mg in the dielectric ceramic layer is 0.05 mol% or more and 1 mol% or less with respect to 100 mol% of the total amount of Ti and Zr in the perovskite compound.
5. The multilayer ceramic capacitor according to any one of claims 1 to 4, wherein the dielectric ceramic layer comprises a plurality of grains, and when the particle size of the plurality of grains in the area circle equivalent diameter is defined as D50, the particle size of which cumulatively accounts for 50% of the area is 60 nm or more and 150 nm or less.
6. The dielectric ceramic layer comprises a plurality of grains, and in the particle size distribution of the plurality of grains with an area circle equivalent diameter, when the particle size that accounts for 50% of the cumulative area is defined as D50 and the particle size that accounts for 99% of the cumulative area is defined as D99, the ratio of D99 to D50 is 1.4 or more and 2.2 or less, according to any one of claims 1 to 5.
7. The multilayer ceramic capacitor according to any one of claims 1 to 6, wherein the substrate comprises an inner layer portion in which a plurality of dielectric ceramic layers and a plurality of internal electrode layers are alternately stacked, an outer ceramic layer disposed on both sides in the stacking direction of the inner layer portion, and a side ceramic portion disposed on both sides in the width direction perpendicular to the stacking direction of the inner layer portion and the outer ceramic layer.
8. The multilayer ceramic capacitor according to claim 7, wherein the dielectric ceramic layer, the outer ceramic layer, and the side ceramic portion further contain dysprosium (Dy).
9. The multilayer ceramic capacitor according to claim 7 or claim 8, wherein the dielectric ceramic layer, the outer ceramic layer, and the side ceramic portion contain silicon (Si), and the Si content in the outer ceramic layer and the side ceramic portion is higher than the Si content in the dielectric ceramic layer.
10. The multilayer ceramic capacitor according to any one of claims 7 to 9, wherein the dielectric ceramic layer, the outer ceramic layer, and the side ceramic portion contain aluminum (Al), and the Al content in the outer ceramic layer and the side ceramic portion is higher than the Al content in the dielectric ceramic layer.
11. The multilayer ceramic capacitor according to any one of claims 7 to 10, wherein the dielectric ceramic layer, the outer ceramic layer, and the side ceramic portion contain manganese (Mn), and the Mn content in the outer ceramic layer and the side ceramic portion is higher than the Mn content in the dielectric ceramic layer.
12. A multilayer ceramic capacitor comprising a substrate including a plurality of dielectric ceramic layers and a plurality of internal electrode layers, and an external electrode provided on the surface of the substrate and electrically connected to the internal electrode layers, wherein the dielectric ceramic layer mainly contains a perovskite compound, the perovskite compound contains at least one of barium (Ba), calcium (Ca), and strontium (Sr), at least one of titanium (Ti) and zirconium (Zr), and at least one of rare earth elements (Re), and in the frequency distribution obtained by STEM-EDS analysis (scanning transmission electron microscopy-energy dispersive X-ray spectroscopy) of the dielectric ceramic layer, where the Re / (Ti+Zr) ratio of each pixel in the elemental mapping image converted to atom%, the range 0 ≤ Re / (Ti+Zr) < 2 is divided into intervals with a width of 0.002, and the number of pixels belonging to each interval is counted, the frequency distribution has a first peak top and a second peak top in order from the smallest Re / (Ti+Zr) ratio, A multilayer ceramic capacitor in which the ratio of the frequency f2 of the second peak top to the frequency f1 of the first peak top (f2 / f1) is 0.3 or greater, and when P1 is the Re / (Ti+Zr) ratio of the first peak top and P2 is the Re / (Ti+Zr) ratio of the second peak top, P2-P1 is 0.01 or greater.