Transistor and semiconductor device

Abstract

This transistor comprises: a first electrode and a second electrode; an oxide semiconductor that connects the first electrode and the second electrode; and a third electrode that is adjacent to the oxide semiconductor with a first insulating film and a second insulating film interposed therebetween. The first electrode and the second electrode are laminated with at least an insulating film interposed therebetween. The first insulating film and the second insulating film are laminated such that the first insulating film is positioned on the oxide semiconductor side. The oxygen concentration of the first insulating film per unit volume differs from the oxygen concentration of the second insulating film per unit volume.

Description

Transistors and semiconductor devices

[0001] This invention relates to transistors and semiconductor devices. Specifically, this invention relates to transistors and semiconductor devices with controlled threshold voltages.

[0002] Attempts have been made to apply transistors using amorphous oxide semiconductor layers, such as indium gallium zinc oxide (IGZO), as channels to DRAMs (Dynamic Random Access Memory) (Patent Document 1). In Patent Document 1, a first layer including a semiconductor element and a first insulating film, a second layer including a channel formed from an oxide semiconductor and a second insulating film, and a third layer including an electrode formed on the channel and a third insulating film are stacked, and the film density of the third insulating film is made smaller than the film density of at least one of the film densities of the first insulating film and the second insulating film. By utilizing the fact that the amount of oxygen that permeates through the insulating film decreases as the film density of the insulating film increases, the supply of oxygen to the semiconductor element and the oxide semiconductor during oxygen annealing is adjusted to stabilize the threshold voltage.

[0003] Incidentally, power semiconductor elements are used in switching circuits and inverter circuits for power control. An example of a power semiconductor element is a field-effect transistor (FET) using nitride semiconductors. A method for controlling the threshold voltage in semiconductor elements using nitride semiconductors has been developed (for example, Patent Document 2).

[0004] Japanese Patent Publication No. 2024-25325 Japanese Patent Publication No. 2018-26431

[0005] However, conventional technologies, including those described in Patent Document 1, had room for further improvement in terms of controlling the threshold voltage in transistors. Furthermore, while methods for controlling the threshold voltage have been developed in the field of power semiconductor devices such as semiconductor devices using nitride semiconductors, as described in Patent Document 2, it is considered difficult to apply the threshold voltage control methods used in power semiconductor devices to transistors with an oxide semiconductor layer channel, such as those used in semiconductor memory devices and logic devices, due to differences in device size, device structure, material composition, and required performance.

[0006] One of the objectives of the present invention is to provide transistors and semiconductor devices with controlled threshold voltages.

[0007] As a result of diligent research, the present inventors have found that the threshold voltage can be controlled by configuring the insulating film interposed between the oxide semiconductor and the gate electrode (the third electrode described later) in a transistor as a laminate including a first insulating film and a second insulating film, and by making the oxygen concentration per unit volume of the first insulating film and the oxygen concentration per unit volume of the second insulating film different from each other, thereby completing the present invention. According to the present invention, the following transistors and the like can be provided: 1. A transistor comprising: a first electrode and a second electrode; an oxide semiconductor connecting the first electrode and the second electrode; and a third electrode adjacent to the oxide semiconductor via the first insulating film and the second insulating film, wherein the first electrode and the second electrode are laminated with at least an insulating film in between, the first insulating film and the second insulating film are laminated such that the first insulating film is located on the oxide semiconductor side, and the oxygen concentration per unit volume of the first insulating film and the oxygen concentration per unit volume of the second insulating film are different from each other. 2. The transistor according to 1, wherein the first insulating film contains an oxide with a higher oxygen concentration per unit volume than the second insulating film. 3. 1. The transistor according to claim 1, wherein the first insulating film contains an oxide with a lower oxygen concentration per unit volume than the second insulating film. 4. The transistor according to any one of claims 1 to 3, wherein the first electrode and the second electrode are stacked via at least a third insulating film, and the oxide semiconductor connects the first electrode and the second electrode by penetrating at least the third insulating film. 5. The transistor according to any one of claims 1 to 4, wherein the first electrode and the third electrode are stacked via a third insulating film, the third electrode and the second electrode are stacked via a fourth insulating film, the oxide semiconductor is provided in a columnar shape penetrating the third insulating film, the third electrode, and the fourth insulating film, the first insulating film is provided so as to surround at least a part of the columnar oxide semiconductor, and the second insulating film is provided so as to surround at least a part of the first insulating film. 6. The transistor according to claim 5, wherein the height of the columnar oxide semiconductor is 2 to 1000 nm.7. The first electrode and the second electrode are stacked via a third insulating film, the oxide semiconductor has a cylindrical portion provided so as to penetrate the third insulating film, the first insulating film has a cylindrical portion provided on the inner wall of the cylindrical portion of the oxide semiconductor, the second insulating film has a cylindrical portion provided on the inner wall of the cylindrical portion of the first insulating film, and the third electrode has a portion provided inside the cylindrical portion of the second insulating film. The transistor according to any one of 1 to 4.8. The transistor according to 7, wherein the height of the cylindrical portion of the oxide semiconductor is 2 to 1000 nm.9. The transistor according to any one of 1 to 8, wherein the thickness of the first insulating film is 0.5 to 200 nm.10. The transistor according to any one of 1 to 8, wherein the thickness of the first insulating film is 1.0 to 50 nm.11. The transistor according to any one of 1 to 8, wherein the thickness of the first insulating film is 2.0 to 8.0 nm.12. The transistor according to any one of 1 to 11, wherein the thickness of the second insulating film is 0.5 to 200 nm.13. The transistor according to any one of 1 to 11, wherein the thickness of the second insulating film is 1.0 to 50 nm.14. The transistor according to any one of 1 to 11, wherein the thickness of the second insulating film is 2.0 to 8.0 nm.15. The transistor according to 2, wherein the ratio of the oxygen concentration per unit volume of the first insulating film to the oxygen concentration per unit volume of the second insulating film (oxygen concentration per unit volume of the first insulating film / oxygen concentration per unit volume of the second insulating film) is 1.2 or more and 5.0 or less.16. The transistor according to 3, wherein the ratio of the oxygen concentration per unit volume of the first insulating film to the oxygen concentration per unit volume of the second insulating film (oxygen concentration per unit volume of the first insulating film / oxygen concentration per unit volume of the second insulating film) is 0.20 or more and 0.90 or less.17. The first insulating film and the second insulating film are Al. ２ , ０．９ , ０．１ , ０．１ , ２ , ２ , ０．９ , <00000​​​​​​​​​２ O ３ 、 ２ O ５ 、HfO ２ 、MO、SiO ２ 、CeO ２ 、CuO、SrT&O ３ 、Ya ２ O ３ 、Y ２ O ３ 、Sm ２ O ３ 、Nd ２ O ３ 、Gd ２ O ３ 、 ２ O ３ 、Hf ０．９ Al ０．１ ON、Hf ０．９ Si ０．１A transistor according to any one of 1 to 16, comprising at least one selected from the group consisting of ON and SrO. 18. A transistor according to any one of 1 to 17, wherein at least one selected from the group consisting of the first insulating film and the second insulating film comprises an oxide or oxynitride of Hf, Zr, or Ta. 19. A transistor according to any one of 1 to 18, wherein at least one of the first electrode and the second electrode is at least one selected from the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), aluminum zinc oxide (AZO), gallium zinc oxide (GZO), aluminum (Al), silicon (Si), iron (Fe), cobalt (Co), nickel (Ni), copper (Cu), germanium (Ge), molybdenum (Mo), ruthenium (Ru), rhodium (Rh), palladium (Pd), silver (Ag), tantalum (Ta), iridium (Ir), platinum (Pt), tungsten (W), titanium (Ti), titanium nitride (TiN), aluminum nitride (AlN), manganese nitride (MnN), molybdenum nitride (MoN), and nickel nitride (Ni3N). 20. A transistor according to any one of 1 to 19, wherein the oxide semiconductor is a crystalline oxide semiconductor. 21. 20. The transistor according to 20, wherein the oxide semiconductor includes a bixbyte crystal structure. 22. The transistor according to 20 or 21, wherein the oxide semiconductor mainly contains indium oxide. 23. The transistor according to any one of 20 to 22, wherein the oxide semiconductor contains Ga or Al. 24. The transistor according to any one of 20 to 22, wherein the oxide semiconductor contains Ga. 25. The transistor according to any one of 20 to 22, wherein the oxide semiconductor contains Ga and Al. 26. The transistor according to any one of 1 to 25, wherein the oxide semiconductor is a polycrystalline oxide semiconductor. 27. The transistor according to any one of 1 to 25, wherein the oxide semiconductor is a single-crystal oxide semiconductor. 28. The transistor according to any one of 1 to 27, wherein the oxide semiconductor is a crystalline oxide semiconductor formed by atomic layer deposition. 29. A semiconductor device including the transistor according to any one of 1 to 28. 30. The semiconductor device according to 29, which is a semiconductor memory device.31. A transistor comprising: a first electrode and a second electrode; an oxide semiconductor connecting the first electrode and the second electrode; and a third electrode adjacent to the oxide semiconductor via a first insulating film and a second insulating film, wherein the first electrode and the second electrode are stacked with at least an insulating film in between, the first insulating film and the second insulating film are stacked such that the first insulating film is located on the oxide semiconductor side, the oxygen concentration per unit volume of the first insulating film and the oxygen concentration per unit volume of the second insulating film are different from each other, the first insulating film contains an oxide with a higher oxygen concentration per unit volume than the second insulating film, the thickness of the first insulating film and the second insulating film are independently 0.5 to 200 nm, at least one selected from the group consisting of the first insulating film and the second insulating film contains an oxide or oxynitride of Hf, Zr, or Ta, and the oxide semiconductor includes a bixbyte crystal structure. 32. The transistor according to 31, wherein the ratio of the oxygen concentration per unit volume of the first insulating film to the oxygen concentration per unit volume of the second insulating film (oxygen concentration per unit volume of the first insulating film / oxygen concentration per unit volume of the second insulating film) is 1.2 or more and 5.0 or less.

[0008] According to the present invention, it is possible to provide transistors and semiconductor devices with controlled threshold voltages.

[0009] This is a schematic perspective view showing a cross-section of a transistor according to the first embodiment. This is a schematic cross-sectional view of a transistor according to the first embodiment. This is a diagram illustrating an example of a method for manufacturing a transistor according to the first embodiment. This is a schematic perspective view showing a cross-section of a transistor according to the second embodiment. This is a schematic cross-sectional view of a transistor according to the second embodiment. This is a schematic perspective view showing a cross-section of a transistor according to the third embodiment. This is a schematic cross-sectional view of a transistor according to the third embodiment. This is a diagram showing an example of a circuit configuration of a semiconductor memory device.

[0010] The transistors and semiconductor devices of the present invention will be described in detail below. In this specification, "x to y" represents a numerical range of "x or more, and y or less". The upper and lower limits described for the numerical range can be combined in any way. Furthermore, it is possible to combine two or more non-conflicting embodiments of the embodiments of the present invention described below, and an embodiment that combines two or more embodiments is also an embodiment of the embodiments of the present invention.

[0011] 1. Transistor A transistor according to one aspect of the present invention comprises: a first electrode and a second electrode; an oxide semiconductor connecting the first electrode and the second electrode; and a third electrode adjacent to the oxide semiconductor via a first insulating film and a second insulating film, wherein the first electrode and the second electrode are stacked with at least an insulating film in between, the first insulating film and the second insulating film are stacked such that the first insulating film is located on the oxide semiconductor side, and the oxygen concentration per unit volume of the first insulating film and the oxygen concentration per unit volume of the second insulating film are different from each other. The transistor according to this aspect provides the effect of being able to control the threshold voltage. In particular, this effect is well exhibited even when the transistor is miniaturized (the channel length is shortened). More specifically, in the transistor according to this aspect, the oxygen concentration per unit volume of the first insulating film and the oxygen concentration per unit volume of the second insulating film are different from each other. Here, "oxygen concentration per unit volume" means the amount of oxygen atoms present (number of atoms) per unit volume, and may be rephrased as oxygen atom density. Furthermore, "oxygen concentration per unit volume of the insulating film" may refer to the oxygen concentration per unit volume of the material constituting the insulating film. As a result, a gradient in oxygen concentration is formed at the interface between the first insulating film and the second insulating film. This causes oxygen to move at the interface, creating an interface dipole. The electric field generated by this interface dipole shifts the energy level of the third electrode (gate electrode) from its original level, and the threshold voltage also shifts. This allows control of the transistor's threshold voltage. The threshold voltage (Vth) refers to the voltage at which the transistor's channel switches from an "off state" (where no current conducts) to an "on state" (where current conducts). For example, by making the oxygen concentration per unit volume of the first insulating film higher than the oxygen concentration per unit volume of the second insulating film, the threshold voltage shifts to a positive value. This allows the gate voltage at which the transistor turns on to be higher than 0V, enabling a suitable normally-off state. Furthermore, for example, by making the oxygen concentration per unit volume of the first insulating film lower than the oxygen concentration per unit volume of the second insulating film, the threshold voltage can be shifted to the negative.This allows a transistor, which normally has a threshold voltage that is too high, to be turned on at an appropriate voltage. As a result, power consumption in a device equipped with a transistor can be further reduced. Furthermore, by setting the difference between the oxygen concentration per unit volume of the first insulating film and the oxygen concentration per unit volume of the second insulating film to be large (for example, by selecting the materials for the first and second insulating films), the amount of shift in the positive or negative direction of the threshold voltage can also be increased. As described above, according to this embodiment, since the threshold voltage can be controlled, characteristics can be suitably exhibited according to the purpose and application, such as suitably realizing normally off. In addition, since the region in which the above-mentioned oxygen concentration gradient occurs is very thin, the threshold voltage control effect can be obtained even when the transistor is miniaturized and the thickness of the first and second insulating films is made extremely thin.

[0012] (First Embodiment) An example of a transistor according to this embodiment (first embodiment) will be described below with reference to Figures 1 and 2. Figure 1 is a schematic perspective view showing a cross-section of the transistor according to the first embodiment. Figure 2 is a schematic cross-sectional view of the transistor. In this embodiment, the transistor 10 includes a first electrode 11, a second electrode 12, a third electrode 13, an oxide semiconductor 15, a first insulating film 161, a second insulating film 162, a third insulating film 14a, and a fourth insulating film 14b. The first electrode 11 and the second electrode 12 are stacked with at least the third insulating film 14a (here, the third insulating film 14a and the fourth insulating film 14b) in between. In this context, "stacked" means that at least a portion of the first electrode 11 and at least a portion of the second electrode 12 are arranged along a direction perpendicular to the planar direction of the substrate (not shown) supporting the transistor 10. Also, although not shown, when multiple transistors 10 are connected in a planar manner (in the X-Y direction) (when multiple transistors 10 form a transistor array), at least a portion of the first electrode 11 and at least a portion of the second electrode 12 are arranged along a direction perpendicular to the planar direction (Z direction). At least a portion of the third insulating film 14a (here, the third insulating film 14a and the fourth insulating film 14b) may be interposed between the first electrode 11 and the second electrode 12. The third electrode 13 is located between the first electrode 11 and the second electrode 12.

[0013] Of the third insulating film 14a and the fourth insulating film 14b, the third insulating film 14a is located between the first electrode 11 and the third electrode 13. As a result, the first electrode 11 and the third electrode 13 are electrically insulated by the third insulating film 14a. The fourth insulating film 14b is located between the second electrode 12 and the third electrode 13. As a result, the second electrode 12 and the third electrode 13 are electrically insulated by the fourth insulating film 14b.

[0014] In the region shown in Figure 2, the third electrode 13 is positioned between the third insulating film 14a and the fourth insulating film 14b. However, outside the region shown in Figure 2, the third insulating film 14a and the fourth insulating film 14b may be in contact with each other, forming a single layer. In this case, the third electrode 13 does not need to be positioned between the third insulating film 14a and the fourth insulating film 14b in that region.

[0015] The oxide semiconductor 15 penetrates at least the third insulating film 14a and is provided to connect the first electrode 11 and the second electrode 12. The oxide semiconductor 15 may also penetrate the third electrode 13 in addition to the third insulating film 14a and the fourth insulating film 14b. Here, the oxide semiconductor 15 is provided in a columnar shape, penetrating the third insulating film 14a, the third electrode 13, and the fourth insulating film 14b in this order. In this case, it is preferable that the third electrode 13 surrounds the entire circumference of the oxide semiconductor 15 (around the periphery in the direction perpendicular to the length direction) in a portion of the oxide semiconductor 15 in the longitudinal direction (the central portion in the example of Figure 2) via the first insulating film 161 and the second insulating film 162. This makes it easier to prevent leakage current even if the channel length of the oxide semiconductor 15, as described later, is shortened. At the same time, it is also advantageous in terms of miniaturization. Furthermore, the length direction of the oxide semiconductor 15 as referred to here may be the vertical direction in Figure 2 (the direction connecting the first electrode and the second electrode), the direction along the channel length described later, the thickness direction of the laminate in which the third insulating film 14a, the third electrode 13, and the fourth insulating film 14b are stacked in this order, and, if the oxide semiconductor 15 is columnar, the height direction of the columnar structure.

[0016] The first insulating film 161 and the second insulating film 162 are provided between the third electrode 13 and the oxide semiconductor 15. The oxide semiconductor 15, the first insulating film 161, the second insulating film 162, and the third electrode 13 are arranged in this order. That is, the first insulating film 161 and the second insulating film 162 are stacked such that the first insulating film 161 is located on the oxide semiconductor 15 side. The second insulating film 162 is stacked on the surface of the first insulating film 161 opposite to the surface in contact with the oxide semiconductor 15. The first insulating film 161 and the second insulating film 162 may provide insulation between the third electrode 13 and the oxide semiconductor 15 by being provided between the third electrode 13 and the oxide semiconductor 15. In addition to being provided between the third electrode 13 and the oxide semiconductor 15, the first insulating film 161 and the second insulating film 162 may also be provided, for example, between the third insulating film 14a and / or the fourth insulating film 14b and the oxide semiconductor 15. The laminate, consisting of the first insulating film 161 and the second insulating film 162, is provided so as to surround the entire side surface of the columnar oxide semiconductor 15.

[0017] From one perspective, it can be said that the transistor 10 has a through-hole that penetrates the stack in the thickness direction (up and down direction in Figures 1 and 2) of the stack, in which the third insulating film 14a, the third electrode 13, and the fourth insulating film 14b are stacked in this order, the inner circumferential surface of the through-hole is covered with a cylindrical first insulating film 161, the inner circumferential surface of the cylindrical first insulating film 161 is covered with a cylindrical second insulating film 162, and the inside of the cylindrical second insulating film 162 is filled with an oxide semiconductor 15.

[0018] The dimensions of the transistor 10 may be designed as appropriate depending on its application. The channel length of the oxide semiconductor 15 is, for example, 1 nm to 10 μm, preferably 2 to 1000 nm, more preferably 3 to 100 nm, even more preferably 4 to 50 nm, even more preferably 5 to 30 nm, and even more preferably 6 to 20 nm. The channel length of the oxide semiconductor 15 is the length of the oxide semiconductor 15 along the thickness direction (up and down direction in Figures 1 and 2) of the laminate in which the third insulating film 14a, the third electrode 13, and the fourth insulating film 14b are stacked in this order, and may coincide with the distance between the first electrode 11 and the second electrode 12. If the oxide semiconductor 15 is columnar, the channel length of the oxide semiconductor 15 corresponds to the height of the columnar structure. The channel length of the oxide semiconductor 15 can be measured by processing the relevant area with a focused ion beam (FIB) to expose it and observing the cross-section with a transmission electron microscope (TEM).

[0019] The channel width of the oxide semiconductor 15 is, for example, 1 nm to 1000 nm, preferably 2 nm to 500 nm. The channel width of the oxide semiconductor 15 is the length of the oxide semiconductor 15 along the direction perpendicular to the thickness direction (for example, the left-right direction in Figure 2) of the laminate in which the third insulating film 14a, the third electrode 13, and the fourth insulating film 14b are stacked in this order. As shown in Figures 1 and 2, if the channel width of the oxide semiconductor 15 is not constant with respect to the channel length direction, the channel width of the oxide semiconductor 15 may be the average width along the channel length direction. The average width along the channel length direction is the average value obtained when the channel width is measured at 10 or more locations along the channel length direction. If the oxide semiconductor 15 is columnar, the channel width of the oxide semiconductor 15 corresponds to the width of the columnar structure. Furthermore, if the channel width of the oxide semiconductor 15 differs depending on the observation direction (for example, if the channel width differs when observed from a direction perpendicular to the plane of the paper in Figure 2 and when observed from the left or right direction in Figure 2), the channel width when observed from at least one direction may be within the above range. The channel width of the oxide semiconductor 15 can be measured in the same manner as the channel length.

[0020] In transistor 10, the first electrode 11 can function as a source electrode, and the second electrode 12 can function as a drain electrode. In other examples, the first electrode 11 can function as a drain electrode, and the second electrode 12 can function as a source electrode. The third electrode 13 can function as a gate electrode. The oxide semiconductor 15 can function as a channel (current path) of transistor 10. For example, when a gate voltage is applied to the third electrode 13, which is the gate electrode, the first electrode 11 and the second electrode 12 are electrically connected by the oxide semiconductor 15, and transistor 10 is in the ON state. When no gate voltage is applied, the electrical connection between the first electrode 11 and the second electrode 12 by the oxide semiconductor 15 is released, and transistor 10 is in the OFF state.

[0021] Furthermore, in this specification, "electrically connected" includes cases where a connection is made via "something that has some kind of electrical function." Here, "something that has some kind of electrical function" is not particularly limited as long as it enables the exchange of electrical signals between the connected objects.

[0022] In the transistor 10, the oxide semiconductor 15 is provided to connect the first electrode 11 and the second electrode 12. "Provided to connect the first electrode 11 and the second electrode 12" means that it is provided in a state in which the first electrode 11 and the second electrode 12 can be electrically connected. Therefore, the oxide semiconductor 15 does not need to be in physical contact with the first electrode 11 and the second electrode 12; for example, a conductive material may be provided between the oxide semiconductor 15 and the first electrode 11 and / or the second electrode 12.

[0023] As described above, one feature of this embodiment is that the oxygen concentration per unit volume of the first insulating film 161 and the oxygen concentration per unit volume of the second insulating film 162 are different from each other. Therefore, a gradient in oxygen density exists at the interface between the first insulating film 161 and the second insulating film 162. This causes oxygen to move at the interface, and an interfacial dipole is formed. The electric field generated by this interfacial dipole causes the energy level of the third electrode 13 (gate electrode) to shift from its original level, and the threshold voltage also shifts. This allows the threshold voltage of the transistor 10 to be controlled. By making the oxygen concentration per unit volume of the first insulating film 161 higher than the oxygen concentration per unit volume of the second insulating film 162, the threshold voltage is shifted positively. Conversely, by making the oxygen concentration per unit volume of the first insulating film 161 lower than the oxygen concentration per unit volume of the second insulating film 162, the threshold voltage can also be shifted negatively. Furthermore, by setting the difference between the oxygen concentration per unit volume of the first insulating film 161 and the oxygen concentration per unit volume of the second insulating film 162 to be large (for example, by selecting the materials for the first insulating film 161 and the second insulating film 162 to be large), the amount of the threshold voltage shift in the positive or negative direction can also be increased. The oxygen concentration of the insulating film can be measured by secondary ion mass spectrometry (SIMS). Alternatively, the oxygen concentrations of the first insulating film 161 and the second insulating film 162 may be estimated by measuring the composition ratio of the materials constituting the first insulating film 161 and the second insulating film 162 and referring to literature values ​​for the oxygen concentration of materials having that composition ratio.

[0024] In one embodiment, the thicknesses of the first insulating film 161 and the second insulating film 162 are, for example, 0.1 to 200 nm, preferably 0.2 to 50 nm, more preferably 0.3 to 20 nm, even more preferably 0.5 to 10 nm, even more preferably 1.0 to 9.0 nm, still even more preferably 1.2 to 8.5 nm, and particularly preferably 2.0 to 8.0 nm, respectively. By setting the thicknesses of the first insulating film 161 and the second insulating film 162 within the above ranges, parasitic components are reduced and dielectric breakdown becomes less likely. The total thickness of the first insulating film 161 and the second insulating film 162 is, for example, 0.1 to 400 nm, preferably 0.4 to 100 nm, more preferably 0.6 to 40 nm, and even more preferably 1.0 to 15 nm. The thicknesses of the first insulating film 161 and the second insulating film 162 can be measured in the same manner as the channel length of the oxide semiconductor 15.

[0025] The oxide semiconductor used as the oxide semiconductor 15 can be any oxide capable of functioning as a semiconductor. Specifically, metal oxides can be used. Examples of metals included in metal oxides include In, Ga, Zn, Al, and Sn. Specific examples of metal oxides include indium oxide (IO), indium gallium oxide (IGO), indium gallium zinc oxide (IGZO), indium gallium aluminum oxide (IGAO), indium gallium tin zinc oxide (IGTZO), and indium tin zinc oxide (ITZO).

[0026] Examples of oxide semiconductors include crystalline oxide semiconductors and amorphous oxide semiconductors, but crystalline oxide semiconductors are particularly preferred. Compared to amorphous semiconductors, crystalline oxide semiconductors have a lower density of states within the band gap, so the threshold voltage can be effectively controlled by the electric field generated by the interface dipole. In one embodiment, the crystalline oxide semiconductor contains indium atoms (In). In one embodiment, the ratio of indium atoms to the total metal atoms contained in the crystalline oxide semiconductor is 80 atomic% or more, 90 atomic% or more, or 95 atomic% or more. The content (atomic ratio) of each metal element in the crystalline oxide semiconductor 15 can be analyzed by TEM-EDS (Energy Dispersive X-ray Spectroscopy) measurement using an electron microscope.

[0027] In one embodiment, the crystalline oxide semiconductor contains indium oxide as its main component. "Containing indium oxide as its main component" means that more than 50% by mass of the material constituting the crystalline oxide semiconductor is indium oxide.

[0028] In one embodiment, the crystalline oxide semiconductor comprises indium oxide (IO), indium gallium oxide (IGO), or indium gallium aluminum oxide (IGAO). In one embodiment, the crystalline oxide semiconductor may contain 55% by mass or more, 60% by mass or more, 70% by mass or more, 80% by mass or more, 90% by mass or more, 95% by mass or more, 97% by mass or more, 98% by mass or more, or 99% by mass, or 100% by mass.

[0029] In one embodiment, the crystalline oxide semiconductor further contains a trivalent metal. The trivalent metal is preferably Ga and Al, with Ga being more preferred. In one embodiment, the crystalline oxide semiconductor further contains Ga or Al, may contain Ga, may contain Al, or may contain both Ga and Al. In one embodiment, the atomic ratio of the trivalent metal to all metal elements contained in the crystalline oxide semiconductor ([trivalent metal] / ([trivalent metal] + [all metal elements other than the trivalent metal]) × 100) may be 0 to 30 at%, 1 to 25 at%, 2 to 22 at%, or 3 to 20 at%. Here, "trivalent metal" may be read as Ga and Al. In one embodiment, the atomic ratio of Ga to all metal elements contained in the crystalline oxide semiconductor ([Ga] / ([Ga] + [all metal elements other than Ga]) × 100) may be 0 to 30 at%, 1 to 25 at%, 2 to 22 at%, or 3 to 20 at%. In one embodiment, the atomic ratio of Al to all metal elements contained in the crystalline oxide semiconductor ([Al] / ([Al] + [all metal elements other than Al]) × 100) may be 0 to 30 at%, 1 to 25 at%, 2 to 22 at%, or 3 to 20 at%.

[0030] In one embodiment, the crystalline oxide semiconductor further includes one or more additive elements selected from B, Si, Sc, Zn, Ce, Y, Zr, Sn, Sm, Hf, Ta, and Yb. In one embodiment, the atomic ratio of the total amount of additive elements to the total amount of metal elements contained in the crystalline oxide semiconductor ([total amount of additive elements] / ([total amount of additive elements] + [total metal elements other than additive elements]) × 100) is 0 to 10 at%, and may be 0.1 to 8 at%, 0.5 to 5 at%, or 1 to 3 at%.

[0031] In one embodiment, the crystalline oxide semiconductor includes a bixbyte crystal structure. The presence or absence of a bixbyte crystal structure can be determined based on the X-ray diffraction pattern in XRD or the electron diffraction spots in electron diffraction. In one embodiment, the crystalline oxide semiconductor has a bixbyte crystal structure. ２ O ３ Includes phase.

[0032] In one embodiment, the oxide semiconductor 15 is a polycrystalline oxide semiconductor or a single-crystal oxide semiconductor. In one embodiment, the oxide semiconductor 15 is a polycrystalline oxide semiconductor. In one embodiment, the oxide semiconductor 15 is a single-crystal oxide semiconductor.

[0033] Here, whether a crystalline oxide semiconductor is a polycrystalline oxide semiconductor or a single-crystal oxide semiconductor can be determined, for example, by electron backscatter diffraction (EBSD). If the crystal orientations measured by EBSD are aligned and no grain boundaries are observed, it can be determined to be a single-crystal oxide semiconductor. Conversely, if grain boundaries are observed, it can be determined to be a polycrystalline oxide semiconductor. When the difference in crystal orientation between two adjacent measurement points exceeds 5°, it can be defined that a grain boundary exists between them.

[0034] Each of the first electrode 11, the second electrode 12, and the third electrode 13 is not particularly limited as long as they are conductors. Examples of conductors include indium tin oxide (ITO), indium zinc oxide (IZO), aluminum zinc oxide (AZO), gallium zinc oxide (GZO), aluminum (Al), silicon (Si), iron (Fe), cobalt (Co), nickel (Ni), copper (Cu), germanium (Ge), molybdenum (Mo), ruthenium (Ru), rhodium (Rh), palladium (Pd), silver (Ag), tantalum (Ta), iridium (Ir), platinum (Pt), tungsten (W), titanium (Ti), titanium nitride (TiN), aluminum nitride (AlN), manganese nitride (MnN), molybdenum nitride (MoN), and nickel nitride (Ni3N).

[0035] The materials for the first insulating film 161 and the second insulating film 162 can be selected from various insulators such that the oxygen concentration per unit volume of the first insulating film 161 and the second insulating film 162 are different. Examples of materials that can be used for the first insulating film 161 and the second insulating film 162 include oxides (especially metal oxides).

[0036] Materials that can be used for the first insulating film 161 and the second insulating film 162 include, in order of increasing oxygen concentration per unit volume, for example, Al ２ O３ , TiO ２ , Hf ０．９ Al ０．１ O ２ , Hf ０．９ Si ０．１ O ２ , ZrO ２ Ga ２ O ３ Ta ２ O ５ , HfO ２ MgO, SiO ２ , CEO ２ , CuO, SrTiO ３ Yb ２ O ３ , Y ２ O ３ Sm ２ O ３ , Nd ２ O ３ , Gd ２ O ３ La ２ O ３ , Hf ０．９ Al ０．１ ON, Hf ０．９ Si ０．１ Examples include ON and SrO. Table 1 shows the oxygen concentration and oxygen surface density per unit volume for these. Note that the oxygen surface density is calculated by raising the oxygen density to the power of 2 / 3.

[0037]

[0038] From the viewpoint of shifting the threshold voltage to a positive value, when comparing the oxygen concentration per unit volume of the first insulating film 161 and the second insulating film 162, it is preferable that the oxygen concentration of the first insulating film 161 is greater than the oxygen concentration of the second insulating film 162. The ratio of the oxygen concentration per unit volume of the first insulating film 161 to the oxygen concentration per unit volume of the second insulating film 162 (oxygen concentration per unit volume of the first insulating film 161 / oxygen concentration per unit volume of the second insulating film 162) is preferably 1.1 or more and 10 or less, more preferably 1.2 or more and 5.0 or less, and even more preferably 1.5 or more and 3.0 or less. Among these, oxides and oxynitrides of Hf, Zr, or Ta are preferably used because they have a high dielectric constant.

[0039] Furthermore, from the viewpoint of shifting the threshold voltage to the negative, when comparing the oxygen concentration per unit volume of the first insulating film 161 and the second insulating film 162, it is preferable that the oxygen concentration of the first insulating film 161 is smaller than the oxygen concentration of the second insulating film 162. The ratio of the oxygen concentration per unit volume of the first insulating film 161 to the oxygen concentration per unit volume of the second insulating film 162 (oxygen concentration per unit volume of the first insulating film 161 / oxygen concentration per unit volume of the second insulating film 162) is preferably 0.10 or more and 0.95 or less, more preferably 0.20 or more and 0.90 or less, and even more preferably 0.50 or more and 0.80 or less. Among these, oxides and oxynitrides of Hf, Zr, or Ta are preferably used because they have a high dielectric constant.

[0040] The third insulating film 14 and the fourth insulating film 14b are not particularly limited as long as they contain an insulator or are films made of an insulator. Examples of insulators include aluminum oxide, magnesium oxide, silicon oxide, silicon oxide nitride, silicon oxide nitride, silicon nitride, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide. The third insulating film 14 and the fourth insulating film 14b may also be laminated films of the above materials. The insulating films may also contain La, N, Zr, etc. The insulators contained in the third insulating film 14 and the fourth insulating film 14b may be the same or different.

[0041] An example of a manufacturing method for the transistor 10 according to this embodiment is described below, but the manufacturing method is not limited to this example.

[0042] Figure 3 illustrates an example of a method for manufacturing the transistor 10 according to this embodiment. Figure 3(a) shows the oxide semiconductor 15, the second electrode 12, and the insulating film 19 supporting the second electrode 12 as shown in Figures 1 and 2. Although not shown in Figure 3(a), the second electrode 12 and the insulating film 19 may be formed on another substrate. The second electrode 12 may also be connected to an element outside the transistor according to this embodiment. The insulating film 19 and the second electrode 12 can be formed by known methods.

[0043] Next, as shown in Figure 3(b), the fourth insulating film 14b, the third electrode 13, and the third insulating film 14a are formed in this order. At this time, as will be described later, the third electrode 13 may be formed to be connected to the word line. Alternatively, the third electrode 13 itself may be used as the word line.

[0044] The fourth insulating film 14b is formed by depositing a film containing the above-mentioned insulator using various methods such as chemical vapor deposition (CVD), plasma CVD (PECVD), physical vapor deposition (PVD), atomic layer deposition (ALD), pulsed laser deposition (PLD), sol-gel method, and coating method.

[0045] The third electrode 13 is formed by depositing a conductive material such as tungsten, as described above. The third electrode 13 may be patterned into any shape. The pattern of the third electrode 13 may be formed during film deposition, or it may be formed by etching after film deposition.

[0046] The third insulating film 14a is formed by depositing a film containing the above-mentioned insulator using various methods such as chemical vapor deposition (CVD), plasma CVD (PECVD), physical vapor deposition (PVD), atomic layer deposition (ALD), pulsed laser deposition (PLD), sol-gel method, and coating method.

[0047] Next, as shown in Figure 3(c), through-holes H are formed by etching, penetrating the third insulating film 14a, the third electrode 13, and the fourth insulating film 14b. Various etching methods, such as dry etching and wet etching, may be used to form the through-holes H. Alternatively, a resist may be deposited on the third insulating film 14a before etching to define the region where the through-holes H will be formed.

[0048] Next, as shown in Figure 3(d), the first insulating film 161 and the second insulating film 162 containing the above-described insulator are formed in this order by various methods such as chemical vapor deposition (CVD), plasma CVD (PECVD), physical vapor deposition (PVD), atomic layer deposition (ALD), pulsed laser deposition (PLD), sol-gel method, and coating method. When forming the first insulating film 161 and / or the second insulating film 162 by PVD with sputtering, it is preferable to form the film under conditions where the oxygen partial pressure is 1 to 50%, thereby suppressing reduction and allowing the oxygen concentration (or oxygen surface density) of the first insulating film 161 and / or the second insulating film 162 to be controlled to a desired value.

[0049] Next, as shown in Figure 3(e), an oxide semiconductor 15 is formed in the through-hole H where the first insulating film 161 and the second insulating film 162 are formed. Methods for forming the oxide semiconductor 15 include chemical vapor deposition (CVD), plasma CVD (PECVD), physical vapor deposition (PVD), atomic layer deposition (ALD), pulsed laser deposition (PLD), sol-gel method, and coating method. Note that CVD methods include metal-organic CVD (MO-CVD), inductively coupled plasma CVD (ICP-CVD), and mist CVD. PVD methods include DC sputtering, AC sputtering, RF sputtering, ICP sputtering, reactive sputtering, and ion plating.

[0050] However, the oxide semiconductor 15 formed in the process shown in Figure 3(e) may be amorphous or crystalline. If an amorphous oxide semiconductor is formed in Figure 3(e), the oxide semiconductor will be crystallized in one of the subsequent processes. The crystalline oxide semiconductor 15 may be formed by performing post-annealing, as described later, after forming the amorphous oxide semiconductor. The crystalline oxide semiconductor 15 may be formed by performing post-annealing after the formation of the amorphous oxide semiconductor, or post-annealing may be performed after the oxide semiconductor has crystallized and the crystalline oxide semiconductor 15 has been formed. Alternatively, the crystalline oxide semiconductor 15 may be formed without post-annealing, or post-annealing may be performed after the crystalline oxide semiconductor 15 has been formed to adjust the crystallinity of the crystalline oxide semiconductor 15.

[0051] It is preferable to perform post-annealing on the oxide semiconductor 15 formed in the process shown in Figure 3(e). Post-annealing can be performed after the deposition of the oxide semiconductor film, for example, after or before the formation of the first electrode 11 in the subsequent step. The state of the oxide semiconductor before post-annealing may be amorphous or crystalline. The annealing atmosphere may contain nitrogen or oxygen and may be under vacuum or air. The annealing temperature is preferably 250°C to 600°C, more preferably 300°C to 500°C, and even more preferably 350°C to 450°C. The annealing time is 5 minutes to 2 hours, preferably 30 minutes to 1 hour.

[0052] Next, as shown in Figure 3(f), a first electrode 11 is formed on the upper layer of the oxide semiconductor 15. The first electrode 11 may be patterned into any shape. The first electrode 11 may have a pattern formed during film deposition, or it may have a pattern formed by etching after film deposition.

[0053] As described above, a transistor 10 as shown in Figures 1 and 2 can be obtained.

[0054] In the first embodiment, the case in which the first insulating film 161 completely surrounds the side surface of the columnar oxide semiconductor 15 is shown, but the invention is not necessarily limited to this, and for example, the first insulating film 161 may surround at least a part of the columnar oxide semiconductor 15. Also, in the second embodiment, the case in which the second insulating film 162 completely surrounds the side surface of the first insulating film 161 is shown, but the invention is not necessarily limited to this, and the second insulating film 162 may surround at least a part of the first insulating film 161.

[0055] In the manufacturing method described above, the crystalline oxide semiconductor 15 is formed in the through-hole H where the first insulating film 161 and the second insulating film 162 are formed. Therefore, atomic layer deposition (ALD) is preferred as the method for forming the crystalline oxide semiconductor 15. Atomic layer deposition (ALD) is a thin film formation method in which a process of alternately exposing a raw material (sometimes called a precursor) containing a metal element constituting the film to be deposited (here, the crystalline oxide semiconductor 15) and an oxidizing agent to the substrate surface constitutes one cycle, forming one atomic layer in one cycle, and repeating this cycle until the desired film thickness is achieved. Therefore, by using ALD, a dense crystalline oxide semiconductor 15 can be formed even in the region near the second electrode 12, which is far from the opening, in the through-hole H where the first insulating film 161 and the second insulating film 162 are formed.

[0056] A single atomic layer deposition cycle of ALD may include the following four steps: (1) The precursor, which is the raw material, is vaporized in a container and introduced into the chamber. A predetermined system pressure is applied and the precursor is reacted with the OH groups on the substrate surface or film surface for a predetermined time to adsorb single molecules. If the vapor pressure of the precursor is low, the container containing the precursor may be heated to promote vaporization, and if the vapor pressure of the precursor is high, the container containing the precursor may be cooled to suppress vaporization and adjust the process. (2) Unreacted raw materials and by-product gases are removed from the chamber by purging with an inert gas, and one atomic layer is deposited. (3) A reactive gas is introduced into the chamber, and the metal of the precursor is oxidized using heat, plasma, etc. (4) Unreacted oxidizing agents and by-product gases are removed by purging with an inert gas. After step (4), the process returns to step (1), and steps (1) to (4) may be repeated until the desired film thickness is achieved.

[0057] When performing ALD, various ALD devices can be used. Specifically, examples include devices that can supply a precursor by bubbling, and devices that have a vaporization chamber. Also, devices that can perform plasma treatment on the reactive gas (oxidizer) can be used. Furthermore, not only single-wafer devices equipped with a film deposition chamber, but also devices that can process multiple sheets simultaneously using a batch furnace may be used.

[0058] Examples of ALD precursors include organometallic (e.g., AlMe) ３ ), metal hydrides (e.g., AshH ３ ), metal alkoxides (for example, Ti(OCHMe ２ ) ４ ), metal amides (for example, Ti (NME ２ ) ４ ), β-diketonate (for example, Co(acac) ２ ), metallocene (for example, MgCp ２ Examples include metal amidinates, etc. Various metal compounds are commercially available for use as ALD precursors, and one should select a precursor and oxidizing agent that can form the desired film.

[0059] Examples of precursors include compounds of silicon or metals, which consist of one or more compounds selected from the group consisting of compounds used as organic ligands, such as alkyl compounds, alcohol compounds, glycol compounds, β-diketone compounds, cyclopentadiene compounds, and organic amine compounds.

[0060] Examples of precursor metal species include lithium, sodium, potassium, magnesium, calcium, strontium, barium, titanium, zirconium, hafnium, vanadium, niobium, tantalum, chromium, molybdenum, tungsten, manganese, iron, ruthenium, cobalt, rhodium, iridium, nickel, palladium, platinum, copper, silver, gold, zinc, boron, aluminum, silicon, indium, gallium, germanium, tin, lead, antimony, bismuth, scandium, ruthenium, yttrium, lanthanum, cerium, praseodymium, neodymium, promethium, samarium, europium, gadolinium, terbium, dysprosium, holmium, erbium, thulium, ytterbium, and lutetium.

[0061] If the oxide semiconductor 15 contains indium atoms (In), an In-containing precursor may be used. If the oxide semiconductor 15 contains other metals, a precursor containing those metals may be used. When forming an oxide semiconductor using two or more metals, there are two methods: vaporizing and supplying each component independently (sometimes referred to as the "single-source method") and vaporizing and supplying a mixed raw material in which multi-component raw materials are pre-mixed to a desired composition (sometimes referred to as the "cocktail-source method"). In the single-source method, it is preferable that each precursor used has similar thermal and / or oxidative decomposition behavior. In the cocktail-source method, it is preferable that each precursor has similar thermal and / or oxidative decomposition behavior and does not undergo alteration due to chemical reactions during mixing.

[0062] The following are examples of compounds that can be used as organic ligands for precursors. Furthermore, depending on the valency of the central metal, multiple ligands from the following list may coordinate. In a precursor, when multiple ligands coordinate to the central metal, these ligands may be identical to each other, or two or more ligands may be combined.

[0063] Alkyl compounds used as organic ligands for precursors include methyl, ethyl, propyl, isopropyl, butyl, 2-butyl, isobutyl, 3-butyl, pentyl, isopentyl, and 3-pentyl.

[0064] Alcohol compounds used as organic ligands for precursors include alkyl alcohols such as methanol, ethanol, propanol, isopropyl alcohol, butanol, 2-butyl alcohol, isobutyl alcohol, 3-butyl alcohol, pentyl alcohol, isopentyl alcohol, and 3-pentyl alcohol; 2-methoxyethanol, 2-ethoxyethanol, 2-butoxyethanol, 2-(2-methoxyethoxy)ethanol, 2-methoxy-1-methylethanol, 2-methoxy-1,1-dimethylethanol, 2-ethoxy-1,1-dimethylethanol, 2-isopropoxy-1,1-dimethylethanol, and 2-butoxy Examples include ether alcohols such as -1,1-dimethylethanol, 2-(2-methoxyethoxy)-1,1-dimethylethanol, 2-propoxy-1,1-diethylethanol, 2-s-butoxy-1,1-diethylethanol, and 3-methoxy-1,1-dimethylpropanol; and dialkylamino alcohols such as dimethylaminoethanol, ethylmethylaminoethanol, diethylaminoethanol, dimethylamino-2-pentanol, ethylmethylamino-2-pentanol, dimethylamino-2-methyl-2-pentanol, ethylmethylamino-2-methyl-2-pentanol, and diethylamino-2-methyl-2-pentanol.

[0065] Examples of glycol compounds used as organic ligands for precursors include 1,2-ethanediol, 1,2-propanediol, 1,3-propanediol, 2,4-hexanediol, 2,2-dimethyl-1,3-propanediol, 2,2-diethyl-1,3-propanediol, 1,3-butanediol, 2,4-butanediol, 2,2-diethyl-1,3-butanediol, 2-ethyl-2-butyl-1,3-propanediol, 2,4-pentanediol, 2-methyl-1,3-propanediol, 2-methyl-2,4-pentanediol, 2,4-hexanediol, and 2,4-dimethyl-2,4-pentanediol.

[0066] Examples of β-diketone compounds used as organic ligands for precursors include acetylacetone, hexane-2,4-dione, 5-methylhexane-2,4-dione, heptane-2,4-dione, 2-methylheptane-3,5-dione, 5-methylheptane-2,4-dione, 6-methylheptane-2,4-dione, 2,2-dimethylheptane-3,5-dione, 2,6-dimethylheptane-3,5-dione, 2,2,6-trimethylheptane-3,5-dione, 2,2,6,6-tetramethylheptane-3,5-dione, octane-2,4-dione, 2,2,6-trimethyloctane-3,5-dione, 2,6-dimethyloctane-3,5-dione, 2,9-dimethylnonane-4,6-dione, and 2-methyl-6-ethyl Examples include alkyl-substituted β-diketones such as decane-3,5-dione and 2,2-dimethyl-6-ethyldecane-3,5-dione; fluorine-substituted alkyl β-diketones such as 1,1,1-trifluoropentane-2,4-dione, 1,1,1-trifluoro-5,5-dimethylhexane-2,4-dione, 1,1,1,5,5,5-hexafluoropentane-2,4-dione, and 1,3-diperfluorohexylpropane-1,3-dione; and ether-substituted β-diketones such as 1,1,5,5-tetramethyl-1-methoxyhexane-2,4-dione, 2,2,6,6-tetramethyl-1-methoxyheptane-3,5-dione, and 2,2,6,6-tetramethyl-1-(2-methoxyethoxy)heptane-3,5-dione.

[0067] Examples of cyclopentadiene compounds used as organic ligands for precursors include cyclopentadiene, methylcyclopentadiene, ethylcyclopentadiene, propylcyclopentadiene, isopropylcyclopentadiene, butylcyclopentadiene, 2-butylcyclopentadiene, isobutylcyclopentadiene, 3-butylcyclopentadiene, dimethylcyclopentadiene, and tetramethylcyclopentadiene.

[0068] Examples of organic amine compounds used as organic ligands for precursors include methylamine, ethylamine, propylamine, isopropylamine, butylamine, 2-butylamine, 3-butylamine, isobutylamine, dimethylamine, diethylamine, dipropylamine, diisopropylamine, ethylmethylamine, propylmethylamine, and isopropylmethylamine.

[0069] In addition, metal halogen compounds (e.g., InCl ３ InBr ３ InF ３ (etc.) may be used as precursors. When multiple halogens coordinate to a metal, these halogens may be identical to each other, or two or more halogens may be combined. In addition, some of the halogens may be replaced with hydrogen.

[0070] Examples of indium-containing precursors include InCl ３ , TMIn (trimethyl indium), TEIn (triethyl indium), InCp (cyclopentadienyl indium (I)), InEtCp (ethylcyclopentadienyl indium(I)), In(acac) ３ (indium acetylacetonate), In(tmhd) ３ (indium 2,2,6,6-tetramethyl-3,5-heptanedionate), In[( ｉ PrN) ２ CNR ２ ] ３(R = Me)(indium-tris-guanidinates), Et ２ InN(TMS) ２ (diethyl[bis-(trimethylsilyl)amido]indium), INCA(diethyl[1,1,1-trimethyl-N-(trimethylsilyl)silanaminato]indium), DADI([3-(dimethylamino)propyl]dimethyl indium), In(dmap) ３ ((1-dimethylamino-2-methyl-2-propoxy)indium), Me ２ In(EDPA)(dimethyl(N-ethoxy-2,2-dimethylpropanamido)indium), tris(N,N'-diisopropylacetamidinato)indium(III), etc. may be mentioned.

[0071] These ALD precursors may be used alone or in combination of two or more.

[0072] The above-mentioned precursors can be produced according to known production methods. For example, when an alcohol compound is used as an organic ligand, the precursor can be produced by reacting the metal inorganic salt or its hydrate described above with the alkali metal alkoxide of the alcohol compound. Here, examples of the metal inorganic salt or its hydrate include metal halides, nitrates, etc. Examples of the alkali metal alkoxide include sodium alkoxide, lithium alkoxide, potassium alkoxide, etc.

[0073] As the oxidizing agent used in ALD, H ２ O, O ２ 、O ３ 、O ２ plasma, H ２ O plasma, hydrogen peroxide (H ２ O ２ ) etc. may be mentioned. These oxidizing agents may be used alone or in combination of two or more.

[0074] When using two or more oxidizing agents, they may be used simultaneously, or they may be used individually while changing between them. For example, as an oxidizing agent, O ２ Plasma and H ２ By using two types of O plasma, ２ High mobility obtained when using plasma, and H ２ By using O plasma, it is possible to take advantage of both the reduction in carbon concentration and the improved stability of mobility during heat treatment. By using two or more oxidizing agents, high mobility and low carbon concentration can be adjusted. Depending on the desired effect, O ２ Plasma and H ２ The proportion of O-plasma used, the order of use, the number of cycles, etc., should be selected as appropriate.

[0075] The pressure in the system (inside the film deposition chamber) in step (1) can be set appropriately according to the type of precursor, substrate temperature, etc. For example, 1 to 10,000 Pa is preferred, 10 to 1,000 Pa is more preferred, 50 to 500 Pa is even more preferred, and 80 to 120 Pa is particularly preferred.

[0076] In one embodiment, in the film formation process, H is used as the oxidizing agent. ２ O plasma is used. In one embodiment, in the film formation process, O is used as the oxidizing agent. ２ Plasma is used. In one embodiment, in the film deposition process, O is used as the oxidizing agent. ３ These oxidizing agents are used. By using these oxidizing agents, it is possible to control the electrical properties of the oxide semiconductor film to a favorable state.

[0077] To vaporize the precursor, the container containing the precursor may be heated to a temperature at which the precursor is sufficiently vaporized, as needed. If a precursor with a high vapor pressure is used, the container containing the precursor may be cooled as needed. In one embodiment, the container containing the indium-containing precursor (e.g., triethylindium) is heated to a temperature in the range of 25 to 150°C. The above temperature is preferably in the range of 50 to 150°C, and more preferably in the range of 75 to 125°C.

[0078] In the manufacturing method described above, the substrate temperature during film formation is usually in the range of 50 to 600°C, preferably 85 to 500°C, more preferably 80 to 350°C, and even more preferably 100 to 250°C.

[0079] Furthermore, the amount of oxide semiconductor film grown per ALD process cycle varies depending on the type of precursor and reactive gas used during film formation, as well as the substrate temperature during film formation.

[0080] The growth rate per ALD process cycle is called Growth per Cycle (GPC), and can be calculated, for example, by measuring the film thickness of the oxide semiconductor after repeating 30 ALD cycles. Here, GPC changes depending on the combination of precursor, oxidizer, and substrate temperature, and also changes depending on the type of substrate. Therefore, the number of cycles can be set appropriately by taking these factors into consideration, as it depends on numerous factors such as the type and combination of precursor and oxidizer used, the type of substrate, the substrate temperature during film formation, and the desired film thickness.

[0081] Also, as an oxidizing agent, O ３ When using, the substrate temperature during film formation is preferably above 100°C, more preferably 110-250°C, 120-230°C, or 130-220°C. H is used as the oxidizing agent. ２ O plasma and O ２ When using plasma, the substrate temperature during film deposition is preferably 100 to 150°C.

[0082] Examples of inert gases used to purge unreacted raw materials and unreacted oxidizing agents include argon and nitrogen, and in the method of this embodiment, argon or nitrogen is preferred.

[0083] In step (3) above, it is preferable to generate a plasma of the reactive gas (oxidizer).

[0084] (Second Embodiment) Next, another example of the transistor according to this embodiment (second embodiment) will be described with reference to Figures 4 and 5. Figure 4 is a schematic perspective view showing a cross-section of the transistor according to the second embodiment. Figure 5 is a schematic cross-sectional view of the transistor. In Figures 4 and 5, the same reference numerals as in Figures 1 and 2 indicate the same components, and unless otherwise specified, the descriptions given for Figures 1 and 2 will be incorporated by reference.

[0085] In the second embodiment, the transistor 10 includes a first electrode 11, a second electrode 12, a third electrode 13, an oxide semiconductor 15, a first insulating film 161, a second insulating film 162, and a third insulating film 14. At least a portion of the third electrode 13 is located between the first electrode 11 and the second electrode 12. At least a portion of the third electrode 13 may be located on the opposite side of the first electrode 11 from the second electrode 12, or on the opposite side of the second electrode 12 from the first electrode 11. The third insulating film 14 is located between the first electrode 11 and the second electrode 12. Here, the first electrode 11 and the second electrode 12 are stacked with the third insulating film 14 in between. As a result, the first electrode 11 and the second electrode 12 are electrically insulated by the third insulating film 14. The third electrode 13 is provided adjacent to the oxide semiconductor 15 without contacting it. Specifically, the third electrode 13 is adjacent to the oxide semiconductor 15 via the second insulating film 162 and the first insulating film 161. The second insulating film 162 and the first insulating film 161 may be provided between the third electrode 13 and the oxide semiconductor 15 to insulate the third electrode 13 from the oxide semiconductor 15. The oxide semiconductor 15, the first insulating film 161, the second insulating film 162, and the third electrode 13 are arranged in this order. That is, the first insulating film 161 and the second insulating film 162 are stacked such that the first insulating film 161 is located on the oxide semiconductor 15 side. The second insulating film 162 is stacked on the surface of the first insulating film 161 opposite to the surface in contact with the oxide semiconductor 15.

[0086] The oxide semiconductor 15 penetrates at least the third insulating film 14 and is provided to connect the first electrode 11 and the second electrode 12. Here, the oxide semiconductor 15 is provided in a columnar shape, penetrating the first electrode 11 and the third insulating film 14 in that order. A recess is formed in the columnar oxide semiconductor 15 from one end (upper side in Figures 4 and 5) to the other end (lower side in Figures 4 and 5), and the first insulating film 161 and the second insulating film 162 are laminated in that order on the inner circumferential surface and bottom surface of the recess. The third electrode 13 is provided to fill the recess in which the first insulating film 161 and the second insulating film 162 are formed. From one perspective, it can also be said that the oxide semiconductor 15 has a cylindrical portion that penetrates the third insulating film 14, the first insulating film 161 has a cylindrical portion provided on the inner wall of the cylindrical portion of the oxide semiconductor 15, the second insulating film 162 has a cylindrical portion provided on the inner wall of the cylindrical portion of the first insulating film 161, and the third electrode 13 has a portion provided inside the cylindrical portion of the second insulating film 162.

[0087] In the second embodiment as well, the oxygen concentration per unit volume of the first insulating film 161 and the oxygen concentration per unit volume of the second insulating film 162 are different from each other. Therefore, as described in the first embodiment, the threshold voltage of the transistor 10 can be controlled.

[0088] The dimensions of the transistor 10 may be designed as appropriate depending on its application. The channel length of the oxide semiconductor 15 is, for example, 1 nm to 10 μm, preferably 2 nm to 1000 nm. The channel length of the oxide semiconductor 15 is the length of the oxide semiconductor 15 along the thickness direction (vertical direction in Figures 4 and 5) of the laminate in which the first electrode 11, the third insulating film 14, and the second electrode 12 are stacked in this order, and may coincide with the depth of the recess in the oxide semiconductor 15.

[0089] The thickness of the oxide semiconductor 15 is, for example, 1 nm to 500 nm, preferably 1 nm to 100 nm. The thickness of the oxide semiconductor 15 may be the average thickness along the channel length. The average thickness along the channel length is the average value obtained when the thickness is measured at 10 or more locations along the channel length.

[0090] The thicknesses of the first insulating film 161 and the second insulating film 162 are, independently of each other, for example, 0.1 to 200 nm, preferably 0.2 to 50 nm, more preferably 0.3 to 20 nm, even more preferably 0.5 to 10 nm, even more preferably 1.0 to 9.0 nm, still even more preferably 1.2 to 8.5 nm, and particularly preferably 2.0 to 8.0 nm. By setting the thicknesses of the first insulating film 161 and the second insulating film 162 within the above ranges, parasitic components are reduced and dielectric breakdown becomes less likely. The total thickness of the first insulating film 161 and the second insulating film 162 is, for example, 0.1 to 400 nm, preferably 0.4 to 100 nm, more preferably 0.6 to 40 nm, and even more preferably 1.0 to 15 nm. The channel length and thickness of the oxide semiconductor 15, as well as the thicknesses of the first insulating film 161 and the second insulating film 162, can be measured by the same method as in the first embodiment.

[0091] The first electrode 11, the second electrode 12, the third electrode 13, the first insulating film 161, the second insulating film 162, the third insulating film 14, and the oxide semiconductor 15 may be described by reference to the first embodiment.

[0092] The method for manufacturing the transistor 10 according to the second embodiment is not particularly limited, and can be manufactured by known methods, with reference to the manufacturing method according to the first embodiment, except for the formation of the first insulating film 161 and the second insulating film 162. For example, the transistor 10 according to the second embodiment may be manufactured as follows: After forming a laminate of the second electrode 12, the third insulating film 14, and the first electrode 11, through holes are formed so as to penetrate the first electrode 11 and the third insulating film 14. After forming the oxide semiconductor 15, the first insulating film 161, the second insulating film 162, and the third electrode 13 are formed. Each of the first insulating film 161 and the second insulating film 162 can be manufactured by known methods. The methods for forming the first electrode 11, the second electrode 12, the third electrode 13, the first insulating film 161, the second insulating film 162, the third insulating film 14, and the oxide semiconductor 15 may be based on the description in the first embodiment.

[0093] Next, another example of the transistor according to this embodiment (a third embodiment) will be described with reference to Figures 6 and 7. Figure 6 is a schematic perspective view showing a cross-section of the transistor according to the third embodiment. Figure 7 is a schematic cross-sectional view of the same transistor. In Figures 6 and 7, the same reference numerals as in Figures 1 and 2 indicate the same components, and unless otherwise specified, the descriptions given for Figures 1 and 2 will be incorporated by reference.

[0094] In this third embodiment, the transistor 10 comprises a first electrode 11, a second electrode 12, a third electrode 13, oxide semiconductors 15, 15', a first insulating film 161, 161', and a second insulating film 162. The third electrode 13 is located between the first electrode 11 and the second electrode 12. The first insulating films 161, 161', and the second insulating film 162 are located between the first electrode 11 and the third electrode 13. Here, the first electrode 11 and the second electrode 12 are stacked via the first insulating films 161, 161', and the second insulating film 162. As a result, the first electrode 11 and the second electrode 12 are electrically insulated by the first insulating films 161, 161', and the second insulating film 162. In this sense, it can also be said that the first insulating films 161, 161', and the second insulating film 162 in the third embodiment also serve the roles of the third insulating films 14, 14a and the fourth insulating film 14b in the first and second embodiments. The third electrode 13 is provided so as to be adjacent to the oxide semiconductors 15 and 15' without contacting them. Specifically, the third electrode 13 is adjacent to the oxide semiconductors 15 and 15' via the first insulating film 161, 161' and the second insulating film 162, which are located between the third electrode 13 and the oxide semiconductors 15 and 15'. Specifically, the oxide semiconductor 15, the first insulating film 161, the second insulating film 162, and the third electrode 13 are arranged in this order. Also, the oxide semiconductor 15', the first insulating film 161', the second insulating film 162, and the third electrode 13 are arranged in this order.

[0095] The oxide semiconductors 15 and 15' connect the first electrode 11 and the second electrode 12, respectively.

[0096] In the third embodiment as well, the oxygen concentration per unit volume of the first insulating film 161 and the oxygen concentration per unit volume of the second insulating film 162 are different from each other. Therefore, as described in the first embodiment, the threshold voltage of the transistor 10 can be controlled.

[0097] The dimensions of the transistor 10 may be designed as appropriate depending on its application. The channel lengths of the oxide semiconductors 15 and 15' are, for example, 1 nm to 10 μm, preferably 2 nm to 1000 nm. The channel length of the oxide semiconductor 15 is the length of the oxide semiconductors 15 and 15' along the thickness direction (up and down direction in Figures 6 and 7) of the laminate in which the first electrode 11, the third insulating film 14, and the second electrode 12 are stacked in this order, and may coincide with the distance between the first electrode 11 and the second electrode 12.

[0098] The thickness of the oxide semiconductors 15 and 15' is, for example, 1 nm to 500 nm, preferably 1 nm to 100 nm. The thickness of the oxide semiconductor 15 may be the average thickness along the channel length. The average thickness along the channel length is the average value obtained when the thickness is measured at 10 or more locations along the channel length.

[0099] The thicknesses of the first insulating film 161 and the second insulating film 162 are, independently of each other, for example, 0.1 to 200 nm, preferably 0.2 to 50 nm, more preferably 0.3 to 20 nm, even more preferably 0.5 to 10 nm, even more preferably 1.0 to 9.0 nm, still even more preferably 1.2 to 8.5 nm, and particularly preferably 2.0 to 8.0 nm. By setting the thicknesses of the first insulating film 161 and the second insulating film 162 within the above ranges, parasitic components are reduced and dielectric breakdown becomes less likely. The total thickness of the first insulating film 161 and the second insulating film 162 is, for example, 0.1 to 400 nm, preferably 0.4 to 100 nm, more preferably 0.6 to 40 nm, and even more preferably 1.0 to 15 nm. The channel length and thickness of the oxide semiconductors 15 and 15', and the thicknesses of the first insulating film 161 and the second insulating film 162 can be measured in the same manner as in the first embodiment.

[0100] The descriptions in the first and second embodiments may be applied to the first electrode 11, the second electrode 12, the third electrode 13, the first insulating film 161, the second insulating film 162, the third insulating film 14, and the oxide semiconductor 15.

[0101] The method for manufacturing the transistor 10 according to the third embodiment is not particularly limited, and except for the formation of the first insulating film 161 and the second insulating film 162, it can be manufactured by referring to known methods (for example, the method described in International Publication No. 2020 / 076850, etc.) while referring to the manufacturing method according to the first embodiment. The first insulating film 161 and the second insulating film 162 can each be manufactured by known methods. The methods for forming the first electrode 11, the second electrode 12, the third electrode 13, the first insulating film 161, the second insulating film 162, the third insulating film 14, and the oxide semiconductor 15 can be adapted from the descriptions in the first and second embodiments.

[0102] 2. Semiconductor Devices A semiconductor device according to one aspect of the present invention includes a transistor according to one aspect of the present invention. The semiconductor device may comprise one or more transistors according to one aspect of the present invention. Since the threshold voltage in the transistor can be controlled, the semiconductor device according to this aspect can suitably exhibit characteristics according to the purpose and application, such as suitably realizing normally-off. The type of semiconductor device is not particularly limited, but from the viewpoint of significantly exhibiting the above-mentioned effects, it is preferable to have semiconductor memory devices such as volatile memories such as DRAM (Dynamic Random Access Memory) and SRAM (Static RAM); and non-volatile memories such as mask ROM (Read Only Memory), EPROM (Erasable Programmable ROM), EEPROM (Electrically Erasable Programmable ROM), flash memory (NOR type flash memory, NAND type flash memory), MRAM (Magnetoresistive RAM), FeRAM (Ferroelectric RAM), ReRAM (Resistive RAM), etc. Alternatively, the semiconductor device according to this embodiment may be a logic device such as TTL (Transistor-Transistor Logic), CMOS (Complementary Metal-Oxide-Semiconductor), BiCMOS, PLD (Programmable Logic Device), FPGA (Field Programmable Gate Array), CPU (Central Processing Unit), or MPU (Microprocessor Unit). Furthermore, since the transistor according to one embodiment of the present invention can be fitted with a vertical structure as shown in each embodiment, it is suitable for densely arranging multiple transistors in a semiconductor memory device and contributes to the miniaturization of the semiconductor memory device. In addition, since the transistor according to one embodiment of the present invention uses an oxide semiconductor as the channel, it tends to have a small leakage current. Therefore, by using it in a semiconductor memory device, the capacitance of the capacitor can be reduced or the capacitor can be omitted.As a result, by using a transistor according to one aspect of the present invention, semiconductor memory devices can be miniaturized.

[0103] Figure 8 shows an example of a circuit configuration of a semiconductor memory device equipped with a transistor according to one aspect of the present invention. As shown in Figure 8, the semiconductor memory device 50 includes a transistor 10, a capacitor 51, a word line WL, and a bit line BL. The source electrode of the transistor 10 is connected to the bit line BL. The drain electrode of the transistor 10 is connected to one end of the capacitor 51. The gate electrode of the transistor 10 is connected to the word line WL. The other end of the capacitor 51 is grounded. The bit line BL may be connected to the first electrode 11 of the transistor 10, or to the second electrode 12. The word line WL may be connected to the third electrode 13 of the transistor 10. One end of the capacitor 51 may be connected to the first electrode 11 of the transistor 10, or to the second electrode 12.

[0104] In the example shown in Figure 8, a single memory cell 52 is formed by a transistor 10 and a capacitor 51. The memory cell 52 can store data based on the charge held by the capacitor 51. Note that the configuration of the memory cell 52 is not limited to this example, and in other examples, the capacitor 51 is omitted. When the capacitor 51 is omitted, data can be stored based on the charge held by the transistor 10 itself. Alternatively, two or more transistors may be combined to form the memory cell 52. If the transistor 10 itself is to have the function of holding charge, for example, one or more of the configurations described below can be applied. (1) The first insulating film and / or the second insulating film are filled with hafnium oxide (HfO ２ ), zirconium oxide (ZrO ２ (2) Use an insulator with a high dielectric constant such as (Pb,La)(Zr,Ti)O in the first insulating film and / or the second insulating film. ３ (PLZT), SrTiO ３(STO), yttria-stabilized zirconia (YSZ), and other ferroelectric materials are used. (3) Hysteresis is utilized by adding an element that forms an energy level within the gap of the oxide semiconductor to the oxide semiconductor. (4) Parasitic capacitance is utilized by arranging a part of the source electrode and / or drain electrode and a part of the gate electrode so that they face each other across an insulating film. In (4) above, for example, parasitic capacitance can be utilized by arranging a part of one of the source electrode and drain electrode and a part of the gate electrode so that they face each other across an insulating film. In this case, the other of the source electrode and drain electrode may be arranged away from the gate electrode (for example, the distance between the other of the source electrode and drain electrode and the gate electrode may be longer than the distance between one of the source electrode and drain electrode and the gate electrode).

[0105] The semiconductor memory device 50 can read data stored in the memory cell 52 to the bit line BL by controlling the word line WL, and can also write data transferred to the bit line BL to the memory cell 52. The semiconductor memory device 50 is configured to include a memory cell array (not shown) consisting of a plurality of memory cells 52.

[0106] Although several embodiments and / or examples of the present invention have been described in detail above, those skilled in the art will find it easy to make many modifications to these exemplary embodiments and / or examples without substantially departing from the novel teachings and effects of the present invention. Therefore, many of these modifications fall within the scope of the present invention. All references to the documents cited in this specification are incorporated herein by reference.

[0107] 10: Transistor 11: First electrode 12: Second electrode 13: Third electrode 161: First insulating film 162: Second insulating film 14, 14a: Third insulating film 14b: Fourth insulating film 15, 15': Oxide semiconductor 19: Insulating film 50: Semiconductor memory device 51: Capacitor 52: Memory cell WL: Word line BL: Bit line

Claims

First electrode, and second electrode, An oxide semiconductor connecting the first electrode and the second electrode, The oxide semiconductor and a third electrode adjacent to it, separated by a first insulating film and a second insulating film, Equipped with, The first electrode and the second electrode are stacked with at least an insulating film in between. The first insulating film and the second insulating film are stacked such that the first insulating film is located on the oxide semiconductor side. The oxygen concentration per unit volume of the first insulating film and the oxygen concentration per unit volume of the second insulating film are different from each other. Transistor. 　 The first insulating film contains an oxide with a higher oxygen concentration per unit volume than the second insulating film. The transistor according to claim 1. 　 The first insulating film contains an oxide with a lower oxygen concentration per unit volume than the second insulating film. The transistor according to claim 1. 　 The first electrode and the second electrode are stacked with at least a third insulating film in between, and the oxide semiconductor penetrates at least the third insulating film to connect the first electrode and the second electrode. A transistor according to any one of claims 1 to 3. 　 The first electrode and the third electrode are stacked with a third insulating film in between. The third electrode and the second electrode are stacked with a fourth insulating film in between. The oxide semiconductor is provided in a columnar shape, penetrating the third insulating film, the third electrode, and the fourth insulating film. The first insulating film is provided so as to surround at least a portion of the columnar oxide semiconductor, The second insulating film is provided so as to surround at least a portion of the first insulating film. A transistor according to any one of claims 1 to 4. 　 The transistor according to claim 5, wherein the length in the height direction of the columnar oxide semiconductor is 2 to 1000 nm. 　 The first electrode and the second electrode are stacked with a third insulating film in between. The oxide semiconductor has a tubular portion that penetrates the third insulating film, The first insulating film has a cylindrical portion provided on the inner wall of the cylindrical portion of the oxide semiconductor, The second insulating film has a cylindrical portion provided on the inner wall of the cylindrical portion of the first insulating film, The third electrode has a portion provided inside the cylindrical portion of the second insulating film. A transistor according to any one of claims 1 to 4. 　 The transistor according to claim 7, wherein the height of the cylindrical portion of the oxide semiconductor is 2 to 1000 nm. 　 The transistor according to any one of claims 1 to 8, wherein the thickness of the first insulating film is 0.5 to 200 nm. 　 The transistor according to any one of claims 1 to 8, wherein the thickness of the first insulating film is 1.0 to 50 nm. 　 The transistor according to any one of claims 1 to 8, wherein the thickness of the first insulating film is 2.0 to 8.0 nm. 　 The transistor according to any one of claims 1 to 11, wherein the thickness of the second insulating film is 0.5 to 200 nm. 　 The transistor according to any one of claims 1 to 11, wherein the thickness of the second insulating film is 1.0 to 50 nm. 　 The transistor according to any one of claims 1 to 11, wherein the thickness of the second insulating film is 2.0 to 8.0 nm. 　 The transistor according to claim 2, wherein the ratio of the oxygen concentration per unit volume of the first insulating film to the oxygen concentration per unit volume of the second insulating film (oxygen concentration per unit volume of the first insulating film / oxygen concentration per unit volume of the second insulating film) is 1.2 or more and 5.0 or less. 　 The transistor according to claim 3, wherein the ratio of the oxygen concentration per unit volume of the first insulating film to the oxygen concentration per unit volume of the second insulating film (oxygen concentration per unit volume of the first insulating film / oxygen concentration per unit volume of the second insulating film) is 0.20 or more and 0.90 or less. 　 The first insulating film and the second insulating film are Al ２ O ３ TiO ２ Hf ０．９ Al ０．１ O ２ Hf ０．９ Si ０．１ O ２ ZrO ２ Ga ２ O ３ Ta ２ O ５ HfO ２ MgO, SiO ２ CeO ２ CuO, SrTiO ３ Yb ２ O ３ Y ２ O ３ Sm ２ O ３ Nd ２ O ３ Gd ２ O ３ La ２ O ３ Hf ０．９ Al ０．１ ON, Hf ０．９ Si ０．１ ON, and at least one selected from the group consisting of SrO, the transistor according to any one of claims 1 to 16. 　 The transistor according to any one of claims 1 to 17, wherein at least one selected from the group consisting of the first insulating film and the second insulating film comprises an oxide or oxynitride of Hf, Zr, or Ta. 　 The transistor according to any one of claims 1 to 18, wherein at least one of the first electrode and the second electrode is at least one selected from the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), aluminum zinc oxide (AZO), gallium zinc oxide (GZO), aluminum (Al), silicon (Si), iron (Fe), cobalt (Co), nickel (Ni), copper (Cu), germanium (Ge), molybdenum (Mo), ruthenium (Ru), rhodium (Rh), palladium (Pd), silver (Ag), tantalum (Ta), iridium (Ir), platinum (Pt), tungsten (W), titanium (Ti), titanium nitride (TiN), aluminum nitride (AlN), manganese nitride (MnN), molybdenum nitride (MoN), and nickel nitride (Ni3N). 　 The transistor according to any one of claims 1 to 19, wherein the oxide semiconductor is a crystalline oxide semiconductor. 　 The transistor according to claim 20, wherein the oxide semiconductor includes a bixbyte crystal structure. 　 The transistor according to claim 20 or 21, wherein the oxide semiconductor contains indium oxide as the main component. 　 The transistor according to any one of claims 20 to 22, wherein the oxide semiconductor comprises Ga or Al. 　 The transistor according to any one of claims 20 to 22, wherein the oxide semiconductor includes Ga. 　 The transistor according to any one of claims 20 to 22, wherein the oxide semiconductor comprises Ga and Al. 　 The transistor according to any one of claims 1 to 25, wherein the oxide semiconductor is a polycrystalline oxide semiconductor. 　 The transistor according to any one of claims 1 to 25, wherein the oxide semiconductor is a single-crystal oxide semiconductor. 　 The transistor according to any one of claims 1 to 27, wherein the oxide semiconductor is a crystalline oxide semiconductor formed by atomic layer deposition. 　 A semiconductor device comprising a transistor according to any one of claims 1 to 28. 　 A semiconductor device according to claim 29, which is a semiconductor memory device. 　 First electrode, and second electrode, An oxide semiconductor connecting the first electrode and the second electrode, The oxide semiconductor and a third electrode adjacent to it, separated by a first insulating film and a second insulating film, Equipped with, The first electrode and the second electrode are stacked with at least an insulating film in between. The first insulating film and the second insulating film are stacked such that the first insulating film is located on the oxide semiconductor side. The oxygen concentration per unit volume of the first insulating film and the oxygen concentration per unit volume of the second insulating film are different from each other. The first insulating film contains an oxide with a higher oxygen concentration per unit volume than the second insulating film. The thickness of the first insulating film and the second insulating film are, independently, 0.5 to 200 nm. At least one selected from the group consisting of the first insulating film and the second insulating film comprises an oxide or oxynitride of Hf, Zr, or Ta, The oxide semiconductor includes a bixbyte crystal structure. Transistor. 　 The transistor according to claim 31, wherein the ratio of the oxygen concentration per unit volume of the first insulating film to the oxygen concentration per unit volume of the second insulating film (oxygen concentration per unit volume of the first insulating film / oxygen concentration per unit volume of the second insulating film) is 1.2 or more and 5.0 or less.

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