Electron-emitting element, electron-emitting element production method, array, electron microscope, propulsion device, and multi-beam drawing device

Abstract

Provided is an electron-emitting element having: a substrate (11) that includes a semiconductor; an insulating film (12) that is formed on one surface of the substrate (11); an electron emission region (E1) that is formed in a part of the insulating film (12) and exposes a part of said one surface of the substrate (11); an intermediate layer (13) that is formed in contact with said one surface of the substrate (11) in the electron emission region (E1); and an electron transmission layer (14) that is made of graphene and formed in contact with at least said one surface of the intermediate layer (13), wherein the intermediate layer (13) is made of a material that passivates a semiconductor surface at the interface with the electron transmission layer (14), and said one surface of the substrate (11) is joined to the electron transmission layer (14) via the intermediate layer (13).

Description

Electron emission element, method for manufacturing an electron emission element, array, electron microscope, propulsion system, and multibeam lithography apparatus

[0001] This disclosure relates to an electron-emitting element and a method for manufacturing an electron-emitting element. This application claims priority under Japanese Patent Application No. 2025-010767, filed in Japan on January 24, 2025, the contents of which are incorporated herein by reference.

[0002] Conventionally, two types of electron emission devices (sometimes called electron sources) that release electrons from atoms are known: cold cathode electron sources and hot cathode electron sources. Cold cathode electron sources work by applying a high voltage between the cathode and anode, thereby providing electrons with the energy to escape from the cathode. Technologies related to such cold cathode electron sources are being developed in fields such as flat panel displays, lighting devices, hydrogen generators, and electron microscopes.

[0003] Among these, thin-film electron sources, which are composed of a stacked thin film structure, are known as electron sources used in flat-panel display devices and the like (see, for example, Patent Document 1). A thin-film electron source has a structure in which an upper electrode, an electron accelerating layer, and a lower electrode are stacked, and electrons accelerated in the electron accelerating layer are emitted into a vacuum. Such thin-film electron sources have excellent features such as high stability of emitted electrons, high linearity of emitted electrons, operation at low voltages of 10V or less, stable operation even at low vacuum, surface emission of electrons, and the ability to be manufactured using existing semiconductor processes.

[0004] Examples of thin-film electron sources include MIM (Metal-Insulator-Metal) type electron sources, MOS (Metal-Oxide-Semiconductor) type electron sources, pn junction type electron sources, and alkali-modified p-type semiconductor photocathodes.

[0005] Of these, the MIM-type electron source and the MOS-type electron source have a capacitor structure, in which electrons are accelerated in an insulating layer and emitted by passing through the upper metal electrode. The pn junction type electron source uses the depletion layer created by applying a reverse bias voltage to the pn junction as an electron accelerating layer, and emits electrons by passing through the outermost n-type semiconductor layer. Furthermore, the alkali-modified p-type semiconductor photocathode is configured to emit electrons excited in the conduction band from the semiconductor surface by irradiating the p-type semiconductor with light having an energy greater than the band gap.

[0006] Of these, the pn junction electron source has the excellent characteristic that dielectric breakdown does not occur because it uses the depletion layer created by applying a reverse bias voltage to the pn junction as an electron acceleration layer (see, for example, Non-Patent Document 1). However, since the n-type semiconductor is the electron emission surface in the pn junction electron source, there are also challenges such as the need for cleaning the electron emission surface, an ultra-high vacuum environment, and Cs modification of the electron emission surface at regular intervals.

[0007] To address the challenges in such pn junction electron sources, it is possible to use the depletion layer as an electron accelerating layer, and the device surface can be made of a material that is stable in air and has high electron permeability. Therefore, a graphene-p-type semiconductor Schottky junction electron emission device is also known, in which graphene, a conductive material that is stable in air and has high electron permeability, is directly bonded to a p-type semiconductor.

[0008] Japanese Patent Application Publication No. 2017-45639 (A)

[0009] GGP Gorkom et al, J. Vac. Sci. Technol. B 4, 108 (1986).

[0010] However, even with the graphene-p-type semiconductor Schottky junction electron emission elements described above, the electron emission characteristics were not sufficient, and there was a need for electron emission elements that could achieve further improvements in electron emission characteristics.

[0011] This invention has been made in view of the circumstances described above, and aims to provide an electron emission element that has excellent electron emission characteristics, a long lifespan, and can operate in a low vacuum environment, as well as a method for manufacturing an electron emission element.

[0012] The inventors have newly discovered that in a graphene-semiconductor junction electron emission device, the interfacial properties are improved by forming an intermediate layer at the interface between graphene and the semiconductor, thereby enabling the realization of an electron emission device with significantly improved electron emission characteristics. The semiconductor layer material is Si, SiC, GaN, InGaN, C (diamond), Ge, or AlGaAs, and the doping type is p-type or i-type. For example, in the case of Si, an intermediate layer containing silicon carbide is formed.

[0013] To solve the above problems, an electron-emitting element and a method for manufacturing an electron-emitting element according to one embodiment of the present invention propose the following means: (1) The electron-emitting element according to embodiment 1 of the present disclosure comprises a substrate made of a semiconductor, an insulating film formed on one surface of the substrate, an electron-emitting region formed on a part of the insulating film and exposing a part of one surface of the substrate, an intermediate layer formed in contact with one surface of the substrate in the electron-emitting region, and an electron-transmitting layer made of graphene formed in contact with at least one surface of the intermediate layer, wherein the intermediate layer is made of a material that passivates the semiconductor surface at the interface with the electron-transmitting layer, and one surface of the substrate is joined to the electron-transmitting layer via the intermediate layer. The insulating film can be silicon oxide, aluminum oxide, or the like.

[0014] (2) A method for manufacturing a semiconductor device according to aspect 2 of the present disclosure is a method for manufacturing an electron-emitting element according to aspect (1), comprising: an insulating film forming step of forming the insulating film on one surface of the substrate; an electron-emitting region forming step of removing a part of the insulating film to form the electron-emitting region in which one surface of the substrate is exposed; an intermediate layer first forming step of forming a passivation layer as the intermediate layer on top of one surface of the substrate in the electron-emitting region; and an electron-transparent layer forming step of forming a graphene film so as to cover at least the intermediate layer to form the electron-transparent layer.

[0015] (3) A method for manufacturing a semiconductor device according to embodiment 3 of the present disclosure is a method for manufacturing an electron-emitting element according to embodiment (1), comprising: an insulating film forming step of forming the insulating film on one surface of the substrate; an electron-emitting region forming step of removing a part of the insulating film to form the electron-emitting region in which one surface of the substrate is exposed; an electron-transmitting layer forming step of forming the electron-transmitting layer by depositing a graphene film on one surface of the substrate in the electron-emitting region; and a second intermediate layer forming step of heating the substrate to generate a composition between one surface of the substrate and the electron-transmitting layer that passivates the semiconductor surface at the interface with the electron-transmitting layer, thereby forming the intermediate layer.

[0016] According to the present invention, it is possible to provide an electron emission element having excellent electron emission characteristics, a long lifespan, and the ability to operate in a low vacuum environment, as well as a method for manufacturing the electron emission element. Furthermore, an array comprising multiple such electron emission elements can be provided. In addition, a propulsion system for electron microscopes, satellites, and other devices, and a multibeam lithography system, comprising this electron emission element or this array, can be provided.

[0017] This is a cross-sectional view showing an electron-emitting element according to one embodiment of the present invention. This is a schematic diagram showing an example of the energy distribution of an electron-emitting element in the first embodiment. This is a graph showing the dependence of the depletion layer thickness and the applied voltage of the emission current for a certain sample. This is a graph showing the dependence of the depletion layer thickness and the applied voltage of the emission current for another sample. This is a schematic cross-sectional view showing the manufacturing method of the electron-emitting element of this embodiment in steps. This is a schematic cross-sectional view showing the manufacturing method of the electron-emitting element of this embodiment in steps. This is a cross-sectional TEM photograph of the junction portion of the electron-emitting element of the present invention example. This is a graph comparing the electron emission characteristics of the electron-emitting elements of the present invention example and the comparative example. This is a graph comparing the element lifetimes of the electron-emitting elements of the present invention example and the comparative example. This is a graph verifying the dependence of the operating vacuum level of the electron-emitting element of the present invention example. This is a schematic cross-sectional view showing the electrode formation method by the lift-off method in the manufacturing method of the electron-emitting element of this embodiment in steps. This is a schematic cross-sectional view showing the electrode formation method by the wet etching method or the dry etching method in the manufacturing method of the electron-emitting element of this embodiment in steps. This is a plan view of an example of an electrode pattern (with slits) formed by the lift-off method. This is a plan view of an example of an electrode pattern (without slits) formed by a wet etching method. This is a plan view of an example of an electrode pattern (without slits) formed by a dry etching method. This is a schematic diagram of an example of an array according to the third embodiment of the present invention. This is a schematic diagram of another example of an array according to the third embodiment of the present invention. This is a schematic diagram of an example of an electron microscope according to the fourth embodiment of the present invention. This is a schematic diagram of another example of an electron microscope according to the fourth embodiment of the present invention. This is a schematic diagram of a satellite equipped with a propulsion system according to the fifth embodiment of the present invention. This is a graph verifying the energy width of emitted electrons from an electron emission element according to an example of the present invention. This is a graph verifying the lifetime of an electron emission element according to an example of the present invention.

[0018] Embodiments of the present invention will be described in detail below with reference to the drawings. Note that, for the sake of clarity, the drawings used in the following description may show enlarged versions of key features, and the dimensional ratios of each component may not be the same as those in reality. Furthermore, the materials, dimensions, etc., exemplified in the following description are merely examples, and the present invention is not necessarily limited to them. It can be implemented with appropriate modifications without altering its effects.

[0019] [Electron Emission Element] Figure 1 is a cross-sectional view showing an electron emission element according to one embodiment of the present invention. The electron emission element 10 of this embodiment includes a substrate 11, an insulating film 12 formed on one surface 11a of the substrate 11, an electron emission region E1 formed by removing a part of the insulating film 12 and exposing a part of the surface 11a of the substrate 11, an intermediate layer 13 formed in the electron emission region E1 so as to be in contact with the surface 11a of the substrate 11, and an electron transparent layer 14 formed in contact with one surface 13a of the intermediate layer 13 and a part of the insulating film 12.

[0020] Furthermore, a first electrode (contact electrode) 15 is formed in contact with the edge of the electron-transparent layer 14 and a part of the insulating film 12, and a second electrode (back contact electrode) 16 is formed on the other surface 11b of the substrate 11.

[0021] The substrate 11 is made of a p-type semiconductor material. In this embodiment, a p-type silicon single crystal wafer doped with trivalent elements such as boron and aluminum is used as the p-type semiconductor material.

[0022] The insulating film 12 can be any metal oxide, for example, SiO ２ Al ２ O ３ , TiO ２ The like can be used. In this embodiment, SiO obtained by thermal oxidation of the silicon constituting the substrate 11 ２ A film is used. The thickness of this insulating film 12 can be, for example, about 200 nm to 400 nm.

[0023] The electron emission region E1 is formed by patterning and removing a portion of the insulating film 12, for example, by removing a rectangular portion of the insulating film 12 to expose one surface 11a of the substrate 11.

[0024] The intermediate layer 13 is located between one surface 11a of the substrate 11 and the electron-transmitting layer 14, and is bonded to them. The intermediate layer 13 consists of a material that passivates one surface 11a of the substrate 11, which will be described later. The material that passivates one surface 11a of the substrate 11 (in this case, Si) may consist of a material that terminates the dangling bonds of a p-type semiconductor (p-type Si in this example), for example, a material containing silicon carbide (SiC). In addition to SiC, hydrogen, oxygen, carbon, fluorine, chlorine, sulfur, and alkenyl / alkynyl terminations can be selected, provided that they can withstand use as an electron-emitting element according to the present invention. When a material containing SiC is selected as the material for the intermediate layer, the concentration ratio of SiC to the total constituent material of this intermediate layer 13 may be, for example, in the range of 40% by mass or more and 100% by mass or less. Preferably, it may be in the range of 70% by mass or more and 100% by mass or less, and more preferably in the range of 80% by mass or more and 100% by mass or less. The higher the concentration ratio of SiC constituting the intermediate layer 13, the greater the improvement in interface properties. Therefore, most preferably, the concentration ratio of SiC constituting the intermediate layer 13 should be 100% by mass.

[0025] Furthermore, if the SiC concentration ratio of the intermediate layer 13 to the total constituent material is less than 100% by mass, it may also contain oxygen in addition to SiC. In this case, the oxygen concentration ratio may be, for example, 30% by mass or less, preferably 15% by mass or less, and more preferably 10% by mass or less. The oxygen contained in such an intermediate layer 13 is SiO or SiO, where the carbon in SiC is replaced by oxygen. ２ It's fine for it to exist in that form.

[0026] Furthermore, the thickness of the intermediate layer 13 along the stacking direction of the electron emission element 10 may be, for example, in the range of 0.5 nm to 4.0 nm. Preferably, it may be in the range of 0.5 nm to 2.0 nm, and more preferably in the range of 0.5 nm to 1.6 nm.

[0027] If the thickness of the intermediate layer 13 is less than 0.5 nm, there is a concern that the improvement of the interface characteristics will be limited. Further, if the thickness of the intermediate layer 13 exceeds 4.0 nm, there is a concern that the Schottky junction between the one surface 11a of the substrate 11 and the electron transmission layer 14 will be weakened.

[0028] Further, this intermediate layer 13 only needs to have peaks obtained by X-ray photoelectron spectroscopy (XPS) in the range of 280.7 to 284.4 (eV) for C1s and in the range of 99.9 to 101.0 (eV) for Si2p.

[0029] The electron transmission layer 14 is a layer joined to one surface 13a of the intermediate layer 13 and is composed of graphene. Graphene is ideally a sheet-like substance in which carbon atoms are planar-bonded so as to form a hexagonal lattice structure, and the electron mobility is extremely high at about 15,000 cm ２ V －１ s －１ or so at room temperature.

[0030] Such graphene constituting the electron transmission layer 14 may be one layer (the thickness of a single atom) or more and ten layers or less, and preferably one layer or more and three layers or less. The thickness of one layer of graphene is about 0.355 nm.

[0031] Since such an electron transmission layer 14 made of graphene has no thick insulating layer or the like intervening between it and the substrate 11 made of p-type silicon, the electron transmission layer 14 is joined (for example, Schottky junction) to the one surface 11a of the substrate 11 via the intermediate layer 13.

[0032] The region where such an electron transmission layer 14 is joined to the one surface 11a of the substrate 11 via the intermediate layer 13 is defined as an electron emission region E1 capable of emitting electrons, and an insulating film 12 is formed outside this electron emission region E1.

[0033] The first electrode 15 is made of a conductive material such as a metal, for example, titanium or nickel. This first electrode 15 is electrically connected to the graphene that constitutes the electron-transmitting layer 14. The second electrode 16 is also made of a conductive material such as a metal, for example, titanium or nickel. Promising contact electrode materials other than titanium and nickel include copper and aluminum, which have high electrical conductivity. Laminates of these materials with W, Ti, Ta, TiN, or TaN (for example, TiN / Cu) are also promising for the first electrode 15 and the second electrode 16 for the purpose of preventing diffusion or for use as an adhesive layer.

[0034] According to the electron emission element 10 of this embodiment, which has the configuration described above, when a positive voltage is applied to the first electrode 15 connected to the electron-transmitting layer 14 made of graphene, the conduction band (E) of one surface 11a of the substrate 11 made of p-type semiconductor material is activated. ｃ Electrons present in the substrate flow into the electron-transmitting layer 14 via the intermediate layer 13, and a depletion layer is formed on one surface 11a of the substrate 11.

[0035] Then, heat and light affect the valence band (E ｖ ) to the conduction band (E ｃ Electrons excited to the ) penetrate the formed depletion layer, are accelerated by the internal electric field, and reach one surface 11a of the substrate 11 made of p-type semiconductor material. At this time, some electrons flow into the electron-permeable layer 14, but since the electron-permeable layer 14 is formed to be very thin, only about one to a few atomic layers of graphene, some electrons pass through this graphene and are released into the vacuum.

[0036] Such operations can also be performed using i-type semiconductors, and include graphene / i-type Si / p-type Si and graphene / i-type Si / n-type stacked structures. In the graphene / i-type Si / p-type Si structure, heat and light cause electrons to enter the valence band (E) within the p-type Si substrate. ｖ ) to the conduction band (E ｃElectrons excited to the i-type semiconductor penetrate the formed depletion layer, are accelerated by the internal electric field, are injected into the i-type semiconductor, are accelerated by the electric field in the i-type Si layer, reach the graphene / i-type semiconductor interface, penetrate the electron-permeable layer (graphene), and are emitted into the vacuum. In graphene / i-type Si / n-type Si, electrons in the n-type Si conductor are injected into the i-type Si layer, are accelerated by the electric field in the i-type Si layer, reach the graphene / i-type semiconductor interface, penetrate the electron-permeable layer (graphene), and are emitted into the vacuum.

[0037] The thickness of the depletion layer formed on the substrate 11, which is made of a p-type semiconductor material, for electron emission may be, for example, in the range of 2.28 nm to 30 nm. In this embodiment, a p-type silicon single crystal substrate is used as the substrate 11, for example, a doping level of 1 × 10 ２０ cm －３ Figure 3 shows an example of the relationship between the depletion layer thickness and the applied voltage dependence of the emission current in a given sample. In the example in Figure 3, the horizontal axis represents the applied voltage [V], and the vertical axis represents the emission current [A] and the corresponding depletion layer thickness [nm]. In this sample, as shown by the dotted line, electron emission begins at an applied voltage of 11.5V, and the emission current increases up to 50V.

[0038] The thickness W [m] of the depletion layer is determined by the applied voltage V and the carrier density N. Ｄ [m －３ The following relationship exists for ]: W = √((2εε ０ (V Ｄ -V)) / qN Ｄ ) ... (1) Here, ε represents the dielectric constant of the p-type semiconductor, ε ０ V represents the permittivity of vacuum, Ｄ represents the internal potential, and q represents the elementary charge.

[0039] From equation (1) above, as shown by the solid line in Figure 3, in this sample, the thickness of the depletion layer at the applied voltage V = 11.5 V, when electron emission begins, is 12.5 nm, and the thickness of the depletion layer at the applied voltage V = 50 V is 25.8 nm.

[0040] On the other hand, for other samples with similar doping levels for substrate 11, the relationship between the depletion layer thickness and the dependence of the emission current on the applied voltage is shown in the graph in Figure 4. In this sample, as shown by the dotted line, electron emission begins at an applied voltage of 24V and increases up to 70V. In this sample, from equation (1) above, the thickness of the depletion layer at the applied voltage V = 24V, when electron emission begins, is 17.9 nm, and the thickness of the depletion layer at the applied voltage V = 70V is 30.44 nm.

[0041] These experimental data indicate that electron emission is possible up to a depletion layer thickness of 30 nm. On the other hand, in order to emit electrons, the electrons in the p-type Si substrate must have an energy greater than or equal to the work function of the upper electrode. The work function of typical electrode materials is around 4.5 eV to 5 eV. Also, since the Fermi level of p-type Si is near the valence band, the energy level of the conductivity band of p-type Si is about 1.1 eV higher than the Fermi level of the electrode material, corresponding to the band gap of p-type Si. Electron emission requires the application of a voltage of about 3.5 V to 4 V, which is the difference between the work function of the upper electrode and the band gap of p-type Si.

[0042] On the other hand, in the case of silicon, the doping level is at most 10 ２１ cm －３ Therefore, when a reverse bias of 3.5V is applied to a junction with such a doping level of p-type silicon (for example, a Schottky junction), the thickness of the depletion layer is calculated to be 2.28 nm. From the above, it is preferable that a depletion layer having a width of 2.28 nm or more and 30 nm or less is formed for the purpose of electron emission.

[0043] However, the shorter the distance electrons travel through the depletion layer, the less energy loss due to electron scattering within the depletion layer and the less recombination with holes, allowing for higher energy monochromaticity of emitted electrons and higher emission current density.

[0044] Therefore, the preferred range for the thickness of the depletion layer is 2.3 nm to 30 nm, the more preferred range for increasing the emission current density is 2.3 nm to 20 nm, and the preferred range for the energy monochromaticity of emitted electrons is 2.3 nm to 10 nm, which allows electrons to be accelerated through the depletion layer with almost no scattering from the mean free path of electrons.

[0045] In the electron emission element 10 using Schottky coupling as described above, electrons are accelerated in the depletion layer. Unlike MIS-type electron emission elements, electrons are not accelerated through the insulating layer, and dielectric breakdown caused by a large number of electrons traveling through the valence band of the insulating layer is not caused, thus enabling the realization of a long-life electron emission element 10.

[0046] Furthermore, in the electron emission element 10 of this embodiment, by using an electron-permeable layer 14 made of chemically stable graphene as the surface and bonding this electron-permeable layer 14 and one surface 11a of the substrate 11 with an intermediate layer 13 containing SiC, the electron emission characteristics can be dramatically improved compared to the case in which such an intermediate layer 13 containing SiC is not formed.

[0047] Furthermore, by bonding the electron-transparent layer 14 and one surface 11a of the substrate 11 with an intermediate layer 13 containing SiC, the lifespan of the device can be significantly improved compared to cases where such an intermediate layer 13 containing SiC is not formed.

[0048] [Method for Manufacturing an Electron Emission Element: First Embodiment] The method for manufacturing the electron emission element of the embodiment described above will now be explained. Figures 5A and 5B are schematic cross-sectional views showing the method for manufacturing the electron emission element of this embodiment in steps. When manufacturing the electron emission element 10, first a substrate 11 made of a p-type semiconductor is prepared (Figure 5A(a)). As the substrate 11, for example, a p-type silicon single crystal wafer doped with boron or aluminum can be used.

[0049] Next, the substrate 11 is annealed to form a silicon thermal oxide film (SiO₂) on one side 11a. ２An insulating film 12 made of the above material is formed (Figure 5A(b): insulating film formation process). This insulating film 12 may be formed to have a thickness of, for example, about 200 nm to 400 nm.

[0050] In addition to forming an insulating film by thermal oxidation of the substrate 11, the insulating film formation process can also be carried out by depositing an insulating material such as a metal oxide on one surface 11a of the substrate 11. In this case, an insulating film can be formed that is made of a material different from the oxide of the constituent material of the substrate 11.

[0051] Next, an electron emission region E1 is formed by removing a portion of the insulating film 12 by forming a mask material, such as a resist, on the insulating film 12 and then performing etching (Figure 5A(c): electron emission region formation process). At this time, the mask material should be formed to resemble the outer edge of the electron emission region E1 to be formed. Through this electron emission region formation process, an electron emission region E1 is formed in a portion of the insulating film 12 in which one surface 11a of the substrate 11 is exposed. The electron emission region E1 may be formed as, for example, a rectangular opening of about 10 μm × 10 μm.

[0052] Furthermore, the insulating film formation process and the electron emission region formation process can also be performed in reverse order. That is, the area on one surface 11a of the substrate 11 where the electron emission region E1 is to be formed can be covered with an anti-oxidation mask or the like (electron emission region formation process), an insulating film 12 can be formed around this anti-oxidation mask (insulating film formation process), and then the anti-oxidation mask can be removed to form an electron emission region in the insulating film 12.

[0053] Next, an intermediate layer 13 made of a silicon carbide film is formed to cover one surface 11a of the substrate 11 that is exposed in the electron emission region E1 (Figure 5A(d): First intermediate layer formation step). The silicon carbide film can be formed, for example, by chemical vapor deposition (CVD) using a carbon-based gas and a silicon-based gas. The silicon carbide film that constitutes the intermediate layer 13 thus formed is bonded to one surface 11a of the substrate 11, i.e., p-type silicon.

[0054] Next, a graphene film is deposited to cover the area from the intermediate layer 13 formed in the electron emission region E1 to the surrounding insulating film 12, thereby forming an electron-transmitting layer 14 (Figure 5B(a): electron-transmitting layer formation process).

[0055] The graphene film constituting the electron-permeable layer 14 can be deposited, for example, by plasma CVD. The conditions for plasma CVD are such that CH4 is used as the deposition gas. ４ The film can be deposited using Ar as the carrier gas at a deposition temperature of 800°C, a pressure of 18 Pa, and an output of about 2 W for about one hour. This allows for the deposition of one to three layers of graphene film.

[0056] The graphene film constituting the electron-permeable layer 14 formed in this manner is bonded (for example, by Schottky bonding) to one surface 11a of the substrate 11 via the silicon carbide film constituting the intermediate layer 13, and a depletion layer is formed on one surface 11a of the substrate 11.

[0057] After this electron-permeable layer formation process, the process may further include a heating step in which the entire laminate, including the substrate 11, is heated in a reduced-pressure atmosphere or a methane gas atmosphere. The heating temperature can be, for example, around 900°C. Through this heating step, the graphene film constituting the electron-permeable layer 14 is firmly bonded to one surface 11a of the substrate 11 via the silicon carbide film constituting the intermediate layer 13.

[0058] Subsequently, the graphene film constituting the electron-transmitting layer 14 is patterned and shaped into the desired form by lithography and oxygen plasma etching (Figure 5B(b)).

[0059] Next, a first electrode (contact electrode) 15 made of a conductive material is formed outside the electron emission region E1 and in contact with the electron-transmitting layer 14 by lithography, electron beam deposition of the conductive material, and a lift-off process (Figure 5B(c): First electrode formation process). As the conductive material constituting the first electrode 15, metals such as Ti and Ni can be used.

[0060] Furthermore, a second electrode (back contact electrode) 16 is formed on the other surface 11b of the substrate 11 by depositing a conductive material using an electron beam (Figure 5B(d): second electrode formation process). As the conductive material constituting the second electrode 16, for example, metals such as Ti or Ni can be used.

[0061] The first electrode 15 and the second electrode 16 can be formed, for example, by a lift-off method, a wet etching method, or a dry etching method.

[0062] Figure 10 is a schematic cross-sectional view showing the stepwise electrode formation method by the lift-off method in the manufacturing method of the electron emission element of this embodiment. After applying photoresist to the entire upper surface of the electron emission element 100 (shown in Figure 10(a) before electrode formation, with insulating film, intermediate layer, electron transmission layer, etc. omitted for convenience), the photoresist is removed from the portion where the electrode will be formed to form an inverted electrode pattern (Figure 10(b)).

[0063] Next, a metal layer 102 is formed over the entire upper surface of the electron emission element 100 before electrode formation, which has the electrode inversion pattern shown in Figure 10(b) (Figure 10(c)). Finally, the electrode pattern is formed by peeling off (lifting off) the photoresist (Figure 10(d)).

[0064] Figure 11 is a schematic cross-sectional view showing, stepwise, the electrode formation method by wet etching or dry etching in the manufacturing method of the electron emission element of this embodiment. A metal layer 102 is applied to the entire upper surface of the electron emission element 100 (insulating film, intermediate layer, electron-transmitting layer, etc. are omitted for convenience) shown in Figure 11(a) (Figure 11(b)).

[0065] Next, a photoresist layer is formed on the upper surface of the metal layer to form the electrode pattern 104 (Figure 11(c)).

[0066] Next, the electron emission element 100, which has the electrode pattern shown in Figure 11(c) formed on it, is subjected to wet etching or dry etching to remove the metal layer 102 in the areas where the electrode pattern 104 has not been formed (Figure 11(d)). Finally, the electrode pattern is formed by removing the electrode pattern 104 remaining on the electrode 102 (Figure 11(e)).

[0067] In the lift-off method, wet etching method, and dry etching method described above, known methods, materials, etc., can be used.

[0068] Figure 12A is a plan view of an example of an electrode pattern (with slits) formed by the lift-off method. Slits are made in the annular electrode to allow for the lift-off of the inverted pattern. This allows the inverted pattern to be peeled off as a single unit.

[0069] Figure 12B is a plan view of an example of an electrode pattern (without slits) formed by the wet etching method. Figure 12C is a plan view of an example of an electrode pattern (without slits) formed by the dry etching method. Depending on the application, wet etching and dry etching can be used interchangeably to appropriately set the distance between the outer circumference of the electron emission region E1 and the inner circumference of the electrode pattern. Wet etching is suitable for creating a wider gap, while dry etching is suitable for creating a narrower gap.

[0070] Through the above process, an electron-emitting element 10 can be manufactured in which the graphene film constituting the electron-transmitting layer 14 is bonded (for example, by Schottky junction) to one surface 11a of the substrate 11 via the silicon carbide film constituting the intermediate layer 13.

[0071] As described in the embodiment above, when p-type silicon is used as the p-type semiconductor constituting the substrate 11, electrons in the valence band are excited to the conduction band by thermal excitation, so the manufactured electron emission element 10 can operate even without light irradiation.

[0072] On the other hand, if a material other than p-type silicon is used as the p-type semiconductor constituting the substrate 11, it may emit electrons when irradiated with light. Therefore, since the p-type semiconductor constituting the substrate 11 basically absorbs light with a wavelength greater than or equal to its band gap and generates electron holes, it is sufficient to select a material that matches the wavelength of the irradiated light.

[0073] [Method for manufacturing an electron-emitting element: Second embodiment] In this embodiment, in the method for manufacturing an electron-emitting element of the first embodiment described above, after the electron-emitting region formation step, a graphene film is formed in the electron-emitting region on one surface of the substrate without forming an intermediate layer to form an electron-transmissive layer.

[0074] Next, the laminate including the substrate is heated to generate SiC between one surface of the substrate and the electron-permeable layer, thereby forming an intermediate layer (second intermediate layer formation step).

[0075] In this second intermediate layer formation step, the substrate can be heated to 800°C or higher in a reduced-pressure atmosphere or a methane gas atmosphere. This causes the silicon forming the p-type semiconductor of the substrate to bond with the carbon of the graphene film forming the electron-permeable layer, thereby forming an intermediate layer containing SiC between one surface of the substrate and the electron-permeable layer.

[0076] In this second embodiment of the method for manufacturing an electron-emitting element, an intermediate layer containing SiC can be easily formed simply by heating in a specific atmosphere, without having to deposit SiC by CVD or the like. Therefore, an electron-emitting element can be manufactured in a simpler process.

[0077] [Array: Third Embodiment] Figure 13 is a schematic diagram of an example of an array according to the third embodiment of the present invention. Figure 14 is a schematic diagram of another example of an array according to the third embodiment of the present invention. As shown in Figures 13 and 14, the array of this embodiment comprises a plurality of electron emission elements 10. These plurality of electron emission elements 10 are arranged in a first direction and a second direction which is different from the first direction. In the example shown in Figure 13, the first direction and the second direction intersect at an angle of 90°. In the example shown in Figure 14, the first direction and the second direction intersect at an angle of 60°.

[0078] The array according to this embodiment has multiple electron-emitting elements 10 with improved electron-emitting characteristics and a long lifespan, and by operating the elements simultaneously, the benefits can be multiplied many times over. Furthermore, by using the electron-emitting elements 10 with reduced output, the degradation of the electron-emitting elements 10 can be reduced and their lifespan extended even further. In addition, by switching between the use of multiple electron-emitting elements 10, maintainability can be improved.

[0079] A single array can comprise 4 to 1 million electron-emitting elements 10. The shape of the electron-emitting region of the electron-emitting elements 10 constituting the array may be circular or a rounded rectangle.

[0080] [Electron Microscope: Fourth Embodiment] In the electron microscope according to the fourth embodiment, the thermal filament gun used in a general electron microscope is replaced with a planar electron source. The electron emission element or array according to the present invention is used as this planar electron source.

[0081] Figure 15 is a schematic diagram of an example of an electron microscope according to the fourth embodiment of the present invention. The electron microscope according to this embodiment shown in Figure 15 comprises a planar electron source 201, an extraction electrode 202, a condenser lens 1203a, a condenser aperture 1204a, a condenser lens 2203b, a condenser aperture 2204b, a deflection coil 205, an objective aperture 206, an objective lens 207, a secondary electron detector 208, and a five-axis stage 210. The observation sample 209 is placed on the five-axis stage 210.

[0082] In the electron microscope according to this embodiment shown in Figure 15, the planar electron source consisting of an electron emission element or array according to the present invention is replaced, so there is no need to provide a Warnert electrode between the electron source and the extraction electrode.

[0083] Figure 16 is a schematic diagram of another example of an electron microscope according to the fourth embodiment of the present invention. The electron microscope according to this embodiment shown in Figure 16 comprises a planar electron source 201, an extraction electrode 202, a deflection coil 205, an objective aperture 206, an objective lens 207, a secondary electron detector 208, and a five-axis stage 210. The observation sample 209 is placed on the five-axis stage 210.

[0084] In the electron microscope according to this embodiment shown in Figure 16, the Warnert electrode is omitted, and furthermore, the condenser lens, which is an intermediate lens, is also omitted. Since a parallel beam with a beam spread of 1 degree or less is emitted from the planar electron source, the condenser lens can be omitted as described above. This makes it possible to further miniaturize the electron microscope and further reduce manufacturing costs.

[0085] [Propulsion System: Fifth Embodiment] Figure 17 is a schematic diagram of a satellite (space probe) equipped with a propulsion system according to the fifth embodiment of the present invention. The propulsion system 301 has an opening on at least one surface of the satellite (space probe). The propulsion system 301 includes an electron-emitting element or array according to the present invention.

[0086] The electron emission element or array according to the present invention, included in the thruster 301, has excellent electron emission characteristics, a long lifespan, and can operate in a low vacuum environment. By using this thruster 301 in satellites (space probes) and the like, where maintenance is difficult after the device is operational, the reliability of the satellites (space probes) and the like can be improved.

[0087] [Multibeam Lithography Apparatus: Sixth Embodiment] The array according to the present invention can be used in a multibeam lithography apparatus that uses these as planar electron sources. Electrons emitted from the electron-emitting elements constituting the array are controlled on and off by passing through an aperture array and a blanking array. Electrons that have passed through the blanking array are focused by a condenser lens, then pass through an objective aperture, are adjusted to a predetermined magnification by an objective lens, and are irradiated onto a substrate. By controlling the on and off of the electron beam with the blanking array, fine circuit patterns can be drawn on the substrate.

[0088] By using the array according to the present invention as the electron source for a multibeam lithography system, its reliability, maintainability, and power efficiency can be improved. Furthermore, miniaturization and cost reduction of the multibeam lithography system can be achieved.

[0089] The effect of an electron emission element of one embodiment was verified. First, an electron emission element of the present invention, including an intermediate layer made of SiC, was formed using the manufacturing method of the electron emission element of the first embodiment described above. In addition, an electron emission element of a comparative example was formed in which one surface of the substrate and the electron-transmitting layer were directly bonded, without performing the first intermediate layer formation step in the manufacturing method of the electron emission element of the first embodiment.

[0090] Figure 6 shows a cross-sectional TEM image of the junction portion of the electron emission element according to the present invention. Figure 6 confirms that an intermediate layer made of SiC is formed between the p-type silicon substrate and the graphene electron-transmitting layer.

[0091] Next, the electron emission characteristics of the electron emission elements of the present invention example and the comparative example were compared. The electron emission characteristics were measured by evaluating the electron emission characteristics of the resulting electron beam in an ultra-high vacuum chamber. First, with the second electrode grounded, a gate voltage was applied to the first electrode connected to the electron transmission layer from 0V to approximately +50V in 0.1V steps, and +1000V was applied to the SUS plate (anode) opposed to the electron emission element. The emission currents flowing through the first electrode, the second electrode, and the SUS plate were then measured. The measurement results are shown in Figure 7.

[0092] According to the measurement results shown in Figure 7, in the comparative example where no intermediate layer made of SiC is formed, the discharge current gradually increased from an applied voltage of about 10V to 50V, and at an applied voltage of 50V, the discharge current was 10 －３ (A / cm ２ The current increased to approximately 10 (A / cm²) at an applied voltage of 5V to 15V. On the other hand, in the present invention example in which an intermediate layer made of SiC was formed, the discharge current increased rapidly between the applied voltages of 5V and 15V, and at an applied voltage of 15V it increased to approximately 10 (A / cm²). ２ A large discharge current exceeding ) was obtained. Therefore, it was confirmed that the discharge current can be significantly increased with a small applied voltage by forming an intermediate layer made of SiC.

[0093] Next, the stability of the emission current of the electron emission elements of the present invention example and the comparative example was compared. The results are shown in Figure 8. As shown in Figure 8, the stability of the element was dramatically improved by forming an intermediate layer made of SiC. The electron emission element of the comparative example, which does not have an intermediate layer made of SiC, showed unstable emission current and fluctuations in current density of more than an order of magnitude. However, the electron emission element of the present invention example, which has an intermediate layer made of SiC, was able to achieve continuous operation for more than 160 hours without large fluctuations in emission current, and it was confirmed that the emission current density was also dramatically improved.

[0094] Next, the dependence of the operating vacuum level of the electron emission element of the present invention was verified. For the verification, the electron emission element of the present invention was operated in a vacuum environment of 10 －４ The change in discharge current from approximately 0V to 9V was measured for each of the following pressures: Pa, 10Pa, 100Pa, and 500Pa. The results are shown graphically in Figure 9.

[0095] As shown in Figure 9, the change in emission current showed almost the same trend in all vacuum environments. Therefore, it was confirmed that by forming an intermediate layer made of SiC, the emission current does not change significantly depending on the operating vacuum level, and an electron emission element with low dependence on the operating vacuum level can be realized.

[0096] The electron emission element of the present invention possesses excellent electron emission characteristics, a long lifespan, and can operate in low vacuum environments. Such an electron emission element can contribute to applications in high-precision electron microscopes, environmental energy fields through the modification of liquid and gaseous materials, and the realization of high-power propulsion systems for small artificial satellites. Therefore, it has industrial applicability.

[0097] The key points that can be grasped from the above disclosure are as follows: [Configuration 1] An electron-emitting element comprising: a substrate made of a p-type semiconductor; an insulating film made of silicon oxide formed on one surface of the substrate; an electron-emitting region formed in a part of the insulating film, exposing a part of one surface of the substrate; an intermediate layer made of a material containing silicon carbide, formed in contact with one surface of the substrate in the electron-emitting region; and an electron-transmissive layer made of graphene, formed in contact with at least one surface of the intermediate layer, wherein one surface of the substrate is Schottky-bonded to the electron-transmissive layer via the intermediate layer. [Configuration 2] An electron-emitting element according to Configuration 1 or 2, wherein the concentration ratio of silicon carbide in the intermediate layer is in the range of 40% by mass or more and 100% by mass or less. [Configuration 3] An electron-emitting element according to any one of Configurations 1 to 3, wherein the thickness of the intermediate layer along the stacking direction is in the range of 0.5 nm or more and 4.0 nm or less. [Configuration 4] An electron-emitting element according to any one of Configurations 1 to 4, wherein the intermediate layer contains oxygen, and the concentration ratio of the oxygen is 30% by mass or less. [Configuration 5] An electron-emitting element according to any one of Configurations 1 to 5, wherein the intermediate layer has peaks obtained by X-ray photoelectron spectroscopy in the range of 280.7 to 284.4 (eV) for C1s and in the range of 99.9 to 101.0 (eV) for Si2p. [Configuration 6] An electron-emitting element according to any one of Configurations 1 to 5, wherein a depletion layer with a thickness range of 2.28 nm to 30 nm is formed on one surface of the substrate. [Configuration 7] A method for manufacturing an electron-emitting element according to any one of Configurations 1 to 6, comprising: an insulating film formation step of forming the insulating film on one surface of the substrate; an electron-emitting region formation step of removing a part of the insulating film to form the electron-emitting region where one surface of the substrate is exposed; an intermediate layer first formation step of forming the intermediate layer by forming a silicon carbide film on one surface of the substrate in the electron-emitting region; and an electron-transparent layer formation step of forming the electron-transparent layer by forming a graphene film so as to cover at least the intermediate layer. [Configuration 8] A method for manufacturing an electron-emitting element according to Configuration 7, further comprising a heating step of heating the substrate in a reduced pressure atmosphere or a methane gas atmosphere after the electron-transmissive layer formation step.[Configuration 9] A method for manufacturing an electron-emitting element according to any one of Configurations 1 to 6, comprising: an insulating film forming step of forming the insulating film on one surface of the substrate; an electron-emitting region forming step of removing a part of the insulating film to form the electron-emitting region in which one surface of the substrate is exposed; an electron-transparent layer forming step of forming the electron-transparent layer by forming a graphene film on top of one surface of the substrate in the electron-emitting region; and an intermediate layer second forming step of heating the substrate to generate silicon carbide between one surface of the substrate and the electron-transparent layer to form the intermediate layer. [Configuration 10] The method for manufacturing an electron-emitting element according to Configuration 9, wherein the intermediate layer second forming step is a step of heating the substrate to 800°C or higher in a reduced pressure atmosphere or a methane gas atmosphere. [Configuration 1A] An electron-emitting element comprising: a substrate made of a semiconductor; an insulating film made of silicon oxide formed on one surface of the substrate; an electron-emitting region formed in a part of the insulating film, exposing a part of one surface of the substrate; an intermediate layer formed in the electron-emitting region in contact with one surface of the substrate; and an electron-transmitting layer made of graphene formed in contact with at least one surface of the intermediate layer, wherein the intermediate layer is made of a material that passivates the semiconductor surface at the interface with the electron-transmitting layer, and one surface of the substrate is joined to the electron-transmitting layer via the intermediate layer. [Configuration 2A] The electron-emitting element according to Configuration 1A, wherein the semiconductor is p-type Si. [Configuration 3A] The electron-emitting element according to Configuration 1A, wherein the intermediate layer is made of a material containing silicon carbide. [Configuration 4A] The electron-emitting element according to Configuration 1A, wherein the concentration ratio of silicon carbide in the intermediate layer is in the range of 40% by mass or more and 100% by mass or less. [Configuration 5A] The electron emission element according to Configuration 1A or 2A, wherein the thickness of the intermediate layer along the stacking direction is in the range of 0.5 nm to 4.0 nm. [Configuration 6A] The electron emission element according to Configuration 1A or 2A, wherein the intermediate layer contains oxygen, and the oxygen concentration ratio is 30% by mass or less. [Configuration 7A] The electron emission element according to Configuration 1A or 2A, wherein the intermediate layer has peaks obtained by X-ray photoelectron spectroscopy in the range of 280.7 to 284.4 (eV) for C1s and in the range of 99.9 to 101.0 (eV) for Si2p.[Configuration 8A] An electron emission element according to Configuration 1A or 2A, wherein a depletion layer with a thickness range of 2.28 nm to 30 nm is formed on one surface of the substrate. [Configuration 9A] An initial current density of 10 mA / cm. ２[Configuration 10A] An electron-emitting element according to Configuration 1A or 2A, wherein the half-life at which the initial current density becomes 50% is 5000 hours or more. [Configuration 11A] An electron-emitting element array comprising a plurality of electron-emitting elements according to Configuration 1A or 2A, wherein the plurality of electron-emitting elements are arranged in a first direction and a second direction different from the first direction. [Configuration 12A] An electron microscope comprising the electron-emitting element according to Configuration 1A or the electron-emitting element array according to Configuration 10A. [Configuration 13A] A multi-beam lithography system comprising the electron-emitting element according to Configuration 1A or the electron-emitting element array according to Configuration 9A. [Configuration 14A] A method for manufacturing an electron-emitting element according to Configuration 1A or 2A, comprising: an insulating film forming step of forming the insulating film on one surface of the substrate; an electron-emitting region forming step of removing a part of the insulating film to form an electron-emitting region in which one surface of the substrate is exposed; an intermediate layer first forming step of forming a passivation layer as the intermediate layer on top of one surface of the substrate in the electron-emitting region; and an electron-permeable layer forming step of forming a graphene film so as to cover at least the intermediate layer to form the electron-permeable layer. [Configuration 15A] A method for manufacturing an electron-emitting element according to Configuration 14A, wherein the passivation layer is made of a material containing silicon carbide. [Configuration 16A] A method for manufacturing an electron-emitting element according to Configuration 14A, further comprising a heating step of heating the substrate in a reduced pressure atmosphere or a methane gas atmosphere after the electron-permeable layer forming step. [Configuration 17A] A method for manufacturing an electron-emitting element according to Configuration 1A or 2A, comprising: an insulating film forming step of forming the insulating film on one surface of the substrate; an electron-emitting region forming step of removing a part of the insulating film to form the electron-emitting region in which one surface of the substrate is exposed; an electron-transmitting layer forming step of forming the electron-transmitting layer by depositing a graphene film on top of one surface of the substrate in the electron-emitting region; and a second intermediate layer forming step of heating the substrate to generate a composition that passivates the semiconductor surface at the interface with the electron-transmitting layer between one surface of the substrate and the electron-transmitting layer, thereby forming the intermediate layer.[Configuration 18A] The method for manufacturing an electron-emitting element according to Configuration 17A, wherein the composition is a composition containing silicon carbide. [Configuration 19A] The method for manufacturing an electron-emitting element according to Configuration 17A, wherein the intermediate layer second formation step is a step of heating the substrate to 800°C or higher in a reduced pressure atmosphere or a methane gas atmosphere. [Configuration 20A] The method for manufacturing an electron-emitting element according to Configuration 14A or 17A, further comprising the steps of: depositing a metal material for contact electrodes onto the entire surface of the electron-transmissive layer of the electron-emitting element; patterning electrodes on the deposited metal material for contact electrodes; and removing portions of the metal material for contact electrodes other than electrodes by a lift-off method. [Configuration 21A] A method for manufacturing an electron-emitting element according to Configuration 14A or 17A, further comprising: a step of depositing a metal material for contact electrodes onto the entire surface of the electron-transparent layer of the electron-emitting element; a step of electrode patterning the deposited metal material for contact electrodes; and a step of removing the portion of the metal material for contact electrodes other than the electrodes by a wet etching method. [Configuration 22A] A method for manufacturing an electron-emitting element according to Configuration 14A or 17A, further comprising: a step of depositing a metal material for contact electrodes onto the entire surface of the electron-transparent layer of the electron-emitting element; a step of electrode patterning the deposited metal material for contact electrodes; and a step of removing the portion of the metal material for contact electrodes other than the electrodes by a dry etching method.

[0098] <Note> The electron emission element relating to this disclosure may lack an intermediate layer. For example, by using cesium, rubidium, potassium, barium, strontium, etc., which are effective in lowering the work function, as impurities contained in the p-type semiconductor, it may be possible to partially obtain the effects of the present invention even with an electron emission element lacking an intermediate layer. The configuration other than the intermediate layer is the same as that of an electron emission element having an intermediate layer.

[0099] 10 Electron emission element 11 Substrate 12 Insulating film 13 Interlayer 14 Electron transmission layer 15 First electrode (contact electrode) 16 Second electrode (back contact electrode) E1 Electron emission region 100 Electron emission element before electrode formation 101, 104 Photoresist 102 Metal layer (first electrode, second electrode) 201 Planar electron source 202 Extraction electrode 203a Capacitor lens 1 203b Capacitor lens 2 204a Capacitor aperture 1 204b Capacitor aperture 2 205 Deflection coil 206 Objective aperture 207 Objective lens 208 Secondary electron detector 209 Observation sample 210 Five-axis stage (XYZRT) 300 Artificial satellite (space probe) 301 Propulsion system

Claims

A substrate made of semiconductors, An insulating film formed on one surface of the substrate, An electron emission region formed in a part of the insulating film, exposing a part of one surface of the substrate, In the electron emission region, an intermediate layer formed in contact with one surface of the substrate, It comprises an electron-permeable layer made of graphene, formed in contact with at least one surface of the intermediate layer, The aforementioned intermediate layer is made of a material that passivates the semiconductor surface at the interface with the electron-transparent layer. One surface of the substrate is an electron-emitting element bonded to the electron-transmitting layer via the intermediate layer. 　 The electron-emitting element according to claim 1, wherein the semiconductor is p-type Si. 　 The electron emission element according to claim 1, wherein the intermediate layer is made of a material containing silicon carbide. 　 The electron emission element according to claim 1, wherein the concentration ratio of silicon carbide in the intermediate layer is in the range of 40% by mass or more and 100% by mass or less. 　 The electron emission element according to claim 1 or 2, wherein the thickness of the intermediate layer along the stacking direction is in the range of 0.5 nm to 4.0 nm. 　 The electron emission element according to claim 1 or 2, wherein the intermediate layer contains oxygen, and the concentration ratio of the oxygen is 30% by mass or less. 　 The electron-emitting element according to claim 1 or 2, wherein the intermediate layer has peaks obtained by X-ray photoelectron spectroscopy in the range of 280.7 to 284.4 (eV) for C1s and in the range of 99.9 to 101.0 (eV) for Si2p. 　 The electron-emitting element according to claim 1 or 2, wherein a depletion layer having a thickness range of 2.28 nm to 30 nm is formed on one surface of the substrate. The initial current density is 10 mA / cm². ２ The electron emission element according to claim 1 or 2, wherein the half-life at which the initial current density becomes 50% is 5,000 hours or more. 　 A plurality of the electron emission elements described in claim 1 or 2 are provided, An electron emission element array in which the plurality of electron emission elements are arranged in a first direction and a second direction different from the first direction. 　 An electron microscope comprising the electron emission element described in claim 1 or the electron emission element array described in claim 10. 　 A satellite propulsion system comprising an electron-emitting element according to claim 1 or an electron-emitting element array according to claim 10. 　 A multibeam lithography apparatus comprising an electron emission element according to claim 1 or an electron emission element array according to claim 9. 　 A method for manufacturing an electron emission element according to claim 1 or 2, comprising an insulating film forming step of forming the insulating film on one surface of the substrate, An electron emission region formation step, in which a portion of the insulating film is removed to form the electron emission region in which one surface of the substrate is exposed, A first intermediate layer formation step involves forming a passivation layer as the intermediate layer on top of one surface of the substrate in the electron emission region, A method for manufacturing an electron-emitting element, comprising: an electron-permeable layer formation step of forming a graphene film so as to cover at least the intermediate layer to form the electron-permeable layer. 　 The method for manufacturing an electron emission element according to claim 14, wherein the passivation layer is made of a material containing silicon carbide. 　 The method for manufacturing an electron-emitting element according to claim 14, further comprising a heating step of heating the substrate in a reduced pressure atmosphere or a methane gas atmosphere after the electron-transmissive layer formation step. 　 A method for manufacturing an electron emission element according to claim 1 or 2, comprising an insulating film forming step of forming the insulating film on one surface of the substrate, An electron emission region formation step, in which a portion of the insulating film is removed to form the electron emission region in which one surface of the substrate is exposed, An electron permeable layer formation step is performed to form the electron permeable layer by depositing a graphene film on one surface of the substrate in the electron emission region, A second intermediate layer formation step involves heating the substrate to generate a composition between one surface of the substrate and the electron-permeable layer that passivates the semiconductor surface at the interface with the electron-permeable layer, thereby forming the intermediate layer. A method for manufacturing an electron emission element equipped with [the specified element]. 　 The method for manufacturing an electron-emitting element according to claim 17, wherein the composition is a composition containing silicon carbide. 　 The method for manufacturing an electron-emitting element according to claim 17, wherein the intermediate layer second formation step is a step of heating the substrate to 800°C or higher in a reduced pressure atmosphere or a methane gas atmosphere. 　 A method for manufacturing an electron-emitting element according to claim 14 or 17, A step of depositing a metal material for contact electrodes onto the entire surface of the electron-transmissive layer formed on the electron-emitting element, A step of patterning electrodes on the metal material for contact electrodes that has been deposited, The lift-off method involves removing the portion of the metal material for the contact electrode other than the electrode, A method for manufacturing an electron-emitting element that further enhances its capabilities. 　 A method for manufacturing an electron-emitting element according to claim 14 or 17, A step of depositing a metal material for contact electrodes onto the entire surface of the electron-transmissive layer formed on the electron-emitting element, A step of patterning electrodes on the metal material for contact electrodes that has been deposited, A wet etching method is used to remove the parts of the metal material for the contact electrode other than the electrode, A method for manufacturing an electron-emitting element that further enhances its capabilities. 　 A method for manufacturing an electron-emitting element according to claim 14 or 17, A step of depositing a metal material for contact electrodes onto the entire surface of the electron-transmissive layer formed on the electron-emitting element, A step of patterning electrodes on the metal material for contact electrodes that has been deposited, A dry etching method is used to remove the parts of the metal material for the contact electrode other than the electrode, A method for manufacturing an electron-emitting element that further enhances its capabilities.

Images