Plasma processing apparatus, power supply system, and source frequency control method

Abstract

A plasma processing apparatus according to the present disclosure includes an RF generation unit for plasma generation. In the RF generation unit, a phase difference detector generates the voltage corresponding to the phase difference between a first signal and a second signal at each phase within a repetitive period. The first signal and the second signal are either a voltage and a current of a source RF signal, or forward waves and reflected waves of the source RF signal. A voltage-controlled oscillator generates a signal with the source frequency corresponding to the voltage generated by the phase difference detector. An amplifier amplifies the signal generated by the voltage-controlled oscillator to generate a source RF signal for each phase within the repetitive period. A delay circuit delays the source RF signal at each phase within the repetitive period by an integer multiple of the time length of the repetitive period, and then outputs the source RF signal from the RF generation unit.

Description

Plasma processing apparatus, power supply system, and method for controlling source frequency

[0001] Exemplary embodiments of the present disclosure relate to a plasma processing apparatus, a power supply system, and a method for controlling a source frequency.

[0002] The plasma processing apparatus is used in plasma processing of a substrate. The plasma processing apparatus uses bias high-frequency power to draw ions from the plasma generated in the chamber to the substrate. Patent Document 1 below discloses a plasma processing apparatus that modulates the power level and frequency of the bias high-frequency power.

[0003] Japanese Patent Application Laid-Open No. 2009-246091

[0004] The present disclosure provides a technique for reducing the degree of reflection of a source RF signal in a plasma processing apparatus.

[0005] In one exemplary embodiment, a plasma processing apparatus is provided. The plasma processing apparatus includes a chamber, a substrate support, an RF generation unit, a bias power supply, and a sensor. The substrate support is located within the chamber. The RF generation unit is configured to supply a source RF signal to generate plasma from a gas within the chamber. The bias power supply is electrically coupled to the substrate support and is configured to periodically supply an electrical bias to draw ions from the plasma onto a substrate on the substrate support. The sensor is configured to measure a first signal and a second signal in the source RF signal supply line. The first signal and the second signal are the voltage and current of the source RF signal, or the forward and reflected waves of the source RF signal, respectively. The RF generation unit includes a phase difference detector, a voltage-controlled oscillator, an amplifier, and at least one delay circuit. The phase difference detector is configured to generate a voltage having a level corresponding to the phase difference between the first signal and the second signal at each phase in the iteration period. The voltage-controlled oscillator is configured to generate a signal having a source frequency corresponding to the voltage generated by the phase difference detector. The amplifier is configured to amplify the signal generated by the voltage-controlled oscillator to generate a source RF signal having a source frequency corresponding to the phase difference in each phase within the repetition period. At least one delay circuit is configured to delay the source RF signal, which has a source frequency corresponding to the phase difference in each phase within the repetition period, by an integer multiple of the repetition period time and output it from the RF generation unit.

[0006] According to one exemplary embodiment, it is possible to reduce the degree of reflection of the source RF signal in a plasma processing apparatus.

[0007] This is a diagram illustrating an example configuration of a plasma processing system. This is a diagram illustrating an example configuration of a capacitively coupled plasma processing apparatus. This is a diagram of a plasma processing apparatus according to one exemplary embodiment. This is a diagram illustrating an example of an electrical bias waveform. Figures 5(a) and 5(b) are timing charts of an example of a source RF signal and electrical bias in a plasma processing apparatus according to one exemplary embodiment. This is a timing chart related to a plasma processing apparatus according to one exemplary embodiment. This is a diagram illustrating an example of the relationship between the voltage generated by a phase difference detector and the frequency of a signal generated by a voltage-controlled oscillator. Figures 8(a) and 8(b) are diagrams illustrating an example of the relationship between the phase difference of two signals input to a phase difference detection circuit and a first voltage output from the phase difference detection circuit. This is a diagram illustrating an example of the relationship between a first voltage input to a voltage converter and a second voltage output from the voltage converter. This is a diagram illustrating a plasma processing apparatus according to another exemplary embodiment. This is a flowchart showing a source frequency control method according to one exemplary embodiment. This is a block diagram of a processing circuit that performs the operations described herein on a computer.

[0008] Various exemplary embodiments will be described in detail below with reference to the drawings. In each drawing, the same or corresponding parts will be denoted by the same reference numerals.

[0009] Figure 1 is a diagram illustrating an example configuration of a plasma processing system. In one embodiment, the plasma processing system includes a plasma processing apparatus 1 and a control unit 2. The plasma processing system is an example of a substrate processing system, and the plasma processing apparatus 1 is an example of a substrate processing apparatus. The plasma processing apparatus 1 includes a plasma processing chamber 10, a substrate support unit 11, and a plasma generation unit 12. The plasma processing chamber 10 has a plasma processing space. The plasma processing chamber 10 also has at least one gas supply port for supplying at least one processing gas to the plasma processing space, and at least one gas outlet for discharging gas from the plasma processing space. The gas supply port is connected to a gas supply unit 20, which will be described later, and the gas outlet is connected to an exhaust system 40, which will be described later. The substrate support unit 11 is located in the plasma processing space and has a substrate support surface for supporting a substrate.

[0010] The plasma generation unit 12 is configured to generate plasma from at least one processing gas supplied into the plasma processing space. The plasma formed in the plasma processing space may be capacitively coupled plasma (CCP), inductively coupled plasma (ICP), ECR plasma (Electron-Cyclotron-Resonance Plasma), helicon wave excited plasma (HWP), or surface wave plasma (SWP), etc. Furthermore, various types of plasma generation units may be used, including AC (Alternating Current) plasma generation units and DC (Direct Current) plasma generation units. In one embodiment, the AC signal (AC power) used in the AC plasma generation unit has a frequency in the range of 100 kHz to 10 GHz. Therefore, the AC signal includes an RF (Radio Frequency) signal and a microwave signal. In one embodiment, the RF signal has a frequency in the range of 100 kHz to 150 MHz.

[0011] The control unit 2 processes computer-executable instructions that cause the plasma processing apparatus 1 to perform various processes described herein. The control unit 2 may be configured to control each element of the plasma processing apparatus 1 to perform the various processes described herein. In one embodiment, part or all of the control unit 2 may be included in the plasma processing apparatus 1. The control unit 2 may include a processing unit 2a1, a storage unit 2a2, and a communication interface 2a3. The control unit 2 is implemented, for example, by a computer 2a. The processing unit 2a1 may be configured to perform various control operations by reading a program from the storage unit 2a2 and executing the read program. This program may be stored in the storage unit 2a2 in advance, or it may be obtained via a medium when needed. The obtained program is stored in the storage unit 2a2 and read from the storage unit 2a2 and executed by the processing unit 2a1. The medium may be various storage media readable by the computer 2a, or it may be a communication line connected to the communication interface 2a3. The processing unit 2a1 may be a CPU (Central Processing Unit). The memory unit 2a2 may include RAM (Random Access Memory), ROM (Read Only Memory), HDD (Hard Disk Drive), SSD (Solid State Drive), or a combination thereof. The communication interface 2a3 may communicate with the plasma processing device 1 via a communication line such as a LAN (Local Area Network).

[0012] The following describes an example configuration of a capacitively coupled plasma processing apparatus as an example of a plasma processing apparatus 1. Figure 2 is a diagram illustrating an example configuration of a capacitively coupled plasma processing apparatus.

[0013] The capacitively coupled plasma processing apparatus 1 includes a plasma processing chamber 10, a gas supply unit 20, a power supply 30, and an exhaust system 40. The plasma processing apparatus 1 also includes a substrate support unit 11 and a gas introduction unit. The gas introduction unit is configured to introduce at least one processing gas into the plasma processing chamber 10. The gas introduction unit includes a shower head 13. The substrate support unit 11 is located inside the plasma processing chamber 10. The shower head 13 is located above the substrate support unit 11. In one embodiment, the shower head 13 constitutes at least a portion of the ceiling of the plasma processing chamber 10. The plasma processing chamber 10 has a plasma processing space 10s defined by the shower head 13, the side walls 10a of the plasma processing chamber 10, and the substrate support unit 11. The plasma processing chamber 10 is grounded. The shower head 13 and the substrate support unit 11 are electrically insulated from the housing of the plasma processing chamber 10.

[0014] The substrate support portion 11 includes a main body portion 111 and a ring assembly 112. The main body portion 111 has a central region 111a for supporting the substrate W and an annular region 111b for supporting the ring assembly 112. A wafer is an example of a substrate W. The annular region 111b of the main body portion 111 surrounds the central region 111a of the main body portion 111 in a plan view. The substrate W is placed on the central region 111a of the main body portion 111, and the ring assembly 112 is placed on the annular region 111b of the main body portion 111 so as to surround the substrate W on the central region 111a of the main body portion 111. Therefore, the central region 111a is also called the substrate support surface for supporting the substrate W, and the annular region 111b is also called the ring support surface for supporting the ring assembly 112.

[0015] In one embodiment, the main body 111 includes a base 1110 and an electrostatic chuck 1111. The base 1110 includes a conductive member. The conductive member of the base 1110 can function as a lower electrode. The electrostatic chuck 1111 is placed on the base 1110. The electrostatic chuck 1111 includes a ceramic member 1111a and an electrostatic electrode 1111b placed within the ceramic member 1111a. The ceramic member 1111a has a central region 111a. In one embodiment, the ceramic member 1111a also has an annular region 111b. Other members surrounding the electrostatic chuck 1111, such as an annular electrostatic chuck or an annular insulating member, may also have an annular region 111b. In this case, the ring assembly 112 may be placed on the annular electrostatic chuck or the annular insulating member, or on both the electrostatic chuck 1111 and the annular insulating member. Furthermore, at least one RF / DC electrode, which will be coupled to the RF power supply 31 and / or DC power supply 32 described later, may be placed within the ceramic member 1111a. In this case, at least one RF / DC electrode functions as a lower electrode. When a bias RF signal and / or DC signal, described later, is supplied to at least one RF / DC electrode, the RF / DC electrode is also called a bias electrode. Note that the conductive member of the base 1110 and at least one RF / DC electrode may function as multiple lower electrodes. Also, the electrostatic electrode 1111b may function as a lower electrode. Therefore, the substrate support portion 11 includes at least one lower electrode.

[0016] The ring assembly 112 includes one or more annular members. In one embodiment, the one or more annular members include one or more edge rings and at least one covering ring. The edge rings are formed of a conductive or insulating material, and the covering rings are formed of an insulating material.

[0017] The substrate support section 11 may also include a temperature control module configured to adjust at least one of the electrostatic chuck 1111, the ring assembly 112, and the substrate to a target temperature. The temperature control module may include a heater, a heat transfer medium, a flow path 1110a, or a combination thereof. A heat transfer fluid such as brine or gas flows through the flow path 1110a. In one embodiment, the flow path 1110a is formed within the base 1110, and one or more heaters are arranged within the ceramic member 1111a of the electrostatic chuck 1111. The substrate support section 11 may also include a heat transfer gas supply section configured to supply heat transfer gas to the gap between the back surface of the substrate W and the central region 111a.

[0018] The showerhead 13 is configured to introduce at least one processing gas from the gas supply unit 20 into the plasma processing space 10s. The showerhead 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b, and a plurality of gas inlet ports 13c. The processing gas supplied to the gas supply port 13a passes through the gas diffusion chamber 13b and is introduced into the plasma processing space 10s through the plurality of gas inlet ports 13c. The showerhead 13 also includes at least one upper electrode. In addition to the showerhead 13, the gas introduction unit may also include one or more side gas injectors (SGIs) attached to one or more openings formed in the side wall 10a.

[0019] The gas supply unit 20 may include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply unit 20 is configured to supply at least one processing gas to the shower head 13 from a corresponding gas source 21 via a corresponding flow controller 22. Each flow controller 22 may include, for example, a mass flow controller or a pressure-controlled flow controller. Furthermore, the gas supply unit 20 may include at least one flow modulation device that modulates or pulses the flow rate of at least one processing gas.

[0020] The power supply 30 includes an RF power supply 31 coupled to the plasma processing chamber 10 via at least one impedance matching circuit. The RF power supply 31 is configured to supply at least one RF signal (RF power) to at least one lower electrode and / or at least one upper electrode. This causes plasma to be formed from at least one processing gas supplied to the plasma processing space 10s. Thus, the RF power supply 31 can function as at least part of the plasma generation unit 12. Furthermore, by supplying a bias RF signal to at least one lower electrode, a bias potential is generated on the substrate W, and ionic components in the formed plasma can be drawn into the substrate W.

[0021] In one embodiment, the RF power supply 31 includes a first RF generation unit 31a and a second RF generation unit 31b. The first RF generation unit 31a is coupled to at least one lower electrode and / or at least one upper electrode via at least one impedance matching circuit and is configured to generate a source RF signal (source RF power) for plasma generation. In one embodiment, the source RF signal has a frequency in the range of 10 MHz to 150 MHz. In one embodiment, the first RF generation unit 31a may be configured to generate a plurality of source RF signals having different frequencies. One or more generated source RF signals are supplied to at least one lower electrode and / or at least one upper electrode.

[0022] The second RF generation unit 31b is coupled to at least one lower electrode via at least one impedance matching circuit and is configured to generate a bias RF signal (bias RF power). The frequency of the bias RF signal may be the same as or different from the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency lower than the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency in the range of 100 kHz to 60 MHz. In one embodiment, the second RF generation unit 31b may be configured to generate a plurality of bias RF signals having different frequencies. One or more generated bias RF signals are supplied to at least one lower electrode. In various embodiments, at least one of the source RF signal and the bias RF signal may be pulsed.

[0023] Furthermore, the power supply 30 may include a DC power supply 32 coupled to the plasma processing chamber 10. The DC power supply 32 includes a first DC generation unit 32a and a second DC generation unit 32b. In one embodiment, the first DC generation unit 32a is connected to at least one lower electrode and configured to generate a first DC signal. The generated first DC signal is applied to at least one lower electrode. In one embodiment, the second DC generation unit 32b is connected to at least one upper electrode and configured to generate a second DC signal. The generated second DC signal is applied to at least one upper electrode.

[0024] In various embodiments, the first and second DC signals may be pulsed. In this case, a sequence of voltage pulses is applied to at least one lower electrode and / or at least one upper electrode. The voltage pulses may have a rectangular, trapezoidal, triangular, or combination thereof pulse waveform. In one embodiment, a waveform generation unit for generating a sequence of voltage pulses from the DC signal is connected between the first DC generation unit 32a and at least one lower electrode. Thus, the first DC generation unit 32a and the waveform generation unit constitute a voltage pulse generation unit. When the second DC generation unit 32b and the waveform generation unit constitute a voltage pulse generation unit, the voltage pulse generation unit is connected to at least one upper electrode. The voltage pulses may have positive or negative polarity. Furthermore, the sequence of voltage pulses may include one or more positive voltage pulses and one or more negative voltage pulses within one period. The first and second DC generation units 32a and 32b may be provided in addition to the RF power supply 31, and the first DC generation unit 32a may be provided in place of the second RF generation unit 31b.

[0025] The exhaust system 40 may be connected to, for example, a gas outlet 10e located at the bottom of the plasma processing chamber 10. The exhaust system 40 may include a pressure regulating valve and a vacuum pump. The pressure regulating valve regulates the pressure in the plasma processing space 10s. The vacuum pump may include a turbomolecular pump, a dry pump, or a combination thereof.

[0026] The following refers to Figure 3. Figure 3 is a diagram showing a plasma processing apparatus according to one exemplary embodiment. As shown in Figure 3, the plasma processing apparatus 1 includes a power supply system 50. The power supply system 50 includes an RF generation unit 51, a bias power supply 52, and at least one sensor such as a sensor 55 or sensor 56, which will be described later.

[0027] The RF generation unit 51 includes the first RF generation unit 31a described above. The RF generation unit 51 is configured to supply a source RF signal HF (source high-frequency power) to generate plasma from gas in the chamber 10. The source RF signal HF has a source frequency fs. That is, the source RF signal HF has a sinusoidal waveform whose frequency (oscillation frequency) is the source frequency fs. The source frequency fs may be in the range of 10 MHz to 150 MHz.

[0028] The RF generation unit 51 is configured to supply a source RF signal HF to a high-frequency electrode. The high-frequency electrode may be provided within the substrate support unit 11. The high-frequency electrode may be at least one electrode provided within the conductive member or ceramic member 1111a of the base 1110. Alternatively, the high-frequency electrode may be an upper electrode. When the source RF signal HF is supplied to the high-frequency electrode, plasma is generated from the gas in the chamber 10.

[0029] The RF generation unit 51 may be electrically connected to the high-frequency electrode via a matching unit 53. The matching unit 53 has a variable impedance. The variable impedance of the matching unit 53 is set to reduce reflection of the source RF signal HF from the load. The matching unit 53 can be controlled, for example, by the control unit 2. The plasma processing apparatus 1 does not necessarily have to include a matching unit 53, and the RF generation unit 51 may be electrically connected to the high-frequency electrode without going through the matching unit 53. Alternatively, the RF generation unit 51 may be electrically connected to the high-frequency electrode via a circuit with a fixed impedance without going through the matching unit 53.

[0030] The bias power supply 52 is electrically coupled to the substrate support 11. The bias power supply 52 is electrically connected to the bias electrode in the substrate support 11. The bias electrode may be at least one electrode provided in the conductive member or ceramic member 1111a of the base 1110. The bias electrode may be common with the high-frequency electrode. The bias power supply 52 is configured to periodically supply an electrical bias EB to the bias electrode in order to draw ions from the plasma in the chamber 10 to the substrate W on the substrate support 11. The bias power supply 52 includes the second RF generation unit 31b or the first DC generation unit 32a described above.

[0031] The following diagram will refer to Figure 4 along with Figure 3. Figure 4 shows an example of an electrical bias waveform. The bias power supply 52 is configured to periodically supply an electrical bias EB having a waveform period Cb to the bias electrode. That is, the electrical bias EB is applied to the bias electrode in each of a plurality of waveform periods Cb, which are repetitions of the waveform period Cb. The waveform period Cb is defined by the bias frequency. The bias frequency is, for example, a frequency between 50 kHz and 27 MHz. The time length of the waveform period Cb is the reciprocal of the bias frequency. The bias frequency may be 13.56 MHz or less or 400 kHz or less.

[0032] The electrical bias EB may be a bias RF signal, i.e., a bias RF signal LF (bias high-frequency power) having a bias frequency. That is, the electrical bias EB may have a sinusoidal waveform whose frequency (oscillation frequency) is the bias frequency. In this case, the bias power supply 52 is electrically connected to the bias electrode via a matching circuit 54. The variable impedance of the matching circuit 54 is set to reduce reflection of the bias RF signal LF from the load.

[0033] Alternatively, the electrical bias EB may include a pulsed first DC signal, i.e., a voltage pulse VP. The voltage pulse VP is applied to the bias electrode with a waveform period Cb. The voltage pulse VP is applied to the bias electrode periodically at time intervals equal to the length of the waveform period Cb. The waveform of the voltage pulse VP may be a square wave, a triangular wave, or any other waveform. The polarity of the voltage of the voltage pulse VP is set so that a potential difference is created between the substrate W and the plasma, thereby attracting ions from the plasma to the substrate W. The voltage pulse VP is applied to the bias electrode such that the waveform period Cb includes a period during which the potential of the substrate W is negative. The voltage pulse VP applied to the bias electrode may have a negative potential, a positive potential, or a potential that varies between a positive and a negative potential. The voltage pulse VP may be a pulse of a negative voltage or a pulse of a negative DC voltage. Note that if the electrical bias EB is a voltage pulse VP, the plasma processing apparatus 1 does not need to be equipped with a matching unit 54.

[0034] Hereinafter, Figures 5(a) and 5(b) will be referenced together with Figures 3 and 4. Figures 5(a) and 5(b) are timing charts of an example of a source RF signal and electrical bias in a plasma processing apparatus according to one exemplary embodiment. In these figures, "ON" for the source RF signal HF indicates that the source RF signal HF is being supplied, and "OFF" for the source RF signal HF indicates that the supply of the source RF signal HF has been stopped. In Figure 5(b), "HIGH" for the source RF signal HF indicates that a source RF signal HF with a power level higher than the power level indicated by "LOW" is being supplied. In these figures, "ON" for the electrical bias EB indicates that the electrical bias EB is being supplied, and "OFF" for the electrical bias EB indicates that the supply of the electrical bias EB has been stopped. In Figure 5(b), "HIGH" for the electrical bias EB indicates that an electrical bias EB with a higher level than the level indicated by "LOW" is being supplied. Note that if the electrical bias EB is the bias RF signal LF, the level of the electrical bias EB is the power level of the bias RF signal LF. If the electrical bias EB includes a voltage pulse VP, the level of the electrical bias EB increases as the energy of the ions attracted to the substrate W increases. If the electrical bias EB includes a voltage pulse VP, the level of the electrical bias EB may also be the absolute value of the negative voltage level of the voltage pulse VP relative to a reference voltage (e.g., 0V).

[0035] The RF generation unit 51 is configured to supply a source RF signal HF in parallel with the periodic supply of an electrical bias EB from a bias power supply 52. ​​As shown in Figure 5(a), the electrical bias EB and the source RF signal HF may be supplied simultaneously and continuously from the start to the end of the process. That is, a continuous wave of the electrical bias EB and a continuous wave of the source RF signal HF may be supplied in parallel.

[0036] Alternatively, as shown in Figure 5(b), the pulses of the electrical bias EB and the source RF signal HF may be supplied periodically at a pulse period Cp (pulse generation period). In this case, the pulses of the electrical bias EB and the source RF signal HF may be supplied synchronously with each other during the pulse period PP within each pulse period Cp. That is, each of the pulse periods PP of multiple pulse periods Cp (in Figure 5(b), the pulse period PP) １ , PP ２ , PP ３In the above, the pulses of the electrical bias EB and the pulses of the source RF signal HF may be supplied simultaneously. Each pulse period PP includes multiple waveform periods Cb. That is, the electrical bias EB is supplied periodically during each pulse period PP. Alternatively, the supply periods of the electrical bias EB pulses and the supply periods of the source RF signal HF pulses may be shifted from each other within each pulse period Cp. The pulses of the electrical bias EB may be ON / OFF pulses that alternately take a supply state (ON state in Figure 5(b)) and a stop state (OFF state in Figure 5(b)). Alternatively, the pulses of the electrical bias EB may be HIGH / LOW pulses that alternately take a high level state (HIGH state in Figure 5(b)) and a low level state (LOW state in Figure 5(b)). Furthermore, the pulse of the source RF signal HF may be an ON / OFF pulse that alternates between a supply state (ON state in Figure 5(b)) and a stop state (OFF state in Figure 5(b)). Alternatively, the pulse of the source RF signal HF may be a HIGH / LOW pulse that alternates between a high level state (HIGH state in Figure 5(b)) and a low level state (LOW state in Figure 5(b)). Furthermore, the power level of the source RF signal HF may be modulated during the period when the source RF signal HF is ON. Furthermore, the power level of the source RF signal HF may be modulated during the period when the power level of the source RF signal HF is HIGH. Furthermore, the power level of the source RF signal HF may be modulated during the period when the power level of the source RF signal HF is LOW. Furthermore, when pulses for the electrical bias EB and pulses for the source RF signal HF are supplied, the level of the electrical bias EB and the signal level of the source RF signal HF may each change to two or more levels (multilevel) within the pulse period Cp.

[0037] Returning to Figure 3, the sensors of the RF generation unit 51 are configured to measure a first signal Sg1 and a second signal Sg2 in the supply line of the source RF signal HF. The sensors of the RF generation unit 51 may also include a sensor 55 and / or a sensor 56. Sensor 55 is a VI sensor (voltage / current measuring sensor) and is configured to measure the voltage Vhf and current Ihf of the source RF signal HF. Sensor 56 is a directional coupler and is configured to measure the traveling wave Pf and reflected wave Pr of the source RF signal HF. The first signal Sg1 and the second signal Sg2 may be the voltage Vhf and current Ihf measured by sensor 55, respectively. Alternatively, the first signal Sg1 and the second signal Sg2 may be the traveling wave Pf and reflected wave Pr measured by sensor 56, respectively.

[0038] As shown in Figure 3, the RF generation unit 51 includes a phase difference detector 51p, a voltage-controlled oscillator 51v, an amplifier 51a, and at least one delay circuit 51d. The phase difference detector 51p is configured to generate a voltage Vd having a level corresponding to the phase difference Pd between a first signal Sg1 and a second signal Sg2 at each phase in the repetition period RC. The repetition period RC may be the repetition period of the source RF signal HF or the electrical bias EB. The repetition period RC may be the waveform period Cb when a continuous wave of the electrical bias EB and a continuous wave of the source RF signal HF are supplied in parallel, as shown in Figure 5(a). The repetition period RC may be the pulse period Cp when a pulse of the electrical bias EB and a pulse of the source RF signal HF are supplied periodically, as shown in Figure 5(b).

[0039] FIG. 6 is a timing chart related to a plasma processing apparatus according to one exemplary embodiment. The above-described repetition cycle RC may be the cycle Cd of the process shown in FIG. 6. That is, the process applied to the substrate W in the chamber 10 of the plasma processing apparatus 1 may include a process that is periodically repeated with a cycle Cd. In this case, the process conditions are periodically changed with a cycle Cd. Within the cycle Cd, the process conditions change over time to at least two different states. In the example shown in FIG. 6, the cycle Cd includes a period PCA during which the process condition is condition CA and a period PCB during which the process condition is condition CB. Note that within the cycle Cd, the process conditions may change over time to three or more different states.

[0040] The change in the process conditions as shown in FIG. 6 can be brought about by the control of each part of the plasma processing apparatus 1 by the control unit 2. The change in the process conditions can include one or more of a change in the gas supplied into the chamber 10 by the gas supply unit 20, a change in the pressure in the chamber 10 adjusted by the exhaust system 40, etc., but is not limited to these changes in the process conditions.

[0041] Within the cycle Cd of the example shown in FIG. 6, pulses of the electrical bias EB can be periodically supplied with a pulse period Cp. That is, the cycle Cd of the process may include the repetition of the pulse period Cp. Also, within the cycle Cd of the process, pulses of the source RF signal HF may be periodically supplied with a pulse period Cp.

[0042] Returning to FIG. 3, the output of the phase difference detector 51p is connected to the input of the voltage controlled oscillator 51v. The voltage Vd output from the output of the phase difference detector 51p is input to the voltage controlled oscillator 51v. The voltage controlled oscillator 51v is configured to generate a signal Shf having a source frequency fs corresponding to the voltage Vd.

[0043] The output of the voltage-controlled oscillator 51v is connected to the input of the amplifier 51a. A signal Shf output from the output of the voltage-controlled oscillator 51v is input to the amplifier 51a. The amplifier 51a is configured to amplify the signal Shf to generate a source RF signal HF. The source RF signal HF generated by the amplification of the signal Shf has a source frequency fs corresponding to a phase difference Pd at each phase within the repetition period RC.

[0044] The delay circuit 51d is configured to delay a source RF signal HF having a source frequency fs corresponding to a phase difference Pd at each phase within the repetition period RC by a delay amount that is an integer multiple (k times) of the time length of the repetition period RC and output it from the RF generation unit 51. Here, "k" is an integer of 1 or more.

[0045] In one embodiment, the delay circuit 51d may include a delay circuit 515, a delay circuit 516, and a delay circuit 517. When the repetition period RC is the waveform period Cb, the delay circuit 515 is selected by the control unit 2 so as to provide a delay amount that is k times the time length of the waveform period Cb. When the repetition period RC is the pulse period Cp, the delay circuit 516 is selected by the control unit 2 so as to provide a delay amount that is k times the time length of the pulse period Cp. When the repetition period RC is the process period Cd, the delay circuit 517 is selected by the control unit 2 so as to provide a delay amount that is k times the time length of the period Cd.

[0046] FIG. 7 is a diagram showing an example of the relationship between the voltage generated by the phase difference detector and the frequency of the signal generated by the voltage-controlled oscillator. The phase difference detector 51p and the voltage-controlled oscillator 51v are preset so that, for example, the voltage Vd corresponding to the phase difference Pd and the source frequency fs corresponding to the voltage Vd have the relationship shown in FIG. 7 in order to reduce the degree of reflection of the source RF signal HF at each phase within the repetition period RC.

[0047] In the plasma processing apparatus 1, a source RF signal HF having a source frequency fs, which is set to reduce the degree of reflection according to the phase difference Pd in ​​each phase of the repetition period RC, is supplied at the same phase, delayed by a delay amount of k times the time length of the repetition period RC. Therefore, the degree of reflection of the source RF signal HF is reduced according to the plasma processing apparatus 1.

[0048] As shown in Figure 3, in one embodiment, the phase difference detector 51p may include a phase difference detection circuit 511 and a voltage converter 512. The phase difference detector 51p may further include a sub-delay circuit 513 and / or a filter 514.

[0049] The phase difference detection circuit 511 is configured to generate a first voltage V1 having a level corresponding to the phase difference Pd between the first signal Sg1 and the second signal Sg2 at each phase within the repetition period RC.

[0050] Figures 8(a) and 8(b) are diagrams illustrating examples of the relationship between the phase difference between two signals input to the phase difference detection circuit and the first voltage output from the phase difference detection circuit. The phase difference detection circuit 511 may have the characteristic that, as shown in Figure 8(a), the level of its output voltage, the first voltage V1, changes monotonically (for example, increases monotonically) in accordance with the phase difference Pd within the range of the assumed phase difference Pd.

[0051] Alternatively, the phase difference detection circuit 511 may have the characteristic of generating the same first voltage V1 for two different phase differences Pd within the range of the assumed phase difference Pd, as shown by the dashed line in Figure 8(b). In this case, a sub-delay circuit 513 is used. The sub-delay circuit 513 is connected between the sensor and the phase difference detection circuit 511. The sub-delay circuit 513 is configured to input to the phase difference detection circuit 511 a delayed first signal Sg1 or second signal Sg2, as shown by the solid line in Figure 8(b), so that the first voltage V1 increases monotonically in accordance with the phase difference Pd.

[0052] The output of the phase difference detection circuit 511 is connected to the input of the voltage converter 512 either directly or via the filter 514. That is, the first voltage V1 may be input directly from the phase difference detection circuit 511 to the voltage converter 512. Alternatively, the first voltage V1 may be input to the voltage converter 512 after its noise has been removed or reduced by the filter 514.

[0053] Figure 9 shows an example of the relationship between a first voltage input to a voltage converter and a second voltage output from the voltage converter. The voltage converter 512 is configured to generate a second voltage Vd by level conversion of the first voltage V1, as shown in Figure 9, for example. In this case, the voltage-controlled oscillator 51v generates a signal having a source frequency fs corresponding to the second voltage as the voltage Vd generated by the phase difference detector 51p. The voltage converter 512 is used to generate a voltage from the first voltage V1 that is suitable for generating a source RF signal HF having an appropriate source frequency fs in the voltage-controlled oscillator 51v. Note that if the first voltage V1 is a voltage suitable for generating a source RF signal HF having an appropriate source frequency fs in the voltage-controlled oscillator 51v, then voltage Vd may be the first voltage V1, and the phase difference detector 51p does not necessarily include the voltage converter 512.

[0054] As shown in Figure 3, the delay circuit 51d may be connected between the sensor and the phase difference detection circuit 511. In this case, the first signal Sg1 and the second signal Sg2 from the sensor are delayed by the delay circuit 51d by a delay amount of k times the time length of the repetition period RC, and then input to the phase difference detection circuit 511.

[0055] Alternatively, the delay circuit 51d may be connected between the phase difference detection circuit 511 and the voltage converter 512. The delay circuit 51d may also be connected between the phase difference detection circuit 511 and the filter 514, or between the filter 514 and the voltage converter 512. In this case, the first voltage V1 is delayed by the delay circuit 51d by a delay amount k times the time length of the repetition period RC, and then input to the voltage converter 512.

[0056] Alternatively, the delay circuit 51d may be connected between the voltage converter 512 and the voltage-controlled oscillator 51v. In this case, the voltage Vd is delayed by the delay circuit 51d by a delay amount of k times the time length of the repetition period RC, and then input to the voltage-controlled oscillator 51v.

[0057] Alternatively, the delay circuit 51d may be connected between the voltage-controlled oscillator 51v and the amplifier 51a. In this case, the signal Shf is delayed by the delay circuit 51d by a delay amount of k times the time length of the repetition period RC, and then input to the amplifier 51a.

[0058] According to the plasma processing apparatus 1, regardless of whether the delay circuit 51d is connected between the sensor and the phase difference detection circuit 511, between the phase difference detection circuit 511 and the voltage converter 512, between the voltage converter 512 and the voltage-controlled oscillator 51v, or between the voltage-controlled oscillator 51v and the amplifier 51a, a source RF signal HF having a source frequency fs set to reduce the degree of reflection according to the phase difference Pd at each phase of the repetition period RC is supplied at the same phase, delayed by a delay amount of k times the time length of the repetition period RC.

[0059] Hereinafter, with reference to Figure 10, a plasma processing apparatus according to another exemplary embodiment will be described. In the plasma processing apparatus 1B shown in Figure 10, the RF generation unit 51 has the same configuration as the RF generation unit 51 of the plasma processing apparatus 1, in addition to including a storage device 51m, a first voltage generator 51v1, a second voltage generator 51v2, and a switch 51s.

[0060] The memory device 51m is, for example, a memory device. The memory device 51m stores the source frequency fs or the voltage level corresponding to the source frequency fs for each phase within a first period, i.e., a period within at least a portion of the repetition cycle. The first period may be the plasma ignition period, i.e., the period from when the plasma is absent until the plasma is ignited. The source frequency fs for each phase within the first period is predetermined to reduce the degree of reflection of the source RF signal HF in each phase within the first period.

[0061] The first voltage generator 51v1 may be configured as in the processing circuit 130 described later, or it may be a dedicated circuit such as an ASIC. The first voltage generator 51v1 is configured to output from its output a voltage Vp having a level corresponding to the source frequency fs for each phase in the first period, by referring to the storage device 51m.

[0062] The second voltage generator 51v2 may be configured as shown in the processing circuit 130 described later, or it may be a dedicated circuit such as an ASIC. The second voltage generator 51v2 divides the waveform period Cb into multiple phase periods PH (i.e., phase period PH １ PH ２ ,・・・・, PH Ｎ The source frequency fs for each of the multiple phase periods PH (see Figure 4) is determined to reduce the degree of reflection of the source RF signal HF. The second voltage generator 51v2 determines the source frequency fs that reduces the degree of reflection of the source RF signal HF through feedback processing. The second voltage generator 51v2 outputs a voltage Vf from its output that corresponds to the source frequency fs determined for each of the multiple phase periods PH.

[0063] The degree of reflection used in the second voltage generator 51v2 may be the power level of the reflected wave Pr, or it may be the reflectance, i.e., the ratio of the power level of the reflected wave Pr to the power level of the traveling wave Pf. The reflected wave Pr and the traveling wave Pf are measured by the sensor 56. Alternatively, the degree of reflection may be the phase difference between the voltage Vhf and the current Ihf, the difference between the load impedance obtained from the voltage Vhf and the current Ihf and a predetermined impedance (e.g., 50Ω), etc. The voltage Vhf and the current Ihf are measured by the sensor 55.

[0064] In the feedback process, the second voltage generator 51v2 determines a source frequency fs that suppresses the degree of reflection of the source RF signal HF during the same phase period PH by using different source frequencies fs during the same phase period PH in the sequence of repetition period RC. In the example of Figure 5(a), the sequence of repetition period RC is a sequence of waveform period Cb. In the example of Figure 5(b), the sequence of repetition period RC may be a sequence of pulse period Cp. Alternatively, in the example of Figure 5(b), the sequence of repetition period RC may be a sequence of pulse period Cp for the first partial period within the pulse period PP, and a sequence of waveform period Cb for the second partial period following the first partial period within the pulse period PP. Furthermore, in the example of Figure 6, the sequence of repetition period RC is a sequence of period Cd.

[0065] The switch 51s is configured to switchably connect the output of the phase difference detector 51p, the output of the first voltage generator 51v1, and the output of the second voltage generator 51v2 to the input of the voltage-controlled oscillator 51v. The switch 51s can be controlled by the control unit 2. When the switch 51s connects the output of the phase difference detector 51p to the input of the voltage-controlled oscillator 51v, a signal Shf is generated from the voltage Vd. When the switch 51s connects the output of the first voltage generator 51v1 to the input of the voltage-controlled oscillator 51v, a signal Shf is generated from the voltage Vp. When the switch 51s connects the output of the second voltage generator 51v2 to the input of the voltage-controlled oscillator 51v, a signal Shf is generated from the voltage Vf.

[0066] In one embodiment, the control unit 2 may control the switch 51s to connect the output of the first voltage generator 51v1 to the input of the voltage-controlled oscillator 51v during the plasma ignition period in the chamber 10. The plasma ignition period begins when the supply of the source RF signal is started while no plasma is present in the chamber 10. The plasma ignition period may have a predetermined duration. Alternatively, the plasma ignition period may end when plasma ignition is confirmed by a sensor. In the example of Figure 5(b), the plasma ignition period is the first pulse period PP １This period may start from the beginning of one pulse period, or it may start from the beginning of each of the multiple pulse periods PP.

[0067] The control unit 2 may control the switch 51s to connect the output of the phase difference detector 51p to the input of the voltage-controlled oscillator 51v after the plasma ignition period. The period during which the output of the phase difference detector 51p is connected to the input of the voltage-controlled oscillator 51v may be a transient period until the plasma stabilizes. The period during which the output of the phase difference detector 51p is connected to the input of the voltage-controlled oscillator 51v may have a predetermined duration, or it may end when the degree of reflection described above falls below a threshold.

[0068] Next, the control unit 2 may control the switch 51s to connect the output of the second voltage generator 51v2 to the input of the voltage-controlled oscillator 51v, for example, during the period after the transient period (for example, the period when the plasma is stable). If the degree of reflection described above becomes greater than a threshold while the switch 51s is connected to the input of the second voltage generator 51v2 to the input of the voltage-controlled oscillator 51v, the control unit 2 may reconnect the output of the phase difference detector 51p to the input of the voltage-controlled oscillator 51v.

[0069] The following describes a method for controlling the source frequency according to one exemplary embodiment, with reference to Figure 11. Figure 11 is a flowchart showing a method for controlling the source frequency according to one exemplary embodiment. The control method shown in Figure 11 (hereinafter referred to as "Method MT") includes step STr. Method MT may further include steps STp and STf. Method MT is performed using the plasma processing apparatus 1B. If Method MT includes only step STr, which will be described later, Method MT may be performed using the plasma processing apparatus 1 or the plasma processing apparatus 1B. In Method MT, each part of the plasma processing apparatus can be controlled by the control unit 2.

[0070] In step STp, the source RF signal HF is generated using data from the storage device 51m and output from the RF generation unit 51. Specifically, as described above, the first voltage generator 51v1 generates a voltage Vp by referring to the storage device 51m, and the signal Shf is generated by inputting the voltage Vp to the voltage-controlled oscillator 51v. The signal Shf is then amplified by the amplifier 51a to generate the source RF signal. As described above, step STp may be performed during the plasma ignition period. In this case, method MT includes step STJ1. If it is determined in step STJ1 that plasma ignition is not complete, step STp continues. If it is determined in step STJ1 that plasma ignition is complete, the process moves to step STr.

[0071] Process STr includes processes STa, STb, STc, and STd. In process STa, a voltage Vd having a level corresponding to the phase difference Pd between a first signal Sg1 and a second signal Sg2 at each phase within the repetition period RC is generated by the phase difference detector 51p as described above.

[0072] In step STb, a signal Shf having a source frequency fs corresponding to the voltage Vd is generated by the voltage-controlled oscillator 51v as described above.

[0073] In step STc, as described above, the signal Shf is amplified by the amplifier 51a to generate a source RF signal HF having a source frequency fs corresponding to the phase difference Pd at each phase within the repetition period RC.

[0074] When process STd is performed, a source RF signal HF having a source frequency fs corresponding to the phase difference Pd in ​​each phase within the repetition period RC is delayed by the delay circuit 51d by a delay amount of k times the time length of the repetition period RC and output from the RF generation unit 51. As described above, the delay circuit 51d may also provide delay amounts to the first signal Sg1 and the second signal Sg2. In this case, as shown in Figure 11, process STd is performed before process STa. Alternatively, the delay circuit 51d may provide a delay amount to the first voltage V1. Alternatively, the delay circuit 51d may provide a delay amount to the voltage Vd. In this case, process STd is performed between process STa and process STb. Alternatively, the delay circuit 51d may provide a delay amount to the signal Shf. In this case, process STd is performed between process STb and process STc.

[0075] As described above, process STR may be performed during the transient period following the ignition period. In this case, in process STJ2 following process STR, it is determined whether or not the transient period has been completed. As described above, the transient period may have a predetermined duration, or it may be completed when the degree of reflection is below a threshold. If it is determined in process STJ2 that the transient period has not been completed, the process returns to process STR. If it is determined in process STJ2 that the transient period has been completed, the process moves to process STf.

[0076] In process STf, the feedback processing described above is performed using the second voltage generator 51v2. Process STf may be performed during the plasma stabilization period after the transient period, as described above. In process STJ3, which follows process STf, it is determined whether or not the stop condition is met. The stop condition is met when the end of the process is reached. If it is determined in process STJ3 that the stop condition is not met, process STJ4 is performed. In process STJ4, it is determined whether or not to return to process STr. If it is determined in process STJ4 that the degree of reflection is greater than the threshold, the process returns to process STr. On the other hand, if it is determined in process STJ4 that the degree of reflection is less than or equal to the threshold, process STf is performed again. Method MT terminates if it is determined in process STJ3 that the stop condition is met.

[0077] Examples of processing circuits that can be used as one or more processing circuits in the plasma processing apparatus 1, such as the control unit 2, the first voltage generator 51v1, and the second voltage generator 51v2, are described below. Figure 12 is a block diagram of a processing circuit that performs the operations described herein on a computer. Figure 12 illustrates a processing circuit 130 that can be used to control control processing on any computer. Descriptions or blocks in a flowchart represent modules, segments, or parts of code that contain one or more executable instructions for performing a particular logical function or step of processing. As will be understood by those skilled in the art, depending on the relevant functions, other embodiments having functions that can be executed in an order different from the illustrated or described order, such as substantially simultaneously or in reverse order, are included within the scope of the exemplary embodiments of this disclosure. The various elements, features, and processes described herein may be used independently of each other or combined in various ways. Any conceivable combination and partial combination may be included within the scope of this disclosure.

[0078] In Figure 12, the processing circuit 130 includes a CPU 1200 that performs one or more of the control processes described above / below. Processing data and instructions may be stored in memory 1202. These processing data and instructions may also be stored on a storage medium disk 1204 such as a hard disk drive (HDD) or portable storage medium, or stored remotely. Furthermore, the present disclosure as described in the claims is not limited to the form of the computer-readable medium on which the processing instructions according to the present invention are stored. For example, these instructions may be stored on a CD, DVD, flash memory, RAM, ROM, PROM, EPROM, EEPROM, hard disk, or any other information processing device such as a server and / or computer with which the processing circuit 130 communicates.

[0079] Furthermore, the disclosure described in the claims may be provided as a utility application, a background daemon, an operating system component, or a combination thereof, and may be executed in conjunction with the CPU 1200 and an operating system known to those skilled in the art, such as Microsoft Windows®, UNIX®, Solaris®, Linux®, or Apple Mac-OS.

[0080] The hardware elements that constitute the processing circuit 130 can be realized by various circuit elements. Furthermore, each function of the above-described embodiment can be implemented by a circuit that includes one or more processing circuits. As shown in Figure 12, the processing circuit includes a processing unit with a specific program, for example, a processing unit (CPU) 1200. The processing circuit also includes devices such as application-specific integrated circuits (ASICs) or conventional circuit components configured to perform the described functions.

[0081] In Figure 12, the processing circuit 130 includes a CPU 1200 that performs the processing described above. The processing circuit 130 may be a general-purpose computer or a specific dedicated machine. In one embodiment, if the processing unit 1200 is programmed to control various parts of the plasma processing unit 1, such as the power supply system 50 and the gas supply unit 20, the processing circuit 130 functions as a specific dedicated machine.

[0082] Alternatively, the CPU 1200 may be implemented on an FPGA, ASIC, PLD, or using discrete logic circuits, as will be understood by those skilled in the art. Furthermore, the CPU 1200 may be implemented as a plurality of processing units cooperating to execute the instructions for the processing of the present invention described above in parallel.

[0083] The processing circuit 130 in Figure 12 also includes a network controller 1206 for interface connection with the network 1228, such as an Intel Ethernet PRO network interface card from Intel Corporation. The network 1228 may be a public network such as the Internet, a private network such as a LAN or WAN, or any combination thereof, and may also include a subnetwork such as a PSTN or ISDN. The network 1228 may also be wired, such as an Ethernet network, or wireless, such as a cellular network including EDGE, 3G, or 4G wireless cellular systems. The wireless network may also be Wi-Fi, Bluetooth®, or any other known form of wireless communication.

[0084] The processing circuit 130 further includes a display device controller 1208, such as a graphics card or graphics adapter, for interface connection with a display device 1210, such as a monitor. A general-purpose I / O interface 1212 is interface-connected to a keyboard and / or mouse 1214, and a touch panel 1216, which is integrated with or separate from the display device 1210. The general-purpose I / O interface is also connected to various peripheral devices 1218, such as printers and scanners.

[0085] The storage device controller 1224 is connected to the storage medium disk 1204 via a communication bus 1226 such as ISA, EISA, VESA, or PCI, and all components of the processing circuit 130 are connected to each other. For the sake of simplicity, the general features and functions of the display device 1210, keyboard and / or mouse 1214, as well as the display device controller 1208, storage device controller 1224, network controller 1206, voice controller 1220, and general-purpose I / O interface 1212 are assumed to be known and therefore omitted from this specification.

[0086] The exemplary circuit elements described herein are replaceable with other elements and may have structures different from those described herein. Furthermore, circuits configured to implement the features described herein may be implemented in multiple circuit units (e.g., chips), or these features may be incorporated into a single chipset circuit.

[0087] The functions and features described herein may also be performed by various components distributed across the system. For example, one or more processing units may perform the functions of these systems, in which case the processing units are distributed across multiple components communicating within a network. Distributed components may include various human interfaces and communication devices (display monitors, smartphones, tablets, personal digital assistants (PDAs), etc.), as well as one or more client and server machines that can share processing. The network may be a private network such as a LAN or WAN, or a public network such as the Internet. Input to the system may be received by direct user input, or remotely in real time or as batch processing. Furthermore, some embodiments may be implemented on modules or hardware that are not identical to those described above. Therefore, other embodiments are also included in the claims.

[0088] Although various exemplary embodiments have been described above, the invention is not limited to the exemplary embodiments described above, and various additions, omissions, substitutions, and modifications may be made. Furthermore, it is possible to combine elements from different embodiments to form other embodiments.

[0089] Herein, various exemplary embodiments included in this disclosure are described in [E1] to [E19] below.

[0090] [E1] A chamber; a substrate support within the chamber; an RF generation unit configured to supply a source RF signal to generate plasma from a gas within the chamber; a bias power supply electrically coupled to the substrate support and configured to periodically supply an electrical bias to draw ions from the plasma to a substrate on the substrate support; a sensor configured to measure a first signal and a second signal in the source RF signal supply line, wherein the first signal and the second signal are the voltage and current of the source RF signal, or the forward wave and reflected wave of the source RF signal, respectively; the RF generation unit comprises: a phase difference detector configured to generate a voltage having a level corresponding to the phase difference between the first signal and the second signal in each phase within the repetition period; a voltage-controlled oscillator configured to generate a signal having a source frequency corresponding to the voltage generated by the phase difference detector; and an amplifier configured to amplify the signal generated by the voltage-controlled oscillator to generate the source RF signal having a source frequency corresponding to the phase difference in each phase within the repetition period. A plasma processing apparatus comprising: at least one delay circuit configured to output from the RF generation unit the source RF signal having the source frequency corresponding to the phase difference in each phase within the repetition period, with the delay being an integer multiple of the time length of the repetition period.

[0091] [E2] The plasma processing apparatus according to E1, wherein the repetition period is the waveform period of the electrical bias.

[0092] [E3] The plasma processing apparatus according to E1, wherein the repetition period is the generation period of the pulse of the source RF signal or the pulse of the electrical bias.

[0093] [E4] The plasma processing apparatus according to E1, wherein the repetition period is the period of a periodically repeated process.

[0094] [E5] The plasma processing apparatus according to any one of E1 to E4, wherein the phase difference detector includes a phase difference detection circuit configured to generate a first voltage having a level corresponding to the phase difference between the first signal and the second signal at each phase in the repetition period, and a voltage converter configured to generate a second voltage by level conversion of the first voltage generated by the phase difference detection circuit, and the voltage-controlled oscillator is configured to generate a signal having the source frequency corresponding to the second voltage as the voltage generated by the phase difference detector.

[0095] [E6] The plasma processing apparatus according to E5, wherein the phase difference detector further includes a sub-delay circuit connected between the sensor and the phase difference detection circuit, the sub-delay circuit is configured to delay the first signal or the second signal and input it to the phase difference detection circuit such that the level of the first voltage changes monotonically according to the phase difference.

[0096] [E7] The plasma processing apparatus according to E5 or E6, wherein the delay circuit is connected between the sensor and the phase difference detection circuit, between the phase difference detection circuit and the voltage converter, between the voltage converter and the voltage-controlled oscillator, or between the voltage-controlled oscillator and the amplifier.

[0097] [E8] The plasma processing apparatus according to any one of E5 to E7, further comprising: a first voltage generator configured to output a voltage having a level corresponding to a source frequency for each phase within the iteration period stored in a memory device; a second voltage generator configured to output a voltage having a level corresponding to a source frequency that reduces the degree of reflection of the source RF signal in accordance with the degree of reflection of the source RF signal in past same phase periods for each phase period within the iteration period; and a switch configured to switchably connect the output of the phase difference detector, the output of the first voltage generator, and the output of the second voltage generator to the input of the voltage control oscillator.

[0098] [E9] The plasma processing apparatus according to E8, further comprising a control unit configured to control a switch so that the output of the first voltage generator is connected to the input of the voltage-controlled oscillator during the plasma ignition period, the output of the phase difference detector is connected to the input of the voltage-controlled oscillator during the period after the plasma ignition period, and then the output of the second voltage generator is connected to the input of the voltage-controlled oscillator.

[0099] [E10] An RF generation unit configured to supply a source RF signal to generate plasma from a gas in a chamber of a plasma processing apparatus; a bias power supply electrically coupled to a substrate support in the chamber and configured to periodically supply an electrical bias to draw ions from the plasma to a substrate on the substrate support; a sensor configured to measure a first signal and a second signal in the source RF signal supply line, wherein the first signal and the second signal are the voltage and current of the source RF signal, or the forward wave and reflected wave of the source RF signal, respectively; the RF generation unit comprises: a phase difference detector configured to generate a voltage having a level corresponding to the phase difference between the first signal and the second signal at each phase within the repetition period of the source RF signal or the electrical bias; a voltage-controlled oscillator configured to generate a signal having a source frequency corresponding to the voltage generated by the phase difference detector; and an amplifier configured to amplify the signal generated by the voltage-controlled oscillator to generate the source RF signal having a source frequency corresponding to the phase difference at each phase within the repetition period. A power supply system comprising: at least one delay circuit configured to output from the RF generation unit the source RF signal having the source frequency corresponding to the phase difference in each phase within the repetition period, with the delay being an integer multiple of the time length of the repetition period.

[0100] [E11] The power supply system according to E10, wherein the repetition period is the waveform period of the electrical bias.

[0101] [E12] The power supply system according to E10, wherein the repetition period is the generation period of the pulse of the source RF signal or the pulse of the electrical bias.

[0102] [E13] The power supply system according to E10, wherein the repetition period is the period of a periodically repeated process.

[0103] [E14] The power supply system according to any one of E10 to E13, wherein the phase difference detector includes a phase difference detection circuit configured to generate a first voltage having a level corresponding to the phase difference between the first signal and the second signal at each phase in the repetition period, and a voltage converter configured to generate a second voltage by level conversion of the first voltage generated by the phase difference detection circuit, and the voltage-controlled oscillator configured to generate a signal having the source frequency corresponding to the second voltage.

[0104] [E15] The power supply system according to E14, wherein the phase difference detector further includes a sub-delay circuit connected between the sensor and the phase difference detection circuit, the sub-delay circuit is configured to delay the first signal or the second signal and input it to the phase difference detection circuit such that the level of the first voltage changes monotonically according to the phase difference.

[0105] [E16] The power supply system according to E14 or E15, wherein the delay circuit is connected between the sensor and the phase difference detection circuit, between the phase difference detection circuit and the voltage converter, between the voltage converter and the voltage-controlled oscillator, or between the voltage-controlled oscillator and the amplifier.

[0106] [E17] The power supply system according to any one of E14 to E16, further comprising: a first voltage generator configured to output a voltage having a level corresponding to a source frequency for each phase within the iteration period stored in a memory device; a second voltage generator configured to output a voltage having a level corresponding to a source frequency that reduces the degree of reflection in accordance with the degree of reflection of the source RF signal in past same phase periods for each phase period within the iteration period; and a switch configured to switchably connect the output of the phase difference detector, the output of the first voltage generator, and the output of the second voltage generator to the input of the voltage control oscillator.

[0107] [E18] The power supply system according to E17, further comprising a control unit configured to control a switch so that the output of the first voltage generator is connected to the input of the voltage-controlled oscillator during the plasma ignition period, the output of the phase difference detector is connected to the input of the voltage-controlled oscillator during the period after the plasma ignition period, and then the output of the second voltage generator is connected to the input of the voltage-controlled oscillator.

[0108] [E19] A method for controlling the source frequency in a plasma processing apparatus, the plasma processing apparatus comprising: a chamber; a substrate support within the chamber; an RF generation unit configured to supply a source RF signal for generating plasma from a gas within the chamber; a bias power supply electrically coupled to the substrate support and configured to periodically supply an electrical bias for drawing ions from the plasma onto a substrate on the substrate support; and a sensor configured to measure a first signal and a second signal in the source RF signal supply line, wherein the first signal and the second signal are, respectively, the voltage and current of the source RF signal or the forward wave and reflected wave of the source RF signal, the control method comprising: (a) a step of generating a voltage in a phase difference detector having a level corresponding to the phase difference between the first signal and the second signal at each phase in the repetition period; and (b) a step of generating a signal in a voltage-controlled oscillator having a source frequency corresponding to the voltage generated by the phase difference detector. A method for controlling the source frequency, comprising: (c) in an amplifier, amplifying the signal generated by the voltage-controlled oscillator to generate a source RF signal having a source frequency corresponding to the phase difference in each phase within the repetition period; and (d) delaying the source RF signal having a source frequency corresponding to the phase difference in each phase within the repetition period by at least one delay circuit to output it from the RF generation unit by an integer multiple of the time length of the repetition period.

[0109] From the above description, it will be understood that the various embodiments of this disclosure are described herein for illustrative purposes and can be modified in various ways without departing from the scope and spirit of this disclosure. Accordingly, the various embodiments disclosed herein are not intended to limit the scope and spirit, and the true scope and spirit are shown by the appended claims.

[0110] 1...Plasma processing apparatus, 2...Control unit, 10...Chamber, 11...Substrate support unit, 50...Power supply system, 51...RF generation unit, 51p...Phase difference detector, 51v...Voltage-controlled oscillator, 51a...Amplifier, 51d...Delay circuit, 52...Bias power supply, 55, 56...Sensors.

Claims

1. A chamber; a substrate support within the chamber; an RF generation unit configured to supply a source RF signal to generate plasma from a gas within the chamber; a bias power supply electrically coupled to the substrate support and configured to periodically supply an electrical bias to draw ions from the plasma to a substrate on the substrate support; and a sensor configured to measure a first signal and a second signal in the source RF signal supply line, wherein the first signal and the second signal are the voltage and current of the source RF signal, or the forward wave and reflected wave of the source RF signal, respectively; the RF generation unit comprises: a phase difference detector configured to generate a voltage having a level corresponding to the phase difference between the first signal and the second signal in each phase within the repetition period; a voltage-controlled oscillator configured to generate a signal having a source frequency corresponding to the voltage generated by the phase difference detector; and an amplifier configured to amplify the signal generated by the voltage-controlled oscillator to generate the source RF signal having a source frequency corresponding to the phase difference in each phase within the repetition period. A plasma processing apparatus comprising: at least one delay circuit configured to output from the RF generation unit the source RF signal having the source frequency corresponding to the phase difference in each phase within the repetition period, with the delay being an integer multiple of the time length of the repetition period.

2. The plasma processing apparatus according to claim 1, wherein the repetition period is the waveform period of the electrical bias.

3. The plasma processing apparatus according to claim 1, wherein the repetition period is the generation period of the pulse of the source RF signal or the pulse of the electrical bias.

4. The plasma processing apparatus according to claim 1, wherein the repetition period is the period of a periodically repeated process.

5. The plasma processing apparatus according to any one of claims 1 to 4, wherein the phase difference detector includes a phase difference detection circuit configured to generate a first voltage having a level corresponding to the phase difference between the first signal and the second signal at each phase in the repetition period, and a voltage converter configured to generate a second voltage by level conversion of the first voltage generated by the phase difference detection circuit, and the voltage-controlled oscillator is configured to generate a signal having a source frequency corresponding to the second voltage as the voltage generated by the phase difference detector.

6. The plasma processing apparatus according to claim 5, wherein the phase difference detector further includes a sub-delay circuit connected between the sensor and the phase difference detection circuit, the sub-delay circuit is configured to delay the first signal or the second signal and input it to the phase difference detection circuit such that the level of the first voltage changes monotonically according to the phase difference.

7. The plasma processing apparatus according to claim 5, wherein the delay circuit is connected between the sensor and the phase difference detection circuit, between the phase difference detection circuit and the voltage converter, between the voltage converter and the voltage-controlled oscillator, or between the voltage-controlled oscillator and the amplifier.

8. The plasma processing apparatus according to claim 5, further comprising: a first voltage generator configured to output a voltage having a level corresponding to a source frequency for each phase within the iteration period stored in a memory device; a second voltage generator configured to output a voltage having a level corresponding to a source frequency that reduces the degree of reflection in accordance with the degree of reflection of the source RF signal in past same phase periods for each phase period within the iteration period; and a switch configured to switchably connect the output of the phase difference detector, the output of the first voltage generator, and the output of the second voltage generator to the input of the voltage control oscillator.

9. The plasma processing apparatus according to claim 8, further comprising a control unit configured to control a switch so as to connect the output of the first voltage generator to the input of the voltage-controlled oscillator during the plasma ignition period, connect the output of the phase difference detector to the input of the voltage-controlled oscillator during the period after the plasma ignition period, and then connect the output of the second voltage generator to the input of the voltage-controlled oscillator.

10. A plasma processing apparatus comprising: an RF generation unit configured to supply a source RF signal to generate plasma from a gas in a chamber of the plasma processing apparatus; a bias power supply electrically coupled to a substrate support in the chamber and configured to periodically supply an electrical bias to draw ions from the plasma to a substrate on the substrate support; and a sensor configured to measure a first signal and a second signal in the source RF signal supply line, wherein the first signal and the second signal are the voltage and current of the source RF signal, or the forward wave and reflected wave of the source RF signal, respectively; the RF generation unit comprising: a phase difference detector configured to generate a voltage having a level corresponding to the phase difference between the first signal and the second signal in each phase within the repetition period; a voltage-controlled oscillator configured to generate a signal having a source frequency corresponding to the voltage generated by the phase difference detector; and an amplifier configured to amplify the signal generated by the voltage-controlled oscillator to generate the source RF signal having a source frequency corresponding to the phase difference in each phase within the repetition period. A power supply system comprising: at least one delay circuit configured to output from the RF generation unit the source RF signal having the source frequency corresponding to the phase difference in each phase within the repetition period, with the delay being an integer multiple of the time length of the repetition period.

11. The power supply system according to claim 10, wherein the repetition period is the waveform period of the electrical bias.

12. The power supply system according to claim 10, wherein the repetition period is the generation period of the pulse of the source RF signal or the pulse of the electrical bias.

13. The power supply system according to claim 10, wherein the repetition period is the period of a periodically repeated process.

14. The power supply system according to any one of claims 10 to 13, wherein the phase difference detector includes a phase difference detection circuit configured to generate a first voltage having a level corresponding to the phase difference between the first signal and the second signal at each phase in the repetition period, and a voltage converter configured to generate a second voltage by level conversion of the first voltage generated by the phase difference detection circuit, and the voltage-controlled oscillator configured to generate a signal having the source frequency corresponding to the second voltage.

15. The power supply system according to claim 14, wherein the phase difference detector further includes a sub-delay circuit connected between the sensor and the phase difference detection circuit, the sub-delay circuit is configured to delay the first signal or the second signal and input it to the phase difference detection circuit such that the level of the first voltage changes monotonically according to the phase difference.

16. The power supply system according to claim 14, wherein the delay circuit is connected between the sensor and the phase difference detection circuit, between the phase difference detection circuit and the voltage converter, between the voltage converter and the voltage-controlled oscillator, or between the voltage-controlled oscillator and the amplifier.

17. The power supply system according to claim 14, further comprising: a first voltage generator configured to output a voltage having a level corresponding to a source frequency for each phase within the iteration period stored in a memory device; a second voltage generator configured to output a voltage having a level corresponding to a source frequency that reduces the degree of reflection in accordance with the degree of reflection of the source RF signal in past same phase periods for each phase period within the iteration period; and a switch configured to switchably connect the output of the phase difference detector, the output of the first voltage generator, and the output of the second voltage generator to the input of the voltage control oscillator.

18. The power supply system according to claim 17, further comprising a control unit configured to control a switch so that the output of the first voltage generator is connected to the input of the voltage-controlled oscillator during the plasma ignition period, the output of the phase difference detector is connected to the input of the voltage-controlled oscillator during the period after the plasma ignition period, and then the output of the second voltage generator is connected to the input of the voltage-controlled oscillator.

19. A method for controlling the source frequency in a plasma processing apparatus, the plasma processing apparatus comprising: a chamber; a substrate support within the chamber; an RF generation unit configured to supply a source RF signal for generating plasma from a gas within the chamber; a bias power supply electrically coupled to the substrate support and configured to periodically supply an electrical bias for drawing ions from the plasma onto a substrate on the substrate support; and a sensor configured to measure a first signal and a second signal in the source RF signal supply line, wherein the first signal and the second signal are, respectively, the voltage and current of the source RF signal or the forward and reflected waves of the source RF signal, the control method comprising: (a) a step of generating a voltage in a phase difference detector having a level corresponding to the phase difference between the first signal and the second signal at each phase in the repetition period; and (b) a step of generating a signal in a voltage-controlled oscillator having a source frequency corresponding to the voltage generated by the phase difference detector. A method for controlling the source frequency, comprising: (c) in an amplifier, amplifying the signal generated by the voltage-controlled oscillator to generate a source RF signal having a source frequency corresponding to the phase difference in each phase within the repetition period; and (d) delaying the source RF signal having a source frequency corresponding to the phase difference in each phase within the repetition period by at least one delay circuit to output it from the RF generation unit by an integer multiple of the time length of the repetition period.

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