Multilayer ceramic capacitor, circuit board, and semiconductor composite device

Abstract

A multilayer ceramic capacitor 1A comprises: an element body 10 including therein a plurality of capacitor functional portions 15 each having a structure in which first internal electrodes 16a and second internal electrodes 16b are alternately stacked with dielectric layers 17 interposed therebetween; and a plurality of through-via electrodes 20 each including a first main surface electrode 21a formed on a first main surface 11a of the element body 10, a second main surface electrode 21b formed on a second main surface 11b of the element body 10, and a through-hole electrode 22 connecting the first main surface electrode 21a and the second main surface electrode 21b to each other. The plurality of through-via electrodes 20 include: a first through-via electrode 20a in which the through-hole electrode 22 is connected to the first internal electrodes 16a; and a second through-via electrode 20b in which the through-hole electrode 22 is connected to the second internal electrodes 16b. The surface of the through-hole electrode 22 has a plurality of protrusions 50, and the plurality of protrusions 50 include, in a cross-sectional view, at least one of: a first protrusion 50a located on the element body 10 side of a straight line 19a connecting end portions 18b of the dielectric layers 17; and a second protrusion 50b located on the element body 10 side of a straight line 19b connecting end portions 18a of the first internal electrodes 16a or the second internal electrodes 16b.

Description

Multilayer Ceramic Capacitor, Circuit Board, and Semiconductor Composite Device

[0001] The present invention relates to a multilayer ceramic capacitor, a circuit board, and a semiconductor composite device.

[0002] In the fields of AI and servers, etc., the power consumption has been increasing year by year, and improvement in the efficiency of power supply circuits is required. By incorporating capacitors into the substrate, it is possible to improve efficiency by reducing impedance and space. As a capacitor incorporated into the substrate, as disclosed in Patent Document 1, there is proposed a capacitor having a capacitor main surface and a capacitor back surface, and a capacitor body having a structure in which dielectric layers and internal plane electrode layers are alternately laminated, a plurality of via conductors for connecting the internal plane electrode layers to each other, and a surface electrode connected to at least the end portions on the capacitor main surface side of the plurality of via conductors, and the plurality of via conductors are arranged in an array as a whole. Here, the plurality of via conductors are formed by forming a large number of via holes penetrating a green sheet laminate, filling each via hole with a nickel paste for via conductors, and then firing the green sheet laminate at a predetermined temperature for a predetermined time.

[0003] Japanese Patent No. 4795861

[0004] However, in the method of forming the via conductors (through-hole electrodes) described in Patent Document 1, due to differences in shrinkage rates during firing, the adhesion strength between the via conductors and the body composed of the dielectric layer and the internal plane electrode layer (internal electrodes) may be insufficient.

[0005] The present invention has been made to solve the above problems, and an object thereof is to provide a multilayer ceramic capacitor capable of enhancing the adhesion force between the through-hole electrodes and the body, a circuit board provided with such a multilayer ceramic capacitor, and a semiconductor composite device.

[0006] In a first aspect, the present invention is a multilayer ceramic capacitor comprising: a base body containing a plurality of capacitor functional parts, each having a structure in which first internal electrodes and second internal electrodes are alternately stacked and arranged via dielectric layers; a plurality of through-via electrodes each having a first main surface electrode formed on a first main surface of the base body, a second main surface electrode formed on a second main surface of the base body, and a through-hole electrode connecting the first main surface electrode and the second main surface electrode to each other; wherein the plurality of through-via electrodes include a first through-via electrode in which the through-hole electrode is connected to the first internal electrode, and a second through-via electrode in which the through-hole electrode is connected to the second internal electrode; and the surface of the through-hole electrode has a plurality of protrusions, each of which, when viewed in cross-section, includes at least one of a first protrusion that extends inward from the straight line connecting the ends of the dielectric layers toward the base body, and a second protrusion that extends inward from the straight line connecting the ends of the first internal electrode or the second internal electrode toward the base body.

[0007] In a second embodiment, the present invention is a circuit board that incorporates a multilayer ceramic capacitor according to the first embodiment, and comprises a first wiring layer connected to the first main surface electrode and a second wiring layer connected to the second main surface electrode.

[0008] In a third aspect, the present invention is a circuit board comprising a multilayer ceramic capacitor according to the first aspect, a voltage regulator, and a core substrate, wherein the multilayer ceramic capacitor and the voltage regulator are embedded in the core substrate.

[0009] In a fourth aspect, the present invention is a semiconductor composite device comprising a voltage regulator and a semiconductor package, wherein the semiconductor package includes a package substrate which is a circuit board according to the second aspect and an IC, and the voltage regulator and the IC are arranged in the thickness direction which is perpendicular to the first main surface.

[0010] According to the present invention, it is possible to provide a multilayer ceramic capacitor that can increase the adhesion between through-hole electrodes and the substrate, and a circuit board and semiconductor composite device equipped with such a multilayer ceramic capacitor.

[0011] Figure 1 is a schematic plan view showing an example of a multilayer ceramic capacitor according to Embodiment 1 of the present invention, viewed from the first main surface side of the base body. Figure 2 is a schematic cross-sectional view showing an example of a cross-section along the line segment A1-A2 of the multilayer ceramic capacitor shown in Figure 1. Figure 3 is a graph showing the simulation results of the relationship between the allowable current density and the conductor area ratio for the Cu electrode and the Ni electrode. Figure 4 is a schematic enlarged cross-sectional view showing an example of the region near the connection between the through-hole electrode and the internal electrode in Figure 2. Figure 5 is a schematic enlarged cross-sectional view showing another example of the region near the connection between the through-hole electrode and the internal electrode in Figure 2. Figure 6 is a schematic plan view showing an example of a multilayer ceramic capacitor according to Embodiment 2 of the present invention, viewed from the first main surface side of the base body. Figure 7 is a schematic cross-sectional view showing an example of a cross-section along the line segment A1-A2 of the multilayer ceramic capacitor shown in Figure 6. Figure 8 is a schematic enlarged cross-sectional view showing a more detailed configuration of each electrode in Figure 7. Figure 9 is a schematic plan view showing an example of a multilayer ceramic capacitor according to Embodiment 3 of the present invention, and is a view from the first main surface side of the base body. Figure 10 is a schematic cross-sectional view showing an example of a cross-section along line segment A1-A2 of the multilayer ceramic capacitor shown in Figure 9. Figure 11 is a schematic plan view showing another example of a multilayer ceramic capacitor according to Embodiment 3 of the present invention. Figure 12 is a schematic cross-sectional view showing an example of a cross-section along line segment A1-A2 of the multilayer ceramic capacitor shown in Figure 11. Figure 13 is a schematic plan view showing yet another example of a multilayer ceramic capacitor according to Embodiment 3 of the present invention. Figure 14 is a schematic cross-sectional view showing an example of a cross-section along line segment A1-A2 of the multilayer ceramic capacitor shown in Figure 13. Figure 15 is a schematic cross-sectional view showing an example of a circuit board according to Embodiment 4 of the present invention. Figure 16 is a schematic cross-sectional view showing an example of a semiconductor composite device according to Embodiment 5 of the present invention. Figure 17 is a schematic cross-sectional view showing an example of a circuit board according to Embodiment 6 of the present invention. Figure 18 is a schematic plan view showing an example of a ceramic green sheet on which conductor patterns for the first internal electrode and conductor patterns for the second internal electrode are formed. Figure 19 is a schematic plan view showing an example of a printed sheet laminated as the outermost layer. Figure 20 is a schematic plan view showing an example of a laminated block on which multiple through-holes are formed.Figure 21 is a schematic cross-sectional view showing an example of a base body plated on its entire surface by electroless plating. Figure 22 is a schematic cross-sectional view showing an example of a base body in which a plating layer has been built up by electrolytic plating. Figure 23 is a schematic cross-sectional view showing an example of a base body in which a conductor has been filled into the through-hole electrode and the entire surface has been plated by electrolytic plating. Figure 24 is a schematic cross-sectional view showing an example of a base body in which the surface plating layer has been patterned. Figure 25 is a schematic cross-sectional view showing how the base body is mounted in the through-hole of the frame on an adhesive sheet. Figure 26 is a schematic cross-sectional view showing an example of a base body in which a thermosetting resin has been embedded between it and the frame member by screen printing. Figure 27 is a schematic cross-sectional view showing how buff polishing is performed. Figure 28 is a schematic cross-sectional view showing an example of a composite of a base body plated on its entire surface by electroless plating and a frame member. Figure 29 is a schematic cross-sectional view showing an example of a composite of a base body in which a plating layer has been built up by electrolytic plating and a frame member. Figure 30 is a schematic cross-sectional view showing an example of a composite structure of a base body and a frame member, in which conductors are filled into through-hole electrodes and the entire surface is plated by electroplating. Figure 31 is a schematic cross-sectional view showing an example of a composite structure of a base body and a frame member, in which the surface plating layer is patterned. Figure 32 is a schematic cross-sectional view showing an example of a position for cutting the outer shape of the frame member.

[0012] The multilayer ceramic capacitor, circuit board, and semiconductor composite device of the present invention will be described below. However, the present invention is not limited to the following configurations, and may be modified as appropriate without departing from the spirit of the invention. Furthermore, a combination of several of the preferred configurations described below also constitutes the present invention.

[0013] The embodiments described below are illustrative, and it goes without saying that partial substitution or combination of the configurations shown in different embodiments is possible. In Embodiment 2 and subsequent embodiments, descriptions of matters common to Embodiment 1 will be omitted, and the differences will be described primarily. In particular, similar effects and advantages due to similar configurations will not be mentioned sequentially for each embodiment.

[0014] In the following description, unless otherwise specified, each embodiment will simply be referred to as "the multilayer ceramic capacitor of the present invention," "the circuit board of the present invention," and "the semiconductor composite device of the present invention."

[0015] The drawings shown below are schematic representations, and their dimensions, aspect ratios, and scales may differ from those of the actual product.

[0016] In this specification, terms describing relationships between elements (e.g., "parallel," "perpendicular," "orthogonal," etc.) and terms describing the shapes of elements mean not only their literal, exact forms, but also a range that is substantially equivalent, for example, a range that includes differences of a few percent.

[0017] [Embodiment 1] In a first embodiment, the present invention is a multilayer ceramic capacitor comprising: a base body containing a plurality of capacitor functional parts, each having a structure in which first internal electrodes and second internal electrodes are alternately stacked and arranged via a dielectric layer; a plurality of through-via electrodes each having a first main surface electrode formed on a first main surface of the base body, a second main surface electrode formed on a second main surface of the base body, and a through-hole electrode connecting the first main surface electrode and the second main surface electrode to each other, wherein the plurality of through-via electrodes include a first through-via electrode in which the through-hole electrode is connected to the first internal electrode, and a second through-via electrode in which the through-hole electrode is connected to the second internal electrode, and the surface of the through-hole electrode has a plurality of protrusions, the plurality of protrusions including at least one of a first protrusion that, when viewed in cross-section, extends inward from the straight line connecting the ends of the dielectric layer towards the base body, and a second protrusion that extends inward from the straight line connecting the ends of the first internal electrode or the second internal electrode towards the base body.

[0018] Figure 1 is a schematic plan view showing an example of a multilayer ceramic capacitor according to Embodiment 1 of the present invention, and is a view from the first main surface side of the base body. Figure 2 is a schematic cross-sectional view showing an example of a cross section along the line segment A1-A2 of the multilayer ceramic capacitor shown in Figure 1.

[0019] The multilayer ceramic capacitor 1A shown in Figures 1 and 2 comprises a base body 10 and a plurality of through-via electrodes 20.

[0020] The base body 10 is a rectangular parallelepiped, or more specifically, a rectangular plate in plan view. The base body 10 has a first main surface 11a, a second main surface 11b that is opposite to the first main surface 11a in the stacking direction, and side surfaces 12. As shown in Figure 1, the base body 10 has four side surfaces 12: a first side surface 12a, a second side surface 12b, a third side surface 12c, and a fourth side surface 12d.

[0021] The thickness of the base body 10 in the stacking direction is not particularly limited, but may be 0.1 mm or more and 1.5 mm or less.

[0022] As shown in Figure 2, the base body 10 contains multiple capacitor function units 15 inside.

[0023] Each of the multiple capacitor functional units 15 has a structure in which a first internal electrode 16a and a second internal electrode 16b are alternately stacked and arranged via a dielectric layer 17.

[0024] The first internal electrode 16a and the second internal electrode 16b function as a positive electrode and a negative electrode, respectively. By having the first internal electrode 16a and the second internal electrode 16b face each other via the dielectric layer 17, capacitance can be obtained, and the capacitor function unit 15 functions as a capacitor.

[0025] The dielectric layer 17 can be formed from, for example, a dielectric material. As the dielectric material, a dielectric ceramic containing main components such as barium titanate, calcium titanate, strontium titanate, barium calcium titanate, or calcium zirconate can be used.

[0026] The thickness of the dielectric layer 17 sandwiched between the first internal electrode 16a and the second internal electrode 16b is preferably 1.5 μm or less.

[0027] As shown in Figure 2, within the base body 10, there may be portions where only dielectric layers 17 are stacked around the multiple capacitor functional parts 15. Note that, as shown in Figure 2, in reality, no boundaries are visible between adjacent dielectric layers 17.

[0028] As shown in Figure 2, the first internal electrode 16a and the second internal electrode 16b are not exposed on the surface of the base body 10.

[0029] The materials for the first internal electrode 16a and the second internal electrode 16b can be, for example, metals such as Ni, Cu, Ag, Pd, and Au, or alloys containing at least one of these metals, such as an Ag-Pd alloy.

[0030] The thickness of the first internal electrode 16a and the second internal electrode 16b is preferably equal to or less than that of the dielectric layer 17, i.e., 1.5 μm or less, and more preferably 1 μm or less.

[0031] As shown in Figure 2, each of the multiple through-via electrodes 20 comprises a first main surface electrode 21a formed on the first main surface 11a of the base body 10, a second main surface electrode 21b formed on the second main surface 11b of the base body 10, and a through-hole electrode 22 connecting the first main surface electrode 21a and the second main surface electrode 21b to each other.

[0032] In the stacking direction, the through-hole electrode 22 penetrates the base body 10, connecting to the first main surface electrode 21a at one end and to the second main surface electrode 21b at the other end, and each is integrated. As a result, each through-hole via electrode 20 functions as a conductor that directly connects the front and back surfaces of the base body 10.

[0033] As shown in Figure 1, in a plan view, the first main surface electrode 21a and the second main surface electrode 21b are each positioned to cover the entire through-hole electrode 22 to which they are connected.

[0034] The through-hole electrode 22 is cylindrical. The through-hole electrode 22 may also be cylindrical. Furthermore, the through-hole electrode 22 may have a tapered shape such that the cross-sectional area increases from one end to the other.

[0035] The diameters of the through-hole electrodes 22 are preferably 0.1 mm or more and 0.4 mm or less, respectively.

[0036] Furthermore, the inside of the through-hole electrode 22 may be completely filled with a conductor as shown in Figure 2, and a conductor filling portion 29 may be provided, or it may be filled with an insulating resin or the like.

[0037] As shown in Figures 1 and 2, the plurality of through-via electrodes 20 include a first through-via electrode 20a and a second through-via electrode 20b.

[0038] The materials for the first through-via electrode 20a and the second through-via electrode 20b can be, for example, metals such as Ni, Cu, Ag, Pd, and Au, or alloys containing at least one of these metals, such as an Ag-Pd alloy.

[0039] However, it is preferable that the through-hole electrode 22 is mainly composed of a Cu plating layer. By mainly composing it with a Cu plating layer with low resistivity, the heat generated by the multilayer ceramic capacitor 1A when a large current is passed through it can be suppressed. Specifically, for example, 1A / mm ２ Even when a large current is flowing, the cross-sectional area of ​​the through-hole electrode 22 can be suppressed while keeping the steady-state temperature change below 10°C.

[0040] Figure 3 is a graph showing the simulation results of the relationship between allowable current density and conductor area ratio for Cu electrodes and Ni electrodes.

[0041] Here, using a steady-state temperature change of 10°C or less as a reference, the allowable current density of the current supplied to the multilayer ceramic capacitor is set to 1 A / mm². ２ The conductor area ratio is the ratio of the area occupied by the conductor per unit area in a cross-section perpendicular to the current-carrying direction (lamination direction) (a cross-section parallel to the main surface of the element). As shown in Figure 3, the allowable current density is 1 A / mm² while satisfying the above criteria. ２ The resulting conductor area ratio is approximately 12% for Cu electrodes, but approximately 64% is required for Ni electrodes. Therefore, when the through-hole electrode 22 is mainly composed of a Cu plating layer, a large current (e.g., 1 A / mm) is required for the through-hole via electrode. ２ Even when a current is flowing through it, it is possible to suppress the cross-sectional area of ​​the through-hole electrode 22 (for example, to about 12%) and keep the steady-state temperature change to 10°C or less, effectively suppressing heat generation in the multilayer ceramic capacitor. Furthermore, because the cross-sectional area of ​​the through-hole electrode 22 can be suppressed, it is possible to secure a large capacitance.

[0042] Either the through-hole electrode 22 of the first through-via electrode 20a or the second through-via electrode 20b may be mainly composed of a Cu plating layer. However, from the perspective of low resistance, it is preferable that the through-hole electrodes 22 of both the first through-via electrode 20a and the second through-via electrode 20b are mainly composed of a Cu plating layer.

[0043] Similarly, by mainly composing the first main surface electrode 21a and the second main surface electrode 21b of a Cu plating layer, the entire first through-via electrode 20a or the second through-via electrode 20b may be mainly composed of a Cu plating layer.

[0044] Whether the electrode is composed of a Cu plating layer can be confirmed by observing a cross-section parallel to the stacking direction.

[0045] Also, the phrase "mainly composed of a Cu plating layer" here does not necessarily mean that it is composed only of a Cu plating layer. In the case of the through-hole electrode 22, it means that the Cu plating layer occupies the largest area (for example, 90% or more) in a cross-section perpendicular to the stacking direction of the through-hole electrode 22. Further, the through-hole electrode 22 may, for example, include a Ni plating layer formed on the surface of the base body 10, and the Cu plating layer may be electrically connected to the first internal electrode 16a or the second internal electrode 16b through the Ni plating layer. Note that the Ni plating layer may be a Ni layer formed by a method other than plating.

[0046] At least two through-via electrodes 20 may be provided. From the perspective of low resistance, it is preferable that four or more through-via electrodes 20 are provided.

[0047] The plurality of through-via electrodes 20 are arranged in an array. The plurality of through-via electrodes 20 may be arranged in a grid pattern, for example, as shown in FIG. 1.

[0048] Furthermore, it is preferable that the through-via electrode 20 closest to each first through-via electrode 20a be a second through-via electrode 20b, and similarly, the through-via electrode 20 closest to each second through-via electrode 20b be a first through-via electrode 20a. In other words, when multiple through-via electrodes 20 are arranged in a grid pattern, it is preferable that the first through-via electrodes 20a and the second through-via electrodes 20b are arranged in a staggered pattern, as shown in Figure 1.

[0049] As shown in Figure 2, the first through-via electrode 20a has its through-hole electrode 22 connected to the first internal electrode 16a.

[0050] In detail, the first through-via electrode 20a is connected to the first internal electrode 16a on the outer circumferential surface of the through-hole electrode 22.

[0051] At least one first through-via electrode 20a is sufficient. From the viewpoint of low resistance, it is preferable that two or more first through-via electrodes 20a are provided.

[0052] As shown in Figure 2, the second through-via electrode 20b has its through-hole electrode 22 connected to the second internal electrode 16b.

[0053] In detail, the second through-via electrode 20b is connected to the second internal electrode 16b on the outer circumferential surface of the through-hole electrode 22.

[0054] At least one second through-via electrode 20b is sufficient. From the viewpoint of low resistance, it is preferable that two or more second through-via electrodes 20b are provided.

[0055] Figure 4 is a schematic enlarged cross-sectional view showing an example of the region near the connection between the through-hole electrode and the internal electrode in Figure 2. Figure 5 is a schematic enlarged cross-sectional view showing another example of the region near the connection between the through-hole electrode and the internal electrode in Figure 2.

[0056] As shown in Figures 4 and 5, the surface of the through-hole electrode 22 has a plurality of protrusions 50, and the plurality of protrusions 50 include at least one of a first protrusion 50a that, when viewed in cross-section, extends toward the base body 10 from the straight line 19a connecting the ends 18b of the dielectric layer 17, and a second protrusion 50b that extends toward the base body 10 from the straight line 19b connecting the ends 18a of the first internal electrode 16a or the second internal electrode 16b. Because the through-hole electrode 22 has such a plurality of protrusions 50, it exhibits an anchoring effect and increases the contact area between the base body 10 and the through-hole electrode 22, thereby improving the adhesion force between each through-via electrode 20 and the base body 10.

[0057] The through-hole electrode 22 has a plurality of protrusions 50 on its surface, specifically on its outer circumferential surface. Since the through-hole electrode 22 is in close contact with the base body 10 on its outer circumferential surface, having a plurality of protrusions 50 on its outer circumferential surface improves the adhesion force.

[0058] The "straight line connecting the edges of the dielectric layer" refers to the straight line connecting the top (leading edge) of the dielectric layer 17 on the through-hole electrode 22 side. This line may be a straight line or a broken line, as shown in Figure 4.

[0059] Furthermore, "the straight line connecting the ends of the first internal electrode or the second internal electrode" refers to the straight line connecting the top (leading edge) of the through-hole electrode 22 side of the first internal electrode 16a or the second internal electrode 16b, respectively. This straight line may be a straight line or a broken line, as shown in Figure 5.

[0060] Furthermore, "penetrating into the base body" means that, using a straight line 19a connecting the ends 18b of the dielectric layer 17 as a reference, the side where the dielectric layer 17 exists, or using a straight line 19b connecting the ends 18a of the first internal electrode 16a or the second internal electrode 16b as a reference, the side where the first internal electrode 16a or the second internal electrode 16b exists, is considered the base body 10 side, and the multiple protrusions 50 exist in the region on the base body 10 side of the straight line 19a or 19b.

[0061] In Figure 4, the first protrusion 50a is located in the region on the side of the element 10 relative to the straight line 19a connecting the tops (leading edges) of the dielectric layer 17 on the through-hole electrode 22 side, with the dielectric layer 17 being the element 10 side. In Figure 5, the second protrusion 50b is located in the region on the side of the element 10 relative to the straight line 19b connecting the tops (leading edges) of the first internal electrode 16a or the second internal electrode 16b on the through-hole electrode 22 side, with the first internal electrode 16a or the second internal electrode 16b being the element 10 side.

[0062] While either the first through-hole electrode 20a or the second through-hole electrode 20b may have a plurality of protrusions 50 on its surface, from the viewpoint of improving adhesion, it is preferable that both the first through-hole electrode 20a and the second through-hole electrode 20b have a plurality of protrusions 50 on their surface.

[0063] As shown in Figure 4, the protrusion 50 (first protrusion 50a) is formed when a part of the outer circumferential surface of the through-hole electrode 22 fits into a first recessed portion (groove) 60a, which is formed when the end 18a of the first internal electrode 16a or the second internal electrode 16b on the through-hole electrode 22 side is located further away from the through-hole electrode 22 than the end 18b of the adjacent dielectric layer 17 on the through-hole electrode 22 side. Alternatively, as shown in Figure 5, the protrusion 50 (second protrusion 50b) is formed when a part of the outer circumferential surface of the through-hole electrode 22 fits into a second recessed portion (groove) 60b, which is formed when the end 18b of the dielectric layer 17 on the through-hole electrode 22 side is located further away from the through-hole electrode 22 than the end 18a of the adjacent first internal electrode 16a or the second internal electrode 16b on the through-hole electrode 22 side.

[0064] The protrusion 50 formed in the first recessed portion 60a (first protrusion 50a) has its tip joined to the end 18a on the through-hole electrode 22 side of the first internal electrode 16a or the second internal electrode 16b. The protrusion 50 formed in the second recessed portion 60b (second protrusion 50b) has its tip joined to the end 18b on the through-hole electrode 22 side of the dielectric layer 17.

[0065] When the protrusions 50 (first protrusions 50a) formed on the first groove 60a are adjacent to each other, the recesses of the through-hole electrodes 22 between the adjacent protrusions 50 are joined to the end 18b of the dielectric layer 17 on the through-hole electrode 22 side. Also, when the protrusions 50 (second protrusions 50b) formed on the second groove 60b are adjacent to each other, the recesses of the through-hole electrodes 22 between the adjacent protrusions 50 are joined to the end 18a of the first internal electrode 16a or the second internal electrode 16b on the through-hole electrode 22 side.

[0066] Furthermore, the protrusions 50 correspond to the first recessed portion 60a or the second recessed portion 60b present on the outer circumference of the through-hole electrode 22, and are formed in a convex shape (linear convex shape) on the outer circumference of the through-hole electrode 22, and may, for example, be formed in an annular shape on the outer circumference of the through-hole electrode 22.

[0067] The protrusion 50 is formed by first forming the first recessed portion 60a and the second recessed portion 60b, as described in the manufacturing method later, and then forming the through-hole electrode 22 by plating or vapor deposition.

[0068] The height H1 of each protrusion 50 (the dimension of the protrusion 50 in a direction perpendicular to the stacking direction) is not particularly limited, but is preferably 0.5 μm or more and 2 μm or less. Also, the height H1 of each protrusion 50 may be the same or different.

[0069] The thickness T1 of each protrusion 50 (dimension of the protrusion 50 in the stacking direction) is not particularly limited, but the thickness T1 of the first protrusion 50a is usually about the same as the thickness of the first internal electrode 16a or the second internal electrode 16b that is joined, so it is preferably 1.5 μm or less, and more preferably 1 μm or less. The thickness T1 of each second protrusion 50b is usually about the same as the thickness of the dielectric layer 17 that is joined, that is, about twice the thickness of the dielectric layer 17 sandwiched between the first internal electrode 16a and the second internal electrode 16b, so it is preferably 3 μm or less. The thickness T1 of each protrusion 50 may be the same or different, but usually the thickness T1 of each first protrusion 50a is about the same, and the thickness T1 of each second protrusion 50b is also about the same.

[0070] The number of protrusions 50 corresponds to the number of first recesses 60a and second recesses 60b formed. Therefore, the number of protrusions 50 provided does not exceed the number of first internal electrodes 16a or second internal electrodes 16b connected to the through-hole electrode 22. In other words, normally, the number of protrusions 50 provided on the through-hole electrode 22 of each first through-via electrode 20a is less than or equal to the number of first internal electrodes 16a connected to that through-hole electrode 22, and the number of protrusions 50 provided on the through-hole electrode 22 of the second through-via electrode 20b is less than or equal to the number of second internal electrodes 16b connected to that through-hole electrode 22.

[0071] As shown in Figure 4, when viewed in cross-section parallel to the stacking direction, the multiple protrusions 50 may include a first protrusion 50a that extends inward toward the base body 10 from the straight line 19a connecting the ends 18b of the dielectric layer 17.

[0072] The first protrusion 50a is a protrusion 50 formed when a part of the through-hole electrode 22 enters the first recessed portion 60a.

[0073] The first recessed portion 60a is formed when no blasting treatment such as wet blasting is performed after firing. For example, it is formed by making the shrinkage rate of the first internal electrode 16a and the second internal electrode 16b during firing greater than the shrinkage rate of the dielectric layer 17 during firing. More specifically, the first recessed portion 60a can be formed by adjusting the volume ratio of components (metal, dielectric, glass, etc.) excluding the binder component contained in the conductive paste for the first internal electrode 16a and the second internal electrode 16b and the ceramic green sheet that later becomes the dielectric layer 17, so that the volume ratio of the conductive paste does not become excessively large, or by adjusting the heating rate during firing to shift the sintering timing of the first internal electrode 16a and the second internal electrode 16b and the sintering timing of the dielectric layer 17. Therefore, the first protrusion 50a is formed when no blasting treatment such as wet blasting is performed after firing.

[0074] As shown in Figure 4, when viewed in cross-section, or more specifically in cross-section parallel to the stacking direction, it is preferable that the tip of the first convex portion 50a is concave. This improves the contact area at the joint surface between the first internal electrode 16a or the second internal electrode 16b and the through-hole electrode 22, thereby improving the anchoring effect and enhancing the adhesion force between each through-via electrode 20 and the base body 10.

[0075] The concave shape of the tip of the first protrusion 50a is obtained relatively because the end portion 18a on the through-hole electrode 22 side of the first internal electrode 16a or the second internal electrode 16b that joins it is convex in the direction of the through-hole electrode 22. In other words, the portion of the tip of the first protrusion 50a that is concave exists in the circumferential direction of the through-hole electrode 22 in the form of a concave streak.

[0076] As shown in Figure 4, when viewed in cross-section, or more specifically in cross-section parallel to the stacking direction, it is preferable that the base of the first protrusion 50a gradually widens. This improves the contact area between the dielectric layer 17 and the through-hole electrode 22, further improving the anchoring effect and enhancing the adhesion force between each through-via electrode 20 and the base body 10.

[0077] The shape in which the base of the first protrusion 50a gradually widens is relatively obtained by the rounding of the corners of the end 18b of the dielectric layer 17 on the through-hole electrode 22 side. That is, the widened portion of the base of the first protrusion 50a exists linearly in the circumferential direction of the through-hole electrode 22.

[0078] Here, "the base gradually widens" means that at the base of the first protrusion 50a, the thickness T1 of the first protrusion 50a continuously increases as it approaches the base.

[0079] As shown in Figure 5, when viewed in cross-section parallel to the stacking direction, the multiple protrusions 50 may include a second protrusion 50b that extends toward the base body 10 side from the straight line 19b connecting the ends 18a of the first internal electrode 16a or the second internal electrode 16b.

[0080] The second protrusion 50b is a protrusion 50 formed when a part of the through-hole electrode 22 enters the second recessed portion 60b.

[0081] The second recessed portion 60b is formed when a blast treatment such as wet blasting is performed after firing. This is because, in a blast treatment such as wet blasting, the rate at which the dielectric layer 17 is removed is greater than the rate at which the first internal electrode 16a or the second internal electrode 16b is removed. Therefore, the second protrusion 50b is formed when a blast treatment such as wet blasting is performed after firing. Other blast treatments besides wet blasting, such as dry blasting, may also be performed.

[0082] As shown in Figure 5, when viewed in cross-section, or more specifically in cross-section parallel to the stacking direction, it is preferable that the tip of the second protrusion 50b gradually tapers. This improves the contact area at the junction surface between the dielectric layer 17 and the through-hole electrode 22, thereby improving the anchoring effect and enhancing the adhesion force between each through-via electrode 20 and the base body 10.

[0083] The shape of the second protrusion 50b, which gradually tapers at its tip, is relatively obtained because the end 18b of the dielectric layer 17 that is joined to it, on the through-hole electrode 22 side, is recessed in the opposite direction from the through-hole electrode 22. In other words, the portion of the second protrusion 50b that tapers at its tip exists linearly in the circumferential direction of the through-hole electrode 22. The recessed shape of the end 18b of the dielectric layer 17 is obtained in blast processing by the fact that the abrasion rate in the central part of the dielectric layer 17 in the stacking direction is greater than the abrasion rate at both ends of the dielectric layer 17 in the stacking direction.

[0084] Here, "the tip gradually becomes thinner" means that at the tip of the second protrusion 50b, the thickness T1 of the second protrusion 50b continuously decreases as it approaches the very tip.

[0085] The multiple protrusions 50 may include at least one of the first protrusions 50a or the second protrusions 50b. In other words, all of the multiple protrusions 50 may be the first protrusions 50a, or all of them may be the second protrusions 50b. Alternatively, the multiple protrusions 50 may include both the first protrusions 50a and the second protrusions 50b.

[0086] The second recessed portion 60b is obtained by performing a blast treatment such as wet blasting after firing. More specifically, the first recessed portion 60a formed after firing is reversed in surface orientation by the blast treatment, thereby obtaining the second recessed portion 60b. In the blast treatment, the degree of processing is high in the area close to the spraying position, and the surface orientation is reversed, resulting in the formation of many second recessed portions 60b. On the other hand, in areas far from the spraying position, the degree of processing is low, and the surface orientation may not be reversed, in which case the first recessed portion 60a remains. In this way, the first recessed portion 60a and the second recessed portion 60b may coexist depending on the difference in the degree of processing of the blast treatment in different locations.

[0087] Then, by forming a through-hole electrode 22 on the base body 10 in which the first recessed portion 60a and the second recessed portion 60b coexist, the multiple protrusions 50 are formed to include both the first protrusion 50a and the second protrusion 50b.

[0088] [Embodiment 2] Figure 6 is a schematic plan view showing an example of a multilayer ceramic capacitor according to Embodiment 2 of the present invention, and is a view from the first main surface side of the base body. Figure 7 is a schematic cross-sectional view showing an example of a cross section along the line segment A1-A2 of the multilayer ceramic capacitor shown in Figure 6.

[0089] As shown in Figures 6 and 7, the multilayer ceramic capacitor 1B further includes side electrodes 30 formed on the side surface 12 of the base body 10, and either the first through-via electrode 20a or the second through-via electrode 20b has its first main surface electrode 21a and second main surface electrode 21b connected to each other via the side electrode 30. This further improves the adhesion between the first through-via electrode 20a or the second through-via electrode 20b, which has its first main surface electrode 21a and second main surface electrode 21b connected to each other via the side electrode 30, and the base body 10. In addition, the heat dissipation can be improved by increasing the area of ​​the conductor.

[0090] As shown in Figures 6 and 7, in the multilayer ceramic capacitor 1B, of the first through-via electrode 20a and the second through-via electrode 20b, the one in which the first main surface electrode 21a and the second main surface electrode 21b are connected to each other via the side electrode 30 may have at least one of the first main surface electrode 21a and the second main surface electrode 21b as a solid electrode. By having the first main surface electrode 21a and / or the second main surface electrode 21b connected to each other via the side electrode 30 as a solid electrode, the adhesion between the first through-via electrode 20a or the second through-via electrode 20b and the substrate 10 can be further improved. In addition, the heat dissipation can be further improved by increasing the area of ​​the conductor.

[0091] In this case, more specifically, the first main surface electrode 21a and / or the second main surface electrode 21b of either the first through-via electrode 20a or the second through-via electrode 20b are planar and integral, and cover the first main surface 11a and / or the second main surface electrode 21b of the other first through-via electrode 20a or second through-via electrode 20b while being separated from it. The side electrode 30 connected to it covers the side surface 12 of the base body 10 (in the case of the multilayer ceramic capacitor 1B shown in Figure 6, the side surfaces 12a, 12b, 12c and 12d).

[0092] A through-via electrode 20 in which a first main surface electrode 21a and a second main surface electrode 21b are connected to each other via a side electrode 30, and a through-via electrode 20 in which the first main surface electrode 21a and / or the second main surface electrode 21b are solid electrodes, may be either a first through-via electrode 20a or a second through-via electrode 20b. It is preferable that the first main surface electrode 21a and / or the second main surface electrode 21b of a through-via electrode 20 that is usually connected to ground and functions as a negative electrode are solid electrodes.

[0093] The side electrodes 30 only need to be provided on at least a portion of the side surface 12 of the base body 10. From the viewpoint of improving adhesion and heat dissipation, it is preferable that the side electrodes 30 are provided on the entire surface of at least one of the side surfaces 12 of the base body 10, and more preferably on the entire surface of each side surface 12 of the base body 10.

[0094] The material for the side electrode 30 can be, for example, metals such as Ni, Cu, Ag, Pd, and Au, or alloys containing at least one of these metals, such as an Ag-Pd alloy.

[0095] From the viewpoint of improving heat dissipation, it is preferable that the side electrode 30 is mainly composed of a Cu plating layer.

[0096] Figure 8 is an enlarged cross-sectional view schematically showing a more detailed configuration of each electrode in Figure 7.

[0097] As shown in Figure 8, in the multilayer ceramic capacitor 1B, it is preferable that t1 > t2 when the thickness of the through-hole electrode 22 is t1 and the thickness of the side electrode 30 is t2. By making the capacitance-inefficient side electrode 30 as thin as possible and making the through-hole electrode 22, which directly conducts electricity between the front and back surfaces of the base body 10, thicker to minimize resistance, it is possible to achieve both high capacitance and suppress heat generation.

[0098] A side electrode 30 that satisfies the above relationship can be manufactured, for example, by the following method. First, electroless plating is applied to the entire surface of the base body 10. Then, the base body 10 is embedded in a cavity substrate, such as a frame component described later, and a removable resin, such as a thermoplastic resin, is filled between the cavity substrate and the base body 10. Subsequently, electroless plating and then electroplating are applied to the entire surface of the composite of the cavity substrate and the base body 10, so that the plating layer is built up and the through-hole electrode 22 is formed. At this time, the side electrode 30 is not built up because the resin is filled between it and the cavity substrate. Therefore, a film can be formed that satisfies the above relationship. After that, the plating layer on the surface is patterned by a photolithography process, and the resin, such as a thermoplastic resin, is heated and removed together with the cavity substrate to manufacture the multilayer ceramic capacitor 1B shown in Figures 6 and 7.

[0099] The thickness t1 of the through-hole electrode 22 is, for example, approximately 50 μm. The thickness t2 of the side electrode 30 is, for example, several μm.

[0100] Furthermore, as shown in Figure 8, it is preferable that the multilayer ceramic capacitor 1B has the following properties: t1 is the thickness of the through-hole electrode 22, t2 is the thickness of the side electrode 30, t3 is the thickness of the first main surface electrode 21a, and t4 is the thickness of the second main surface electrode 21b, where t1 > t3 > t2 and t1 > t4 > t2. The first main surface electrode 21a and the second main surface electrode 21b are via connection surfaces and therefore need to be formed thicker than the side electrode 30, but this requirement can be satisfied by the above relationship.

[0101] The first main surface electrode 21a and the second main surface electrode 21b can be made thinner than the through-hole electrode 22 by reducing their thickness after electroplating, for example, by chemical treatment. On the other hand, even if the first main surface electrode 21a and the second main surface electrode 21b, which have a thickness of approximately 30 μm to 50 μm after electroplating, are subjected to chemical treatment or the like to reduce their thickness, they will not become as thin as the thickness of the side electrode 30, which is several μm thick when formed solely by electroless plating. Therefore, it is possible to form films that satisfy the above relationship.

[0102] The thickness t3 of the first main surface electrode 21a and the thickness t4 of the second main surface electrode 21b may be the same or different.

[0103] The thickness t3 of the first main surface electrode 21a and the thickness t4 of the second main surface electrode 21b are, for example, approximately 10 μm to 20 μm.

[0104] Here, "thickness of the through-hole electrode" refers to the wall thickness of the through-hole electrode 22 in the radial direction. Also, "thickness of the side electrode" refers to the thickness of the side electrode 30 in the direction perpendicular to the forming surface. Furthermore, "thickness of the main surface electrode" refers to the respective thicknesses of the first main surface electrode 21a and the second main surface electrode 21b in the direction perpendicular to the forming surface. Furthermore, the "thickness of the first main electrode" and the "thickness of the second main electrode" may be the thickness of the first main electrode 21a which is a solid electrode and the thickness of the second main electrode 21b which is a solid electrode, respectively, or the thickness of the first main electrode 21a which is not a solid electrode and the thickness of the second main electrode 21b which is not a solid electrode. However, it is more preferable that both the first main electrode 21a which is a solid electrode and the first main electrode 21a which is not a solid electrode satisfy t1 > t3 > t2, and it is more preferable that both the second main electrode 21b which is a solid electrode and the second main electrode 21b which is not a solid electrode satisfy t1 > t4 > t2.

[0105] [Embodiment 3] Figure 9 is a schematic plan view showing an example of a multilayer ceramic capacitor according to Embodiment 3 of the present invention, and is a view from the first main surface side of the base body. Figure 10 is a schematic cross-sectional view showing an example of a cross section along line segment A1-A2 of the multilayer ceramic capacitor shown in Figure 9.

[0106] As shown in Figures 9 and 10, the multilayer ceramic capacitor 1C further comprises an insulating frame portion 40 with through-holes 41, and the capacitor body 5, including the base body 10 and a plurality of through-via electrodes 20, is placed inside the through-holes 41. This allows the frame portion 40 to be formed by cutting the outer shape of the frame portion 40 member into, for example, a rectangular shape after embedding the components inside the through-holes 41. The base body 10 of the capacitor body 5 is formed through a firing process, and it is not easy to improve the dimensional accuracy of the capacitor body 5 itself, but by cutting the outer shape in a post-processing step as described above, the dimensional accuracy required for embedded mounting can be improved.

[0107] The through-hole 41 penetrates both the front and back of the frame portion 40 and has a shape corresponding to the component to be embedded, such as the capacitor body 5.

[0108] The frame portion 40 is insulating and is formed of, for example, resin and glass fiber. Examples of glass fiber include E-glass fiber, and examples of resin include epoxy resin.

[0109] The thickness of the frame portion 40 in the stacking direction is preferably about the same as the thickness of the components such as the capacitor body 5 embedded in the through hole 41 in the stacking direction.

[0110] As shown in Figures 9 and 10, a resin material 42 is filled between the capacitor body 5 and the frame portion 40.

[0111] The resin material 42 is filled into the through hole 41 to bond the component to be embedded in it to the frame portion 40.

[0112] Examples of the resin material 42 include thermosetting resins such as epoxy resins.

[0113] The resin material 42 may contain an inorganic filler. Examples of inorganic fillers include silica filler.

[0114] As shown in Figures 9 and 10, the first main surface electrode 21a and the second main surface electrode 21b are exposed. This allows them to be handled in the same way as ordinary multilayer ceramic capacitors and mounted embedded in a core substrate.

[0115] It is preferable that the entire surface of the first main surface electrode 21a and the second main surface electrode 21b is exposed, as shown in Figures 9 and 10.

[0116] Figure 11 is a schematic plan view showing another example of a multilayer ceramic capacitor according to Embodiment 3 of the present invention. Figure 12 is a schematic cross-sectional view showing an example of a cross-section along the line segment A1-A2 of the multilayer ceramic capacitor shown in Figure 11.

[0117] As shown in Figures 11 and 12, in the multilayer ceramic capacitor 1D, the first main surface electrode 21a and the second main surface electrode 21b extend to a part of the frame portion 40. As a result, the resin material 42 is covered by the first main surface electrode 21a and the second main surface electrode 21b, preventing moisture from entering the resin material 42.

[0118] In detail, the first main surface electrode 21a, which is a solid electrode, and the second main surface electrode 21b, which is a solid electrode, extend to a part of the frame portion 40 while covering the entire resin material 42.

[0119] The lengths of the first main surface electrode 21a and the second main surface electrode 21b that extend beyond the resin material 42 may be the same for each of the four sides, or they may be different. Furthermore, the lengths of the first main surface electrode 21a and the second main surface electrode 21b that extend beyond the resin material 42 may be the same for each location within a single side, or they may be different.

[0120] Figure 13 is a schematic plan view showing yet another example of a multilayer ceramic capacitor according to Embodiment 3 of the present invention. Figure 14 is a schematic cross-sectional view showing an example of a cross-section along line segment A1-A2 of the multilayer ceramic capacitor shown in Figure 13.

[0121] As shown in Figures 13 and 14, in the multilayer ceramic capacitor 1E, the frame portion 40 has a plurality of through holes 41, and a capacitor body 5 is placed in each of the through holes 41. This allows the capacitor body 5 to be placed in any arrangement, and also improves the yield compared to placing a single large capacitor body 5 in the frame portion 40.

[0122] Multiple capacitor bodies 5 are arranged side by side within the frame portion 40. Other components such as inductors may be embedded in some of the multiple through holes 41, so that the multiple capacitor bodies 5 and other components such as inductors are arranged side by side within the frame portion 40.

[0123] Each of the multiple through-holes 41 has a shape corresponding to the component to be embedded, such as the capacitor body, and the through-holes 41 are arranged in any order within a range where they do not overlap each other.

[0124] The multilayer ceramic capacitor 1E may include both a capacitor body in which the first main surface electrode 21a and the second main surface electrode 21b, which are solid electrodes, do not cover the resin material 42, as shown in the multilayer ceramic capacitor 1C in Figure 9, and a capacitor body in which the first main surface electrode 21a and the second main surface electrode 21b, which are solid electrodes, extend beyond the resin material 42 to a part of the frame portion 40, as shown in the multilayer ceramic capacitor 1D in Figure 11, or it may include only one of them.

[0125] The effects described above—improved dimensional accuracy, prevention of moisture intrusion into the resin material 42, improved freedom of placement of the capacitor body, and improved yield—are all achieved regardless of the components embedded in the through-holes 41 of the frame 40. Therefore, the components embedded in the through-holes 41 of the frame 40 do not have to be a capacitor body 5 equipped with through-via electrodes 20 having multiple protrusions 50 on the surface of the through-hole electrodes 22, as in the multilayer ceramic capacitors 1D to 1E. For example, a capacitor body equipped with through-via electrodes including through-hole electrodes having a smooth outer surface without protrusions may be used. Also, although Figures 9 to 14 show an example in which a capacitor body 5 with side electrodes 30 is embedded in the through-holes 41 of the frame 40, a capacitor body without side electrodes may also be used. Furthermore, Figures 9 to 14 show an example where either the first through-via electrode 20a or the second through-via electrode 20b has a solid ground electrode (first main surface electrode 21a and second main surface electrode 21b). However, a capacitor body may also be used in which neither the first main surface electrode 21a nor the second main surface electrode 21b is a solid ground electrode.

[0126] [Embodiment 4] In a second embodiment, the present invention is a circuit board that incorporates a multilayer ceramic capacitor according to the first embodiment and comprises a first wiring layer connected to the first main surface electrode and a second wiring layer connected to the second main surface electrode.

[0127] Figure 15 is a schematic cross-sectional view showing an example of a circuit board according to Embodiment 4 of the present invention.

[0128] As shown in Figure 15, the circuit board 2 incorporates the multilayer ceramic capacitor of the present invention (multilayer ceramic capacitor 1C is shown in Figure 15) and includes a first wiring layer 70a connected to the first main surface electrode 21a and a second wiring layer 70b connected to the second main surface electrode 21b.

[0129] As shown in Figure 15, the circuit board 2 is provided with a first wiring layer 70a and a second wiring layer 70b on a core substrate 88 into which the multilayer ceramic capacitor of the present invention is embedded.

[0130] The circuit board 2 can be used, for example, as a package substrate for semiconductor packages.

[0131] [Embodiment 5] In a fourth embodiment, the present invention is a semiconductor composite device comprising a voltage regulator and a semiconductor package, wherein the semiconductor package includes a package substrate which is a circuit board according to the second embodiment and an IC, and the voltage regulator and the IC are arranged in the thickness direction which is perpendicular to the first main surface.

[0132] Figure 16 is a schematic cross-sectional view showing an example of a semiconductor composite device according to Embodiment 5 of the present invention.

[0133] As shown in Figure 16, the semiconductor composite device 3 comprises a voltage regulator 81 and a semiconductor package 82. The semiconductor package 82 includes a package substrate 83, which is the circuit board 2 of Embodiment 4, and an IC 84. The voltage regulator 81 and IC 84 are arranged in the thickness direction, which is perpendicular to the first main surface 11a. This allows for shorter wiring between the power supply and the load compared to the case where the voltage regulator 81, which is the power supply, and the IC 84, which is the load, are placed side by side in a direction parallel to the first main surface 11a of the multilayer ceramic capacitor body 10 of the present invention, thereby improving power supply efficiency.

[0134] Figure 16 shows a semiconductor package 82 equipped with an interposer 85, and a semiconductor composite device 3 with a configuration in which a voltage regulator 81, motherboard 86, package substrate 83, interposer 85, and IC 84 are stacked from bottom to top. The voltage regulator 81 and motherboard 86, the motherboard 86 and package substrate 83, the package substrate 83 and interposer 85, and the interposer 85 and IC 84 are connected by bumps 87.

[0135] In the semiconductor composite device 3, the IC 84 may be mounted directly on the package substrate 83 without using an interposer 85 or the like. In that case, the package substrate 83 and the IC 84 are connected by bumps 87.

[0136] [Embodiment 6] In a third embodiment, the present invention is a circuit board comprising a multilayer ceramic capacitor according to the first embodiment, a voltage regulator, and a core substrate, wherein the multilayer ceramic capacitor and the voltage regulator are embedded in the core substrate.

[0137] Figure 17 is a schematic cross-sectional view showing an example of a circuit board according to Embodiment 6 of the present invention.

[0138] As shown in Figure 17, the circuit board 4 comprises the multilayer ceramic capacitor of the present invention (a multilayer ceramic capacitor 1C is shown in Figure 15), a voltage regulator 81, and a core substrate 88, with the multilayer ceramic capacitor and voltage regulator 81 embedded in the core substrate 88. The circuit board 4 is used by directly or indirectly mounting a load such as an IC, but the fact that the multilayer ceramic capacitor and voltage regulator 81 are placed side by side within the same core substrate 88 makes it possible to save space in the thickness direction.

[0139] In detail, the core substrate 88 has a plurality of through holes 89 corresponding to the shapes of the embedded electronic components, and the multilayer ceramic capacitor and voltage regulator 81 of the present invention are embedded in the through holes 89 and placed side by side within the core substrate 88.

[0140] The multilayer ceramic capacitor and the voltage regulator 81 may be electrically connected via a first wiring layer connected to the first main surface electrode of the multilayer ceramic capacitor, and / or a second wiring layer connected to the second main surface electrode of the multilayer ceramic capacitor.

[0141] The following describes an example of a method for manufacturing the multilayer ceramic capacitor of the present invention.

[0142] First, an example of a method for manufacturing the multilayer ceramic capacitor of Embodiment 1 will be described.

[0143] <Process for manufacturing laminated blocks> First, the ceramic green sheet 117 is molded.

[0144] Figure 18 is a schematic plan view showing an example of a ceramic green sheet on which conductor patterns for the first internal electrode and conductor patterns for the second internal electrode are formed.

[0145] Next, as shown in Figure 18, a conductive paste is printed on the ceramic green sheet 117 in a predetermined pattern, for example by screen printing or gravure printing, to form a conductor pattern 116a for the first internal electrode and a conductor pattern 116b for the second internal electrode.

[0146] Figure 19 is a schematic plan view showing an example of a printed sheet laminated as the outermost layer.

[0147] Then, the ceramic green sheets 117 are stacked alternately so that the conductor patterns 116a for the first internal electrode and the conductor patterns 116b for the second internal electrode are stacked alternately, thereby creating a laminated sheet. As shown in Figure 19, a printed sheet 118 is stacked on the outermost layer to serve as alignment marks for through-hole processing.

[0148] Finally, the laminated sheets are pressed using a hydrostatic press or the like to produce a laminated block 110.

[0149] <Process for manufacturing the base body> Figure 20 is a schematic plan view showing an example of a laminated block with multiple through-holes formed therein.

[0150] First, as shown in Figure 20, multiple through-holes 122 are formed in the laminated block 110 by laser processing or drilling.

[0151] Next, grinding is performed to remove the printed sheet 118 from the surface and to flatten and adjust the thickness of the laminated block 110.

[0152] Furthermore, the inside of the through-hole 122 is cleaned by ultrasonic cleaning to remove smear from the wall surface of the formed through-hole 122.

[0153] Then, the laminated block 110 is cut into individual pieces.

[0154] Finally, the individual chips are degreased and fired. The firing temperature is, for example, 1000°C or higher and 1400°C or lower. The firing time is, for example, 10 minutes or more and 5 hours or less.

[0155] When the chip is fired, the conductive paste is baked onto it to form the first and second internal electrodes, and the first groove is formed by the difference between the shrinkage rate of the conductive paste and the shrinkage rate of the ceramic green sheet 117. In other words, as described above, the shrinkage rate of the conductive paste is made greater than that of the ceramic green sheet 117 by adjusting the volume ratio of the components excluding the binder component contained in the conductive paste and the ceramic green sheet, or by adjusting the heating rate during firing.

[0156] <Wet Blasting Treatment> A second groove is formed by performing a blasting treatment, such as wet blasting, inside the through-hole electrode. Other blasting treatments, such as dry blasting, may also be performed. When wet blasting is performed, for example, abrasive grains of 3 to 50 μm are used, and the processing is carried out at a pressure of 0.1 to 0.2 MPa.

[0157] <Process for forming through-via electrodes> Figure 21 is a schematic cross-sectional view showing an example of a substrate plated on its entire surface by electroless plating.

[0158] First, as shown in Figure 21, the entire surface of the base body 10 is plated by electroless plating to ensure electrical conductivity.

[0159] Figure 22 is a schematic cross-sectional view showing an example of a substrate in which a plating layer has been built up by electroplating.

[0160] Next, as shown in Figure 22, a through-hole electrode 22 is formed by electroplating, building up a plating layer, preferably a Cu plating layer, to a thickness of about 30 to 50 μm. The through-hole electrode 22 can also be formed by vapor deposition.

[0161] Figure 23 is a schematic cross-sectional view showing an example of a substrate in which a conductor has been filled into the through-hole electrode and the entire surface has been plated by electroplating.

[0162] Then, as shown in Figure 23, a conductor or the like is filled into the through-hole electrode 22 formed by plating, and then the entire surface is plated by electroplating. The conductor-filled portion 29 is formed when the conductor or the like is filled into the through-hole electrode 22.

[0163] Figure 24 is a schematic cross-sectional view showing an example of a substrate with a patterned surface plating layer.

[0164] Finally, after applying a resist, exposure, development, and etching, the resist is removed to pattern the surface plating layer, separating the first through-via electrode 20a and the second through-via electrode 20b as shown in Figure 24.

[0165] As described above, the multilayer ceramic capacitor of Embodiment 1 is manufactured.

[0166] The blasting process may be omitted. If the blasting process is omitted, only the first groove will be formed.

[0167] Next, an example of a method for manufacturing the multilayer ceramic capacitor of Embodiment 3 will be described.

[0168] First, prepare the base body by following the same steps as described above up to the <Body Creation Process>.

[0169] Next, the entire surface of the base body 10 may be plated by electroless plating, or this step may be omitted. If this electroless plating process is performed, side electrodes will be formed.

[0170] Figure 25 is a schematic cross-sectional view showing how the base body is mounted within the through-holes of the frame component on the adhesive sheet.

[0171] Next, a frame member 140 is temporarily fixed onto the adhesive sheet 150, and as shown in Figure 25, the base body 10 is mounted into the through-hole of the frame member 140 on the adhesive sheet 150.

[0172] Figure 26 is a schematic cross-sectional view showing an example of a base body in which thermosetting resin is embedded between the frame member and the base body by screen printing.

[0173] Next, as shown in Figure 26, the space between the frame member 140 and the base body 10 is filled with thermosetting resin 142 by screen printing, and then partially cured.

[0174] Figure 27 is a schematic cross-sectional view showing the process of buff polishing.

[0175] As shown in Figure 27, buff polishing is performed to remove excess resin and create irregularities on the surface of the base body 10, after which it is cured. This creates a composite 111 of the base body and the frame component.

[0176] Afterward, blasting may be performed using the same process as described above, or it may be omitted.

[0177] Then, the composite body 111 of the base body and frame member is subjected to the same process as the <process for forming through via electrodes> described above to form through via electrodes.

[0178] Figure 28 is a schematic cross-sectional view showing an example of a composite structure consisting of a base body plated on its entire surface by electroless plating and a frame component.

[0179] First, as shown in Figure 28, the entire surface of the composite 111 of the base body and the frame component is plated by electroless plating to ensure electrical conductivity.

[0180] Figure 29 is a schematic cross-sectional view showing an example of a composite structure consisting of a base body with a plated layer built up by electroplating and a frame component.

[0181] Next, as shown in Figure 29, a through-hole electrode 22 is formed by electroplating, building up a plating layer, preferably a Cu plating layer, to a thickness of about 30 to 50 μm. The through-hole electrode 22 can also be formed by vapor deposition.

[0182] Figure 30 is a schematic cross-sectional view showing an example of a composite structure consisting of a base body with a conductor filling the through-hole electrode and electroplating applied to the entire surface, and a frame component.

[0183] Then, as shown in Figure 30, a conductor or the like is filled into the through-hole electrode 22 formed by plating, and then the entire surface is plated by electroplating. The conductor-filled portion 29 is formed when the conductor or the like is filled into the through-hole electrode 22.

[0184] Figure 31 is a schematic cross-sectional view showing an example of a composite structure consisting of a base body with a patterned surface plating layer and a frame component.

[0185] Next, a resist is applied, exposed, developed, and etched, and then the resist is removed to pattern the surface plating layer, separating the first through-via electrode 20a and the second through-via electrode 20b as shown in Figure 31.

[0186] Figure 32 is a schematic cross-sectional view showing an example of the position where the outer shape of the frame member is cut.

[0187] Finally, the frame member 140 is cut into rectangular pieces along the cut line shown in Figure 32 (see the dashed line in Figure 32).

[0188] As described above, the multilayer ceramic capacitor of Embodiment 3 is manufactured. Alternatively, by using a removable resin such as a thermoplastic resin instead of the thermosetting resin 142, and then removing the resin and the frame component at the end, the multilayer ceramic capacitor of Embodiment 2 can be manufactured as described above.

[0189] 1A, 1B, 1C, 1D, 1E Multilayer ceramic capacitor 2, 4 Circuit board 3 Semiconductor composite device 5 Capacitor body 10 Base body 11a First main surface 11b Second main surface 12, 12a, 12b, 12c, 12d Side surface 15 Capacitor functional part 16a First internal electrode 16b Second internal electrode 17 Dielectric layer 18a, 18b End 19a, 19b Straight line 20 Through via electrode 20a First through via electrode 20b Second through via electrode 21a First main surface electrode 21b Second main surface electrode 22 Through-hole electrode 29 Conductor filling part 30 Side electrode 40 Frame part 41 Through hole 42 Resin material 50 Protrusion 50a First protrusion 50b Second protrusion 60a First recess 60b Second recessed section 70a First wiring layer 70b Second wiring layer 81 Voltage regulator 82 Semiconductor package 83 Package substrate 84 IC 85 Interposer 86 Motherboard 87 Bump 88 Core substrate 89 Through hole 110 Laminated block 111 Composite of base body and frame component 116a Conductor pattern for first internal electrode 116b Conductor pattern for second internal electrode 117 Ceramic green sheet 118 Printed sheet 122 Through hole 140 Frame component 142 Thermosetting resin 150 Adhesive sheet t1 Thickness of through-hole electrode t2 Thickness of side electrode t3 Thickness of first main surface electrode t4 Thickness of second main surface electrode T1 Thickness of protrusion H1 Height of protrusion

Claims

1. A multilayer ceramic capacitor comprising: a base body containing a plurality of capacitor functional parts, each having a structure in which first internal electrodes and second internal electrodes are alternately stacked on a dielectric layer; a plurality of through-via electrodes each having a first main surface electrode formed on a first main surface of the base body, a second main surface electrode formed on a second main surface of the base body, and a through-hole electrode connecting the first main surface electrode and the second main surface electrode to each other; wherein the plurality of through-via electrodes include a first through-via electrode in which the through-hole electrode is connected to the first internal electrode, and a second through-via electrode in which the through-hole electrode is connected to the second internal electrode; the surface of the through-hole electrode has a plurality of protrusions; and the plurality of protrusions include, when viewed in cross-section, at least one of a first protrusion that extends inward from a straight line connecting the ends of the dielectric layer toward the base body, and a second protrusion that extends inward from a straight line connecting the ends of the first internal electrode or the second internal electrode toward the base body.

2. The multilayer ceramic capacitor according to claim 1, wherein the through-hole electrode is mainly composed of a Cu plating layer.

3. The multilayer ceramic capacitor according to claim 1 or 2, wherein the plurality of protrusions include the first protrusion.

4. The multilayer ceramic capacitor according to claim 3, wherein, when viewed in cross-section, the first convex portion has a concave tip.

5. The multilayer ceramic capacitor according to claim 3 or 4, wherein, when viewed in cross-section, the first convex portion gradually widens at its base.

6. The multilayer ceramic capacitor according to any one of claims 1 to 5, wherein the plurality of protrusions include the second protrusion.

7. The multilayer ceramic capacitor according to claim 6, wherein, when viewed in cross-section, the second convex portion gradually tapers towards its tip.

8. A multilayer ceramic capacitor according to any one of claims 1 to 7, further comprising a side electrode formed on the side surface of the main body, wherein the first through-via electrode and the second through-via electrode are connected to each other via the side electrode, the first main surface electrode and the second main surface electrode of either one of them.

9. The multilayer ceramic capacitor according to claim 8, wherein, of the first through-via electrode and the second through-via electrode, the one in which the first main surface electrode and the second main surface electrode are connected to each other via the side electrode, at least one of the first main surface electrode and the second main surface electrode is a solid electrode.

10. The multilayer ceramic capacitor according to claim 8 or 9, wherein when the thickness of the through-hole electrode is t1 and the thickness of the side electrode is t2, t1 > t2.

11. The multilayer ceramic capacitor according to claim 10, wherein when the thickness of the through-hole electrode is t1, the thickness of the side electrode is t2, the thickness of the first main surface electrode is t3, and the thickness of the second main surface electrode is t4, t1 > t3 > t2 and t1 > t4 > t2.

12. A multilayer ceramic capacitor according to any one of claims 1 to 11, further comprising an insulating frame portion having through holes, wherein a capacitor body including the base body and the plurality of through via electrodes is disposed within the through holes, a resin material is filled between the capacitor body and the frame portion, and the first main surface electrode and the second main surface electrode are exposed.

13. The multilayer ceramic capacitor according to claim 12, wherein the first main surface electrode and the second main surface electrode extend to a part of the frame portion.

14. The multilayer ceramic capacitor according to claim 12 or 13, wherein the frame portion has a plurality of through holes, and the capacitor body is disposed in each of the through holes.

15. A circuit board comprising a multilayer ceramic capacitor according to any one of claims 1 to 14, a first wiring layer connected to the first main surface electrode, and a second wiring layer connected to the second main surface electrode.

16. A semiconductor composite device comprising a voltage regulator and a semiconductor package, wherein the semiconductor package includes a package substrate which is a circuit board as described in claim 15 and an IC, and the voltage regulator and the IC are arranged in a thickness direction which is perpendicular to the first main surface.

17. A circuit board comprising a multilayer ceramic capacitor according to any one of claims 1 to 14, a voltage regulator, and a core substrate, wherein the multilayer ceramic capacitor and the voltage regulator are embedded in the core substrate.

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