Electric circuit for smart card, method for manufacturing same, and smart card comprising electric circuit

Abstract

Disclosed herein are: an electric circuit for a smart card; a method for manufacturing same; and a smart card comprising the electric circuit. The disclosed electric circuit for a smart card may comprise: an insulator substrate having a through-hole formed in the thickness direction thereof; a circuit pattern disposed on the hole of the insulator substrate and the area around the hole, having one surface portion exposed by the hole, and formed of a conductor; an intermediate conductive layer disposed on the insulator substrate so as to cover the circuit pattern, and formed of Ni; a color conductive layer disposed on the insulator substrate so as to cover the intermediate conductive layer, and formed of a rose gold-colored Au-Cu alloy; and a multi-layered other-side conductive layer disposed so as to be in contact with the one surface portion of the circuit pattern exposed by the hole, and including a first metallic material layer, a second metallic material layer, and a third metallic material layer sequentially disposed from the one surface portion of the circuit pattern, wherein the first metallic material layer is a Ni layer, the second metallic material layer is a first Au layer, and the third metallic material layer is a second Au layer.

Description

Electrical circuit for a smart card, method of manufacturing the same, and smart card including the electrical circuit

[0001] The present invention relates to an electronic element and a mechanism / device applying the same, and more specifically, to an electrical circuit for a smart card, a method for manufacturing the same, and a smart card including the electrical circuit.

[0002] A smart card (also known as a chip card or integrated circuit card) refers to a plastic card equipped with an internal microprocessor and memory, enabling the storage and processing of information. The most commonly used types are those identical in shape and size to credit cards. Recently, various technologies related to smart cards have been developing rapidly. In particular, advancements in semiconductor and component technologies have led to a significant increase in the processing power and memory capacity of smart cards. Along with this, the interface capabilities that can be integrated with smart cards are also improving significantly.

[0003] Smart cards can be classified into various types based on the inclusion of a microprocessor, interface methods, or their stage of evolution. Smart cards can perform versatile functions, ranging from keys carried by people to wallets, identification cards, and ultimately, personal computers. Due to this multifunctionality, the smart card market is growing rapidly.

[0004] However, in the case of substrates (i.e., electrical circuits) for IC (integrated circuit) chips applied to existing smart cards, the surface color is typically standardized or limited to gold or silver. Since the color of the surface (contact surface) of the IC chip substrate (i.e., electrical circuit) is standardized, it is difficult to create high-end colors or emotional and design functions / values, and consequently, there is a problem in satisfying the diverse needs of consumers (users). In particular, because it is difficult to satisfy the electrical characteristics required for the surface (contact surface) of the IC chip substrate (i.e., electrical circuit) and difficult to secure manufacturing methods, it is difficult to implement colors other than gold or silver. Therefore, there is a need for technology that can overcome these problems, enhance the surface color of the smart card electrical circuit, and realize emotional colors / designs.

[0005] The technical problem that the present invention aims to solve is to provide an electrical circuit for a smart card and a method for manufacturing the same, which can enhance aesthetics (visual characteristics) by upgrading the color of the metal contact surface—which was limited due to existing technical constraints—and realizing emotional colors, while also securing excellent electrical characteristics / functions.

[0006] In addition, the technical problem that the present invention aims to solve is to provide a smart card including the aforementioned electrical circuit for a smart card.

[0007] The problems that the present invention aims to solve are not limited to those mentioned above, and other unmentioned problems will be clearly understood by those skilled in the art from the description below.

[0008] According to embodiments of the present invention for achieving the above-mentioned objectives, an electrical circuit for a smart card is provided, comprising: an insulating substrate having a through-hole formed in the thickness direction; a circuit pattern formed of a conductor having a surface portion exposed by the hole and a surrounding area of ​​the insulating substrate; an intermediate conductive layer formed of Ni having a surface portion exposed by the hole and disposed on the insulating substrate to cover the circuit pattern; a color conductive layer formed of an Au-Cu alloy having a rose gold color having a surface portion exposed by the hole and disposed on the insulating substrate to cover the intermediate conductive layer; and a multilayer other conductive layer disposed in contact with the surface portion of the circuit pattern exposed by the hole, comprising a first metallic material layer, a second metallic material layer, and a third metallic material layer sequentially disposed from the surface portion of the circuit pattern, wherein the first metallic material layer is a Ni layer, the second metallic material layer is a first Au layer, and the third metallic material layer is a second Au layer.

[0009] According to embodiments of the present invention, an electrical circuit for a smart card can be implemented that enhances aesthetics (visual characteristics) by upgrading the color of the metal contact surface, which was previously limited due to existing technical constraints, and by implementing an emotional color, while simultaneously securing excellent electrical characteristics / functions. In particular, according to embodiments of the present invention, since a low electrical resistance of the surface portion can be secured while implementing a rose gold color that stimulates emotional aspects on the surface portion (contact surface) of the electrical circuit for a smart card, it is possible to improve both aesthetics and electrical characteristics. Furthermore, according to embodiments of the present invention, since a color conductive layer having a rose gold color can be easily formed by a plating method, an electrical circuit for a smart card and a smart card including the same can be easily manufactured to satisfy various consumer demands by enhancing aesthetics.

[0010] However, the effects of the present invention are not limited to the above effects and can be extended in various ways without departing from the technical concept and scope of the present invention.

[0011] FIG. 1 is a cross-sectional view showing an electrical circuit for a smart card according to one embodiment of the present invention.

[0012] FIG. 2 is a cross-sectional view showing an electrical circuit for a smart card according to another embodiment of the present invention.

[0013] FIG. 3 is an image showing the contact surface of an electrical circuit for a smart card according to one embodiment of the present invention.

[0014] FIG. 4 is an image showing a tape-type circuit element including a plurality of electrical circuits for a smart card according to one embodiment of the present invention.

[0015] FIG. 5 is an image showing a smart card with an electrical circuit for a smart card applied according to one embodiment of the present invention.

[0016] FIGS. 6 to 9 are cross-sectional views for explaining a method for manufacturing an electrical circuit for a smart card according to an embodiment of the present invention.

[0017] FIGS. 10 to 12 are cross-sectional views illustrating a method for manufacturing an electrical circuit for a smart card according to another embodiment of the present invention.

[0018] FIG. 13 is a cross-sectional view showing an electrical circuit for a smart card according to another embodiment of the present invention.

[0019] FIGS. 14 to 18 are cross-sectional views illustrating a method for manufacturing an electrical circuit for a smart card according to another embodiment of the present invention.

[0020] FIG. 19 is an image showing a tape-type circuit element including a plurality of electrical circuits for a smart card according to another embodiment of the present invention.

[0021] According to embodiments of the present invention for achieving the above-mentioned objectives, an electrical circuit for a smart card is provided, comprising: an insulating substrate having a through-hole formed in the thickness direction; a circuit pattern formed of a conductor having a surface portion exposed by the hole and a surrounding area of ​​the insulating substrate; an intermediate conductive layer formed of Ni having a surface portion exposed by the hole and disposed on the insulating substrate to cover the circuit pattern; a color conductive layer formed of an Au-Cu alloy having a rose gold color having a surface portion exposed by the hole and disposed on the insulating substrate to cover the intermediate conductive layer; and a multilayer other conductive layer disposed in contact with the surface portion of the circuit pattern exposed by the hole, comprising a first metallic material layer, a second metallic material layer, and a third metallic material layer sequentially disposed from the surface portion of the circuit pattern, wherein the first metallic material layer is a Ni layer, the second metallic material layer is a first Au layer, and the third metallic material layer is a second Au layer.

[0022] The above intermediate conductive layer may be an intermediate Ni layer, the intermediate Ni layer may be in direct contact with the circuit pattern, and the color conductive layer may be in direct contact with the intermediate Ni layer.

[0023] The first Au layer can be in direct contact with the Ni layer, and the second Au layer can be in direct contact with the first Au layer.

[0024] The first Au layer above may be a flash plating layer.

[0025] In the above Au-Cu alloy, the content of Cu may be in the range of about 20 t%, and the content of Au may be in the range of about 60 t%.

[0026] The thickness of the above-mentioned color conductive layer may be in the range of about 0.01 to 0.2 μm.

[0027] The surface resistance of the above-mentioned color conductive layer is approximately 500 mmΩ / mm2 It may be less than.

[0028] The above-mentioned color conductive layer may be a plating layer.

[0029] According to other embodiments of the present invention, a smart card comprising the aforementioned electrical circuit for a smart card is provided.

[0030] According to other embodiments of the present invention, a method for manufacturing an electrical circuit for a smart card is provided, comprising the steps of: providing a device structure having a circuit pattern composed of a conductor disposed on an insulating substrate, wherein the insulating substrate has a through-hole formed in the thickness direction and the circuit pattern is disposed on the hole and the surrounding area of ​​the insulating substrate; forming an intermediate conductive layer composed of Ni disposed to cover the circuit pattern on the insulating substrate and a first metallic material layer composed of Ni disposed to contact one side of the circuit pattern exposed by the hole; forming a second metallic material layer as a first Au layer on the exposed surface of the first metallic material layer; forming a third metallic material layer as a second Au layer on the exposed surface of the second metallic material layer; and forming a color conductive layer composed of an Au-Cu alloy having a rose gold color disposed to cover the intermediate conductive layer on the insulating substrate.

[0031] The above intermediate conductive layer may be an intermediate Ni layer, the intermediate Ni layer may be in direct contact with the circuit pattern, and the color conductive layer may be in direct contact with the intermediate Ni layer.

[0032] The first metallic material layer may be a Ni layer, the first Au layer may be in direct contact with the Ni layer, and the second Au layer may be in direct contact with the first Au layer.

[0033] The first Au layer above may be a flash plating layer.

[0034] In the above Au-Cu alloy, the content of Cu may be in the range of about 20 t%, and the content of Au may be in the range of about 60 t%.

[0035] The thickness of the above-mentioned color conductive layer may be in the range of about 0.01 to 0.2 μm.

[0036] The surface resistance of the above-mentioned color conductive layer is approximately 500 mmΩ / mm 2 It may be less than.

[0037] The above-mentioned color conductive layer can be formed by a plating process.

[0038] According to other embodiments of the present invention, an electrical circuit for a smart card is provided, comprising: an insulating substrate; a circuit pattern formed as a conductor on the insulating substrate; and an Au-Pd-Cu alloy layer formed to cover the circuit pattern on the insulating substrate and having a rose gold color.

[0039] In the above Au-Pd-Cu alloy layer, the Au content may be higher than the Cu content and Pd content, respectively.

[0040] In the above Au-Pd-Cu alloy layer, the Au content may be higher than the sum of the Cu content and the Pd content.

[0041] In the above Au-Pd-Cu alloy layer, the content of Cu may be in the range of about 0.5 to 30 wt%, the content of Pd may be in the range of about 5 to 15 wt%, and the content of Au may be in the range of about 55 to 94.5 wt%.

[0042] The thickness of the above Au-Pd-Cu alloy layer may be in the range of about 0.01 to 0.2 μm.

[0043] The surface resistance of the above Au-Pd-Cu alloy layer is approximately 500 mmΩ / mm 2 It may be less than.

[0044] The above Au-Pd-Cu alloy layer may be a plating layer.

[0045] A hole may be formed in the insulating substrate on the opposite side of the Au-Pd-Cu alloy layer to expose one side of the circuit pattern, and the electrical circuit for the smart card may further include another conductive layer that covers the one side of the circuit pattern exposed by the hole.

[0046] The other conductive layer may have an Au single-layer structure or a Ni / Au stacked structure.

[0047] The above Ni / Au stacked structure may include a Ni layer in contact with one side of the circuit pattern exposed by the hole, and an Au layer spaced apart from the circuit pattern with the Ni layer in between.

[0048] The above electrical circuit for the smart card may further include an intermediate conductive layer disposed between the circuit pattern and the Au-Pd-Cu alloy layer.

[0049] The above intermediate conductive layer may include an Au layer.

[0050] According to other embodiments of the present invention, a smart card comprising the aforementioned electrical circuit for a smart card is provided.

[0051] According to other embodiments of the present invention, a method for manufacturing an electrical circuit for a smart card is provided, comprising the steps of: forming a circuit pattern composed of a conductor on an insulating substrate; and forming an Au-Pd-Cu alloy layer having a rose gold color by covering the circuit pattern on the insulating substrate.

[0052] In the above Au-Pd-Cu alloy layer, the Au content may be higher than the Cu content and Pd content, respectively.

[0053] In the above Au-Pd-Cu alloy layer, the Au content may be higher than the sum of the Cu content and the Pd content.

[0054] In the above Au-Pd-Cu alloy layer, the content of Cu may be in the range of about 0.5 to 30 wt%, the content of Pd may be in the range of about 5 to 15 wt%, and the content of Au may be in the range of about 55 to 94.5 wt%.

[0055] The above Au-Pd-Cu alloy layer can be formed by a plating process.

[0056] A hole may be formed in the insulating substrate on the opposite side of the Au-Pd-Cu alloy layer to expose one side of the circuit pattern, and the method for manufacturing the electrical circuit for the smart card may further include the step of forming a conductive layer on the other side that covers the one side of the circuit pattern exposed by the hole.

[0057] The other conductive layer may have an Au single-layer structure or a Ni / Au stacked structure.

[0058] The above Ni / Au stacked structure may include a Ni layer in contact with one side of the circuit pattern exposed by the hole, and an Au layer spaced apart from the circuit pattern with the Ni layer in between.

[0059] The method for manufacturing the above-described electrical circuit for a smart card may further include the step of forming an intermediate conductive layer disposed between the circuit pattern and the Au-Pd-Cu alloy layer.

[0060] The above intermediate conductive layer may include an Au layer.

[0061] Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings.

[0062] The embodiments of the present invention described below are provided to more clearly explain the present invention to those skilled in the art, and the scope of the present invention is not limited by the following embodiments, and the following embodiments may be modified in various other forms.

[0063] The terms used herein are for describing specific embodiments and are not intended to limit the invention. Terms used herein in the singular form may include plural forms unless the context clearly indicates otherwise. Additionally, the terms “comprise” and / or “comprising” used herein specify the presence of the mentioned features, steps, numbers, actions, components, elements, and / or groups thereof, and do not exclude the presence or addition of one or more other features, steps, numbers, actions, components, elements, and / or groups thereof. Furthermore, the term “connected” used herein means not only that components are directly connected, but also includes the concept of indirectly connecting components through the interposition of additional components between them.

[0064] Furthermore, when a component is described in this specification as being located "on" another component, this includes not only cases where a component is in contact with another component, but also cases where another component exists between the two components. The term "and / or" as used in this specification includes any one of the listed items and all combinations of one or more thereof. Additionally, terms of degree such as "about" and "substantially" as used in this specification are used to mean a range of numerical values ​​or degrees or approximate values, taking into account inherent manufacturing and material tolerances, and are used to prevent an infringer from unfairly exploiting the disclosures in which precise or absolute figures provided to aid in understanding this specification are mentioned.

[0065] Embodiments of the present invention will be described in detail below with reference to the attached drawings. The sizes or thicknesses of the areas or parts depicted in the attached drawings may be slightly exaggerated for the clarity of the specification and convenience of explanation. Throughout the detailed description, the same reference numerals indicate the same components.

[0066] FIG. 1 is a cross-sectional view showing an electrical circuit for a smart card according to an embodiment of the present invention. The structure shown in FIG. 1 may be a substrate structure for an IC chip (i.e., an electrical circuit board), and an IC chip (not shown) may be bonded to the bonding surface (bottom surface in the drawing) of the substrate structure for an IC chip.

[0067] Referring to FIG. 1, an electrical circuit for a smart card according to an embodiment of the present invention may include an insulating substrate (100), a circuit pattern (10) formed as a conductor on the insulating substrate (100), and a color conductive layer (50) formed to cover the circuit pattern (10) on the insulating substrate (100) and having a rose gold color. The color conductive layer (50) may be a 'surface conductive layer' and may be a 'contact surface conductive layer'. The color conductive layer (50) may be a constituent material of a contact pad.

[0068] The insulating substrate (100) may be a flexible substrate. The insulating substrate (100) may include a polymer or be composed of a polymer. For example, the insulating substrate (100) may include epoxy or be composed of epoxy. However, the material of the insulating substrate (100) is not limited to epoxy and can be varied in many ways. When using an insulating substrate (100) having flexible characteristics, the electrical circuit may have flexible characteristics.

[0069] An adhesive layer (110) may be disposed on an insulating substrate (100), and a circuit pattern (10) may be disposed on the adhesive layer (110). The adhesive layer (110) is a material layer for bonding the insulating substrate (100) and the circuit pattern (10) together, and may be composed of an insulating material. Therefore, the insulating substrate (100) and the adhesive layer (110) can be considered as a single insulating substrate (insulating substrate). In some cases, the adhesive layer (110) may not be used.

[0070] A circuit pattern (10) may be formed on one side of an insulating substrate (100). A circuit pattern (10) may be formed on an adhesive layer (110). The circuit pattern (10) may include a conductor or be formed of a conductor. Therefore, the circuit pattern (10) may be referred to as a conductor pattern. Here, for convenience, the circuit pattern (10) is depicted simply, but in reality, the circuit pattern (10) may have a more complex structure than that depicted here. Also, here, the circuit pattern (10) is depicted as including a single pattern section, but the circuit pattern (10) may include a plurality of mutually spaced pattern sections, and the surface of the adhesive layer (110) may be exposed between the plurality of pattern sections. If the adhesive layer (110) is not used, the surface of the insulating substrate (100) may be exposed between the plurality of pattern sections.

[0071] The circuit pattern (10) may have a single-layer structure. For example, the circuit pattern (10) may have a single-layer structure composed of Cu. Here, Cu (copper) may be a constituent material of copper foil. However, in some cases, the circuit pattern (10) may have a stacked structure in which a plurality of conductive layers are stacked.

[0072] The color conductive layer (50) is a material layer exhibiting a rose gold color and may be an Au-Cu alloy layer or an Au-Pd-Cu alloy layer. Here, the rose gold color may be a color that encompasses not only general rose gold but also pink gold. Rose gold and pink gold may be similar colors having mutually close RGB indices.

[0073] In the above Au-Cu alloy layer, the Au content may be higher than the Cu content. As a specific example, the Cu content in the above Au-Cu alloy layer may be in the range of approximately 0.5 to 40 wt%, and the Au content may be in the range of approximately 60 to 99.5 wt%. When these compositional ranges are satisfied, a desirable rose gold color can be obtained, and it may be advantageous for securing excellent electrical properties. The surface resistance of the above Au-Cu alloy layer is approximately 500 mmΩ / mm 2 It may be less than or equal to. The surface resistance of the above Au-Cu alloy layer is, for example, about 100 to 500 mmΩ / mm 2 The thickness of the above Au-Cu alloy layer may be in the range of about 0.01 to 0.2 μm, as a non-limiting example.

[0074] In the above Au-Pd-Cu alloy layer, the content of Au may be higher than the content of Cu and the content of Pd, respectively. In the above Au-Pd-Cu alloy layer, the content of Au may be higher than the sum of the content of Cu and the content of Pd. As a specific example, in the above Au-Pd-Cu alloy layer, the content of Cu may be in the range of about 0.5 to 30 wt%, the content of Pd may be in the range of about 5 to 15 wt%, and the content of Au may be in the range of about 55 to 94.5 wt%. Depending on the content of Au, Pd, and Cu in the above Au-Pd-Cu alloy layer, the expressed rose gold color can be controlled, and electrical properties can also be controlled. When satisfying the composition range mentioned above, a desirable rose gold color can be obtained, and it may also be advantageous for securing excellent electrical properties. Meanwhile, in the case of the Au-Pd-Cu alloy layer, since it contains more Pd compared to the Au-Cu alloy layer, it may be possible to achieve a slightly brighter color when realizing a rose gold color compared to the Au-Cu alloy layer. Therefore, the above-mentioned Au-Pd-Cu alloy layer may be capable of realizing a brighter and more emotional rose gold color than the above-mentioned Au-Cu alloy layer.

[0075] The surface resistance of the above Au-Pd-Cu alloy layer is approximately 500 mmΩ / mm 2 It may be less than or equal to. The surface resistance of the above Au-Pd-Cu alloy layer is, for example, about 100 to 500 mmΩ / mm 2 The thickness of the above Au-Pd-Cu alloy layer may be in the range of about 0.01 to 0.2 μm, as a non-limiting example.

[0076] The above Au-Cu alloy layer and the above Au-Pd-Cu alloy layer may be plating layers. Accordingly, the above Au-Cu alloy layer and the above Au-Pd-Cu alloy layer can be easily formed through a plating process.

[0077] According to one embodiment, a hole (H1) may be formed in the insulating substrate (100) to expose one side (bottom surface in the drawing) of the circuit pattern (10) on the opposite side of the color conductive layer (50). If an adhesive layer (110) is used, the hole (H1) may be formed by penetrating the insulating substrate (100) and the adhesive layer (110) in the thickness direction. One side of the circuit pattern (10) may be exposed by the hole (H1).

[0078] The above electrical circuit may further include a secondary conductive layer covering one side of the circuit pattern (10) exposed by the hole (H1). The secondary conductive layer may be a conductive layer for electrical connection with an IC chip (not shown). The secondary conductive layer and the IC chip may be connected, for example, through wire bonding. In this embodiment, the secondary conductive layer may have a stacked structure. For example, the secondary conductive layer may include a first metallic material layer (20) and a second metallic material layer (30). The first metallic material layer (20) may be positioned to contact one side of the circuit pattern (10) exposed by the hole (H1), and the second metallic material layer (30) may be positioned spaced apart from the circuit pattern (10) with the first metallic material layer (20) in between. A first metallic material layer (20) and a second metallic material layer (30) can be sequentially arranged from one side of the circuit pattern (10) exposed by the hole (H1).

[0079] For example, the first metallic material layer (20) may be a Ni layer, and the second metallic material layer (30) may be an Au layer. In this case, the other conductive layer may be said to have a Ni / Au stacked structure. The Ni / Au stacked structure may include a Ni layer (i.e., 20) in contact with one side of the circuit pattern (10) exposed by the hole (H1), and an Au layer (i.e., 30) spaced apart from the circuit pattern (10) with the Ni layer in between.

[0080] The above Ni layer and the above Au layer may be plating layers formed by a plating process. The thickness of the above Ni layer may be about 0.5 to 8 μm, as a non-limiting example. The above Au layer may be a layer plated by a flash plating method. Flash plating may be a base plating method that plates with a thin thickness of about 1 μm or less, for example, about 0.001 to 0.01 μm. The thickness of the above Au layer may be about 0.001 to 0.01 μm, as a non-limiting example.

[0081] According to one embodiment, the electrical circuit may further include an intermediate conductive layer (40) disposed between the circuit pattern (10) and the color conductive layer (50). The intermediate conductive layer (40) may, for example, include an Au layer or be an Au layer. The Au layer may be a plating layer formed by a plating process. For example, the Au layer may be a layer plated by a flash plating method. The thickness of the Au layer may be, for example, about 0.001 to 0.01 μm. By forming the intermediate conductive layer (40), the plating quality and adhesion of the color conductive layer (50) may be improved.

[0082] FIG. 2 is a cross-sectional view showing an electrical circuit for a smart card according to another embodiment of the present invention.

[0083] Referring to FIG. 2, an electrical circuit for a smart card according to the present embodiment may include an insulating substrate (100), a circuit pattern (11) formed as a conductor on the insulating substrate (100), and a color conductive layer (51) formed to cover the circuit pattern (11) on the insulating substrate (100) and having a rose gold color. An adhesive layer (110) may be disposed on the insulating substrate (100), and a circuit pattern (10) may be disposed on the adhesive layer (110). The insulating substrate (100) and the adhesive layer (110) may be considered as a single insulating substrate (insulating substrate). The adhesive layer (110) may not be used.

[0084] The color conductive layer (51) is a material layer exhibiting a rose gold color and may be an Au-Cu alloy layer or an Au-Pd-Cu alloy layer. The material and properties of the color conductive layer (51) may be the same or substantially the same as the color conductive layer (50) described in FIG. 1. The composition of the Au-Cu alloy layer and the Au-Pd-Cu alloy layer may be the same or substantially the same as described in FIG. 1.

[0085] A hole (H1) may be formed on the insulating substrate (100) to expose one side (bottom side in the drawing) of the circuit pattern (11) on the opposite side of the color conductive layer (51). If an adhesive layer (110) is used, the hole (H1) may be formed by penetrating the insulating substrate (100) and the adhesive layer (110). One side of the circuit pattern (11) may be exposed by the hole (H1).

[0086] The above electrical circuit may further include a secondary conductive layer covering one side of the circuit pattern (11) exposed by the hole (H1). In this embodiment, the secondary conductive layer may have a single-layer structure. For example, the secondary conductive layer may include a metallic material layer (31). The metallic material layer (31) may be positioned to contact one side of the circuit pattern (11) exposed by the hole (H1).

[0087] For example, the metallic material layer (31) may be an Au layer. In this case, the other conductive layer may have an Au single-layer structure. The Au layer may be a plating layer formed by a plating process. The Au layer may be a layer plated by a flash plating method. The thickness of the Au layer may be, as a non-limiting example, about 0.001 to 0.01 μm.

[0088] In this embodiment, the electrical circuit may not include an intermediate conductive layer disposed between the circuit pattern (11) and the color conductive layer (51). In this case, the circuit pattern (11) and the color conductive layer (51) may be in direct contact with each other. The color conductive layer (51) may be formed directly on the circuit pattern (11) by a plating method.

[0089] In FIG. 1, the material of the circuit pattern (10) can be denoted as A, the material of the first metallic material layer (20) as B, the material of the second metallic material layer (30) as C, the material of the intermediate conductive layer (40) as D, and the material of the color conductive layer (50) as E. Also, in FIG. 2, the material of the circuit pattern (11) can be denoted as A, the material of the metallic material layer (31) as C, and the material of the color conductive layer (51) as E. In this case, the materials that can be A, B, C, D, and E can be summarized as shown in Table 1 below.

[0090] Category ABCDE MaterialCuNiAu (flash)Au (flash)Au-CuCuAu (flash)Au-CuCuNiAu (flash)Au (flash)Au-Pd-CuCuAu (flash)Au-Pd-Cu

[0091] Referring to Table 1 above, a Ni layer may or may not be included as the B layer, and an Au layer may or may not be included as the D layer. Depending on the equipment infrastructure and required bonding performance during the wire bonding process, a Ni layer may or may not be used as the B layer. The use of the D layer may be optional. However, the material combinations exemplified in Table 1 are exemplary and may vary depending on the case.

[0092] Table 2 below shows the results of measuring the physical properties of the color conductive layer of an electrical circuit for a smart card manufactured according to an embodiment of the present invention.

[0093] Surface resistance before standard test 289 mmΩ / mm 2Surface resistance 287 mmΩ / mm after standard test 2 Surface characteristics after standard test (number of pits) 5 pits / cm 2

[0094] The standard test applied to the surface resistance measurement in Table 2 above can be performed under neutral saline (5% NaCl) spray conditions for 24 hours. Additionally, the standard test applied to the surface appearance measurement can be performed under neutral saline (5% NaCl) spray conditions for 96 hours. As shown in Table 2, the surface resistance of the color conductive layer before and after the standard test is approximately 300 mmΩ / mm 2 It was measured to be low, below [value]. It was confirmed that the surface resistance remained unchanged even after the standard test. In addition, the surface condition evaluation after the standard test also showed 5 pits / cm 2 It can be confirmed that it possesses significantly excellent characteristics by showing the number of pits below.

[0095] FIG. 3 is an image showing the contact surface of an electrical circuit (200) for a smart card according to one embodiment of the present invention.

[0096] Referring to FIG. 3, the contact surface of the electrical circuit (200) for a smart card according to an embodiment of the present invention may have a rose gold color by the color conductive layer (50, 51) described in FIG. 1 and FIG. 2.

[0097] FIG. 4 is an image showing a tape-type circuit element (250) including a plurality of electrical circuits (200) for a smart card according to one embodiment of the present invention.

[0098] Referring to FIG. 4, the tape-type circuit element (250) may include a plurality of structurally connected electrical circuits (200) for smart cards. After manufacturing the tape-type circuit element (250) including a plurality of electrical circuits (200) for smart cards, individual electrical circuits (200) can be separated therefrom. Each electrical circuit (200) may have a contact pad (a plurality of contact pads).

[0099] FIG. 5 is an image showing a smart card (300) with an electric circuit (200) for a smart card applied according to one embodiment of the present invention.

[0100] Referring to FIG. 5, a smart card (300) according to an embodiment of the present invention may include an electric circuit (200) having a rose gold color as previously described. For example, an electric circuit (200) having a rose gold color may be embedded and installed within a predetermined area of ​​a plastic card body. At this time, the contact surface of the electric circuit (200) may be exposed to the outside of the smart card (300). Additionally, an IC chip may be connected to the bonding surface of the electric circuit (200).

[0101] According to embodiments of the present invention, an electric circuit (200) for a smart card can be implemented that enhances aesthetics (visual characteristics) by upgrading the color of the metal contact surface, which was previously limited due to existing technical constraints, and implementing an emotional color, while also securing excellent electrical characteristics / functions. In particular, according to embodiments of the present invention, a rose gold color capable of stimulating emotional aspects is implemented on the surface portion (contact surface) of the electric circuit (200), while the low electrical resistance of the surface portion (e.g., about 500 mmΩ / mm 2 Since it is possible to secure (below), it is possible to achieve the effect of improving electrical characteristics and reliability while enhancing aesthetics.

[0102] FIGS. 6 to 9 are cross-sectional views for explaining a method for manufacturing an electrical circuit for a smart card according to an embodiment of the present invention.

[0103] Referring to FIG. 6, a circuit pattern (10) composed of a conductor can be formed on an insulating substrate (100). The insulating substrate (100) may be a flexible substrate. The insulating substrate (100) may include a polymer or be composed of a polymer. An adhesive layer (110) may be disposed on the insulating substrate (100), and a circuit pattern (10) may be disposed on the adhesive layer (110). The adhesive layer (110) is a material layer for mutually bonding the insulating substrate (100) and the circuit pattern (10), and may be composed of an insulating material. Thus, the insulating substrate (100) and the adhesive layer (110) can be considered together as a single insulating substrate (insulating substrate). In some cases, the adhesive layer (110) may not be used.

[0104] A hole (H1) can be formed in the insulating substrate (100) to expose one side (the lower side in the drawing) of the circuit pattern (10). If an adhesive layer (110) is used, the hole (H1) can be formed by penetrating the insulating substrate (100) and the adhesive layer (110) in the thickness direction. One side of the circuit pattern (10) can be exposed by the hole (H1). A plurality of holes (H1) can be formed spaced apart from each other.

[0105] After forming an adhesive material layer on a substrate, a hole (H1) penetrating the substrate and the adhesive material layer can be formed, and a circuit pattern (10) can be formed thereon. For example, after forming a conductive film on the adhesive material layer (i.e., 110) in which the hole (H1) is formed, the circuit pattern (10) can be formed by patterning the conductive film. A predetermined lithography process may be used for the patterning. Through this process, a device structure as shown in FIG. 6 can be formed. However, the specific method for forming the device structure of FIG. 6 is not limited to the above and may vary depending on the case.

[0106] The circuit pattern (10) may have a single-layer structure. For example, the circuit pattern (10) may have a single-layer structure composed of Cu. Here, Cu (copper) may be a constituent material of copper foil. However, in some cases, the circuit pattern (10) may have a stacked structure in which a plurality of conductive layers are stacked.

[0107] Referring to FIG. 7, a first metallic material layer (20) can be formed in contact with one side of the circuit pattern (10) exposed by the hole (H1). The first metallic material layer (20) can be formed to cover one side of the circuit pattern (10) exposed by the hole (H1). The first metallic material layer (20) may be, for example, a Ni layer. The Ni layer may be formed by a plating process. The Ni layer may be formed through a single-sided plating process. The thickness of the Ni layer may be, for example, about 0.5 to 8 μm.

[0108] Referring to FIG. 8, a second metallic material layer (30) disposed on one side (bottom surface in the drawing) of a first metallic material layer (20) and an intermediate conductive layer (40) disposed on a circuit pattern (10) can be formed. The second metallic material layer (30) can be disposed spaced apart from the circuit pattern (10) with the first metallic material layer (20) in between. The first metallic material layer (20) and the second metallic material layer (30) can be sequentially disposed from one side of the circuit pattern (10) exposed by a hole (H1). The first metallic material layer (20) and the second metallic material layer (30) can be said to constitute a single other conductive layer. At this time, the other conductive layer may have a stacked structure. The intermediate conductive layer (40) can be formed to cover the circuit pattern (10) on an insulating substrate (100).

[0109] The second metallic material layer (30) may include an Au layer or be an Au layer. The intermediate conductive layer (40) may include an Au layer or be an Au layer. For example, both the second metallic material layer (30) and the intermediate conductive layer (40) may be Au layers. The second metallic material layer (30) and the intermediate conductive layer (40) may be formed simultaneously in a single plating process. In other words, the second metallic material layer (30) and the intermediate conductive layer (40) may be formed together by a double-sided plating method. The second metallic material layer (30) and the intermediate conductive layer (40) may be layers plated by a flash plating method. The thickness of the second metallic material layer (30) may be, for example, about 0.001 to 0.01 μm, with non-limiting examples. The thickness of the intermediate conductive layer (40) may be, for example, about 0.001 to 0.01 μm.

[0110] Referring to FIG. 9, a color conductive layer (50) exhibiting a rose gold color can be formed by covering a circuit pattern (10) on an insulating substrate (100). In this embodiment, the color conductive layer (50) can be formed on an intermediate conductive layer (40). The color conductive layer (50) may be an Au-Cu alloy layer or an Au-Pd-Cu alloy layer.

[0111] In the above Au-Cu alloy layer, the Au content may be higher than the Cu content. As a specific example, the Cu content in the above Au-Cu alloy layer may be in the range of approximately 0.5 to 40 wt%, and the Au content may be in the range of approximately 60 to 99.5 wt%. When these compositional ranges are satisfied, a desirable rose gold color can be obtained, and it may be advantageous for securing excellent electrical properties. The surface resistance of the above Au-Cu alloy layer is approximately 500 mmΩ / mm 2 It may be less than or equal to. The surface resistance of the above Au-Cu alloy layer is, for example, about 100 to 500 mmΩ / mm 2The thickness of the above Au-Cu alloy layer may be in the range of about 0.01 to 0.2 μm, as a non-limiting example.

[0112] In the above Au-Pd-Cu alloy layer, the content of Au may be higher than the content of Cu and the content of Pd, respectively. In the above Au-Pd-Cu alloy layer, the content of Au may be higher than the sum of the content of Cu and the content of Pd. As a specific example, in the above Au-Pd-Cu alloy layer, the content of Cu may be in the range of about 0.5 to 30 wt%, the content of Pd may be in the range of about 5 to 15 wt%, and the content of Au may be in the range of about 55 to 94.5 wt%. Depending on the content of Au, Pd, and Cu in the above Au-Pd-Cu alloy layer, the expressed rose gold color can be controlled, and electrical properties can also be controlled. When satisfying the composition range mentioned above, a desirable rose gold color can be obtained, and it may also be advantageous for securing excellent electrical properties. Meanwhile, in the case of the Au-Pd-Cu alloy layer, since it contains more Pd compared to the Au-Cu alloy layer, it may be possible to achieve a slightly brighter color when realizing a rose gold color compared to the Au-Cu alloy layer. Therefore, the above-mentioned Au-Pd-Cu alloy layer may be capable of realizing a brighter and more emotional rose gold color than the above-mentioned Au-Cu alloy layer.

[0113] The surface resistance of the above Au-Pd-Cu alloy layer is approximately 500 mmΩ / mm 2 It may be less than or equal to. The surface resistance of the above Au-Pd-Cu alloy layer is, for example, about 100 to 500 mmΩ / mm 2 The thickness of the above Au-Pd-Cu alloy layer may be in the range of about 0.01 to 0.2 μm, as a non-limiting example.

[0114] The above Au-Cu alloy layer and the above Au-Pd-Cu alloy layer may be plating layers. The above Au-Cu alloy layer or the above Au-Pd-Cu alloy layer can be easily formed through a plating process (e.g., a single-sided plating process).

[0115] FIGS. 10 to 12 are cross-sectional views illustrating a method for manufacturing an electrical circuit for a smart card according to another embodiment of the present invention.

[0116] Referring to FIG. 10, a circuit pattern (11) composed of a conductor can be formed on an insulating substrate (100). An adhesive layer (110) may be placed on the insulating substrate (100), and a circuit pattern (11) may be placed on the adhesive layer (110). The adhesive layer (110) may be composed of an insulating material. Thus, the insulating substrate (100) and the adhesive layer (110) can be considered as a single insulating substrate (insulating substrate). In some cases, the adhesive layer (110) may not be used. A hole (H1) may be formed on the insulating substrate (100) to expose one side (the lower side in the drawing) of the circuit pattern (11). When the adhesive layer (110) is used, the hole (H1) may be formed by penetrating the insulating substrate (100) and the adhesive layer (110) in the thickness direction. One side of the circuit pattern (11) may be exposed by the hole (H1). Multiple holes (H1) may be formed spaced apart from each other.

[0117] Referring to FIG. 11, a metallic material layer (31) can be formed in contact with one side of the circuit pattern (11) exposed by the hole (H1). The metallic material layer (31) can be formed to cover one side of the circuit pattern (11) exposed by the hole (H1). The metallic material layer (31) can be described as a single-layer conductive layer on the other side. The metallic material layer (31) may be, for example, an Au layer. The Au layer may be formed by a plating process. For example, the Au layer may be formed by a single-sided plating process. Additionally, the Au layer may be formed by a flash plating method. The thickness of the Au layer may be, for example, about 0.001 to 0.01 μm.

[0118] Referring to FIG. 12, a color conductive layer (51) exhibiting a rose gold color can be formed by covering a circuit pattern (11) on an insulating substrate (100). In this embodiment, the color conductive layer (51) can be formed on the circuit pattern (11) without the interposition of an intermediate conductive layer. The color conductive layer (51) may be an Au-Cu alloy layer or an Au-Pd-Cu alloy layer.

[0119] The above Au-Cu alloy layer and the above Au-Pd-Cu alloy layer may be plating layers formed by a plating method (e.g., single-sided plating method). The plating method for forming the above Au-Cu alloy layer and the above Au-Pd-Cu alloy layer may be the same or substantially the same as described in FIG. 9. The material and properties of the color conductive layer (51) may be the same or generally the same as the color conductive layer (50) described in FIG. 9. The composition of the above Au-Cu alloy layer and the above Au-Pd-Cu alloy layer may be the same or substantially the same as described in FIG. 9.

[0120] FIG. 13 is a cross-sectional view showing an electrical circuit for a smart card according to another embodiment of the present invention. The structure shown in FIG. 13 may be a substrate structure for an IC chip (i.e., an electrical circuit board), and an IC chip (not shown) may be bonded to the bonding surface (bottom surface in the drawing) of the substrate structure for an IC chip.

[0121] Referring to FIG. 13, an electrical circuit for a smart card according to the present embodiment may include an insulating substrate (100) having a through hole (H1) formed in the thickness direction and a circuit pattern (15) disposed on the hole (H1) and the surrounding area of ​​the insulating substrate (100). The circuit pattern (15) may be formed of a conductor and may have a surface portion exposed by the hole (H1). In the drawing, a portion of the lower surface of the circuit pattern (15) may be exposed by the hole (H1).

[0122] The above electrical circuit may include an intermediate conductive layer (35) disposed to cover a circuit pattern (15) on an insulating substrate (100) and a color conductive layer (65) disposed to cover the intermediate conductive layer (35) on the insulating substrate (100). The intermediate conductive layer (35) may be formed of Ni. The color conductive layer (65) may be formed of an Au-Cu alloy exhibiting a rose gold color. The color conductive layer (65) may be referred to as a 'surface conductive layer' and also as a 'contact surface conductive layer'. The color conductive layer (65) may be a constituent material of a contact pad.

[0123] The above electrical circuit may include a 'multilayer other-side conductive layer' disposed in contact with the one side of the circuit pattern (15) exposed by the hole (H1). The multilayer other-side conductive layer may include a first metallic material layer (25), a second metallic material layer (45), and a third metallic material layer (55) disposed sequentially from the one side of the circuit pattern (15). The first metallic material layer (25) may be a Ni layer, the second metallic material layer (45) may be a first Au layer, and the third metallic material layer (55) may be a second Au layer. The first to third metallic material layers (25, 45, 55) may be disposed within the hole (H1).

[0124] The insulating substrate (100) may be a flexible substrate. The insulating substrate (100) may include a polymer or be composed of a polymer. For example, the insulating substrate (100) may include epoxy or be composed of epoxy. However, the material of the insulating substrate (100) is not limited to epoxy and can be varied in many ways. When using an insulating substrate (100) having flexible characteristics, the electrical circuit may have flexible characteristics.

[0125] An adhesive layer (110) may be disposed on an insulating substrate (100), and a circuit pattern (15) may be disposed on the adhesive layer (110). The adhesive layer (110) is a material layer for mutually bonding the insulating substrate (100) and the circuit pattern (15), and may be composed of an insulating material. Therefore, the insulating substrate (100) and the adhesive layer (110) can be considered as a single insulating substrate (insulating substrate). The hole (H1) may be formed to penetrate (penetrate in the thickness direction) the insulating substrate (100) and the adhesive layer (110). In some cases, the adhesive layer (110) may not be used.

[0126] A circuit pattern (15) may be formed on one side of an insulating substrate (100). A circuit pattern (15) may be formed on an adhesive layer (110). The circuit pattern (15) may include a conductor or be formed of a conductor. Therefore, the circuit pattern (15) may be referred to as a conductor pattern. Here, for convenience, the circuit pattern (15) is depicted simply, but in reality, the circuit pattern (15) may have a more complex structure than that depicted here. Also, here, the circuit pattern (15) is depicted as including a single pattern section, but the circuit pattern (15) may include a plurality of mutually spaced pattern sections, and the surface of the adhesive layer (110) may be exposed between the plurality of pattern sections. If the adhesive layer (110) is not used, the surface of the insulating substrate (100) may be exposed between the plurality of pattern sections.

[0127] The circuit pattern (15) may have a single-layer structure. For example, the circuit pattern (15) may have a single-layer structure composed of Cu. Here, Cu (copper) may be a constituent material of copper foil. However, in some cases, the circuit pattern (15) may have a stacked structure in which multiple conductive layers are stacked.

[0128] The color conductive layer (65) is a material layer exhibiting a rose gold color, and may be a layer formed of an Au-Cu alloy, i.e., an Au-Cu alloy layer. Here, the rose gold color may be a color that encompasses not only general rose gold but also pink gold. Rose gold and pink gold may be similar colors having mutually close RGB indices.

[0129] In the above Au-Cu alloy layer, the Au content may be higher than the Cu content. As a specific example, the Cu content in the above Au-Cu alloy layer may be in the range of approximately 20 t%, and the Au content may be in the range of approximately 60 t%. When satisfying this compositional range, a desirable rose gold color can be obtained, and it may be advantageous for securing excellent electrical properties. The surface resistance of the above Au-Cu alloy layer is approximately 500 mmΩ / mm 2 It may be less than or equal to. The surface resistance of the above Au-Cu alloy layer is, for example, about 100 to 500 mmΩ / mm 2 The thickness of the Au-Cu alloy layer may be in the range of about 0.01 to 0.2 μm, as a non-limiting example. The Au-Cu alloy layer may be a plating layer. That is, the color conductive layer (65) may be a plating layer. The color conductive layer (65) can be easily formed through a plating process.

[0130] The above electrical circuit may include an intermediate conductive layer (35) disposed between the circuit pattern (15) and the color conductive layer (65). The intermediate conductive layer (35) may be, for example, a Ni layer. Thus, the intermediate conductive layer (35) may be an intermediate Ni layer. The intermediate Ni layer may be a plating layer formed by a plating process. The thickness of the Ni layer may be, for example, about 0.5 to 8 μm. The plating quality and adhesion of the color conductive layer (65) may be improved by the intermediate conductive layer (35).

[0131] The above electrical circuit may include a multilayer other-side conductive layer covering one side of the circuit pattern (15) exposed by the hole (H1). The multilayer other-side conductive layer may be a conductive layer for electrical connection with an IC chip (not shown). The multilayer other-side conductive layer and the IC chip may be connected, for example, through wire bonding. In this embodiment, the multilayer other-side conductive layer may have a stacked structure. For example, the multilayer other-side conductive layer may include a first metallic material layer (25), a second metallic material layer (45), and a third metallic material layer (55). A first metallic material layer (25) may be positioned to contact one side of a circuit pattern (15) exposed by a hole (H1), a second metallic material layer (45) may be positioned spaced apart from the circuit pattern (15) with the first metallic material layer (25) in between, and a third metallic material layer (55) may be positioned spaced apart from the first metallic material layer (25) with the second metallic material layer (45) in between. The first metallic material layer (25), the second metallic material layer (45), and the third metallic material layer (55) may be positioned sequentially from one side of the circuit pattern (15) exposed by the hole (H1).

[0132] The first metallic material layer (25) may be a Ni layer, the second metallic material layer (45) may be a first Au layer, and the third metallic material layer (55) may be a second Au layer. The Ni layer, the first Au layer, and the second Au layer may be plating layers formed by a plating process. The thickness of the Ni layer may be, for example, about 0.5 to 8 μm, with no limitations. The first Au layer may be a layer plated by a flash plating method. Flash plating may be a base plating method that plates with a thin thickness of about 1 μm or less, for example, about 0.001 to 0.01 μm. The thickness of the first Au layer may be, for example, about 0.001 to 0.01 μm, with no limitations. The second Au layer may be a layer plated by a plating method other than flash plating. The thickness of the second Au layer may be approximately 0.5 to 8 μm, as a non-limiting example. The first Au layer may be in direct contact with the Ni layer, and the second Au layer may be in direct contact with the first Au layer. By forming the first Au layer and the second Au layer, bonding characteristics and electrical connection characteristics can be improved in wire bonding to an IC chip.

[0133] By further forming a first Au layer (i.e., 45) which is a flash plating layer, the variation in Au plating thickness and the plating quality can be improved by acting as a barrier between the Ni layer (i.e., 25) and the second Au layer (i.e., 55), thereby enabling stable wire bonding quality. Additionally, since there is a first Au layer (i.e., 45) which is a flash plating layer, the diffusion of Au from the second Au layer (i.e., 55) into the Ni layer (i.e., 25) can be prevented.

[0134] According to one embodiment of the present invention, the intermediate conductive layer (35) may be an intermediate Ni layer, and the intermediate Ni layer may be in direct contact with the circuit pattern (15), and the color conductive layer (65) may be in direct contact with the intermediate Ni layer. In other words, the intermediate conductive layer (35) formed of Ni may be in direct contact with the circuit pattern (15) and the color conductive layer (65). The lower surface of the intermediate conductive layer (35) may be in direct contact with the circuit pattern (15), and the upper surface of the intermediate conductive layer (35) may be in direct contact with the color conductive layer (65). In this case, excellent electrical characteristics can be secured while reducing manufacturing costs by simplifying the stacked structure. For example, an Au flash plating layer may not be applied between the intermediate Ni layer and the color conductive layer (65), and the effect of reducing manufacturing costs and improving characteristics can be obtained accordingly.

[0135] In FIG. 13, the material of the circuit pattern (15) can be denoted as A, the material of the first metallic material layer (25) and the intermediate conductive layer (35) as B, the material of the second metallic material layer (45) as C, the material of the third metallic material layer (55) as D, and the material of the color conductive layer (65) as E. In this case, the materials that can be A, B, C, D, and E can be summarized as shown in Table 3 below.

[0136] Classification ABCDE Substance CuNiAu (flash)AuAu-Cu

[0137] According to embodiments of the present invention, an electrical circuit for a smart card can be implemented that enhances aesthetics (visual characteristics) by upgrading the color of the metal contact surface, which was previously limited due to existing technical constraints, and implementing an emotional color, while also securing excellent electrical characteristics / functions. In particular, according to embodiments of the present invention, a rose gold color capable of stimulating emotional aspects is implemented on the surface portion (contact surface) of the electrical circuit, while maintaining a low electrical resistance of the surface portion (e.g., approximately 500 mmΩ / mm 2Since it is possible to secure (below), it is possible to achieve the effect of improving electrical characteristics and reliability while enhancing aesthetics.

[0138] FIGS. 14 to 18 are cross-sectional views illustrating a method for manufacturing an electrical circuit for a smart card according to another embodiment of the present invention.

[0139] Referring to FIG. 14, a device structure can be provided in which a circuit pattern (15) composed of a conductor is disposed on an insulating substrate (100). The insulating substrate (100) may have a through hole (H1) formed in the thickness direction, and the circuit pattern (15) may be disposed on the hole (H1) and the surrounding area of ​​the insulating substrate (100).

[0140] The insulating substrate (100) may be a flexible substrate. The insulating substrate (100) may include a polymer or be composed of a polymer. An adhesive layer (110) may be disposed on the insulating substrate (100), and a circuit pattern (15) may be disposed on the adhesive layer (110). The adhesive layer (110) is a material layer for bonding the insulating substrate (100) and the circuit pattern (15) together, and may be composed of an insulating material. Thus, the insulating substrate (100) and the adhesive layer (110) can be considered as a single insulating substrate (insulating substrate). In some cases, the adhesive layer (110) may not be used.

[0141] A hole (H1) can be formed in the insulating substrate (100) to expose one side (the lower side in the drawing) of the circuit pattern (15). If an adhesive layer (110) is used, the hole (H1) can be formed by penetrating the insulating substrate (100) and the adhesive layer (110) in the thickness direction. One side of the circuit pattern (15) can be exposed by the hole (H1). A plurality of holes (H1) can be formed spaced apart from each other.

[0142] After forming an adhesive material layer on a substrate, holes (H1) penetrating the substrate and the adhesive material layer can be formed, and circuit patterns (15) can be formed thereon. For example, after forming a conductive film on the adhesive material layer (i.e., 110) in which the holes (H1) are formed, the circuit pattern (15) can be formed by patterning the conductive film. A predetermined lithography process may be used for the patterning. Through this process, a device structure as shown in FIG. 14 can be formed. However, the specific method for forming the device structure of FIG. 14 is not limited to the above and may vary depending on the case.

[0143] The circuit pattern (15) may have a single-layer structure. For example, the circuit pattern (15) may have a single-layer structure composed of Cu. Here, Cu (copper) may be a constituent material of copper foil. However, in some cases, the circuit pattern (15) may have a stacked structure in which multiple conductive layers are stacked.

[0144] The upper side of the device structure of FIG. 14 may correspond to a 'contact surface', and the lower side may correspond to a 'bonding surface'. A predetermined pretreatment (plating pretreatment) process may be performed on the device structure of FIG. 14.

[0145] Referring to FIG. 15, a first metallic material layer (25) may be formed in contact with the one side of the circuit pattern (15) exposed by the hole (H1), and an intermediate conductive layer (35) may be formed to cover the circuit pattern (15) on an insulating substrate (100). The first metallic material layer (25) may be formed to cover the one side of the circuit pattern (15) exposed by the hole (H1). The first metallic material layer (25) may be a Ni layer. The intermediate conductive layer (35) may be a Ni layer (i.e., an intermediate Ni layer). Both the first metallic material layer (25) and the intermediate conductive layer (35) may be Ni layers. The first metallic material layer (25) and the intermediate conductive layer (35) may be formed simultaneously in a single plating process. In other words, the first metallic material layer (25) and the intermediate conductive layer (35) may be formed together by a double-sided plating method. The thickness of the first metallic material layer (25) composed of Ni may be about 0.5 to 8 μm, as a non-limiting example. Similarly, the thickness of the intermediate conductive layer (35) composed of Ni may be about 0.5 to 8 μm, as a non-limiting example.

[0146] Referring to FIG. 16, a second metallic material layer (45) can be formed on the exposed surface (bottom surface in the drawing) of the first metallic material layer (25). The second metallic material layer (45) may be the first Au layer. The second metallic material layer (45) may be a layer plated by a flash plating method. The thickness of the second metallic material layer (45) may be, for example, about 0.001 to 0.01 μm. The second metallic material layer (45) may be formed through a single-sided plating process. Therefore, when forming the second metallic material layer (45), plating may not be performed on the intermediate conductive layer (35).

[0147] Referring to FIG. 17, a third metallic material layer (55) can be formed on the exposed surface (bottom surface in the drawing) of the second metallic material layer (45). The third metallic material layer (55) may be the second Au layer. The third metallic material layer (55) may be a layer plated by a plating method other than flash plating. The thickness of the third metallic material layer (55) may be, for example, about 0.5 to 8 μm, but is not limited. The third metallic material layer (55) may be formed through a single-sided plating process. Therefore, when forming the third metallic material layer (55), plating may not be performed on the intermediate conductive layer (35).

[0148] The first metallic material layer (25), the second metallic material layer (45), and the third metallic material layer (55) can be said to constitute a single multilayer conductive layer on the other side. The first metallic material layer (25) may be a Ni layer, the second metallic material layer (45) may be a first Au layer, and the third metallic material layer (55) may be a second Au layer. The first Au layer may be in direct contact with the Ni layer, and the second Au layer may be in direct contact with the first Au layer. Here, the first Au layer may be a flash plating layer.

[0149] Referring to FIG. 18, a color conductive layer (65) exhibiting a rose gold color can be formed by covering an intermediate conductive layer (35) on an insulating substrate (100). The color conductive layer (65) may be a layer composed of an Au-Cu alloy, i.e., an Au-Cu alloy layer.

[0150] In the above Au-Cu alloy layer, the Au content may be higher than the Cu content. As a specific example, the Cu content in the above Au-Cu alloy layer may be in the range of approximately 20 t%, and the Au content may be in the range of approximately 60 t%. When satisfying this compositional range, a desirable rose gold color can be obtained, and it may be advantageous for securing excellent electrical properties. The surface resistance of the above Au-Cu alloy layer is approximately 500 mmΩ / mm 2 It may be less than or equal to. The surface resistance of the above Au-Cu alloy layer is, for example, about 100 to 500 mmΩ / mm 2 The thickness of the above Au-Cu alloy layer may be in the range of about 0.01 to 0.2 μm, as a non-limiting example.

[0151] The above Au-Cu alloy layer may be a plating layer. That is, the color conductive layer (65) may be a plating layer. The color conductive layer (65) can be easily formed through a plating process. The color conductive layer (65) can be formed through a single-sided plating process. Therefore, when forming the color conductive layer (65), plating may not be performed on the surface of the third metallic material layer (55).

[0152] According to one embodiment of the present invention, the intermediate conductive layer (35) may be an intermediate Ni layer, and the intermediate Ni layer may be in direct contact with the circuit pattern (15), and the color conductive layer (65) may be in direct contact with the intermediate Ni layer. In other words, the intermediate conductive layer (35) formed of Ni may be in direct contact with the circuit pattern (15) and the color conductive layer (65). In this case, excellent electrical characteristics can be secured while reducing manufacturing costs by simplifying the stacking structure. For example, an Au flash plating layer may not be applied between the intermediate Ni layer and the color conductive layer (65), and the effect of reducing manufacturing costs and improving characteristics can be obtained accordingly.

[0153] FIG. 19 is an image showing a tape-type circuit element (255) including a plurality of electrical circuits (205) for a smart card according to another embodiment of the present invention.

[0154] Referring to FIG. 19, the tape-type circuit element (255) may include a plurality of structurally connected electrical circuits (205) for smart cards. The electrical circuits (205) for smart cards may have the electrical circuit configuration described with reference to FIG. 13. After manufacturing the tape-type circuit element (255) including a plurality of electrical circuits (205) for smart cards, individual electrical circuits (205) may be separated therefrom. Each of the electrical circuits (205) may have a contact pad (a plurality of contact pads).

[0155] According to the embodiments of the present invention described above, it is possible to implement an electrical circuit for a smart card that can enhance aesthetics (visual characteristics) by upgrading the color of the metal contact surface—which was previously limited due to existing technical constraints—and implementing an emotional color, while also securing excellent electrical characteristics / functions. In particular, according to the embodiments of the present invention, a rose gold color capable of stimulating emotional aspects is implemented on the surface portion (contact surface) of the electrical circuit for a smart card, while maintaining a low electrical resistance of the surface portion (e.g., approximately 500 mmΩ / mm 2 Since it is possible to secure (hereinafter), electrical characteristics can be improved while enhancing aesthetics. Furthermore, according to the embodiments of the present invention, since a color conductive layer having a rose gold color can be easily formed by a plating method, an electrical circuit for a smart card and a smart card including the same can be easily manufactured to satisfy various consumer needs by enhancing aesthetics. Accordingly, visual added value can be enhanced by adding emotional / aesthetic functions to the electrical communication function of a wireless communication chip card.

[0156] This specification discloses preferred embodiments of the present invention. Although specific terms have been used, they are used merely in a general sense to facilitate the explanation of the technical content of the invention and to aid in understanding the invention, and are not intended to limit the scope of the invention. It is obvious to those skilled in the art that, in addition to the embodiments disclosed herein, other variations based on the technical concept of the present invention are possible. For example, those skilled in the art will understand that the electrical circuit for a smart card, the method of manufacturing the same, and the smart card including the electrical circuit according to the embodiments described with reference to FIGS. 1 to 19 can be modified in various ways. As a specific example, it will be understood that the Ni layer can be replaced with a Ni-based material layer (or a Ni-containing material layer), and the material and stacking structure of the conductive layers can be changed. Furthermore, it will be understood that although the electrical circuit is illustrated simply, it may actually have a more complex and sophisticated circuit structure. It will also be understood that the specific structure and manufacturing method of the electrical circuit can be varied, and the application fields of the electrical circuit can also be varied. Therefore, the scope of the invention should not be determined by the described embodiments, but by the technical concept described in the patent claims.

Claims

1. As an electrical circuit for a smart card, Insulating substrate having through-holes formed in the thickness direction; A circuit pattern formed of a conductor, disposed on the hole and the surrounding region of the insulating substrate, having a surface portion exposed by the hole; An intermediate conductive layer formed of Ni, disposed on the insulating substrate to cover the circuit pattern; A color conductive layer formed of an Au-Cu alloy having a rose gold color, disposed on the insulating substrate to cover the intermediate conductive layer; and An electrical circuit for a smart card comprising: a multilayer other side conductive layer arranged to be in contact with one side of the circuit pattern exposed by the hole, and including a first metallic material layer, a second metallic material layer, and a third metallic material layer arranged sequentially from one side of the circuit pattern, wherein the first metallic material layer is a Ni layer, the second metallic material layer is a first Au layer, and the third metallic material layer is a second Au layer.

2. In Paragraph 1, The above intermediate conductive layer is an intermediate Ni layer, and An electrical circuit for a smart card in which the intermediate Ni layer is in direct contact with the circuit pattern and the color conductive layer is in direct contact with the intermediate Ni layer.

3. In Paragraph 1, An electrical circuit for a smart card in which the first Au layer is in direct contact with the Ni layer, and the second Au layer is in direct contact with the first Au layer.

4. In Paragraph 1, The above first Au layer is a flash plating layer for an electrical circuit for a smart card.

5. In Paragraph 1, An electrical circuit for a smart card in which the content of Cu in the above Au-Cu alloy is in the range of 20 t% and the content of Au is in the range of 60 t%.

6. In Paragraph 1, An electrical circuit for a smart card, wherein the thickness of the color conductive layer is in the range of 0.01 to 0.2 μm.

7. In Paragraph 1, The surface resistance of the above-mentioned color conductive layer is 500 mmΩ / mm 2 Electrical circuit for smart cards with less than 100 8. In Paragraph 1, The above-mentioned color conductive layer is a plating layer for an electrical circuit for a smart card.

9. A smart card comprising an electrical circuit for a smart card as described in any one of claims 1 to 8.

10. A method for manufacturing an electrical circuit for a smart card, A step of providing a device structure having a circuit pattern composed of a conductor disposed on an insulating substrate, wherein the insulating substrate has a through-hole formed in the thickness direction, and the circuit pattern is disposed on the hole and the surrounding region of the insulating substrate; A step of forming an intermediate conductive layer composed of Ni and disposed on the insulating substrate to cover the circuit pattern, and a first metallic material layer composed of Ni and disposed to contact one side of the circuit pattern exposed by the hole; A step of forming a second metallic material layer as a first Au layer on the exposed surface of the first metallic material layer; A step of forming a third metallic material layer as a second Au layer on the exposed surface of the second metallic material layer; and A method for manufacturing an electrical circuit for a smart card, comprising the step of forming a color conductive layer composed of an Au-Cu alloy having a rose gold color, which is disposed on the insulating substrate to cover the intermediate conductive layer.

11. In Paragraph 10, The above intermediate conductive layer is an intermediate Ni layer, and A method for manufacturing an electrical circuit for a smart card in which the intermediate Ni layer is in direct contact with the circuit pattern and the color conductive layer is in direct contact with the intermediate Ni layer.

12. In Paragraph 10, The above first metallic material layer is a Ni layer, and A method for manufacturing an electrical circuit for a smart card in which the first Au layer is in direct contact with the Ni layer, and the second Au layer is in direct contact with the first Au layer.

13. In Paragraph 10, A method for manufacturing an electrical circuit for a smart card in which the first Au layer is a flash plating layer.

14. In Paragraph 10, A method for manufacturing an electrical circuit for a smart card, wherein the content of Cu in the above Au-Cu alloy is in the range of 20 t% and the content of Au is in the range of 60 t%.

15. In Paragraph 10, A method for manufacturing an electrical circuit for a smart card, wherein the thickness of the color conductive layer is in the range of 0.01 to 0.2 μm.

Images