Substrate and electronic element having inductor mounted on surface thereof

Abstract

The present invention relates to a substrate and an electronic element having an inductor mounted on a surface thereof. The present invention comprises: a substrate including an inductor pattern having an inductance between a plurality of insulation layers stacked in a vertical direction; and at least one surface-mounted-element-type inductor which has one end electrically connected to the inductor pattern and is mounted on the substrate, wherein one of two inductors is an embedded-type inductor, and a low-inductance inductor is mounted on the outside, thereby making it possible to reduce the total thickness of a package, and vary the inductance value through serial and parallel connections of the two inductors.

Description

Electronic device having a substrate and an inductor mounted on its surface

[0001] The present invention relates to an electronic device, and more specifically, to an electronic device capable of having various inductor capacities while reducing thickness by embedding a portion of the inductor capacitance and mounting the inductor externally.

[0002] Inductors, along with resistors and capacitors, are one of the important passive components that make up electronic circuits and can be used in various systems and components such as low-noise amplifiers, mixers, voltage-regulating oscillators, and matching coils.

[0003] As electronic devices become smaller, there is a demand for miniaturization of the electronic component modules installed in them. However, in the case of inductors, there is a problem in that the Q characteristic value, which represents the quality factor, deteriorates as the size decreases.

[0004] Increasing the inductor capacitance leads to an increase in the overall module thickness due to the inductor's thickness, and the size of the inductor imposes limitations on reducing the overall module size. Therefore, there is a need for electronic components that can vary the inductor capacitance value while reducing the size.

[0005] The present invention aims to provide an electronic device capable of overcoming the limitations of thickness reduction.

[0006] Another objective of the present invention is to provide an electronic device capable of changing the inductor capacitance value while reducing the thickness.

[0007] A substrate according to the present invention for achieving such an objective comprises a plurality of insulating layers stacked in a vertical direction; and a plurality of metal layers disposed between the plurality of insulating layers, wherein at least one of the plurality of metal layers comprises an inductor pattern, and the inductor pattern comprises a first pad and a second pad spaced apart along a first horizontal direction perpendicular to the vertical direction and in contact with an external mounted inductor; and a coil pattern disposed below the first pad and the second pad and extending along the first horizontal direction.

[0008] In the substrate according to the present invention, the coil pattern may be formed into a coil structure having a plurality of turns, wherein a plurality of conductor patterns consisting of a pair of layers are each dispersed and formed.

[0009] In the substrate according to the present invention, the central axis of a plurality of turns formed by a coil pattern may be parallel to the first horizontal direction.

[0010] In the substrate according to the present invention, the center axis of a plurality of turns formed by a coil pattern can be parallel to the center axis of the internal coil of an external mounted inductor.

[0011] In the substrate according to the present invention, a plurality of conductor patterns are formed linearly and spaced apart from each other at regular intervals and arranged in each layer, and are connected to each other by connecting conductors that penetrate the insulating layer.

[0012] In the substrate according to the present invention, the diameter of the connecting conductor inside the conductor pattern may be larger than the width of the conductor pattern.

[0013] In the substrate according to the present invention, the width of the second horizontal direction of the coil pattern region may be smaller than the width of the first pad and the second pad.

[0014] In the substrate according to the present invention, at least a portion of the coil pattern overlaps perpendicularly with the mounted inductor, and the remaining portion may not overlap perpendicularly with the mounted inductor.

[0015] In the substrate according to the present invention, the inductor pattern may have an inductance between 1 nH and 12 nH.

[0016] In the substrate according to the present invention, the first pad and the second pad may have the same shape, for example, a square shape.

[0017] In a substrate according to the present invention, the distance between the first pad and the second pad may be smaller than the width of the first pad and the second pad.

[0018] In the substrate according to the present invention, the positive terminals of the coil pattern may be directly connected to the first pad and the second pad, or at least one positive terminal of the coil pattern may be indirectly connected to the first pad or the second pad.

[0019] In the substrate according to the present invention, the coil pattern is formed by dispersing a pair of multiple conductor patterns in each layer to form multiple layers, and the conductive patterns of different layers can be electrically connected.

[0020] An electronic device according to the present invention comprises: a substrate having an inductor pattern having an inductance between a plurality of insulating layers stacked in a vertical direction; and at least one surface-mount device type inductor having one end electrically connected to the inductor pattern and mounted on the substrate.

[0021] In an electronic device according to the present invention, the inductor pattern may include a first pad and a second pad that are spaced apart along a first horizontal direction on a surface on which a surface-mount type inductor is mounted and contact the surface-mount type inductor; and a coil pattern that is positioned below the first pad and the second pad and extends along the first horizontal direction.

[0022] In the electronic device according to the present invention, the coil pattern may be formed as a coil structure having a plurality of turns, wherein a plurality of conductor patterns consisting of a pair of layers are each dispersed and formed.

[0023] In the electronic device according to the present invention, at least one end of the coil pattern may be indirectly connected to the first pad or the second pad.

[0024] In the electronic device according to the present invention, the coil pattern forms a plurality of layers in which a pair of multiple conductor patterns are distributed in each layer, and the conductive patterns of different layers can be electrically connected.

[0025] The electronic device according to the present invention can reduce the overall package thickness by embedding a portion of the inductor capacitance and mounting a low-capacitance inductor externally, and can expect the effect of changing the inductor capacitance by utilizing the embedded inductor.

[0026] FIG. 1 is a perspective view showing an electronic device according to the present invention.

[0027] FIG. 2 is an exemplary diagram showing an electronic device according to a first embodiment of the present invention.

[0028] FIG. 3 is an exemplary diagram of an electronic device according to the first embodiment of the present invention viewed from the y-axis direction.

[0029] FIG. 4a is an example diagram of an inductor pattern of an electronic device according to a first embodiment of the present invention, viewed from the z-axis direction.

[0030] FIG. 4b is an example diagram of an inductor pattern of an electronic device according to a first embodiment of the present invention viewed from the y-axis direction.

[0031] FIG. 4c is an illustrative diagram showing an enlarged portion of a conductor pattern among the inductor patterns of an electronic device according to the first embodiment of the present invention.

[0032] FIG. 5 is an exemplary diagram showing the inductance capacity of an inductor pattern of an electronic device according to the first embodiment of the present invention.

[0033] FIG. 6 is a graph showing the inductance capacitance by frequency band of an electronic device according to the first embodiment of the present invention.

[0034] FIG. 7 is an exemplary diagram showing an electronic device according to a second embodiment of the present invention.

[0035] FIG. 8 is an exemplary view of an electronic device according to a second embodiment of the present invention, viewed from the y-axis direction.

[0036] FIG. 9a is an example diagram of an inductor pattern of an electronic device according to a second embodiment of the present invention, viewed from the z-axis direction.

[0037] FIG. 9b is an example diagram of an inductor pattern of an electronic device according to a second embodiment of the present invention, viewed from the y-axis direction.

[0038] FIG. 10 is an exemplary diagram showing the inductance capacity of an inductor pattern of an electronic device according to a second embodiment of the present invention.

[0039] FIG. 11 is a graph showing the inductance capacitance of an electronic device according to a second embodiment of the present invention in a frequency band of 0.5 GHz to 1.5 GHz.

[0040] With respect to the embodiments of the present invention disclosed in the text, specific structural or functional descriptions are provided merely for the purpose of explaining the embodiments of the present invention, and the embodiments of the present invention may be implemented in various forms and should not be interpreted as being limited to the embodiments described in the text.

[0041] The present invention is capable of various modifications and may take various forms, and specific embodiments are illustrated in the drawings and described in detail in the text. However, this is not intended to limit the invention to the specific disclosed forms, and it should be understood that the invention includes all modifications, equivalents, and substitutions that fall within the spirit and scope of the invention.

[0042] Terms such as "first," "second," etc., may be used to describe various components, but said components are not limited by said terms. These terms are used solely for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be named the second component, and similarly, the second component may be named the first component.

[0043] When it is stated that one component is "connected" or "connected" to another component, it should be understood that while it may be directly connected or connected to that other component, there may also be other components present in between. Conversely, when it is stated that one component is "directly connected" or "directly connected" to another component, it should be understood that there are no other components present in between. Other expressions describing the relationship between components, such as "between" and "exactly between," or "adjacent to" and "directly adjacent to," should be interpreted in the same way. Likewise, the meaning of "placed on" may imply that it is placed directly on the surface of a component or placed above it at a distance from the surface.

[0044] The terms used in this application are used merely to describe specific embodiments and are not intended to limit the invention. The singular expression includes the plural expression unless the context clearly indicates otherwise. In this application, terms such as “comprising” or “having” are intended to specify the existence of the disclosed features, numbers, steps, actions, components, parts, or combinations thereof, and should be understood as not precluding the existence or addition of one or more other features, numbers, steps, actions, components, parts, or combinations thereof.

[0045] Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as generally understood by those skilled in the art to which the present invention pertains. Terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology, and should not be interpreted in an ideal or overly formal sense unless explicitly defined in this application.

[0046] Meanwhile, if an embodiment can be implemented differently, the functions or operations specified within a particular block may occur in a different order than that specified in the flowchart. For example, two consecutive blocks may actually be executed substantially simultaneously, or, depending on the related functions or operations, the blocks may be executed in reverse order.

[0047] Hereinafter, an electronic device according to the present invention will be described with reference to the attached drawings. For convenience of explanation, the electronic device according to the embodiment is described using a Cartesian coordinate system (x, y, z), but may be described using other coordinate systems, and the embodiment is not limited thereto. According to the Cartesian coordinate system, the x-axis, y-axis, and z-axis are orthogonal to each other, but the embodiment is not limited thereto. That is, the x-axis, y-axis, and z-axis may intersect each other.

[0048] FIG. 1 is a schematic perspective view of an electronic device according to the present invention. The electronic device (100) according to the present invention comprises a substrate (200) and a surface-mount type inductor (300) disposed thereon.

[0049] The substrate (200) has an inductor pattern (shown in the drawings below) having inductance between a plurality of insulating layers (220) stacked in a vertical direction. The inductor pattern includes a first pad (211) and a second pad (212) that are spaced apart from each other along a first horizontal direction (x-axis direction) on the upper part of the substrate (200) and are electrically connected to the surface mount element type (300).

[0050] A surface-mount inductor (300) comprises a body (310) and a terminal portion (320) formed at the bottom thereof. The terminal portion (320) includes a first terminal (321) electrically connected to a first pad (211) of a substrate (200) and a second terminal (322) electrically connected to a second pad (212) of a substrate (200).

[0051] FIG. 2 is an exemplary diagram showing an electronic device according to a first embodiment of the present invention, and FIG. 3 is an exemplary diagram of an electronic device according to a first embodiment of the present invention viewed from the y-axis direction.

[0052] The insulating layer (220) of the substrate (200) is omitted, and the inductor pattern including the first pad (211), the second pad (212), and the coil pattern (230) disposed below it, and the surface mount element type inductor (300) disposed above it are shown.

[0053] The above surface mount type inductor (300) may be made of a wound type or a thin-film type inductor. In this example, a wound type inductor with a coil (340) wound around a ceramic core (330) is shown as an example, but the present invention is not limited thereto. A first terminal (321) and a second terminal (322) are arranged at the bottom of the body (310) and spaced apart in a first horizontal direction (x-axis direction). The coil (340) is wound to wrap around a portion of the outer surface of the ceramic core (330) with respect to the central axis (VL2) of the coil (340).

[0054] Although not illustrated, connection terminals (not illustrated) in the form of pads or pins that are bonded to a main substrate (not illustrated) on which the electronic element of the present invention is mounted may be formed. At this time, the connection terminals may be electrically connected to the inductor pattern of the substrate (200) and the surface-mount inductor (300), respectively.

[0055] The inductor pattern formed in a stacked manner on the substrate (200) has the advantage of being able to be miniaturized and have a reduced thickness compared to the surface-mount inductor (300), and is also advantageous for DC resistance, so it can be widely used in power circuits that require miniaturization and high current. The coil pattern (230) is placed below the first pad (211) and the second pad (212), and is composed of a coil structure having multiple turns in which a plurality of conductor patterns consisting of a pair of layers are each dispersed and formed.

[0056] The inductor pattern may be a substrate-type inductor comprising a metal layer having a coil pattern of a coil structure formed on an insulating layer. The coil pattern may refer to a conductor pattern formed to have inductance. The coil pattern may be made of a material including silver (Ag) or copper (Cu) or an alloy thereof, but is not necessarily limited thereto. A plurality of coil turns forming the coil pattern (230) may be formed by a plurality of conductor patterns (231, 232) consisting of a pair of layers that are linearly formed and spaced apart from each other; it is preferable that the plurality of conductor patterns be arranged side by side at a constant interval from each other, but is not necessarily limited thereto.

[0057] A plurality of conductor patterns (231) formed in one layer can be electrically connected to a plurality of conductor patterns (232) formed in another layer by a connecting conductor (233) penetrating the insulating layer. That is, the conductor patterns (231, 232) form a continuous coil pattern by means of the connecting conductor (233). The plurality of conductor patterns (231, 232) are formed linearly and spaced apart from each other at regular intervals and arranged in each layer, and are connected to each other by a connecting conductor (233) penetrating the insulating layer. For example, the connecting portion (231a) of the first conductor pattern (231) in the upper layer is electrically connected to the connecting portion (232a) of the second conductor pattern (232) in the lower layer via the connecting conductor (233).

[0058] Specifically, the coil pattern (230) may include a plurality of first conductor patterns (231) disposed on one side of the insulating layer, a plurality of second conductor patterns (232) disposed on the other side of the insulating layer, and a plurality of connecting conductors (233) that respectively connect the first conductor patterns and the second conductor patterns corresponding to each other. The plurality of first conductor patterns (231) may have a linear shape extending in a first direction and may be spaced apart from each other in a second direction. The plurality of second conductor patterns (232) may have a linear shape extending in a third direction and may be spaced apart from each other in a second direction. The plurality of first conductor patterns (231) and the plurality of second conductor patterns (232) may have a corresponding relationship with each other and may be connected through the plurality of connecting conductors (233) according to the corresponding relationship. In one embodiment, the first direction may be a second horizontal direction (y-axis direction), the second direction may be a first horizontal direction, and the third direction may be a third horizontal direction having an angle between the first horizontal direction and the second horizontal direction. In one embodiment, the third direction may be a second horizontal direction, the second direction may be a first horizontal direction, and the first direction may be a third horizontal direction having an angle between the first horizontal direction and the second horizontal direction.

[0059] For example, one end of the first conductor pattern (231) may be connected to a second conductor pattern (232) that overlaps perpendicularly to one end of the first conductor pattern (231) through a connecting conductor (233). And the other end of the first conductor pattern (231) may be connected to a second conductor pattern (232) that overlaps perpendicularly to the other end of the first conductor pattern (231) through a connecting conductor (233). Here, the second conductor pattern (232) that overlaps perpendicularly to one end of the first conductor pattern (231) and the second conductor pattern (232) that overlaps perpendicularly to the other end of the first conductor pattern (232) are different from each other and may be adjacent to each other.

[0060] For example, one end of the second conductor pattern (232) may be connected to the first conductor pattern (231) and the connecting conductor (233) which overlap in a vertical direction with the end of the second conductor pattern (232). The other end of the second conductor pattern (232) may be connected to the first conductor pattern (231) and the connecting conductor (233) which overlap in a vertical direction with the other end of the second conductor pattern (232). Here, the first conductor pattern (231) which overlaps in a vertical direction with the end of the second conductor pattern (232) and the first conductor pattern (231) which overlaps in a vertical direction with the other end of the second conductor pattern (232) are different from each other and may be adjacent to each other. The central axis (VL1) of the plurality of turns formed by the coil pattern (230) is parallel to the first horizontal direction (x-axis direction). In addition, the central axis (VL1) of the multiple turns formed by the coil pattern (230) is parallel to the central axis (VL2) of the turns formed by the coil (340) inside the surface mount type inductor (300).

[0061] The second terminal (234b) may be connected via a connecting conductor (233) to the first conductor pattern (231) positioned at the outermost position relative to one direction of the first horizontal direction among a plurality of first conductor patterns (231). Alternatively, it may be connected via a connecting conductor (233) to the second conductor pattern (232) positioned at the outermost position relative to one direction of the first horizontal direction among a plurality of second conductor patterns (232). The conductor pattern to which the second terminal (234b) is connected via the connecting conductor (233) may be selectively determined according to the circuit design.

[0062] The first terminal (234a) may be connected via a connecting conductor (233) to the first conductor pattern (231) positioned at the outermost position relative to the other direction of the first horizontal direction among a plurality of first conductor patterns (231). Alternatively, the first terminal (234a) may be connected via a connecting conductor (233) to the second conductor pattern (232) positioned at the outermost position relative to the other direction of the first horizontal direction among a plurality of second conductor patterns (232). The conductor pattern to which the first terminal (234a) is connected via the connecting conductor (233) may be selectively determined according to the circuit design.

[0063] The second terminal (234b) of the coil pattern (230) is directly connected to the second terminal (322) of the surface-mount inductor (300) through the second pad (212), but the first terminal (234a) of the coil pattern (230) is not directly connected to the first pad (211).

[0064] FIG. 4a is an exemplary diagram of an inductor pattern of an electronic device according to a first embodiment of the present invention viewed from the z-axis direction, FIG. 4b is an exemplary diagram of an inductor pattern of an electronic device according to a first embodiment of the present invention viewed from the y-axis direction, and FIG. 4c is an exemplary diagram showing an enlarged portion of a conductor pattern among the inductor patterns of an electronic device according to a first embodiment of the present invention.

[0065] As described above, the first pad (211) may be formed in a square shape as in the embodiment. That is, the first pad (211) may have a square shape with a horizontal length (a1) and a vertical length (b1) equal. Meanwhile, in the present disclosure, the shapes of the second pad (211) and the second pad (212) are not limited to a square, but may have various shapes such as a rectangle or a circle. In addition, the second pad (212) may have the same shape as the first pad (211). That is, the horizontal length (a1) of the first pad (211) may be equal to the horizontal length (a2) of the second pad (212), and the vertical length (b1) of the first pad (211) may be equal to the vertical length (b2) of the second pad (212). The spacing distance (c) between the first pad (211) and the second pad (212) may be shorter than each horizontal length (a1, a2) or each vertical length (b1, b2) (c ≤ a1 or c ≤ b1). For example, the horizontal length (a1) and vertical length (b1) of the first pad (211) may be 0.5 mm, and the first pad (211) and the second pad (212) may be spaced apart with a spacing distance (c) of 0.4 mm.

[0066] The first conductor pattern (231) may include a first connecting portion (231a) at both ends, and the second conductor pattern (232) may include a second connecting portion (232a) at both ends. The diameter (d1) of the first terminal (234a) of the coil pattern (230) may be formed larger than the respective diameters (d2) of the first connecting portion (231a) of the first conductor pattern (231) of the upper layer and the second connecting portion (232a) of the second conductor pattern (232) of the lower layer. For example, the diameter (d1) of the first terminal (234a) of the coil pattern (230) may be formed to be 0.05 mm to 0.15 mm. For example, the diameter (d1) of the first terminal (234a) may be 0.12 mm. The diameter (d2) of the first connecting portion (231a) of the first conductor pattern (231) of the upper layer and the second connecting portion (232a) of the second conductor pattern (232) of the lower layer can be formed to be 0.03 mm to 0.1 mm. For example, the diameter (d2) of the first connecting portion (231a) and the second connecting portion (232a) can be formed to be 0.06 mm. At this time, the first conductor pattern (231) of the upper layer and the second conductor pattern (232) of the lower layer can each be formed with a conductor having a line width (w1, w2) of 0.015 mm to 0.04 mm. For example, the first conductor pattern (231) and the second conductor pattern (232) of the lower layer can each be made of a conductor having a line width (w1, w2) of 0.025 mm. The spacing distance (L1) between the first connection parts (231a) or between the second connection parts (232a) can be formed to be 0.15 mm to 0.35 mm. For example, the spacing distance (L1) can be 0.26 mm. The height (H) in the vertical direction (z-axis direction) from the second conductor pattern (232) of the coil pattern (230) to the first terminal (234a) of the coil pattern (230) or the second terminal (234b) of the coil pattern (230) can be formed to be 0.15 mm to 0.4 mm. For example, the height (H) can be 0.212 mm. Meanwhile, the total length (L2) of the inductor pattern based on the first horizontal direction (x-axis direction) is 1.0 mm to 3.It may be 0 mm. For example, with respect to the first horizontal direction, the total length (L2) from the outer surface of the first terminal (234a) of the coil pattern (230) to the outer surface furthest from the first terminal (234a) of the second pad (212) with respect to the first horizontal direction may be 2.0 mm. Meanwhile, the aforementioned numerical values ​​(d1, d2, w1, w2, L1, H, L2, etc.) are examples and the present disclosure is not limited thereto.

[0067] FIG. 5 is an exemplary diagram showing the inductance capacity of an inductor pattern of an electronic device according to a first embodiment of the present invention, and FIG. 6 is a graph showing the inductance capacity of an electronic device according to a first embodiment of the present invention in a frequency band of 0.5 GHz to 1.5 GHz.

[0068] As described above, when the inductance of the surface-mount type inductor (300) is 3.1 nH, the inductance of the conductor pattern from the first terminal (234a) to the second terminal (234b) of the substrate (200) containing the inductor pattern becomes 8.3 nH, and the total inductance capacity between the two terminals (T1, T2) of the electronic device (100) in the frequency band of 1 GHz becomes 11.4 nH. Under the premise that there is no mutual induction between the inductance of the substrate-type inductor pattern (200) and the inductance of the surface-mount type inductor (300), the electronic device (100) has a value that is the sum of the two inductance values. That is, since the substrate-type inductor pattern (200) and the surface-mount device-type inductor (300) between the first terminal (T1) and the second terminal (T2) are connected in series, the total inductance value of the electronic device is L tot = L 200 + L 300 As shown, the inductance value (L) of the two inductors (200, 300) 200 , L 300 It becomes the sum of ).

[0069] FIG. 7 is an exemplary diagram showing an electronic device according to a second embodiment of the present invention, and FIG. 8 is an exemplary diagram of an electronic device according to a second embodiment of the present invention viewed from the y-axis direction.

[0070] Unlike the first embodiment, the first terminal (234a) of the coil pattern (230) is in contact with the first pad (211), and the second terminal (234b) of the coil pattern (230) is connected to the second pad (212). The first terminal (234a) of the coil pattern (230) and the second terminal (234b) of the coil pattern (230) can each be electrically connected to a conductor pattern (232) formed in one layer through a connecting conductor (233) that penetrates at least one insulating layer.

[0071] FIG. 9a is an exemplary view of an inductor pattern of an electronic device according to a second embodiment of the present invention, viewed from the z-axis direction, and FIG. 9b is an exemplary view of an inductor pattern of an electronic device according to a second embodiment of the present invention, viewed from the y-axis direction. Similar to the first embodiment, the first pad (211) and the second pad (212) can be formed in the same square shape. Meanwhile, in the present disclosure, the shape of the second pad (211) and the second pad (212) is not limited to a square, but can have various shapes such as a rectangle or a circle. At this time, the coil pattern (230) is formed only of a conductor pattern (232) formed in a single layer, rather than a plurality of layers. Both ends of the conductor pattern (232) are connected to the first terminal (234a) of the coil pattern (230) and the second terminal (234b) of the coil pattern (230) by a connecting conductor (233), respectively.

[0072] FIG. 10 is an exemplary diagram showing the inductance capacity of an inductor pattern of an electronic device according to a second embodiment of the present invention, and FIG. 11 is a graph showing the inductance capacity of an electronic device according to a second embodiment of the present invention in a frequency band of 0.5 GHz to 1.5 GHz.

[0073] As described above, when the inductance of the surface-mount type inductor (300) is 3.1 nH, the inductance of the conductor pattern from the first terminal (234a) to the second terminal (234b) of the substrate (200) containing the inductor pattern becomes 1.7 nH, and the total inductance capacitance between the two terminals (T1, T2) of the electronic device (100) in the frequency band between 1 GHz becomes 1.1 nH. The total inductance of the electronic device (100) is such that the substrate-type inductor pattern (200) and the surface-mount type inductor (300) between the first terminal (T1) and the second terminal (T2) are connected in parallel. Since the inductance of the two parallel-connected inductors is calculated similarly to the parallel resistance calculation method, 1 / L tot = 1 / L 200 + 1 / L 300 Corresponding to the formula, under the premise that there is no mutual induction between the inductance of the substrate-type inductor pattern (200) and the inductance of the surface-mount device-type inductor (300), the total inductance value of the electronic device is the inductance value of the electronic device as the inductance value of the inductance value of the two inductors (200, 300).

[0074] As explained above, the electronic device according to the present invention can reduce thickness by embedding a portion of the inductor capacitance and mounting a low-capacitance inductor, and can change the inductance value through series and parallel connection of two inductors.

[0075] Although the present invention has been described above with reference to preferred embodiments, those skilled in the art will understand that various modifications and changes can be made to the invention without departing from the spirit and scope of the invention as described in the following claims.

[0076] The modes for carrying out the invention have been sufficiently described in the aforementioned "best mode for carrying out the invention."

[0077] The electronic device having a substrate of the embodiment and an inductor mounted on its surface can be used in various electronic devices such as low-noise amplifiers, mixers, and voltage regulator oscillators.

Claims

1. A plurality of insulating layers stacked in a vertical direction; and It includes a plurality of metal layers disposed between the plurality of insulating layers, and At least one of the plurality of metal layers includes an inductor pattern, and The above inductor pattern is, A first pad and a second pad spaced apart along a first horizontal direction perpendicular to the above vertical direction and in contact with an external mounting inductor; and A substrate comprising a coil pattern disposed below the first pad and the second pad and extending along the first horizontal direction.

2. In claim 1, the coil pattern is a substrate having a coil structure having multiple turns, wherein a plurality of conductor patterns consisting of a pair of layers are each dispersed and formed.

3. In paragraph 2, the central axis of the plurality of turns formed by the coil pattern is a substrate parallel to the first horizontal direction.

4. In paragraph 2, the central axis of the plurality of turns formed by the coil pattern is parallel to the central axis of the internal coil of the external mounted inductor.

5. A substrate according to paragraph 2, wherein the plurality of conductor patterns are formed linearly, spaced apart from each other at regular intervals, and arranged on each layer, and connected to each other by connecting conductors penetrating the insulating layer.

6. A substrate according to claim 1, wherein the distance between the first pad and the second pad has a value smaller than the width of the first pad and the second pad.

7. In claim 1, the coil pattern comprises a plurality of layers in which a pair of multiple conductor patterns are dispersed in each layer to form a plurality of layers, and the conductive patterns of different layers are electrically connected to a substrate.

8. A substrate having an inductor pattern having inductance between a plurality of insulating layers stacked in a vertical direction; An electronic device comprising at least one surface-mount type inductor that is electrically connected to the inductor pattern and mounted on the substrate.

9. In paragraph 8, the above inductor pattern is, A first pad and a second pad disposed spaced apart along a first horizontal direction on the surface on which the surface mount type inductor is mounted and in contact with the surface mount type inductor; and An electronic device comprising a coil pattern that is positioned below the first pad and the second pad and extends along the first horizontal direction.

10. In claim 9, the electronic device is formed as a coil structure having multiple turns, wherein the coil pattern is formed by dispersing a plurality of conductor patterns consisting of a pair of layers.

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