Circuit board and semiconductor package

Abstract

This circuit board comprises: a core layer; a first build-up structure disposed on the upper surface of the core layer; and a second build-up structure disposed on the lower surface of the core layer, wherein the core layer comprises a glass part and a resin part surrounding the side surfaces of the glass part, and the resin part has a horizontal width of 1 mm or more.

Description

Circuit boards and semiconductor packages

[0001] The present embodiment relates to a circuit board and a semiconductor package.

[0002]

[0003] Recently, technologies related to electronic products such as AI and servers have been progressing toward multi-functionality and high speed. To respond to this trend, high-layer and large-area circuit board technologies are also developing rapidly to keep pace with the fast-advancing semiconductor chip manufacturing technology.

[0004] In particular, as the density of transistors and wiring within semiconductor chips increases, the number of I / O terminals on the chips is growing. To meet this trend, not only are the wiring densities, lengths, and widths of circuit boards becoming finer, but there is also a trend toward high-layer, large-area designs.

[0005] Furthermore, from the perspective of miniaturizing finished electronic products, the thickness of the applied circuit boards is also decreasing, and technologies related to multilayer circuit boards, which configure more circuit layers within a circuit board of the same thickness, are being actively researched. In addition, as the pitch of semiconductor chips narrows and the size of chips increases, chiplet technology for separating semiconductor chips by function is being researched. Moreover, technologies for connecting separated chiplets on circuit boards are being actively researched. Furthermore, by connecting semiconductor chips with different functions on circuit boards, technologies regarding the connection relationship between circuit boards and semiconductor chips are being actively researched, such as the circuit board connecting semiconductor chips to each other, which was previously considered only from the perspective of conventional semiconductor packaging.

[0006] A circuit board is a device in which circuit line patterns are arranged using a conductive material, such as copper, on an electrically insulating substrate; it is a general term for the package board immediately before mounting electronic components. To densely mount many different types of electronic components on a flat surface, the mounting positions of each component are determined, and circuit patterns connecting the components are printed and fixed onto the surface.

[0007] A circuit board comprises a core layer and a build-up structure disposed on the surface of the core layer. The core layer and the build-up structure each comprise one or more insulating layers, and a wiring layer and a via electrode connecting different wiring layers in a vertical direction are disposed on each insulating layer. The via electrode is disposed within a via hole penetrating the insulating layer.

[0008] Ceramics or resins are used as materials for the insulating layer. However, in the case of ceramic substrates such as silicon substrates, high resistance or high dielectric constant makes it difficult to mount high-performance, high-frequency semiconductor devices. In the case of resin substrates, while it is possible to mount relatively high-performance, high-frequency semiconductor devices, there are limitations in reducing the wiring pitch.

[0009] Recently, glass substrates have been proposed. Glass substrates offer the advantage of high wiring density due to their ease of processability. However, glass substrates have a problem with poor durability caused by the seware phenomenon, in which defects occur perpendicular to the thickness direction at corners or sides.

[0010]

[0011] The present invention provides a circuit board and a semiconductor package with improved durability and reliability by preventing the occurrence of seware.

[0012]

[0013] A circuit board according to the present embodiment comprises a core layer; a first build-up structure disposed on the upper surface of the core layer; and a second build-up structure disposed on the lower surface of the core layer, wherein the core layer comprises a glass portion and a resin portion covering the side of the glass portion, and the horizontal width of the resin portion is 1 mm or more.

[0014] The material of the above resin part may be a thermosetting resin.

[0015] The first build-up structure and the second build-up structure each include an insulating layer, the resin part and the insulating layer are of the same material, and the resin part may be ABF (Ajinomoto Build-up Film).

[0016] It includes a core via electrode penetrating the glass portion, and the core via electrode may overlap at least a portion of the resin portion in a horizontal direction.

[0017] It includes a wiring portion disposed on the core layer, wherein at least a portion of the wiring portion may overlap with the resin layer in a vertical direction.

[0018] The above wiring portion may overlap the horizontal boundary of the glass portion and the resin portion in the vertical direction.

[0019] The vertical thickness of the resin portion may be smaller than the vertical thickness of the glass portion.

[0020] It is disposed on the upper surface of the above resin portion and may include a concave portion with a concave shape.

[0021] It may include an adhesive portion disposed between the resin portion and the glass portion.

[0022] A semiconductor package according to the present embodiment comprises: a core layer; a first build-up structure disposed on the upper surface of the core layer; a second build-up structure disposed on the lower surface of the core layer; and a semiconductor chip disposed on the surface of the first build-up structure or the second build-up structure, wherein the core layer comprises a glass portion and a resin portion surrounding the side of the glass portion, and the horizontal width of the resin portion is 1 mm or more.

[0023]

[0024] Through this embodiment, the occurrence of cracks on the surface of the glass part through the resin part is prevented, which has the advantage of reducing substrate defects such as cracks and improving the durability of the circuit board.

[0025]

[0026] FIG. 1 is a cross-sectional view of a circuit board according to an embodiment of the present invention.

[0027] FIGS. 2 and FIGS. 3 are drawings for explaining the manufacturing process of a core layer according to an embodiment of the present invention.

[0028] FIG. 4 is a drawing illustrating the arrangement structure of wiring portions on a core layer according to an embodiment of the present invention.

[0029] FIG. 5 is a drawing for explaining the combined structure of a glass part and a resin part according to an embodiment of the present invention.

[0030] FIGS. 6 and 7 are drawings for explaining the stress change in the glass portion according to various horizontal widths of the resin portion.

[0031] FIG. 8 is a drawing illustrating a modified example of a resin part forming structure according to an embodiment of the present invention.

[0032] FIG. 9 is a drawing illustrating another modified example of a resin part forming structure according to an embodiment of the present invention.

[0033] FIG. 10 is a drawing showing the stress distribution on the side of the glass portion according to a comparative example.

[0034] FIG. 11 is a drawing illustrating a semiconductor package according to an embodiment of the present invention.

[0035]

[0036] The present invention is susceptible to various modifications and may have various embodiments, and specific embodiments are illustrated and described in the drawings. However, this does not specify the present invention.

[0037] It should be understood that the embodiments are not intended to be limited and include all modifications, equivalents, and substitutions that fall within the spirit and scope of the invention.

[0038] However, the technical concept of the present invention is not limited to some of the described embodiments but can be implemented in various different forms, and within the scope of the technical concept of the present invention, one or more of the components among the embodiments may be selectively combined or substituted.

[0039] In addition, terms used in the embodiments of the present invention (including technical and scientific terms) should be interpreted in a meaning generally understood by those skilled in the art to which the present invention pertains, unless explicitly and specifically defined otherwise. Commonly used terms, such as those defined in a dictionary, should be interpreted in consideration of their contextual meaning as described in the present invention. If a commonly used term defined in a dictionary does not match the meaning it has in the context of the description of the present invention, it should be interpreted in accordance with the meaning it has in the context of the description of the present invention. Furthermore, even if not explicitly defined in this application, it should not be interpreted in an ideal or overly formal sense based on the description of the present invention.

[0040] Furthermore, the terms used in the embodiments of the present invention are for describing the embodiments and are not intended to limit the present invention. In this specification, the singular form may include the plural form unless specifically stated otherwise in the text.

[0041] Terms containing ordinal numbers, such as "first," "second," etc., may be used to describe various components, but the meaning of the components is not limited by the ordinal numbers. Terms containing ordinal numbers are used solely for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the second component may be named the first component, and similarly, the first component may be named the second component. Furthermore, if the meaning of the component does not depart from the scope of the present invention even without ordinal numbers such as "first" and "second," the component may be referred to by excluding the ordinal number.

[0042] The term "and / or" includes a combination of multiple related listed items or any of the multiple related listed items. Such a term is used merely to distinguish a component from other components and is not limited by the nature, order, sequence, etc. of the component.

[0043] In this application, terms such as “comprising,” “provided,” and “having” are intended to specify the existence of the features, numbers, steps, actions, components, parts, or combinations thereof described in the specification, and should be understood as not excluding in advance the existence or addition of one or more other features, numbers, steps, actions, components, parts, or combinations thereof.

[0044] When referring to directions, vertical and horizontal directions are used for convenience of explanation. Additionally, the horizontal direction may include a first horizontal direction perpendicular to the vertical direction, and a second horizontal direction perpendicular to the first horizontal direction and the vertical direction. Furthermore, if the vertical and horizontal directions follow a Cartesian coordinate system, they may correspond to the first horizontal direction (X-axis), the second horizontal direction (Y-axis), and the vertical direction (Z-axis), respectively; if they follow a cylindrical coordinate system, the first horizontal direction may refer to the azimuth (Φ) direction (or circumferential direction), and the second horizontal direction may refer to the radius (ρ) direction (or centrifugal direction) separated from a specific configuration; and if they follow a spherical coordinate system, the first horizontal direction may refer to the azimuth (Φ) direction (or circumferential direction), and the second horizontal direction may refer to the radius (r) direction (or centrifugal direction) separated from a specific configuration. In particular, the vertical direction may refer to the polar angle (θ) direction formed by the second horizontal direction and the Z-axis. For convenience of explanation, the first horizontal direction, the second horizontal direction, and the vertical direction may be used by combining the Cartesian coordinate system, the cylindrical coordinate system, and the spherical coordinate system described above. However, unless otherwise specified, the vertical direction refers to the Z-axis according to the Cartesian coordinate system, and the horizontal direction refers to any direction that can be defined on the XY plane; when referring to the first horizontal direction and the second horizontal direction perpendicular to the first horizontal direction, the first horizontal direction refers to the X-axis and the second horizontal direction refers to the Y-axis.

[0045] Furthermore, when described as being formed or placed "above or below" each component, "above" or "below" includes not only cases where two components are in direct contact with each other, but also cases where one or more other components are formed or placed between the two components. Additionally, when expressed as "above or below," it may include the meaning of a downward direction as well as an upward direction relative to a single component.

[0046] Furthermore, the meaning that Configuration A is positioned between Configuration B and Configuration C may include the meaning that Configuration A is positioned such that at least a portion of it overlaps with Configurations B and C in the horizontal and / or vertical directions. Unless otherwise noted, even if Configuration C is located between a virtual line extending vertically and / or horizontally from Configuration A and a virtual line extending vertically and / or horizontally from Configuration B, the meaning may include that Configuration C is positioned between Configuration A and Configuration B.

[0047] Furthermore, the statement that Configuration A is exposed from Configuration B should be understood as meaning that Configuration A is exposed from Configuration B, not that Configuration A is exposed from the entire product; and unless there are special circumstances, it should not be understood as meaning that the entirety of Configuration A is covered by Configuration B. In other words, when Configuration A is stated to be exposed from Configuration B, it should be understood to mean that Configuration C, in addition to Configurations A and B, covers Configuration A exposed from Configuration B.

[0048] Additionally, where it is stated that a component is 'connected,' 'combined,' 'connected,' or 'contacted' with another component, this may include not only cases where the component is directly connected, combined, or connected to the other component, but also cases where it is 'connected,' 'combined,' or 'connected' due to another component located between the component and the other component. Accordingly, if component A is to be understood only as being directly 'connected,' 'combined,' 'connected,' or 'contacted' with component B, it is described as being 'directly connected,' 'directly combined,' 'directly connected,' or 'directly contacted.'

[0049] In addition, when it is stated that configuration A is 'fixed' to configuration B, it should be understood that configuration A is indirectly fixed to configuration B through configuration C and / or configuration D, etc., unless otherwise specifically mentioned, considering the function and purpose to be solved, and in cases where configuration A is to be understood only as being 'directly fixed' to configuration B, it is stated as being 'directly fixed'.

[0050] In addition, when described as “flat” or “located on the same plane,” it should not be interpreted according to the dictionary definition, but rather understood by a person with ordinary knowledge in the relevant technical field to the extent that process deviations are taken into account.

[0051] FIG. 1 is a cross-sectional view of a circuit board according to an embodiment of the present invention, FIG. 2 and FIG. 3 are drawings for explaining the manufacturing process of a core layer according to an embodiment of the present invention, FIG. 4 is a drawing showing the arrangement structure of a wiring portion on a core layer according to an embodiment of the present invention, FIG. 5 is a drawing for explaining the bonding structure of a glass portion and a resin portion according to an embodiment of the present invention, and FIG. 6 and FIG. 7 are drawings for explaining the stress change of the glass portion according to various horizontal widths of the resin portion.

[0052] Referring to FIGS. 1 to 7, a circuit board (10) according to an embodiment of the present invention may include a core layer (100), a first build-up structure (200), a second build-up structure (300), and a protective layer (410, 430).

[0053] The circuit board (10) may include a core layer (100). The core layer (100) may be a component forming the basis of the circuit board (10). Based on the vertical direction, the core layer (100) may be positioned in the center of the circuit board (10). The specific structure of the core layer (100) will be described later.

[0054] The first build-up structure (200) may be disposed on one side of the core layer (100). The first build-up structure (200) may be disposed on the upper surface of the core layer (100). The second build-up structure (300) may be disposed on the other side of the core layer (100). The second build-up structure (300) may be disposed on the lower surface of the core layer (100). The first build-up structure (100) and the second build-up structure (300) may be disposed facing each other in a vertical direction with respect to the core layer (100). The first build-up structure (200) and the second build-up structure (300) may each include a plurality of insulating layers disposed in a vertical direction. The number of insulating layers of the first build-up structure (200) and the number of insulating layers of the second build-up structure (300) may be the same. Accordingly, the occurrence of bending of the circuit board (10) based on the core layer (100) can be minimized. However, this is not limited to the number of insulating layers in the first build-up structure (200) and the number of insulating layers in the second build-up structure (300) may differ from each other.

[0055] The first build-up structure (200) may include a plurality of first insulating layers (210) arranged in a vertical direction, a plurality of wiring portions (220) each arranged in a plurality of first insulating layers (210), and a plurality of via portions (230) arranged to penetrate at least a portion of each of the plurality of first insulating layers (210) and electrically connecting the plurality of wiring portions (220) arranged in a vertical direction.

[0056] The second build-up structure (300) may include a plurality of second insulating layers (310) arranged in a vertical direction, a plurality of wiring portions (320) each arranged in the plurality of second insulating layers (310), and a plurality of via portions (330) arranged to penetrate at least a portion of each of the plurality of second insulating layers (310) and electrically connecting the plurality of wiring portions (320) arranged in a vertical direction.

[0057] The number of insulating layers constituting the first build-up structure (200) and the number of insulating layers constituting the second build-up structure (300) shown in FIG. 1 are exemplary, and the circuit board (10) may have a greater number of insulating layers stacked vertically to form the first build-up structure (200) and the second build-up structure (300), respectively.

[0058] Additionally, the number of insulating layers in the first build-up structure (200) and the number of insulating layers in the second build-up structure (300) may be the same. Accordingly, the occurrence of bending of the circuit board (10) based on the core layer (100) can be minimized. However, this is not limited to this, and the number of insulating layers in the first build-up structure (200) and the number of insulating layers in the second build-up structure (300) may be different from each other.

[0059] The insulating layer of the first build-up structure (200) and the insulating layer of the second build-up structure (300) may each be any insulating material, such as a photocurable and / or thermosetting material. As a thermosetting insulating material, an insulating material in which inorganic and / or organic fillers are dispersed within a resin, such as ABF (Ajinomoto Build-up Film), a product released by Ajinomoto Corporation, may be used, and a prepreg (PPG) containing glass fibers within a resin may be used. Additionally, the resin described above may be, for example, an epoxy resin, a bismaleimide triazine resin (BT resin), a phenolic resin, etc., and the inorganic and / or organic fillers may be provided with materials such as silica or plastic. At least one insulating layer among the insulating layer of the first build-up structure (200) and the insulating layer of the second build-up structure (300) may be a photocurable insulating layer, and if it is a photocurable insulating layer, at least one insulating layer among the insulating layer of the first build-up structure (200) and the insulating layer of the second build-up structure (300) may be a PID (Photo Imageable Dielectric).

[0060] The circuit board (10) may include a protective layer (410, 430). The protective layer (410, 430) may include a first protective layer (410) disposed on the surface of a first build-up structure (200) and a second protective layer (420) disposed on the surface of a second build-up structure (300). When a semiconductor device is disposed on the surface of the circuit board (10) using a material such as solder, the first protective layer (410) and the second protective layer (420) can perform the function of preventing short circuits between solders due to low wettability with the solder, and can prevent the problem of external contaminants penetrating into the build-up structure and reducing reliability. The first protective layer (410) and the second protective layer (420) may each utilize a photocurable insulating material. Accordingly, the first protective layer (410) and the second protective layer (420) are provided with a solder resist other than the aforementioned ABF, PPG, BT resin, and PID. However, they are not limited thereto and may be provided with various materials capable of performing low wettability with solder and thus preventing short circuits between solders as described above.

[0061] The first protective layer (410) may include a hole for exposing upward a wiring portion (220) disposed on the surface of the first build-up structure (200). The second protective layer (420) may include a hole for exposing downward a wiring portion (320) disposed on the surface of the second build-up structure (300) to the circuit board (10).

[0062] Below, the structure of the core layer (100) will be described.

[0063] The core layer (100) may be disposed between the first build-up structure (200) and the second build-up structure (300). The vertical thickness of the core layer (100) may be thicker than the vertical thickness of each insulating layer constituting the first build-up structure (200) and / or the second build-up structure (300).

[0064] The core layer (100) may include a glass portion (110) and a resin portion (150).

[0065] The core layer (100) may include a glass portion (110). The glass portion (110) may form the body of the core layer (100). The glass portion (110) may be a support for the core layer (100). The material of the glass portion (110) may be glass. The glass portion (110) may be a glass substrate. Accordingly, according to the embodiment, by forming a part of the core layer (100) as a glass substrate, processing is easy due to material characteristics, and a fine pattern can be realized within the core layer (100). In addition, due to a high Young modulus, the warpage characteristics of the circuit board (10) may be initiated. Furthermore, due to low surface roughness, electrical signal loss within the circuit portion (180) may be minimized as the bonding with the circuit portion (180) described later increases.

[0066] For example, a circuit portion (180) for electrical signal transmission may be disposed in the core layer (100). The circuit portion (180) may include a first wiring portion (181) disposed on one side of the core layer (100), a second wiring portion (182) disposed on the other side of the core layer (100), and a core via electrode (190) that connects the first wiring portion (181) and the second wiring portion (181) and penetrates at least a portion of the core layer (100). Among these, for the formation of the core via electrode (190), after forming via holes on the surface of the glass portion (110) by means such as a laser, chemical etching, laser etching, etc., may be applied, so the process of forming the circuit portion (180) including the core via electrode (190) can be performed more simply.

[0067] The core layer (100) may include a resin portion (150). The resin portion (150) may be placed on the outside of the glass portion (110). When the placement area of ​​the first wiring portion (181) is referred to as the upper surface of the glass portion (110) and the placement area of ​​the second wiring portion (181) is referred to as the lower surface of the glass portion (110), the resin portion (150) may be placed to surround the side connecting the upper surface and the lower surface of the glass portion (110). An opening, which is the placement area of ​​the glass portion (110), may be formed inside the resin portion (150). The glass portion (110) is placed in the opening within the resin portion (150), and its side may be surrounded by the resin portion (150). The resin portion (150) may be placed so that at least a portion overlaps with the core via electrode (190) in the horizontal direction.

[0068] The material of the resin portion (150) may be different from the material of the glass portion (110). The material of the resin portion (150) may be resin. The material of the resin portion (150) may be a photocurable or thermosetting resin. The material of the resin portion (150) may be the same as the material of the insulating layer constituting the first build-up structure (200) or the second build-up structure (300). For example, the resin portion (150) may be ABF (Ajinomoto Build-up Film). Accordingly, the bonding of the core layer (100) with the build-up structure through the resin portion (150) may be improved.

[0069] Referring to FIGS. 2 and 3, the core layer (100) can be manufactured through the processing of a panel (500). The panel (500) may be made of a resin material. At least a portion of the panel (500) may form a resin portion (150). The panel (500) may include openings for embedding a glass portion (110). Multiple openings may be provided within the panel (500) and spaced apart from each other. The glass portion (110) may be embedded in the openings within the panel (500). In this case, a cutting line (510) is formed on the outside of the opening, and the cutting line (510) may be spaced a predetermined distance horizontally from the glass portion (110). That is, the resin portion (120) may be an area positioned between the cutting line (510) and the side of the glass portion (110). By forming the core layer (100) by the above process, the stress applied to the glass portion (110) during the manufacturing process of the core layer (100) can be minimized.

[0070] Figure 10 is a diagram illustrating the stress distribution on the side of the glass portion according to a comparative example.

[0071] Referring to FIG. 10, in the case of a glass substrate in which the core layer is made of glass, stress may be applied in a horizontal direction from the side of the core layer during the stacking process of the build-up structure. Consequently, a SEWARE phenomenon occurs in which defects develop inwardly from the side of the core layer. SEWARE proceeds during the manufacturing process and causes defects such as cracks and chipping.

[0072] According to the embodiment, through the resin portion (150) arranged horizontally on the side of the glass portion (110), it is possible to prevent seware from occurring from the side of the glass portion (110). The resin layer (150) functions as a protective layer to prevent the occurrence and development of seware on the side of the glass portion (110). In addition, as described above, during the separation process of the glass portion (110) within the panel (500), the glass portion (110) is separated with its side wrapped by the resin portion (150), so the occurrence of seware on the side of the glass portion (110) can be prevented from the manufacturing stage of the core layer (100).

[0073] Referring to FIGS. 1 and 4, as described above, wiring portions (181, 182) may be disposed on the surface of the core layer (100). Based on the first wiring portion (181) disposed on the core layer (100), the first wiring portion (181) may be disposed on the glass portion (110) or the resin portion (150). For example, the first wiring portion (181) may include a first-1 wiring portion (183) disposed on the glass portion (110) and a first-2 wiring portion (184) disposed on the resin portion (150). Accordingly, by forming a distribution area for wiring portions for signal transmission on the resin portion (150) in addition to the glass portion (110), the wiring density within the core layer (100) may be increased.

[0074] The first wiring section (181) may include a first-third wiring section (185) that is vertically superimposed on the boundary (170) between the glass section (110) and the resin section (150). The first-third wiring section (185) may be arranged such that at least a portion of it is vertically superimposed on the glass section (110), and at least another portion is vertically superimposed on the resin section (150). Accordingly, since the wiring section is not selectively placed on either the surface of the glass section (110) or the resin section (150), but is also placed on the boundary (170), the placement area of ​​the wiring section within the core layer (100) can be further increased.

[0075] Referring to FIGS. 1 and 5, the glass portion (110) and the resin portion (150) can be joined together through an adhesive portion (175). The adhesive portion (175) may be an adhesive, epoxy, or a heat or photocurable material, and can join the side of the glass portion (110) and the side of the resin portion (150) in a horizontal direction. The adhesive portion (175) may be placed at the boundary portion (170).

[0076] The upper or lower surface of the adhesive portion (175) may overlap horizontally with the upper or lower surface of the glass portion (110) and the upper or lower surface of the resin portion (150), respectively. The upper or lower surface of the adhesive portion (175) may be flat so as to form a plane with the upper or lower surface of the glass portion (110) and the upper or lower surface of the resin portion (150).

[0077] However, this is not limited thereto, and as illustrated in FIG. 5, a protrusion (176) with a shape protruding in a vertical direction or a concave part (177) with a shape concave in a vertical direction may be disposed on the upper or lower surface of the adhesive part (175). When a protrusion (176) is formed on the surface of the adhesive part (175), the surface of the protrusion (176) may protrude in a vertical direction more than the surface of the glass part (110) or the resin part (150). When a concave part (177) is formed on the surface of the adhesive part (175), the surface of the concave part (177) may be disposed to overlap horizontally with the glass part (110) and / or the resin part (150). Accordingly, the core layer (100) can visually separate the glass portion (110) and the resin portion (150) by forming a boundary area between the glass portion (110) and the resin portion (150) through a protrusion (176) or a concave portion (177).

[0078] As described above, the resin portion (150) may have a predetermined width in the horizontal direction. The horizontal width (W) of the resin portion (150) may be 1 mm or more.

[0079] The resin portion (150) may include an inner surface facing the side of the glass portion (110) in a horizontal direction and an outer surface superimposed on the inner surface in a horizontal direction. Here, the horizontal width (W) of the resin portion (150) may be the width of the area connecting the inner surface of the resin portion (150) and the outer surface of the resin portion (150) by the shortest horizontal distance. That is, the horizontal width (W) of the resin portion (150) may be the horizontal width (W) of the area of ​​the resin portion (150) positioned on the outside of the glass portion (110) with respect to the glass portion (110).

[0080] Referring to FIG. 6, FIG. 6(a) shows a glass portion (110) with the resin portion (150) omitted. FIG. 6(b) shows a core layer (100) with a resin portion (150) having a horizontal width (W) of 1 mm disposed on the side of the glass portion (110). FIG. 6(c) shows a core layer (100) with a resin portion (150) having a horizontal width (W) of 3 mm disposed on the side of the glass portion (110). FIG. 6(d) shows a core layer (100) with a resin portion (150) having a horizontal width (W) of 5 mm disposed on the side of the glass portion (110). FIG. 6(e) shows a core layer (100) with a resin portion (150) having a horizontal width (W) of 10 mm disposed on the side of the glass portion (110). Figure 6 (f) illustrates a core layer (100) in which a resin portion (150) with a horizontal width (W) of 20 mm is disposed on the side of a glass portion (110).

[0081] FIG. 7 illustrates a comparison of the stress intensity of the glass portion (110) within the core layer (100) according to the presence or absence of the resin portion (150) shown in FIG. 6 or the horizontal width (W) of the resin portion (150). Referring to FIG. 7 (a), when the resin portion (150) within the core layer (100) is omitted, the glass portion (110) has high values ​​for both the stress at the center and the maximum internal stress, so it can be expected that the occurrence of the SEWARE phenomenon due to the aforementioned glass material will be high.

[0082] Referring to FIGS. 7(b) to (f), it can be seen that as the horizontal width (W) of the resin portion (150) within the core layer (100) increases, the central stress and internal maximum stress of the glass portion (110) gradually decrease. In particular, as shown in FIGS. 7(b) and (c), when the horizontal width (w) of the resin portion (150) within the core layer (100) is in the range of 1 mm or more, both the central stress and internal maximum stress of the glass portion (110) decrease rapidly. Accordingly, it is advantageous to form the horizontal width (w) of the glass portion (110) to be 1 mm or more, but considering the advantages of the circuit board (10) through the material characteristics of the glass portion (110), it is not necessary for the horizontal width (w) of the resin portion (150) to be extended to a range greater than the horizontal width of the glass portion (110). Therefore, the horizontal width of the resin portion (150) may be smaller than the horizontal width of the glass portion (110).

[0083] FIG. 8 is a drawing illustrating a modified example of a resin part forming structure according to an embodiment of the present invention.

[0084] Referring to FIG. 8, a concave portion (152) may be disposed on the upper surface of the resin portion (150). The concave portion (152) may have a shape that is concave in a vertical direction from the upper surface of the resin portion (150). The concave portion (152) may have a curved shape having a predetermined curvature. Due to the concave portion (152), the vertical thickness of the glass portion (110) may be different from the vertical thickness of the resin portion (150). For example, the vertical thickness of the resin portion (150) may be smaller than the vertical thickness of the glass portion (110).

[0085] The concave portion (152) may be formed during the curing process of the resin portion (150) for the formation of the resin portion (150), and by the concave portion (152), the core layer (100) may include a plurality of regions with different vertical thicknesses. The plurality of regions may be arranged along the horizontal direction.

[0086] FIG. 9 is a drawing illustrating another modified example of a resin part forming structure according to an embodiment of the present invention.

[0087] Referring to FIG. 9, the resin portion (150) may be connected to the insulating layer of the first build-up structure (200) and the insulating layer of the second build-up structure (300). For example, the first build-up structure (200) may include a first insulating layer (211) disposed on the core layer (100) and a second insulating layer (212) disposed on the first insulating layer (211). The second build-up structure (300) may include a third insulating layer (311) disposed on the lower surface of the core layer (100) and a fourth insulating layer (312) disposed on the lower surface of the third insulating layer (311).

[0088] The resin portion (150) may be connected to the first insulating layer (211) and / or the third insulating layer (311). The resin portion (150) may be vertically superimposed with the first insulating layer (211) and the third insulating layer (311). The resin portion (150) may be formed on the surface of the glass portion (110) during the lamination process of the first or third insulating layer (211, 311). The resin portion (150) may be the same material as the first or third insulating layer (211, 311).

[0089] A concave portion (215) concave in the direction toward the resin portion (150) may be disposed on the upper surface of the first insulating layer (211) which is vertically superimposed with the resin portion (150). A concave portion (315) concave in the direction toward the resin portion (150) may be disposed on the lower surface of the third insulating layer (311) which is vertically superimposed with the resin portion (150). The concave portions (215, 315) are shaped such that a portion of the first insulating layer (211) and the third insulating layer (311) forms the resin portion (150) relative to the area vertically superimposed with the glass portion (110).

[0090] On the lower surface of the second insulating layer (212), a protrusion (215) that is coupled to the concave portion (215) of the first insulating layer (211) may be disposed. At least a portion of the protrusion (215) of the second insulating layer (212) may be disposed so as to overlap horizontally with the first insulating layer (211). On the upper surface of the fourth insulating layer (312), a protrusion (316) that is coupled to the concave portion (315) of the third insulating layer (311) may be disposed. At least a portion of the protrusion of the fourth insulating layer (312) may be disposed so as to overlap horizontally with the third insulating layer (311). Accordingly, each of the plurality of insulating layers arranged in the vertical direction may include regions with different vertical thicknesses, and the coupling strength may be improved by the coupling structure through the protrusions and concave portions between the different insulating layers, and the warpage characteristics of the circuit board (10) may be improved.

[0091] FIG. 11 is a drawing illustrating a semiconductor package according to an embodiment of the present invention.

[0092] Referring to FIG. 11, a semiconductor package according to an embodiment of the present invention may include a first semiconductor chip (1000) disposed on a circuit board (10) and a second semiconductor chip (2000), wherein the first semiconductor chip (1000) is bonded to a first build-up structure (200) through a first bonding part (1100), and the second semiconductor chip (2000) is bonded to a second build-up structure (300) through a second bonding part (2100). Here, the first bonding part (1100) and the second bonding part (2100) may each be solder balls.

[0093] In the foregoing, although all components constituting an embodiment of the present invention have been described as being combined or operating in combination, the present invention is not necessarily limited to such embodiments. That is, within the scope of the purpose of the present invention, all components may be selectively combined in one or more ways. Furthermore, terms such as "include," "constitute," or "have" described above, unless specifically stated otherwise, mean that the relevant component may be inherent; thus, they should be interpreted as allowing for the inclusion of additional components rather than excluding other components. All terms, including technical or scientific terms, have the same meaning as generally understood by those skilled in the art to which the present invention pertains, unless otherwise defined. Terms commonly used, such as those defined in advance, should be interpreted in accordance with their meaning in the context of the relevant technology and should not be interpreted in an ideal or overly formal sense unless explicitly defined in the present invention.

[0094] The foregoing description is merely an illustrative explanation of the technical concept of the present invention, and those skilled in the art to which the present invention pertains will be able to make various modifications and variations within the scope of the essential characteristics of the present invention. Accordingly, the embodiments disclosed in the present invention are intended to explain, not limit, the technical concept of the present invention, and the scope of the technical concept of the present invention is not limited by such embodiments. The scope of protection of the present invention shall be interpreted by the claims below, and all technical concepts within an equivalent scope shall be interpreted as being included within the scope of rights of the present invention.

[0095] Meanwhile, when a circuit board having the features of the invention described above is used in IT devices or home appliances such as smartphones, server computers, and TVs, it can stably perform functions such as signal transmission or power supply. For example, when a circuit board having the features of the invention performs a semiconductor package function, it can safely protect the semiconductor chip from external moisture or contaminants, and can resolve issues such as leakage current, electrical short circuits between terminals, or electrical open circuits of terminals supplying power to the semiconductor chip. In addition, when it is responsible for signal transmission, it can resolve noise issues. Through this, the circuit board having the features of the invention described above enables the stable operation of IT devices or home appliances, thereby allowing the entire product and the circuit board to which the invention is applied to achieve functional integration or technical interoperability.

[0096] When a circuit board having the features of the invention described above is used in a transportation device such as a vehicle, it can resolve the problem of signal distortion transmitted to the transportation device, or safely protect a semiconductor chip controlling the transportation device from the outside, and further improve the stability of the transportation device by resolving problems such as leakage current, electrical short circuits between terminals, or electrical open circuits of terminals supplying power to the semiconductor chip. Accordingly, the transportation device and the circuit board to which the present invention is applied can achieve functional integration or technical interoperability with each other.

Claims

1. Core layer; A first build-up structure disposed on the upper surface of the core layer; and It includes a second build-up structure disposed on the lower surface of the core layer, and The core layer comprises a glass portion and a resin portion surrounding the side of the glass portion, and A circuit board having a horizontal width of 1 mm or more for the resin portion.

2. In Paragraph 1, The above-mentioned resin part is a circuit board made of a thermosetting resin.

3. In Paragraph 1, The first build-up structure and the second build-up structure each include an insulating layer, The resin part and the insulating layer are of the same material, and The above resin part is a circuit board in which ABF (Ajinomoto Build-up Film).

4. In Paragraph 1, It includes a core via electrode penetrating the above glass portion, and The above-described core via electrode is a circuit board in which at least a portion of the resin portion is overlapped in a horizontal direction.

5. In Paragraph 1, It includes a wiring portion disposed on the core layer, and The above wiring portion is a circuit board in which at least a portion is overlapped in a direction perpendicular to the resin layer.

6. In Paragraph 5, The above wiring portion is a circuit board that overlaps vertically with the horizontal boundary of the glass portion and the resin portion.

7. In Paragraph 1, A circuit board in which the vertical thickness of the resin portion is smaller than the vertical thickness of the glass portion.

8. In Paragraph 7, A circuit board disposed on the upper surface of the above resin portion and including a concave portion having a concave shape.

9. In Paragraph 1, A circuit board comprising an adhesive portion disposed between the resin portion and the glass portion.

10. Core layer; A first build-up structure disposed on the upper surface of the above-mentioned core layer; A second build-up structure disposed on the lower surface of the above-mentioned core layer; and A semiconductor chip disposed on the surface of the first build-up structure or the second build-up structure, and The core layer comprises a glass portion and a resin portion surrounding the side of the glass portion, and A semiconductor package in which the horizontal width of the above resin portion is 1 mm or more.

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