Integrated chip-scale electrophysiology and electrochemistry detection and amplifying apparatus, system, and method for use thereof

Abstract

The invention generally relates to Integrated chip-scale electrophysiology and electrochemistry detection and amplifying apparatus, system, and method for use thereof. In certain aspects, the invention provide systems for electrochemical (EChem) and electrophysiological (EPhys) recording that include a probe; and a processor operable associated with the probe to receive data from the probe, wherein the processor comprises circuitry that is configured to perform simultaneous electrophysiological and electrochemical recordings.

Description

[0001] Attorney Docket No.: PURD- 152 / 01 WO 28593 / 748

[0002] PATENT APPLICATION INTEGRATED CHIP-SCALE ELECTROPHYSIOLOGY AND ELECTROCHEMISTRY DETECTION AND AMPLIFYING APPARATUS, SYSTEM, AND METHOD FOR USE THEREOF

[0003] Related Application

[0004] The present application claims the benefit of and priority to U.S. provisional patent application serial number 63 / 749,863, filed January 27, 2025, the content of which is incorporated by reference herein in its entirety.

[0005] Government Support

[0006] This invention was made with government support under EB029740 and MH136494 awarded by the National Institutes of Health and under FA9550-22-1-0078 and FA9550-23-1-0701 awarded by the Air Force Office of Scientific Research. The government has certain rights in the invention.

[0007] Field of the Invention

[0008] The invention generally relates to Integrated chip-scale electrophysiology and electrochemistry detection and amplifying apparatus, system, and method for use thereof.

[0009] Background

[0010] The brain is a complex network of interconnected neurons that communicate with each other using electrical action potentials and chemical neuromdulators and neurotransmitters. The interplay and flow of these electrical and chemical signals within the interconnected network, is the basis of all the complex computations performed by the brain. Thus, for a complete understanding of the brain computations, neuroscientists must simultaneously map both electrical and the chemical signals. Currently, multiple techniques exist to map electrical and chemical activity separately. However, simultaneous high-fidelity mapping of both signal types is challenging owing to the bulky and rigid nature of the recording devices. While significant progress has been made in mapping of electrical activity across the brain, chemical recording systems lag behind due to lack of measurement devices capable of recording both slow and fast evolving chemical signals. Existing recording devices for chemical signals are often bulky andAttorney Docket No.: PURD- 152 / 01 WO 28593 / 748

[0011] PATENT APPLICATION

[0012] limited to recording from a single site, making them unsuitable for measuring activity across different brain regions and subregions. This limitation hinders our ability to comprehensively study the brain's complex signaling mechanisms.

[0013] Summary

[0014] The integration of CMOS electrophysiology amplifiers with electrochemical potentiostat arrays represents a significant leap forward in brain activity mapping, merging the precision of electrical signal amplification with the nuanced sensitivity of electrochemical measurements. This hybrid approach not only allows for the high-resolution recording of action potentials and local field potentials, but also facilitates the simultaneous monitoring of neurotransmitter dynamics, offering a comprehensive view of neural communication. CMOS technology provides the advantage of miniaturization and low power consumption, enabling the deployment of dense electrode arrays that can capture the intricacies of neural networks in real time. By harnessing the capabilities of electrochemical potentiostats, we can explore the biochemical milieu of the brain, identifying how chemical signals influence electrical activity and vice versa. This multifaceted technique is poised to revolutionize our understanding of complex brain functions and disease states, enhancing our ability to map neural circuits with unprecedented detail and precision. As we delve deeper into the interplay between electrochemical and electrophysiological phenomena, these advanced tools will be crucial in unraveling the mysteries of cognition, paving the way for novel therapeutic interventions and innovative brain-computer interface technologies.

[0015] In certain aspects, the invention provides systems for electrochemical (EChem) and electrophysiological (EPhys) recording that include a probe, and a processor operable associated with the probe to receive data from the probe, wherein the processor comprises circuitry that is configured to perform simultaneous electrophysiological and electrochemical recordings.

[0016] In other aspects, the invention provides methods for electrochemical (EChem) and electrophysiological (EPhys) recording that involve providing a system comprising a probe; and a processor operable associated with the probe to receive data from the probe, wherein the processor comprises circuitry that is configured to perform simultaneous electrophysiological and electrochemical recordings; applying the probe to an in vivo area of tissue; receiving data electrochemical (EChem) and electrophysiological (EPhys) data from the probe to the processor;Attorney Docket No.: PURD- 152 / 01 WO 28593 / 748

[0017] PATENT APPLICATION

[0018] and processing, via the processor the EChem and EPhys data to thereby obtain EChem and EPhys recordings (e g., simultaneously or quasi- simultaneously) from the in vivo tissue.

[0019] In embodiments of the systems and methods of the invention, the processor comprises a potentiostat / transimpedance amplifier (TIA) for EChem, wherein the TIA includes at least 8 channels, at least 16 channels, at least 32 channels, or up to 256 channels. In embodiments of the systems and methods of the invention, the processor comprises a neural amplifier for EPhys recording, wherein the neural amplifier includes at least 8 channels, at least 16 channels, at least 32 channels, or up to 256 channels.

[0020] In embodiments of the systems and methods of the invention, the TIA and the neural amplifier are chopper stabilized to reduce low-frequency flicker noise, thus enabling high-fidelity recording of high-frequency phasic and tonic signals. In embodiments of the systems and methods of the invention, the TIA is a switched capacitor amplifier with programmable gain. In embodiments of the systems and methods of the invention, the TIA is capable of performing amperometric and fast scan cyclic voltammetric recording of electrochemical active analytes. In embodiments of the systems and methods of the invention, integrated input noise of the TIA is 401 fArms for BW of 1 kHz, enabling high-fidelity detection of very low analyte concentrations.

[0021] In embodiments of the systems and methods of the invention, the neural amplifier is a capacitively coupled instrumentation amplifier (CCIA) with an input impedance boosting circuit and an automatic electrode offset cancelation circuit. In embodiments of the systems and methods of the invention, the CCIA has an overall gain of 42 dB with a BW of 5 kHz, input referred noise of 1.3 pVrms and input impedance over 1GQ.

[0022] In embodiments of the systems and methods of the invention, each of the CCIA and TIA consumes 11 pW and 50 pW power, respectively.

[0023] Brief Description of the Drawings

[0024] FIG. 1 panel A shows schematic of the chopper stabilized transimpedance amplifier. The schematic includes a correlated double sampling sampling circuit to cancel the DC offset at the output node. FIG. 1 panel B shows input reffered noise from the post-layout simulation of the circuit in (A).

[0025] FIG. 2 panel A shows schematic of the chopper stabilized capacitively coupled instrumentation amplifier. FIG. 2 panel B input referred noise from the post-layout simulation ofAttorney Docket No.: PURD- 152 / 01 WO 28593 / 748

[0026] PATENT APPLICATION

[0027] the CCIA shown in (A).

[0028] FIG. 3 panels A-B show two approaches for simultaneous EChem and EPhys recording (Panel A) Two electrode design for each recording site for completely simultaneous recording. (Panel B) Time division multiplexing for interleaving EChem and EPhys recording for quasi-simultaneous recording, (inset) A SEM of PEDOT:PSS coated electrode for both EChem and EPhys recording.

[0029] FIG. 4 shows a conventional packaging for the system. The CMOS is mounted on a headstage PCB. The flexible probe (Needles, surface girds or flexible microprove) can be attached to the headstage with a zero-insertion-force (ZIF) connector.

[0030] FIG. 5 panels A-B show printing of needles directly on the CMOS Die. (Panel A) shows the schematic for integration of the needle electrode with the neural amplifier (CCIA). (Panel B) schematic shows the integration of the needle electrode withe the transimpedance amplifier (TIA).

[0031] FIG. 6 shows a diagram of ACF bonding and the metals layers in the IC. M5-1carries the signal routing which are shielded by layer M4-6. All the active circuit and the routing are below M4.

[0032] FIG. 7 is an illustration showing an exemplary data analysis module for implementing the systems and methods of the invention in certain embodiments.

[0033] Detailed Description

[0034] We have designed a system consisting of a custom flexible neural probe along with custom CMOS backend capable of performing simultaneous electrophysiological and electrochemical recordings. The exemplar CMOS backend consists of an 8-channel (8,16,32 extendable to 256) potentiostat / transimpedance amplifier (TIA) for EChem and an 8-channel neural amplifier (8,16,32 extendable to 256) for EPhys recording. Both the amplifiers are chopper stabilized to reduce the low-frequency flicker noise, thus enabling high-fidelity recording of low frequency as well as rapidly changing high-frequency signals. The TIA is a switched capacitor amplifier with programmable gain (FIG. 1 panel A). The TIA is capable of performing amperometric and fast scan cyclic voltammetric recording of electrochemical active neurotransmitters such as dopamine. The integrated input noise of the TIA is 401 fArms for BW of 1 kHz (FIG. 1 panel B), enabling high-fidelity detection of very low dopamine concentrations.Attorney Docket No.: PURD- 152 / 01 WO 28593 / 748

[0035] PATENT APPLICATION

[0036] The neural amplifier is a capacitively coupled instrumentation amplifier (CCIA) (FIG. 2 panel A) with an input impedance boosting circuit and an automatic electrode offset cancelation circuit. The CCIA has an overall gain of 42 dB with a BW of 5 kHz, input referred noise of 1.3 pVrms (FIG. 2 panel B) and input impedance over IGO Each CCIA and TIA consumes 11 pW and 50 pW power, respectively. The circuit was designed in TSMC’s 180 nm technology node and has dimensions of 2 mm x 2.5 mm. The IC was then packaged in QFN72 package for easy integration with the neural probe.

[0037] CMOS Design: Electrochemistry: Chopper stabilized transimpedance amplifier

[0038] The TIA (Fig. 1 A) is a switched capacitor amplifier whose transimpedance gain can be controlled by changing the integrating time of the RESET switch. Excitation signal for performing impedance spectroscopy, which is generated off chip, is applied to the positive terminal of the TIA while measuring the current following through the electrode. The integrated input referred noise for the TIA is 401 fARMS and it is capable of performing impedance measurement from 1 Hz to 5 kHz within the impedance range of 10 kQ to 10 GQ. The circuit is designed in TSMC 180 nm technology node, with supply voltage of 3.3 V. The circuit consumes 50 pW (not including biasing circuit) of power and occupies an area 0.035 mm2 (310 pm x 113 pm).

[0039] CMOS Design: Electrophysiology: Chopper stabilized capacitively coupled instrumentation amplifier

[0040] The neural amplifier is a chopper stabilized capacitively coupled instrumentation amplifier (FIG. 2 panel A). To mitigate the lowering of input impedance caused by chopping, an input impedance boosting circuit is designed boosting the impedance over 1GQ. To cancel the DC offset at the electrode a DC servo loop is implemented using pseudoresistors to achieve high pass poles in sub 1Hz frequency range. The circuit has an overall gain of 42 dB with a bandwidth of 5 kHz. The circuit capable of measuring low frequency LFPs in l-200Hz band as well as spikes till 2 kHz. The integrated input referred noise for the amplifier is 1.3 pVRMS. The circuit is designed in TSMC 180 nm technology node, with supply voltage of 1.5 V. The circuit consumes 11 pW (not including biasing circuit) of power and occupies an area 0.2 mm2 (750 pm x 260 pm).Attorney Docket No.: PURD- 152 / 01 WO 28593 / 748

[0041] PATENT APPLICATION

[0042] Two approaches for performing EChem and EPhys recordings

[0043] For completely simultaneous recording, each recording site will have two electrodes. One of the electrodes for EChem which will be coated by carbon nanotubes and the other for Ephys will be coated with nanoporous gold or platinum (FIG. 3 panel A).

[0044] For quasi-simultaneous recording, we will employ a time division multiplexing approach. The electrode will be coated by PEDOT:PSS so it can perform both recordings. The EChem and Ephys recording will be performed alternatively as shown in FIG. 3 panel B.

[0045] Packaging

[0046] In certain embodiments, conventional packaging with a zero-insertion-force (ZIF) clip connecting the probe to a head stage with the CMOS IC can be used. FIG. 4 shows a conventional packaging for the system. The CMOS is mounted on a headstage PCB. The flexible probe (Needles, surface girds or flexible microprobe) can be attached to the headstage with a ZIF connector.

[0047] In other embodiments, printing of metal electrodes on the CMOS IC directly is employed. FIG. 5 panels A-B show printing of needles directly on the CMOS Die. (Panel A) shows the schematic for integration of the needle electrode with the neural amplifier (CCIA). (Panel B) schematic.

[0048] The needle electrodes can be directly fabricated on the bonding pads on a CMOS IC with amplifiers. Direct printing on the CMOS IC will ensure low parasitic capacitances for high ignal-to-noise (SNR) recording as well as compact packaging for easy use in chronic freely moving applications. The CMOS IC can have an amplifier array, stimulation circuit as well as digital processor for online spike analysis. The entire package can be implanted subdurally and can communicate with other devices wirelessly. Each electrode will be connected to a TIA and a neural amplifier by a switch, to employ time division multiplexing as shown in FIG. 3 panel B.

[0049] In certain embodiments, flip-chip bonding of the IC directly to the parylene probes is employed. To make a compact headstage, containing the amplifier IC can be flip-chip bonded to the parylene probe. The IC will be flip chip bonded using Anisotropic conductive film (ACF) to the probe. ACF bonding will reduce the parasitic capacitance and reduce the headstage size as compared to using wire bonding. The cross-section of the IC showing the ACF bonding balls between the gold pads on the probe and the Al pads on the IC is shown in FIG. 6. The IC will beAttorney Docket No.: PURD- 152 / 01 WO 28593 / 748

[0050] PATENT APPLICATION

[0051] 5 mm-1x 5 mm, thus the routing will be very long between the pads and the amplifier banks, thus, to reduce crosstalk between the signals will be shielded using metals layers M4-6 (FIG. 6). The headstage will be connected to a motherboard containing the low noise power supplies, high-speed buffers and a waveform generator for impedance spectroscopy. The mother board will be interfaced with a DAQ system for digitizing amplifier signals and generating other control and clock signals.

[0052] Certain exemplified applications

[0053] In certain embodiments, the systems and methods of the invention can be used for simultaneous in-vivo detection of analytes, such as but not limited to neurotransmitter detection (e.g., Dopamine, serotonin, nor-epinephrine, other catecholamines) and extracellular local field potentials (LFP) and spiking activity.

[0054] Using the TIA, fast scan cyclic voltammetric (FSCV) recordings can be performed to detect neurotransmitters like Dopamine. In FSCV, the voltage of the electrode is scanned from -0.5V to IV and back to -0.5V, while measuring the current passing through the electrode. The voltage sweep causes the neurotransmitter molecules at the electrode to undergo redox reaction, and the electron transfer is recorded as current at the electrode. Based on the voltage at which this redox current peak is observed and the height of the peak, we can estimate the concentration of the neurotransmitter at the electrode. In case, if there are multiple neurotransmitters present at the electrode, they will show up as two distinct peaks if they have distinct redox potentials. This will enable to detect multiple neurotransmitter level fluctuations using the same setup.

[0055] In certain embodiments, multi-channel design will allow the detection of neurotransmitter concentrations in multiple areas of the brains. The dopaminergic centers in the brain (like VTA) project to multiple brain areas. Recent studies have shown that dopamine release from VTA has distinct roles depending on the brain region in the study. The multi-channel design of the CMOS IC will enable the simultaneous detection of dopamine in various brain regions.

[0056] In certain embodiments, the systems and methods of the invention can be used for detection of other electrochemical active molecules along with voltage measurements. The TIA can detect any electrochemically active molecules using techniques like cyclic voltammetry, FSCV, or amperometry. Such integration can be used in point-of-care applications where electrochemistry and charge sensing are needed.Attorney Docket No.: PURD- 152 / 01 WO 28593 / 748

[0057] PATENT APPLICATION

[0058] In certain embodiments, the systems and methods of the invention can be used for performing impedance spectroscopy by repurposing the TIA. Impedance spectroscopy is used to characterize electrodes in high-density electrode arrays to identify faculty electrodes. We propose to use a switched capacitor chopper-stabilized TIA for performing impedance spectroscopy (FIG. 1 panel A). The switched capacitor in the feedback can be used to tune the transimpedance of the TIA, allowing to measure impedance in the range of 10 kQ to 10 GQ. Impedance spectroscopy can also identify if a Nano-Needle is in extracellular, “pseudo” clamp or true clamp configuration for practical switching between these modes. Impedance spectroscopy can also be used to measure electrochemically inactive molecules by measuring the binding of these molecules to a surface that has receptors for the molecule of interest.

[0059] System Architecture

[0060] In certain embodiments, the systems and methods of the invention can be carried out using automated systems and computing devices. Specifically, aspects of the invention described herein can be performed using any type of computing device, such as a computer, that includes a processor, e.g., a central processing unit, or any combination of computing devices where each device performs at least part of the process or method. In some embodiments, systems and methods described herein may be controlled using a handheld device, e.g., a smart tablet, or a smart phone, or a specialty device produced for the system.

[0061] Systems and methods of the invention can be performed using software, hardware, firmware, hardwiring, or combinations of any of these. Features implementing functions can also be physically located at various positions, including being distributed such that portions of functions are implemented at different physical locations (e.g., imaging apparatus in one room and host workstation in another, or in separate buildings, for example, with wireless or wired connections).

[0062] Processors suitable for the execution of computer program include, by way of example, both general and special purpose microprocessors, and any one or more processor of any kind of digital computer. Generally, a processor will receive instructions and data from a read-only memory or a random access memory or both. The essential elements of computer are a processor for executing instructions and one or more memory devices for storing instructions and data. Generally, a computer will also include, or be operatively coupled to receive data from orAttorney Docket No.: PURD- 152 / 01 WO 28593 / 748

[0063] PATENT APPLICATION

[0064] transfer data to, or both, one or more mass storage devices for storing data, e.g., magnetic, magneto-optical disks, or optical disks. Information carriers suitable for embodying computer program instructions and data include all forms of non-volatile memory, including by way of example semiconductor memory devices, (e.g., EPROM, EEPROM, solid state drive (SSD), and flash memory devices); magnetic disks, (e.g., internal hard disks or removable disks); magnetooptical disks; and optical disks (e.g., CD and DVD disks). The processor and the memory can be supplemented by, or incorporated in, special purpose logic circuitry.

[0065] To provide for interaction with a user, the subject matter described herein can be implemented on a computer having an I / O device, e.g., a CRT, LCD, LED, or projection device for displaying information to the user and an input or output device such as a keyboard and a pointing device, (e.g., a mouse or a trackball), by which the user can provide input to the computer. Other kinds of devices can be used to provide for interaction with a user as well. For example, feedback provided to the user can be any form of sensory feedback, (e.g., visual feedback, auditory feedback, or tactile feedback), and input from the user can be received in any form, including acoustic, speech, or tactile input.

[0066] The subject matter described herein can be implemented in a computing system that includes a back-end component (e.g., a data server), a middleware component (e.g., an application server), or a front-end component (e.g., a client computer having a graphical user interface or a web browser through which a user can interact with an implementation of the subject matter described herein), or any combination of such back-end, middleware, and frontend components. The components of the system can be interconnected through network by any form or medium of digital data communication, e.g., a communication network. For example, the reference set of data may be stored at a remote location and the computer communicates across a network to access the reference set to compare data derived from the female subject to the reference set. In other embodiments, however, the reference set is stored locally within the computer and the computer accesses the reference set within the CPU to compare subject data to the reference set. Examples of communication networks include cell network (e g., 3G or 4G), a local area network (LAN), and a wide area network (WAN), e.g., the Internet.

[0067] The subject matter described herein can be implemented as one or more computer program products, such as one or more computer programs tangibly embodied in an information carrier (e.g., in a non-transitory computer-readable medium) for execution by, or to control theAttorney Docket No.: PURD- 152 / 01 WO 28593 / 748

[0068] PATENT APPLICATION

[0069] operation of, data processing apparatus (e.g., a programmable processor, a computer, or multiple computers). A computer program (also known as a program, software, software application, app, macro, or code) can be written in any form of programming language, including compiled or interpreted languages (e.g., C, C++, Perl), and it can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. Systems and methods of the invention can include instructions written in any suitable programming language known in the art, including, without limitation, C, C++, Perl, Java, ActiveX, HTML5, Visual Basic, or JavaScript.

[0070] A computer program does not necessarily correspond to a file. A program can be stored in a file or a portion of file that holds other programs or data, in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files that store one or more modules, sub-programs, or portions of code). A computer program can be deployed to be executed on one computer or on multiple computers at one site or distributed across multiple sites and interconnected by a communication network.

[0071] A file can be a digital file, for example, stored on a hard drive, SSD, CD, or other tangible, non-transitory medium. A file can be sent from one device to another over a network (e.g., as packets being sent from a server to a client, for example, through a Network Interface Card, modem, wireless card, or similar).

[0072] Writing a file according to the invention involves transforming a tangible, non-transitory computer-readable medium, for example, by adding, removing, or rearranging particles (e.g., with a net charge or dipole moment into patterns of magnetization by read / write heads), the patterns then representing new collocations of information about objective physical phenomena desired by, and useful to, the user. In some embodiments, writing involves a physical transformation of material in tangible, non-transitory computer readable media (e.g., with certain optical properties so that optical read / write devices can then read the new and useful collocation of information, e.g., burning a CD-ROM). In some embodiments, writing a file includes transforming a physical flash memory apparatus such as NAND flash memory device and storing information by transforming physical elements in an array of memory cells made from floatinggate transistors. Methods of writing a file are well-known in the art and, for example, can be invoked manually or automatically by a program or by a save command from software or a write command from a programming language.Attorney Docket No.: PURD- 152 / 01 WO 28593 / 748

[0073] PATENT APPLICATION

[0074] Suitable computing devices typically include mass memory, at least one graphical user interface, at least one display device, and typically include communication between devices. The mass memory illustrates a type of computer-readable media, namely computer storage media. Computer storage media may include volatile, nonvolatile, removable, and non-removable media implemented in any method or technology for storage of information, such as computer readable instructions, data structures, program modules, or other data. Examples of computer storage media include RAM, ROM, EEPROM, flash memory, or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, Radiofrequency Identification tags or chips, or any other medium which can be used to store the desired information and which can be accessed by a computing device.

[0075] As one skilled in the art would recognize as necessary or best-suited for performance of the methods of the invention, a computer system or machines of the invention include one or more processors (e.g., a central processing unit (CPU) a graphics processing unit (GPU) or both), a main memory and a static memory, which communicate with each other via a bus.

[0076] In an exemplary embodiment shown in FIG. 7, system 200 can include a computer 249 (e.g., laptop, desktop, or tablet). The computer 249 may be configured to communicate across a network 209. Computer 249 includes one or more processor 259 and memory 263 as well as an input / output mechanism 254. Where methods of the invention employ a client / server architecture, steps of methods of the invention may be performed using server 213, which includes one or more of processor 221 and memory 229, capable of obtaining data, instructions, etc., or providing results via interface module 225 or providing results as a file 217. Server 213 may be engaged over network 209 through computer 249 or terminal 267, or server 213 may be directly connected to terminal 267, including one or more processor 275 and memory 279, as well as input / output mechanism 271.

[0077] System 200 or machines according to the invention may further include, for any of I / O 249, 237, or 271 a video display unit (e.g., a liquid crystal display (LCD) or a cathode ray tube (CRT)). Computer systems or machines according to the invention can also include an alphanumeric input device (e.g., a keyboard), a cursor control device (e.g., a mouse), a disk drive unit, a signal generation device (e.g., a speaker), a touchscreen, an accelerometer, a microphone, a cellular radio frequency antenna, and a network interface device, which can be, for example, aAttorney Docket No.: PURD- 152 / 01 WO 28593 / 748

[0078] PATENT APPLICATION

[0079] network interface card (NIC), Wi-Fi card, or cellular modem.

[0080] Memory 263, 279, or 229 according to the invention can include a machine-readable medium on which is stored one or more sets of instructions (e.g., software) embodying any one or more of the methodologies or functions described herein. The software may also reside, completely or at least partially, within the main memory and / or within the processor during execution thereof by the computer system, the main memory and the processor also constituting machine-readable media. The software may further be transmitted or received over a network via the network interface device.

[0081] Incorporation by Reference

[0082] References and citations to other documents, such as patents, patent applications, patent publications, journals, books, papers, web contents, have been made throughout this disclosure, including to the Supplementary. The Supplementary, and all other such documents are hereby incorporated herein by reference in their entirety for all purposes.

[0083] Equivalents

[0084] The invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The foregoing embodiments are therefore to be considered in all respects illustrative rather than limiting on the invention described herein.

Claims

Attorney Docket No.: PURD- 152 / 01 WO 28593 / 748PATENT APPLICATIONWhat is claimed is:

1. A system for electrochemical (EChem) and electrophysiological (EPhys) recording, the system comprising:a probe; anda processor operable associated with the probe to receive data from the probe, wherein the processor comprises circuitry that is configured to perform simultaneous electrophysiological and electrochemical recordings.

2. The system of claim 1, wherein the processor comprises a potentiostat / transimpedance amplifier (TIA) for EChem, wherein the TIA includes at least 8 channels, at least 16 channels, at least 32 channels, or up to 256 channels.

3. The system of claim 2, wherein the processor comprises a neural amplifier for EPhys recording, whetrein the neural amplifier includes at least 8 channels, at least 16 channels, at least 32 channels, or up to 256 channels.

4. The system of claim 3, wherein the TIA and the neural amplifier are chopper stabilized to reduce low-frequency flicker noise, thus enabling high-fidelity recording of high-frequency phasic and tonic signals.

5. The system of claim 2, wherein the TIA is a switched capacitor amplifier with programmable gain.

6. The system of claim 5, wherein the TIA is capable of performing amperometric and fast scan cyclic voltammetric recording of electrochemical active analytes.

7. The system of claim 2, wherein integrated input noise of the TIA is 401 fArms for BW of 1 kHz, enabling high-fidelity detection of very low analyte concentrations.Attorney Docket No.: PURD- 152 / 01 WO 28593 / 748PATENT APPLICATION8. The system of claim 3, wherein the neural amplifier is a capacitively coupled instrumentation amplifier (CCIA) with an input impedance boosting circuit and an automatic electrode offset cancelation circuit.

9. The system of claim 8, wherein the CCIA has an overall gain of 42 dB with a BW of 5 kHz, input referred noise of 1.3 pVrms and input impedance over 1GQ.

10. The system of claim 8, wherein each of the CCIA and TIA consumes 11 pW and 50 pW power, respectively.

11. A method for electrochemical (EChem) and electrophysiological (EPhys) recording, the method comprising:providing a system comprising a probe; and a processor operable associated with the probe to receive data from the probe, wherein the processor comprises circuitry that is configured to perform simultaneous electrophysiological and electrochemical recordings;applying the probe to an in vivo area of tissue;receiving data electrochemical (EChem) and electrophysiological (EPhys) data from the probe to the processor; andprocessing, via the processor the EChem and EPhys data to thereby obtain EChem and EPhys recordings from the in vivo tissue.

12. The method of claim 11, wherein the processor comprises a potentiostat / transimpedance amplifier (TIA) for EChem, wherein the TIA includes at least 8 channels, at least 16 channels, at least 32 channels, or up to 256 channels.

13. The method of claim 12, wherein the processor comprises a neural amplifier for EPhys recording, whetrein the neural amplifier includes at least 8 channels, at least 16 channels, at least 32 channels, or up to 256 channels.Attorney Docket No.: PURD- 152 / 01 WO 28593 / 748PATENT APPLICATION14. The method of claim 13, wherein the TIA and the neural amplifier are chopped and stabilized to reduce low-frequency flicker noise, thus enabling high-fidelity recording of high-frequency phasic and tonic signals.

15. The method of claim 12, wherein the TIA is a switched capacitor amplifier with programmable gain.

16. The method of claim 15, wherein the TIA is capable of performing amperometric and fast scan cyclic voltammetric recording of electrochemical active analytes.

17. The method of claim 12, wherein integrated input noise of the TIA is 401 fArms for BW of 1 kHz, enabling high-fidelity detection of very low analyte concentrations.

18. The method of claim 13, wherein the neural amplifier is a capacitively coupled instrumentation amplifier (CCIA) with an input impedance boosting circuit and an automatic electrode offset cancelation circuit.

19. The method of claim 18, wherein the CCIA has an overall gain of 42 dB with a BW of 5 kHz, input referred noise of 1.3 pVrms and input impedance over 1GQ.

20. The method of claim 11, wherein the EChem and EPhys recordings are obtain simultaneously or quasi- simultaneously.

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