Quantum optical implementation of continual equilibrium propagation

Abstract

In some embodiments, an optical computing system configured to train an artificial neural network may be provided. The optical computing system may include a quantum optical memory configured to store a current training state of the artificial neural network. The optical computing system may further include a quantum optical processing circuit configured to compute a feedback to advance the artificial neural network to a next training state.

Description

[0001] QUANTUM OPTICAL IMPLEMENTATION OF CONTINUAL EQUILIBRIUM PROPAGATION CROSS REFERENCE TO RELATED APPLICATIONS

[0002] [1] This application claims priority to U. S. Provisional Application No. 63 / 750,018, filed January 27, 2025. and entitled “QUANTUM OPTICAL IMPLEMENTATION OF CONTINUAL EQUILIBRIUM PROPAGATION,” which has been hereby incorporated in its entirety by reference.

[0003] FIELD

[0004] [2] This disclosure relates to a quantum optical implementation of a continual equilibrium training of an artificial neural network

[0005] BACKGROUND

[0006] [3] A continual Equilibrium Propagation (cEP) is an energy based training method for artificial neural network. The performance of cEP is equivalent to training the artificial neural network using back propagation through time. However, a cEP training implemented using classical digital computing devices (e.g., CPUs, GPUs) and digital electronics (e.g., FPGAs) is both time and energy inefficient. Additionally, the classical digital computing devices and digital electronics require a large number of components.

[0007] SUMMARY

[0008] [4] In some embodiments, an optical computing system configured to train an artificial neural network may be provided. The optical computing system may include a quantum optical memory configured to store a current training state of the artificial neural network. The optical computing system may further include a quantum optical processing circuit configured to compute a feedback to advance the artificial neural network to a next training state.

[0009] [5] In some embodiments, a method may be provided. The method may include storing, by a quantum optical memory of an optical computing system, a current training state of an artificial neural network being trained. The method may further include computing, by a quantum optical processing circuit of the optical computing system, a feedback to advance the artificial neural network to a next training state.BRIEF DESCRIPTION OF DRAWINGS

[0010] [6] The figures are for purposes of illustrating example embodiments, but it is understood that the present disclosure is not limited to the arrangements and instrumentality shown in the drawings. In the figures, identical reference numbers identify at least generally similar elements.

[0011] [7] FIG. IA shows an illustrative optical computing system, according to example embodiments of this disclosure.

[0012] [8] FIG. IB shows an illustrative artificial neural network configured to be trained according to example embodiments of this disclosure.

[0013] [9] FIG. 2 shows a quantum optical memory, according to example embodiments of this disclosure.

[0014]

[0010] FIG. 3 shows a quantum optical memory, according to example embodiments of this disclosure.

[0015]

[0011] FIG. 4 shows a quantum optical memory, according to example embodiments of this disclosure.

[0016]

[0012] FIG. 5 shows a quantum optical processing circuit, according to example embodiments of this disclosure.

[0017]

[0013] FIG. 6 shows a quantum optical processing circuit, according to example embodiments of this disclosure.

[0018]

[0014] FIG. 7 shows a quantum optical processing circuit, according to example embodiments of this disclosure.

[0019]

[0015] FIG. 8 show s a quantum optical processing circuit, according to example embodiments of this disclosure.

[0020]

[0016] FIG. 9 shows a quantum optical processing circuit, according to example embodiments of this disclosure.

[0021]

[0017] FIG. 10 shows a quantum optical processing circuit, according to example embodiments of this disclosure.

[0022]

[0018] FIG. 11 shows an example frequency comb, according to example embodiments of this disclosure.

[0023]

[0019] FIG. 12 shows an example optical circuit configured to generate a frequency comb, according to example embodiments of this disclosure.

[0024]

[0020] FIG. 13 shows an example method of training an artificial neural network, according to example embodiments of this disclosure.DESCRIPTION

[0025]

[0021] Embodiments disclosed herein are directed an optical computing system that may train an artificial neural network using quantum optical circuits such as quantum optical memories and quantum optical processing circuits. That is, the optical computing system may avoid the slowness of digital circuits and the overhead of converting between digital and optical circuits. The quantum optical memories may be implemented using optical fiber cavities with a degenerate optical parametric amplifier (DOPA). The quantum optical processing circuits may be implemented using DOPA based one-bit delay cavities. In some embodiments, one or more of the quantum optical memories may be formed using multi-core high-silica fibers and the quantum optical circuits may be formed using thin film lithium niobate (TFLN) wafers.

[0026]

[0022] FIG. 1A shows an illustrative optical computing system 100, according to example embodiments of this disclosure. The optical computing system 100 may train an artificial neural network described in regards to FIG. IB. The optical computing system 100 may include a quantum optical processing circuit 102 (also referred to as quantum optical processor) and a quantum optical memory 104. Components forming the quantum optical processing circuit 102 and the quantum optical memory 104 are described below. Generally, the quantum optical memory 104 may store a current state 108 of the netw ork being trained and provide the current state 108 to the quantum optical processing circuit 102. The quantum optical processing circuit 102, as descried in detailed below, may compute and provide a next state 106 (as a feedback) to the quantum optical memory to update the current state 108 to the next state 106. The training may continue until desired state of the artificial neural network is reached. In some embodiments, the optical computing system 100 may be formed using a thin film lithium niobate (TFLN) devices and multi-core high-silica fibers.

[0027]

[0023] FIG. IB shows an illustrative artificial neural network 150, according to example embodiments of this disclosure. The artificial neural network 150 may be trained using cEP. In the example shown, the artificial neural network 150 may have multiple layers: an input layer 152 with a number of neurons (e.g., N = 10,000). a hidden layer 154 with a number of layers (e.g., n = 125) and anumber of neurons per layer (e.g., M= 10.000), and an output layer 156 with a number of neurons (e.g., L = 10,000). The task of the training using cEP may be to find an input weight matrix 160 (W1X) hidden weight matrices 161 (W21, IV32Wn,n-i) and output weight matrix 162 ( „). so that the output layer 156 vector S0(L) may be identical or approximately identical to a desired target vector 158 Y (L) for arbitrary input vectors X(A) at the input layer 152.

[0024] The update rule of the training using cEP may be as follows. If weight matrix 162 WOn, last hidden layer 154 vector S-]n(M) and output layer 156 vector So(L) are known at a time (t), the output layer 156 vector S0L') at a time (t + 1) may be updated using:

[0028]

[0029] s0(t + i) = a(wOn(t) ■ WO) + - so(O) (i) where o may be a nonlinear activation function such as a sigmoid function

[0030]

[0031] and may be a constant feedback parameter.

[0032]

[0025] Additionally, if weight matrix 160 1V1X, first hidden weight matrix 161 W21and the second hidden layer 154 vector S12(M) are known at a time ( / ), first hidden layer 154 vector Stl(M) at a time (t + 1) can be updated by:

[0033] wt + 1) = [W ■ + i(t) ■ OL (2)

[0034]

[0026] The three weight matrices 160, 161, 162 may be updated according to the following rule:

[0035] n Wt + i) = VWO + j [Wt + 1) ■ xT- wo ■ xT], (3)

[0036] wi+vtt + 1) = WXO + j [Wi (t + 1) ■su(t + i)r- Wi(0- W0T], (4)

[0037]

[0038] (i = l~n — 1)

[0039] „(t + 1) =n(O + [W + 1) ■ sln(t + Dr- so(O ■ WO7"]- (5) where i] may be another constant feedback parameter.

[0040]

[0027] It can be noted that the update of (n +1) weight matrices 160 IV1X. 161

[0041]

[0042] and 162 WOnmay require only local vector information at times (t) and (t + 1), which may contribute to a reduction of a memory space when this training is implemented on an optical computing device. It can also be noted that the cEP update equations (l)-(5) depend on the product of two variables, so that physical implementation may require only a second order nonlinear process such as sum frequency generation (SFG) or difference frequency generation (DFG). The above update process may be repeated during a period t e [0, K] until convergence, that is, S0(L) -» T(L). In some embodiments, this training may be implemented using thin film lithium niobate (TFLN) quantum photonic integrated circuits and multi-core high-silica fibers.

[0043]

[0028] FIG. 2 shows a quantum optical memory 200 configured to store (n + 3) vectors X(A), ■S'ii(M) ••• Sln(M), S0(L) and Y (L), according to example embodiments of this disclosure. The quantum optical memory 200 may be formed using a DOPA 206. In some embodiments, the DOPA 206 may be formed using thin film lithium niobate (TFLN). The quantum optical memory 200 may form a portion of the optical computing system 100 configured for trainingthe artificial neural network 150. Additional portions of the optical computing system 100 are described below. Within the quantum optical memory 200, four groups of pulses X(A), S (M), S0(L) and K(L) may have center frequencies 202 cox, and alternate

[0044]

[0045] and &)0separated by 200 GHz

[0046]

[0047] optical pulse bandwidth of 100 GHz). Each pulse may have a duration of~3 ps, so the time-bandwidth product A ■ Ar ~ 0.3 (Fourier transform limited). Because the total number of pulses may be N + M x n + 2L ~ 1.3 x io6and the pulse-to-pulse interval may be (100 GHz)'1= 10 ps, the round trip time of 13 ps may be enough to accommodate all pulses. A high-silica fiber of 2.6 km realizes around time of 13ps and round trip loss of0.5 dB.

[0048]

[0029] In some embodiments, the average photon number per pulse may be 500, so that the signal-to-noise (S / N) ratio of an internal signal pulse may be (X)2 / (AX2) = 33 dB at a vacuum noise limit ((AX2) = 1 / 4). This photon number may correspond to the pulse energy of 0.07 [fl]. A round trip loss of I = 2.6 km fiber ring cavity may be about 0.5 dB in a high-silica fiber. There may be other losses, such as an extraction loss (1.5 dB) and in / out coupling loss to DOPA 206 (0.5 dB + 0.5 dB = 1.0 dB), which may be added to the propagation loss and make an overall round trip loss of ~3 dB. In order to compensate ~3 dB loss, a DOPA 206 gain may have to be ~3 dB. In cases of TFLN, the DOPA 206 gain may be ~ 36 AB / pj so that a 3 dB gain may be achieved with a pump pulse energy of less than 10 [fl]. This pump energy may be more than two orders of magnitude larger than the signal pulse energy (0.07 fj) and thus the DOPA 206 may operate in a linear regime (without gain saturation). With a pulse repetition frequency of 1011(Hz), the pump pulse energy of 10 [fl] may correspond to the pump power of 1 [mW],

[0049]

[0030] The quantum optical memory 200 may use DOPA 206 for at least two reasons. First, a DOPA 206 may be a “noise-free amplifier” so that single-to-noise ratio (S / N) degradation due to repeated loss and gain during a whole computation period can be minimized to a level set by the quantum principle, i.e., by vacuum fluctuation added by 1.5 dB optical fiber and coupling loss per round trip. The noise associated with the extraction loss of 1.5 dB can be suppressed by preparing a squeezed vacuum state at an open port of the extraction coupler. Second, DOPA 206 may be a “phase sensitive amplifier / de-amplifier” so that a phase error, mainly caused by a phase drift of an externally injected feedback signal, can be constantly suppressed because X-quadrature is amplified but P-quadrature is de-amplified at each round trip. A single core of the multi-core fiber and a single DOPA can implement the quantum optical memory 200.

[0031] FIG. 3 shows a quantum optical memory 300 configured to store the weight matrix W1X, according to example embodiments of this disclosure. The weight matrix W1Xmay include N x M = 108elements. The weight matrix W1Xmay be divided into 100 submatrices, so that each of the sub-matrices may have 106elements. Accordingly, the quantum optical memoiy 300 may have 100 independent optical fiber cavities 302a-302n, formed by corresponding DOPAs 306a-306n and a single fiber with n = 100 cores. The cavity’ round trip time for each of the optical cavities 302a-302n may be 10 ps x 106= 10 ps and the cavity length may be 2 km. However, in order to operate the memory 300 synchronously with the quantum optical memory' 200, it may be convenient to use a 2.6 km fiber cavity instead of 2 km fiber cavity. Each one of the DOPAs 306a-306n may be pumped by 1 mW pump pulse at 2u>lx, where J1Xmay the center carrier frequency of the corresponding memory cavities 302a-302n.

[0050]

[0032] FIG. 4 shows a quantum optical memory' 400 configured to store the w eight matrix Wi+l i(i = 1 ~ 124), according to example embodiments of this disclosure. The weight matrix VFi+1j may include M x M = 108elements. Accordingly, the quantum optical memory' 400 may include 100 memory' cavities 402a-402n, formed by corresponding DOPAs 406a-406n and a single fiber with n = 100 cores. Each of the DOPAs 406a-406n may be pumped by 1 mW pump pulse at 2 uioi. where rooi may be a center carrier frequency of the each of the memory cavities 402a-402n. Each weight matrix Wi+l i(i = 1 ~ 124) can be implemented by multicore fibers, in w hich 100 cores are embedded in each fiber. A total of 126 multi-core fibers may be needed to implement, W1X. Wi+l i(i = 1 ~ 124) and W0,i25- The total number of DOPAs to support the quantum optical memories 300 and 400 may be 1.26 x 104, which may store a total of ~1.3 x 1010matrix elements.

[0051]

[0033] FIG. 5 shows a quantum optical processing circuit 500 configured to compute Wfo,i25 ’ S12S, according to example embodiments of this disclosure. As shown, the quantum optical processing circuit includes a sum frequency generation (SFG) circuit 502 and a difference frequency generation (DFG) circuit 504. The SFG circuit 502 and the DFG circuit 504 may be cascaded to output a product result at frequency o0, which may be the center carrier frequency of the vector So. The individual products may be summed using the circuit shown in FIG. 6.

[0052]

[0034] FIG. 6 shows a quantum optical processing circuit 600 configured to calculate a summation X L1WiJs125 ', according to example embodiments of this disclosure. As shown, the quantum optical processing circuit 600 may include quantum optical processing circuit 500 and may extract pulses from the quantum optical memory 200 and the quantum optical memory400. When the quantum optical processing circuit 600 may extract a portion of internal pulses Wij and s12s,j from the quantum optical memory 400 and the quantum optical memory 200, respectively, the S / N ratios of the extracted pulses may be degraded by incident vacuum fluctuations from open ports of the extraction beam splitters. In order to suppress this S / N ratio degradation, the quantum optical processing circuit 600 may produce squeezed vacuum states at two open ports 602, 604 by using corresponding DOPAs. The two extracted pulses,

[0053]

[0054] and $125,7, may be pre-amplified by the two DOPAs 606, 608 in order to suppress the S / N ratio degradation due to optical losses in the following circuit components (SFG and DFG as shown in FIG. 5, electro optic modulator (EOM) switch 610, one-bit delay cavity 612). After one round trip (13 ps) in the quantum optical memory 200 and quantum optical memory' 400, the one-bit delay cavity 612 internal pulse may accumulate the target signals,

[0055]

[0056] w^s^sj, which may be extracted to an output port through an EOM switch 614. The extracted output pulse 616 may be added by the optical error signal 618

[0057]

[0058] — sQi) by a 50-50% beam splitter and then injected into the target pulse 620 s0(in the quantum optical memory' 200. The quantum optical processing circuit 600 may repeat the above process (multiplication, integration, extraction, interference, injection) 10,000 times (i = 1 ~ L) to complete one update of Eq. (1). Therefore, a total time to update Eq. (1) may be 13 (ps) x 104= 0.13 (s). The whole computation process to update Eq. (1) may be executed by a single quantum optical processing circuit 600.

[0059]

[0035] As shown, in order to mput

[0060]

[0061] j pulse into the one-bit delay cavity 612 and extract output pulse 616

[0062]

[0063] wijsi25,j from the one-bit delay cavity 612, two EOM switches 610, 614 may have to be used. Each of the EOM switches 610. 614 may consume 10 mW electrical power at 100 GHz modulation frequency. However, the EOM switches 610, 614 may be operational for a time interv al of 10 ps X 104= 10‘7(s) out of 13 (ps) round trip time. Therefore, a duty cycle of 1% for EOM switches 610, 614 may reduce an effective (time averaged) power into each of the EOM switches 610, 614 to 10 (mW) x 0.01 = 0.1 mW. An example overall power budget of the quantum optical processing circuit 600 is summarized in Table 1 below.

[0064] Table 1. Power Budget of the Quantum Optical Processing Circuit 600.

[0065] 5 DOPAs 5 mW

[0066] 1 pump pulsel mW

[0067] for DFG

[0068] 2 EOM „ „

[0069] ., 0.2 mW

[0070] switchesTotal power 6,2 mW

[0071] One update time 0.13 (s)

[0072]

[0036] FIG. 7 shows an example quantum optical processing circuit 700, configured to calculate W1X• X and W21• S12, according to example embodiments of this disclosure. As shown, the quantum optical processing circuit 700 may include optical mixers 702, 704. The optical mixer 702 may include a SFG 706 and DFG 708. and the optical mixer 704 may include SFG 710 and DFG 712. The calculations by the optical mixers 702, 704 may be summed up in a quantum optical processing circuit described in FIG. 8 below.

[0073]

[0037] FIG. 8 shows an example quantum optical processing circuit 800 configured to calculate the summation ^=1wtjsi2,j, according to example embodiments of this disclosure. The components of the optical processing circuit 800 may be similar to the corresponding components of the quantum optical processing circuits 600, 700 and therefore will not be described in detail. The resource utilization of the quantum optical processing circuit 800 may be as follows. Two EOM switches 802, 804 that may accumulate and extract

[0074]

[0075] may be operational for a time interval of 10 ps x 104= 10'7s out of 13 ps round trip time. Therefore, an effective (time averaged) power into those EOM switches 802, 804 may be 10 (mW) X ^~0.1 mW. Similarly, two EOM switches 806, 808 that may accumulate and extract Wikxkmay be operational for a time interval of 10 ps x 104= 10‘7(s) out of 13 ps round trip time. Therefore, an effective (time averaged) power into these EOM switches 806, 808 may be 10 (mW) x ^~0.1 mW. In order to complete one update of Eq. (2), the above process has to be repeated M= 104times, so the update time of Eq. (2) may be 13 ps x 104= 0.13 s. The power budget as w ell as one update time of the quantum optical processing circuit is summarized in Table 2. Additional 125 quantum optical processing circuits 800 may be needed to update Eq. (2), so that the total power may be be 12.4 (mW / processor) x 125 (processors) ~1.6 (W).

[0076] Table 2, Power budget of Quantum Optical Processing Circuit 800

[0077] 10 DOPAs 10 mW

[0078] 2 pump pulse2 mW

[0079] for DFG

[0080] 2 EOMn„

[0081] .. 0.2 mW

[0082] switches

[0083] 2 EOM

[0084] .,n

[0085] 0.2 mW

[0086] switchesTotal power 12.4 mW per processor

[0087] One update time 0.13 s

[0088]

[0038] FIG. 9 shows an example quantum optical processing circuit 900 configured to calculate ■ XT, according to example embodiments of this disclosure. The components of the quantum optical processing circuit 900 may be similar to the corresponding components of the quantum optical processing circuits 500, 700, 800 and therefore will not be described in detail. Within the quantum optical processing circuit 900, in order to update one row vector [s^y, s^x2••• slt w] for updating the matrix

[0089]

[0090] of Eq. (3), two round trips of the quantum optical memory 200 may be needed to compute the row vectors at a time t and t + 1, and the time for these round trips may be 26 ps. This process may have to be repeated M= 104times to update Eq. (3). This time cost may be 26 ps x io4= 0.26 s. In order to synchronize with the update time of 0.13 s for the node vectors, the quantum optical circuit 900 may be duplicated and two parallel computation can be employed, in which each circuit computes 5000 row vectors. An EOM switch 902 may capture one pulse sll y- per round trip of the quantum optical memory 200, so the effective power consumption of the EOM switch 902 may be 10 mW x 10 (ps) / 13 (ps) = 10-8W. The power budget as well as one update time is summarized in Table 3. Because two such circuits may be needed, the total power budget may be 12 mW.

[0091] Table 3. Power budget of six copies of Quantum Optical Processing Circuit 900.

[0092] 5 DOPAs x 2 10 mW

[0093] 1 pump pulse for DFG x 2 2 mW

[0094] 1 EOM switch x 2 2 x 10'5mW

[0095] Total power 12 mW

[0096] One update time 0.13 s

[0097]

[0039] FIG. 10 shows an example quantum optical processing circuit 1000 configured to calculate So■

[0098]

[0099] according to example embodiments of this disclosure. The components of the quantum optical processing circuit 1000 may be similar to the corresponding components of the quantum optical processing circuits 500, 700, 800, 900 and therefore will not be described in detail. The quantum optical processing circuit 1000 may calculate S0(t + 1) ■ Sn(t + 1)—■So(t)'Sin(t) inEq. (5). The quantum optical processing circuit 1000 may duplicate soj(j = 1 ~ L) pulses M-multiple times by one-bit delay buffer 1002. In order to compute one row vector for WOn, two round trips may be needed, i.e., one round trip forcomputing S0(t)S1T)l(t) and another round trip for computing S0(t + 1) ■ Snt + 1), which is 26 ps. This process may have to be repeated L = 104times to update Eq. (5). The time cost may be 26 (ps) x 104= 0.26 s. Again, two quantum optical circuits may be used to perform a parallel repeated computation, which realizes an update time of Eq. (5) of 0.13 s. An EOM switch 1004 may capture one pulse sOj- per round trip of the quantum optical memory 200, so its effective power consumption is 10 mW x 10 (psec) / 13 (ps) = 10-8W. The power budget as well as one update time of the quantum optical processing circuit 1000 is summarized in Table 4. Additional 124 quantum optical circuits may be implemented to compute (W21, W32, ••• i25,i24sothat the total power needed to update the quantum optical circuits 1000 may be 12 (mW) x 125 -1.5 (W).

[0100] Table 4. Power budget of Quantum Optical Processing Circuit 1000

[0101] 5 DOPAs x 2 10 mW

[0102] 1 pump pulse for DFG x 2 2 mW

[0103] 1 EOM switch x 2 2 x io-5mW

[0104] Total power 12 mW

[0105] One update time 0.13 s

[0106]

[0040] FIG. 11 shows example frequency comb 1100, according to example embodiments of this disclosure. As shown the frequency comb may include carrier frequencies 1102, 1104, 1106, 1108, 1110, 1112, 1114, 1116. Three carrier frequencies 1106 (o>x), 1108 (, 1110 (u>0) may be used for storing the vectors X, (Sin 13•••

[0107]

[0108] ), and (S12, S14, •••Sl n-1, S0, Y ) in the quantum optical memory 200. Two carrier frequencies 1112 (wlz) and 1114 (u>01) may be used for storing the matrices W1X, and W / Q-L = (W21, W32, WOn) in the quantum optical memories 300, 400. Three other carrier frequencies 1102

[0109]

[0110] + MX— u>lz), 1104 (u>0

[0111]

[0112] + — a>oi), 1116 (u)Oi+ < o—< >i)may be used for pumping the DFG. The two other pumping pulses

[0113]

[0114] at + a>x— and u>01+ u)1— u>0may be identical to u)0and a>lx, so that the whole optical computing system 100 requires eight carrier frequencies as shown in FIG. 11.

[0115]

[0041] FIG. 12 shows an example optical circuit 1200 configured to generate the frequency comb 1100, according to example embodiments of this disclosure. In some embodiments, the optical circuit 1200 may be formed using an OPO 1202 implementing a quadrature amplitude modulation (QAM). Using a pump wave 1204 of 1 W cw laser, ~0.5 W signal 1206 with desired spectral and temporal behavior can be generated. The signal 1206 may be divided into individual frequency components 1208 using a wavelength division multiplexing (WDM) filter 1210. The output power of each frequency component 1208 may be in the order of -60 mW.This power may be sufficient to cover the required power budget at each frequency component, except for the two earner frequencies 1112 ( n>lx) and 1114 (u>01). The optical power of -60 mW at (i)lxmay have to be amplified to an output power of -200 mW before branching into the 100 DOPAs in the quantum optical memory 300. The optical power of -60 mW at u>01may have to be amplified to an output power of > 12.5 W by a single first stage DOPA, branching circuit and 125 second stage DOPAs before branching into the 1.25 xio4DOPAs in the quantum optical memory 400. The pump power to these DOPAs are -400 mW and -50.4 W, respectively. That is, 50.8 W pump power may have to be consumed in the optical circuit 1200, which may cover all necessary optical powers consumed in the entire system for generating the frequency comb 1100.

[0116]

[0042] FIG. 13 is a flow diagram of an example method 1300 of training an artificial neural network, according to example embodiments of this disclosure. The method 1300 may be implemented by any of the processing circuits and memories described throughout this disclosure. The steps described herein are merely examples and methods with additional, alternative, or fewer number of steps should be considered within the scope of this disclosure.

[0117]

[0043] At step 1310, a quantum optical memoty of an optical computing system (e.g., optical computing system 100) may store a current training state of an artificial neural network being trained. The quantum optical memory' may include multiple memory cavities, as described throughout this disclosure.

[0118]

[0044] At step 1320, a quantum optical processing circuit of the optical computing system may compute a feedback to advance the artificial neural network to a next training state. The quantum optical processing circuit may include multiple one-bit delay cavities and a combination of SFG and DFG, as described throughout this disclosure.

[0119]

[0045] The power consumed by the entire computing system, including all of the quantum optical memories and quantum optical processing circuits may be summarized in Table 5. In other words, Table 5 summarizes the number of active devices, including EOM switches in TFLN layer and the number of high-silica multi-core fiber ring cavities.

[0120] Table 5. Number of active devices in TFLN layer and that of passive devices in high-silica fibers.

[0121] Acth c devices in TFLN # of components Power budget QAM-OPO frequency comb 1 ' W High power DOPAs in comb 127 50.8 W Small power DOPA in memory 1.25 * 104included in above DOPA, SFG, DFG in processor 68 included in above EOM switches in processor 21 0.2 WPassive devices in high-silica multi-core fibers # of components

[0122]

[0123] 13 ps ring cavity in memory 126 0

[0124]

[0046] Benchmarking the optical computing system (using TFLN and high-silica fiber) against a GPU based system, it can be shown that the optical computing system shows a significant improvement. For example, Table 6 summarizes the performance of TFLN-implementation of cEP. The TFLN based implementation of cEP saves a computation energy and time by many orders of magnitude as shown below.

[0125] Table 6. Performance of TFLN implementation of cEP.

[0126]

[0127] TFLN

[0128] Clock frequency 100 GHz

[0129] Number of active devices 1.27 x io4

[0130] Total power 52 [W]

[0131] Power in processor 3%

[0132] Power in memory 97%

[0133] Time per update 0.13 (s)

[0134] Energy per update 6.8 [J]

[0135] Total operations per update 2.54 xlO18[Ops]

[0136] Time efficiency 2.0 x 1019[Ops / s]

[0137] Energy efficiency 3.8 x 1017[Ops / s / W]

[0138]

[0047] Additionally, the optical computing system may perform significantly better in terms of a computing time than an GPU based system. For example, performance of Al accelerators and processors is often evaluated by Ops / s or Ops / s / W (Operations per second per W). In order to compute this metric for the cEP on TFLN integrated circuit, number of operations needed to update Eqs. (l)-(5) may be counted. The results are shown in Table 7.

[0139] Table 7, Number operations for updating Eqs. (l)-(5).

[0140] Eq. (1) 1012ops

[0141] Eq. (2) 1014ops

[0142] Eq. (3) 2 x 1016ops

[0143] Eq. (4) 2.5 x 1018ops

[0144] Eq. (5) 2 x 1016ops

[0145] Total Operations per update 2.54-1018ops

[0146]

[0048] In the case of TFLN implementation, the time and energy cost for updating Eqs. (1)-(5) are 0.13 (s) and 52 (W), so that the time efficiency and energy efficiency of cEP-TFLN may beIO18(ops)

[0147] T’CEP-TFLN = 2.54 x = 2.0 x 1019(Ops / s).

[0148] 0.13 (s)

[0149] 1 1

[0150] CEP-TFLN = 2.54 x 1018(ops) x x = 3.8 x 1017[Ops / sec / W].

[0151] U. ID (□ j Du I VV J

[0152] These numbers are compared to 1015~ 1016[Ops / s] and 1012~1013[Ops / s / W] in the state of the art GPU-based Al accelerators.

[0153]

[0049] The TFLN-based quantum optical computing system has approximately four orders of magnitude higher time efficiency and five orders of magnitude higher energy efficiency compared to the current Al accelerators on digital platform.

[0154]

[0050] Additionally, the optical computing system may provide fundamental improvement compared to traditional digital computers. In order to find a right solution out of 2Ncandidates in optimization problems, 2N— 1 wrong (non-solution) states may have to be deleted. Deletion of a state may accompany an energy dissipation. In the case of CMOS based electronic computer, a gate voltage must be much greater than thermal fluctuation voltage, VT= kBT / q = 24 (mf) at T = 300 K, in order to preserve a good S / N ratio. If S / N > 30 dB is required, the gate voltage may be ~1 ( / ), as shown below

[0155] H

[0156]

[0157] w i) ~1600 (> 30‘iB)'

[0158]

[0051] In order to eliminate this gate voltage through dissipation in a resistive element, the dissipated energy per bit may be approximately:

[0159] |cT2= 10“12[ / ]

[0160]

[0161] if C = 2 (pF) is assumed as atypical input capacitance of CMOS circuits that includes a circuit for shuttling bits of information among memories and between memory and processor.

[0162]

[0052] In the case of TFLN based optical computer, a coherent amplitude < X> of an optical pulse may be much larger than vacuum fluctuation, (AA'ty’72= 1 / 4, in order to preserve a good S / N ratio. If S / N > 30 dB is desired, the average photon number per pulse may be -500, therefore:

[0163] S 500

[0164]

[0165] « = a71)= 2000 (> 30 dB)'

[0166]

[0053] In order to eliminate this coherent amplitude through dissipation into vacuum reservoirs, the dissipated energy per pulse is approximately

[0167] ha> x 500 = 6.625 x 10"34( / ■ s) x 2 x 1014(1 / s) x 500 = 0.7 x 10“16[ / ].

[0054] The fundamental limit on the energy cost per bit in optical computers is four orders of magnitude smaller than that in electronic computers.

[0168]

[0055] Additional examples of the presently described method and device embodiments are suggested according to the structures and techniques described herein. Other non-limiting examples may be configured to operate separately or can be combined in any permutation or combination with any one or more of the other examples provided above or throughout the present disclosure.

[0169]

[0056] It will be appreciated by those skilled in the art that the present disclosure can be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The presently disclosed embodiments are therefore considered in all respects to be illustrative and not restricted. The scope of the disclosure is indicated by the appended claims rather than the foregoing description and all changes that come within the meaning and range and equivalence thereof are intended to be embraced therein.

[0170]

[0057] It should be noted that the terms “including” and “comprising” should be interpreted as meaning “including, but not limited to”. If not already set forth explicitly in the claims, the term “a” should be interpreted as “at least one” and “the”, “said”, etc. should be interpreted as “the at least one”, “said at least one”, etc. Furthermore, it is the Applicant's intent that only claims that include the express language "means for" or "step for" be interpreted under 35 U. S. C. 112(f). Claims that do not expressly include the phrase "means for" or "step for" are not to be interpreted under 35 U. S. C. 112(f).

Claims

CLAIMSWhat is claimed is:

1. An optical computing system configured to train an artificial neural network:a quantum optical memory' configured to store a current training state of the artificial neural network; anda quantum optical processing circuit configured to compute a feedback to advance the artificial neural network to a next training state.

2. The optical computing system of claim 1, wherein the optical computing system is configured to train the artificial neural network using continual equilibrium propagation.

3. The optical computing system of claim 1, wherein the quantum optical memory comprises a plurality of optical memory cavities.

4. The optical computing system of claim 3, wherein at least one of the plurality of optical memory' cavities is formed using a degenerate optical parametric oscillator.

5. The optical computing system of claim 1, wherein the quantum optical processing circuit comprises sum frequency generator.

6. The optical computing system of claim 1, wherein the quantum optical processing circuit comprises a difference frequency generator.

7. The optical computing system of claim 1, wherein the quantum optical processing circuit comprises a one-bit delay cavity.

8. The optical computing system of claim 1, wherein the quantum optical processing circuit comprises an EOM switch.

9. The optical computing system of claim 1 further comprising a frequency comb generator.

10. The optical computing system of claim 1, wherein at least one of the quantum optical memory or the quantum optical processing circuit is implemented on a thin film lithium niobate.

11. A method comprising:storing, by a quantum optical memory of an optical computing system, a current training state of an artificial neural network being trained; andcomputing, by a quantum optical processing circuit of the optical computing system, a feedback to advance the artificial neural network to a next training state.

12. The method of claim 11, further comprising:training, by the optical computing system, the artificial neural network using continual equilibrium propagation.

13. The method of claim 11, wherein the quantum optical memory comprises a plurality of optical memory cavities.

14. The method of claim 13, wherein at least one of the plurality of optical memory cavities is formed using a degenerate optical parametric oscillator.

15. The method of claim 11, wherein the quantum optical processing circuit comprises sum frequency generator.

16. The method of claim 11. wherein the quantum optical processing circuit comprises a difference frequency generator.

17. The method of claim 11, wherein the quantum optical processing circuit comprises a one-bit delay cavity.

18. The method of claim 11, wherein the quantum optical processing circuit comprises an EOM switch.

19. The method of claim 11, wherein the optical computing system further comprises a frequency comb generator.

20. The method of claim 11, wherein at least one of the quantum optical memory or the quantum optical processing circuit is implemented on a thin fdm lithium niobate.

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