Semiconductor device

Abstract

Provided is a novel semiconductor device. In the present invention, a first terminal of a first transistor is electrically connected to a gate of a second transistor and a first terminal of a first capacitive element. A first terminal of the second transistor is electrically connected to a first terminal of a third transistor, a gate of a fourth transistor, and a first terminal of a second capacitive element. A first terminal of the fourth transistor is electrically connected to a first terminal of a light-emitting element. The channel length of the second transistor is greater than the channel length of the fourth transistor.

Description

Semiconductor equipment

[0001] One aspect of the present invention relates to a semiconductor device.

[0002] One aspect of the present invention is not limited to the above-mentioned technical field. Examples of technical fields of one aspect of the present invention include semiconductor devices, display devices, light-emitting devices, projection devices, illumination devices, optical devices, electro-optical devices, imaging devices, light-receiving devices, detection devices, power supply devices, energy storage devices, communication devices, computing devices, control devices, computing processing devices, memory devices, input devices, output devices, input / output devices, signal processing devices, information processing devices, computers, electronic devices, systems having the same, methods for driving them, or methods for manufacturing them.

[0003] Display devices are used in a variety of applications. Large-scale display devices are used in home television systems and PID (Public Information Display) for digital signage. Small-scale display devices are used in mobile information terminals such as smartphones and tablets, and wearable devices such as VR (Virtual Reality) devices and AR (Augmented Reality) devices. Furthermore, display devices are being enhanced and given higher value by adding functions other than display. For example, display devices with touch panel functionality and display devices with in-screen fingerprint authentication functionality have been developed.

[0004] Furthermore, light-emitting elements such as light-emitting diodes are used as pixels in display devices, and various pixel circuits (circuits that control the light emission intensity of light-emitting elements) have been proposed to improve the performance of display devices. For example, Patent Documents 1 and 2 disclose pixel circuits that can be driven by pulse width modulation (PWM) control.

[0005] U.S. Patent Application Publication No. 2020 / 0394953, U.S. Patent Application Publication No. 2021 / 0210003

[0006] One aspect of the present invention aims to provide a semiconductor device that can increase the resolution of a display device. Alternatively, one aspect of the present invention aims to provide a semiconductor device that can reduce the power consumption of a display device. Alternatively, one aspect of the present invention aims to provide a semiconductor device that can increase the operating speed of a display device. Alternatively, one aspect of the present invention aims to provide a semiconductor device that can reduce the manufacturing cost of a display device. Alternatively, one aspect of the present invention aims to provide a semiconductor device that can shorten the manufacturing period of a display device. Alternatively, one aspect of the present invention aims to provide a semiconductor device that can increase the screen size of a display device. Alternatively, one aspect of the present invention aims to provide a semiconductor device that can increase the reliability of a display device. Alternatively, one aspect of the present invention aims to provide a semiconductor device that can improve the display quality of a display device. Alternatively, one aspect of the present invention aims to provide a semiconductor device that can improve the performance of a display device. Alternatively, one aspect of the present invention aims to provide a display device to which the above semiconductor device is applied. Alternatively, one aspect of the present invention aims to provide a method for driving the above semiconductor device. Alternatively, one aspect of the present invention aims to provide a method for driving the above display device. Alternatively, one aspect of the present invention aims to provide a novel semiconductor device. Alternatively, one aspect of the present invention aims to provide a novel display device.

[0007] Furthermore, the above-mentioned problems do not preclude the existence of other problems. Those skilled in the art can naturally derive other problems from the description in this specification, drawings, claims, etc., and it is possible to extract other problems from the description in this specification, drawings, claims, etc. Furthermore, one aspect of the present invention does not need to solve all of these problems (the above-mentioned problems and other problems).

[0008] (1) One aspect of the present invention is a semiconductor device comprising a first transistor, a second transistor, a third transistor, a fourth transistor, a first capacitance element, a second capacitance element, and a light-emitting element, wherein the first terminal of the first transistor is electrically connected to the gate of the second transistor and the first terminal of the first capacitance element, the first terminal of the second transistor is electrically connected to the first terminal of the third transistor, the gate of the fourth transistor and the first terminal of the second capacitance element, the first terminal of the fourth transistor is electrically connected to the first terminal of the light-emitting element, and the channel length of the second transistor is greater than the channel length of the fourth transistor.

[0009] (2) In addition, in (1) above, the area of ​​the region in which the conductive layer functioning as the first terminal of the second capacitance element and the conductive layer functioning as the second terminal of the second capacitance element overlap each other may be larger than the area of ​​the region in which the conductive layer functioning as the first terminal of the first capacitance element and the conductive layer functioning as the second terminal of the first capacitance element overlap each other.

[0010] (3) In addition, in (1) or (2) above, an image signal may be applied to the second terminal of the first transistor, a first potential may be applied to the second terminal of the second transistor, a second potential may be applied to the second terminal of the third transistor, a third potential may be applied to the second terminal of the fourth transistor, a fourth potential may be applied to the second terminal of the light-emitting element, one of the first to fourth potentials may be applied to the second terminal of the first capacitive element, one of the first to fourth potentials may be applied to the second terminal of the second capacitive element, and the first potential may be less than the potential of the image signal, the third potential may be greater than the potential of the image signal, the fourth potential may be greater than the third potential, and the second potential may be greater than the fourth potential.

[0011] (4) In any one of (1) to (3) above, each of the first to fourth transistors may be an n-channel transistor, the light-emitting element may be a light-emitting diode, and the first terminal of the light-emitting element may be the cathode of the light-emitting diode.

[0012] (5) In addition, in any one of (1) to (4) above, a fifth transistor may be provided, wherein the fifth transistor is provided in a current path including the fourth transistor, and the fifth transistor has the function of being in an off state when the third transistor is in an on state.

[0013] (6) In addition, in any one of (1) to (5) above, a sixth transistor may be provided, wherein the sixth transistor is provided in a current path including the second transistor, and the sixth transistor has the function of being in an off state when the third transistor is in an on state.

[0014] (7) In addition, in any one of (1) to (6) above, a seventh transistor may be provided, wherein the first terminal of the seventh transistor is electrically connected to the gate of the fourth transistor, the second terminal of the seventh transistor is provided with the same potential as the potential provided to the second terminal of the second transistor, and the seventh transistor has the function of being on when the fourth transistor is off.

[0015] (8) In addition, in any one of (1) to (7) above, there may be an eighth transistor, the first terminal of the eighth transistor being electrically connected to the gate of the second transistor, the second terminal of the eighth transistor being supplied with the same potential as the potential supplied to the second terminal of the third transistor, and the eighth transistor having the function of being on when the fourth transistor is off.

[0016] (9) In addition, in any one of (1) to (8) above, a ninth transistor may be provided, wherein the first terminal of the ninth transistor is electrically connected to the second terminal of the fourth transistor, the second terminal of the ninth transistor is provided with a potential smaller than the potential provided to the second terminal of the fourth transistor, and the ninth transistor has the function of being turned on when the third transistor is turned on.

[0017] (10) Further, in any one of (1) to (9) above, it has a tenth transistor, the first terminal of the tenth transistor is electrically connected to the first terminal of the light-emitting element, and the same potential as the potential applied to the second terminal of the light-emitting element is applied to the second terminal of the tenth transistor. The tenth transistor may have a function of turning on when the fourth transistor is in an off state.

[0018] (11) Further, in any one of (1) to (10) above, each of the first transistor to the fourth transistor may include an oxide semiconductor in the channel formation region.

[0019] (12) One aspect of the present invention is a semiconductor device having a function of controlling the time for outputting a current, which includes a first transistor, a second transistor, a third transistor, a fourth transistor, a first capacitor element, and a second capacitor element. The first terminal of the first transistor is electrically connected to the gate of the second transistor and the first terminal of the first capacitor element. The first terminal of the second transistor is electrically connected to the first terminal of the third transistor, the gate of the fourth transistor, and the first terminal of the second capacitor element. The fourth transistor has a function of controlling whether to output a current. The channel length of the second transistor is greater than the channel length of the fourth transistor.

[0020] (13) Further, in (12) above, the area of the region where the conductive layer functioning as the first terminal of the second capacitor element and the conductive layer functioning as the second terminal of the second capacitor element overlap each other may be larger than the area of the region where the conductive layer functioning as the first terminal of the first capacitor element and the conductive layer functioning as the second terminal of the first capacitor element overlap each other.

[0021] (14) Further, in the above (12) or (13), the first terminal of the fourth transistor is the terminal from which current is output, an image signal is applied to the second terminal of the first transistor, a first potential is applied to the second terminal of the second transistor, a second potential is applied to the second terminal of the third transistor, a third potential is applied to the second terminal of the fourth transistor, any one of the first to third potentials is applied to the second terminal of the first capacitive element, any one of the first to third potentials is applied to the second terminal of the second capacitive element, the first potential is smaller than the potential of the image signal, the third potential is larger than the potential of the image signal, and the second potential may be larger than the third potential.

[0022] (15) Further, in any one of the above (12) to (14), a fifth transistor is provided, the fifth transistor is provided in the current path including the fourth transistor, and the fifth transistor may have a function of turning off when the third transistor is in an on state.

[0023] (16) Further, in any one of the above (12) to (15), a sixth transistor is provided, the sixth transistor is provided in the current path including the second transistor, and the sixth transistor may have a function of turning off when the third transistor is in an on state.

[0024] (17) Further, in any one of the above (12) to (16), a seventh transistor is provided, the first terminal of the seventh transistor is electrically connected to the gate of the fourth transistor, the same potential as that applied to the second terminal of the second transistor is applied to the second terminal of the seventh transistor, and the seventh transistor may have a function of turning on when the fourth transistor is in an off state.

[0025] (18) Further, in any one of the above (12) to (17), an eighth transistor is provided, the first terminal of the eighth transistor is electrically connected to the gate of the second transistor, the same potential as that applied to the second terminal of the third transistor is applied to the second terminal of the eighth transistor, and the eighth transistor may have a function of turning on when the fourth transistor is in an off state.

[0026] (19) In addition, in any one of (12) to (18) above, a ninth transistor may be present, wherein the first terminal of the fourth transistor is a terminal to which current is output, the first terminal of the ninth transistor is electrically connected to the second terminal of the fourth transistor, the second terminal of the ninth transistor is provided with a potential smaller than the potential provided to the second terminal of the fourth transistor, and the ninth transistor may have the function of being turned on when the third transistor is turned on.

[0027] (20) In addition, in any one of (12) to (19) above, each of the first to fourth transistors may include an oxide semiconductor in the channel formation region.

[0028] According to one aspect of the present invention, a semiconductor device capable of increasing the resolution of a display device can be provided. Alternatively, according to one aspect of the present invention, a semiconductor device capable of reducing the power consumption of a display device can be provided. Alternatively, according to one aspect of the present invention, a semiconductor device capable of increasing the operating speed of a display device can be provided. Alternatively, according to one aspect of the present invention, a semiconductor device capable of lowering the manufacturing cost of a display device can be provided. Alternatively, according to one aspect of the present invention, a semiconductor device capable of shortening the manufacturing period of a display device can be provided. Alternatively, according to one aspect of the present invention, a semiconductor device capable of increasing the screen size of a display device can be provided. Alternatively, according to one aspect of the present invention, a semiconductor device capable of increasing the reliability of a display device can be provided. Alternatively, according to one aspect of the present invention, a semiconductor device capable of increasing the display quality of a display device can be provided. Alternatively, according to one aspect of the present invention, a semiconductor device capable of increasing the performance of a display device can be provided. Alternatively, according to one aspect of the present invention, a display device to which the above-mentioned semiconductor device is applied can be provided. Alternatively, according to one aspect of the present invention, a method for driving the above-mentioned semiconductor device can be provided. Alternatively, according to one aspect of the present invention, a method for driving the above-mentioned display device can be provided. Alternatively, according to one aspect of the present invention, a novel semiconductor device can be provided. Alternatively, according to one aspect of the present invention, a novel display device can be provided.

[0029] Furthermore, the effects described above do not preclude the existence of other effects. Those skilled in the art can naturally derive other effects from the descriptions in this specification, drawings, and claims, and it is possible to extract other effects from the descriptions in this specification, drawings, and claims. Moreover, one aspect of the present invention does not need to have all of these effects (the effects described above and other effects).

[0030] Figure 1 is a circuit diagram illustrating an example configuration of a semiconductor device. Figure 2 is a timing chart illustrating an example operation of a semiconductor device. Figure 3 is a circuit diagram illustrating an example operation of a semiconductor device. Figure 4 is a circuit diagram illustrating an example operation of a semiconductor device. Figure 5 is a circuit diagram illustrating an example operation of a semiconductor device. Figure 6 is a circuit diagram illustrating an example operation of a semiconductor device. Figure 7 is a circuit diagram illustrating an example operation of a semiconductor device. Figure 8 is a circuit diagram illustrating an example operation of a semiconductor device. Figure 9 is a circuit diagram illustrating an example configuration of a semiconductor device. Figure 10 is a circuit diagram illustrating an example configuration of a semiconductor device. Figure 11 is a circuit diagram illustrating an example configuration of a semiconductor device. Figure 12 is a circuit diagram illustrating an example configuration of a semiconductor device. Figure 13 is a circuit diagram illustrating an example configuration of a semiconductor device. Figure 14 is a circuit diagram illustrating an example configuration of a semiconductor device. Figure 15 is a circuit diagram illustrating an example configuration of a semiconductor device. Figure 16 is a circuit diagram illustrating an example configuration of a semiconductor device. Figure 17 is a circuit diagram illustrating an example configuration of a semiconductor device. Figure 18 is a circuit diagram illustrating an example configuration of a semiconductor device. Figure 19 is a circuit diagram illustrating an example configuration of a semiconductor device. Figure 20 is a circuit diagram illustrating an example configuration of a semiconductor device. Figure 21 is a circuit diagram illustrating an example configuration of a semiconductor device. Figure 22 is a circuit diagram illustrating an example configuration of a semiconductor device. Figure 23 is a circuit diagram illustrating an example configuration of a semiconductor device. Figure 24 is a circuit diagram illustrating an example configuration of a semiconductor device. Figures 25A and 25B are circuit diagrams illustrating an example configuration of a semiconductor device. Figures 26A and 26B are circuit diagrams illustrating an example configuration of a semiconductor device. Figures 27A and 27B are circuit diagrams illustrating an example configuration of a semiconductor device. Figure 28 is a circuit diagram illustrating an example configuration of a semiconductor device. Figures 29A and 29B are block diagrams illustrating an example configuration of a display device. Figure 30A is a top view illustrating an example configuration of a transistor. Figures 30B and 30C are cross-sectional views illustrating an example configuration of a transistor. Figure 31A is a top view illustrating an example configuration of a transistor. Figures 31B and 31C are cross-sectional views illustrating an example configuration of a transistor. Figure 32 is a top view illustrating an example configuration of a semiconductor device. Figures 33A, 33B, and 33C are cross-sectional views illustrating an example configuration of a semiconductor device.Figure 34 is a top view illustrating an example of the configuration of a semiconductor device. Figure 35A is a perspective view illustrating an example of the configuration of a display device. Figures 35B, 35C, 35D, 35E, and 35F are top views illustrating an example of a pixel arrangement. Figure 36 is a cross-sectional view illustrating an example of the configuration of a display device. Figures 37A, 37B, 37C, 37D, 37E, 37F, 37G, and 37H are diagrams illustrating an example of an electronic device. Figures 38A1, 38A2, 38A3, 38A4, 38A5, 38A6, 38A7, and 38B1, 38B2, 38B3, 38B4, 38B5, and 38B6 are diagrams illustrating electrical connections.

[0031] Embodiments of the present invention will now be described. However, it will be readily apparent to those skilled in the art that the embodiments and their details can be modified in various ways without departing from the spirit and scope of the present invention. Therefore, the present invention is not to be construed as being limited to the contents of the following embodiments.

[0032] Furthermore, the contents of the embodiments can be appropriately combined to form one aspect of the present invention.

[0033] In this specification, the components of the present invention may be classified by function and shown as independent elements. However, it may be difficult to separate the components by function, and a single element may be involved in multiple functions, or a single function may be involved across multiple elements. Therefore, the explanation is not limited to this and may be appropriately rephrased.

[0034] Furthermore, when using the same symbol for multiple elements and explaining them in a way that distinguishes them, identification symbols such as "A", "b", "_1", "[n]", and "[m,n]" may be added. Also, when explaining something common to multiple elements with identification symbols, or when explaining them without distinguishing them, identification symbols may be omitted.

[0035] Furthermore, in drawings, the same reference numeral may be used for identical elements, elements with similar functions, elements of the same material, or elements formed simultaneously, thereby omitting the explanation of repetition. Additionally, the same hatching pattern may omit the use of a reference numeral.

[0036] Furthermore, the drawings are schematic representations intended to aid in understanding the present invention. Therefore, they are not limited to their size, aspect ratio, shape, etc. Also, some elements may be omitted.

[0037] (Embodiment 1) A semiconductor device according to one aspect of the present invention will be described with reference to the drawings. At least a part of the semiconductor device according to one aspect of the present invention can be used, for example, in a display device. In particular, it can be used in the pixels of a display device.

[0038] Furthermore, by using a semiconductor device according to one aspect of the present invention as a pixel, a pixel that can be driven by pulse width modulation (PWM) control can be realized. By driving the pixel with PWM control, for example, when using a micro-LED (Light Emitting Diode) as the light-emitting element of the pixel, the emission wavelength of the light-emitting element can be stabilized, thereby improving display quality. In addition, since the light-emitting element can be made to emit light at a current density that is efficient, power consumption can be reduced. Furthermore, since the light-emitting element can emit light at a constant current density regardless of its emission intensity, reliability can be improved.

[0039] <Example of Semiconductor Device Configuration> Figure 1 is a circuit diagram illustrating a semiconductor device 100 according to one aspect of the present invention.

[0040] The semiconductor device 100 includes a pixel circuit 101 and a light-emitting element LD. The pixel circuit 101 includes transistors M11, M12, M13, M14, capacitive element C11, and capacitive element C12. The semiconductor device 100 can also be referred to as a pixel. Furthermore, the semiconductor device 100 is configured to be driven by PWM control.

[0041] One source or drain of transistor M11 is connected to the gate of transistor M12 and one terminal of capacitive element C11. One source or drain of transistor M12 is connected to one source or drain of transistor M13, the gate of transistor M14, and one terminal of capacitive element C12. One source or drain of transistor M14 is connected to one terminal of light-emitting element LD. The other source or drain of transistor M11 is connected to wiring SL. The gate of transistor M11 is connected to wiring GL11. The other source or drain of transistor M12 is connected to wiring VL12. The other source or drain of transistor M13 is connected to wiring VL11. The gate of transistor M13 is connected to wiring GL12. The other source or drain of transistor M14 is connected to wiring CATH. The other terminal of capacitive element C11 is connected to wiring VL12. The other terminal of the capacitive element C12 is connected to the wiring VL12. The other terminal of the light-emitting element LD is connected to the wiring ANO.

[0042] The other terminal of the capacitive element C11 may be connected to a different wire than the wiring VL12. Similarly, the other terminal of the capacitive element C12 may be connected to a different wire than the wiring VL12.

[0043] The wiring connected to the gate of transistor M12 may be referred to as node ND11. The wiring connected to the gate of transistor M14 may be referred to as node ND12. The wiring connected to one terminal of the light-emitting element LD may be referred to as node ND13. Note that nodes and wiring may be interpreted interchangeably.

[0044] A light-emitting element (LD) emits light with an intensity corresponding to the amount of current flowing through it. As the light-emitting element (LD), for example, an electroluminescent element (especially an injection-type electroluminescent element) such as a light-emitting diode (LED) can be used. As the LED, for example, an LED using an inorganic material as the light-emitting substance, or an LED using an organic material as the light-emitting substance (also called an organic EL (Electroluminescence) element or OLED (Organic LED)) can be used. As an LED using an inorganic material as the light-emitting substance, for example, a mini-LED or micro-LED can be used.

[0045] In this specification, a mini-LED refers to an LED with an emitting surface area of ​​10,000 μm². ２ Larger by 1 mm ２ The following refers to the following. Furthermore, a micro-LED is defined as having an emitting surface area of ​​10,000 μm². ２ This refers to the following:

[0046] In this case, the emission wavelength of an LED changes depending on the current density, which can cause a change in chromaticity. In particular, LEDs using inorganic materials as the light-emitting material are prone to changes in emission wavelength depending on the current density, and thus prone to changes in chromaticity. For this reason, it is preferable to drive the LED in a pixel using PWM control, which allows for emission at a constant current density regardless of the emission intensity. When using an LED as a light-emitting element LD, especially when using an LED using inorganic materials as the light-emitting material, applying a semiconductor device 100 that can be driven by PWM control can suppress changes in emission wavelength and thereby suppress changes in chromaticity. This can improve color reproducibility and enhance display quality.

[0047] Transistor M11 functions as a switch whose conduction or non-conductivity between wiring SL and node ND11 is controlled by the potential applied to wiring GL11. Here, transistor M11 has the function of controlling the writing and holding of the image signal.

[0048] Transistor M12 has the function of controlling the amount of current supplied to node ND12. A gate voltage corresponding to the image signal is applied to transistor M12, and a drain current based on this gate voltage flows. Therefore, transistor M12 has the function of supplying a constant current corresponding to the image signal to node ND12. It can also be said that transistor M12 functions as a constant current source controlled by the image signal. Note that transistor M12 is sometimes referred to as a driving transistor.

[0049] Transistor M13 functions as a switch whose conduction or non-conductivity between wiring VL11 and node ND12 is controlled by the potential applied to wiring GL12. Here, transistor M13 has the function of controlling the initialization of the potential of node ND12.

[0050] Transistor M14 functions as a switch, controlling the conduction or non-conductivity between node ND13 and wiring CATH based on the potential of node ND12. Here, transistor M14 has the function of controlling whether or not to interrupt the supply of current to the light-emitting element LD. It can also be said that transistor M14 has the function of controlling the emission or non-emission of the light-emitting element LD. Transistor M14 is sometimes referred to as a light emission control transistor.

[0051] The capacitive element C11 has the function of maintaining the potential applied to the gate of transistor M12. In this case, the capacitive element C11 has the function of maintaining a potential corresponding to the image signal.

[0052] The capacitive element C12 has the function of maintaining the potential applied to the gate of transistor M14.

[0053] Wiring SL functions as a signal line. This wiring has the function of transmitting an image signal output from a circuit provided outside the semiconductor device 100 (e.g., a drive circuit such as a source driver) to the semiconductor device 100. Wirings GL11 and GL12 each function as a signal line. This wiring has the function of transmitting a selection signal output from a circuit provided outside the semiconductor device 100 (e.g., a drive circuit such as a gate driver) to the semiconductor device 100. Wirings ANO, CATH, VL11, and VL12 each function as a power line. This wiring has the function of transmitting a power potential output from a circuit provided outside the semiconductor device 100 (e.g., a power supply circuit) to the semiconductor device 100. Note that at least one of wirings ANO, CATH, VL11, and VL12 may also function as a signal line.

[0054] In the semiconductor device 100, one terminal of the light-emitting element LD functions as the cathode of the light-emitting diode, and the other terminal of the light-emitting element LD functions as the anode of the light-emitting diode. Although not shown in the figures, one terminal of the light-emitting element LD may also function as the anode of the light-emitting diode, and the other terminal of the light-emitting element LD may also function as the cathode of the light-emitting diode.

[0055] An n-channel transistor can be used as the transistor constituting the semiconductor device 100.

[0056] Furthermore, a p-channel transistor may be used as at least one of the transistors constituting the semiconductor device 100. In that case, the descriptions relating to the positive and negative relationship of voltage, the magnitude relationship of electric potential, and the positive and negative relationship of current (also known as the direction of current flow) in the explanation of the semiconductor device 100 may be appropriately reinterpreted. For example, "high electric potential" and "low electric potential" may be appropriately reinterpreted as mutual. Also, for example, "raise the electric potential" and "lower the electric potential" may be appropriately reinterpreted as mutual.

[0057] The semiconductor device 100 is a pixel that can be driven by PWM control and can be constructed using transistors of the same conductivity type (either only n-channel transistors or only p-channel transistors). Therefore, compared to a configuration using both n-channel and p-channel transistors (such as a CMOS circuit), at least one of the following can be achieved: reduced manufacturing costs and shortened manufacturing time.

[0058] Here, in transistor M12, the potential difference between the gate (corresponding to node ND11) and the other source or drain (corresponding to wiring VL12) is sometimes referred to as the gate voltage of transistor M12. In transistor M12, the potential difference between the source or drain (corresponding to node ND12) and the other source or drain (corresponding to node ND12) is sometimes referred to as the drain voltage of transistor M12. In transistor M14, the potential difference between the gate (corresponding to node ND12) and the other source or drain (corresponding to wiring CATH) is sometimes referred to as the gate voltage of transistor M14. In transistor M14, the potential difference between the source or drain (corresponding to node ND13) and the other source or drain (corresponding to node ND13) is sometimes referred to as the drain voltage of transistor M14. In light-emitting element LD, the potential difference between one terminal (corresponding to node ND13) and the other terminal (corresponding to wiring ANO) is sometimes referred to as the forward voltage of the light-emitting element LD.

[0059] In one aspect of the present invention, during the operation of the semiconductor device 100, a potential is provided to the wiring VL11 that can turn on transistor M14, and a potential is provided to the wiring VL12 that can turn off transistor M14. As a result, the potential of wiring VL11 is supplied to node ND12 via transistor M13, causing the gate voltage of transistor M14 to become greater than the threshold voltage of transistor M14, and transistor M14 turns on. Then the light-emitting element LD starts to emit light. Subsequently, current flows from node ND12 to wiring VL12 via transistor M12, causing the potential of node ND12 to gradually change toward the potential of wiring VL12. When the gate voltage of transistor M14 becomes less than the threshold voltage of transistor M14, transistor M14 turns off. Then the light-emitting element LD stops emitting light.

[0060] Here, the speed at which the potential of node ND12 changes toward the potential of wiring VL12 depends on the drain current of transistor M12. Therefore, it can be said that the time that transistor M14 is ON (corresponding to the time that the light-emitting element LD is in the light-emitting state) also depends on the drain current of transistor M12. In this case, the drain current of transistor M12 is controlled by an image signal that is applied from wiring SL to the gate of transistor M12 via transistor M11. Thus, the time that transistor M14 is ON can be controlled by the image signal.

[0061] Therefore, by using the semiconductor device 100 as a pixel in the display device, the light emission period of the light-emitting element LD during one frame can be controlled by the image signal. This makes it possible to realize a pixel that can be driven by PWM control. Thus, the display quality of the display device can be improved.

[0062] Furthermore, by using the semiconductor device 100 as a pixel in the display device, it becomes possible to realize a pixel that can be driven by PWM control without supplying triangular waves or sawtooth waves from outside the semiconductor device 100. This makes it possible to simplify the configuration of the drive circuit that drives the pixel. Therefore, it is possible to reduce the bezel width of the display device and reduce power consumption, or at least one of the above.

[0063] Furthermore, in one aspect of the present invention, the transistor M14 can be operated in the linear region when the light-emitting element LD is in the light-emitting state during the operation of the semiconductor device 100. This simplifies the configuration of the pixel circuit compared to the case where the transistor M14 is operated in the saturation region. For example, when the transistor M14 is operated in the saturation region, the amount of current supplied to the light-emitting element LD depends on the gate voltage of the transistor M14. Therefore, the pixel circuit used when operating in the saturation region may have a circuit for applying a stable gate voltage to the transistor M14. On the other hand, when the transistor M14 is operated in the linear region, the amount of current supplied to the light-emitting element LD depends on the forward voltage of the light-emitting element LD (here, this corresponds to the potential difference between wiring ANO and wiring CATH). Therefore, the pixel circuit used when operating in the linear region may not need to have a circuit for applying a stable gate voltage to the transistor M14. Thus, by configuring the transistor M14 to operate in the linear region, the number of elements such as transistors and capacitive elements can be reduced compared to the configuration in which the transistor M14 is operated in the saturation region. Therefore, by using the semiconductor device 100 as a pixel in the display device, the resolution of the display device can be improved.

[0064] Furthermore, by operating transistor M14 in the linear region, the drain voltage of transistor M14 is reduced, thereby improving reliability. Also, because the drain voltage of transistor M14 is reduced, the forward voltage of the light-emitting element LD increases, thereby increasing the light-emitting intensity of the light-emitting element LD. Therefore, by using the semiconductor device 100 as a pixel in a display device, at least one of the reliability of the display device and the light-emitting brightness can be improved.

[0065] In the semiconductor device 100, transistor M12 functions as a constant current source. Therefore, the semiconductor device 100 can operate transistor M12 in the saturation region when the light-emitting element LD is in the light-emitting state. For this reason, it is preferable that transistor M12 has high saturation (the change in drain current with respect to drain voltage is small in the transistor's saturation region). To increase the saturation of transistor M12, it is preferable to increase the channel length of transistor M12. By increasing the saturation of transistor M12, a stable drain current can be supplied, and the time during which transistor M14 is in the ON state (corresponding to the time during which the light-emitting element LD is in the light-emitting state) can be stabilized. Therefore, when the semiconductor device 100 is used as a pixel in a display device, the luminescence brightness of the display device can be stabilized, and the display quality can be improved.

[0066] Furthermore, since transistor M14 is located in the current path from wiring ANO through the light-emitting element LD to wiring CATH (sometimes referred to as the current path including the light-emitting element LD), it is preferable that it has a large on-current (also known as a small on-resistance). To increase the on-current of transistor M14, for example, the channel length can be reduced, the channel width can be increased, and so on.

[0067] Furthermore, since transistors M11, M13, and M14 each function as switches, it is preferable that the gate capacitance be small when the semiconductor device 100 is used as a pixel in a display device, in order to improve the operating speed of the display device. In order to reduce the gate capacitance of each of transistors M11, M13, and M14, for example, the area of ​​the channel formation region (corresponding to channel length × channel width), the thickness of the gate insulating film, and the relative permittivity of the gate insulating film can be reduced. In addition, it is preferable that the area of ​​the channel formation region be small in order to improve the resolution of the display device.

[0068] Based on these technical ideas, for example, the channel length of transistor M12 may be made larger than the channel length of transistor M14. Alternatively, for example, the channel length of transistor M12 may be made larger than the channel lengths of transistors M11 and M13.

[0069] Furthermore, in the semiconductor device 100, the time during which the light-emitting element LD is in the light-emitting state depends more specifically on "the capacitance of the capacitive element C12 / the drain current of the transistor M12". Note that, for the sake of clarity, the effects of parasitic capacitance, parasitic resistance, etc., may be omitted in this explanation.

[0070] In this case, if the capacitance of the capacitive element C12 is small, the rate at which the potential of node ND12 changes toward the potential of wiring VL12 increases, and the time during which the light-emitting element LD is in the light-emitting state becomes shorter. Therefore, it may become difficult to increase the light-emitting intensity of the light-emitting element LD and to improve the gradation expression. For this reason, it is necessary to set the capacitance of the capacitive element C12 to an appropriate value.

[0071] For example, the capacitance of capacitive element C12 may be made larger than the capacitance of capacitive element C11. For example, when capacitive elements C11 and C12 are both MIM (Metal-Insulator-Metal) capacitances, the area of ​​the region where the conductive layer functioning as one terminal of capacitive element C12 and the conductive layer functioning as the other terminal of capacitive element C12 overlap each other may be made larger than the area of ​​the region where the conductive layer functioning as one terminal of capacitive element C11 and the conductive layer functioning as the other terminal of capacitive element C11 overlap each other. Also, the film thickness of the insulating layer functioning as the dielectric of capacitive element C12 may be made smaller than the film thickness of the insulating layer functioning as the dielectric of capacitive element C11. Furthermore, the relative permittivity of the insulating layer functioning as the dielectric of capacitive element C12 may be made larger than the relative permittivity of the insulating layer functioning as the dielectric of capacitive element C11.

[0072] In one aspect of the present invention, as a transistor constituting the semiconductor device 100, for example, a transistor containing a single-crystal semiconductor, a polycrystalline semiconductor, a microcrystalline semiconductor, or an amorphous semiconductor in the channel formation region can be used. Furthermore, the semiconductor is not limited to a single-element semiconductor whose main component is a single element (such as silicon or germanium), but can also be a compound semiconductor (such as silicon germanium or gallium arsenide), or an oxide semiconductor, for example.

[0073] Furthermore, various types of transistors can be used as the transistors constituting the semiconductor device 100. For example, MOS field-effect transistors, junction field-effect transistors, or bipolar transistors can be used.

[0074] Furthermore, transistors of various structures can be used as transistors constituting the semiconductor device 100. For example, various transistor structures can be used, such as top-gate type (planar type, staggered type, etc.), bottom-gate type (inverse planar type, inverse staggered type, etc.), dual-gate type (a structure in which gates are arranged on both sides (e.g., top and bottom) of the channel formation region), FIN type, TRI-GATE type, or GAA type (gate all-around type). In addition, for example, vertical transistors (transistors in which the channel length direction has a component in the vertical direction (also called the height direction or the direction perpendicular to the surface to which it is formed)) can be used.

[0075] Furthermore, as the transistor constituting the semiconductor device 100, a transistor containing silicon in the channel formation region (Si transistor) may be used, a transistor containing oxide semiconductor in the channel formation region (OS transistor) may be used, or both Si transistors and OS transistors may be used.

[0076] Here, an OS transistor can be used as the transistor constituting the semiconductor device 100. By using an OS transistor, for example, when the semiconductor device 100 is used as a pixel in a display device, at least one of the following significant effects can be obtained.

[0077] OS transistors are easy to fabricate, for example, on large substrates. Therefore, by using OS transistors for each of transistors M11 to M14, the screen size of the display device can be increased.

[0078] Furthermore, OS transistors have a low off-current. Therefore, for example, by using an OS transistor for transistor M11, the voltage corresponding to the image signal applied to the capacitive element C11 can be maintained for a long period of time. This allows, for example, the display device to operate at a low refresh rate. Thus, power consumption can be reduced.

[0079] Furthermore, for example, by using an OS transistor for transistor M11, the voltage corresponding to the image signal can be sufficiently maintained even if the capacitance of the capacitive element C11 is reduced. Therefore, the layout area of ​​the capacitive element C11 can be reduced. This makes it possible to improve the resolution of the display device.

[0080] Furthermore, OS transistors have high saturation properties. Therefore, for example, by using an OS transistor for transistor M12, a stable drain current can be supplied, and the time that transistor M14 is in the ON state (corresponding to the time that the light-emitting element LD is in the light-emitting state) can be stabilized. This stabilizes the luminescence brightness of the display device. Thus, the display quality can be improved.

[0081] Furthermore, OS transistors have a small hysteresis width. Therefore, for example, by using an OS transistor for transistor M12, it is possible to suppress changes in the drain current due to the history of the applied gate voltage. This stabilizes the drain current of transistor M12, and stabilizes the time that transistor M14 is in the ON state (corresponding to the time that the light-emitting element LD is in the light-emitting state). As a result, the luminescence brightness of the display device can be stabilized. Thus, the display quality can be improved.

[0082] Here, for example, if a transistor with a large hysteresis width is used for transistor M12, it is preferable to apply an on-bias voltage to transistor M12 (meaning applying a gate voltage that turns the transistor ON) in order to suppress the effects of the hysteresis characteristics of transistor M12, and for this purpose, an additional transistor may be provided in the semiconductor device 100. Also, an additional period may be provided in the operation of the semiconductor device 100 for the application of the on-bias voltage. However, by using an OS transistor for transistor M12, it is not necessary to provide an additional transistor for the application of the on-bias voltage. Therefore, the layout area of ​​the semiconductor device 100 can be reduced. Thus, the resolution of the display device can be improved. Also, it is not necessary to provide a period for the application of the on-bias voltage. Thus, at least one of the following can be achieved: improved operating speed and reduced power consumption.

[0083] Various oxide semiconductors can be used in OS transistors. For example, oxide semiconductors that provide a high on-current can be used. In particular, it is preferable to use oxide semiconductors that provide a high on-current for transistors that function as switches (transistors M11, M13, and M14). Indium oxide is an example of an oxide semiconductor that provides a high on-current.

[0084] By using an oxide semiconductor that exhibits a high on-current characteristic in OS transistors, sufficient on-current can be easily obtained even with a large gate insulating film thickness. Therefore, for example, by increasing the thickness of the gate insulating film in a transistor that functions as a switch, parasitic capacitance can be reduced. This allows for an improvement in operating speed, and thus enables a higher refresh rate for display devices.

[0085] Furthermore, by using an oxide semiconductor that exhibits a high on-current characteristic in the OS transistor, it becomes easier to obtain sufficient on-current even when the channel length is increased. Therefore, for example, the channel length of a transistor functioning as a switch can be increased. This improves the reliability of the display device.

[0086] Furthermore, by using an oxide semiconductor that provides a high on-current characteristic in the OS transistor, it is easier to obtain sufficient on-current even with a reduced channel width. Therefore, for example, by reducing the channel width of a transistor that functions as a switch, the layout area can be reduced. This can improve the resolution of the display device.

[0087] [Operation Example] Next, the operation of the semiconductor device 100 will be explained.

[0088] Figure 2 is a timing chart illustrating an example of the operation of the semiconductor device 100. Figures 3 to 7 are circuit diagrams illustrating an example of the operation of the semiconductor device 100.

[0089] In the semiconductor device 100, each of the wirings GL11 and GL12 is supplied with a signal that is either a potential L (sometimes simply written as "L") or a potential H (sometimes simply written as "H") that is greater than the potential L.

[0090] Potential L is the potential that, when supplied to the gate of a transistor, can turn the transistor off. Potential H is the potential that, when supplied to the gate of a transistor, can turn the transistor on. The difference between potential L and potential H is greater than the threshold voltage of the transistor. Potential L or potential H may be, for example, the ground potential.

[0091] Additionally, a potential Va (sometimes simply written as "Va") is applied to wiring ANO, a potential Vc (sometimes simply written as "Vc") is applied to wiring CATH, a potential Vb (sometimes simply written as "Vb") is applied to wiring VL11, and a potential Ve (sometimes simply written as "Ve") is applied to wiring VL12. Furthermore, a potential Vd (sometimes simply written as "Vd") corresponding to the image signal is applied to wiring SL.

[0092] In addition, the gate voltage of transistor M12 may be denoted as Vgs12, the drain voltage of transistor M12 as Vds12, and the threshold voltage of transistor M12 as Vt12. Furthermore, the gate voltage of transistor M14 may be denoted as Vgs14, the drain voltage of transistor M14 as Vds14, and the threshold voltage of transistor M14 as Vt14. Finally, the threshold voltage of the light-emitting element LD may be denoted as Vtd.

[0093] In the description of operation, rise and fall times may occur when the potential changes, for example, due to loads such as wiring (parasitic capacitance and resistance). Also, even if two different operations are shown to occur at the same time, this does not necessarily mean that they are strictly at the same time. For example, even if there is a slight time difference due to signal delay in the wiring, they may still be considered to occur at the same time.

[0094] Furthermore, in timing charts, even if each period is depicted as having the same length on the diagram for the sake of clarity, the actual duration of each period may differ.

[0095] The timing chart shown in Figure 2 illustrates the potential applied to each wire during each period of operation. It also shows the change in potential at each node.

[0096] Furthermore, Figures 3 through 7 show the state of the circuit at each point in time during operation (potential of each wire and node, state of each transistor, current flowing through each wire and node, etc.). In these cases, a symbol indicating potential, such as "H" or "L" (also called a potential symbol), may be written adjacent to each wire and node, enclosed in a line. In particular, when a change in potential occurs, the line may be made thicker, and when the circuit becomes floating, the line may be made dotted. In addition, an "×" symbol may be superimposed on an off-state transistor. Furthermore, the direction of current flow (which can also be said to be the direction of positive charge movement) or the way potential is supplied may be indicated along each wire and node with a dashed arrow.

[0097] Furthermore, in order to simplify the explanation, the effects of parasitic capacity, parasitic resistance, etc., may be omitted from the explanation.

[0098] Furthermore, for the sake of clarity, the potentials applied to wiring GL11 and wiring GL12 are referred to as potential L or potential H, but different potentials may be applied to each wiring. For example, wiring GL11 may be given a potential smaller than potential L instead of potential L. Also, for example, wiring GL12 may be given a potential larger than potential H instead of potential H.

[0099] During the operation of the semiconductor device 100, in period T11, a potential corresponding to the image signal is applied to the gate of transistor M12 (in some cases, this is referred to as writing the image signal). In period T12, the potential of the gate of transistor M14 (corresponding to node ND12) is initialized. In period T13, the light-emitting element LD emits light for a duration corresponding to the written image signal.

[0100] Here, the potential of node ND12 is initialized to "Vb", causing transistor M14 to turn on. Subsequently, the potential of node ND12 gradually changes and, when it reaches "Vc + Vt14", causes transistor M14 to turn off.

[0101] In this case, in order for transistor M14 to operate in the linear region, the conditions (0 < Vds14 < Vgs14 - Vt14) must be met, so that "0 < Va - Vtd - Vc < Vb - Vc - Vt14", i.e., "Vc < Va - Vtd < Vb - Vt14". Note that if the values ​​of "Vtd" and "Vt14" are 0 or close to 0, then "Vc < Va" and "Va < Vb" may be used instead.

[0102] Furthermore, in order for transistor M12 to operate in the saturation region, the condition (0 < Vgs12 - Vt12 < Vds12) must be met, so that "0 < Vd - Ve - Vt12 < Vc + Vt14 - Ve", i.e., "Ve < Vd - Vt12 < Vc + Vt14". Note that if the values ​​of "Vt12" and "Vt14" are 0 or close to 0, then "Ve < Vd" and "Vd < Vc" may be used instead.

[0103] In the following description of operation, the potential H is set to be sufficiently greater than the potential Vb in order to turn on transistors M11 and M13. Also, the potential L is set to be sufficiently less than the potential Ve in order to turn off transistors M11 and M13.

[0104] The following describes the operation when an image signal with "Vd = Vd1" is written to a semiconductor device 100 that has an image signal with "Vd = Vd0" written to it.

[0105] In Figure 2, the changes in potential at nodes ND11 to ND13 are shown as follows: a solid line indicates the case when an image signal is written to the semiconductor device 100 such that "Vd = Vd1" (corresponding to the case where "Vd = Vd1" is applied to the wiring SL); a long dashed line indicates the case when an image signal is written such that "Vd = Vd2" (here, "Vd2 > Vd1") (corresponding to the case where "Vd = Vd2" is applied to the wiring SL); and a short dashed line indicates the case when an image signal is written such that "Vd = Vd3" (here, "Vd3 > Vd2") (corresponding to the case where "Vd = Vd3" is applied to the wiring SL).

[0106] Immediately before period T11, "L" is applied to both wiring GL11 and wiring GL12. Therefore, transistors M11 and M13 are both in the off state. Also, the potential of node ND11 is "Vd0". Therefore, transistor M12 is in the on state. As a result, the potential of node ND12 is "Ve", and the gate voltage applied to transistor M14 is "Ve-Vc". Therefore, transistor M14 is in the off state. Thus, the potential of node ND13 is "Va-Vtd", and the light-emitting element LD is not emitting light. The circuit configuration at this time is shown in Figure 3. In the following explanation, unless otherwise specified, the state immediately preceding the event is assumed to be maintained.

[0107] During period T11, the image signal is written. Specifically, a "H" is applied to wiring GL11. This turns on transistor M11. At this time, "Vd1" is applied to wiring SL. Then, the potential of wiring SL is supplied to node ND11 via transistor M11, and the potential of node ND11 becomes "Vd1". Therefore, a voltage of "Vd1-Ve" is applied to the capacitive element C11, and a gate voltage of "Vgs12=Vd1-Ve" is applied to transistor M12. Figure 4 shows the circuit at this time.

[0108] Subsequently, an "L" signal is applied to the wiring GL11. This turns off transistor M11. As a result, the voltage "Vd1 - Ve" is maintained across the capacitive element C11. Therefore, the gate voltage "Vgs12 = Vd1 - Ve" remains applied to transistor M12.

[0109] During period T12, the gate potential of transistor M14 (corresponding to node ND12) is initialized. Specifically, a "H" is applied to wiring GL12. This turns on transistor M13. Then, the potential of wiring VL11 is supplied to node ND12 via transistor M13, and transistor M14 turns on. Therefore, current flows from wiring ANO through the light-emitting element LD and transistor M14 to wiring CATH, causing the light-emitting element LD to emit light. Figure 5 shows the circuit configuration at this time.

[0110] At this time, transistor M14 operates in the linear region. Therefore, the potential of node ND13 becomes "Vc", and a forward voltage of "Va-Vc" is applied to the light-emitting element LD. Thus, a current based on this forward voltage is supplied to the light-emitting element LD, and the light-emitting element LD emits light with an intensity corresponding to this current. In reality, due to the on-resistance of transistor M14, the potential of node ND13 will be slightly higher than "Vc", but for the sake of simplicity in this explanation, we assume that the potential of node ND13 is "Vc".

[0111] Furthermore, transistor M12 operates in the saturation region. Therefore, a drain current proportional to "(Vgs12 - Vt12) squared" flows through transistor M12. Thus, a drain current proportional to "(Vd1 - Ve - Vt12) squared" flows through transistor M12.

[0112] Here, current flows from wiring VL11 to wiring VL12 via transistors M13 and M12, causing the potential of node ND12 to drop slightly from "Vb". For example, if the drop in potential of node ND12 is "Vx1", then the potential of node ND12 becomes "Vb-Vx1". Therefore, a voltage of "Vb-Vx1-Ve" is applied to the capacitive element C12, and a gate voltage of "Vgs14 = Vb-Vx1-Vc" is applied to transistor M14.

[0113] During period T13, the light-emitting element LD emits light for a duration corresponding to the written image signal. Specifically, an "L" value is applied to the wiring GL12. This turns off the transistor M13. Then, the drain current of transistor M12 causes the potential of node ND12 to gradually decrease until it reaches "Ve". As a result, the voltage applied to the capacitive element C12 and the gate voltage applied to transistor M14 both gradually decrease. Figure 6 shows the circuit configuration at this time.

[0114] Subsequently, when the potential of node ND12 drops to "Vc + Vt14", transistor M14 turns off. Then, the potential of node ND13 becomes "Va - Vtd", and the light-emitting element LD stops emitting light. Figure 7 shows the circuit configuration at this point.

[0115] Therefore, the light-emitting element LD is in an emitting state at the start of period T13, and becomes non-emitting when the potential of node ND12 decreases to "Vc + Vt14".

[0116] In this case, the time from the start of period T13 until the light-emitting element LD stops emitting light (corresponding to the time from the start of period T13 until the potential of node ND12 becomes "Vc + Vt14") is given by "change in potential of node ND12 × capacitance of capacitive element C12 / drain current of transistor M12". Note that the change in potential of node ND12 is "(Vb - Vx1) - (Vc + Vt14)". Therefore, the time from the start of period T13 until the light-emitting element LD stops emitting light is inversely proportional to the drain current of transistor M12. In this case, a drain current based on the gate voltage (here "Vgs12 = Vd1 - Ve") flows through transistor M12. Therefore, the light emission time of the light-emitting element LD (corresponding to "term1" shown in Figure 2) can be controlled by a potential corresponding to the image signal (here "Vd1").

[0117] The semiconductor device 100 can be operated as described above.

[0118] In the above example of operation, during period T12, power is consumed by the current flowing from wiring VL11 to wiring VL12 via transistors M13 and M12. Therefore, it is preferable to shorten the length of period T12. For example, it is preferable that the length of period T12 be less than or equal to the length of period T11. It is also preferable that the length of period T12 be less than or equal to the length of period T13. Furthermore, as will be described in detail later, in the semiconductor device 100, another transistor may be provided to suppress the current flowing from wiring VL11 to wiring VL12 via transistors M13 and M12.

[0119] Furthermore, in the above example of operation, the operation of assigning "H" to wiring GL11 (corresponding to period T11) and the operation of assigning "H" to wiring GL12 (corresponding to period T12) may be performed simultaneously. This makes it possible to improve the operating speed of the semiconductor device 100.

[0120] Here, for example, let's assume that the potential Vd corresponding to the image signal applied to the wiring SL is "Vd1" < "Vd2" < "Vd3". In this case, during periods T12 and T13, the drain current of transistor M12 is "when Vd = Vd1" < "when Vd = Vd2" < "when Vd = Vd3". Therefore, during period T12, the decrease in potential at node ND12 is "when Vd = Vd1 (corresponding to "Vx1")" < "when Vd = Vd2 (corresponding to "Vx2")" < "when Vd = Vd3 (corresponding to "Vx3")". Also, during period T13, the rate at which the potential at node ND12 decreases is "when Vd = Vd1" < "when Vd = Vd2" < "when Vd = Vd3". Therefore, the light emission time of the light-emitting LD is as follows: "When Vd = Vd1 (corresponding to "term1" shown in Figure 2)" > "When Vd = Vd2 (corresponding to "term2" shown in Figure 2)" > "When Vd = Vd3 (corresponding to "term3" shown in Figure 2)".

[0121] In this way, the light emission time of the light-emitting element LD can be controlled by a potential Vd corresponding to the image signal in the semiconductor device 100. Therefore, PWM control can be realized in the semiconductor device 100.

[0122] One aspect of the present invention allows a semiconductor device 100 to be used as a pixel of a display device by mounting a light-emitting element LD on a pixel circuit 101. Therefore, one aspect of the present invention includes a configuration without a light-emitting element LD. In this case, in the pixel circuit 101, either the source or drain of the transistor M14 (corresponding to node ND13) can be said to be a terminal that can be connected to the light-emitting element LD. Therefore, the pixel circuit 101 can be said to be a semiconductor device that has the function of controlling the light emission time of the light-emitting element LD. Furthermore, the pixel circuit 101 can be said to be a semiconductor device that has the function of controlling the time for which current is supplied to the light-emitting element LD. Furthermore, the pixel circuit 101 can be said to be a semiconductor device that has the function of controlling the time for which current is output, and the transistor M14 can be said to have the function of controlling whether or not to interrupt the current (which can also be said to be the function of controlling whether or not to output the current).

[0123] [Correction Example] When the semiconductor device 100 is used as a pixel in a display device, variations in the electrical characteristics of the transistor M12, which functions as a constant current source, may lead to a decrease in display quality. Therefore, it is preferable to correct for variations in the electrical characteristics of the transistor M12. As a method for correcting variations in the electrical characteristics of the transistor M12, for example, a method of correcting the image signal based on a current value obtained by measuring the current flowing through the transistor M12 in a circuit provided outside the semiconductor device 100 (also called external correction) can be mentioned.

[0124] Figure 8 is a circuit diagram illustrating an example of an operation in which external correction is performed in the semiconductor device 100.

[0125] As shown in Figure 8, when performing external correction, for example, "H" is assigned to wiring GL11 and wiring GL12, "Va" is assigned to wiring ANO and wiring CATH, and "Ve" is assigned to wiring VL12. In addition, a potential Vrg (sometimes simply written as "Vrg") is assigned to wiring SL, and a potential Vrd (sometimes simply written as "Vrd") is assigned to wiring VL11.

[0126] As a result, transistors M11 and M13 are turned ON. Then, the potential of wiring SL is supplied to node ND11 via transistor M11, and the potential of node ND11 becomes "Vrg". Also, the potential of wiring VL11 is supplied to node ND12 via transistor M13, and the potential of node ND12 becomes "Vrd". Therefore, transistor M12 is subjected to a gate voltage of "Vgs12 = Vrg - Ve" and a drain voltage of "Vds12 = Vrd - Ve". Note that by setting "Vrd < Va + Vt14", transistor M14 is turned OFF.

[0127] In this case, the drain current of transistor M12 can be measured via wiring VL11 or wiring VL12 in a circuit provided outside the semiconductor device 100, and the image signal can be corrected based on the obtained current value.

[0128] Furthermore, the operation to perform external correction can be carried out, for example, in a period prior to period T11 in the above example of operation.

[0129] [Modification 1] In one aspect of the present invention, in the semiconductor device 100 shown in Figure 1, in order to improve the grayscale expression capability, another transistor (corresponding to transistor M21 described later) may be provided in the current path from wiring ANO to wiring CATH via the light-emitting element LD and transistor M14 (sometimes referred to as the current path including the light-emitting element LD and transistor M14). In this case, the other transistor provided in the current path may have the function of being in an off state when transistor M13 is in an on state.

[0130] Figures 9 and 10 are circuit diagrams illustrating the specific configuration examples described above.

[0131] The semiconductor device 100 shown in Figure 9 has a transistor M21 in addition to the semiconductor device 100 shown in Figure 1. Transistor M21 is provided between transistor M14 and the light-emitting element LD in a current path that includes the light-emitting element LD and transistor M14. Specifically, one of the sources or drains of transistor M14 is connected to one of the sources or drains of transistor M21. The other of the sources or drains of transistor M21 is connected to one terminal of the light-emitting element LD. The gate of transistor M21 is connected to wiring GL21.

[0132] The semiconductor device 100 shown in Figure 10 has a transistor M21 in addition to the semiconductor device 100 shown in Figure 1. Transistor M21 is provided between transistor M14 and wiring CATH in a current path that includes the light-emitting element LD and transistor M14. Specifically, the other of the source or drain of transistor M14 is connected to one of the source or drain of transistor M21. The other of the source or drain of transistor M21 is connected to wiring CATH. The gate of transistor M21 is connected to wiring GL21.

[0133] Although not shown in the diagram, transistor M21 may be provided between the light-emitting element LD and wiring ANO in the current path including the light-emitting element LD and transistor M14.

[0134] In the semiconductor device 100 shown in Figures 9 and 10, for example, the wiring GL21 is supplied with a signal that is "L" or "H" during period T11, "L" during period T12, and "H" during period T13. Alternatively, the wiring GL21 may be supplied with a signal whose logic is inverted from the signal supplied to wiring GL12.

[0135] This suppresses the emission of light from the light-emitting element LD during period T12. As a result, the light-emitting element LD remains non-emitting during period T12. Therefore, in a display device using the semiconductor device 100 as a pixel, it becomes easier to express gradations in regions where the light-emitting element LD's emission intensity is low, thereby improving gradation expression capability and at least one of the dynamic ranges.

[0136] Furthermore, the semiconductor device 100 shown in Figure 9 can be said to have a configuration in which the on-resistance of transistor M21 does not affect the gate voltage applied to transistor M14. Therefore, the semiconductor device 100 shown in Figure 9 can be said to have a configuration that makes it easier to stabilize the gate voltage applied to transistor M14 compared to the semiconductor device 100 shown in Figure 10. Also, the semiconductor device 100 shown in Figure 10 can be said to have a configuration that makes it easier to reduce the on-resistance of transistor M21 because it is easier to increase the gate voltage applied to transistor M21 compared to the semiconductor device 100 shown in Figure 9. In addition, the semiconductor device 100 shown in Figure 10 can be said to have a configuration that makes it easier to reduce the amplitude of the signal applied to wiring GL21 compared to the semiconductor device 100 shown in Figure 9.

[0137] [Modification 2] In one aspect of the present invention, in the semiconductor device 100 shown in Figure 1, in order to suppress the current flowing from the wiring VL11 to the wiring VL12 via transistors M13 and M12, another transistor (corresponding to transistor M22 described later) may be provided in the current path (sometimes referred to as the current path including transistor M12) from node ND12 (corresponding here to one of the source or drain of transistor M13, the gate of transistor M14, and one terminal of the capacitive element C12) to the wiring VL12 via transistor M12. In this case, the other transistor provided in the current path may have the function of being in an off state when transistor M13 is in an on state.

[0138] Figures 11 and 12 are circuit diagrams illustrating the specific configuration examples described above.

[0139] The semiconductor device 100 shown in Figure 11 has a transistor M22 in addition to the semiconductor device 100 shown in Figure 1. Transistor M22 is provided in a current path including transistor M12, between transistor M12, transistor M13, transistor M14, and capacitive element C12. Specifically, one source or drain of transistor M12 is connected to one source or drain of transistor M22. The other source or drain of transistor M22 is connected to one source or drain of transistor M13, the gate of transistor M14, and one terminal of capacitive element C12. The gate of transistor M22 is connected to wiring GL22.

[0140] The semiconductor device 100 shown in Figure 12 has a transistor M22 in addition to the semiconductor device 100 shown in Figure 1. Transistor M22 is provided between transistor M12 and wiring VL12 in a current path that includes transistor M12. Specifically, the other of the source or drain of transistor M12 is connected to one of the source or drain of transistor M22. The other of the source or drain of transistor M22 is connected to wiring VL12. The gate of transistor M22 is connected to wiring GL22.

[0141] In the semiconductor device 100 shown in Figures 11 and 12, for example, the wiring GL22 is supplied with a signal that is "L" or "H" during period T11, "L" during period T12, and "H" during period T13. Alternatively, the wiring GL22 may be supplied with a signal whose logic is inverted from the signal supplied to wiring GL12.

[0142] This makes it possible to suppress the flow of current from wiring VL11 to wiring VL12 via transistors M13 and M12 during period T12. Therefore, power consumption can be reduced.

[0143] Furthermore, during period T12, it is possible to suppress the potential of node ND12 from dropping slightly below "Vb". Therefore, the decrease in the potential of node ND12 becomes Vx1 = 0 (or close to 0), Vx2 = 0 (or close to 0), or Vx3 = 0 (or close to 0).

[0144] Furthermore, the semiconductor device 100 shown in Figure 11 can be said to have a configuration in which the on-resistance of transistor M22 does not affect the gate voltage applied to transistor M12. Therefore, the semiconductor device 100 shown in Figure 11 can be said to have a configuration that makes it easier to stabilize the gate voltage applied to transistor M12 compared to the semiconductor device 100 shown in Figure 12. Also, the semiconductor device 100 shown in Figure 12 can be said to have a configuration that makes it easier to reduce the on-resistance of transistor M22 because it is easier to increase the gate voltage applied to transistor M22 compared to the semiconductor device 100 shown in Figure 11. In addition, the semiconductor device 100 shown in Figure 12 can be said to have a configuration that makes it easier to reduce the amplitude of the signal applied to wiring GL22 compared to the semiconductor device 100 shown in Figure 11.

[0145] [Modification 3] In one aspect of the present invention, in the semiconductor device 100 shown in Figure 1, another transistor (corresponding to transistor M23, described later) may be provided to initialize the potential of the gate (corresponding to node ND12) of transistor M14.

[0146] Figure 13 is a circuit diagram illustrating a modified example of the semiconductor device 100 shown in Figure 1. The semiconductor device 100 shown in Figure 13 has a transistor M23 in addition to the semiconductor device 100 shown in Figure 1. One of the sources or drains of transistor M23 is connected to one terminal of the capacitive element C12 (corresponding to node ND12). The other of the sources or drains of transistor M23 is connected to wiring VL12. The gate of transistor M23 is connected to wiring GL23. In this case, transistor M23 may have the function of being ON when transistor M14 is OFF.

[0147] The source or drain of transistor M23 may be connected to a different wire than the wire VL12. For example, the source or drain of transistor M23 may be connected to a wire to which a potential smaller than potential Ve is supplied, or to a wire to which potential Ve is supplied, or to a wire to which a potential smaller than potential Vc is supplied, or to a wire to which potential Vc is supplied, or to the wire CATH.

[0148] In the semiconductor device 100 shown in Figure 13, for example, the wiring GL23 is supplied with a signal that is "H" during period T11 and "L" during periods T12 and T13. Alternatively, a signal that is "L" at the start of periods T11, T12, and T13, and "H" after transistor M14 turns off during period T13, may be supplied. Furthermore, the wiring GL23 may be supplied with a signal similar to the signal supplied to wiring GL11. In addition, the gate of transistor M23 or wiring GL23 may be connected to wiring GL11. By connecting the gate of transistor M23 to wiring GL11, there is no need to provide wiring GL23, thus reducing the layout area. Therefore, the resolution can be improved in a display device using the semiconductor device 100 as a pixel.

[0149] As a result, during period T11, the charge accumulated in the capacitive element C12 is discharged to the wiring VL12 via the transistor M23, and the gate potential of the transistor M14 can be initialized to "Ve". Therefore, in a display device using the semiconductor device 100 as a pixel, the influence of residual charge in the capacitive element C12 on the writing of the image signal in the next frame can be suppressed, and the display quality can be improved.

[0150] Note that the configuration for initializing the gate potential of transistor M14 is not limited to the semiconductor device 100 shown in Figure 13.

[0151] Figure 14 is a circuit diagram illustrating a modified example of the semiconductor device 100 shown in Figure 1. The semiconductor device 100 shown in Figure 14 has a transistor M23 in addition to the semiconductor device 100 shown in Figure 1. One of the sources or drains of transistor M23 is connected to the gate of transistor M12 (corresponding to node ND11). The other source or drain of transistor M23 is connected to wiring VL11. The gate of transistor M23 is connected to wiring GL23. In this case, transistor M23 may have the function of being turned on when transistor M14 is in the off state.

[0152] The source or drain of transistor M23 may be connected to a different wire than the wire VL11. For example, the source or drain of transistor M23 may be connected to a wire to which a potential greater than potential Vb is supplied, or to a wire to which potential Vb is supplied, or to a wire to which a potential greater than potential Va is supplied, or to a wire to which potential Va is supplied, or to a wire ANO.

[0153] In the semiconductor device 100 shown in Figure 14, for example, a signal is applied to the wiring GL23 that is "H" during the period before period T11 and "L" during periods T11 to T13. Alternatively, a signal may be applied that is "L" during the period before period T11, at the start of periods T11, T12, and T13, and "H" after transistor M14 turns off during period T13.

[0154] This allows the charge accumulated in the capacitive element C12 during the period prior to period T11 to be discharged to the wiring VL12 via the transistor M12, thereby initializing the gate potential of transistor M14 to "Ve". Therefore, in a display device using the semiconductor device 100 as a pixel, the influence of residual charge in the capacitive element C12 on the writing of the image signal in the next frame can be suppressed, thereby improving the display quality.

[0155] Furthermore, in the semiconductor device 100 shown in Figures 13 and 14, an on-bias voltage can be applied to the transistor M12. Therefore, in a display device using the semiconductor device 100 as a pixel, the influence of the hysteresis characteristics of the transistor M12 can be suppressed, and the display quality can be improved.

[0156] Furthermore, the semiconductor device 100 shown in Figure 13 can simultaneously perform the writing of an image signal, the initialization of the gate potential of transistor M14, and the application of an on-bias voltage to transistor M12. Therefore, the semiconductor device 100 shown in Figure 13 can achieve improved operating speed compared to the semiconductor device 100 shown in Figure 14. In addition, the semiconductor device 100 shown in Figure 14 can increase the on-bias voltage applied to transistor M12. Therefore, the semiconductor device 100 shown in Figure 14 can enhance the effect of suppressing the influence of the hysteresis characteristics of transistor M12 compared to the semiconductor device 100 shown in Figure 13.

[0157] [Modification 4] In one aspect of the present invention, in the semiconductor device 100 shown in Figure 1, another transistor (corresponding to transistor M24 described later) may be provided to suppress the effect of voltage drop in the wiring CATH.

[0158] Figure 15 is a circuit diagram illustrating a modified example of the semiconductor device 100 shown in Figure 1. The semiconductor device 100 shown in Figure 15 has a transistor M24 in addition to the semiconductor device 100 shown in Figure 1. One of the sources or drains of transistor M24 is connected to the other of the source or drain of transistor M14. The other of the source or drain of transistor M24 is connected to wiring VL21. The gate of transistor M24 is connected to wiring GL24. In this case, transistor M24 may have the function of being ON when transistor M13 is ON.

[0159] In the semiconductor device 100 shown in Figure 15, for example, a constant potential is applied to the wiring VL21. Note that the wiring VL21 may be given a potential smaller than that of the wiring CATH, or a different potential. Alternatively, the same potential may be applied to both the wiring CATH and the wiring VL21 from a circuit (e.g., a power supply circuit) located outside the semiconductor device 100.

[0160] Furthermore, for example, the wiring GL24 is supplied with a signal that is "L" or "H" during period T11, "H" during period T12, and "L" during period T13. Note that the wiring GL23 may be supplied with the same signal as the one supplied to wiring GL12. In addition, the gate of transistor M24 or wiring GL24 may be connected to wiring GL12. By connecting the gate of transistor M24 to wiring GL12, there is no need to provide wiring GL24, and thus the layout area can be reduced. Therefore, the resolution can be improved in a display device using semiconductor device 100 as pixels.

[0161] In this display device, where semiconductor devices 100 are used as pixels, the wiring CATH is shared by a plurality of semiconductor devices 100 arranged in a matrix. At this time, the amount of current flowing through the wiring CATH is the sum of the amount of current flowing through each of the light-emitting element LDs of the plurality of semiconductor devices 100 arranged in a matrix. As a result, a voltage drop occurs in the wiring CATH, and a distribution may occur in this voltage drop. This can cause variations in the potential of the wiring CATH for each semiconductor device 100. Therefore, during period T12, variations in the gate voltage applied to the transistor M14 occur for each semiconductor device 100, and variations in the light emission time of the light-emitting element LD can occur, which can lead to a decrease in display quality.

[0162] Therefore, as shown in the semiconductor device 100 in Figure 15, by configuring the potential of the wiring VL21 to be supplied to the other source or drain of transistor M14 via transistor M24 during period T12, the effect of voltage drop in the wiring CATH can be suppressed. In the semiconductor device 100 shown in Figure 15, during period T12, a portion of the current supplied to the light-emitting element LD flows through the wiring CATH, and the remainder flows through the wiring VL21 via transistor M24. At this time, the wiring VL21 is also shared by multiple semiconductor devices 100 arranged in a matrix, but the amount of current flowing through the wiring VL21 is the sum of the amounts of current flowing through each transistor M24 of the semiconductor devices 100 in one row of the multiple semiconductor devices 100 arranged in a matrix. Therefore, the voltage drop in the wiring VL21 is smaller than the voltage drop in the wiring CATH, and the distribution of said voltage drop is also smaller. Therefore, during period T12, variations in the gate voltage applied to the transistor M14 can be suppressed for each semiconductor device 100, and variations in the light emission time of the light-emitting element LD can be suppressed, thereby improving the display quality.

[0163] Furthermore, in the current path from wiring ANO through the light-emitting element LD and transistor M14 to wiring CATH (sometimes referred to as the current path including the light-emitting element LD and transistor M14), another transistor (corresponding to transistor M21 described later) may be provided between transistor M14 and the light-emitting element LD. Also, in the current path including the light-emitting element LD and transistor M14, another transistor (corresponding to transistor M25 described later) may be provided between transistor M14 and wiring CATH.

[0164] Figure 16 is a circuit diagram illustrating a modified example of the semiconductor device 100 shown in Figure 15. The semiconductor device 100 shown in Figure 16 has a transistor M21 in addition to the semiconductor device 100 shown in Figure 15. Transistor M21 is provided between transistor M14 and the light-emitting element LD in a current path that includes the light-emitting element LD and transistor M14. Specifically, one of the source or drain of transistor M14 is connected to one of the source or drain of transistor M21. The other of the source or drain of transistor M21 is connected to one terminal of the light-emitting element LD. The gate of transistor M21 is connected to wiring GL21. In this case, transistor M21 may have the function of being in an off state when transistor M24 is in an on state.

[0165] The semiconductor device 100 shown in Figure 16 can also be described as a combination of the semiconductor device 100 shown in Figure 15 and the semiconductor device 100 shown in Figure 9. The transistor M21 may be provided between the light-emitting element LD and the wiring ANO in the current path including the light-emitting element LD and the transistor M14.

[0166] In the semiconductor device 100 shown in Figure 16, for example, the wiring GL21 is supplied with a signal that is "L" or "H" during period T11, "L" during period T12, and "H" during period T13. Alternatively, the wiring GL21 may be supplied with a signal whose logic is inverted from the signal supplied to wiring GL12. Furthermore, the wiring GL21 may be supplied with a signal whose logic is inverted from the signal supplied to wiring GL24.

[0167] As a result, during period T12, current flow from wiring ANO to wiring VL21 via the light-emitting element LD, transistor M14, and transistor M24 is suppressed, and the voltage drop in wiring VL21 is suppressed. Therefore, compared to the semiconductor device 100 shown in Figure 15, the semiconductor device 100 shown in Figure 16 is a configuration that is more likely to suppress variations in the gate voltage applied to transistor M14 and variations in the light-emitting time of the light-emitting element LD for each semiconductor device 100 during period T12.

[0168] Figure 17 is a circuit diagram illustrating a modified example of the semiconductor device 100 shown in Figure 15. The semiconductor device 100 shown in Figure 17 has a transistor M25 in addition to the semiconductor device 100 shown in Figure 15. Transistor M25 is provided between transistor M14, transistor M24, and wiring CATH in a current path that includes the light-emitting element LD and transistor M14. Specifically, the other source or drain of transistor M14 and one source or drain of transistor M24 are connected to one source or drain of transistor M25. The other source or drain of transistor M25 is connected to wiring CATH. The gate of transistor M25 is connected to wiring GL25. In this case, transistor M25 may have the function of being in an off state when transistor M24 is in an on state.

[0169] In the semiconductor device 100 shown in Figure 17, for example, the wiring GL25 is supplied with a signal that is "L" or "H" during period T11, "L" during period T12, and "H" during period T13. Alternatively, the wiring GL25 may be supplied with a signal whose logic is inverted from the signal supplied to wiring GL12. Furthermore, the wiring GL25 may be supplied with a signal whose logic is inverted from the signal supplied to wiring GL24.

[0170] This suppresses the influence of voltage drop in the wiring CATH during period T12, and suppresses variations in the potential applied to the other side of the source or drain of transistor M14 for each semiconductor device 100. Therefore, the semiconductor device 100 shown in Figure 17 can be said to be a configuration that is more likely to achieve the effect of suppressing variations in the gate voltage applied to transistor M14 and variations in the light emission time of the light-emitting element LD for each semiconductor device 100 during period T12, compared to the semiconductor device 100 shown in Figure 15.

[0171] Although not shown in the figures, a configuration combining the semiconductor device 100 shown in Figure 16 and the semiconductor device 100 shown in Figure 17 may also be used. This further enhances the effect of suppressing variations in the gate voltage applied to the transistor M14 for each semiconductor device 100 during period T12, and suppressing variations in the light emission time of the light-emitting element LD.

[0172] [Modification 5] In one aspect of the present invention, in the semiconductor device 100 shown in Figure 1, another transistor (corresponding to transistor M26 described later) may be provided in order to suppress the influence of past display history in the light-emitting element LD.

[0173] Figure 18 is a circuit diagram illustrating a modified example of the semiconductor device 100 shown in Figure 1. The semiconductor device 100 shown in Figure 18 has a transistor M26 in addition to the semiconductor device 100 shown in Figure 1. One of the sources or drains of transistor M26 is connected to one terminal of the light-emitting element LD. The other of the sources or drains of transistor M26 is connected to wiring VL22. The gate of transistor M26 is connected to wiring GL26. In this case, transistor M26 may have the function of being on when transistor M14 is in the off state.

[0174] In the semiconductor device 100 shown in Figure 18, for example, a constant potential is applied to wiring VL22. Wiring VL22 may be given the same potential as wiring ANO, a potential greater than wiring ANO, the same potential as wiring VL11, a potential greater than wiring VL11, or a potential different from these. In addition, the other side of the source or drain of transistor M26, or wiring VL22, may be connected to wiring ANO or to wiring VL11. By connecting the other side of the source or drain of transistor M26 to wiring ANO or wiring VL11, there is no need to provide wiring VL22, and the layout area can be reduced. Therefore, the resolution can be improved in a display device using the semiconductor device 100 as a pixel.

[0175] Furthermore, for example, the wiring GL26 is supplied with a signal that is "H" during period T11 and "L" during periods T12 and T13. The wiring GL26 may also be supplied with the same signal as the wiring GL11. Additionally, the gate of transistor M26, or wiring GL26, may be connected to wiring GL11. By connecting the gate of transistor M26 to wiring ANO or wiring GL11, the need for wiring GL26 is eliminated, thus reducing the layout area. Therefore, the resolution can be improved in a display device using semiconductor device 100 as pixels.

[0176] This allows the voltage applied to the light-emitting element LD to be initialized during period T11. Therefore, in a display device using the semiconductor device 100 as a pixel, the influence of past display history can be suppressed, and the display quality can be improved.

[0177] [Modification 6] Figure 19 is a circuit diagram illustrating a modified version of the semiconductor device 100 shown in Figure 1. The semiconductor device 100 shown in Figure 19 differs from the semiconductor device 100 shown in Figure 1 in terms of the connections of the respective capacitive elements C11 and C12. Here, the other terminal of the capacitive element C11 is connected to wiring VL12a. The other terminal of the capacitive element C12 is connected to wiring VL12b.

[0178] In the semiconductor device 100 shown in Figure 19, for example, a constant potential is supplied to wiring VL12a. Wiring VL12a may be supplied with the same potential as wiring VL12, the same potential as wiring CATH, the same potential as wiring ANO, the same potential as wiring VL11, or a different potential. The other terminal of the capacitive element C11, or wiring VL12a, may be connected to wiring VL12, the same potential as wiring CATH, the same potential as wiring ANO, or the same potential as wiring VL11. Also, for example, a constant potential is supplied to wiring VL12b. Wiring VL12b may be supplied with the same potential as wiring VL12, the same potential as wiring CATH, the same potential as wiring ANO, the same potential as wiring VL11, or a different potential. Furthermore, the other terminal of the capacitive element C12, or the wiring VL12b, may be connected to wiring VL12, wiring CATH, wiring ANO, or wiring VL11.

[0179] Thus, the connection destination of the other terminal of the capacitive element C11 is not limited to the wiring VL12. Similarly, the connection destination of the other terminal of the capacitive element C12 is not limited to the wiring VL12. This allows for increased flexibility in the layout of the semiconductor device 100, for example.

[0180] [Modification 7] Figure 20 is a circuit diagram illustrating a modified version of the semiconductor device 100 shown in Figure 1. At least one of the transistors in the semiconductor device 100 may have a back gate. Figure 20 shows an example in which each of transistors M11 to M14 has a back gate.

[0181] The back gate of transistor M12 is connected, for example, to the other side of the source or drain of transistor M12 (corresponding to wiring VL12). It is preferable that transistor M12, which functions as a constant current source, has stable electrical characteristics. Therefore, by configuring the back gate of transistor M12 to be connected to the other side of the source or drain of transistor M12, the potential on the back gate side of the channel formation region is fixed, thereby stabilizing the electrical characteristics (e.g., increasing saturation, suppressing threshold voltage shifts). Furthermore, electric fields generated outside the transistor are less likely to act on the channel formation region, thus stabilizing the electrical characteristics. Additionally, light is less likely to irradiate the channel formation region from outside the transistor, thus stabilizing the electrical characteristics. The back gate of transistor M12 may also be connected to wiring CATH or wiring to which a predetermined potential is applied. The back gate of transistor M12 and the wiring connected to the back gate may be connected to each other outside the semiconductor device 100 or pixel circuit 101, or they may be connected to each other inside the semiconductor device 100 or pixel circuit 101.

[0182] The back gate of transistor M14 is connected, for example, to the gate of transistor M14. Transistor M14, which functions as a switch, preferably has a large on-current. Therefore, by configuring the gate and back gate of transistor M14 to be connected to each other, the on-current can be increased. Thus, the operating speed of the semiconductor device 100 can be improved. Furthermore, even if the channel width of transistor M14 is reduced, a sufficient on-current can be easily obtained, thus reducing the layout area. Therefore, the resolution can be improved in a display device using the semiconductor device 100 as a pixel. Note that the back gate of transistor M14 may also be connected to wiring to which a predetermined potential is applied.

[0183] The back gates of transistors M11 and M13 are the same as described above for the back gate of transistor M14. In this case, the gate and back gate of each transistor may be connected to each other outside the semiconductor device 100 or the pixel circuit 101, or they may be connected to each other inside the semiconductor device 100 or the pixel circuit 101.

[0184] Furthermore, since transistor M14 is provided in a current path including the light-emitting element LD, it is preferable that its electrical characteristics be stable. For this reason, the back gate of transistor M14 may be connected in the same way as described above for the back gate of transistor M12. For example, the back gate of transistor M14 may be connected to the other side of the source or drain of transistor M14 (corresponding to the wiring CATH). Alternatively, the back gate of transistor M14 may be connected to the wiring VL12, or to wiring to which a predetermined potential is applied.

[0185] Figure 20 illustrates, as an example, how the back gate and the other source or drain of transistor M12 are connected to each other outside the pixel circuit 101, the back gates and gates of transistors M11 and M13 are connected to each other outside the pixel circuit 101, and the back gate and gate of transistor M14 are connected to each other inside the pixel circuit 101.

[0186] Here, the wiring VL12 to which the source or drain of transistor M12 is connected is also provided outside the semiconductor device 100 or pixel circuit 101. Therefore, by configuring the back gate of transistor M12 to be connected to the other source or drain (corresponding to the wiring VL12 in this case) outside the semiconductor device 100 or pixel circuit 101, it is not necessary to provide vias inside the semiconductor device 100 or pixel circuit 101 to connect the back gate and the other source or drain to each other. Thus, in a display device using the semiconductor device 100 as a pixel, it is possible to suppress an increase in layout area and improve resolution. The same applies to the connections between the back gates and gates of transistors M11 and M13. Note that node ND12 to which the gate of transistor M14 is connected is provided inside the pixel circuit 101. Therefore, the back gate of transistor M14 is connected to the gate (corresponding to node ND12 in this case) inside the pixel circuit 101.

[0187] [Modification 8] Figure 21 is a circuit diagram illustrating a modified version of the semiconductor device 100 shown in Figure 1. The semiconductor device 100 shown in Figure 21 differs from the semiconductor device 100 shown in Figure 1 in that it has a switch S11 instead of transistor M11, a switch S13 instead of transistor M13, and a switch S14 instead of transistor M14.

[0188] Thus, one aspect of the present invention may have a configuration in which at least a portion of the transistors constituting the semiconductor device 100 are replaced with other elements that function as switches.

[0189] [Modification 9] Figure 22 is a circuit diagram illustrating a modified version of the semiconductor device 100 shown in Figure 1. The semiconductor device 100 shown in Figure 22 differs from the semiconductor device 100 shown in Figure 1 in terms of the connection of the light-emitting element LD. Here, one of the sources or drains of transistor M14 is connected to wiring ANO. The other source or drain of transistor M14 is connected to the other terminal of the light-emitting element LD (corresponding to the anode of the light-emitting diode). One terminal of the light-emitting element LD (corresponding to the cathode of the light-emitting diode) is connected to wiring CATH. Note that the wiring connected to the other terminal of the light-emitting element LD may be referred to as node ND14.

[0190] In the semiconductor device 100 shown in Figure 22, during period T13, the potential of the other source or drain of transistor M14 (corresponding to node ND14) becomes "Vc + Vtd". As the potential of node ND12 decreases to "Vc + Vtd + Vt14", transistor M14 turns off and the light-emitting element LD stops emitting light. On the other hand, in the semiconductor device 100 shown in Figure 1, during period T13, the potential of the other source or drain of transistor M14 (corresponding to wiring CATH) becomes "Vc". As the potential of node ND12 decreases to "Vc + Vt14", transistor M14 turns off and the light-emitting element LD stops emitting light. Therefore, the semiconductor device 100 shown in Figure 22 can increase the potential supplied to wiring VL12 by "Vtd" compared to the semiconductor device 100 shown in Figure 1. Therefore, in the semiconductor device 100 shown in Figure 1, the potential supplied to the wiring VL12 was described as being smaller than the potential supplied to the wiring CATH. However, in the semiconductor device 100 shown in Figure 22, for example, the potential supplied to the wiring VL12 may be the same as the potential supplied to the wiring CATH. For example, the source or drain of transistor M12, or the other side of the wiring VL12, may be connected to the wiring CATH. This eliminates the need to provide wiring VL12, thus reducing the layout area. Therefore, in a display device using the semiconductor device 100 as a pixel, the resolution can be improved.

[0191] Here, as shown in Figure 22, the formation of the light-emitting element LD can be facilitated by connecting the other terminal of the light-emitting element LD (corresponding to the anode of the light-emitting diode) to the other source or drain of the transistor M14 (corresponding to node ND14). In particular, when using an OLED as the light-emitting element LD, it is preferable to apply the configuration of the semiconductor device 100 shown in Figure 22, as it facilitates the formation of the OLED.

[0192] Furthermore, in the semiconductor device 100 shown in Figure 22, a p-channel transistor may be used for transistor M14. By using a p-channel transistor for transistor M14, the potential difference between the gate (corresponding to node ND12) and either the source or drain (corresponding to wiring ANO) of transistor M14 becomes the gate voltage of transistor M14. This stabilizes the gate voltage applied to transistor M14. As a result, the light emission time of the light-emitting element LD can be stabilized. Therefore, the light emission brightness of the display device can be stabilized, and the display quality can be improved.

[0193] When a p-channel transistor is used for transistor M14, for example, a signal is applied to the wiring GL12 that is "H" during periods T11 and T12 and "L" during period T13. As a result, the light-emitting element LD is in a non-emitting state at the start of periods T11, T12, and T13, and becomes emitting when the potential of node ND12 drops to "Vc + Vt14". Therefore, in a display device using semiconductor device 100 as a pixel, it becomes easier to express gradations in regions where the light-emitting element LD's light intensity is low, thereby improving gradation expression capability and at least one of the dynamic range improvements.

[0194] Furthermore, when using a p-channel transistor for transistor M14, for example, a Si transistor may be used for transistor M14, and OS transistors may be used for each of transistors M11 to M13.

[0195] [Modification 10] In one aspect of the present invention, in the semiconductor device 100 shown in Figure 1, some of the connection destinations of transistors M12, M13, and capacitive element C11 may be changed. In the semiconductor device 100 shown in Figure 1, the light-emitting element LD is in a light-emitting state at the start of period T13, but by changing the connection destinations of transistors M12, M13, and capacitive element C11, a configuration can be made in which the light-emitting element LD is in a non-light-emitting state at the start of period T13. This makes it easier to express gradation in regions where the light-emitting intensity of the light-emitting element LD is low in a display device using the semiconductor device 100 as a pixel, thereby improving gradation expression capability and improving dynamic range, or at least one of the above.

[0196] Figure 23 is a circuit diagram illustrating a modified example of the semiconductor device 100 shown in Figure 1. The semiconductor device 100 shown in Figure 23 differs from the semiconductor device 100 shown in Figure 1 in terms of the connections of transistors M12, M13, and C11. Here, the other end of either the source or drain of transistor M12 is connected to wiring VL11. The other end of either the source or drain of transistor M13 is connected to wiring VL12. The other terminal of the C11 is connected to either the source or drain of transistor M12.

[0197] In the semiconductor device 100 shown in Figure 23, for example, a signal is supplied to wiring GL11 that is "H" during period T11 and "L" during periods T12 and T13. A signal is supplied to wiring GL12 that is "H" during periods T11 and T12 and "L" during period T13. Alternatively, period T13 may be performed after period T11 without performing period T12.

[0198] At this point, the potential of node ND12 is initialized to "Ve," causing transistor M14 to turn off. Subsequently, the potential of node ND12 gradually changes until it reaches "Vc + Vt14," at which point transistor M14 turns on.

[0199] In this case, in order to satisfy the condition for transistor M14 to be in the off state (Vgs14 < Vt14), we assume that "Ve - Vc < Vt14", that is, "Ve < Vc + Vt14". Note that if the value of "Vt14" is 0 or close to 0, we may use "Ve < Vc".

[0200] Furthermore, in order to satisfy the conditions for transistor M14 to be ON (Vt14 < Vgs14, 0 < Vds14), we must assume that "Vt14 < Vb - Vc", i.e., "Vc + Vt14 < Vb", and "0 < Va - Vtd - Vc", i.e., "Vc < Va - Vtd". Note that if the values ​​of "Vtd" and "Vt14" are 0 or close to 0, we may assume "Vc < Vb" and "Vc < Va".

[0201] Furthermore, in order for transistor M12 to operate in the saturation region, the condition (0 < Vgs12 - Vt12 < Vds12) must be met, which means "0 < Vd - Ve - Vt12 < Vb - (Vc + Vt14)", i.e., "Ve < Vd - Vt12 < Vb - (Vc + Vt14 - Ve)". Note that if the values ​​of "Vt12" and "Vt14" are 0 or close to 0, then "Ve < Vd" and "Vd < Vb - (Vc - Ve)" may be used.

[0202] As a result, during period T11, the image signal is written and the gate potential of transistor M14 is initialized. Specifically, the potential of node ND11 becomes "Vd1" and the potential of node ND12 becomes "Ve". Therefore, a gate voltage of "Vgs12 = Vd1 - Ve" is applied to transistor M12. Also, transistor M14 is turned off, and the light-emitting element LD stops emitting light.

[0203] During period T12, the written image signal is retained, and the initialization of the gate potential of transistor M14 continues. Specifically, a gate voltage of "Vgs12 = Vd1 - Ve" remains applied to transistor M12. Also, transistor M14 remains in the off state, and the light-emitting element LD remains non-emitting.

[0204] During period T13, the light-emitting element LD emits light for a duration corresponding to the written image signal. Specifically, the potential of node ND12 gradually rises until it reaches "Vb". Then, when the potential of node ND12 rises to "Vc + Vt14", transistor M14 turns on and the light-emitting element LD emits light.

[0205] Thus, in the semiconductor device 100 shown in Figure 23, the light-emitting element LD is in a non-emitting state at the start of periods T11, T12, and T13, and becomes emitting when the potential of node ND12 rises to "Vc + Vt14". Therefore, in a display device using the semiconductor device 100 as a pixel, it becomes easier to express gradations in regions where the light-emitting element LD's light intensity is low, thereby improving gradation expression capability and at least one of the dynamic ranges.

[0206] [Modification 11] In one aspect of the present invention, the semiconductor device 100 shown in Figure 23 may be configured to more easily stabilize the light emission time of the light-emitting element LD compared to the semiconductor device 100 shown in Figure 1, by adding another transistor (corresponding to transistors M31 and M32 described later) and another capacitive element (corresponding to capacitive element C31 described later).

[0207] Figure 24 is a circuit diagram illustrating a modified example of the semiconductor device 100 shown in Figure 23. The semiconductor device 100 shown in Figure 24 includes, in addition to the semiconductor device 100 shown in Figure 23, a transistor M31, a transistor M32, and a capacitive element C31. In this case, one source or drain of transistor M12, one source or drain of transistor M13, the other terminal of capacitive element C11, and one terminal of capacitive element C12 are each connected to the gate of transistor M31. One source or drain of transistor M31 is connected to the gate of transistor M14, one source or drain of transistor M32, and one terminal of capacitive element C31. The other source or drain of transistor M31 is connected to wiring VL12. The other source or drain of transistor M32 is connected to wiring VL31. The gate of transistor M32 is connected to wiring GL31. Note that the wiring connected to the gate of transistor M31, etc., may be referred to as node ND31.

[0208] In the semiconductor device 100 shown in Figure 24, for example, a constant potential is applied to wiring VL31. Wiring VL31 may be given a potential greater than wiring ANO, the same potential as wiring VL11, a potential greater than wiring VL11, or a potential different from these. Furthermore, the other end of the source or drain of transistor M32, or wiring VL31, may be connected to wiring VL11. By connecting the other end of the source or drain of transistor M32 to wiring VL11, there is no need to provide wiring VL31, thus reducing the layout area. Therefore, in a display device using the semiconductor device 100 as a pixel, the resolution can be improved.

[0209] Furthermore, for example, the wiring GL31 is supplied with a signal that is "L" or "H" during period T11, "H" during period T12, and "L" during period T13. Note that the same signal as the signal supplied to wiring GL12 may be supplied to wiring GL31. In addition, the gate of transistor M31 or wiring GL31 may be connected to wiring GL12. By connecting the gate of transistor M31 to wiring GL12, there is no need to provide wiring GL31, and the layout area can be reduced. Therefore, the resolution can be improved in a display device using semiconductor device 100 as pixels.

[0210] Here, for example, the signal "Vb" is assigned to wiring VL31. Also, the signal assigned to wiring GL31 is "H" during periods T11 and T12, and "L" during period T13. Alternatively, period T13 may be performed immediately after period T11, without performing period T12.

[0211] Note that the threshold voltage of transistor M31 is sometimes denoted as Vt31.

[0212] As a result, during period T11, the image signal is written, the gate potential of transistor M31 is initialized, and the gate potential of transistor M14 is initialized. Specifically, the potential of node ND11 becomes "Vd1", and the potential of node ND31 becomes "Ve". Therefore, a gate voltage of "Vgs12 = Vd1 - Ve" is applied to transistor M12. Also, transistor M31 turns off, and transistor M32 turns on. Then, the gate potential of transistor M14 becomes "Vb", which turns on transistor M14, and the light-emitting element LD lights up.

[0213] During period T12, the written image signal is held, and the gate potential of transistor M31 and the gate potential of transistor M14 are initialized. Specifically, the gate voltage of "Vgs12 = Vd1 - Ve" remains applied to transistor M12. Also, transistor M31 remains in the off state, and transistor M32 remains in the on state. As a result, transistor M14 remains in the on state, and the light-emitting element LD continues to emit light.

[0214] During period T13, the light-emitting element LD emits light for a duration corresponding to the written image signal. Specifically, the potential of node ND31 gradually rises until it reaches "Vb". Then, when the potential of node ND31 rises to "Vc + Vt31", transistor M31 turns on. As a result, the gate potential of transistor M14 becomes "Ve", causing transistor M14 to turn off and the light-emitting element LD to stop emitting light.

[0215] Therefore, the light-emitting element LD is in a light-emitting state at the start of periods T11, T12, and T13, and becomes non-light-emitting when the potential of node ND31 rises to "Vc + Vt31". For this reason, the semiconductor device 100 shown in Figure 24 can be said to be a modified version of the semiconductor device 100 shown in Figure 1.

[0216] In the semiconductor device 100 shown in Figure 1, the gate potential of transistor M14 gradually decreases during period T13. As a result, the gate voltage applied to transistor M14 gradually decreases. On the other hand, in the semiconductor device 100 shown in Figure 24, during period T13, before the potential of node ND31 becomes "Vc + Vt31", transistor M31 is in the off state, so the gate potential of transistor M14 remains "Vb". Subsequently, when the potential of node ND31 becomes "Vc + Vt31", transistor M31 turns on, and the gate potential of transistor M14 becomes "Ve". As a result, when the potential of node ND31 becomes "Vc + Vt31", the gate voltage applied to transistor M14 decreases rapidly. Therefore, it can be said that the semiconductor device 100 shown in Figure 24 is less affected by voltage drops in the wiring CATH and has a configuration that makes it easier to stabilize the gate voltage applied to transistor M14 compared to the semiconductor device 100 shown in Figure 1. Therefore, the semiconductor device 100 shown in Figure 24 can be said to have a configuration that makes it easier to stabilize the light emission time of the light-emitting element LD compared to the semiconductor device 100 shown in Figure 1. Thus, in a display device using the semiconductor device 100 as a pixel, the light emission brightness can be stabilized and the display quality can be improved.

[0217] Furthermore, in order to operate transistor M14 in the saturation region, a potential Vf (sometimes simply written as "Vf") may be applied to the wiring VL31. In this case, in order to satisfy the condition for transistor M14 to operate in the saturation region (0 < Vgs14 - Vt14 < Vds14), it is assumed that "0 < Vf - Vc - Vt14 < Va - Vtd - Vc", that is, "Vc < Vf - Vt14 < Va - Vtd". This allows transistor M14 to function as a constant current source. Therefore, the current supplied to the light-emitting element LD can be controlled by the potential Vf. As a result, the light emission intensity of the light-emitting element LD can be controlled by the potential Vf.

[0218] Here, the potential Vf may be a value corresponding to the image signal. This enables pulse amplitude modulation (PAM) control. For example, in a display device using the semiconductor device 100 shown in Figure 24 as a pixel, the light emission intensity of the light-emitting element LD can be controlled by combining PWM control and PAM control. This can improve at least one of the following: improved gradation expression and improved dynamic range.

[0219] As a method of controlling the light emission intensity of a light-emitting element LD by combining PWM control and PAM control, for example, if the light emission intensity of the light-emitting element LD is low, PAM control can be performed, and if the light emission intensity of the light-emitting element LD is high, PWM control can be performed. Alternatively, for example, if the light emission intensity of the light-emitting element LD is low, PAM control can be performed, and if the light emission intensity of the light-emitting element LD is high, PWM control and PAM control can be combined. Alternatively, for example, if the light emission intensity of the light-emitting element LD is low, PAM control can be performed, if the light emission intensity of the light-emitting element LD is medium, PWM control can be performed, and if the light emission intensity of the light-emitting element LD is high, PAM control can be performed.

[0220] Furthermore, when the potential Vf is set to a value corresponding to the image signal, the source or drain of transistor M32, or the wiring VL31, may be connected to wiring SL.

[0221] At this time, the wiring GL31 is supplied with a signal that becomes "L" during period T11, "H" during period T12, and "L" during period T13. As a result, during period T11, the potential of the wiring SL is supplied to the gate of transistor M12 via transistor M11, and during period T12, the potential of the wiring SL is supplied to the gate of transistor M14 via transistor M32.

[0222] Since the source or drain of transistor M32 is connected to wiring SL, there is no need to provide wiring VL31, thus reducing the layout area. Therefore, the resolution can be improved in a display device using semiconductor device 100 as pixels.

[0223] [Modification 12] In one aspect of the present invention, in the semiconductor device 100 shown in Figure 1, a current source may be provided in the current path from wiring ANO to wiring CATH via the light-emitting element LD and transistor M14 (sometimes referred to as a current path including the light-emitting element LD and transistor M14). This allows the current supplied to the light-emitting element LD to be controlled by the current source. Therefore, the light emission intensity of the light-emitting element LD can be controlled by the current source. The amount of current output from the current source may be a constant value or a value corresponding to the image signal. By setting the amount of current output from the current source to a value corresponding to the image signal, PAM control can be realized. Thus, in a display device using the semiconductor device 100 as a pixel, the light emission intensity of the light-emitting element LD can be controlled by combining PWM control and PAM control. This makes it possible to improve at least one of the following: improved gradation expression and improved dynamic range.

[0224] Furthermore, in the current path including the light-emitting element LD and the transistor M14, a current source (corresponding to the current source CS41 described later) may be provided between the transistor M14 and the wiring CATH, or a current source (corresponding to the current source CS42 described later) may be provided between the transistor M14 and the light-emitting element LD, or a current source (corresponding to the current source CS43 described later) may be provided between the light-emitting element LD and the wiring ANO.

[0225] Figure 25A is a circuit diagram illustrating a modified example of the semiconductor device 100 shown in Figure 1. The semiconductor device 100 shown in Figure 25A has a current source CS41 in addition to the semiconductor device 100 shown in Figure 1. The current source CS41 is provided between the transistor M14 and the wiring CATH in a current path that includes the light-emitting element LD and the transistor M14. Specifically, the source or drain of the transistor M14 is connected to one terminal of the current source CS41 (corresponding here to the sink side terminal (also called the current-sinking side)). The other terminal of the current source CS41 (corresponding here to the source side terminal (also called the current-discharge side)) is connected to the wiring CATH. Note that the wiring connected to one terminal of the current source CS41 may be referred to as node ND41.

[0226] Figure 25B is a circuit diagram illustrating an example configuration of the current source CS41. The current source CS41 includes transistor M41, transistor M42, and capacitive element C41. One of the sources or drains of transistor M41 is connected to the gate of transistor M42 and one terminal of capacitive element C41. One of the sources or drains of transistor M42 (corresponding to one terminal of the current source CS41) is connected to the other source or drain of transistor M14 (corresponding to node ND41). The other source or drain of transistor M42 (corresponding to the other terminal of the current source CS41) is connected to wiring CATH. The other terminal of capacitive element C41 is connected to wiring CATH. The other source or drain of transistor M41 is connected to wiring DL. The gate of transistor M41 is connected to wiring GL41.

[0227] In the semiconductor device 100 shown in Figures 25A and 25B, for example, a constant potential or a potential corresponding to the image signal is applied to the wiring DL.

[0228] Furthermore, for example, the wiring GL41 is supplied with a signal that is "H" during period T11, "L" or "H" during period T12, and "L" during period T13. Note that the wiring GL41 may be supplied with the same signal as the wiring GL11, or the same signal as the wiring GL12. Also, the gate of transistor M41, or the wiring GL41, may be connected to either the wiring GL11 or the wiring GL12. By connecting the gate of transistor M41 to the wiring GL11 or the wiring GL12, there is no need to provide wiring GL41, thus reducing the layout area. Therefore, the resolution can be improved in a display device using the semiconductor device 100 as a pixel.

[0229] As a result, the potential of wiring DL is applied to the gate of transistor M42 via transistor M41, and the gate voltage applied to transistor M42 is held by the capacitive element C41. At this time, by operating transistor M42 in the saturation region, a drain current based on the gate voltage flows through transistor M42. Therefore, the current output from one terminal of the current source CS41 (corresponding to node ND41) (here, this is called the sink current) and the current output from the other terminal (corresponding to wiring CATH) (here, this is called the source current) can be controlled by the potential of wiring DL.

[0230] The source or drain of transistor M41, or the other end of wiring DL, may be connected to wiring SL. In this case, wiring GL41 is supplied with a signal that is "L" during period T11, "H" during period T12, and "L" during period T13. As a result, during period T11, the potential of wiring SL is supplied to the gate of transistor M12 via transistor M11, and during period T12, the potential of wiring SL is supplied to the gate of transistor M42 via transistor M41.

[0231] Since the source or drain of transistor M41 is connected to wiring SL, there is no need to provide wiring DL, thus reducing the layout area. Therefore, the resolution can be improved in a display device using semiconductor device 100 as pixels.

[0232] In the current source CS41, for example, OS transistors may be used for each of transistors M41 and M42. In this case, for example, by using an OS transistor for transistor M41, the voltage applied to the capacitive element C41 (corresponding to the gate voltage applied to transistor M41) can be maintained for a long period of time. This stabilizes the current output from the current source CS41. Therefore, the light intensity when the light-emitting element LD is in the light-emitting state can be stabilized. Thus, when the semiconductor device 100 is used as a pixel in a display device, the light brightness of the display device can be stabilized, and the display quality can be improved.

[0233] Although not shown in the diagram, the current source CS41 may also have a transistor and a capacitive element in addition to the above configuration. This may provide various functions, such as controlling the amount of current output from the current source CS41 with the amount of current input from the wiring DL to the current source CS41, and correcting threshold voltage variations of the transistor M42.

[0234] Figure 26A is a circuit diagram illustrating a modified example of the semiconductor device 100 shown in Figure 1. The semiconductor device 100 shown in Figure 26A has a current source CS42 in addition to the semiconductor device 100 shown in Figure 1. The current source CS42 is provided between the transistor M14 and the light-emitting element LD in a current path that includes the light-emitting element LD and the transistor M14. Specifically, one of the source or drain of the transistor M14 is connected to one terminal of the current source CS42 (corresponding to the source terminal in this case). The other terminal of the current source CS42 (corresponding to the sink terminal in this case) is connected to one terminal of the light-emitting element LD. Note that the wiring connected to the other terminal of the current source CS42 may be referred to as node ND42.

[0235] Figure 26B is a circuit diagram illustrating an example configuration of the current source CS42. The current source CS42 includes transistors M41, M42, M43, and capacitive element C41. One of the sources or drains of transistor M41 is connected to the gate of transistor M42 and one terminal of capacitive element C41. One of the sources or drains of transistor M42 (corresponding to one terminal of the current source CS42) is connected to one of the sources or drains of transistor M43, the other terminal of capacitive element C41, and one of the sources or drains of transistor M14 (corresponding to node ND13). The other of the sources or drains of transistor M42 (corresponding to the other terminal of the current source CS42) is connected to one terminal of the light-emitting element LD (corresponding to node ND42). The other of the sources or drains of transistor M41 is connected to wiring DL. The gate of transistor M41 is connected to wiring GL41. The source or drain of transistor M43 is connected to wiring VL41. The gate of transistor M43 is connected to wiring GL42.

[0236] In the semiconductor device 100 shown in Figures 26A and 26B, for example, wiring DL is supplied with a constant potential or a potential corresponding to the image signal. Also, for example, wiring VL41 is supplied with a constant potential. Wiring VL41 may be supplied with a potential smaller than wiring DL, the same potential as wiring CATH, a potential smaller than wiring CATH, the same potential as wiring VL12, a potential smaller than wiring VL12, or a potential different from these. Furthermore, the other side of the source or drain of transistor M43, or wiring VL41, may be connected to wiring CATH or wiring VL12. By connecting the other side of the source or drain of transistor M43 to wiring CATH or wiring VL12, there is no need to provide wiring VL41, thus reducing the layout area. Therefore, the resolution can be improved in a display device using the semiconductor device 100 as a pixel.

[0237] Furthermore, for example, the wiring GL41 is supplied with a signal that is "H" during period T11, "L" or "H" during period T12, and "L" during period T13. Note that the wiring GL41 may be supplied with the same signal as the wiring GL11, or the same signal as the wiring GL12. Also, the gate of transistor M41, or the wiring GL41, may be connected to either the wiring GL11 or the wiring GL12. By connecting the gate of transistor M41 to the wiring GL11 or the wiring GL12, there is no need to provide wiring GL41, thus reducing the layout area. Therefore, the resolution can be improved in a display device using the semiconductor device 100 as a pixel.

[0238] Furthermore, for example, wiring GL42 is supplied with a signal that is "H" during period T11, "L" or "H" during period T12, and "L" during period T13. Note that wiring GL42 may be supplied with the same signal as the signal supplied to wiring GL11, or the same signal as the signal supplied to wiring GL12, or the same signal as the signal supplied to wiring GL41. Also, the gate of transistor M42, or wiring GL42, may be connected to wiring GL11, or to wiring GL12, or to wiring GL41. By connecting the gate of transistor M42 to wiring GL11, wiring GL12, or wiring GL41, there is no need to provide wiring GL42, and thus the layout area can be reduced. Therefore, the resolution can be improved in a display device using semiconductor device 100 as pixels.

[0239] As a result, the potential of wiring DL is applied to the gate of transistor M42 via transistor M41, the potential of wiring VL41 is applied to either the source or drain of transistor M42 via transistor M43, and the gate voltage applied to transistor M42 is held by the capacitive element C41. At this time, by operating transistor M42 in the saturation region, a drain current based on the gate voltage flows through transistor M42. Therefore, the current output from one terminal of current source CS42 (corresponding to node ND13) (which becomes the source current in this case) and the current output from the other terminal of current source CS42 (corresponding to node ND42) (which becomes the sink current in this case) can be controlled by the potential of wiring DL.

[0240] The source or drain of transistor M41, or the other end of wiring DL, may be connected to wiring SL. In this case, wiring GL41 is supplied with a signal that is "L" during period T11, "H" during period T12, and "L" during period T13. Wiring GL42 is supplied with a signal that is "L" or "H" during period T11, "H" during period T12, and "L" during period T13. As a result, during period T11, the potential of wiring SL is supplied to the gate of transistor M12 via transistor M11, and during period T12, the potential of wiring SL is supplied to the gate of transistor M42 via transistor M41.

[0241] Since the source or drain of transistor M41 is connected to wiring SL, there is no need to provide wiring DL, thus reducing the layout area. Therefore, the resolution can be improved in a display device using semiconductor device 100 as pixels.

[0242] Here, the semiconductor device 100 shown in Figures 26A and 26B has a larger layout area compared to the semiconductor device 100 shown in Figures 25A and 25B because it has a transistor M43. However, since the other of the source or drain of transistor M14 is connected to wiring CATH, it can be said that this configuration makes it easier to stabilize the gate voltage applied to transistor M14.

[0243] In the current source CS42, for example, OS transistors may be used for each of the transistors M41 to M43. In this case, for example, by using an OS transistor for transistor M41, the voltage applied to the capacitive element C41 (corresponding to the gate voltage applied to transistor M41) can be maintained for a long period of time. This stabilizes the current output from the current source CS42. Therefore, the light intensity when the light-emitting element LD is in the light-emitting state can be stabilized. Thus, when the semiconductor device 100 is used as a pixel in a display device, the light brightness of the display device can be stabilized, and the display quality can be improved.

[0244] Although not shown in the diagram, the current source CS42 may also include a transistor and a capacitive element in addition to the above configuration. This may provide various functions, such as controlling the amount of current output from the current source CS42 with the amount of current input from the wiring DL to the current source CS42, and correcting threshold voltage variations of the transistor M42.

[0245] Figure 27A is a circuit diagram illustrating a modified example of the semiconductor device 100 shown in Figure 1. The semiconductor device 100 shown in Figure 27A has a current source CS43 in addition to the semiconductor device 100 shown in Figure 1. The current source CS43 is provided between the light-emitting element LD and the wiring ANO in a current path that includes the light-emitting element LD and the transistor M14. Specifically, the other terminal of the light-emitting element LD is connected to one terminal of the current source CS43 (corresponding to the source terminal in this case). The other terminal of the current source CS43 (corresponding to the sink terminal in this case) is connected to the wiring ANO. Note that the wiring connected to one terminal of the current source CS43 may be referred to as node ND43.

[0246] Figure 27B is a circuit diagram illustrating an example configuration of the current source CS43. The current source CS43 includes a transistor M41, a transistor M42, and a capacitive element C41. One of the sources or drains of transistor M41 is connected to the gate of transistor M42 and one terminal of the capacitive element C41. One of the sources or drains of transistor M42 (corresponding to one terminal of the current source CS43) is connected to the other terminal of the light-emitting element LD (corresponding to node ND43). The other source or drain of transistor M42 (corresponding to the other terminal of the current source CS43) is connected to wiring ANO. The other terminal of the capacitive element C41 is connected to wiring ANO. The other source or drain of transistor M41 is connected to wiring DL. The gate of transistor M41 is connected to wiring GL41.

[0247] In this example, a p-channel transistor will be used for transistor M42.

[0248] In the semiconductor device 100 shown in Figures 27A and 27B, for example, a constant potential or a potential corresponding to the image signal is applied to the wiring DL.

[0249] Furthermore, for example, the wiring GL41 is supplied with a signal that is "H" during period T11, "L" or "H" during period T12, and "L" during period T13. Note that the wiring GL41 may be supplied with the same signal as the wiring GL11, or the same signal as the wiring GL12. Also, the gate of transistor M41, or the wiring GL41, may be connected to either the wiring GL11 or the wiring GL12. By connecting the gate of transistor M41 to the wiring GL11 or the wiring GL12, there is no need to provide wiring GL41, thus reducing the layout area. Therefore, the resolution can be improved in a display device using the semiconductor device 100 as a pixel.

[0250] As a result, the potential of wiring DL is applied to the gate of transistor M42 via transistor M41, and the gate voltage applied to transistor M42 is held by the capacitive element C41. At this time, by operating transistor M42 in the saturation region, a drain current based on the gate voltage flows through transistor M42. Therefore, the current output from one terminal of the current source CS43 (corresponding to node ND43) (which becomes the source current in this case) and the current output from the other terminal (corresponding to wiring ANO) (which becomes the sink current in this case) can be controlled by the potential of wiring DL.

[0251] The source or drain of transistor M41, or the other end of wiring DL, may be connected to wiring SL. In this case, wiring GL41 is supplied with a signal that is "L" during period T11, "H" during period T12, and "L" during period T13. As a result, during period T11, the potential of wiring SL is supplied to the gate of transistor M12 via transistor M11, and during period T12, the potential of wiring SL is supplied to the gate of transistor M42 via transistor M41.

[0252] Since the source or drain of transistor M41 is connected to wiring SL, there is no need to provide wiring DL, thus reducing the layout area. Therefore, the resolution can be improved in a display device using semiconductor device 100 as pixels.

[0253] Here, the semiconductor device 100 shown in Figures 27A and 27B has both an n-channel transistor and a p-channel transistor, which increases the manufacturing cost compared to the semiconductor device 100 shown in Figures 25A and 25B. However, since the other of the source or drain of transistor M14 is connected to the CATH wiring, it can be said that this configuration makes it easier to stabilize the gate voltage applied to transistor M14.

[0254] In the current source CS43, for example, an OS transistor may be used for transistor M41 and a Si transistor for transistor M42. In this case, for example, by using an OS transistor for transistor M41, the voltage applied to the capacitive element C41 (corresponding to the gate voltage applied to transistor M41) can be maintained for a long period of time. This stabilizes the current output from the current source CS43. Therefore, the light intensity when the light-emitting element LD is in the light-emitting state can be stabilized. Thus, when the semiconductor device 100 is used as a pixel in a display device, the light brightness of the display device can be stabilized, and the display quality can be improved.

[0255] Although not shown in the diagram, the current source CS43 may also have a transistor and a capacitive element in addition to the above configuration. This may provide various functions, such as controlling the amount of current output from the current source CS43 with the amount of current input from the wiring DL to the current source CS43, and correcting threshold voltage variations of the transistor M42.

[0256] Furthermore, one aspect of the present invention includes a configuration in which at least one of the gate, source, and drain of one or more transistors is either not connected to anything or connected to any wiring. Also, one aspect of the present invention includes a configuration in which one or more wirings are either not input to anything or are input to any signal or potential.

[0257] Furthermore, two or more of the modified examples described above, whether illustrated or not illustrated, can be applied to the semiconductor device 100 shown in Figure 1. In addition, the semiconductor device 100 described above, whether illustrated or not illustrated, can solve the problem of providing at least a novel semiconductor device simply by its circuit configuration.

[0258] Figure 28 shows an example configuration combining the semiconductor device 100 shown in Figure 9, the semiconductor device 100 shown in Figure 11, the semiconductor device 100 shown in Figure 13, the semiconductor device 100 shown in Figure 17, and the semiconductor device 100 shown in Figure 18. By appropriately combining the above-described modifications, various effects can be obtained in a display device using the semiconductor device 100 as pixels, such as: easier expression of gradation in areas where the light emission intensity of the light-emitting element LD is low (see Modification 1); suppression of the current flowing from the wiring VL11 to the wiring VL12 via transistors M13 and M12 (see Modification 2); suppression of the influence of residual charge in the capacitive element C12 (see Modification 3); suppression of the influence of the hysteresis characteristics of transistor M12 (see Modification 3); suppression of variations in the light emission time of the light-emitting element LD (see Modification 4); and suppression of the influence of past display history (see Modification 5).

[0259] Furthermore, one aspect of the present invention is all or part of the circuit configuration described herein. Therefore, one aspect of the present invention does not have to include all or part of the operations described herein. Moreover, one aspect of the present invention is not limited to the operations described herein, and it is possible to appropriately change the potential applied to each wire, the timing of the change in that potential, etc.

[0260] <Example of Display Device Configuration> Next, a display device according to one aspect of the present invention will be described with reference to the drawings. At least a part of the semiconductor device according to one aspect of the present invention can be used in the display device.

[0261] Figure 29A is a block diagram illustrating an example configuration of a display device 160 according to one embodiment of the present invention.

[0262] As shown in Figure 29A, the display device 160 includes a pixel unit 162, a gate driver unit 163, a source driver unit 164, and a control unit 167. The pixel unit 162 has, for example, a plurality of pixels 161 arranged in a matrix of m rows and n columns (where m is an integer of 2 or more, and n is an integer of 2 or more).

[0263] Each pixel 161 has a display element such as a liquid crystal element or a light-emitting element. In this case, the display device 160 can also be said to have the function of an output device. Furthermore, each pixel 161 may have a light-receiving element. In this case, the display device 160 can also be said to have the function of an imaging device (sometimes called an input device). Also, each pixel 161 may have both a display element and a light-receiving element. In this case, the display device 160 can also be said to have the function of both a display device and an imaging device (sometimes called an input / output device).

[0264] In Figure 29A, the pixel 161 located in the first row and first column is shown as pixel 161[1,1], the pixel 161 located in the first row and nth column is shown as pixel 161[1,n], the pixel 161 located in the m row and first column is shown as pixel 161[m,1], and the pixel 161 located in the m row and nth column is shown as pixel 161[m,n]. In some cases, the pixel 161 located in the u row and v column (where u is an integer between 1 and m, and v is an integer between 1 and n) is shown as pixel 161[u,v]. When describing matters common to multiple pixels 161, they may not be described with identification codes such as "[u,v]".

[0265] Furthermore, the display device 160 has m gate lines 165, each arranged in parallel, and whose potential is controlled by a circuit included in the gate driver unit 163. The potential of one gate line 165 is supplied to n pixels 161 arranged in the row direction. Depending on the configuration of the pixels 161, a configuration in which multiple wires are included per gate line 165 is also possible.

[0266] Furthermore, the display device 160 has n source lines 166, each arranged in parallel, and whose potential is controlled by a circuit included in the source driver unit 164. The potential of one source line 166 is supplied to m pixels 161 arranged in the column direction. Depending on the configuration of the pixels 161, each source line 166 may be configured to include multiple wires.

[0267] The circuit included in the gate driver unit 163 functions, for example, as a scan line drive circuit (sometimes called a gate line drive circuit, gate driver, scan driver, or low driver).

[0268] The circuit included in the source driver unit 164 functions, for example, as a signal line drive circuit (sometimes called a source line drive circuit, source driver, data driver, or column driver).

[0269] One of the circuits included in the control unit 167 functions, for example, as a power supply circuit. Another circuit included in the control unit 167 functions, for example, as a signal generation circuit.

[0270] The display device 160 does not necessarily have to have one or both of the source driver unit 164 and the control unit 167. For example, one or both of the source driver unit 164 and the control unit 167 may be provided on an IC (Integrated Circuit) chip located outside the display device 160. In this case, a part of the source driver unit 164 and the control unit 167 may be provided on the display device 160.

[0271] Figure 29B is a block diagram illustrating a modified example of the display device 160. The display device 160 shown in Figure 29B differs from the display device 160 shown in Figure 29A in that it has two gate driver units 163 arranged to face each other via a pixel unit 162. In the configuration shown in Figure 29B, the potential of m gate lines 165 is controlled by the two gate driver units 163. With this configuration, for example, the actual wiring load (parasitic capacitance and parasitic resistance) can be reduced to 1 / 4 of the wiring load in the display device 160 shown in Figure 29A. Therefore, at least one of the following can be achieved for the display device 160: higher speed, higher resolution, higher resolution, narrower bezel, and larger screen.

[0272] In one aspect of the present invention, various transistors can be used as the transistors constituting the display device 160. For example, a Si transistor (a transistor containing silicon in its channel formation region) may be used, an OS transistor (a transistor containing oxide semiconductor in its channel formation region) may be used, or both a Si transistor and an OS transistor may be used.

[0273] OS transistors can be freely arranged on a silicon substrate, for example, on which Si transistors are mounted, making integration easy. Furthermore, since OS transistors can be manufactured using the same manufacturing equipment as Si transistors, they can be produced at low cost.

[0274] Therefore, in the display device 160, for example, Si transistors containing part of a silicon substrate may be used for the transistors constituting the source driver unit 164, and OS transistors provided on a silicon substrate may be used for the transistors constituting the gate driver unit 163 and the pixel unit 162, respectively. Furthermore, OS transistors may be used for at least a portion of the transistors constituting the source driver unit 164, and Si transistors may be used for at least a portion of the transistors constituting the gate driver unit 163 and the pixel unit 162, respectively.

[0275] Furthermore, various circuits (which may include arithmetic circuits, memory circuits, etc.) for controlling the operation of the display device 160 may be provided using Si transistors that include a portion of the silicon substrate. Thus, in one aspect of the present invention, for example, an OS transistor is arranged on a silicon substrate on which Si transistors are provided, and a display element or light-receiving element is arranged on the layer on which the OS transistors are provided.

[0276] In one aspect of the present invention, at least a portion of the various semiconductor devices 100 described above can be used for the pixel 161. Furthermore, a circuit for generating signals supplied to wiring GL11 and wiring GL12 can be provided in the gate driver unit 163. Furthermore, a circuit for generating image signals supplied to wiring SL can be provided in the source driver unit 164. Furthermore, a circuit for generating power supply potentials supplied to wiring ANO, wiring CATH, wiring VL11, and wiring VL12 can be provided in the control unit 167. In addition, for example, a circuit for performing external correction can be provided in the control unit 167 of the semiconductor device 100.

[0277] Furthermore, the contents of this embodiment can be combined as appropriate. Also, the contents of this embodiment can be combined as appropriate with the contents of other embodiments, etc.

[0278] (Embodiment 2) This embodiment describes a transistor according to one aspect of the present invention. At least a part of the transistor shown in this embodiment can be applied to the semiconductor device and display device shown in Embodiment 1 described above.

[0279] <Transistor Configuration Example 1> Figure 30A is a top view of a semiconductor device having transistor 200A. Figure 30B is a cross-sectional view between A1 and A2, shown by a dashed line in Figure 30A. Figure 30C is a cross-sectional view between A3 and A4, shown by a dashed line in Figure 30A. Note that some elements have been omitted from the top view of Figure 30A for clarity. Some elements may also be omitted in other top views.

[0280] In the semiconductor device shown in Figures 30A to 30C, an insulating layer 202 is provided on a substrate 201, and a semiconductor layer 203 is provided on the insulating layer 202. Furthermore, an insulating layer 204 is provided on the insulating layer 202 and the semiconductor layer 203. In addition, a conductive layer 205 is provided on the insulating layer 204. In this case, the semiconductor layer 203 and the conductive layer 205 are provided such that they have overlapping regions with respect to the insulating layer 204.

[0281] The semiconductor layer 203 has a region 203a that functions as either the source region or the drain region of the transistor 200A, a channel-forming region 203c, and a region 203b that functions as the other of the source region or the drain region. In the semiconductor layer 203, the region that overlaps with the conductive layer 205 functions as the channel-forming region 203c. Therefore, the region of the conductive layer 205 that overlaps with the channel-forming region 203c functions as the gate electrode of the transistor 200A. Also, the region of the insulating layer 204 that overlaps with the channel-forming region 203c functions as the gate insulating film of the transistor 200A.

[0282] Furthermore, in the semiconductor layer 203, the shortest distance between region 203a and region 203b in the channel formation region 203c can be set to the channel length Lch of the transistor 200A (see Figures 30A and 30B). Also, in the semiconductor layer 203, the length of the portion where region 203a and region 203b face each other in the channel formation region 203c can be set to the channel width Wch of the transistor 200A (see Figures 30A and 30C).

[0283] Furthermore, in the semiconductor device shown in Figures 30A to 30C, an insulating layer 206 is provided on top of the insulating layer 204 and the conductive layer 205. In addition, an opening 207a is provided in the insulating layer 204 and the insulating layer 206 in the region overlapping with region 203a of the semiconductor layer 203. In addition, an opening 207b is provided in the insulating layer 204 and the insulating layer 206 in the region overlapping with region 203b of the semiconductor layer 203. Furthermore, a conductive layer 208a is provided on top of the insulating layer 206 and within the opening 207a, and a conductive layer 208b is provided on top of the insulating layer 206 and within the opening 207b. Furthermore, an insulating layer 209 is provided on top of the insulating layer 206 and the conductive layer 208 (conductive layer 208a and conductive layer 208b).

[0284] The conductive layer 208a is in contact with region 203a of the semiconductor layer 203 at the bottom of the opening 207a. Similarly, the conductive layer 208b is in contact with region 203b of the semiconductor layer 203 at the bottom of the opening 207b. Therefore, the conductive layer 208a functions as either the source electrode or the drain electrode of the transistor 200A, and the conductive layer 208b functions as either the source electrode or the drain electrode of the transistor 200A.

[0285] <Transistor Configuration Example 2> Figure 31A is a top view of a semiconductor device having transistor 200B. The semiconductor device having transistor 200B is a modified version of the semiconductor device having transistor 200A described above. To reduce repetition in the explanation, we will mainly explain the differences between the semiconductor device having transistor 200B and the semiconductor device having transistor 200A.

[0286] Figure 31B is a cross-sectional view between A1 and A2, shown by the dashed line in Figure 31A. Figure 31C is a cross-sectional view between A3 and A4, shown by the dashed line in Figure 31A.

[0287] The semiconductor device shown in Figures 31A to 31C differs from the semiconductor device shown in Figures 30A to 30C in that it has a conductive layer 215 between the substrate 201 and the insulating layer 202. The conductive layer 215 overlaps with the channel formation region 203c via the insulating layer 202. Therefore, the region of the insulating layer 202 that overlaps with the channel formation region 203c functions as the back gate insulating film of the transistor 200B, and the region of the conductive layer 215 that overlaps with the channel formation region 203c functions as the back gate electrode of the transistor 200B.

[0288] The insulating layer 202 may have different film thicknesses in the region overlapping with the conductive layer 215 and the region not overlapping with it, or it may have a uniform film thickness. The conductive layer 215 may also extend beyond the edge of the channel-forming region 203c. Although not shown in the figures, an insulating layer may be provided between the substrate 201 and the conductive layer 215.

[0289] In a transistor with a back gate, the transistor's gate and back gate are positioned so as to sandwich the channel formation region of the semiconductor layer. The back gate can function similarly to the gate. When the gate is used to control the on and off states of the transistor, the potential of the back gate can be the same as that of the gate. Alternatively, it can be set to any potential.

[0290] For example, when turning on a transistor, supplying the potential that turns the transistor on to both the gate and the back gate can increase the on-current compared to supplying it to only one. For example, by connecting the gate and the back gate, it is possible to keep the gate and back gate at the same potential at all times. Furthermore, by controlling the potential of the back gate independently of the gate potential, the threshold voltage of the transistor can be adjusted. For example, supplying the potential that turns the transistor on to the back gate can decrease the threshold voltage of the transistor, and supplying the potential that turns the transistor off to the back gate can increase the threshold voltage of the transistor.

[0291] Furthermore, a constant potential, such as ground potential, may be supplied to the back gate. Since the gate and back gate are formed by conductive layers, sandwiching the channel formation region of the semiconductor layer between the gate and back gate makes it difficult for electric fields generated outside the transistor to act on the channel formation region (also known as the "electric field shielding effect"). For this reason, providing a back gate to a transistor stabilizes its operation. In addition, providing a back gate to a transistor reduces the variation in characteristics between multiple transistors. Providing a back gate to a transistor can improve the reliability of the transistor. Therefore, the reliability of the semiconductor device containing the transistor can be improved. Note that the electric field shielding effect can be obtained even if one or both of the gate and back gate are electrically floating (also known as the "floating state"), but the effect can be enhanced by supplying potential to the gate and back gate.

[0292] <Transistor Components> Next, we will describe the components that can be used in transistor 200 (transistor 200A and transistor 200B).

[0293] [Substrate] When a transistor is mounted on a substrate, there are no major restrictions on the material used for the substrate. The material used for the substrate can be determined by considering factors such as whether or not it is translucent and whether it has sufficient heat resistance to withstand heat treatment, depending on the purpose. For example, an insulating substrate, a semiconductor substrate, or a conductive substrate may be used as the substrate. As an insulating substrate, for example, glass substrates such as barium borosilicate glass or aluminoborsilicate glass, ceramic substrates, quartz substrates, sapphire substrates, stabilized zirconia substrates (such as yttria-stabilized zirconia substrates) can be used. In addition, semiconductor substrates, flexible substrates, resin substrates, etc. may be used as the substrate.

[0294] Examples of semiconductor substrates include silicon substrates, germanium substrates, and compound semiconductor substrates made from materials such as silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, or gallium oxide. Furthermore, there are semiconductor substrates having insulating regions within the above-mentioned semiconductor substrates, such as SOI (Silicon On Insulator) substrates. In addition, the semiconductor substrate may be a single-crystal semiconductor or a polycrystalline semiconductor.

[0295] Conductive substrates include graphite substrates, metal substrates, alloy substrates, and conductive resin substrates. There are also substrates containing metal nitrides and metal oxides. Furthermore, there are substrates with a conductive or semiconductor layer on an insulating substrate, substrates with a conductive or insulating layer on a semiconductor substrate, and substrates with a semiconductor or insulating layer on a conductive substrate.

[0296] Examples of materials that can be used for flexible substrates, resin substrates, etc. include polyesters such as polyethylene terephthalate (PET) and polyethylene naphthalate (PEN), polyacrylonitrile, acrylic resin, polyimide, polymethyl methacrylate, polycarbonate (PC), polyethersulfone (PES), polyamide (nylon, aramid, etc.), polysiloxane, cycloolefin resin, polystyrene, polyamide-imide, polyurethane, polyvinyl chloride, polyvinylidene chloride, polypropylene, polytetrafluoroethylene (PTFE), ABS resin, cellulose nanofiber, and the like.

[0297] By using the above material as a substrate, a lightweight semiconductor device can be provided. Furthermore, by using the above material as a substrate, a semiconductor device that is resistant to impact can be provided. Furthermore, by using the above material as a substrate, a semiconductor device that is less prone to damage can be provided. In addition, devices on which elements are provided on these substrates may also be used. Elements provided on the substrate include capacitive elements, resistive elements, switch elements, light-emitting elements, and memory elements.

[0298] [Insulating Layer] An inorganic insulating film can be used for the insulating layer (insulating layer 202, insulating layer 204, insulating layer 206, insulating layer 209, etc.). Examples of inorganic insulating films include oxide insulating films, nitride insulating films, oxidative nitride insulating films, and nitride oxide insulating films. Examples of oxide insulating films include silicon oxide film, aluminum oxide film, magnesium oxide film, gallium oxide film, germanium oxide film, yttrium oxide film, zirconium oxide film, lanthanum oxide film, neodymium oxide film, hafnium oxide film, tantalum oxide film, cerium oxide film, gallium zinc oxide film, and hafnium aluminate film. Examples of nitride insulating films include silicon nitride film and aluminum nitride film. Examples of oxidative nitride insulating films include silicon oxide nitride film, aluminum oxide nitride film, gallium oxide nitride film, yttrium oxide nitride film, and hafnium oxide nitride film. Examples of nitride oxide insulating films include silicon oxide nitride film and aluminum oxide nitride film. In addition, an organic insulating film may be used for the insulating layer of the semiconductor device.

[0299] In this specification, "oxide nitride" refers to a material in which the oxygen content is greater than the nitrogen content, and "nitride oxide" refers to a material in which the nitrogen content is greater than the oxygen content. For example, when "silicon oxynitride" is written, it refers to a material in which the oxygen content is greater than the nitrogen content, and when "silicon nitride oxide" is written, it refers to a material in which the nitrogen content is greater than the oxygen content. The content of each element can be measured using methods such as Rutherford backscattering (RBS).

[0300] For example, as transistors become smaller and more integrated, the thinning of the gate insulating film can lead to problems such as gate leakage current. Therefore, by using a material with a high relative permittivity (high-k) for the insulating layer that functions as the gate insulating film, it becomes possible to lower the gate voltage applied during transistor operation while maintaining the physical film thickness. Furthermore, it becomes possible to thin the equivalent oxide thickness (EOT) of the gate insulating film. Additionally, by using a material with a high relative permittivity for the insulating layer that functions as the dielectric of a capacitive element, the capacitance per unit area can be increased. On the other hand, by using a material with a low relative permittivity for the insulating layer that functions as an interlayer film, parasitic capacitance between wiring can be reduced. Therefore, materials can be selected according to the function of the insulating layer. It should be noted that materials with a low relative permittivity also have high dielectric strength.

[0301] Examples of materials with a high dielectric constant include aluminum oxide, gallium oxide, hafnium oxide, tantalum oxide, zirconium oxide, hafnium-zirconium oxide, oxides containing aluminum and hafnium, oxides containing aluminum and hafnium, oxides containing silicon and hafnium, oxides containing silicon and hafnium, and nitrides containing silicon and hafnium.

[0302] Examples of materials with a low dielectric constant include inorganic insulating materials such as silicon oxide, silicon oxide-nitride, and silicon nitride-oxide, as well as resins such as polyester, polyolefin, polyamide (nylon, aramid, etc.), polyimide, polycarbonate, and acrylic resin. Other inorganic insulating materials with a low dielectric constant include, for example, silicon oxide with added fluorine, silicon oxide with added carbon, and silicon oxide with added carbon and nitrogen. Also, for example, silicon oxide with vacancies can be used. These silicon oxides may contain nitrogen.

[0303] [Conductive Layers] For the conductive layers used in the transistor 200 (conductive layer 205, conductive layer 208, conductive layer 215, etc.), it is preferable to use metal elements selected from aluminum, chromium, copper, silver, gold, platinum, zinc, tantalum, nickel, titanium, iron, cobalt, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum, etc., alloys composed of the above metal elements, or alloys combining the above metal elements. As alloys composed of the above metal elements, nitrides of the alloy or oxides of the alloy may be used. For example, it is preferable to use tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, oxides containing lanthanum and nickel, etc. Alternatively, highly conductive semiconductors such as polycrystalline silicon containing impurity elements like phosphorus, or silicides such as nickel silicide, may be used.

[0304] Furthermore, it is preferable to use conductive materials that are resistant to oxidation, conductive materials that have a function to suppress oxygen diffusion, or materials that maintain conductivity even when absorbing oxygen. Examples of such materials include nitrogen-containing conductive materials such as tantalum-containing nitrides, titanium-containing nitrides, molybdenum-containing nitrides, tungsten-containing nitrides, ruthenium-containing nitrides, tantalum and aluminum-containing nitrides, and titanium and aluminum-containing nitrides. Examples of oxygen-containing conductive materials include ruthenium oxide, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel. Examples of materials containing metallic elements such as titanium, tantalum, and ruthenium are also included. Examples of oxygen-containing conductive materials include materials containing tungsten oxide and indium oxide, materials containing titanium oxide and indium oxide, indium tin oxide (also known as ITO), indium tin oxide containing titanium oxide, indium tin oxide containing silicon oxide (also known as ITSO), indium zinc oxide (also known as IZO®), and indium zinc oxide containing tungsten oxide. In this specification, a conductive layer formed using an oxygen-containing conductive material may be referred to as an oxide conductive layer.

[0305] Furthermore, it is preferable to use tungsten, copper, or aluminum as materials with high electrical conductivity.

[0306] Furthermore, multiple conductive layers formed from the above materials may be used in a laminated structure. For example, a laminated structure may be formed by combining a material containing the above-mentioned metal element with a conductive material containing oxygen. Alternatively, a laminated structure may be formed by combining a material containing the above-mentioned metal element with a conductive material containing nitrogen. Alternatively, a laminated structure may be formed by combining a material containing the above-mentioned metal element with a conductive material containing oxygen and a conductive material containing nitrogen.

[0307] For example, in transistor 200A or transistor 200B, when an oxide semiconductor, which is a type of metal oxide, is used for the semiconductor layer 203, a laminated structure combining a material containing the aforementioned metal element and a conductive material containing oxygen may be used for conductive layers that function as gate electrodes, such as conductive layer 205 and conductive layer 215. In this case, the conductive material containing oxygen may be provided on the semiconductor layer 203 side. By providing the conductive material containing oxygen on the semiconductor layer 203 side, oxygen detached from the conductive material is more easily supplied to the channel formation region of the semiconductor layer 203.

[0308] Furthermore, when an oxide semiconductor, which is a type of metal oxide, is used as the semiconductor layer 203, the conductive layer 208 in contact with the semiconductor layer 203 may be made of a conductive material that is resistant to oxidation, a conductive material that maintains low electrical resistance even when oxidized, a conductive metal oxide (also called an oxide conductor), or a conductive material that has the function of suppressing oxygen diffusion. Examples of such conductive materials include conductive materials containing nitrogen and conductive materials containing oxygen. This makes it possible to suppress a decrease in the conductivity of the conductive layer 208.

[0309] By using an oxygen-containing conductive material as the conductive layer 208, conductivity can be maintained even if the conductive layer 208 absorbs oxygen. For example, even when an insulating layer containing excess oxygen is used as the insulating layer in contact with the conductive layer 208, the conductive layer 208 can maintain its conductivity. Examples of materials that can be used as the conductive layer 208 include ITO, ITSO, and IZO (registered trademarks).

[0310] [Semiconductor layer] As the semiconductor layer (semiconductor layer 203, etc.), single-crystal semiconductors, polycrystalline semiconductors, microcrystalline semiconductors, or amorphous semiconductors can be used individually or in combination.

[0311] As the semiconductor layer, a semiconductor composed of a single element or a compound semiconductor may be used. Examples of semiconductors composed of single elements include silicon and germanium. Examples of compound semiconductors include gallium arsenide, silicon carbide, and silicon germanium. Other examples of compound semiconductors include organic semiconductors and nitride semiconductors. Oxide semiconductors are also a type of compound semiconductor. These semiconductor materials may contain impurities as dopants.

[0312] When silicon is used as a semiconductor layer, examples of silicon that can be used for the semiconductor layer include single-crystal silicon, polycrystalline silicon, microcrystalline silicon, and amorphous silicon. As an example of polycrystalline silicon, low-temperature polysilicon (LTPS) is used.

[0313] For example, in transistor 200A or transistor 200B, if silicon is used for the semiconductor layer 203, it is possible to make the transistor function as an n-type transistor by including phosphorus or arsenic as an n-type dopant in regions 203a and 203b of the semiconductor layer 203. Furthermore, it is possible to make the transistor function as a p-type transistor by including boron as a p-type dopant in regions 203a and 203b of the semiconductor layer 203. Note that if both n-type and p-type dopants are present in regions 203a and 203b of the semiconductor layer 203, the conductivity type with the higher dopant concentration is more likely to manifest.

[0314] Furthermore, a two-dimensional material that functions as a semiconductor may be used as the semiconductor layer. Two-dimensional materials are also called layered materials and are a general term for a group of materials that have a layered crystalline structure. Layered materials have high conductivity within a unit layer (also called high two-dimensional conductivity). By using a material that functions as a semiconductor and has high two-dimensional conductivity as the semiconductor layer, it is possible to provide a transistor with a large on-current.

[0315] Examples of the above layer material include graphene, silicene, chalcogenides, etc. A chalcogenide is a compound containing a chalcogen (an element belonging to Group 16). Examples of chalcogenides also include transition metal chalcogenides, Group 13 chalcogenides, etc. Specific examples of transition metal chalcogenides applicable as the semiconductor layer include molybdenum sulfide (typically MoS ２ ), molybdenum selenide (typically MoSe ２ ), molybdenum telluride (typically MoTe ２ ), tungsten sulfide (typically WS ２ ), tungsten selenide (typically WSe ２ ), tungsten telluride (typically WTe ２ ), hafnium sulfide (typically HfS ２ ), hafnium selenide (typically HfSe ２ ), zirconium sulfide (typically ZrS ２ ), zirconium selenide (typically ZrSe ２ ), etc.

[0316] Also, an oxide semiconductor, which is a kind of metal oxide, may be used as the semiconductor layer. At this time, the bandgap of the metal oxide is preferably 2.0 eV or more, more preferably 2.5 eV or more. By using a metal oxide with a large bandgap as the semiconductor layer, the off-current of the transistor can be significantly reduced. Since the OS transistor has a small off-current, the power consumption of the semiconductor device can be reduced.

[0317] In a transistor using an oxide semiconductor as the semiconductor layer, it is preferable that the channel formation region of the transistor has less oxygen deficiency or a lower impurity concentration (for example, the concentration of hydrogen, nitrogen, metal elements, etc.) than the source region and the drain region. Also, since VH (a defect in which hydrogen enters an oxygen deficiency) may be formed by hydrogen near the oxygen deficiency and electrons serving as carriers may be generated, V Ｏ H (a defect in which hydrogen enters an oxygen deficiency) is formed and electrons serving as carriers may be generated. Therefore, V ＯIt is also preferable that H is low. Thus, the channel formation region of the transistor is a high-resistance region with a low carrier concentration. Therefore, the channel formation region of the transistor can be said to be type i (intrinsic) or substantially type i.

[0318] Furthermore, the source and drain regions of the transistor have more oxygen vacancies than the channel formation region. Ｏ It is preferable that there is a high amount of H or a high impurity concentration. Thus, the source region and drain region of the transistor have a higher carrier concentration and are low-resistance n-type regions than the channel formation region.

[0319] <Oxide Semiconductor Layer> Next, an oxide semiconductor layer that can be used as a semiconductor layer of a transistor according to one aspect of the present invention will be described.

[0320] The oxide semiconductor layer preferably contains a crystalline metal oxide. Examples of crystalline metal oxide structures include CAAC (c-axis aligned crystal) structure, polycrystalline structure, microcrystalline structure, and nanocrystalline (nc: nano-crystal) structure. By using a crystalline metal oxide in the oxide semiconductor layer, the defect level density in the oxide semiconductor layer can be reduced. Therefore, the reliability of transistors using oxide semiconductor layers can be improved, and the reliability of semiconductor devices on which such transistors are mounted can be improved.

[0321] The oxide semiconductor layer is preferably a metal oxide having a CAAC structure. A CAAC structure is a crystalline structure in which multiple nanocrystals (typically multiple nanocrystals having a hexagonal crystal structure) are oriented along the c axis, and in the a-b plane, the multiple nanocrystals are linked together without orientation. Furthermore, when a cross-section of an oxide semiconductor layer having a CAAC structure is observed using a high-resolution transmission electron microscope (TEM), it can be confirmed that metal atoms are arranged in layers in the crystalline portion. Therefore, an oxide semiconductor layer having a CAAC structure can also be said to have a structure with layered crystalline portions.

[0322] The crystallinity of an oxide semiconductor layer can be analyzed, for example, by X-ray diffraction (XRD), TEM, or electron diffraction (ED). Alternatively, a combination of these methods may be used for analysis.

[0323] The crystallinity of the semiconductor material in the oxide semiconductor layer is not particularly limited. For example, the oxide semiconductor layer may include one or more amorphous semiconductors (semiconductors with an amorphous structure), single-crystal semiconductors (semiconductors with a single-crystal structure), or semiconductors with crystalline properties other than single crystals (microcrystalline semiconductors, polycrystalline semiconductors, or semiconductors with crystalline regions in part). The crystallinity of the oxide semiconductor layer may suppress the degradation of transistor characteristics.

[0324] Examples of metal oxides include indium oxide, gallium oxide, and zinc oxide. Preferably, the metal oxide contains at least indium (In). Preferably, the metal oxide contains at least indium (In) or zinc (Zn). Preferably, the metal oxide contains two or three elements selected from indium, element M, and zinc. Element M is a metallic or metalloid element with a high bond energy to oxygen; for example, a metallic or metalloid element with a higher bond energy to oxygen than indium. Specific examples of element M include aluminum, gallium, tin, yttrium, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, zirconium, molybdenum, hafnium, tantalum, tungsten, lanthanum, cerium, neodymium, magnesium, calcium, strontium, barium, boron, silicon, germanium, and antimony. The element M present in the metal oxide is preferably one or more selected from the above elements, more preferably one or more selected from aluminum, gallium, tin, and yttrium, and even more preferably gallium. When element M is gallium, the metal oxide preferably has one or more selected from indium, gallium, and zinc. In this specification, metal elements and metalloid elements are sometimes collectively referred to as "metal elements," and the "metal elements" described in this specification may include metalloid elements.

[0325] Examples of metal oxides include indium oxide. Other examples of metal oxides include indium zinc oxide (In-Zn oxide), indium tin oxide (In-Sn oxide), indium titanium oxide (In-Ti oxide), indium gallium oxide (In-Ga oxide), indium gallium aluminum oxide (In-Ga-Al oxide), indium gallium tin oxide (In-Ga-Sn oxide, also written as IGTO), indium tungsten oxide (In-W oxide), gallium zinc oxide (Ga-Zn oxide, also written as GZO), and aluminum zinc oxide (Al-Zn oxide, A Examples include indium aluminum zinc oxide (also written as ZO), indium aluminum zinc oxide (In-Al-Zn oxide, also written as IAZO), indium tin zinc oxide (also written as In-Sn-Zn oxide), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium zinc oxide (In-Ga-Zn oxide, also written as IGZO), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide, also written as IGZTO), and indium gallium aluminum zinc oxide (In-Ga-Al-Zn oxide, also written as IGAZO or IAGZO). In addition, examples of metal oxides include indium tin oxide containing silicon oxide (also called ITSO), gallium tin oxide (Ga-Sn oxide), and aluminum tin oxide (Al-Sn oxide).

[0326] By increasing the ratio of indium atoms to the sum of all metal element atoms contained in the metal oxide (also called the indium (In) content), the transistor can obtain at least one of a large on-current and high frequency characteristics.

[0327] The metal oxide may contain one or more metal elements with higher periodic numbers in the periodic table, instead of indium. Alternatively, the metal oxide may contain one or more metal elements with higher periodic numbers in the periodic table, in addition to indium. The greater the overlap of the metal element orbitals, the greater the carrier conduction in the metal oxide tends to be. Therefore, including metal elements with higher periodic numbers in the periodic table can sometimes increase the field-effect mobility of the transistor. Examples of metal elements with higher periodic numbers in the periodic table include metal elements belonging to the 5th period and metal elements belonging to the 6th period. Specifically, examples of such metal elements include yttrium, zirconium, silver, cadmium, tin, antimony, barium, lead, bismuth, lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium. Lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium are called light rare earth elements.

[0328] Furthermore, metal oxides may contain one or more nonmetallic elements. The presence of nonmetallic elements in metal oxides can sometimes increase the field-effect mobility of transistors. Examples of nonmetallic elements include carbon, nitrogen, phosphorus, sulfur, selenium, fluorine, chlorine, bromine, and hydrogen.

[0329] Furthermore, by increasing the ratio of zinc atoms to the sum of the total number of atoms of all metal elements contained in the metal oxide, a highly crystalline metal oxide is obtained, which suppresses the diffusion of impurities in the metal oxide. Therefore, fluctuations in the electrical properties of the transistor are suppressed, and reliability can be improved.

[0330] Furthermore, by increasing the ratio of element M atoms to the sum of the total number of atoms of all metal elements contained in the metal oxide, the formation of oxygen vacancies in the metal oxide can be suppressed. Therefore, carrier generation caused by oxygen vacancies is suppressed, resulting in a transistor with low off-current. In addition, fluctuations in the electrical characteristics of the transistor are suppressed, and reliability can be improved.

[0331] Furthermore, the contents of this embodiment can be combined as appropriate. Also, the contents of this embodiment can be combined as appropriate with the contents of other embodiments, etc.

[0332] (Embodiment 3) In this embodiment, an example of a layout when the transistor shown in Embodiment 2 is applied to the semiconductor device shown in Embodiment 1 described above will be explained. Here, as an example, an example of the layout of the semiconductor device 100 shown in Figure 1 will be explained.

[0333] <Layout Example> Figure 32 is a top view showing an example of a layout when the transistor 200A shown in Figures 30A to 30C is used as the transistor constituting the semiconductor device 100 shown in Figure 1. Figure 33A is a cross-sectional view between A1 and A2 shown by the dashed line in Figure 32. Figure 33B is a cross-sectional view between A3 and A4 shown by the dashed line in Figure 32. Figure 33C is a cross-sectional view between A5 and A6 shown by the dashed line in Figure 32.

[0334] Furthermore, at least one of transistors M11 to M14 may be replaced with transistor 200B shown in Figures 31A to 31C. In that case, the connection destinations of the back gates of each of transistors M11 to M14 can be appropriately referred to in the description of the semiconductor device 100 shown in Figure 20.

[0335] Figure 32 illustrates semiconductor layers ac11, ac12, ac13, and ac14, which correspond to semiconductor layer 203 on the insulating layer 202. It also illustrates conductive layers ge01, ge02, ge03, ge04, ge05, ge06, and ge07, which correspond to conductive layer 205 on the insulating layer 204. Furthermore, it illustrates conductive layers me01, me02, me03, me04, me05, me06, me07, me08, and me09, which correspond to conductive layer 208 on the insulating layer 206. Finally, it illustrates conductive layer sm01, which is a conductive layer on the insulating layer 209.

[0336] Semiconductor layer ac11 has a channel formation region for transistor M11. Semiconductor layer ac12 has a channel formation region for transistor M12. Semiconductor layer ac13 has a channel formation region for transistor M13. Semiconductor layer ac14 has a channel formation region for transistor M14.

[0337] Conductive layer ge01 has a region that functions as wiring VL12. Conductive layer ge02 has a region that functions as the gate of transistor M11 and a region that functions as wiring GL11. Conductive layer ge03 has a region that functions as the other terminal of capacitive element C11 and a region that functions as the other terminal of capacitive element C12 and a region that functions as wiring VL12. Conductive layer ge04 has a region that functions as the gate of transistor M12 and a region that functions as node ND11. Conductive layer ge05 has a region that functions as the gate of transistor M14 and a region that functions as node ND12. Conductive layer ge06 has a region that functions as the gate of transistor M13 and a region that functions as wiring GL12. Conductive layer ge07 has a region that functions as wiring VL11.

[0338] Conductive layer me01 has a region that functions as the other source or drain of transistor M11 and a region that functions as wiring SL. Conductive layer me02 has a region that functions as the other source or drain of transistor M14 and a region that functions as wiring CATH. Conductive layer me03 has a region that functions as wiring VL11. Conductive layer me04 has a region that functions as the other source or drain of transistor M12 and a region that functions as wiring VL12. Conductive layer me05 has a region that functions as one source or drain of transistor M11 and a region that functions as node ND11. Conductive layer me06 has a region that functions as one terminal of capacitive element C11 and a region that functions as node ND11. Conductive layer me07 has a region that functions as one source or drain of transistor M12, a region that functions as one source or drain of transistor M13, a region that functions as one terminal of capacitive element C12 and a region that functions as node ND12. The conductive layer me08 has a region that functions as either the source or the drain of transistor M14, and a region that functions as node ND13. The conductive layer me09 has a region that functions as the other source or drain of transistor M13, and a region that functions as wiring VL11.

[0339] The conductive layer sm01 has a region that functions as node ND13.

[0340] Conductive layer me03 is connected to conductive layer ge07 through an opening in the insulating layer 206. Conductive layer me04 is connected to conductive layer ge01 through an opening in the insulating layer 206. Conductive layer me04 is also connected to conductive layer ge03 through an opening in the insulating layer 206. Conductive layer me05 is connected to conductive layer ge04 through an opening in the insulating layer 206. Conductive layer me06 is connected to conductive layer ge04 through an opening in the insulating layer 206. Conductive layer me07 is connected to conductive layer ge05 through an opening in the insulating layer 206. Conductive layer me08 is connected to conductive layer sm01 through an opening in the insulating layer 209. Conductive layer me09 is connected to conductive layer ge07 through an opening in the insulating layer 206. Figure 33A illustrates how the conductive layer me04 and conductive layer ge03 are connected to each other at an opening in the insulating layer 206. Figure 33C illustrates how the conductive layer me07 and conductive layer ge05 are connected to each other at an opening in the insulating layer 206.

[0341] The conductive layer sm01 has a region that functions as one terminal or the other terminal of the light-emitting element LD. Therefore, it can also be said that the conductive layer sm01 has a region that functions as a pixel electrode. Although not shown in the figures, the conductive layer sm01 may be provided on an insulating layer 218 that covers the insulating layer 209. In this case, the conductive layer sm01 may be connected to the conductive layer me08 at openings provided in the insulating layer 218 and the insulating layer 209.

[0342] As shown in Figure 32, the region where the semiconductor layer 203 (semiconductor layers ac11 to ac14) overlaps with the conductive layer 205 (conductive layers ge01 to ge07) functions as the channel formation region of the transistor (corresponding to the channel formation region 203c in Figures 30A to 30C). Therefore, the channel length of the transistor (corresponding to the channel length Lch in Figure 30B) corresponds to the width of the conductive layer 205 in the direction in which the semiconductor layer 203 extends, in the region where the semiconductor layer 203 and the conductive layer 205 overlap each other. Figure 33A shows the channel length Lch12 of transistor M12. Figure 33B shows the channel length Lch14 of transistor M14. Furthermore, the channel width of the transistor (corresponding to the channel width Wch in Figure 30C) corresponds to the width of the semiconductor layer 203 in the direction in which the conductive layer 205 extends, in the region where the semiconductor layer 203 and the conductive layer 205 overlap each other. Furthermore, the area of ​​the channel formation region of the transistor (corresponding to channel length × channel width) corresponds to the area of ​​the region where the semiconductor layer 203 and the conductive layer 205 overlap each other.

[0343] As described in Embodiment 1 above, it is preferable to increase the saturation of transistor M12, which functions as a constant current source. To this end, the channel length of transistor M12 (corresponding to channel length Lch12) may be made larger than the channel length of transistor M14 (corresponding to channel length Lch14). Alternatively, the channel length of transistor M12 may be made larger than the respective channel lengths of transistors M11 and M13. This allows a stable drain current to flow through transistor M12, which functions as a current source, and stabilizes the light emission time of the light-emitting element LD. Therefore, the luminescence brightness of the display device can be stabilized, and the display quality can be improved.

[0344] Furthermore, as described in Embodiment 1 above, it is preferable to reduce the gate capacitance of each of the transistors M11, M13, and M14 that function as switches. To this end, the area of ​​the channel formation region of each of the transistors M11, M13, and M14 may be made smaller than the area of ​​the channel formation region of transistor M12. This makes it possible to improve at least one of the operating speed and resolution of the display device.

[0345] Furthermore, in order to increase the channel length of transistor M12, the channel formation region of transistor M12 may have a bent shape in one or more places (for example, an L-shape, a U-shape, an S-shape, a meandering shape, etc.). For example, in the channel formation region of transistor M12, one or both of the semiconductor layer ac12 and the conductive layer ge04 may have a bent shape in one or more places. This increases the channel length of transistor M12 and allows for efficient arrangement of transistor M12. Figure 32 shows an example in which the channel formation region of transistor M12 has a meandering shape due to having a bent shape in multiple places.

[0346] Furthermore, for example, two or more transistors may share a semiconductor layer 203 that is provided in a continuous manner. For example, although not shown, transistors M12 and M13 may share a semiconductor layer 203 that is provided in a continuous manner. This allows for a reasonable reduction in conductive layers and vias used to connect the semiconductor layers 203 to each other. As a result, the layout area can be reduced, and the resolution of the display device can be improved.

[0347] As shown in Figure 32, the capacitive element C11 can be configured such that a portion of the insulating layer 206 functions as a dielectric in the region where the conductive layer ge03 and the conductive layer me06 overlap each other. The capacitive element C12 can be configured such that a portion of the insulating layer 206 functions as a dielectric in the region where the conductive layer ge03 and the conductive layer me07 overlap each other. As an example, Figure 33B shows a capacitive element C11 in which a portion of the insulating layer 206 functions as a dielectric and portions of the conductive layer ge03 and the conductive layer me06 each function as a pair of terminals. Also as an example, Figure 33B shows a capacitive element C12 in which a portion of the insulating layer 206 functions as a dielectric and portions of the conductive layer ge03 and the conductive layer me07 each function as a pair of terminals.

[0348] As described in Embodiment 1 above, the capacitance of the capacitive element C12 may be made larger than the capacitance of the capacitive element C11. To achieve this, the area of ​​the capacitive element C12 (corresponding here to the area of ​​the region where the conductive layer ge03 and the conductive layer me07 overlap) can be made larger than the area of ​​the capacitive element C11 (corresponding here to the area of ​​the region where the conductive layer ge03 and the conductive layer me06 overlap).

[0349] In Figure 32, in the capacitive element C12, the conductive layer me07 is positioned inside the outer edge of the conductive layer ge03, except for the lead-out portion (in some cases, the conductive layer ge03 is positioned to encompass the conductive layer me07). For example, in the capacitive element C12, the outer edge of the region of the conductive layer ge03 that overlaps with the conductive layer me07 has a portion that is inscribed within the outer edge of the conductive layer ge03 and a portion that is not inscribed within the outer edge of the conductive layer ge03, and the sum of the lengths of the portions that are not inscribed within the outer edge of the conductive layer ge03 is greater than the sum of the lengths of the portions that are inscribed within the outer edge of the conductive layer ge03. Alternatively, although not shown, for example, the entire outer edge of the region may be positioned inside the outer edge of the conductive layer ge03 without being inscribed within the outer edge of the conductive layer ge03. As a result, the region of the capacitive element C12 that functions as a dielectric is composed of an insulating layer 206 with a uniform thickness. Therefore, it is possible to reduce either or both the capacitance error (here, the difference between the design value and the actual value) and the variation (here, the degree of dispersion of the actual value) of the capacitance element C12.

[0350] Although not shown in the diagram, in the capacitive element C12, the conductive layer ge03 may be positioned inside the outer edge of the conductive layer me07, except for the lead-out portion (in some cases, the conductive layer me07 may be positioned so as to encompass the conductive layer ge03). This allows the insulating layer between the end of the conductive layer ge03 and the conductive layer me07 covering it to also be used as a dielectric for the capacitive element C12. As a result, it becomes easier to increase the capacitance per unit area of ​​the capacitive element C12, and the layout area can be reduced. Thus, the resolution of the display device can be improved.

[0351] Here, the light emission time of the light-emitting element LD depends on the capacitance of the capacitive element C12. Therefore, it is preferable that one or both of the error and variation in the capacitance of the capacitive element C12 be small. For this reason, as shown in Figure 32, it is preferable that the conductive layer me07 is arranged inside the outer edge of the conductive layer ge05, excluding the lead-out portion. This makes it possible to reduce one or both of the error and variation in the capacitance of the capacitive element C12. Thus, for example, when the semiconductor device 100 is used as a pixel in a display device to perform PWM control, it is possible to suppress variations in the light emission time of the light-emitting element LD and improve the display quality.

[0352] Furthermore, in the capacitive element C12, when the conductive layer me07 is positioned inside the outer edge of the conductive layer ge03, excluding the lead-out portion, the area in which the conductive layer me07 covers the edge of the conductive layer ge03 can be reduced compared to when the conductive layer ge03 is positioned inside the outer edge of the conductive layer me07, excluding the lead-out portion. Therefore, the concern that dielectric breakdown of the insulating layer 206 may occur due to electric field concentration on the insulating layer 206 at the edge of the conductive layer ge03 can be reduced. Thus, reliability can be improved.

[0353] Furthermore, in Figure 32, the conductive layer me06 of the capacitive element C11 is arranged inside the outer edge of the conductive layer ge03, excluding the lead-out portion (in some cases, the conductive layer ge03 is arranged to encompass the conductive layer me06). This reduces either or both of the capacitance error and variation of the capacitive element C11, thereby improving display quality. It also improves reliability. Although not shown, the conductive layer ge03 may also be arranged inside the outer edge of the conductive layer me06, excluding the lead-out portion (in some cases, the conductive layer me06 is arranged to encompass the conductive layer ge03). This makes it easier to increase the capacitance per unit area of ​​the capacitive element C11 and reduces the layout area. Therefore, the resolution of the display device can be improved.

[0354] Outside the regions where capacitive elements C11 and C12 are located, the regions where conductive layers overlap each other via an insulating layer (for example, the region where conductive layer 205 (conductive layers ge01 to ge07) and conductive layer 208 (conductive layers me01 to me09) overlap each other) become parasitic capacitances where a part of the insulating layer (for example, insulating layer 206) functions as a dielectric. Therefore, it is preferable that the area of ​​the region where the conductive layers that form the parasitic capacitance overlap each other is smaller than the area of ​​capacitive element C11 (here, this corresponds to the area where conductive layer ge03 and conductive layer me06 overlap each other). Furthermore, it is preferable that the area of ​​the region where the conductive layers that form the parasitic capacitance overlap each other is smaller than the area of ​​capacitive element C12 (here, this corresponds to the area where conductive layer ge03 and conductive layer me07 overlap each other).

[0355] Therefore, in Figure 32, for example, it is preferable that the area of ​​the capacitive element C11 is larger than the area of ​​the region where the conductive layer ge03 and the conductive layer 208 other than the conductive layer me06 overlap each other. Also, it is preferable that the area of ​​the capacitive element C11 is larger than the area of ​​the region where the conductive layer 205 other than the conductive layer ge03 and the conductive layer me06 overlap each other. Also, for example, it is preferable that the area of ​​the capacitive element C12 is larger than the area of ​​the region where the conductive layer ge03 and the conductive layer 208 other than the conductive layer me07 overlap each other. Also, it is preferable that the area of ​​the capacitive element C12 is larger than the area of ​​the region where the conductive layer 205 other than the conductive layer ge03 and the conductive layer me07 overlap each other.

[0356] Although not shown in the figures, a configuration may be used in which, for example, a part of the insulating layer 204 functions as a dielectric, and a part of the semiconductor layer 203 and the conductive layer 205 each functions as a pair of terminals. Alternatively, for example, a configuration may be used in which a part of the insulating layer 204 and the insulating layer 206 each functions as a dielectric, and a part of the semiconductor layer 203 and the conductive layer 208 each functions as a pair of terminals. Alternatively, for example, a conductive layer (not shown) may be provided between the substrate 201 and the insulating layer 202, and a part of the insulating layer 202 and the insulating layer 204 each functions as a dielectric, and a part of the conductive layer (not shown) and the conductive layer 205 each functions as a pair of terminals. Alternatively, for example, a conductive layer (not shown) may be provided between the substrate 201 and the insulating layer 202, and a part of the insulating layer 202 functions as a dielectric, and a part of the conductive layer (not shown) and the semiconductor layer 203 each functions as a pair of terminals.

[0357] As shown in Figure 32, the direction in which the conductive layer ge02, which has a region functioning as wiring GL11 connected to the gate driver, extends, and the direction in which the conductive layer me01, which has a region functioning as wiring SL connected to the source driver, extends are orthogonal to each other. Therefore, there is concern that parasitic capacitance in the region where conductive layers ge02 and me01 overlap may affect the circuit operation. Thus, although not shown, in order to suppress the effects of these parasitic capacitances, for example, the wiring width of conductive layer ge02 may be selectively reduced in the region where conductive layers ge02 and me01 overlap, or an opening may be formed in conductive layer ge02. Alternatively, the wiring width of conductive layer me01 may be selectively reduced, or an opening may be formed in conductive layer me01. This reduces parasitic capacitance, thereby improving the operating speed of the display device.

[0358] The same applies to other conductive layers such as conductive layer ge01, conductive layer ge06, conductive layer ge07, conductive layer me02, conductive layer me03, and conductive layer me04. The same also applies to overlaps between other conductive layers where parasitic capacitance can be formed.

[0359] As shown in Figure 32, as an example, the direction in which wiring VL11 (corresponding to conductive layer me03) extends is parallel to the direction in which wiring SL (corresponding to conductive layer me01), etc. extends, and perpendicular to the direction in which wiring GL11 (corresponding to conductive layer ge02) and wiring GL12 (corresponding to conductive layer ge06), etc. extends. Also as an example, the direction in which wiring VL12 (corresponding to conductive layer ge01) extends is perpendicular to the direction in which wiring SL, etc. extends, and parallel to the direction in which wiring GL11 and wiring GL12, etc. extend.

[0360] First, we will explain the technical significance of making the direction in which the wiring VL11 extends parallel to the direction in which the wiring SL extends. During the operation of the semiconductor device 100, in period T12, the potential of the wiring VL11 is supplied to node ND12 via transistor M13, so a transient current flows through the wiring VL11. At this time, if the direction in which the wiring VL11 extends is perpendicular to the direction in which the wiring SL extends, the amount of current flowing through the wiring VL11 is the sum of the amounts of current supplied to each node ND12 of the multiple semiconductor devices 100 arranged in the row direction. On the other hand, as shown in Figure 32, if the direction in which the wiring VL11 extends is parallel to the direction in which the wiring SL extends, the amount of current flowing through the wiring VL11 is the amount of current supplied to node ND12 of one semiconductor device 100. Therefore, by making the direction in which wiring VL11 extends parallel to the direction in which wiring SL extends, the amount of current flowing through wiring VL11 can be reduced compared to the case where the direction in which wiring VL11 extends is perpendicular to the direction in which wiring SL extends. As a result, for example, the effects of voltage drop in wiring VL11 can be suppressed, thereby stabilizing operation. In addition, for example, the likelihood of wiring breakage or short circuits due to electromigration is reduced, thereby improving reliability.

[0361] Next, the technical significance of orienting the direction in which wiring VL12 extends perpendicular to the direction in which wiring SL extends will be explained. In the layout of the semiconductor device 100, for example, the length of wiring SL connected to the source driver may be greater than the length of wiring GL11 and GL12 connected to the gate driver. Therefore, for example, by orienting the direction in which wiring VL12 extends perpendicular to the direction in which wiring SL extends, wiring VL12 can be arranged efficiently. This can suppress an increase in the layout area and improve the resolution of the display device.

[0362] Furthermore, in order to efficiently arrange the wiring VL11, the direction in which the wiring VL11 extends may be perpendicular to the direction in which the wiring SL extends. Also, in order to suppress the voltage drop in the wiring VL12, the direction in which the wiring VL12 extends may be parallel to the direction in which the wiring SL extends.

[0363] Figure 34 shows a modified version of the layout shown in Figure 32. As shown in Figure 34, each of the wiring VL12 and wiring CATH may be provided with a region extending perpendicular to the direction in which the wiring SL extends and a region extending parallel to the direction in which the wiring SL extends.

[0364] The technical significance of this layout will now be explained. In order to stabilize the drain current flowing through transistor M12, it is preferable to stabilize the gate voltage applied to transistor M12. For this reason, it is preferable to reduce the electrical resistance of wiring VL12 and suppress the voltage drop in wiring VL12. In order to reduce the electrical resistance of wiring VL12, for example, wiring VL12 may be provided to have a region that extends perpendicular to the direction in which wiring SL extends and a region that extends parallel to the direction in which wiring SL extends. By doing so, the electrical resistance of wiring VL12 is reduced and the voltage drop in wiring VL12 is suppressed, thereby stabilizing the gate voltage applied to transistor M12. As a result, the drain current flowing through transistor M12 can be stabilized, and the light emission time of the light-emitting element LD can be stabilized. Therefore, the light emission brightness of the display device can be stabilized, and the display quality can be improved.

[0365] Furthermore, in order to stabilize the gate voltage applied to transistor M14, it is preferable to reduce the electrical resistance of the wiring CATH and suppress the voltage drop in the wiring CATH. To reduce the electrical resistance of the wiring CATH, for example, the wiring CATH may be provided to have a region extending parallel to the direction in which the wiring SL extends and a region extending perpendicular to the direction in which the wiring SL extends. By doing so, the electrical resistance of the wiring CATH is reduced, the voltage drop in the wiring CATH is suppressed, and the gate voltage applied to transistor M14 can be stabilized. This makes it possible to stabilize the light emission time of the light-emitting element LD. Thus, the light emission brightness of the display device can be stabilized, and the display quality can be improved.

[0366] Figure 34 shows the layout shown in Figure 32, as well as a conductive layer ge08 corresponding to the conductive layer 205 on the insulating layer 204. It also shows a conductive layer me10 corresponding to the conductive layer 208 on the insulating layer 206.

[0367] The conductive layer me10 has a region that functions as wiring VL12. The conductive layer me10 is connected to the conductive layer ge01 at an opening provided in the insulating layer 206. This makes it possible to orient the direction in which the conductive layer ge01 having the region that functions as wiring VL12 extends perpendicular to the direction in which the conductive layer me01 having the region that functions as wiring SL extends, and to orient the direction in which the conductive layer me10 having the region that functions as wiring VL12 extends parallel to the direction in which the conductive layer me01 having the region that functions as wiring SL extends. Although not shown, by arranging a plurality of semiconductor devices 100 in a matrix, the conductive layers ge01 of adjacent semiconductor devices 100 in the row direction are connected to each other, and the conductive layers me10 of adjacent semiconductor devices 100 in the column direction are connected to each other. As a result, the wiring VL12 can have a plurality of conductive layers ge01 extending in the row direction and a plurality of conductive layers me10 extending in the column direction.

[0368] The conductive layer ge08 has a region that functions as wiring CATH. The conductive layer ge08 is connected to the conductive layer me02 at an opening provided in the insulating layer 206. This makes it possible to orient the direction in which the conductive layer me02 having the region that functions as wiring CATH extends parallel to the direction in which the conductive layer me01 having the region that functions as wiring SL extends, and to orient the direction in which the conductive layer ge08 having the region that functions as wiring CATH extends perpendicular to the direction in which the conductive layer me01 having the region that functions as wiring SL extends. Although not shown, by arranging a plurality of semiconductor devices 100 in a matrix, the conductive layers ge08 of adjacent semiconductor devices 100 in the row direction are connected to each other, and the conductive layers me02 of adjacent semiconductor devices 100 in the column direction are connected to each other. As a result, the wiring CATH can have a plurality of conductive layers ge08 extending in the row direction and a plurality of conductive layers me02 extending in the column direction.

[0369] Furthermore, since the current supplied to the light-emitting element LD flows through the wiring CATH, the amount of current flowing through the wiring CATH may be greater than the amount of current flowing through the wiring VL12. For this reason, it is particularly preferable to reduce the electrical resistance of the wiring CATH. Therefore, it is preferable to make the width of the conductive layer me02 having a region that functions as wiring CATH greater than the width of the conductive layer me10 having a region that functions as wiring VL12. It is also preferable to make the width of the conductive layer ge08 having a region that functions as wiring CATH greater than the width of the conductive layer ge01 having a region that functions as wiring VL12. Furthermore, it is preferable to make the number of openings connecting the conductive layer me02 and the conductive layer ge08, which have regions that function as wiring CATH, greater than the number of openings connecting the conductive layer me10 and the conductive layer ge01, which have regions that function as wiring VL12.

[0370] Furthermore, the technical concepts, configurations, operations, and effects described in this embodiment are not limited to the semiconductor device 100 shown in Figure 2, but can be applied to various semiconductor devices 100 as shown in Embodiment 1 described above.

[0371] Furthermore, the contents of this embodiment can be combined as appropriate. Also, the contents of this embodiment can be combined as appropriate with the contents of other embodiments, etc.

[0372] (Embodiment 4) This embodiment describes a display device according to one aspect of the present invention.

[0373] Furthermore, at least a portion of the semiconductor device and display device described in Embodiment 1 described above can be applied to the display device shown in this embodiment and the module having said display device.

[0374] Here, examples of modules having the display device include modules to which a connector such as a flexible printed circuit board (FPC) or a TCP (Tape Carrier Package) is attached, or modules on which an integrated circuit (IC) is mounted using a COG (Chip On Glass) method or a COF (Chip On Film) method.

[0375] <Example of Display Device Configuration> Figure 35A is a perspective view showing an example of the configuration of a display device 400 according to one aspect of the present invention.

[0376] The display device 400 has a configuration in which substrate 409 and substrate 401 are bonded together. In Figure 35A, substrate 409 is shown with a dashed line.

[0377] The display device 400 includes a display unit 402, a circuit unit 403, a circuit unit 404, a connection unit 405, and a wiring unit 406. Figure 35A shows an example in which an IC chip 407 and an FPC 408 are mounted on the display device 400. Therefore, the configuration shown in Figure 35A can also be described as a display module having a display device 400, an IC chip, and an FPC.

[0378] Furthermore, at least a portion of the semiconductor device 100 and the display device 160 shown in Embodiment 1 above can be applied to the display device 400. For example, at least a portion of the gate driver unit 163, source driver unit 164, and control unit 167 shown in Embodiment 1 above can be applied to the circuit unit 403 and circuit unit 404. Also, for example, at least a portion of the pixel unit 162 shown in Embodiment 1 above can be applied to the display unit 402. Also, for example, at least a portion of the semiconductor device 100 shown in Embodiment 1 above can be applied to the display unit 402. Also, for example, at least a portion of the gate driver unit 163, source driver unit 164, and control unit 167 shown in Embodiment 1 above can be applied to the IC chip 407.

[0379] Circuit section 403 includes, for example, a scan line drive circuit (also called a gate driver or scan driver). Circuit section 404 also includes, for example, a signal line drive circuit (also called a source driver or data driver).

[0380] The wiring section 406 has the function of supplying signals and power to the display section 402, the circuit section 403, and the circuit section 404. These signals and power are input to the wiring section 406 from outside the display device 400 via the FPC 408, or from the IC chip 407 to the wiring section 406.

[0381] Figure 35A shows an example in which an IC chip 407 is provided on the substrate 401 using a COG (Camera-Owned Gauge) or COF (Camera-Owned Frame) method. The IC chip 407 can be, for example, an IC chip having one or both of a scan line drive circuit and a signal line drive circuit. The IC chip may also have a power supply circuit, a signal generation circuit, etc. The display device 400 and the display module may be configured without an IC chip. The IC chip may also be mounted on an FPC (Flexible Printed Circuit) using a COF method or the like.

[0382] Furthermore, a scan line driving circuit may be configured in either or both of the IC chip 407 and the circuit section 403. In this case, the IC chip 407 may be referred to as a gate driver IC. Alternatively, a signal line driving circuit may be configured in either or both of the IC chip 407 and the circuit section 404. In this case, the IC chip 407 may be referred to as a source driver IC.

[0383] The display unit 402 is the area in the display device 400 that displays images, and has a plurality of pixels 411 arranged periodically. Figure 35A shows a magnified view of one pixel 411.

[0384] The pixel 411 shown in Figure 35A has a pixel 412R that emits red (R) light, a pixel 412G that emits green (G) light, and a pixel 412B that emits blue (B) light. Full-color display can be achieved by configuring one pixel 411 with pixels 412R, 412G, and 412B. Pixels 412R, 412G, and 412B each function as sub-pixels. The display device 400 shown in Figure 35A shows an example in which the sub-pixels 412R, 412B, and 412G are arranged in a stripe pattern. Note that the number of sub-pixels constituting one pixel 411 is not limited to three, but may be four or more. For example, there may be four sub-pixels that emit R, G, B, and white (W) light, respectively. Alternatively, there may be four sub-pixels that emit R, G, B, and yellow (Y) light, respectively.

[0385] In this specification, elements related to red light may be denoted with the identification code "R," elements related to green light with the identification code "G," and elements related to blue light with the identification code "B" to explain each respective matter. In addition, common matters may be explained by not assigning these identification codes. For example, when it is necessary to distinguish between multiple pixels 412, they may be indicated as pixel 412R, pixel 412G, or pixel 412B. Also, when it is not necessary to distinguish between pixels 412R, pixel 412G, and pixel 412B, they may simply be indicated as pixel 412.

[0386] Each pixel 412R, pixel 412G, and pixel 412B includes a display element and a circuit (pixel circuit) that controls the driving of the display element.

[0387] The connection portion 405 is provided on the outside of the display portion 402. The connection portion 405 can be provided along one or more sides of the display portion 402. There may be one or more connection portions 405. Figure 35A shows an example in which the connection portion 405 is provided so as to surround all four sides of the display portion. At the connection portion 405, one of the pair of electrodes of the display element is connected to the wiring portion 406, and a potential can be supplied to one of the pair of electrodes.

[0388] The substrates 401 and 409 can be made of glass, quartz, ceramics, sapphire, resin, metal, alloy, or semiconductor, respectively. It is preferable to use a light-transmitting material for the substrate that extracts light from the display element (in this case, substrate 409). A polarizing plate may also be used as at least one of the substrates 401 and 409. Furthermore, flexible materials can be used for substrates 401 and 409. This increases the flexibility of the display device, enabling the creation of flexible displays (bendable displays, foldable displays, rollable displays, slidable displays, stretchable displays, etc.).

[0389] Furthermore, a display device according to one aspect of the present invention may also function as a touch panel. For example, various detection elements (also called sensor elements) capable of detecting the proximity or contact of an object to be detected, such as a finger, can be applied to the display device.

[0390] Examples of sensor types include capacitive, resistive, surface acoustic wave, infrared, optical, and pressure-sensitive sensors.

[0391] Examples of capacitance methods include surface capacitance and projected capacitance. Examples of projected capacitance methods include self-capacitance and mutual capacitance. Mutual capacitance is preferred because it enables simultaneous multi-point detection.

[0392] Examples of touch panels include out-cell, on-cell, and in-cell types. An in-cell touch panel refers to a configuration in which electrodes constituting a sensing element are provided on one or both of the substrate supporting the display element (also called a display device) and the opposing substrate.

[0393] [Pixel Arrangement] Figures 35B to 35F are top views illustrating the pixel arrangement. In a display device according to one embodiment of the present invention, there are no particular limitations on the pixel arrangement, and various arrangements can be applied. Examples of pixel arrangements include stripe arrangement (see Figure 35B), S-stripe arrangement (see Figure 35C), delta arrangement (see Figure 35D), zigzag arrangement (see Figure 35E), and pentile arrangement (see Figure 35F). Other examples include mosaic arrangement, diamond arrangement, and Bayer arrangement. The pentile arrangement shown in Figure 35F includes a pixel 411 composed of pixels 412R and 412G, and a pixel 411 composed of pixels 412B and 412G.

[0394] Furthermore, in Figures 35B to 35F, the top surface shape of each sub-pixel (pixel 412R, pixel 412G, and pixel 412B) can be, for example, a triangle, a quadrilateral (including rectangles and squares), a pentagon, a polygon with rounded corners, an ellipse, or a circle. Here, the top surface shape of each sub-pixel corresponds to the top surface shape of the display area of ​​the display element that each sub-pixel possesses. The top surface shape and size of each sub-pixel can be determined independently. The arrangement of pixels 412R, 412G, and 412B may be changed as appropriate. Also, the display element and the pixel circuit may be arranged in the same way or in different ways.

[0395] [Display Elements] Various elements can be used as display elements, for example, liquid crystal elements and light-emitting elements. In addition, display elements using shutter-type or optical interference-type MEMS (Micro Electro Mechanical Systems), microcapsule-type, electrophoretic-type, electrowetting-type, or electronic powder fluid (registered trademark)-type may also be used. Furthermore, QLED (Quantum-dot LED) using a light source and color conversion technology using quantum dot materials may also be used.

[0396] Examples of display devices using liquid crystal elements include transmissive liquid crystal display devices, reflective liquid crystal display devices, and semi-transmissive liquid crystal display devices.

[0397] Modes that can be used in display devices using liquid crystal elements include, for example, Vertical Alignment (VA) mode, FFS (Fringe Field Switching) mode, IPS (In-Plane-Switching) mode, TN (Twisted Nematic) mode, ASM (Axially Symmetric aligned Micro-cell) mode, OCB (Optically Compensated Birefringence) mode, FLC (Ferroelectric Liquid Crystal) mode, AFLC (AntiFerroelectric Liquid Crystal) mode, and ECB (Electrically Examples of VA modes include Controlled Birefringence mode and guest host mode. Examples of VA modes include MVA (Multi-Domain Vertical Alignment) mode, PVA (Patterned Vertical Alignment) mode, and ASV (Advanced Super View) mode.

[0398] Examples of liquid crystal materials that can be used in liquid crystal elements include thermotropic liquid crystals, low molecular weight liquid crystals, polymer liquid crystals, polymer dispersed liquid crystals (PDLC), polymer network liquid crystals (PNLC), ferroelectric liquid crystals, and antiferroelectric liquid crystals. Depending on the conditions, these liquid crystal materials exhibit a cholesteric phase, smectic phase, cubic phase, chiral nematic phase, isotropic phase, or blue phase. Furthermore, either positive-type or negative-type liquid crystals may be used as the liquid crystal material.

[0399] As light-emitting elements, for example, field-emitting elements (such as injection-type field-emitting elements) such as LEDs using inorganic materials as the light-emitting material, organic EL elements (also called OLEDs), or semiconductor lasers (also called laser diodes) can be used. As LEDs using inorganic materials as the light-emitting material, for example, mini-LEDs or micro-LEDs can be used.

[0400] Examples of light-emitting materials for light-emitting devices include fluorescent materials, phosphorescent materials, thermally activated delayed fluorescence (TADF) materials, and inorganic compounds (such as quantum dot materials).

[0401] The light-emitting element can emit light of colors such as red, green, blue, blue-green, reddish-purple, yellow, or white. It may also emit ultraviolet or infrared light. Furthermore, the color purity can be improved by adding a microcavity structure to the light-emitting element.

[0402] Of the pair of electrodes in a light-emitting element, one electrode functions as the anode (also called the positive electrode), and the other electrode functions as the cathode (also called the negative electrode).

[0403] In addition, in a display device using liquid crystal elements, the above-mentioned light-emitting elements may be used as the light source of the display device (backlight, edge light, side light, front light, etc.). For example, a light-emitting element such as a mini-LED may be used as the backlight of the display device. In one aspect of the present invention, at least a part of the semiconductor device 100 shown in Embodiment 1 described above can be applied to the drive circuit of the light-emitting element.

[0404] <Example of Cross-Sectional Structure of Display Device> Figure 36 is a cross-sectional view illustrating an example of the cross-sectional structure of a display device according to one embodiment of the present invention.

[0405] In the display device 490 shown in Figure 36, the configurations shown in regions 490a, 490b, and 490c can be used in the display device 400, respectively. For example, the configuration shown in region 490a can be used in the region where the pixels 412 are provided. The configuration shown in region 490b can be used in the region where the circuit sections 403 and 404 are provided. The configuration shown in region 490c can be used in the region where the FPC 408 is provided.

[0406] Region 490a corresponds to the region where the pixel 161 (corresponding to the semiconductor device 100, etc.) shown in Embodiment 1 described above is provided. Therefore, the transistors provided in region 490a correspond to the transistors (transistors M11 to M14, etc.) that the semiconductor device 100, etc., shown in Embodiment 1 described above is provided. Region 490b corresponds to the region where the gate driver unit 163, source driver unit 164, and control unit 167, etc., shown in Embodiment 1 described above are provided. Therefore, the transistors provided in region 490b correspond to the transistors that the gate driver unit 163, source driver unit 164, and control unit 167, etc., shown in Embodiment 1 described above are provided.

[0407] The display device 490 has a substrate 310 (corresponding to the substrate 401 described above) and a substrate 350 (corresponding to the substrate 409 described above). A resin layer 340 is also present between the substrates 310 and 350. The substrate 350 faces the substrate 310 via the resin layer 340. In region 490c, there is no substrate 350 and no resin layer 340.

[0408] An insulating layer 312 is provided on the substrate 350 side of the substrate 310. Transistors and light-emitting elements are provided on the insulating layer 312.

[0409] Here, as an example, a configuration is shown in which the transistor 200A shown in Embodiment 2 above is provided in both region 490a and region 490b. Furthermore, a configuration is shown in which the transistor 200B shown in Embodiment 2 above is provided in region 490a.

[0410] Furthermore, the transistors provided in regions 490a and 490b are not limited to structures like transistor 200A and transistor 200B. Various transistor structures can be provided in regions 490a and 490b. In this case, one type of transistor structure may be provided, or two or more different transistor structures may be provided.

[0411] Furthermore, a conductive layer 364 is provided in region 490c. The conductive layer 364 can be formed using the same process as the conductive layer 208 (conductive layer 208a, conductive layer 208b, etc.) in transistors 200A and 200B.

[0412] An insulating layer 218 is provided so as to cover transistors 200A and 200B.

[0413] In region 490a, a pixel electrode 321 (pixel electrode 321a and pixel electrode 321b) is provided on the insulating layer 218. The pixel electrode 321a is in contact with the conductive layer 208b at openings provided in the insulating layer 218 and the insulating layer 209. In addition, an insulating layer 322 is provided on the insulating layer 218. The insulating layer 322 has a region that covers the end of the pixel electrode 321.

[0414] A light-emitting element 370 is provided on top of the pixel electrode 321.

[0415] The light-emitting element 370 corresponds to the light-emitting element LD found in the semiconductor device 100 shown in Embodiment 1 above.

[0416] Furthermore, the pixel electrode 321a corresponds to the conductive layer (such as the conductive layer sm01) on the insulating layer 209 shown in Embodiment 3 above.

[0417] The light-emitting element 370 has a configuration in which a semiconductor layer 371, an emissive layer 372, and a semiconductor layer 373 are provided in this order. An opening is provided in part of the emissive layer 372 and the semiconductor layer 373 that reaches the semiconductor layer 371. An insulating layer 374 is provided so as to cover the semiconductor layer 371, the emissive layer 372, and the semiconductor layer 373. A conductive layer 375a is provided in the opening provided in the insulating layer 374 that is in contact with the semiconductor layer 371. A conductive layer 375b is provided in the opening provided in the insulating layer 374 that is in contact with the semiconductor layer 373. The conductive layer 375a is connected to a conductive layer 377a provided on the pixel electrode 321a via a connecting layer 376a. The conductive layer 375b is connected to a conductive layer 377b provided on the pixel electrode 321b via a connecting layer 376b.

[0418] For the conductive layer 375 (conductive layer 375a and conductive layer 375b) and conductive layer 377 (conductive layer 377a and conductive layer 377b), for example, metals such as aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, tin, zinc, silver, platinum, gold, molybdenum, tantalum, or tungsten, or alloys mainly composed of these metals (such as an alloy of silver, palladium, and copper), can be used. Alternatively, oxides such as tin oxide or zinc oxide may be used. For the connecting layer 376 (connecting layer 376a and connecting layer 376b), for example, solder bumps or gold bumps can be used.

[0419] The light-emitting layer 372 is provided between the semiconductor layer 371 and the semiconductor layer 373. In the light-emitting layer 372, electrons and holes combine to emit light. One of the semiconductor layers 371 and 373 can be an n-type semiconductor layer, and the other can be a p-type semiconductor layer. Furthermore, the light-emitting layer 372 can be an n-type, i-type, or p-type semiconductor layer.

[0420] The laminated structure, comprising a semiconductor layer 371, a light-emitting layer 372, and a semiconductor layer 373, is formed to emit light such as infrared, red, green, blue, blue-violet, violet, or ultraviolet light. For example, compounds containing group 13 and group 15 elements (also called group 3-5 compounds) can be used in the laminated structure. Examples of group 13 elements include aluminum, gallium, and indium. Examples of group 15 elements include nitrogen, phosphorus, arsenic, and antimony.

[0421] In a stacked structure including a semiconductor layer 371, a light-emitting layer 372, and a semiconductor layer 373, for example, a light-emitting element 370 that emits desired light can be manufactured by forming a pn junction or a pin junction using a compound of gallium and phosphorus, a compound of gallium and arsenic, a compound of gallium, aluminum, and arsenic, a compound of aluminum, gallium, indium, and phosphorus, gallium nitride, a compound of indium and gallium nitride, a compound of selenium and zinc, or the like. Note that the pn junction or pin junction formed in the stacked structure may be a homojunction, a heterojunction, or a double heterojunction. Also, a quantum well structure may be used in the stacked structure. Further, nanocolumns or the like may be used in the stacked structure.

[0422] As materials that can be used for the stacked structure including the semiconductor layer 371, the light-emitting layer 372, and the semiconductor layer 373, for example, gallium nitride or the like can be used for a light-emitting element that emits light in an ultraviolet to blue wavelength band. A compound of indium and gallium nitride or the like can be used for a light-emitting element that emits light in an ultraviolet to green wavelength band. A compound of aluminum, gallium, indium, and phosphorus, or a compound of gallium and arsenic or the like can be used for a light-emitting element that emits light in a green to red wavelength band. A compound of gallium and arsenic or the like can be used for a light-emitting element that emits light in an infrared wavelength band.

[0423] Here, when the display device 490 includes a plurality of light-emitting elements 370, adjacent light-emitting elements 370 can be configured to emit light of different colors such as red, green, and blue.

[0424] For example, a pixel that exhibits blue light may have a light-emitting element 370 that emits blue light, a pixel that exhibits green light may have a light-emitting element 370 that emits green light, and a pixel that exhibits red light may have a light-emitting element 370 that emits red light. Thereby, display of a color image becomes possible. At this time, for example, a pixel that exhibits blue light may have a coloring layer that enhances the color purity of the blue light, a pixel that exhibits green light may have a coloring layer that enhances the color purity of the green light, and a pixel that exhibits red light may have a coloring layer that enhances the color purity of the red light.

[0425] Also, when the display device 490 has a plurality of light-emitting elements 370, the adjacent light-emitting elements 370 may be configured to emit light of the same color. At this time, the light emitted from each light-emitting element 370 is emitted outside the display device 490 through, for example, one or both of a color conversion layer and a coloring layer.

[0426] For example, a pixel that exhibits blue light may have a light-emitting element 370 that emits blue light, a pixel that exhibits green light may have a light-emitting element 370 that emits blue light and a color conversion layer that converts blue light into green light, and a pixel that exhibits red light may have a light-emitting element 370 that emits blue light and a color conversion layer that converts blue light into red light. Thereby, display of a color image becomes possible. At this time, for example, a pixel that exhibits blue light may have a coloring layer that enhances the color purity of the blue light, a pixel that exhibits green light may have a coloring layer that enhances the color purity of the green light, and a pixel that exhibits red light may have a coloring layer that enhances the color purity of the red light.

[0427] Furthermore, for example, a pixel emitting blue light may have a light-emitting element 370 that emits ultraviolet light and a color conversion layer that converts ultraviolet light to blue light; a pixel emitting green light may have a light-emitting element 370 that emits ultraviolet light and a color conversion layer that converts ultraviolet light to green light; and a pixel emitting red light may have a light-emitting element 370 that emits ultraviolet light and a color conversion layer that converts ultraviolet light to red light. This makes it possible to display a color image. In this case, for example, a pixel emitting blue light may have a coloring layer that enhances the color purity of the blue light, a pixel emitting green light may have a coloring layer that enhances the color purity of the green light, and a pixel emitting red light may have a coloring layer that enhances the color purity of the red light.

[0428] A light-shielding layer 352 is provided on the substrate 310 side of the substrate 350.

[0429] In region 490a, the light-shielding layer 352 is provided with an opening that overlaps with the light-emitting element 370. Therefore, the light emitted from the light-emitting element 370 is emitted to the outside of the display device 490 through the opening in the light-shielding layer 352. In Figure 36, this is represented by a dashed arrow and the label "Light".

[0430] An optical functional layer 354 may be provided in the openings in the light-shielding layer 352. For example, one or both of a color conversion layer and a coloring layer may be applied as the optical functional layer 354. By applying a coloring layer to the optical functional layer 354, the color purity of the light emitted from the light-emitting element 370 can be increased. Also, by applying a color conversion layer to the optical functional layer 354, the wavelength of the light emitted from the light-emitting element 370 can be converted.

[0431] Furthermore, although not shown in the figures, for example, one or both of the color conversion layer and the coloring layer may be provided on the substrate 350 side of the light-emitting element 370 so as to be in contact with the semiconductor layer 371.

[0432] Furthermore, for example, a light-shielding layer 353 may be provided between adjacent light-emitting elements 370. This suppresses light leakage (stray light) to adjacent light-emitting elements 370. Thus, the display quality of the display device can be improved.

[0433] Furthermore, at least a portion of the insulating layer 374, insulating layer 322, pixel electrode 321, and light-shielding layer 353 may have the function of reflecting light emitted from the light-emitting element 370. Also, at least a portion of the insulating layer 374 on the substrate 350 side, the insulating layer 322 on the substrate 350 side, the pixel electrode 321 on the substrate 350 side, and the light-shielding layer 353 on the light-emitting element 370 side may be provided with a reflective layer that has the function of reflecting light emitted from the light-emitting element 370. In this case, at least a portion of the insulating layer 374, insulating layer 322, pixel electrode 321, and light-shielding layer 353, or the reflective layer provided thereon, may be appropriately tilted or otherwise provided so that the amount of reflected light emitted to the outside of the display device 490 is increased. This makes it possible to increase the amount of light emitted to the outside of the display device 490. Therefore, the brightness of the display device can be increased.

[0434] In the display device 490 shown in Figure 36, for example, the pixel electrode 321b is provided so as to cover the region of the insulating layer 218 that overlaps with the light-emitting element 370. In this case, the pixel electrode 321b may have the function of reflecting light emitted from the light-emitting element 370. Alternatively, a reflective layer having the function of reflecting light emitted from the light-emitting element 370 may be provided on the substrate 350 side of the pixel electrode 321b. This increases the amount of light emitted to the outside of the display device 490. Therefore, the brightness of the display device can be increased. In addition, it is possible to suppress the irradiation of transistors 200A and 200B, etc., by light emitted from the light-emitting element 370. This suppresses changes in the electrical characteristics of transistors 200A and 200B, etc. Therefore, reliability can be improved. Note that the pixel electrode 321a does not have to be provided so as to cover the region of the insulating layer 218 that overlaps with the light-emitting element 370. Alternatively, instead of the pixel electrode 321a, the pixel electrode 321b may be provided so as to cover the region of the insulating layer 218 that overlaps with the light-emitting element 370.

[0435] Furthermore, in the display device 490 shown in Figure 36, as an example, a region 490a is provided between the light-emitting element 370 and the substrate 350 without the resin layer 340. However, a resin layer 340 may be provided between the light-emitting element 370 and the substrate 350. Although not shown, for example, another resin layer with a different refractive index may be provided in the region without the resin layer 340 to increase the amount of light emitted to the outside of the display device 490. Also, although not shown, for example, a microlens may be provided between the light-emitting element 370 and the substrate 350 to increase the amount of light emitted to the outside of the display device 490. Also, although not shown, for example, a fine shape may be provided on the surface of the semiconductor layer 371 on the substrate 350 side of the light-emitting element 370 to increase the amount of light emitted to the outside of the display device 490.

[0436] Furthermore, the method of mounting the light-emitting element 370 is not limited to a specific mounting method. For example, methods using flip-chip bonding or methods using bonding of metal layers can be applied. In addition, for example, a method of monolithically stacking semiconductor layers 371, light-emitting layer 372, and semiconductor layer 373 with pixel electrodes 321 can be applied.

[0437] The above configuration of the light-emitting element 370 and its surroundings is merely an example and is not limited thereto. Therefore, it is not necessary to have at least a part of the above configuration. Furthermore, at least a part of the above configuration can be combined as appropriate.

[0438] In region 490c, a conductive layer 366 is provided on a portion of the insulating layer 218. The conductive layer 366 is in contact with the conductive layer 364 at openings provided in the insulating layer 218 and the insulating layer 209.

[0439] The conductive layer 364 can be provided in the same layer as the conductive layer 208. Therefore, the conductive layer 364 can have the same material as the conductive layer 208 and can be formed in the same process. For example, the conductive layer 208 and the conductive layer 364 can be formed by processing the same conductive film. Also, the conductive layer 366 can be provided in the same layer as the pixel electrode 321. Therefore, the conductive layer 366 can have the same material as the pixel electrode 321 and can be formed in the same process. For example, the pixel electrode 321 and the conductive layer 366 can be formed by processing the same conductive film. In region 490c, the conductive layer 366 is exposed. This allows the conductive layer 366 and the FPC 408 to be connected via the connecting layer 368.

[0440] As the connecting layer 368, an anisotropic conductive film (ACF) or an anisotropic conductive paste (ACP) can be used.

[0441] Furthermore, the contents of this embodiment can be combined as appropriate. Also, the contents of this embodiment can be combined as appropriate with the contents of other embodiments, etc.

[0442] (Embodiment 5) This embodiment describes an indium oxide film that can be used in the semiconductor layer of a transistor according to one aspect of the present invention.

[0443] In this specification, indium oxide having at least a crystalline portion or crystalline region in the film is referred to as crystalline indium oxide (crystal IO) or crystalline indium oxide (crystalline IO). Examples of crystal IO or crystalline IO include single-crystal indium oxide, polycrystalline indium oxide, and microcrystalline indium oxide.

[0444] Indium oxide is a semiconductor material with completely different physical properties from oxide semiconductors such as In-Ga-Zn oxide (hereinafter also referred to as IGZO) and zinc oxide.

[0445] This paper describes the carrier concentration dependence of the hole mobility of indium oxide, silicon, and IGZO.

[0446] IGZO tends to exhibit higher hole mobility as the carrier concentration increases. On the other hand, single-crystal indium oxide tends to exhibit higher hole mobility as the carrier concentration decreases. This trend is similar to that of silicon, where lower dopant (impurity) concentrations in the material reduce impurity scattering and increase hole mobility. In other words, the higher the purity and intrinsic nature of single-crystal indium oxide, the higher its hole mobility. From these results, it can be said that single-crystal indium oxide, unlike IGZO, is a material with physical properties similar to silicon. Note that when indium oxide is not single-crystal (e.g., polycrystalline), the trend may differ from that of single crystals.

[0447] The range of carrier concentrations suitable for the channel formation region of a transistor is 1 × 10⁻⁶. １５ cm −３ This range includes, for example, 1 × 10 １４ cm −３ The above is 1 x 10 １８ cm −３ The range is as follows: By sufficiently reducing the carrier concentration, the hole mobility value can be increased to 270 cm⁻¹. ２ It can be expected to be raised to the level of / (V・s).

[0448] Indium oxide can contain elements that lower the carrier concentration. Examples of elements that lower the carrier concentration include magnesium, calcium, zinc, cadmium, and copper. These elements can lower the carrier concentration by substituting for indium. Other examples include nitrogen, phosphorus, arsenic, and antimony. These elements can lower the carrier concentration by substituting for oxygen.

[0449] On the other hand, electrical resistance can be reduced by increasing the carrier concentration. For example, the suitable carrier concentration range for the source and drain regions of a transistor, or for a resistor or transparent conductive film, is when the carrier concentration value is 1 × 10⁻⁶ ２０ cm −３ This range includes, for example, 1 × 10 １９cm −３ The above is 1 x 10 ２２ cm −３ The range is as follows: By making the carrier concentration sufficiently high, the resistivity can be increased to 1 × 10⁻⁶. −４ It is expected that the level can be reduced to below Ω·cm.

[0450] Indium oxide may contain elements that increase the carrier concentration. For example, it is preferable to include elements common to the source and drain electrodes of the transistor. Examples of elements that increase the carrier concentration include titanium, zirconium, hafnium, tantalum, tungsten, molybdenum, tin, silicon, and boron. In particular, it is more preferable to use elements in which the oxide is conductive or semiconducting.

[0451] Because indium oxide is an oxide whose valence electrons can be controlled, the region with a low carrier concentration can be used for the channel formation region of the transistor, and the region with a high carrier concentration can be used for the source and drain regions of the transistor. This makes it possible to create a so-called n-i-n junction (a junction between an n-type region, an i-type region, and an n-type region). Valence electron control in transistors using silicon is generally known. On the other hand, valence electron control in transistors using indium oxide is a novel technological concept that would not normally be conceived. By using this technological concept, it is possible to realize a transistor with high mobility, low off-current, normally-off capability, and high reliability.

[0452] The indium oxide film is preferably crystalline. In particular, the indium oxide film is preferably polycrystalline, and more preferably single-crystal. A single-crystal film does not have grain boundaries. By using a single-crystal film, carrier scattering at grain boundaries can be suppressed, enabling the realization of transistors that exhibit high field-effect mobility. Furthermore, it has the excellent effect of suppressing variations in transistor characteristics caused by these grain boundaries.

[0453] In addition, compared with microcrystalline films or amorphous films, polycrystalline films can reduce carrier scattering and are preferable because they exhibit high field-effect mobility. When using a polycrystalline film, it is preferable to use a film with as large grain sizes as possible and few grain boundaries. In a transistor to which a polycrystalline film is applied, when no grain boundaries are present or no grain boundaries are observed in the channel formation region, since the channel formation region is located within the single-crystalline region contained in the polycrystalline film, it can be regarded as a transistor to which a single-crystalline film is applied.

[0454] Note that the crystallinity of indium oxide can be analyzed by, for example, XRD, TEM, or ED. Or, analysis may be performed by combining a plurality of these.

[0455] In addition, in this specification and the like, a semiconductor layer in which no grain boundaries are observed in the channel formation region, a semiconductor layer in which the channel formation region is included in one grain, or a semiconductor layer in which the directions of crystal axes are the same in at least two regions within the channel formation region can be regarded as a single-crystalline film.

[0456] Note that unless otherwise specified, the channel formation region refers to a region in the semiconductor layer that overlaps (or faces) the gate electrode via the gate insulating film and is located between the region in contact with the source electrode and the region in contact with the drain electrode. Grains, grain boundaries, crystal axes, crystal orientations, etc. in the channel formation region can be confirmed by cross-sectional observation including the semiconductor layer, source electrode, and drain electrode.

[0457] Impurities in the indium oxide film can be a source of carrier scattering, and thus can also be a factor in reducing the field-effect mobility and a factor in inhibiting crystal growth. Examples of impurities in the indium oxide film include boron, silicon, etc. In the channel formation region, the indium oxide film preferably has a lower concentration of these impurities. For example, the concentration of each of the above impurity elements is 0.1% or less, more preferably 0.01% (100 ppm) or less. Note that carbon, hydrogen, etc. are elements that may be contained in the film-forming gas or precursor during film formation, and may remain in the indium oxide film in a larger amount than the above impurities.

[0458] Furthermore, the indium oxide film may contain elements that can become trivalent cations like indium, as long as their crystals maintain a cubic crystal structure (Bixbite type). Examples include Group 13 elements of the periodic table such as gallium and aluminum, and Group 3 elements of the periodic table. Since these elements mainly exist as trivalent cations in the oxide, the carrier concentration of indium oxide can be kept low.

[0459] By using such an indium oxide film in a transistor, the field-effect mobility of the transistor can be increased to 50 cm². ２ / (V·s) or more, preferably 100 cm ２ / (V·s) or more, more preferably 150 cm ２ / (V·s) or more, more preferably 200 cm ２ / (V·s) or more, more preferably 250 cm ２ It can be set to (V・s) or more.

[0460] One of the characteristics of indium oxide films is their higher oxygen permeability (diffusivity) compared to IGZO films. For example, oxygen diffusing into an indium oxide film permeates the film and is released as oxygen molecules. In some cases, it may also be released as water molecules by reacting with hydrogen contained in the film. Furthermore, if there is an oxygen deficiency in the film, diffusing oxygen atoms will fill the deficiency. Because oxygen diffuses easily through indium oxide films, it can be said that oxygen deficiencies are more easily filled in compared to IGZO films.

[0461] Thus, because indium oxide films are more likely to reduce oxygen vacancies in the film compared to IGZO films, applying such indium oxide films to transistors makes it possible to realize transistors with extremely high reliability.

[0462] Furthermore, the indium oxide film diffuses hydrogen. Hydrogen diffusing into the indium oxide film from the outside permeates the film and is released as hydrogen molecules. Alternatively, it reacts with oxygen contained in the film and is released as water molecules.

[0463] Indium oxide is characterized by a small effective electron mass and a large effective hole mass. Furthermore, the effective electron mass of indium oxide is largely independent of the crystal orientation. Therefore, using crystalline indium oxide in transistors allows for the realization of transistors with high field-effect mobility and high frequency characteristics (also known as f-response). Moreover, due to the large effective hole mass, transistors with extremely low off-currents can be realized. For example, by applying an indium oxide film to a transistor, the off-current per 1 μm of channel width is 1 fA (1 × 10⁻¹⁶) at 125°C. −１５ A) Less than or equal to, or 1aA (1 × 10 −１８ A) Less than or equal to 1aA (1 × 10) in a room temperature (25°C) environment. −１８ A) Less than or equal to, or 1zA (1 × 10⁻¹⁰ −２１ A) The following is possible. Furthermore, because indium oxide has a smaller effective electron mass and a larger effective hole mass than silicon, it may be possible to realize transistors with higher field-effect mobility and lower off-current than Si transistors.

[0464] It is preferable to provide a seed layer so as to be in contact with at least a portion of the crystalline indium oxide film. It is preferable to use a material containing crystals with a small difference in lattice constant (also called lattice mismatch) with the indium oxide for the seed layer. This improves the crystallinity of the indium oxide film. A substrate (e.g., a single-crystal substrate) may be used as one of the layers in contact with at least a portion of the crystalline indium oxide film.

[0465] One method for evaluating the degree of lattice mismatch is to use the following lattice mismatch value. The lattice mismatch Δa [%] of the crystals in the formed film (in this case, the indium oxide film) relative to the crystals in the seed layer is given by Δa = ((L １ -L ２ ) / L ２ It is calculated as ) × 100. Here L １ L is the length of the unit cell vector of the crystals in the formed film, or the lattice constant. ２This is the length of the unit cell vector of the crystal in the seed layer, or the lattice constant.

[0466] The lattice mismatch Δa between the seed layer and the indium oxide film is preferably small in absolute value, and most preferably zero. For example, Δa can be -5% or more and 5% or less, preferably -4% or more and 4% or less, more preferably -3% or more and 3% or less, and even more preferably -2% or more and 2% or less.

[0467] Here, the indium oxide crystal has a cubic structure (bixbite type). For example, yttria-stabilized zirconia (YSZ) crystals can have a cubic structure (fluorite type). The lattice mismatch of the indium oxide crystal with respect to the cubic YSZ crystal is in the range of -2% to 2%, and a single crystal film of indium oxide can be epitaxially grown on a YSZ substrate.

[0468] Furthermore, the crystal structure of the seed layer and the crystal structure of the indium oxide film do not necessarily have to be the same in terms of crystal system or crystal orientation. For example, a film with a hexagonal or trigonal crystal structure can be used beneath an indium oxide film with a cubic crystal structure. For example, by setting the crystal orientation of the surface of the seed layer to

[001] and the crystal orientation of the underside of the indium oxide film to

[111] , the requirements related to crystal orientation necessary for epitaxial growth can be met. Examples of hexagonal or trigonal crystals include wurtzite-type structures and YbFe. ２ O ４ Type structure, Yb ２ Fe ３ O ７ These include type structures and their modified type structures. YbFe ２ O ４ Type structure or Yb ２ Fe ３ O ７ An example of a crystal having a type structure is IGZO.

[0469] Furthermore, the contents of this embodiment can be combined as appropriate. Also, the contents of this embodiment can be combined as appropriate with the contents of other embodiments, etc.

[0470] (Embodiment 6) This embodiment describes an electronic device according to one aspect of the present invention.

[0471] The electronic device shown in this embodiment has a display unit that uses a display device according to one aspect of the present invention, or a semiconductor device according to one aspect of the present invention. The display device according to one aspect of the present invention facilitates either or both high resolution and high definition. Therefore, it can be used in the display units of various electronic devices.

[0472] Furthermore, a semiconductor device according to one aspect of the present invention can be applied to devices other than the display unit of an electronic device. For example, using a semiconductor device according to one aspect of the present invention in the control unit of an electronic device is preferable because it enables lower power consumption.

[0473] Examples of electronic devices include those with relatively large screens, such as television sets, desktop or notebook computers, computer monitors, digital signage, and large game machines like pachinko machines, as well as digital cameras, digital video cameras, digital photo frames, mobile phones, portable game consoles, personal digital assistants, and audio playback devices.

[0474] In particular, a display device according to one aspect of the present invention can be used in electronic devices having a relatively small display area because it can increase the resolution. Examples of such electronic devices include wearable devices that can be worn on the wrist (watch-type information terminals, bracelet-type information terminals, etc.), wearable devices that can be worn on the head (VR devices such as head-mounted displays, AR devices such as glasses, SR (Substitutional Reality) devices, MR (Mixed Reality) devices, devices that implement spatial computing such as spatial computers, etc.).

[0475] A display device according to one aspect of the present invention preferably has an extremely high resolution such as HD (1280 x 720 pixels), FHD (1920 x 1080 pixels), WQHD (2560 x 1440 pixels), WQXGA (2560 x 1600 pixels), 4K (3840 x 2160 pixels), or 8K (7680 x 4320 pixels). In particular, a resolution of 4K, 8K, or higher is preferred. Furthermore, the pixel density (resolution) of the display device according to one aspect of the present invention is preferably 100 ppi or more, preferably 300 ppi or more, more preferably 500 ppi or more, more preferably 1000 ppi or more, more preferably 2000 ppi or more, more preferably 3000 ppi or more, more preferably 5000 ppi or more, and even more preferably 7000 ppi or more. By using a display device having high resolution and / or high detail, it is possible to enhance at least one of the following: a sense of presence and a sense of depth. Furthermore, there are no particular limitations on the aspect ratio of the display device according to one embodiment of the present invention, and various aspect ratios such as 1:1 (square), 4:3, 16:9, or 16:10 can be used.

[0476] The electronic device shown in this embodiment may have sensors (including functions for detecting, detecting, or measuring force, displacement, position, velocity, acceleration, angular velocity, rotational speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared radiation).

[0477] The electronic device shown in this embodiment may include a processing unit, a memory device, an input device, an output device, a control device, and the like. A semiconductor device according to one aspect of the present invention may be applied to the processing unit, memory device, input device, output device, control device, and the like of the electronic device.

[0478] The electronic device shown in this embodiment can have a variety of functions. For example, it can have a function to display various information (still images, videos, text images, etc.) on a display unit, a touch panel function, a function to display a calendar, date, time, etc., a function to control processing by various software (programs), a wireless communication function, a function to read and process programs or data recorded on a recording medium, etc. However, the functions of the electronic device are not limited to these and can have a variety of functions. The electronic device may have multiple display units. The electronic device may also have a camera and may have a function to take still images or videos with the camera, a function to save the captured images to a recording medium provided outside or inside the camera, a function to display the captured images on a display unit, etc.

[0479] Figure 37A shows an example of an electronic device that can be used as a portable information terminal, such as a smartphone.

[0480] The electronic device 8100 includes a housing 8101, a display unit 8102, a power button 8103, operation buttons 8104, a speaker 8105, a microphone 8106, a camera 8107, and a light source 8108. The display unit 8102 may also function as a touch panel.

[0481] A display device according to one embodiment of the present invention can be applied to the display unit 8102.

[0482] Figure 37B shows an example of an electronic device that can be used as a smartwatch or other wristwatch-type information terminal.

[0483] The electronic device 8200 includes a housing 8201, a display unit 8202, a power key 8203, operation keys 8204, a speaker 8205, a microphone 8206, a sensor 8207, and connection terminals 8208. The display unit 8202 is curved.

[0484] A display device according to one embodiment of the present invention can be applied to the display unit 8202.

[0485] Furthermore, the electronic device 8200 can communicate with a wireless headset to enable hands-free calling. The electronic device 8200 can also transmit data to other electronic devices and be charged via its connection terminal 8208. Charging may be performed via wireless power supply.

[0486] Figure 37C shows an example of an electronic device that can be used as a television system, etc.

[0487] The electronic device 8300 includes a housing 8301 and a display unit 8302, etc. The housing 8301 is supported by a stand 8303.

[0488] A display device according to one aspect of the present invention can be applied to the display unit 8302.

[0489] The electronic device 8300 can be operated using the operation switches on the housing 8301 or a separate remote control. The display unit 8302 may also function as a touch panel, and the electronic device 8300 can be operated by touching the display unit 8302 with a finger or other object.

[0490] The electronic device 8300 may also include a receiver and a modem. The receiver can receive general television broadcasts. Furthermore, by connecting to a wired or wireless communication network via the modem, it is possible to perform one-way (from sender to receiver only) or two-way (between sender and receiver, or between receivers, etc.) information communication.

[0491] Figure 37D shows an example of an electronic device that can be used as a notebook computer or the like.

[0492] The electronic device 8400 includes a housing 8401, a display unit 8402, a keyboard 8403, a pointing device 8404, and an external connection port 8405.

[0493] A display device according to one embodiment of the present invention can be applied to the display unit 8402.

[0494] Figure 37E shows an example of an electronic device that can be used as digital signage, etc.

[0495] The electronic device 8500 includes a display unit 8501, etc. The electronic device 8500 is mounted along the curved surface of a cylindrical column 8509.

[0496] A display device according to one embodiment of the present invention can be applied to the display unit 8501.

[0497] Furthermore, the display unit 8501 of the electronic device 8500 may also function as a touch panel. This allows the electronic device 8500 to be operated intuitively. For example, when the electronic device 8500 is used to provide information such as route information or traffic information, intuitive operation can enhance usability.

[0498] Furthermore, the electronic device 8500 may be able to communicate wirelessly with an information terminal 8508, such as a smartphone, owned by the user. For example, information from advertisements displayed on the display unit 8501 can be displayed on the screen of the information terminal 8508. Also, the display on the display unit 8501 can be switched by operating the information terminal 8508. In addition, the electronic device 8500 can be made to run a game using the screen of the information terminal 8508 as a control means (controller). This allows multiple users to participate in and enjoy the game simultaneously.

[0499] Figure 37F shows an example of electronic equipment installed around the windshield inside a car.

[0500] The electronic device 8600 includes a display unit 8601, a display unit 8602, and a display unit 8603 mounted on the dashboard, a display unit 8604 mounted on the pillar, and a main body 8605.

[0501] A display device according to one embodiment of the present invention can be applied to each of the display units 8601, 8602, 8603, and 8604.

[0502] Furthermore, each of the display units 8601 to 8604 can display various information transmitted from the main unit 8605 via wired or wireless communication. For example, each of the display units 8601 to 8603 can display various information such as navigation information, speedometer, tachometer, mileage, fuel gauge, gear status, and air conditioning settings. Display unit 8604 can display images from an imaging device installed on the outside of the vehicle to enhance safety by supplementing the view obstructed by the pillars (blind spots).

[0503] Figure 37G shows an example of a glasses-type electronic device that can be used for AR (augmented reality) equipment and the like.

[0504] The electronic device 8700 includes a main body 8701, a display unit 8702, a mounting unit 8703, and a lens 8704. A battery 8705 is provided in the mounting unit 8703. The battery 8705 is connected to the main body via a cable 8706.

[0505] A display device according to one embodiment of the present invention can be applied to the display unit 8702.

[0506] Furthermore, in the electronic device 8700, for example, if the main unit 8701 has a wireless receiver, video information such as received image data can be displayed on the display unit 8702. Also, for example, if the main unit 8701 has a camera, it can capture the movement of the user's eyeballs or eyelids, and by calculating the user's gaze based on that information, the user's gaze can be used as an input means.

[0507] Furthermore, in the electronic device 8700, the attachment portion 8703 may be provided with multiple electrodes at a position that touches the user. As a result, the electronic device 8700 may have a function to recognize the user's gaze by detecting the current flowing through the electrodes in accordance with the user's eye movements. It may also have a function to monitor the user's pulse by detecting the current flowing through the electrodes.

[0508] Furthermore, the electronic device 8700 may have various sensors to display the user's biometric information on the display unit 8702. It may also have a function to detect the user's head movements and change the image displayed on the display unit 8702 in accordance with those movements.

[0509] Figure 37H shows an example of a head-mounted display type electronic device that can be used for VR equipment and the like.

[0510] The electronic device 8800 includes a housing 8801, a display unit 8802, operation buttons 8803, and a fixing device 8804. A battery 8805 is provided in the fixing device 8804.

[0511] A display device according to one embodiment of the present invention can be applied to the display unit 8802.

[0512] Furthermore, since the electronic device 8800 has two display units 8802, the user can view one display unit with each eye. This allows for the display of high-resolution images even when performing 3D displays using parallax.

[0513] Furthermore, the contents of this embodiment can be combined as appropriate. Also, the contents of this embodiment can be combined as appropriate with the contents of other embodiments, etc.

[0514] (Notes regarding the description in this specification, etc.) The above embodiments and descriptions of each component in the embodiments are provided below.

[0515] In this specification, a semiconductor device refers to any device that can function by utilizing semiconductor properties. For example, semiconductor elements such as transistors, electronic circuits containing semiconductor elements, chips with electronic circuits formed on a substrate, electronic components with chips housed in a package, and electronic devices on which electronic components are mounted are examples of semiconductor devices. In addition, display devices, light-emitting devices, projection devices, illumination devices, optical devices, electro-optical devices, imaging devices, light-receiving devices, detection devices, power supply devices, energy storage devices, communication devices, arithmetic units, control devices, arithmetic processing units, memory devices, input devices, output devices, input / output devices, signal processing devices, information processing devices, computers, and electronic devices may have semiconductor devices and can be said to be semiconductor devices themselves.

[0516] In this specification, a "transistor" has three terminals called the "gate" (also called the gate terminal, gate region, or gate electrode), the "source" (also called the source terminal, source region, or source electrode), and the "drain" (also called the drain terminal, drain region, or drain electrode). A transistor also has a region where a channel is formed between the drain and the source (also called the channel formation region). A transistor can pass current between the source and the drain through the channel formation region. Furthermore, a transistor can generate electrical signals or potential interactions between the source and the drain through the channel formation region. The channel formation region is the region where current primarily flows. The gate is a control terminal that controls the amount of current flowing through the channel formation region. The two terminals that function as the source or drain are input / output terminals that input or output the current flowing through the channel formation region.

[0517] The two input / output terminals function as either a source or a drain, depending on the transistor's conductivity type (n-channel or p-channel) and the potential applied to its three terminals. Furthermore, the source and drain functions may be reversed when the direction of current changes during circuit operation. Therefore, the terms "source" and "drain" are interchangeable. When describing the connections of a transistor, the expressions "one of the source or drain" (or first electrode, first terminal, etc.) and "the other of the source or drain" (or second electrode, second terminal, etc.) should be used.

[0518] In addition to the three terminals mentioned above, transistors may have a terminal called a "back gate" (also called the back gate terminal, back gate region, or back gate electrode). In this case, one of the gates or back gate of the transistor may be called the first gate, and the other of the gates or back gate may be called the second gate. Also, in the same transistor, the terms "gate" and "back gate" may be interchangeable. Furthermore, if a transistor has three or more gates, each gate may be called the first gate, second gate, third gate, and so on.

[0519] Furthermore, the voltage between the gate and source (gate-source) (unless otherwise specified, the potential of the source is used as the reference) is sometimes called the "gate voltage," the voltage between the drain and source (drain-source) (unless otherwise specified, the potential of the source is used as the reference) is sometimes called the "drain voltage," and the voltage between the back gate and source (back gate-source) (unless otherwise specified, the potential of the source is used as the reference) is sometimes called the "back gate voltage." Also, the current flowing between the drain and source (unless otherwise specified, the direction from drain to source is considered positive) is sometimes called the "drain current." Note that in n-channel transistors, expressions such as high gate voltage, high drain voltage, and high back gate voltage can be appropriately substituted for each other, and in p-channel transistors, expressions such as low gate voltage, low drain voltage, and low back gate voltage can be appropriately substituted for each other. Similarly, in n-channel transistors, expressions such as low gate voltage, low drain voltage, and low back gate voltage can be appropriately substituted for each other, and in p-channel transistors, expressions such as high gate voltage, high drain voltage, and high back gate voltage can be appropriately substituted for each other.

[0520] The "conducting state" or "on state" of a transistor refers to, for example, a state in which the source and drain of the transistor can be considered to be electrically short-circuited, a state in which the gate voltage is higher than the threshold voltage in an n-channel transistor, or a state in which the gate voltage is lower than the threshold voltage in a p-channel transistor. The "non-conducting state" or "off state" of a transistor refers to, for example, a state in which the source and drain of the transistor can be considered to be electrically disconnected, a state in which the gate voltage is lower than the threshold voltage in an n-channel transistor, or a state in which the gate voltage is higher than the threshold voltage in a p-channel transistor.

[0521] Furthermore, unless otherwise specified, the "off-current" of a transistor refers to the drain current when the transistor is in the off state. Note that the off-current and the current flowing between the gate, source, and drain (also called gate leakage current) are sometimes collectively referred to as leakage current.

[0522] In this specification, "capacitive element" refers to a circuit element having a configuration in which a pair of electrodes are provided with a dielectric material in between. However, capacitive elements are not limited to this and may include, for example, parasitic capacitance between two wires, gate capacitance between the source and drain of a transistor and the gate, etc. Furthermore, terms such as "capacitive element," "parasitic capacitance," and "gate capacitance" may be interchangeable with terms such as "capacitance" and "electrostatic capacitance." In addition, terms such as "pair of electrodes," "pair of wires," "pair of terminals," and "pair of conductive layers" of a capacitive element may be interchangeable.

[0523] In this specification, "switch" refers to a circuit element having multiple terminals and having the function of switching (selecting) the conduction or non-conductivity between those terminals. A switch can be said to have the function of controlling whether or not to allow current to flow between multiple terminals, or the function of controlling whether or not to generate the transmission or reception of electrical signals or the interaction of potentials between multiple terminals. For example, if a switch has two terminals, the state in which the two terminals can be considered to be electrically short-circuited is called the "conducting state" or "on state". Conversely, the state in which the two terminals can be considered to be electrically disconnected is called the "non-conducting state" or "off state". Note that electrical switches, mechanical switches, etc., can be used as switches.

[0524] In this specification, a single circuit element shown in a circuit diagram includes cases where multiple such circuit elements are connected in series, parallel, or series-parallel.

[0525] In this specification, a signal line refers to wiring to which a signal is supplied, and a power line refers to wiring to which a constant potential is supplied. Therefore, the terms "signal line" and "power line" can sometimes be replaced with the term "wiring." For example, a signal line can be considered to have a constant potential if the signal supplied to it does not change. Similarly, a power line can be considered to have a signal if the potential supplied to it changes. Therefore, the terms "potential" and "signal" supplied to wiring can sometimes be interchangeable.

[0526] In this specification, voltage refers to the potential difference from a reference potential (such as ground potential). Therefore, the terms "voltage" and "potential" can sometimes be used interchangeably.

[0527] In this specification, the terms "electrode," "wiring," and "terminal" do not functionally limit these components. Therefore, an electrode may be part of wiring or a terminal, wiring may be part of an electrode or a terminal, and a terminal may be part of an electrode or wiring. Furthermore, "electrode or wiring" includes cases where multiple electrodes or multiple wirings are integrated. Similarly, "terminal" includes cases where multiple electrodes, multiple wirings, or multiple terminals are integrated. Additionally, the terms "electrode," "wiring," and "terminal" may be replaced with terms such as "region" or "conductive layer."

[0528] In this specification, the term "node" may be replaced with terms such as "electrode," "wiring," "terminal," "region," or "conductive layer," depending on the circuit configuration, device structure, etc. Conversely, terms such as "electrode," "wiring," and "terminal" may be replaced with the term "node."

[0529] In this specification, terms containing the words "layer" and "film" may be interchangeable. For example, the terms "conductive layer" and "conductive film" may be interchangeable. For example, the terms "insulating layer" and "insulating film" may be interchangeable. For example, the terms "semiconductor layer" and "semiconductor film" may be interchangeable. Furthermore, in terms containing the words "layer" and "film," these terms may be replaced with other terms. For example, the terms "conductive layer" and "conductive film" may be interchangeable with the term "conductor." For example, the terms "insulating layer" and "insulating film" may be interchangeable with the term "insulator."

[0530] In this specification, terms such as "above" and "below" are used for convenience to describe the positional relationships of the constituent elements. Therefore, these terms can be replaced with other terms and the expression can be appropriately modified. For example, the expression "Element B is located above Element A, and Element C is located below Element A" can be changed to "Element B is located below Element A, and Element C is located above Element A." Similarly, the expression "Element B is located above Element A, and Element C is located below Element A" can be changed to "Element B is located to the left (or right) of Element A, and Element C is located to the right (or left) of Element A." It should be noted that when using the terms "above" or "below," the positional relationship of the constituent elements is not limited to directly above or directly below. Therefore, the term "above" can be replaced with terms such as "upper," "upper side," or "upper layer," and the term "below" can be replaced with terms such as "downward," "lower side," or "lower layer." Furthermore, for example, the expression "element B on element A" is not limited to cases where element B is placed in contact with element A, but also includes cases where other elements (including space) are provided between element A and element B.

[0531] In this specification, "parallel" does not mean strictly parallel. Unless otherwise specified, "parallel" may include a state in which two lines or planes are positioned at an angle of -5° to 5°. Alternatively, it may include a state in which two lines or planes are positioned at an angle of -10° to 10°. Or, it may include a state in which two lines or planes are positioned at an angle of -30° to 30°. Therefore, the term "parallel" may be replaced with terms such as "approximately parallel" or "substantially parallel." Also, "parallel" may mean "parallel or approximately parallel."

[0532] In this specification, "perpendicular" does not mean strictly perpendicular. Unless otherwise specified, "perpendicular" may include a state in which two lines or planes are positioned at an angle of 85° to 95°. Alternatively, it may include a state in which two lines or planes are positioned at an angle of 80° to 100°. Or, it may include a state in which two lines or planes are positioned at an angle of 60° to 120°. Therefore, the term "perpendicular" may be replaced with terms such as "approximately perpendicular" or "substantially perpendicular." Also, "perpendicular" may mean "perpendicular or approximately perpendicular."

[0533] In this specification, when terms such as "identical," "same," "equal," "simultaneous," "consistent," and "uniform" (including their synonyms) are used in reference to count values, measured values, etc., these terms shall include errors. Therefore, unless otherwise specified, these terms may include an error of plus or minus 10%, or an error of plus or minus 20%. Thus, "identical" may mean "identical or approximately identical," "same" may mean "same or approximately the same," "equal" may mean "equal or approximately equal," "simultaneous" may mean "simultaneous or approximately simultaneous," "consistent" may mean "consistent or approximately consistent," and "uniform" may mean "uniform or approximately uniform."

[0534] In this specification, ordinal numbers such as "first," "second," etc., are used to avoid confusion of components and do not limit the number of components, their order, etc. For example, a component referred to as "first" in one embodiment may be referred to as "second" in other embodiments, claims, etc. Also, for example, a component referred to as "first" in one embodiment may be omitted in other embodiments, claims, etc. Furthermore, even if a term does not have an ordinal number in this specification, an ordinal number may be added in the claims. Also, even if a term has an ordinal number in this specification, a different ordinal number may be added in the claims. Furthermore, even if a term has an ordinal number in this specification, an ordinal number may be omitted in the claims.

[0535] In this specification, one of the source or drain (also called the two input / output terminals) of a transistor may be referred to as the first terminal, and the other of the source or drain of a transistor may be referred to as the second terminal. Therefore, a transistor has at least a gate (also called the gate terminal), a first terminal, and a second terminal. In addition, one terminal of a capacitive element (also called one of a pair of terminals) may be referred to as the first terminal, and the other terminal of a capacitive element (also called the other of a pair of terminals) may be referred to as the second terminal. In addition, one terminal of a display element may be referred to as the first terminal, and the other terminal of a display element may be referred to as the second terminal. In addition, one terminal of a liquid crystal element may be referred to as the first terminal, and the other terminal of a liquid crystal element may be referred to as the second terminal. In addition, one terminal of a light-emitting element may be referred to as the first terminal, and the other terminal of a light-emitting element may be referred to as the second terminal. In addition, one terminal of a light-receiving element may be referred to as the first terminal, and the other terminal of a light-receiving element may be referred to as the second terminal. In addition, one of the anode or cathode of a diode (also called one of the pair of terminals) is sometimes called the first terminal, and the other of the anode or cathode of a diode (also called the other of the pair of terminals) is sometimes called the second terminal.

[0536] In this specification, "connection" includes, for example, "electrical connection." When "electrical connection" is used to define the connection relationship of circuit elements as a physical object, "electrical connection" includes, for example, "direct connection" and "indirect connection." "A and B are directly connected" means, for example, that A and B are connected without the use of a circuit element (e.g., a transistor or a switch; however, wiring is not a circuit element). On the other hand, "A and B are indirectly connected" means, for example, that A and B are connected via one or more circuit elements. A, B, and C (described later) refer to objects such as elements, circuits, wiring, electrodes, terminals, semiconductor layers, and conductive layers.

[0537] Here, when we define "A and B are indirectly connected," it refers to the following type of connection, as an example: That is, assuming the circuit is operating, if there are times during the circuit's operation when electrical signals are exchanged or potential interactions occur between A and B, then such a circuit can be defined as having "A and B indirectly connected" as a physical object. Even if there are times when no electrical signals are exchanged or potential interactions occur between A and B, if there are times during the circuit's operation when electrical signals are exchanged or potential interactions occur between A and B, then it can be defined as having "A and B indirectly connected." Note that "A and B are indirectly connected" is a definition of the connection relationship between circuit elements as a physical object. Therefore, for example, even if no power supply voltage is supplied to the circuit and the circuit is not operating, the circuit can still be defined as having "A and B indirectly connected" as a physical object (however, as an example, this is limited to cases where, when power supply voltage is supplied to the circuit and the circuit is operating, electrical signals are exchanged or potential interactions occur between A and B during the circuit's operation).

[0538] The following are specific examples of "indirect connections". First, an example of a case where "A and B are indirectly connected" is when A and B are connected via the source and drain of one or more transistors, as shown in Figures 38A1 and 38A2. Another example of a case where "A and B are indirectly connected" is when A and B are connected via one or more switches. When "A and B are indirectly connected", assuming the circuit is operating, one transistor between A and B will be in an ON state, conducting state, or a state in which current can flow at least once. Note that when "A and B are indirectly connected", this includes the case where one transistor between A and B is in an OFF state or a non-conducting state. When "A and B are indirectly connected" and multiple transistors are connected between A and B, assuming the circuit is operating, each of the multiple transistors between A and B will be in an ON state, conducting state, or a state in which current can flow at least once. In other words, when "A and B are indirectly connected," it is not necessary for all of the transistors to be in an ON state, a conducting state, or a state in which current can flow simultaneously. Therefore, when "A and B are indirectly connected," it includes cases where the transistors between A and B are in an OFF state or a non-conducting state at the same time or at different times. As another example, as shown in Figure 38A3, when A and C are connected via the source and drain of transistor TrP, and B and C are connected via the source and drain of transistor TrQ, it can be defined as "A and C are indirectly connected," "B and C are indirectly connected," or "A and B are indirectly connected." However, as will be discussed later, if a constant potential V is supplied to C from a power supply or GND, it can be said that "A and C are indirectly connected," or "B and C are indirectly connected," but it cannot be said that "A and B are indirectly connected."

[0539] Having shown examples of cases where a connection can be considered "indirect" and cases where it cannot, let's look at another example of a case where a connection cannot be considered "indirect." Even if electrical signals are exchanged or potential interactions occur between A and B during the operation of the circuit, there are exceptional cases where it cannot be said that "A and B are indirectly connected." An example of such an exceptional case is when A and B are connected via an insulator. In other words, when A and B are connected via an insulator, it cannot be said that "A and B are indirectly connected." A specific example of when A and B are connected via an insulator is when a capacitive element is connected between A and B, as shown in Figure 38A4. Another example of when A and B are connected via an insulator is when a transistor gate insulating film is interposed between A and B, as shown in Figure 38A5. In this case, it cannot be said that "A (the gate of the transistor) and B (the source or drain of the transistor) are indirectly connected."

[0540] Another example of a situation where it cannot be said that "A and B are indirectly connected" is when there is no timing for the exchange of electrical signals or potential interaction between A and B. For example, as shown in Figures 38A6 and 38A7, multiple transistors are connected via sources and drains in the path from A to B, and a constant potential V is supplied to the nodes between the transistors from a power source or GND. In this case, it cannot be said that "A and B are indirectly connected," but it can be said that "A and V are indirectly connected," or "B and V are indirectly connected." In Figure 38A3, if A and C are connected via the source and drain of transistor TrP, and B and C are connected via the source and drain of transistor TrQ, and a constant potential V is supplied to C from a power supply or GND, then the connection relationship is the same as in Figures 38A6 and 38A7, so it cannot be said that "A and B are indirectly connected," but it can be said that "A and C are indirectly connected" or "B and C are indirectly connected."

[0541] As shown above, we have provided an example of "indirect connection." As an example, the provisions for "indirect connection" are included in the provisions for "electrical connection," so if "A and B are indirectly connected," then "A and B are electrically connected."

[0542] Next, we will show specific examples of "direct connection." Examples of cases where "A and B are directly connected" include cases where A and B are connected without a circuit element in between, as shown in Figures 38B1, 38B2, and 38B3. Furthermore, as shown in Figures 38B4 and 38B5, when A and B are connected to a power source that supplies a constant potential V, or to GND, without a circuit element in between, we can say that "A and B are directly connected," "A and V are directly connected," or "B and V are directly connected." Furthermore, as shown in Figure 38B6, even when A (or B) is connected to a constant potential V via the source and drain of a transistor, we can say that "A and B are directly connected." Furthermore, since A and V, or B and V, are connected via the source and drain of a transistor, they cannot be said to be directly connected, and we can say that "A and V are indirectly connected," or "B and V are indirectly connected."

[0543] As shown above, an example of "direct connection" has been given, but as an example, since the provisions for "direct connection" are included in the provisions for "electrical connection," if "A and B are directly connected," then "A and B are electrically connected."

[0544] 100: Semiconductor device, 101: Pixel circuit, 160: Display device, 161: Pixel, 162: Pixel section, 163: Gate driver section, 164: Source driver section, 165: Gate line, 166: Source line, 167: Control section, M11: Transistor, M12: Transistor, M13: Transistor, M14: Transistor, M21: Transistor, M22: Transistor, M23: Transistor, M24: Transistor, M25: Transistor, M26: Transistor, M31: Transistor, M32: Transistor, M41: Transistor, M42: Transistor, M43: Transistor, C11: Capacitor element, C12: Capacitor element, C31: Capacitor element, C41: Capacitor element, LD: Light-emitting element, CS41: Current source, CS42: Current source, CS43: Current source, SL: Wiring, GL11: Wiring, GL12: Wiring, GL 21: Wiring, GL22: Wiring, GL23: Wiring, GL24: Wiring, GL25: Wiring, GL26: Wiring, GL31: Wiring, GL41: Wiring, GL42: Wiring, ANO: Wiring, CATH: Wiring, VL11: Wiring, VL12: Wiring, VL12a: Wiring, VL12b: Wiring, VL21: Wiring, VL22: Wiring, VL31: Wiring, VL41: Wiring, DL: Wiring, ND11: Node, ND12: Node, ND 13: Node, ND14: Node, ND31: Node, ND41: Node, ND42: Node, ND43: Node, S11: Switch, S13: Switch, S14: Switch, 200: Transistor, 200A: Transistor, 200B: Transistor, 370: Light-emitting element, 400: Display device, 411: Pixel, 412: Pixel, 412R: Pixel, 412G: Pixel, 412B: Pixel, 490: Display device

Claims

It comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a first capacitance element, a second capacitance element, and a light-emitting element. The first terminal of the first transistor is electrically connected to the gate of the second transistor and the first terminal of the first capacitive element. The first terminal of the second transistor is electrically connected to the first terminal of the third transistor, the gate of the fourth transistor, and the first terminal of the second capacitive element. The first terminal of the fourth transistor is electrically connected to the first terminal of the light-emitting element. The channel length of the second transistor is greater than the channel length of the fourth transistor. Semiconductor equipment. 　 In claim 1, The area of ​​the region where the conductive layer functioning as the first terminal of the second capacitance element and the conductive layer functioning as the second terminal of the second capacitance element overlap is greater than the area of ​​the region where the conductive layer functioning as the first terminal of the first capacitance element and the conductive layer functioning as the second terminal of the first capacitance element overlap. Semiconductor equipment. 　 In claim 1, An image signal is applied to the second terminal of the first transistor. A first potential is applied to the second terminal of the second transistor. A second potential is applied to the second terminal of the third transistor. A third potential is applied to the second terminal of the fourth transistor. A fourth potential is applied to the second terminal of the light-emitting element. The second terminal of the first capacitance element is supplied with one of the first to fourth potentials. The second terminal of the second capacitance element is supplied with one of the first to fourth potentials. The first potential is smaller than the potential of the image signal. The third potential is greater than the potential of the image signal. The aforementioned fourth potential is greater than the aforementioned third potential. The second potential is greater than the fourth potential. Semiconductor equipment. 　 In claim 1, Each of the first to fourth transistors is an n-channel transistor. The light-emitting element is a light-emitting diode, The first terminal of the light-emitting element is the cathode of the light-emitting diode. Semiconductor equipment. 　 In claim 1, It has a fifth transistor, The fifth transistor is provided in the current path including the fourth transistor, The fifth transistor has the function of being in an off state when the third transistor is in an on state. Semiconductor equipment. 　 In claim 1, It has a sixth transistor, The sixth transistor is provided in the current path including the second transistor, The sixth transistor has the function of being in an off state when the third transistor is in an on state. Semiconductor equipment. 　 In claim 1, It has a seventh transistor, The first terminal of the seventh transistor is electrically connected to the gate of the fourth transistor. The second terminal of the seventh transistor is given the same potential as the potential given to the second terminal of the second transistor. The seventh transistor has the function of being turned on when the fourth transistor is in the off state. Semiconductor equipment. 　 In claim 1, It has an eighth transistor, The first terminal of the eighth transistor is electrically connected to the gate of the second transistor. The second terminal of the eighth transistor is given the same potential as the potential given to the second terminal of the third transistor. The eighth transistor has the function of being turned on when the fourth transistor is in the off state. Semiconductor equipment. 　 In claim 1, It has a ninth transistor, The first terminal of the ninth transistor is electrically connected to the second terminal of the fourth transistor. A potential smaller than the potential applied to the second terminal of the fourth transistor is applied to the second terminal of the ninth transistor. The ninth transistor has the function of being turned on when the third transistor is turned on. Semiconductor equipment. 　 In claim 1, It has a 10th transistor, The first terminal of the tenth transistor is electrically connected to the first terminal of the light-emitting element. The second terminal of the 10th transistor is given the same potential as the potential given to the second terminal of the light-emitting element. The tenth transistor has the function of being turned on when the fourth transistor is in the off state. Semiconductor equipment. 　 In claim 1, Each of the first to fourth transistors includes an oxide semiconductor in its channel formation region. Semiconductor equipment. 　 A semiconductor device having a function to control the time over which it outputs current, It comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a first capacitance element, and a second capacitance element. The first terminal of the first transistor is electrically connected to the gate of the second transistor and the first terminal of the first capacitive element. The first terminal of the second transistor is electrically connected to the first terminal of the third transistor, the gate of the fourth transistor, and the first terminal of the second capacitive element. The fourth transistor has a function to control whether or not to output the current, The channel length of the second transistor is greater than the channel length of the fourth transistor. Semiconductor equipment. 　 In claim 12, The area of ​​the region where the conductive layer functioning as the first terminal of the second capacitance element and the conductive layer functioning as the second terminal of the second capacitance element overlap is greater than the area of ​​the region where the conductive layer functioning as the first terminal of the first capacitance element and the conductive layer functioning as the second terminal of the first capacitance element overlap. Semiconductor equipment. 　 In claim 12, The first terminal of the fourth transistor is the terminal from which the current is output. An image signal is applied to the second terminal of the first transistor. A first potential is applied to the second terminal of the second transistor. A second potential is applied to the second terminal of the third transistor. A third potential is applied to the second terminal of the fourth transistor. The second terminal of the first capacitance element is supplied with one of the first to third potentials. The second terminal of the second capacitance element is supplied with one of the first to third potentials. The first potential is smaller than the potential of the image signal. The third potential is greater than the potential of the image signal. The 2nd potential is greater than the 3rd potential. Semiconductor equipment. 　 In claim 12, It has a fifth transistor, The fifth transistor is provided in the current path including the fourth transistor, The fifth transistor has the function of being in an off state when the third transistor is in an on state. Semiconductor equipment. 　 In claim 12, It has a sixth transistor, The sixth transistor is provided in the current path including the second transistor, The sixth transistor has the function of being in an off state when the third transistor is in an on state. Semiconductor equipment. 　 In claim 12, It has a seventh transistor, The first terminal of the seventh transistor is electrically connected to the gate of the fourth transistor. The second terminal of the seventh transistor is given the same potential as the potential given to the second terminal of the second transistor. The seventh transistor has the function of being turned on when the fourth transistor is in the off state. Semiconductor equipment. 　 In claim 12, It has an eighth transistor, The first terminal of the eighth transistor is electrically connected to the gate of the second transistor. The second terminal of the eighth transistor is given the same potential as the potential given to the second terminal of the third transistor. The eighth transistor has the function of being turned on when the fourth transistor is in the off state. Semiconductor equipment. 　 In claim 12, It has a ninth transistor, The first terminal of the fourth transistor is the terminal from which the current is output. The first terminal of the ninth transistor is electrically connected to the second terminal of the fourth transistor. A potential smaller than the potential applied to the second terminal of the fourth transistor is applied to the second terminal of the ninth transistor. The ninth transistor has the function of being turned on when the third transistor is turned on. Semiconductor equipment. 　 In claim 12, Each of the first to fourth transistors includes an oxide semiconductor in its channel formation region. Semiconductor equipment.

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