Quantum circuit compilation using boundary fusion of entangling operations

Abstract

A system for quantum computation includes a quantum processor including qubits and control circuitry, operable to execute multi-qubit entangling operations acting on more than two qubits, and processors configured to obtain a circuit representation of a quantum computational task, generate an executable circuit, and provide instructions to the control circuitry for execution. Generating the executable circuit includes decomposing portions of the circuit representation into operation sequences including entangling operations, constrained such that each sequence includes a boundary entangling operation of predetermined form, and combining boundary entangling operations into multi-qubit entangling operations acting on more than two qubits implementing combined entangling action.

Description

[0001] QUANTUM CIRCUIT COMPILATION USING BOUNDARY FUSION OF ENTANGLING OPERATIONS CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to US Provisional Patent Application No. 63 / 750,306, titled " Efficient compilation of quantum circuits using multi-qubit gates", filed January 28, 2025, which is hereby incorporated by reference in its entirety.

[0003] FIELD OF INVENTION

[0004] The present disclosure relates to quantum computing, and more particularly to methods and systems for the compilation of quantum circuits.

[0005] BACKGROUND

[0006] Quantum computers leverage quantum mechanical phenomena to perform computational tasks. A quantum computer operates on quantum bits, or qubits, which can exist in superpositions of quantum states and can exhibit entanglement with other qubits. These properties enable quantum computers to explore computational approaches that differ from those available to classical computers.

[0007] Quantum algorithms are typically expressed as quantum circuits including sequences of quantum operations applied to qubits. These operations include single-qubit operations, which operate on individual qubits, and multi-qubit operations, which create correlations or entanglement between two or more qubits. The process of translating a high-level quantum algorithm into a sequence of operations that can be executed on specific quantum hardware is referred to as quantum circuit compilation.

[0008] Different quantum computing platforms support different sets of native operations, which are the primitive operations directly implementable by the hardware. For example, trappedion quantum computers, superconducting quantum computers, and neutral-atom quantum computers each have characteristic operation sets and connectivity patterns. A compiler translates quantum circuits into sequences of these native operations.Entangling operations, which create quantum correlations between qubits, are typically more challenging to implement with high fidelity compared to single-qubit operations. Entangling operations often require longer execution times and are more susceptible to various noise sources, including decoherence and control errors. As a result, the number and characteristics of entangling operations in a compiled circuit can substantially affect the overall fidelity of circuit execution.

[0009] Some quantum computing platforms, such as trapped-ion systems, support long-range interactions between qubits and can implement entangling operations that act on multiple qubit pairs simultaneously. These multi-qubit entangling operations can couple arbitrary pairs of qubits within a register, potentially enabling more efficient circuit implementations compared to platforms with limited qubit connectivity.

[0010] The quantum volume metric has been developed as a benchmark for evaluating the performance of quantum computers. Quantum volume tests involve executing randomized circuits of increasing size and depth, with the test being passed if the circuits are executed with sufficient fidelity. The structure of quantum volume circuits, which involve layers of two-qubit operations followed by qubit permutations, is representative of many quantum algorithms and applications.

[0011] Compilation strategies that reduce the number of entangling operations or the total time during which qubits are subject to entangling interactions can improve circuit execution fidelity. Similarly, reducing the magnitude of control fields or drive amplitudes used to implement entangling operations can decrease error rates associated with mechanisms such as photon scattering in optically-driven systems.

[0012] SUMMARY

[0013] This summary is provided to introduce a selection of concepts in a simplified form that are further described below in the detailed description. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.

[0014] According to an aspect of the present disclosure, a system for quantum computation is provided. The system includes a quantum processor including a plurality of qubits andcontrol circuitry. The quantum processor is operable to execute multi-qubit entangling operations acting on more than two qubits. The system further includes one or more processors configured to obtain a circuit representation of a quantum computational task, generate an executable circuit for the circuit representation, and provide instructions corresponding to the executable circuit to the control circuitry for execution by the quantum processor. Generating the executable circuit includes decomposing a plurality of portions of the circuit representation into respective operation sequences including one or more entangling operations. The decomposing is constrained such that each of a plurality of the operation sequences includes a boundary entangling operation of a predetermined form, executable by the quantum processor, positioned at a boundary of the operation sequence, wherein the boundary is one of a beginning or an end of the operation sequence. Generating the executable circuit further includes combining a plurality of the boundary entangling operations into at least one multi-qubit entangling operation of the executable circuit acting on more than two qubits that implements a combined entangling action of the plurality of the boundary entangling operations.

[0015] According to other aspects of the present disclosure, the system may include one or more of the following features. The at least one multi-qubit entangling operation may be scheduled by the one or more processors for execution by the quantum processor during the same time interval. Each of the plurality of portions may correspond to a two-qubit operation acting on a respective pair of target qubits of the plurality of qubits. The circuit representation may include a plurality of successive logical circuit layers, each logical circuit layer including a plurality of the two-qubit operations acting on disjoint target qubit pairs. Generating the executable circuit may include, for each of the plurality of successive logical circuit layers, decomposing two-qubit operations of the logical circuit layer into the respective operation sequences such that each of a plurality of the operation sequences includes a boundary entangling operation of the predetermined form positioned at a boundary of the operation sequence. Combining a plurality of the boundary entangling operations into at least one multi-qubit entangling operation of the executable circuit may include combining boundary entangling operations of the predetermined form positioned at boundaries of operation sequences corresponding to two successive logical circuit layers into a single multi-qubit entangling operation. Relative to a compilation of the circuitrepresentation prior to said combining, in which each logical circuit layer of the circuit representation is implemented using M multi-qubit entangling operations acting on more than two qubits, the number of multi-qubit entangling operations acting on more than two qubits in the executable circuit may be reduced from M\L multi-qubit entangling operations to (M-1)\L+1 multi-qubit entangling operations, wherein L is the number of logical circuit layers of the circuit representation and M is the number of multi-qubit entangling operations acting on more than two qubits used to implement each logical circuit layer in the compilation prior to the combining.

[0016] According to further aspects of the present disclosure, the circuit representation may include a plurality of successive logical circuit layers, each logical circuit layer including one or more of the portions, and combining the plurality of the boundary entangling operations may include combining boundary entangling operations associated with two successive logical circuit layers into a single multi-qubit entangling operation acting on more than two qubits. The at least one multi-qubit entangling operation may act on an overlapping set of target qubits of the plurality of qubits that includes qubits that are target qubits of operations in a first logical circuit layer of the plurality of successive logical circuit layers and qubits that are target qubits of operations in a second logical circuit layer successive to the first logical circuit layer. The at least one multi-qubit entangling operation may implement couplings between overlapping pairs of qubits that are associated with boundary entangling operations in operation sequences corresponding to portions in the two successive logical circuit layers. Generating the executable circuit may include repeatedly applying, across a plurality of interfaces between successive logical circuit layers of the circuit representation, a compilation pattern that includes, for each interface between two successive logical circuit layers: decomposing one or more of the portions included in each of the two successive logical circuit layers into respective operation sequences including boundary entangling operations of the predetermined form adjacent to the interface between the two successive logical circuit layers; and combining at least the boundary entangling operations of the predetermined form adjacent to the interface into at least one multi-qubit entangling operation acting on more than two qubits, wherein the compilation pattern is applied at the plurality of the interfaces to generate the executable circuit. The circuit representation may include L successive logical circuit layers, and theexecutable circuit may include not more than 2L+1 multi-qubit entangling operations acting on more than two qubits.

[0017] According to additional aspects of the present disclosure, at least one of the portions may include a two-qubit unitary operation acting on a respective pair of qubits of the plurality of qubits. Decomposing the two-qubit unitary operation may include generating an operation sequence that begins with a correlated ZZ rotation and includes no more than three correlated ZZ rotations, thereby limiting an entangling-operation depth associated with implementing the two-qubit unitary operation. Decomposing the two-qubit unitary operation may include performing a Cartan decomposition. Decomposing the two-qubit unitary operation may include selecting a phase of an initial correlated ZZ rotation such that at least one Cartan entanglement phase of the resulting decomposition is zero. The phase may be selected by identifying a zero of a scalar function dependent on a Cartan volume associated with the two-qubit unitary operation.

[0018] According to still further aspects of the present disclosure, at least one of the operation sequences may include one or more single-qubit rotation operations. Combining the plurality of the boundary entangling operations may further include propagating at least one single-qubit rotation operation from a first operation sequence to a second operation sequence and absorbing the at least one single-qubit rotation operation into the second operation sequence, thereby positioning at least one entangling operation of the predetermined form at a boundary of at least one of the first operation sequence or the second operation sequence for combining into the at least one multi-qubit entangling operation. The combining of the plurality of the boundary entangling operations into the at least one multi-qubit entangling operation may reduce a total duration of entangling operations in the executable circuit, thereby decreasing an overall dephasing error of the executable circuit.

[0019] According to yet further aspects of the present disclosure, generating the executable circuit may further include introducing one or more single-qubit rotation operations at an interface between two operation sequences that are adjacent in an execution order of the executable circuit, and propagating and absorbing the one or more single-qubit rotation operations into the two operation sequences to reduce a magnitude of entanglement phases of boundaryentangling operations of the predetermined form adjacent to the interface that are combined into the at least one multi-qubit entangling operation. Reducing the magnitude of the entanglement phases may cause the control circuitry, in implementing the at least one multi-qubit entangling operation, to apply one or more control signals having reduced drive power or reduced drive field amplitude, thereby decreasing an overall depolarization error of the executable circuit. The control circuitry may include at least one laser source configured to generate one or more laser beams for implementing the at least one multiqubit entangling operation, and the one or more control signals may control the at least one laser source such that reduced optical power or reduced optical field amplitude of the one or more laser beams is applied to the plurality of qubits, thereby decreasing a photon-scattering probability associated with implementing the at least one multi-qubit entangling operation. Introducing the one or more single-qubit rotation operations may include inserting an identity operation at the interface by inserting a single-qubit rotation and an inverse single-qubit rotation. Introducing and propagating and absorbing the one or more single-qubit rotation operations may be iteratively performed across interfaces between successive operation sequences of the executable circuit, and a computational complexity of said iteratively performed introducing and propagating and absorbing may be polynomial in a number of qubits and linear in a circuit depth. Introducing and propagating and absorbing the one or more single-qubit rotation operations may include selecting rotation angles to reduce a sum of absolute values of entanglement phases associated with the boundary entangling operations. Selecting the rotation angles may include, for each interface between successive logical circuit layers, optimizing rotation angles for singlequbit rotation operations introduced at the interface with respect to entanglement phases of boundary entangling operations adjacent to the interface. The optimizing may be performed sequentially for the interfaces.

[0020] According to other aspects of the present disclosure, combining the plurality of the boundary entangling operations into the at least one multi-qubit entangling operation may reduce a total duration during which the quantum processor performs entangling operations to implement the circuit representation, thereby increasing an implementation fidelity of the quantum computational task. The quantum processor may include a trapped-ion quantum processor. The at least one multi-qubit entangling operation may implement anIsing-type interaction. The at least one multi-qubit entangling operation may implement a layer of mutually commuting two-qubit ZZ interactions acting simultaneously on a plurality of pairs of qubits. The predetermined form of the boundary entangling operation may include a correlated ZZ rotation. The boundary entangling operation may include an Rzzoperation. The decomposing may be constrained such that, for each of the plurality of operation sequences, the boundary entangling operation of the predetermined form is positioned at the beginning of the operation sequence. The quantum computational task may include a quantum simulation task. The at least one multi-qubit entangling operation may be parameterized by a real-valued coupling matrix defining coupling phases between pairs of qubits. Generating the executable circuit may reduce a nuclear norm of the coupling matrix of the at least one multi-qubit entangling operation. Generating the executable circuit may reduce a sum of nuclear norms of coupling matrices of multi-qubit entangling operations of the executable circuit.

[0021] According to another aspect of the present disclosure, a computer-implemented method for generating an executable quantum circuit for execution by a quantum processor having a plurality of qubits and control circuitry configured to implement the instructions of the executable quantum circuit to control operations of the quantum processor is provided. The method includes obtaining, by one or more processors, a circuit representation of a quantum computational task. The method further includes decomposing, by the one or more processors, a plurality of portions of the circuit representation into respective operation sequences, each operation sequence including one or more entangling operations, wherein the decomposing is constrained such that each of a plurality of the operation sequences includes a boundary entangling operation of a predetermined form that is executable by the quantum processor and positioned at a boundary of the operation sequence, the boundary being one of a beginning or an end of the operation sequence. The method further includes combining, by the one or more processors, a plurality of the boundary entangling operations into at least one multi-qubit entangling operation of the executable quantum circuit that acts on more than two qubits and that implements a combined entangling action of the plurality of the boundary entangling operations. The method further includes providing, by the one or more processors, instructionscorresponding to the executable quantum circuit to the control circuitry for execution by the quantum processor.

[0022] According to other aspects of the present disclosure, the method may include one or more of the following features. The instructions may schedule the at least one multi-qubit entangling operation for execution by the quantum processor during a single time interval. Each of the plurality of portions may correspond to a two-qubit operation acting on a respective pair of target qubits of the plurality of qubits. The circuit representation may include a plurality of successive logical circuit layers, each logical circuit layer including a plurality of the two-qubit operations acting on disjoint target qubit pairs. Generating the executable quantum circuit may include, for each of the plurality of successive logical circuit layers, decomposing two-qubit operations of the logical circuit layer into the respective operation sequences such that each of a plurality of the operation sequences includes a boundary entangling operation of the predetermined form positioned at a boundary of the operation sequence. The combining may include combining boundary entangling operations of the predetermined form positioned at boundaries of operation sequences corresponding to two successive logical circuit layers into a single multi-qubit entangling operation. Relative to a compilation of the circuit representation prior to said combining, in which each logical circuit layer of the circuit representation is implemented using M multi-qubit entangling operations acting on more than two qubits, a number of multi-qubit entangling operations acting on more than two qubits in the executable quantum circuit may be reduced from M\L multi-qubit entangling operations to (M-l) \L+1 multi-qubit entangling operations, wherein L is the number of logical circuit layers of the circuit representation and M is the number of multi-qubit entangling operations acting on more than two qubits used to implement each logical circuit layer in said compilation prior to said combining.

[0023] According to further aspects of the present disclosure, the circuit representation may include a plurality of successive logical circuit layers, each logical circuit layer including one or more of the portions, and the combining may include combining boundary entangling operations associated with two successive logical circuit layers into a single multi-qubit entangling operation acting on more than two qubits. The at least one multiqubit entangling operation may act on an overlapping set of target qubits of the plurality ofqubits that includes qubits that are target qubits of operations in a first logical circuit layer of the plurality of successive logical circuit layers and qubits that are target qubits of operations in a second logical circuit layer successive to the first logical circuit layer. The at least one multi-qubit entangling operation may implement couplings between overlapping pairs of qubits that are associated with boundary entangling operations in operation sequences corresponding to portions in the two successive logical circuit layers. Generating the executable quantum circuit may include repeatedly applying, across a plurality of interfaces between successive logical circuit layers of the circuit representation, a compilation pattern that includes, for each interface between two successive logical circuit layers: decomposing one or more of the portions included in each of the two successive logical circuit layers into respective operation sequences that include boundary entangling operations of the predetermined form adjacent to the interface between the two successive logical circuit layers; and combining at least the boundary entangling operations of the predetermined form adjacent to the interface into at least one multi-qubit entangling operation acting on more than two qubits, wherein the compilation pattern is applied at the plurality of the interfaces to generate the executable quantum circuit. The circuit representation may include L successive logical circuit layers, and the executable quantum circuit may include not more than 2L+1 multi-qubit entangling operations acting on more than two qubits.

[0024] According to additional aspects of the present disclosure, at least one of the portions may include a two-qubit unitary operation acting on a respective pair of qubits of the plurality of qubits. Decomposing the two-qubit unitary operation may include generating an operation sequence that begins with a correlated ZZ rotation and includes no more than three correlated ZZ rotations, thereby limiting an entangling-operation depth associated with implementing the two-qubit unitary operation. Decomposing the two-qubit unitary operation may include performing a Cartan decomposition. Decomposing the two-qubit unitary operation may include selecting a phase of an initial correlated ZZ rotation such that at least one Cartan entanglement phase of the resulting decomposition is zero. Selecting the phase may include identifying a zero of a scalar function dependent on a Cartan volume associated with the two-qubit unitary operation.According to still further aspects of the present disclosure, at least one of the operation sequences may include one or more single-qubit rotation operations. The combining may further include propagating at least one single-qubit rotation operation from a first operation sequence to a second operation sequence and absorbing the at least one singlequbit rotation operation into the second operation sequence, thereby positioning at least one entangling operation of the predetermined form at a boundary of at least one of the first operation sequence or the second operation sequence for combining into the at least one multi-qubit entangling operation. The combining may reduce a total duration of entangling operations executed by the quantum processor in implementing the executable quantum circuit, thereby decreasing an overall dephasing error of the executable quantum circuit.

[0025] According to yet further aspects of the present disclosure, the method may further include introducing one or more single-qubit rotation operations at an interface between two operation sequences that are adjacent in an execution order of the executable quantum circuit, and propagating and absorbing the one or more single-qubit rotation operations into the two operation sequences to reduce a magnitude of entanglement phases of boundary entangling operations of the predetermined form adjacent to the interface that are combined into the at least one multi-qubit entangling operation. Reducing the magnitude of the entanglement phases may cause the control circuitry, in implementing the at least one multi-qubit entangling operation, to apply one or more control signals having reduced drive power or reduced drive field amplitude, thereby decreasing an overall depolarization error of the executable quantum circuit. The control circuitry may include at least one laser source configured to generate one or more laser beams for implementing the at least one multi-qubit entangling operation, and the one or more control signals may control the at least one laser source such that reduced optical power or reduced optical field amplitude of the one or more laser beams is applied to the plurality of qubits, thereby decreasing a photon- scattering probability associated with implementing the at least one multi-qubit entangling operation. Introducing the one or more single-qubit rotation operations may include inserting an identity operation at the interface by inserting a single-qubit rotation and an inverse single-qubit rotation. The introducing and the propagating and absorbing may be iteratively performed across interfaces between two operation sequences that areadjacent in the execution order of the executable quantum circuit, and a computational complexity of the iteratively performed introducing and propagating and absorbing may be polynomial in a number of qubits and linear in a circuit depth. Introducing and propagating and absorbing the one or more single-qubit rotation operations may include selecting rotation angles to reduce a sum of absolute values of entanglement phases associated with the boundary entangling operations. Selecting the rotation angles may include, for each interface between two operation sequences that are adjacent in an execution order of the executable quantum circuit, optimizing rotation angles for single-qubit rotation operations introduced at the interface with respect to entanglement phases of boundary entangling operations adjacent to the interface. The optimizing may be performed sequentially for the interfaces.

[0026] According to other aspects of the present disclosure, the combining may reduce a total duration during which the quantum processor performs entangling operations to implement the quantum computational task, thereby increasing an implementation fidelity of the quantum computational task. The quantum processor may include a trapped-ion quantum processor. The at least one multi-qubit entangling operation may implement an Ising-type interaction. The at least one multi-qubit entangling operation may implement a layer of mutually commuting two-qubit ZZ interactions acting simultaneously on a plurality of pairs of qubits. The predetermined form of the boundary entangling operation may include a correlated ZZ rotation. The boundary entangling operation may include an Rzzoperation. The decomposing may be constrained such that, for each of the plurality of operation sequences, the boundary entangling operation of the predetermined form is positioned at the beginning of the operation sequence. The quantum computational task may include a quantum simulation task. The at least one multi-qubit entangling operation may be parameterized by a real-valued coupling matrix defining coupling phases between pairs of qubits. Generating the executable quantum circuit may include reducing a nuclear norm of the coupling matrix of the at least one multi-qubit entangling operation. Generating the executable quantum circuit may include reducing a sum of nuclear norms of coupling matrices of multi-qubit entangling operations of the executable quantum circuit. Providing the instructions may be performed prior to generating hardware-specific control signals for implementing the executable quantum circuit on the quantum processor.According to another aspect of the present disclosure, a non-transitory computer-readable medium storing instructions that, when executed by one or more processors of a system including a quantum processor having a plurality of qubits and control circuitry, cause the one or more processors to perform the method as described above is provided.

[0027] The foregoing general description of the illustrative embodiments and the following detailed description thereof are merely exemplary aspects of the teachings of this disclosure and are not restrictive.

[0028] BRIEF DESCRIPTION OF FIGURES

[0029] Non-limiting and non- exhaustive examples are described with reference to the following figures.

[0030] FIG. 1 depicts a part of an exemplary circuit representation, in accordance with aspects of the present disclosure.

[0031] FIG. 2A illustrates a block diagram of a quantum computing system, in accordance with aspects of the present disclosure.

[0032] FIG. 2B illustrates a block diagram of a quantum computing system including a trapped-ion quantum processor, in accordance with an embodiment.

[0033] FIG. 3A depicts a part of a layered quantum circuit representation decomposed into blocks including a sequence of entangling operations and single-qubit rotation operations, in accordance with aspects of the present disclosure.

[0034] FIG. 3B illustrates an exemplary decomposition of an SU(4) into a sequence of entangling operations and single-qubit rotation operations beginning with an entangling operation, in accordance with aspects of the present disclosure.

[0035] FIG. 3C illustrates an exemplary fusion of entangling operations of the quantum circuit of FIG. 3 A, decomposed according to the scheme of FIG. 3B, in accordance with aspects of the present disclosure.

[0036] FIG. 4 illustrates a flowchart for a method for compiling quantum circuits using multiqubit entangling operations, in accordance with aspects of the present disclosure.FIG. 5 illustrates a flowchart for a method for optimizing the compilation of quantum circuits, in accordance with aspects of the present disclosure.

[0037] It will be appreciated that for simplicity and clarity of illustration, elements shown in the figures have not necessarily been drawn to scale. For example, the dimensions and / or aspect ratio of some of the elements can be exaggerated relative to other elements for clarity. Further, where considered appropriate, reference numerals can be repeated among the figures to indicate corresponding or analogous elements throughout the several views.

[0038] DETAILED DESCRIPTION

[0039] The following description sets forth exemplary aspects of the present disclosure. It should be recognized, however, that such description is not intended as a limitation on the scope of the present disclosure. Rather, the description also encompasses combinations and modifications to those exemplary aspects described herein.

[0040] In the following detailed description, specific details are set forth in order to provide a thorough understanding of the disclosure. However, it will be understood by those skilled in the art that the disclosure may be practiced without these specific details. In other instances, well-known methods, procedures, and components have not been described in detail so as not to obscure the present disclosure. Some features or elements described with respect to one system may be combined with features or elements described with respect to other systems. For the sake of clarity, discussion of same or similar features or elements may not be repeated.

[0041] Although the disclosure is not limited in this regard, discussions utilizing terms such as, for example, "compiling," "decomposing," "combining," "fusing," "propagating," "absorbing," "optimizing," "scheduling," "generating," "obtaining," "providing," or the like, may refer to operation(s) and / or process(es) of a computer, a computing platform, a computing system, or other electronic computing device, that manipulates and / or transforms data represented as physical (e.g., electronic) quantities within the computer's registers and / or memories into other data similarly represented as physical quantities within the computer's registers and / or memories or other non-transitory storage medium that may store instructions to perform operations and / or processes.Although the disclosure is not limited in this regard, the terms “plurality” and “a plurality” as used herein may include, for example, “multiple” or “two or more”. The terms “plurality” or “a plurality” may be used throughout the specification to describe two or more components, devices, elements, units, parameters, or the like. Unless explicitly stated, the methods described herein are not constrained to a particular order or sequence. Additionally, some of the described methods or elements thereof can occur or be performed simultaneously, at the same point in time, or concurrently.

[0042] Although the disclosure is not limited in this regard, by using the term “or” when listing two or more items or options, it is meant that each item, and each plausible or feasible combination of the listed items including a combination of all listed items may be considered.

[0043] The present disclosure relates to systems and methods for compiling quantum circuits for execution on quantum processors that support multi-qubit entangling operations. Quantum processors may execute quantum computational tasks by implementing sequences of quantum gate operations on qubits. The compilation of a quantum computational task into an executable circuit involves decomposing the task into a sequence of native operations (sometimes referred to as native gates) supported by the quantum hardware. The decomposition of a particular quantum algorithm into a sequence of available operations is not unique, and different decompositions may result in different implementation fidelities when executed on quantum hardware.

[0044] Quantum processors that support programmable long-range interactions between qubits may execute multi-qubit entangling operations that act simultaneously on more than two qubits. Such quantum processors include, but are not limited to, trapped-ion quantum processors, arrays of optically trapped neutral atoms, and atoms in optical cavities. The compilation techniques described herein leverage the capability of such quantum processors to execute multi-qubit entangling operations, thereby reducing the number of sequential entangling-operations and reducing magnitudes of entanglement phases associated with the entangling operations. Reducing the number of sequential entanglingoperation layers or stages, where each entangling-operation layer or stage corresponds to a time interval during which one or more entangling operations are executed by the quantumprocessor, may decrease overall dephasing error of the executable circuit. Reducing magnitudes of entanglement phases may decrease overall depolarization error of the executable circuit by enabling the use of reduced drive power or reduced drive field amplitude in implementing the entangling operations.

[0045] As used herein, a "circuit representation" may refer to a representation of a quantum computational task in terms of quantum operations acting on qubits. A circuit representation may be provided in various forms, including but not limited to a sequence of operations, a directed acyclic graph, or other suitable representations. The circuit representation may represent an abstract or logical description of the quantum computational task prior to compilation into hardware-specific instructions.

[0046] As used herein, a "circuit portion" or "portion" may refer to a part of the circuit representation that corresponds to one or more quantum operations. For example, a portion may correspond to a two-qubit operation acting on a respective pair of target qubits. As used herein, a "logical circuit layer", "logical layer" or "layer" may refer to a grouping of quantum operations within the circuit representation that may be conceptually organized together. For example, a logical circuit layer may include a plurality of two-qubit operations acting on disjoint target qubit pairs. The circuit representation may include a plurality of successive logical circuit layers. Logical circuit layers represent an organizational structure of the circuit representation and are distinguished from entanglingoperation layers, which refer to layers or stages of entangling operations in a compiled or partially compiled circuit.

[0047] As used herein, an "executable circuit" may refer to a compiled circuit that includes instructions for execution by a quantum processor. The executable circuit may be generated from the circuit representation through the compilation techniques described herein. As used herein, a "two-qubit operation" may refer to a quantum operation that acts on two qubits. According to some aspects, a two-qubit operation may be a unitary operation in SU(4), the special unitary group of degree four.

[0048] As used herein, an "entangling operation" may refer to a quantum operation that generates entanglement between qubits. Entangling operations include two-qubit entanglingoperations that act on two qubits and multi-qubit entangling operations that act on more than two qubits. A multi-qubit entangling operation may implement a layer of mutually commuting two-qubit interactions acting simultaneously on a plurality of pairs of qubits. As used herein, a "single-qubit operation" may refer to a quantum operation that acts on a single qubit, such as single-qubit rotation operations (may also be referred to as "singlequbit rotations"). Single-qubit rotation operations may include rotations about various axes of the Bloch sphere, such as rotations about the X, Y, or Z axes.

[0049] As used herein, an "operation sequence" may refer to a sequence of quantum operations that implements a portion of the circuit representation. An operation sequence may include one or more entangling operations and optionally one or more single-qubit rotation operations.

[0050] Referring to FIG. 1, a part of an exemplary circuit representation 10, which illustrates a structure of a quantum computational task organized into successive logical circuit layers, is shown. Circuit representation 10 may be obtained by one or more processors configured to compile the quantum computational task into an executable circuit. Circuit representation 10 includes a plurality of horizontal lines arranged vertically representing timelines of different qubits referenced 20A-20G.

[0051] Circuit representation 10 includes a plurality of successive logical circuit layers, such as a first layer 50A and a second layer 50B. Each logical circuit layer includes a plurality of portions, where each portion corresponds to a two-qubit operation acting on a disjoint target qubit pair such as two-qubit operations 301,1-302,4of layers 50A and 50B shown in FIG. 1. For example, in first layer 50A, the qubits are organized into disjoint pairs, and each pair undergoes a respective two-qubit operation. Two qubit operation 301,1acts on qubit 20A and qubit 20B, two qubit operation 301,2acts on qubit 20C and qubit 20D and two qubit operation 301,3acts on qubit 20E and qubit 20F.

[0052] With continued reference to FIG. 1, a first permutation layer 40A follows first layer 50A and reassigns qubit pairings for second layer 50B. First permutation layer 40A shuffles the assignment of qubits to pairs such that different qubits are paired together in the subsequent logical circuit layer 50B. In second layer 50B, the qubits are organized into new disjointpairs based on the permutation applied by first permutation layer 40A. Accordingly, second layer two qubit operations, such as two qubit operations 302,1- 302,4, act on the respective reassigned qubit pairs. A second permutation layer 40B follows second layer 50B and may reassign qubit pairings for subsequent logical circuit layers. The ellipsis markers shown in both horizontal and vertical directions in the circuit representation 10 indicate that additional logical circuit layers and additional qubits may be included.

[0053] The structure shown in circuit representation 10 is representative of various quantum computational tasks that may benefit from the compilation techniques described herein. Quantum volume circuits, which serve as benchmarks for evaluating quantum computer performance, exhibit this layered structure with successive layers of two-qubit operations separated by permutations that reassign qubit pairings between layers. The quantum volume test structure is universal in that any polynomial-depth quantum algorithm may be implemented in polynomial-depth using this structure. Beyond quantum volume benchmarks, other quantum computational tasks that may be expressed in this layered form include quantum simulation tasks, variational circuits, and other quantum algorithms. According to some aspects, the quantum computational task may include a quantum simulation task. Quantum simulation tasks involve simulating the dynamics or properties of quantum systems, such as the time evolution of quantum states under a Hamiltonian or the ground state properties of molecular or condensed matter systems. Quantum simulation tasks may be expressed as quantum circuits with layered structures including sequences of two-qubit operations acting on qubit pairs, with the qubit pairings potentially varying between layers. The compilation techniques described herein may reduce the number of entangling operations and improve implementation fidelity for quantum simulation tasks by combining boundary entangling operations from adjacent operation sequences into multi-qubit entangling operations.

[0054] It should be understood that the layered structure illustrated in circuit representation 10 of FIG. 1 is provided as one non-limiting example of a representation of a quantum computational task that may be utilized according to the compilation techniques described herein. The compilation disclosed is not limited to circuit representations that are provided in a pre-layered format or that exhibit the specific structure shown in FIG. 1. In someaspects, a circuit representation may be provided in other forms, such as a directed acyclic graph, an unstructured sequence of operations, or other compiler intermediate representations. In such cases, the one or more processors performing compilation may identify interfaces between adjacent portions of the circuit representation at which boundary entangling operations may be combined into multi-qubit entangling operations. For example, the one or more processors may analyze the circuit representation to identify two-qubit operations that are adjacent in an execution order and decompose these operations into respective operation sequences with boundary entangling operations positioned for combining at the interface between the adjacent operation sequences.

[0055] According to some aspects, the compilation techniques are not limited to circuit representations having uniform layer sizes. Different logical circuit layers of the circuit representation may include different numbers of e.g., two-qubit operations. For example, a first logical circuit layer may include a first number of two-qubit operations acting on disjoint target qubit pairs, and a second logical circuit layer may include a second number of two-qubit operations acting on disjoint target qubit pairs, where the first number and the second number are different. The compilation techniques may be applied to such non-uniform structures by decomposing the two-qubit operations in each logical circuit layer into respective operation sequences with boundary entangling operations and combining the boundary entangling operations at interfaces between successive logical circuit layers, regardless of the number of two-qubit operations in each layer.

[0056] Referring to FIG. 2A, a quantum computing system 100 in accordance with aspects of the present disclosure is shown. Quantum computing system 100 includes a compiler 110, a quantum processor 140 and control circuitry 150. Compiler 110 includes a processor 120 and a memory 130. Processor 120 and memory 130 together may form a classical computing subsystem that executes instructions and performs computational tasks related to compiling quantum circuits. Memory 130 may store data and instructions used by processor 120 during the compilation process. According to some aspects, compiler 110 may be implemented as software instructions stored in memory 130 and executed by processor 120, or as dedicated hardware, or as a combination thereof.With continued reference to FIG. 2 A, quantum processor 140 may include a plurality of qubits and may be operable to execute multi-qubit entangling operations acting on more than two qubits. Control circuitry 150 may be connected to both compiler 110 and to quantum processor 140. Control circuitry 150 may serve as an interface that receives compiled quantum circuit instructions and translates the compiled quantum circuit instructions into control signals for quantum processor 140. Quantum processor 140 executes quantum operations based on the control signals received from control circuitry 150.

[0057] In accordance with aspects of the present disclosure, processor 120 (or one or more processors of quantum computing system 100) may be configured to obtain a circuit representation of a quantum computational task, such as circuit representation 10 described above with reference to FIG. 1. According to some aspects, processor 120 may generate the circuit representation from a higher-level description of the quantum computational task. Processor 120 may be further configured to generate an executable circuit for the circuit representation and provide instructions corresponding to the executable circuit to control circuitry 150 for execution by quantum processor 140.

[0058] Generating the executable circuit may include decomposing a plurality of portions of the circuit representation, such as the two qubit operations of circuit 10 of FIG. 1, into respective operation sequences. Each operation sequence may include one or more entangling operations. The decomposing may be constrained such that each of a plurality of the operation sequences includes a boundary entangling operation of a predetermined form that is executable by quantum processor 140. The boundary entangling operation may be positioned at a boundary of the operation sequence, where the boundary is one of a beginning or an end of the operation sequence.

[0059] Generating the executable circuit may further include combining a plurality of the boundary entangling operations into at least one multi-qubit entangling operation of the executable circuit. The at least one multi-qubit entangling operation acts on more than two qubits and implements a combined entangling action of the plurality of the boundary entangling operations. According to some aspects, the boundary entangling operations to be combined may be associated with operation sequences that are adjacent in an executionorder of the executable circuit, meaning that the operation sequences are consecutive such that the end of one operation sequence is followed by the beginning of another operation sequence. By combining boundary entangling operations from adjacent operation sequences into multi-qubit entangling operations, the total number of entangling-operation layers in the executable circuit may be reduced compared to a compilation that does not perform such combining.

[0060] According to some aspects, the at least one multi-qubit entangling operation may be scheduled by processor 120 for execution by quantum processor 140 during the same time interval. Scheduling the multi-qubit entangling operation for execution during a single time interval may enable quantum processor 140 to execute multiple two-qubit interactions simultaneously, thereby reducing the total duration of entangling operations in the executable circuit.

[0061] According to some aspects, providing the instructions corresponding to the executable circuit to control circuitry 150 may be performed prior to generating hardware-specific control signals for implementing the executable circuit on quantum processor 140. Control circuitry 150 may receive the instructions from processor 120 and subsequently generate the hardware-specific control signals based on the received instructions.

[0062] Referring to FIG. 2B, an exemplary trapped-ion quantum processor 160 is shown. Quantum processor 160 may include a vacuum chamber 165 that houses several components for quantum operations. Within vacuum chamber 165, drive circuitry 170 may be connected to an ion trap 180. Drive circuitry 170 may provide electrical signals to control the electrodes of ion trap 180, to generate trapping fields that confine the ions. A radiation source 190 (e.g., a laser source) may be positioned to direct radiation toward ion trap 180, enabling manipulation of trapped ions for quantum computation, including implementing single-qubit and multi-qubit entangling operations. A detection and imaging system 175 may be coupled to ion trap 180 to capture and measure quantum states of the ions. Outside vacuum chamber 165, control circuitry 155 may be connected to detection and imaging system 175 and to radiation source 190, and may coordinate the operation of quantum processor 160. A compiler 115 may be connected to control circuitry 155, providing compiled quantum circuit instructions for execution on quantum processor 160. Accordingto some aspects, compiler 115 may be similar to compiler 110 of FIG. 2A. According to some aspects, control circuitry 155 may be similar to control circuitry 150 of FIG. 2A. Control circuitry 155 may receive measurement data from detection and imaging system 175 and may send control signals to radiation source 190 to manage the quantum operations performed within vacuum chamber 165.

[0063] With continued reference to FIG. 2B, ion trap 180 may confine ions that serve as qubits, with quantum information encoded in the atomic states of the trapped ions. According to some aspects, radiation source 190 may drive entangling interactions between the trapped ions. Radiation source 190 may include at least one laser source configured to generate one or more laser beams that couple the qubits and implement the multi-qubit entangling operations. In some implementations, radiation source 190 may drive entangling interactions via a Raman transition, in which the one or more laser beams are off-resonant from an excited state. In other implementations, radiation source 190 may drive entangling interactions using a resonant laser coupled to an optical clock transition of the trapped ions. According to some aspects, control circuitry 155 may control radiation source 190 such that minimized or reduced optical power or reduced optical field amplitude of the one or more laser beams is applied to the plurality of qubits. Minimizing or reducing the optical power or optical field amplitude may decrease a photon-scattering probability associated with implementing the multi-qubit entangling operation. In trapped-ion systems, such as the system illustrated in FIG. 2B, depolarization may be generated by off-resonance photon scattering from short-lived states, which may occur at a rate that is linear in the driving field's power. By reducing the magnitude of entanglement phases through the compilation techniques described herein, control circuitry 155 may apply one or more control signals having reduced drive power or reduced drive field amplitude when implementing the multiqubit entangling operations, thereby decreasing an overall depolarization error of the executable circuit.

[0064] According to some aspects, the quantum processor, such as quantum processor 140 of FIG.

[0065] 1, may include arrays of optically trapped neutral atoms that support long-range entangling operations. In such implementations, neutral atoms may be trapped in optical lattices oroptical tweezers, and long-range interactions between atoms may enable multi-qubit entangling operations acting on more than two qubits.

[0066] According to some aspects, the quantum processor such as quantum processor 140 of FIG.

[0067] 1, may include atoms in optical cavities that support long-range entangling operations. In such implementations, atoms may be coupled through their interaction with the cavity field, enabling entangling operations between atoms that are not nearest neighbors.

[0068] The compilation techniques described herein may be applied to quantum processors of various types, including trapped-ion quantum processors, neutral atom arrays, and atoms in optical cavities. In each case, the quantum processor may be operable to execute multiqubit entangling operations acting on more than two qubits, and the compilation techniques may reduce the total duration of entangling operations and reduce magnitudes of entanglement phases to improve implementation fidelity.

[0069] Referring now to FIGs. 3A-3C, exemplary circuit representations and decomposition schemes illustrating aspects of the compilation techniques described herein are shown. FIGs. 3A-3C depict one non-limiting implementation of the boundary fusion approach for combining entangling operations, and it should be understood that other implementations and variations may be employed without departing from the scope of the present disclosure. The specific circuit structures, decomposition patterns, and operation sequences illustrated in FIGs. 3A-3C are provided for purposes of explanation and are not intended to limit the applicability of the compilation techniques to the particular configurations shown.

[0070] Referring to FIG. 3A, a part of a layered quantum circuit representation 200 is depicted, illustrating the decomposition of two-qubit operations into operation sequences including entangling operations and single-qubit rotation operations. Quantum circuit 200 exhibits a layered structure similar to circuit representation 10 described above with reference to FIG.

[0071] 1, where successive logical circuit layers include two-qubit operations acting on disjoint qubit pairs, with qubit pairings reassigned between layers.

[0072] With continued reference to FIG. 3A, quantum circuit 200 includes a plurality of horizontal lines arranged vertically representing timelines of different qubits referenced 210A-210G. The shown part of quantum circuit 200 is organized into a first layer 250A and a second layer 250B. First layer 250A and second layer 250B are separated by a first interface 260A.Second layer 250B and a third layer (not shown) are separated by a second interface 260B. First interface 260A and second interface 260B represent boundaries between successive logical circuit layers of circuit representation 200.

[0073] With continued reference to FIG. 3A, first layer 250A includes a plurality of two-qubit operations 2201,1-2201,4acting on disjoint target qubit pairs. For example, a first layer first two qubit operation 2201,1acts on qubit 210A and qubit 210B, and a first layer second two qubit operation 2201,2acts on qubit 210C and qubit 210D and similarly for the remaining two-qubit operations in the layer. Second layer 250B includes two qubit operations 2202,1-2202,5acting on different disjoint target qubit pairs of qubits such as qubits 210A-210G. The different qubit pairings between first layer 250A and second layer 250B reflect the reassignment of qubit pairings between successive logical circuit layers, analogous to the permutation layers 40A and 40B described with reference to FIG. 1.

[0074] According to some aspects, each two-qubit operation in quantum circuit 200 may be represented by an element or a block of SU(4), the special unitary group of degree four, which encompasses all unitary transformations acting on a two-qubit Hilbert space. An arbitrary SU(4) operation may be decomposed into an operation sequence including no more than three entangling operations interlaced with single-qubit rotation operations, e.g., applied before, between, and after the entangling operations.

[0075] As shown in FIG. 3A, two qubit operation 2201,1is decomposed into an operation sequence that includes three entangling operations 230AB1, 230AB2, and 230AB3acting on the pair of qubits 210A and 210B. These entangling operations are interlaced with single-qubit rotation operations 240A1-240A4applied to qubit 210A and single-qubit rotation operations 240B1-240B4applied to qubit 210B. The operation sequence follows a pattern where singlequbit rotations are applied to each qubit, followed by an entangling operation acting on the qubit pair, with this pattern repeated for each entangling operation. The single-qubit rotation operations may include rotations about various axes of the Bloch sphere, such as rotations about the X, Y, or Z axes, and serve to orient the qubit states appropriately before and after each entangling interaction.With continued reference to FIG. 3 A, two qubit operation 2202,1 of second layer 250B includes entangling operations 230AF1, 230AF2and 230AF3to be applied to the pair of qubits 210A and 210F. The pairing of qubit 210A with qubit 210F in second layer 250B, rather than with qubit 210B as in first layer 250A, reflects the reassigned qubit pairings for the second logical layer after the permutation, as exemplified in FIG. 1 with reference to permutation layer 40A.

[0076] As further shown in FIG. 3A, multi-qubit entanglement operations are represented by vertical regions delimited by dotted lines spanning multiple qubits. According to some aspects, quantum circuit 200 may be decomposed to include multi-qubit entangling operations that implement simultaneous entangling interactions across multiple qubit pairs. For example, first layer 250A may include multi-qubit entangling operations (which may also be referred to as multi-qubit entangling layers) 270A1, 270A2, and 270A3, where each multi-qubit entangling operation implements a layer of mutually commuting two-qubit interactions acting simultaneously on a plurality of pairs of qubits within the circuit layer. Similarly, second layer 250B may include multi-qubit entanglement operations 270B1, 270B2, and 270B3. According to some aspects, the generation of such multi-qubit entangling operations may be performed using techniques for implementing programmable entangling interactions between qubits. PCT Patent Publication No. WO2024252219, titled: " Large-scale multi-qubit trapped-ion gates" which is hereby incorporated by reference in its entirety, describes systems and methods for generating multi-qubit entangling operations in quantum processors that support long-range interactions between qubits. The multiqubit entangling operations such as operations 270A1, 270A2, and 270A3may be implemented using such techniques or other suitable approaches for generating multi-qubit entangling operations within a logical circuit layer that implement simultaneous entangling interactions across multiple qubit pairs.

[0077] In accordance with aspects of the present disclosure, the system of FIGs. 2A or 2B may obtain a circuit representation including a plurality of successive logical circuit layers, each logical circuit layer including one or more of the portions. According to some aspects, each portion may correspond to a two-qubit operation in SU(4) and may be decomposed into anoperation sequence including entangling operations interlaced with single-qubit rotation operations as described above.

[0078] Referring to FIG. 3B, the decomposition of two-qubit operations into operation sequences with boundary entangling operations is illustrated. FIG. 3B depicts SU(4) block 2201,1of FIG. 3A representing a two-qubit unitary operation applied to pair of qubits 210A and 210B and an SU(4) block 3201,1, applying to the same pair of qubits, having a boundary entangling operation that results from decomposing or further decomposing SU(4) block 2201,1using a constrained decomposition technique.

[0079] According to some aspects, decomposing a two-qubit unitary operation may include performing a Cartan decomposition. The Cartan decomposition provides a technique for expressing an arbitrary two-qubit unitary operation in terms of single-qubit rotations and entangling operations. In the Cartan decomposition, a target two-qubit unitary U G SU(4) is rotated to a particular basis by a unitary matrix M, in which the unitary abides the decomposition M†UM = O2TDO1, where Onare orthonormal real-valued matrices and D is a diagonal unitary matrix parameterized by entanglement phases 9XX, 0yy, and 0zz.

[0080] According to some aspects, the predetermined form of the boundary entangling operation may include a correlated ZZ rotation. According to some aspects, decomposing the two-qubit unitary operation may include generating an operation sequence that begins with a correlated ZZ rotation and includes no more than three correlated ZZ rotations, thereby limiting an entangling-operation depth associated with implementing the two-qubit unitary operation. According to some aspects, the boundary entangling operation may include an Rzz operation, which implements a rotation of the form

[0081]

[0082] =exp(— i0ZnZm), where Znand Zmdenote Z-Pauli operators acting on the respective qubits.

[0083] According to some aspects, while at least some of the illustrated embodiments use Rzz operations (correlated ZZ rotations) as the boundary entangling operations, other entangling operations of similar form may be used in alternative implementations. For example, Rxx operations implementing rotations of the form

[0084]

[0085] = exp(−iθXnXm), or RYYoperations implementing rotations of the form RYY(n,m)(θ) = exp(−iθYnYm), may be used as boundary entangling operations in implementations wheresuch operations are native to the quantum processor. The choice of entangling operation type may depend on the native operation set of the quantum processor. The compilation techniques described herein may be adapted to use any entangling operation that implements a two-qubit interaction and that can be combined with other such operations into a multi-qubit entangling operation.

[0086] As shown in FIG. 3B, the operation sequence of SU(4) block 2201,1includes three entangling operations applied to a pair of qubits 210A and 210B 230AB1-230AB3. Singlequbit rotation operations are interlaced with the entangling operations, including four single-qubit rotations applied to qubit 210A, operations 240A1-240A4and four single-qubit rotations applied to qubit 210B, operations 240B1-240B4. As shown, the operation sequence of SU(4) block 2201,1begins and ends with rotation operations.

[0087] The operation sequence of SU(4) block 3201,1includes a boundary entangling operation 330AB1positioned at the beginning of its respective operation sequence. The operation sequence further includes a second entangling operation 330AB2and a third entangling operation 330AB3. Single-qubit rotation operations are interlaced with the entangling operations, including three single-qubit rotations applied to qubit A, operations 340A1-340A3, and three single-qubit rotations applied to qubit B, operations 340B1-340B3. According to some aspects and as illustrated in FIG. 3B, the decomposition is constrained such that, for each of a plurality of operation sequences, the boundary entangling operation of the predetermined form is positioned at the beginning of the operation sequence. This constrained decomposition, referred to as a left-handed (LH) decomposition, positions the first entangling operation of the operation sequence, e.g., as an RZZ gate or operation, enabling subsequent combining of boundary entangling operations from adjacent operation sequences into multi-qubit entangling operations, as will be detailed with respect to FIG. 3C below.

[0088] With continued reference to FIG. 3B, decomposing the two-qubit unitary operation may include selecting a phase of an initial correlated ZZ rotation such that at least one Cartan entanglement phase of the resulting decomposition is zero. The phase may be selected byidentifying a zero of a scalar function dependent on a Cartan volume associated with the two-qubit unitary operation.

[0089] The Cartan volume CV(U) may be computed using the algebraic expression:

[0090] CV(U) = -1 / 4Im(Tr(UMBTUMB))

[0091] where UMB= M^UM is the unitary rotated to the particular basis. The Cartan volume is an invariant of the two-qubit unitary operation and may be expressed equivalently as CV(U) = sin(2θxx)sin(2θyy)sin(2θzz), where θxx, θyy, and θzzare the entanglement phases obtained by the Cartan decomposition of U.

[0092] To obtain the LH decomposition, a scalar function v(f ) may be defined as:

[0093] v(ξ) = CV(Ue-iξZZ) = a(U)sin(2(ξ-ξ0(U))) where a(U) and ξ0(U) are algebraic expressions of the entries of U. The LH decomposition phase ξ0is found by identifying the zero of this sinusoidal function. At the zero ξ0, the Cartan decomposition of Ue-iξ₀ZZhas at least one zero entanglement phase, resulting in a decomposition with only two non-trivial non-zero entanglement phases. The LH decomposition of U is then given by:

[0094] U = LH(U) = Cartan(Ue-iξ₀Z⊗Z)eiξ₀Z⊗Z

[0095] According to some aspects, the LH decomposition may be uniquely defined by selecting the compilation with the smallest possible L1-norm that satisfies the condition |β| ≤ min(|α|, |γ|), where α, β, and γ are the entanglement phases of the three RZZoperations in the decomposition. For |a(U)| > 0, there is precisely one ξ0(U) solution in the interval (−π / 4, π / 4].

[0096] According to some aspects, the disclosed compilation may use virtual swapping operations to reduce the magnitude of entanglement phases by relabeling qubit indices in subsequent gates or operations rather than physically swapping qubits. The disclosed compilation may add two-qubit identities in the form of consecutive SWAP gates or operations at the end of an SU(4) block. One SWAP operation may be implemented using entanglement operations and absorbed in the LH decomposition, while the other SWAP gate may be implementedvirtually by relabeling qubit indices in subsequent gates. This virtual SWAP optimization technique enables reduction of the magnitude of entanglement phases without incurring the overhead of physically executing SWAP operations on the quantum processor.

[0097] According to some aspects, the decomposition is not limited to left-handed decomposition. The decomposition may alternatively be a right-handed (RH) decomposition in which the boundary entangling operation is positioned at the end of the operation sequence, enabling combining with the first entangling operation of a subsequent operation sequence. The RH decomposition may be obtained using analogous techniques to the LH decomposition described above. For example, the RH decomposition may position the boundary entangling operation at the end of the operation sequence by selecting a phase of a final correlated ZZ rotation such that at least one Cartan entanglement phase of the resulting decomposition is zero. According to some aspects, a combination of LH and RH decompositions may be used for different operation sequences within the circuit representation. For example, operation sequences corresponding to portions in a first logical circuit layer may be decomposed using RH decomposition and operation sequences corresponding to portions in a successive logical circuit layer may be decomposed using LH decomposition, thereby positioning boundary entangling operations adjacent to the interface between the two successive logical circuit layers for combining into a multi-qubit entangling operation. According to some aspects, both LH and RH decompositions may be applied within the same operation sequence, such that the operation sequence includes a boundary entangling operation of the predetermined form at both the beginning and the end of the operation sequence.

[0098] Referring to FIG. 3C, the combining of boundary entangling operations from adjacent operation sequences into a multi-qubit entangling operation is illustrated. FIG. 3C illustrates the evolution of a partially decomposed circuit part of FIG. 3A, 300A, according to which boundary entangling operations of the predetermined form positioned at boundaries of operation sequences corresponding to two successive logical circuit layers are combined into a single fused multi-qubit entangling operation 390AB to form fused circuit part 300B.With continued reference to FIG. 3C, the combining of boundary entangling operations enables the reduction of multi-qubit operation count, e.g., by merging the last entangling operation of one SU(4) block with the first entangling operation of the subsequent block. According to some aspects, for a circuit representation including L successive logical circuit layers, the executable circuit may include not more than 2L+1 multi-qubit entangling operations acting on more than two qubits. According to some aspects, for an N-qubit quantum volume circuit, the compilation may reduce the number of entangling operations from 3N2 / 2 two-qubit entangling operations to 2N+1 multi-qubit gates. According to some aspects, the compilation techniques may provide similar reductions in the number of entangling operations for other quantum circuits having a layered structure. As shown in FIG. 3C, the circuit includes two-qubit operations that are decomposed into operation sequences with boundary entangling operations. Circuit part 300A includes two successive logical circuit layers, layer 350A and layer 250B. Layer 350A corresponds to decomposed layer 250A according to the constraint technique shown with respect to FIG.

[0099] 3B. Each of these two-qubit operations is decomposed into a respective operation sequence including boundary entangling operations, such as boundary entangling operation 330ABI positioned at the beginning of the operation sequence of a two-qubit operation or an SU(4) block 320i,i. In layer 350A, decomposed two qubit operations (or decomposed SU(4) blocks) 3201,1-3201,3are shown. In layer 250B, two qubit operations (or SU(4) blocks) 2202,1-2202,3are shown.

[0100] With continued reference to FIG. 3C, the operation sequence corresponding to two qubit operation 3201, i, for example, includes boundary entangling operations 330AB1, and further entangling operations 330AB2, and 330AB3. Boundary entangling operation 330AB1is positioned at the beginning of the operation sequence. Single-qubit rotation operations are interlaced with the entangling operations, including single-qubit rotations 340A1, 340A2, and 340A3applying on qubit 210A, and single-qubit rotations 340B1, 340B2, and 340B3applying on qubit 210B. The operation sequence corresponding to two qubit operation 2202,1, for example, includes entangling operations 230AF1-230AF3. Single-qubit rotationoperations are interlaced with the entangling operations, including shown single-qubit rotations 240A5-240A8applying on qubit 210A.

[0101] As shown in the exemplary circuit of FIGs. 3A-3C, according to some aspects, at least one of the operation sequences may include one or more single-qubit rotation operations. Combining the plurality of the boundary entangling operations may then further include propagating at least one single-qubit rotation operation, e.g., a boundary single-qubit rotation operation positioned at a boundary of an operation sequence or a layer, from a first operation sequence to a second operation sequence and absorbing the at least one singlequbit rotation operation into the second operation sequence. This propagation and absorption positions at least one entangling operation of the predetermined form at a boundary of at least one of the first operation sequence or the second operation sequence for combining into the at least one multi-qubit entangling operation. As exemplified in FIG. 3C, the fourth last single-qubit rotation operation 340A3of the operation sequence of two-qubit operation 3201,1is propagated from the operation sequence to the operation sequence of two-qubit operation 2202,1and absorbed in this operation sequence to form single-qubit rotation operation 340A4. Layer 250B is decomposed to include a boundary entangling layer at its operation sequences by that forming a decomposed layer 350B. For example, to include boundary entangling operation 330AF1at the beginning of the operation sequence of two-qubit operation 3202,1. The boundary entangling operations formed at the end of layer 350A by propagating and absorbing boundary single-qubit rotation operations and the boundary entangling operations formed at the beginning of layer 350B by the constraint decomposing (e.g., entangling operation 330AB3of layer 350A and entangling operation 330AF1of layer 350B) are then fused or combined at interface 260A to form multi-qubit entangling operation 390AB.

[0102] As shown in FIG. 3C, according to some aspects, the at least one multi-qubit entangling operation, such as multi-qubit entangling operation 390 AB, acts on an overlapping set of target qubits that includes qubits that are target qubits of operations in a first logical circuit layer and qubits that are target qubits of operations in a second logical circuit layer successive to the first logical circuit layer. According to some aspects, the at least onemulti-qubit entangling operation implements couplings between overlapping pairs of qubits that are associated with boundary entangling operations in operation sequences corresponding to portions in the two successive logical circuit layers. The multi-qubit entangling operation is formed at an interface between the two successive logical circuit layers, such as interface 260A between layers 350A and 250B.

[0103] According to some aspects, generating the executable circuit may include repeatedly applying, across a plurality of interfaces between successive logical circuit layers of the circuit representation, a compilation pattern in accordance with the disclosed compilation. For each interface between two successive logical circuit layers, the compilation pattern may include decomposing one or more of the portions, included in each of the two successive logical circuit layers into respective operation sequences including boundary entangling operations of the predetermined form adjacent to the interface between the two successive logical circuit layers. The compilation pattern may further include combining at least the boundary entangling operations of the predetermined form adjacent to the interface into at least one multi-qubit entangling operation acting on more than two qubits. The compilation pattern may be applied at the plurality of the interfaces to generate the executable circuit. According to some aspects, the compilation pattern may be applied across all interfaces between successive logical circuit layers of the circuit representation and to all portions within each logical circuit layer, such that each portion is decomposed into a respective operation sequence with boundary entangling operations and each interface has its adjacent boundary entangling operations combined into a respective multiqubit entangling operation.

[0104] According to some aspects, a Y-pull-back compilation technique may be used to merge final Ry rotations (single-qubit rotations about the Y axis of the Bloch sphere) into the LH decomposition to create a decomposition that both starts and ends with Rzz rotations. The Y-pull-back technique enables the absorption of single-qubit rotation operations from one operation sequence into an adjacent operation sequence while maintaining the structure of the LH decomposition. According to some aspects, the compilation may use Euler decomposition to find single-qubit operation parameters for the Y-pull-back scheme.According to some aspects, the disclosed compilation may use RY gates or operations at the beginning of each SU(4) block to realize the minimal magnitude of entanglement phases |0XX| + 10y y| + |0ZZ|. By introducing RY rotations at the interface between operation sequences and propagating these rotations into the adjacent operation sequences, the magnitude of entanglement phases associated with the boundary entangling operations may be reduced. This reduction in the magnitude of entanglement phases may enable the control circuitry to apply control signals having reduced drive power or reduced drive field amplitude when implementing the multi-qubit entangling operations.

[0105] Referring to FIG. 4, a method 400 for compiling and executing quantum circuits using multi-qubit entangling operations is illustrated. Method 400 may be implemented by the systems described herein, such as quantum computing system 100 of FIG. 2A or the system including quantum processor 160 of FIG. 2B. Conversely, these systems may operate by applying method 400 to compile quantum computational tasks into executable circuits for execution by the respective quantum processors. According to some aspects, the one or more steps of method 400 (e.g., all steps of method 400) may be performed by one or more processors, such as processor 120 of compiler 110 shown in FIGs. 2A and a processor of compiler 115 of FIG. 2B.

[0106] At a first step 410, a circuit representation of a quantum computational task is obtained. According to some aspects, the circuit representation may include a plurality of successive logical circuit layers, where each logical circuit layer includes one or more portions corresponding to quantum operations. For example, the circuit representation may have a structure similar to circuit representation 10 described with reference to FIG. 1, where each logical circuit layer includes a plurality of two- qubit operations acting on disjoint target qubit pairs.

[0107] According to some aspects, the circuit representation may represent a quantum volume circuit or other quantum computational task. In some implementations, the circuit representation may exhibit a layered structure with successive layers of two-qubit operations, though the compilation techniques described herein are not limited to circuit representations having such a layered structure and may be applied to circuit representations having various organizational forms.According to some aspects, obtaining the circuit representation may include receiving the circuit representation from an external source, such as a user interface, a network connection, or a storage device. According to some aspects, obtaining the circuit representation may include retrieving the circuit representation from memory 130 or from a database accessible to processor 120. According to some aspects, obtaining the circuit representation may include generating the circuit representation from a higher-level description of the quantum computational task, such as a quantum algorithm specification, a problem description, or a quantum programming language representation. According to some aspects, obtaining the circuit representation may include parsing a quantum assembly language file or interpreting instructions from a quantum software development kit. According to some aspects, obtaining the circuit representation may include converting a directed acyclic graph representation of the quantum computational task into the circuit representation. According to some aspects, obtaining the circuit representation may include receiving parameters that define the quantum computational task and constructing the circuit representation based on the received parameters.

[0108] With continued reference to FIG. 4, method 400 proceeds to a step 420, where a plurality of portions of the circuit representation are decomposed into respective operation sequences. Each operation sequence includes one or more entangling operations. The decomposing at step 420 is constrained such that each of a plurality of the operation sequences includes a boundary entangling operation of a predetermined form, executable by the quantum processor, positioned at a boundary of the operation sequence, where the boundary is one of a beginning or an end of the operation sequence.

[0109] According to some aspects, step 420 may include, for each of the plurality of successive logical circuit layers, decomposing two-qubit operations of the logical circuit layer into the respective operation sequences. For example, processor 120 may decompose each two-qubit operation in a logical circuit layer using a left-handed decomposition technique that positions a boundary entangling operation, such as an Rzz operation, at the beginning of the operation sequence.

[0110] According to some aspects, the decomposing at step 420 may alternatively use a right-handed decomposition technique that positions a boundary entangling operation at the endof the operation sequence rather than at the beginning. According to some aspects, a combination of left-handed and right-handed decomposition techniques may be used for different operation sequences within the circuit representation. For example, operation sequences corresponding to portions in a first logical circuit layer may be decomposed using a right-handed decomposition such that boundary entangling operations are positioned at the ends of the operation sequences, while operation sequences corresponding to portions in a successive logical circuit layer may be decomposed using a left-handed decomposition such that boundary entangling operations are positioned at the beginnings of the operation sequences. This combination may facilitate the combining of boundary entangling operations at interfaces between the successive logical circuit layers.

[0111] According to some aspects, both left-handed and right-handed decomposition techniques may be applied to a single portion of the circuit representation. For example, a two-qubit operation may be decomposed into an operation sequence that includes a boundary entangling operation of the predetermined form at both the beginning and the end of the operation sequence. In such cases, the operation sequence may begin with a first boundary entangling operation and end with a second boundary entangling operation, with intermediate entangling operations and single-qubit rotation operations positioned between the first and second boundary entangling operations. This dual-boundary decomposition may enable combining of boundary entangling operations at both preceding and succeeding interfaces of the operation sequence.

[0112] At a step 430, a plurality of the boundary entangling operations are combined into at least one multi-qubit entangling operation of the executable circuit. The at least one multi-qubit entangling operation acts on more than two qubits and implements a combined entangling action of the plurality of the boundary entangling operations. According to some aspects, step 430 may be performed by one or more processors, such as processor 120 of compiler 110 shown in FIG. 2A or by a processor of compiler 115 of FIG. 2B.

[0113] According to some aspects, step 430 may include combining boundary entangling operations associated with two successive logical circuit layers into a single multi-qubit entangling operation acting on more than two qubits. According to some aspects, the at least one multi-qubit entangling operation may act on an overlapping set of target qubitsthat includes qubits that are target qubits of operations in a first logical circuit layer and qubits that are target qubits of operations in a second logical circuit layer successive to the first logical circuit layer. According to some aspects, the at least one multi-qubit entangling operation may implement couplings between overlapping pairs of qubits that are associated with boundary entangling operations in operation sequences corresponding to portions in the two successive logical circuit layers.

[0114] According to some aspects, step 430 may include repeatedly applying, across a plurality of interfaces or between all interfaces between successive logical circuit layers of the circuit representation, a compilation pattern. For each interface between two successive logical circuit layers, the compilation pattern may include decomposing one or more of the portions included in each of the two successive logical circuit layers into respective operation sequences including boundary entangling operations of the predetermined form adjacent to the interface between the two successive logical circuit layers. The compilation pattern may further include combining at least the boundary entangling operations of the predetermined form adjacent to the interface into at least one multi-qubit entangling operation acting on more than two qubits. The compilation pattern may be applied at the plurality of interfaces to generate the executable circuit.

[0115] With continued reference to FIG. 4, at a step 440, instructions corresponding to the executable circuit are provided to control circuitry for execution by a quantum processor. The instructions may be provided to control circuitry, such as control circuitry 150 or 155, which translates the instructions into control signals for the quantum processor, such as quantum processor 140 of FIG. 2A or quantum processor 160 of FIG. 2B. In the context of the trapped-ion system shown in FIG. 2B, the instructions may be provided to control circuitry 155 which coordinates the operation of quantum processor 160 by controlling radiation source 190 and other components within vacuum chamber 165. According to some aspects, for an N-qubit quantum volume circuit having N layers, the compilation performed by method 400 may reduce the number of entangling operations from 3N / 2 two-qubit entangling operations to 2N+1 multi-qubit entangling operations. More generally, for a circuit representation having L successive logical circuit layers, each logical circuit layer including N / 2 two-qubit operations acting on disjoint target qubit pairs,the compilation performed by method 400 may reduce the number of entangling operations from 3LN / 2 two-qubit entangling operations to 2L+1 multi-qubit entangling operations. This reduction in the number of entangling operations may decrease the total duration of entangling operations in the executable circuit and may increase the implementation fidelity of the quantum computational task when executed by the quantum processor. Referring to FIG. 5, a method 500 for optimizing the compilation of quantum circuits is illustrated. Method 500 may be implemented by the systems described herein, such as quantum computing system 100 of FIG. 2A or the system including quantum processor 160 of FIG. 2B. Method 500 may be performed in conjunction with method 400 of FIG. 4 to further optimize the executable circuit by reducing magnitudes of entanglement phases associated with boundary entangling operations. According to some aspects, method 500 may be performed as part of step 430 of method 400, or method 500 may be performed after step 430 and before step 440 of method 400. According to some aspects, one or more (e.g., all) of the steps of method 500 may be performed by one or more processors, such as processor 120 of compiler 110 shown in FIG. 2A or a processor of compiler 115 of FIG.

[0116] 2B.

[0117] At a step 510, an interface between two operation sequences that are adjacent in an execution order of the executable circuit is selected. The interface may correspond to a boundary between successive logical circuit layers of the circuit representation, such as first interface 260A or second interface 260B described with reference to FIG. 3 A and FIG.

[0118] 3C. According to some aspects, the interface may be selected as part of an iterative process that processes interfaces sequentially from a first interface to a last interface in the execution order of the executable circuit.

[0119] With continued reference to FIG. 5, at a step 520, one or more single-qubit rotation operations are introduced at the selected interface. According to some aspects, introducing the one or more single-qubit rotation operations may include inserting an identity operation at the interface by inserting a single-qubit rotation and an inverse single-qubit rotation. The identity operation does not change the overall unitary transformation implemented by the executable circuit, but the individual single-qubit rotation and inverse single-qubit rotationmay be propagated and absorbed into adjacent operation sequences to modify the entanglement phases of boundary entangling operations.

[0120] According to some aspects, the single-qubit rotation operations introduced at step 520 may include Ry rotations, which are rotations about the Y axis of the Bloch sphere. According to some aspects, N single-qubit RY rotations may be introduced at the interface, where N is the number of qubits in the quantum processor. Each Ry rotation may be applied to a respective qubit at the interface between the two adjacent operation sequences.

[0121] At a step 530, the one or more single-qubit rotation operations are propagated and absorbed into the two adjacent operation sequences to reduce a magnitude of entanglement phases of boundary entangling operations of the predetermined form adjacent to the interface that are combined into the at least one multi-qubit entangling operation. According to some aspects, the propagation may include pushing the single-qubit rotation operations forward into a subsequent operation sequence and pulling inverse single-qubit rotation operations backward into a preceding operation sequence. The absorption may include modifying the parameters of single-qubit rotation operations and entangling operations within the operation sequences to account for the propagated rotations.

[0122] With continued reference to FIG. 5, according to some aspects, reducing the magnitude of the entanglement phases may cause control circuitry such as control circuitry 150 of FIG.

[0123] 2A or control circuitry 155 of FIG. 2B, in implementing the at least one multi-qubit entangling operation, to apply one or more control signals having reduced drive power or reduced drive field amplitude, thereby decreasing an overall depolarization error of the executable circuit. According to some aspects, control circuitry such as control circuitry 150 or control circuitry 155 may be configured to control at least one laser source configured to generate one or more laser beams for implementing the at least one multiqubit entangling operation. The one or more control signals may control the at least one laser source such that reduced optical power or reduced optical field amplitude of the one or more laser beams is applied to the plurality of qubits, thereby decreasing a photonscattering probability associated with implementing the at least one multi-qubit entangling operation.At a step 540, rotation angles for the single-qubit rotation operations are selected to reduce a sum of absolute values of entanglement phases associated with the boundary entangling operations. According to some aspects, selecting the rotation angles may include, for each interface between successive logical circuit layers or between two operation sequences that are adjacent in an execution order of the executable circuit, optimizing rotation angles for single-qubit rotation operations introduced at the interface with respect to entanglement phases of boundary entangling operations adjacent to the interface.

[0124] According to some aspects, the optimization at step 540 may minimize a nuclear norm of a coupling matrix associated with the multi-qubit entangling operation formed by combining the boundary entangling operations adjacent to the interface. The nuclear norm may be defined as the sum of absolute values of eigenvalues of the coupling matrix with elements taken in absolute value. Reducing the nuclear norm may correspond to reducing the drive power or drive field amplitude applied by control circuitry such as control circuitry 150 or control circuitry 155 when implementing the multi-qubit entangling operation.

[0125] With continued reference to FIG. 5, at a step 550, a determination is made whether there is an additional interface to optimize. If there is an additional interface to optimize, method 500 returns to step 510 to select the next interface and repeat the optimization process for the next interface. If there is no additional interface to optimize, method 500 proceeds to a step 560, where method 500 ends.

[0126] According to some aspects, the introducing and propagating and absorbing of the one or more single-qubit rotation operations are iteratively performed across interfaces between successive operation sequences of the executable circuit. According to some aspects, the optimization algorithm may iterate over layers from layer £=1 to N-l, where at each iteration layer f is assumed to be LH decomposed and terminates with Rzz operations, and layer £+1 is not yet decomposed. At each iteration, N single-qubit Ry rotations may be optimized between the layers, such that rotations are pushed forward to the blocks at layer £+1 and inverse rotations are pulled back into the blocks of layer £. With this iterative approach, layer £ is fixed at each iteration. After the iterations conclude, the relevant Rzz operations may be merged and the optimization is complete.According to some aspects, the optimizing at step 540 is performed sequentially for the interfaces. The sequential optimization may process interfaces in order from a first interface between a first logical circuit layer and a second logical circuit layer to a last interface between a second-to-last logical circuit layer and a last logical circuit layer. At each interface, the optimization may fix the parameters of the preceding operation sequences and optimize the rotation angles for the single-qubit rotation operations introduced at the current interface.

[0127] According to some aspects, a computational complexity of the iteratively performed introducing and propagating and absorbing is polynomial in a number of qubits and linear in a circuit depth. The polynomial complexity in the number of qubits enables the optimization to be performed efficiently for large quantum circuits without requiring computational resources that scale exponentially with the number of qubits. The linear complexity in circuit depth enables the optimization to scale efficiently with the number of logical circuit layers in the circuit representation.

[0128] According to some aspects, the compilation optimization run-time scales polynomially with qubit count. For example, optimization run-times on an ordinary laptop PC may be approximately 3.2 minutes for 30-qubit quantum volume circuits, approximately 7.1 minutes for 40-qubit quantum volume circuits, and approximately 26.5 minutes for 60-qubit quantum volume circuits. These run-times demonstrate that the optimization may be performed in manageable time for large quantum circuits, enabling practical application of the compilation techniques to quantum computational tasks involving tens of qubits. According to some aspects, the optimization performed by method 500 may achieve a reduction in the total nuclear norm of approximately 15% compared to a compilation that does not perform the optimization. For example, sampling random quantum volume circuits for N=30 qubits may yield an average ratio of approximately 0.85 between the total nuclear norm of the LH-optimized compilation and the total nuclear norm of a Cartan compilation without optimization, with a standard deviation of approximately 0.004. This reduction in nuclear norm may correspond to a reduction in drive power or drive field amplitude applied by control circuitry such as control circuitry 150 or control circuitry 155,thereby decreasing depolarization error and increasing implementation fidelity of the quantum computational task.

[0129] According to some aspects, a non-transitory computer-readable medium may store instructions that, when executed by one or more processors of a system, cause the one or more processors to perform one or more of the methods disclosed herein, such as method 400 of FIG. 4 or method 500 of FIG. 5. The system may include a quantum processor having a plurality of qubits and control circuitry, such as system 100 of FIG. 2A or the system including quantum processor 160 of FIG. 2B. According to some aspects, a memory of such a system, e.g., memory 130 of quantum computing system 100, may include such a non-transitory computer-readable medium. According to some aspects, the non-transitory computer-readable medium may be distributed across multiple storage devices or may be accessible via a network connection. The instructions stored on the non-transitory computer-readable medium may be encoded in any suitable programming language or intermediate representation, and may be compiled or interpreted for execution by the one or more processors.

[0130] According to some aspects, the at least one multi-qubit entangling operation may be parameterized by a real-valued coupling matrix defining coupling phases between pairs of qubits. The multi-qubit entangling operation may take the following form:

[0131]

[0132] UMQ&) ^XpQ^n.m^n^rrt)

[0133] where Zndenotes a Z-Pauli operator acting on the n-th qubit in an N-qubit register and <p is an arbitrary N*N real -valued coupling matrix with elements

[0134]

[0135] defining the coupling phasesn mbetween pairs of qubits indexed by n and m. This multi-qubit entangling operation realizes a layer of commuting two-qubit ZZ interactions acting simultaneously on multiple, possibly overlapping, pairs of qubits, and is equivalent to an evolution under an Ising-type Hamiltonian.

[0136] According to some aspects, generating the executable circuit may include reducing a nuclear norm of the coupling matrix of the at least one multi-qubit entangling operation. The nuclear norm of the coupling matrix < > may be defined as:

[0137] nuc(< >) = fc fclwhere Akare eigenvalues of the coupling matrix < > with all elements taken in absolute value. The nuclear norm is associated with the laser power or drive power used to implement the multi-qubit entangling operation. Reducing the nuclear norm corresponds to reducing the drive power or drive field amplitude applied by control circuitry, thereby decreasing depolarization error.

[0138] According to some aspects, generating the executable circuit may include reducing a sum of nuclear norms of coupling matrices across all multi-qubit entangling operations of the executable circuit. According to some aspects, the compilation techniques described herein may reduce the total nuclear norm by approximately 15% compared to Cartan compilation that does not perform the optimization, achieved through the layer-by-layer optimization described with reference to method 500 of FIG. 5.

[0139] According to some aspects, a relative qubit participation metric may be used to account for local drive power per qubit in computing depolarization probability. The relative qubit participation anfor the n-th qubit may be defined as:

[0140] -

[0141]

[0142] The relative qubit participation anrepresents the fraction of the total coupling strength that involves the n-th qubit. Since photon scattering in trapped-ion systems is a qubit-local effect, the local drive power per qubit may be considered when computing depolarization probability. The relative qubit participation metric enables computation of the depolarization probability for each qubit based on the qubit's participation in the multiqubit entangling operation. By reducing the nuclear norm of the coupling matrix through the compilation techniques described herein, the depolarization probability associated with implementing the multi-qubit entangling operation may be decreased, thereby increasing implementation fidelity of the quantum computational task.

[0143] According to some aspects, combining the plurality of the boundary entangling operations into the at least one multi-qubit entangling operation reduces a total duration of entangling operations in the executable circuit, thereby decreasing an overall dephasing error of the executable circuit. In systems and methods according to the present disclosure, the combining reduces a total duration during which the quantum processor performsentangling operations to implement the circuit representation or the quantum computational task, thereby increasing an implementation fidelity of the quantum computational task.

[0144] According to some aspects, relative to a compilation of the circuit representation prior to the combining, in which each logical circuit layer of the circuit representation is implemented using M multi-qubit entangling operations acting on more than two qubits, the number of multi-qubit entangling operations acting on more than two qubits in the executable circuit is reduced from M\L multi-qubit entangling operations to (A7-7 \L+l multi-qubit entangling operations, wherein L is the number of logical circuit layers of the circuit representation and M is the number of multi-qubit entangling operations acting on more than two qubits used to implement each logical circuit layer in the compilation prior to the combining. For example, when each logical circuit layer is implemented using M=3 multi-qubit entangling operations prior to the combining, the combining reduces the total number of multi-qubit entangling operations from 3L to 2L+1. According to some aspects, the circuit representation may include L successive logical circuit layers, and the executable circuit or executable quantum circuit may include not more than 2L+1 multiqubit entangling operations acting on more than two qubits.

[0145] According to some aspects, the dephasing error reduction may also be characterized relative to a compilation that uses two-qubit entangling operations rather than multi-qubit entangling operations. For a circuit representation having L successive logical circuit layers, each logical circuit layer including N / 2 two-qubit operations acting on disjoint target qubit pairs, the compilation performed by the disclosed techniques may reduce the number of entangling operations from 3LN / 2 two-qubit entangling operations to 2L+1 multi-qubit entangling operations. The reduction in the total number of entanglingoperation layers from 3L to 2L+1 correspondingly reduces the accumulated dephasing probability.

[0146] According to some aspects, a dephasing error model may be used to characterize the reduction in dephasing error achieved by the compilation techniques described herein. The dephasing error model may assume a background dephasing channel due to magnetic field noise that depends on gate duration. In the dephasing error model, each qubit may undergoTO

[0147] local dephasing with a probability Pdephase Per un't'me orPerSateduration. The dephasing probability may accumulate over the total duration of entangling operations in the executable circuit. By reducing the number of multi-qubit entangling operations from M\L to (M-l)T+\, the total duration during which the quantum processor performs entangling operations is reduced, and the accumulated dephasing probability is correspondingly reduced. The reduction in dephasing error may be proportional to the reduction in the number of entangling-operation layers or stages, where each entanglingoperation layer or stage corresponds to a time interval during which one or more entangling operations are executed by the quantum processor.

[0148] According to some aspects, reducing the magnitude of the entanglement phases causes the control circuitry, in implementing the at least one multi-qubit entangling operation, to apply one or more control signals having reduced drive power or reduced drive field amplitude, thereby decreasing an overall depolarization error of the executable circuit. The depolarization error model may assume that error probability is proportional to a nuclear norm of a coupling matrix < > associated with the multi-qubit entangling operation. Depolarization may be generated by off-resonance photon scattering from short-lived states at a rate that is linear in the driving field's power. In trapped-ion quantum processors, for example, qubits encoded in atomic states and coupled by a Raman transition may experience depolarization due to off-resonance photon scattering, where the scattering rate is proportional to the laser power used to drive the entangling interaction.

[0149] According to some aspects, a depolarization probability for the n-th qubit in a multi-qubit entangling operation may be computed as:

[0150] MQ4•nUC(0) • Pdepol •an

[0151] P depol, n± +.nuc(0).an_

[0152]

[0153] TO

[0154] where nuc( ) is the nuclear norm of the coupling matrix < >, pdepolis a two-qubit error parameter determining the error probability per qubit of a fully entangling two-qubit gate, and anis the relative qubit participation for the n-th qubit as defined above. The two-qubit error parameter pdgpoimay serve as a gauge parameter that relates the depolarization probability of multi-qubit entangling operations to the depolarization probability of areference two-qubit entangling operation. By reducing the nuclear norm of the coupling matrix through the compilation techniques described herein, the depolarization probability pd’epoi n f°r each qubit is reduced, thereby decreasing the overall depolarization error of the executable circuit and increasing the implementation fidelity of the quantum computational task.

[0155] According to some aspects, the compilation techniques described herein may be applied to quantum error correction schemes. Quantum error correction involves encoding logical qubits in multiple physical qubits and performing error detection and correction sequences to protect quantum information from noise. The compilation techniques may optimize the realization of algorithms at the logical level by reducing the number of multi-qubit entangling operations used to implement logical gates or operations. The compilation techniques may also optimize error detection and correction sequences by reducing the total duration of entangling operations and reducing magnitudes of entanglement phases associated with the entangling operations used in syndrome extraction and correction procedures. By reducing the number of entangling-operation layers and reducing drive power or drive field amplitude, the compilation techniques may make fault-tolerant thresholds less stringent, enabling fault-tolerant quantum computation with lower physical gate fidelities than would otherwise be required.

[0156] According to some aspects, the compilation techniques described herein may be applied to N-qubit Toffoli gates or operations. A Toffoli gate or operation is a three-qubit operation that performs a controlled-controlled-NOT operation, flipping the state of a target qubit conditioned on the states of two control qubits. When implemented using CNOT operations, a Toffoli operation may require at least six CNOT operations. However, using the compilation techniques described herein with multi-qubit entangling operations, a three-qubit Toffoli operation may be realized with three multi-qubit entangling operations having seven non-vanishing coupling phases. The seven non-vanishing coupling phases correspond to non-zero entries in the coupling matrices of the three multi-qubit entangling operations. This compilation of the Toffoli operation demonstrates that the compilation techniques may utilize multiple simultaneous two-qubit interactions within each multiqubit entangling operation, even when the total number of non-vanishing coupling phasesexceeds the two-qubit operation count of a conventional compilation. The reduction in the number of multi-qubit entangling operations from a larger number of sequential two-qubit gates to three multi-qubit entangling operations may decrease the total duration of entangling operations and may increase implementation fidelity.

[0157] According to some aspects, the compilation techniques described herein may be applied to N-qubit quantum Fourier transformation circuits. The quantum Fourier transformation is a quantum algorithm that transforms quantum states between computational and Fourier bases and serves as a component of various quantum algorithms including Shor's algorithm for integer factorization. Quantum Fourier transformation circuits exhibit a structure with entangling operations between multiple pairs of qubits, and the compilation techniques may reduce the number of multi-qubit entangling operations used to implement the quantum Fourier transformation by combining boundary entangling operations from adjacent operation sequences.

[0158] According to some aspects, the compilation techniques described herein may be applied to Clifford circuits. Clifford circuits are quantum circuits composed of gates or operations from the Clifford group, which includes Hadamard gates, phase gates, and CNOT gates. Clifford circuits arise in various quantum computing applications including quantum error correction, randomized benchmarking, and quantum state tomography. The compilation techniques may reduce the number of multi-qubit entangling operations used to implement Clifford circuits by decomposing the constituent gates into operation sequences with boundary entangling operations and combining the boundary entangling operations into multi-qubit entangling operations.

[0159] According to some aspects, numerical simulations may be performed to evaluate the performance of the compilation techniques described herein. The numerical simulations may be performed using a quantum circuit state simulator executing on a graphics processing unit (GPU). According to some aspects, the numerical simulations may be performed using an NVIDIA Hl 00 GPU running CUDA-Q, a quantum computing software platform that enables GPU-accelerated simulation of quantum circuits. The GPU-accelerated simulation enables evaluation of quantum circuits with tens of qubits within manageable computation times.Based on such numerical simulations, the compilation techniques described herein may achieve a 20% to 25% improvement in log2(QV) compared to conventional realizations with sequential two-qubit operations. The quantum volume QV is a metric that evaluates the performance of quantum computers by measuring the largest random circuit that may be executed to a sufficient fidelity. The logarithm log2(QV) provides a measure of the effective number of qubits that may be reliably entangled by the quantum computer. The 20% to 25% improvement in log2(QV) may be achieved at an effective two-qubit gate infidelity of 10'4. The effective two-qubit gate infidelity characterizes the error probability per qubit of a two-qubit entangling operation and serves as a parameter in the noise models used to evaluate the compilation techniques. At this infidelity level, the reduction in the number of multi-qubit entangling operations and the reduction in magnitudes of entanglement phases achieved by the compilation techniques translate to a measurable improvement in the quantum volume metric, demonstrating that the compilation techniques may increase the implementation fidelity of quantum computational tasks on quantum processors that support multi-qubit entangling operations.

[0160] According to some aspects, the disclosed processor (e.g., processor 120 of system 100 of FIG. 2A) may include one or more hardware processors. The one or more hardware processors may include, for example, one or more central processing units (CPUs), graphics processing units (GPUs or GPGPUs), digital signal processors (DSPs), microcontrollers, programmable logic devices (PLDs), field programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), or any other suitable computing or computational devices. Options may be selected based on application requirements, performance, and energy efficiency. According to some aspects, the one or more hardware processors may be configured to perform the compilation techniques described herein, including decomposing portions of circuit representations into operation sequences, combining boundary entangling operations into multi-qubit entangling operations, and performing optimization algorithms for reducing magnitudes of entanglement phases. According to some aspects, the disclosed memory (e.g., memory 130 of system 100 of FIG.

[0161] 2A) and the disclosed non-transitory computer-readable medium, may be or may include, for example, one or more of a solid-state drive (SSD), a hard disk drive (HDD), flashmemory, Non-Volatile Memory Express (NVMe) storage, embedded MultiMediaCard (eMMC), Universal Flash Storage (UFS), random access memory (RAM), dynamic random access memory (DRAM), static random access memory (SRAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), a USB drive or other removable storage device, network-attached storage (NAS), cloud-based storage, and / or other types of volatile or non-volatile storage devices. Data such as circuit representations, compiled quantum circuits, operation sequences, coupling matrices, and instructions for execution by the quantum processor, may be stored in the disclosed memory and may be loaded to be processed by the processor.

[0162] A number of implementations have been described. Nevertheless, it will be understood that various modifications may be made without departing from the spirit and scope of the disclosure. Accordingly, other implementations are within the scope of the following claims.

Claims

CLAIMS1. A system for quantum computation, comprising:a quantum processor comprising a plurality of qubits and control circuitry, the quantum processor being operable to execute multi-qubit entangling operations acting on more than two qubits; andone or more processors configured to obtain a circuit representation of a quantum computational task, generate an executable circuit for the circuit representation, and provide instructions corresponding to the executable circuit to the control circuitry for execution by the quantum processor,wherein generating the executable circuit comprises:decomposing a plurality of portions of the circuit representation into respective operation sequences comprising one or more entangling operations, the decomposing being constrained such that each of a plurality of the operation sequences comprises a boundary entangling operation of a predetermined form, executable by the quantum processor, positioned at a boundary of the operation sequence, wherein the boundary is one of a beginning or an end of the operation sequence; andcombining a plurality of the boundary entangling operations into at least one multiqubit entangling operation of the executable circuit acting on more than two qubits that implements a combined entangling action of the plurality of the boundary entangling operations.

2. The system of claim 1, wherein the at least one multi-qubit entangling operation is scheduled by the one or more processors for execution by the quantum processor during the same time interval.

3. The system of claim 1, wherein each of the plurality of portions corresponds to a two-qubit operation acting on a respective pair of target qubits of the plurality of qubits.

4. The system of claim 3, wherein the circuit representation comprises a plurality of successive logical circuit layers, each logical circuit layer comprising a plurality of the two-qubit operations acting on disjoint target qubit pairs.

5. The system of claim 4, wherein generating the executable circuit comprises, for each of the plurality of successive logical circuit layers, decomposing two-qubit operations of the logical circuit layer into the respective operation sequences such that each of a plurality of the operation sequences comprises a boundary entangling operation of the predetermined form positioned at a boundary of the operation sequence.

6. The system of any one of claims 4 or 5, wherein combining a plurality of the boundary entangling operations into at least one multi-qubit entangling operation of the executable circuit comprises combining boundary entangling operations of the predetermined form positioned at boundaries of operation sequences corresponding to two successive logical circuit layers into a single multi-qubit entangling operation.

7. The system of claim 6, wherein, relative to a compilation of the circuit representation prior to said combining, in which each logical circuit layer of the circuit representation is implemented using M multi-qubit entangling operations acting on more than two qubits, the number of multi-qubit entangling operations acting on more than two qubits in the executable circuit is reduced from M*L multi-qubit entangling operations to (M-1)*L+1 multi-qubit entangling operations, wherein L is the number of logical circuit layers of the circuit representation and M is the number of multi-qubit entangling operations acting on more than two qubits used to implement each logical circuit layer in said compilation prior to said combining.

8. The system of claim 1, wherein the circuit representation comprises a plurality of successive logical circuit layers, each logical circuit layer comprising one or more of the portions, and wherein combining the plurality of the boundary entangling operations comprises combining boundary entangling operations associated with two successive logical circuit layers into a single multi-qubit entangling operation acting on more than two qubits.

9. The system of claim 8, wherein the at least one multi-qubit entangling operation acts on an overlapping set of target qubits of the plurality of qubits that comprises qubits that are target qubits of operations in a first logical circuit layer of the plurality of successive logical circuit layers and qubits that are target qubits of operations in a second logical circuit layer successive to the first logical circuit layer.

10. The system of claim 8, wherein the at least one multi-qubit entangling operation implements couplings between overlapping pairs of qubits that are associated with boundary entangling operations in operation sequences corresponding to portions in the two successive logical circuit layers.

11. The system of claim 8, wherein generating the executable circuit comprises repeatedly applying, across a plurality of interfaces between successive logical circuit layers of the circuit representation, a compilation pattern that comprises, for each interface between two successive logical circuit layers:decomposing one or more of the portions comprised in each of the two successive logical circuit layers into respective operation sequences comprising boundary entangling operations of the predetermined form adjacent to the interface between the two successive logical circuit layers; andcombining at least the boundary entangling operations of the predetermined form adjacent to the interface into at least one multi-qubit entangling operation acting on more than two qubits, wherein the compilation pattern is applied at the plurality of the interfaces to generate the executable circuit.

12. The system of claim 8, wherein the circuit representation comprises L successive logical circuit layers, and wherein the executable circuit comprises not more than 2L+1 multi-qubit entangling operations acting on more than two qubits.

13. The system of claim 1, wherein at least one of the portions comprises a two-qubit unitary operation acting on a respective pair of qubits of the plurality of qubits.

14. The system of claim 13, wherein decomposing the two-qubit unitary operation comprises generating an operation sequence that begins with a correlated ZZ rotation and comprises no more than three correlated ZZ rotations, thereby limiting an entanglingoperation depth associated with implementing the two-qubit unitary operation.

15. The system of claim 13, wherein decomposing the two-qubit unitary operation comprises performing a Cartan decomposition.

16. The system of claim 15, wherein decomposing the two-qubit unitary operation comprises selecting a phase of an initial correlated ZZ rotation such that at least one Cartan entanglement phase of the resulting decomposition is zero.

17. The system of claim 16, wherein the phase is selected by identifying a zero of a scalar function dependent on a Cartan volume associated with the two-qubit unitary operation.

18. The system of any one of claims 1 or 8, wherein at least one of the operation sequences comprises one or more single-qubit rotation operations.

19. The system of claim 18, wherein combining the plurality of the boundary entangling operations further comprises propagating at least one single-qubit rotation operation from a first operation sequence to a second operation sequence and absorbing the at least one single-qubit rotation operation into the second operation sequence, thereby positioning at least one entangling operation of the predetermined form at a boundary of at least one of the first operation sequence or the second operation sequence for combining into the at least one multi-qubit entangling operation.

20. The system of any one of claims 1, 8, or 19, wherein the combining of the plurality of the boundary entangling operations into the at least one multi-qubit entangling operation reduces a total duration of entangling operations in the executable circuit, thereby decreasing an overall dephasing error of the executable circuit.

21. The system of any one of claims 1 or 8, wherein generating the executable circuit further comprises introducing one or more single-qubit rotation operations at an interface between two operation sequences that are adjacent in an execution order of the executable circuit, and propagating and absorbing the one or more single-qubit rotation operations into the two operation sequences to reduce a magnitude of entanglement phases of boundary entangling operations of the predetermined form adjacent to the interface that are combined into the at least one multi-qubit entangling operation.

22. The system of claim 21, wherein reducing the magnitude of the entanglement phases causes the control circuitry, in implementing the at least one multi-qubit entangling operation, to apply one or more control signals having reduced drive power or reduceddrive field amplitude, thereby decreasing an overall depolarization error of the executable circuit.

23. The system of claim 22, wherein the control circuitry comprises at least one laser source configured to generate one or more laser beams for implementing the at least one multi-qubit entangling operation, and wherein the one or more control signals control the at least one laser source such that reduced optical power or reduced optical field amplitude of the one or more laser beams is applied to the plurality of qubits, thereby decreasing a photon- scattering probability associated with implementing the at least one multi-qubit entangling operation.

24. The system of claim 21, wherein introducing the one or more single-qubit rotation operations comprises inserting an identity operation at the interface by inserting a singlequbit rotation and an inverse single-qubit rotation.

25. The system of claim 21, wherein introducing and propagating and absorbing the one or more single-qubit rotation operations are iteratively performed across interfaces between successive operation sequences of the executable circuit, and wherein a computational complexity of said iteratively performed introducing and propagating and absorbing is polynomial in a number of qubits and linear in a circuit depth.

26. The system of any one of claims 21 or 25, wherein introducing and propagating and absorbing the one or more single-qubit rotation operations comprises selecting rotation angles to reduce a sum of absolute values of entanglement phases associated with the boundary entangling operations.

27. The system of claim 26, wherein selecting the rotation angles comprises, for each interface between successive logical circuit layers, optimizing rotation angles for singlequbit rotation operations introduced at the interface with respect to entanglement phases of boundary entangling operations adjacent to the interface.

28. The system of claim 27, wherein the optimizing is performed sequentially for the interfaces.

29. The system of any one of claims 1 or 8, wherein combining the plurality of the boundary entangling operations into the at least one multi-qubit entangling operationreduces a total duration during which the quantum processor performs entangling operations to implement the circuit representation, thereby increasing an implementation fidelity of the quantum computational task.

30. The system of claim 1, wherein the quantum processor comprises a trapped-ion quantum processor.

31. The system of claim 1, wherein the at least one multi-qubit entangling operation implements an Ising-type interaction.

32. The system of claim 31, wherein the at least one multi-qubit entangling operation implements a layer of mutually commuting two-qubit ZZ interactions acting simultaneously on a plurality of pairs of qubits.

33. The system of claim 1, wherein the predetermined form of the boundary entangling operation comprises a correlated ZZ rotation.

34. The system of claim 33, wherein the boundary entangling operation comprises an RZZ operation.

35. The system of claim 1, wherein the decomposing is constrained such that, for each of the plurality of operation sequences, the boundary entangling operation of the predetermined form is positioned at the beginning of the operation sequence.

36. The system of any one of claims 1-35, wherein the quantum computational task comprises a quantum simulation task.

37. The system of any one of claims 1-36, wherein the at least one multi-qubit entangling operation is parameterized by a real-valued coupling matrix defining coupling phases between pairs of qubits.

38. The system of claim 37, wherein generating the executable circuit reduces a nuclear norm of the coupling matrix of the at least one multi-qubit entangling operation.

39. The system of claim 38, wherein generating the executable circuit reduces a sum of nuclear norms of coupling matrices of multi-qubit entangling operations of the executable circuit.

40. A computer-implemented method for generating an executable quantum circuit for execution by a quantum processor having a plurality of qubits and control circuitry configured to implement the instructions of the executable quantum circuit to control operations of the quantum processor, the method comprising:obtaining, by one or more processors, a circuit representation of a quantum computational task; decomposing, by the one or more processors, a plurality of portions of the circuit representation into respective operation sequences, each operation sequence comprising one or more entangling operations, wherein the decomposing is constrained such that each of a plurality of the operation sequences comprises a boundary entangling operation of a predetermined form that is executable by the quantum processor and positioned at a boundary of the operation sequence, the boundary being one of a beginning or an end of the operation sequence;combining, by the one or more processors, a plurality of the boundary entangling operations into at least one multi-qubit entangling operation of the executable quantum circuit that acts on more than two qubits and that implements a combined entangling action of the plurality of the boundary entangling operations; andproviding, by the one or more processors, instructions corresponding to the executable quantum circuit to the control circuitry for execution by the quantum processor.

41. The method of claim 40, wherein the instructions schedule the at least one multiqubit entangling operation for execution by the quantum processor during a single time interval.

42. The method of claim 40, wherein each of the plurality of portions corresponds to a two-qubit operation acting on a respective pair of target qubits of the plurality of qubits.

43. The method of claim 42, wherein the circuit representation comprises a plurality of successive logical circuit layers, each logical circuit layer comprising a plurality of the two-qubit operations acting on disjoint target qubit pairs.

44. The method of claim 43, wherein generating the executable quantum circuit comprises, for each of the plurality of successive logical circuit layers, decomposing two-qubit operations of the logical circuit layer into the respective operation sequences suchthat each of a plurality of the operation sequences comprises a boundary entangling operation of the predetermined form positioned at a boundary of the operation sequence.

45. The method of claim 44, wherein the combining comprises combining boundary entangling operations of the predetermined form positioned at boundaries of operation sequences corresponding to two successive logical circuit layers into a single multi-qubit entangling operation.

46. The method of claim 45, wherein, relative to a compilation of the circuit representation prior to said combining, in which each logical circuit layer of the circuit representation is implemented using M multi-qubit entangling operations acting on more than two qubits, a number of multi-qubit entangling operations acting on more than two qubits in the executable quantum circuit is reduced from M*L multi-qubit entangling operations to (M-1)*L+1 multi-qubit entangling operations, wherein L is the number of logical circuit layers of the circuit representation and M is the number of multi-qubit entangling operations acting on more than two qubits used to implement each logical circuit layer in said compilation prior to said combining.

47. The method of claim 40, wherein the circuit representation comprises a plurality of successive logical circuit layers, each logical circuit layer comprising one or more of the portions, and wherein the combining comprises combining boundary entangling operations associated with two successive logical circuit layers into a single multi-qubit entangling operation acting on more than two qubits.

48. The method of claim 47, wherein the at least one multi-qubit entangling operation acts on an overlapping set of target qubits of the plurality of qubits that comprises qubits that are target qubits of operations in a first logical circuit layer of the plurality of successive logical circuit layers and qubits that are target qubits of operations in a second logical circuit layer successive to the first logical circuit layer.

49. The method of claim 47, wherein the at least one multi-qubit entangling operation implements couplings between overlapping pairs of qubits that are associated with boundary entangling operations in operation sequences corresponding to portions in the two successive logical circuit layers.

50. The method of claim 47, wherein generating the executable quantum circuit comprises repeatedly applying, across a plurality of interfaces between successive logical circuit layers of the circuit representation, a compilation pattern that comprises, for each interface between two successive logical circuit layers:decomposing one or more of the portions comprised in each of the two successive logical circuit layers into respective operation sequences comprising boundary entangling operations of the predetermined form adjacent to the interface between the two successive logical circuit layers; andcombining at least the boundary entangling operations of the predetermined form adjacent to the interface into at least one multi-qubit entangling operation acting on more than two qubits, wherein the compilation pattern is applied at the plurality of the interfaces to generate the executable quantum circuit.

51. The method of claim 47, wherein the circuit representation comprises L successive logical circuit layers, and wherein the executable quantum circuit comprises not more than 2L+1 multi-qubit entangling operations acting on more than two qubits.

52. The method of claim 40, wherein at least one of the portions comprises a two-qubit unitary operation acting on a respective pair of qubits of the plurality of qubits.

53. The method of claim 52, wherein decomposing the two-qubit unitary operation comprises generating an operation sequence that begins with a correlated ZZ rotation and comprises no more than three correlated ZZ rotations, thereby limiting an entanglingoperation depth associated with implementing the two-qubit unitary operation.

54. The method of claim 52, wherein decomposing the two-qubit unitary operation comprises performing a Cartan decomposition.

55. The method of claim 54, wherein decomposing the two-qubit unitary operation comprises selecting a phase of an initial correlated ZZ rotation such that at least one Cartan entanglement phase of the resulting decomposition is zero.

56. The method of claim 55, wherein selecting the phase comprises identifying a zero of a scalar function dependent on a Cartan volume associated with the two-qubit unitary operation.

57. The method of claim 40, wherein at least one of the operation sequences comprises one or more single-qubit rotation operations.

58. The method of claim 57, wherein the combining further comprises propagating at least one single-qubit rotation operation from a first operation sequence to a second operation sequence and absorbing the at least one single-qubit rotation operation into the second operation sequence, thereby positioning at least one entangling operation of the predetermined form at a boundary of at least one of the first operation sequence or the second operation sequence for combining into the at least one multi-qubit entangling operation.

59. The method of claim 40, wherein the combining reduces a total duration of entangling operations executed by the quantum processor in implementing the executable quantum circuit, thereby decreasing an overall dephasing error of the executable quantum circuit.

60. The method of claim 40, further comprising introducing one or more single-qubit rotation operations at an interface between two operation sequences that are adjacent in an execution order of the executable quantum circuit, and propagating and absorbing the one or more single-qubit rotation operations into the two operation sequences to reduce a magnitude of entanglement phases of boundary entangling operations of the predetermined form adjacent to the interface that are combined into the at least one multi-qubit entangling operation.

61. The method of claim 60, wherein reducing the magnitude of the entanglement phases causes the control circuitry, in implementing the at least one multi-qubit entangling operation, to apply one or more control signals having reduced drive power or reduced drive field amplitude, thereby decreasing an overall depolarization error of the executable quantum circuit.

62. The method of claim 61, wherein the control circuitry comprises at least one laser source configured to generate one or more laser beams for implementing the at least one multi-qubit entangling operation, and wherein the one or more control signals control the at least one laser source such that reduced optical power or reduced optical field amplitude of the one or more laser beams is applied to the plurality of qubits, thereby decreasing aphoton- scattering probability associated with implementing the at least one multi-qubit entangling operation.

63. The method of claim 60, wherein introducing the one or more single-qubit rotation operations comprises inserting an identity operation at the interface by inserting a singlequbit rotation and an inverse single-qubit rotation.

64. The method of claim 60, wherein the introducing and the propagating and absorbing are iteratively performed across interfaces between two operation sequences that are adjacent in the execution order of the executable quantum circuit, and wherein a computational complexity of the iteratively performed introducing and propagating and absorbing is polynomial in a number of qubits and linear in a circuit depth.

65. The method of claim 60, wherein introducing and propagating and absorbing the one or more single-qubit rotation operations comprises selecting rotation angles to reduce a sum of absolute values of entanglement phases associated with the boundary entangling operations.

66. The method of claim 65, wherein selecting the rotation angles comprises, for each interface between two operation sequences that are adjacent in an execution order of the executable quantum circuit, optimizing rotation angles for single-qubit rotation operations introduced at the interface with respect to entanglement phases of boundary entangling operations adjacent to the interface.

67. The method of claim 66, wherein the optimizing is performed sequentially for the interfaces.

68. The method of claim 40, wherein the combining reduces a total duration during which the quantum processor performs entangling operations to implement the quantum computational task, thereby increasing an implementation fidelity of the quantum computational task.

69. The method of claim 40, wherein the quantum processor comprises a trapped-ion quantum processor.

70. The method of claim 40, wherein the at least one multi-qubit entangling operation implements an Ising-type interaction.

71. The method of claim 70, wherein the at least one multi-qubit entangling operation implements a layer of mutually commuting two-qubit ZZ interactions acting simultaneously on a plurality of pairs of qubits.

72. The method of claim 40, wherein the predetermined form of the boundary entangling operation comprises a correlated ZZ rotation.

73. The method of claim 72, wherein the boundary entangling operation comprises an RZZ operation.

74. The method of claim 40, wherein the decomposing is constrained such that, for each of the plurality of operation sequences, the boundary entangling operation of the predetermined form is positioned at the beginning of the operation sequence.

75. The method of claim 40, wherein the quantum computational task comprises a quantum simulation task.

76. The method of any one of claims 40-75, wherein the at least one multi-qubit entangling operation is parameterized by a real-valued coupling matrix defining coupling phases between pairs of qubits.

77. The method of claim 76, wherein generating the executable quantum circuit comprises reducing a nuclear norm of the coupling matrix of the at least one multi-qubit entangling operation.

78. The method of claim 77, wherein generating the executable quantum circuit comprises reducing a sum of nuclear norms of coupling matrices of multi-qubit entangling operations of the executable quantum circuit.

79. The method of any one of claims 40-78, wherein providing the instructions is performed prior to generating hardware-specific control signals for implementing the executable quantum circuit on the quantum processor.

80. A non-transitory computer-readable medium storing instructions that, when executed by one or more processors of a system comprising a quantum processor having a plurality of qubits and control circuitry, cause the one or more processors to perform the method of any one of claims 40-79.

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