Massive multiple input multiple output (MIMO) radio unit (MRU) for wireless communication

Abstract

The present disclosure relates to a massive MIMO Radio Unit (MRU) (108) for wireless communication. The MRU (108) includes a baseband section (218) including a baseband transceiver (202) and at least two Radio frequency (RF) transceiver (214). The MRU (108) may further include a Radio Frequency (RF) front-end section (204) including a plurality of RF chains. Each RF chain includes a high-power amplifier (312), a driver amplifier, and a low-noise amplifier (LNA) (328). The MRU (108) may include a power supply section (206) configured to provide power to the RF front-end section (204) and the baseband section (218). Further, the MRU (108) may include a thermal management unit (208) configured to dissipate heat generated by the MRU (108). Further, the MRU (108) include a clock section (212) configured to synchronize the operation of the RF front-end section (204) and the baseband section (218).

Description

MASSIVE MULTIPLE INPUT MULTIPLE OUTPUT (MIMO) RADIO UNIT (MRU) FOR WIRELESS COMMUNICATIONRESERVATION OF RIGHTS

[0001] A portion of the disclosure of this patent document contains material, which is subject to intellectual property rights such as, but are not limited to, copyright, design, trademark, Integrated Circuit (IC) layout design, and / or trade dress protection, belonging to Jio Platforms Limited (JPL) or its affiliates (hereinafter referred as owner). The owner has no objection to the facsimile reproduction by anyone of the patent document or the patent disclosure, as it appears in the Patent and Trademark Office patent files or records, but otherwise reserves all rights whatsoever. All rights to such intellectual property are fully reserved by the owner.TECHNICAL FIELD

[0002] The embodiments of the present disclosure generally relate to communication networks. The present disclosure relates to a Massive Multiple Input Multiple Output (MIMO) Radio Unit (MRU). In particular, the embodiment of the present disclosure generally relates to an architecture of fifth generation (5G) new radio (NR) 32T32R massive MIMO Radio Unit (MRU) for use in wireless communication networks.DEFINITIONS

[0003] As used in the present disclosure, the following terms are generally intended to have the meaning as set forth below, except to the extent that the context in which they are used indicates otherwise.

[0004] The expression ‘32T32R massive Multiple Input Multiple Output (MIMO) Radio Unit (MRU)’ used hereinafter in the specification refers to a network device that integrates a baseband section, and Radio Frequency (RF) front-end section, a power supply section, athermal management system, a memory section, and a clock section. The 32T32R MRU features 32 Transmit (T) and 32 Receive (R) antennachains. The 32T32RMRU supports macro-level wide-area coverage with improved indoor penetration, making it suitable for dense urban areas, malls, offices, and stadiums.

[0005] The expression ‘Baseband Section’ used hereinafter in the specification refers to a component that is configured for digital signal processing, including encoding, modulation, and interfacing with the RF section. The baseband section ensures that the data is prepared for transmission or reception in a usable form.

[0006] The expression ‘RF Front-End Section’ used hereinafter in the specification refers to the part of the Radio Unit (RU) handling the transmission and reception of radio frequency signals, including amplifiers and filters. The RF front-end section ensures that the transmitted signals are properly sent out and received signals are correctly captured and processed.

[0007] The expression ‘Crest Factor Reduction (CFR)’ used hereinafter in the specification refers to signal processing technique used to reduce the Peak-to-Average Power Ratio (PAPR) in communication signals. PAPR is a critical factor in modem communication systems, especially in wireless networks like Long-Term, Evolution (LTE) and Fifth Generation (5G) network, where high PAPR can cause inefficiencies in power amplifiers. Power amplifiers with high PAPR operate less efficiently, resulting in energy waste and signal distortion.

[0008] The expression ‘Fronthaul Interface’ used hereinafter in the specification refers to a high-speed optical connectivity interface between the RU and the centralized unit-distributed unit (CU-DU). The Fronthaul interface enables the high-bandwidth transmission of data, control, and synchronization signals between these network components, playing a crucial role in ensuring the performance and efficiency of the networks.

[0009] The expression ‘Single 25G Optical Interface’ used hereinafter in the specification refers to independent 25-gigabit-per-second (25G) optical links, used for both data transmission and synchronization purposes within the network. Thesehigh-speed optical links allow for high-throughput communication and precise timing, essential for maintaining synchronization between network elements in 5G communication systems.

[0010] The expression ‘Blind Mate’ used hereinafter in the specification refers to a mechanical design that enables seamless connectivity between components without the need for manual alignment or cabling. This design feature allows for easy and quick connection, reducing the complexity and time required for installation and maintenance in network systems.

[0011] The expression ‘Power Management Integrated chipset (PMICs)’ used hereinafter in the specification refers to the integrated circuits for converting and regulating power supply voltages within the Radio Unit (RU). PMICs are essential for ensuring that the various components of the RU receive the correct voltage levels required for optimal operation. They manage power distribution, minimize power loss, and contribute to the overall efficiency of the system.

[0012] The expression ‘Antenna Filter Unit (AFU)’ used hereinafter in the specification integrates critical components like antennas, filters, and calibration circuits into a single, unified structure. The AFU includes 32 metallic cavity filters, which offer superior roll-off outside the operating band. The AFU integrates an 8 x 8 MIMO antenna array composed of 128 single antenna elements along with a calibration Printed Circuit Board (PCB). This ensures precise synchronization and signal clarity.

[0013] The expression ‘Low-Dropout Regulator (LDO)’ used hereinafter in the specification refers to a voltage regulator that provides a stable output voltage with minimal voltage drop between the input and output. The LDO is particularly useful in situations where the input voltage is close to the desired output voltage, enabling efficient regulation without requiring excessive power loss.

[0014] The expression ‘Embedded Copper Coin’ used hereinafter in the specification refers to a thermal management feature integrated into the PrintedCircuit Board (PCB). The copper coin is strategically placed within the PCB to enhance heat dissipation by increasing the surface area available for heat transfer. The embedded copper coin helps in effectively conducting heat away from critical components, thereby improving the overall thermal performance and reliability of the device.

[0015] The expression ‘ System Synchronizer’ used hereinafter in the specification refers to a device or circuit ensuring synchronized operation across RU components.

[0016] The expression ‘Clock Generator’ used hereinafter in the specification refers to a circuit that generates clock signals for synchronized processing within the RU.

[0017] The expression ‘Power Amplifier Module (PAM)’ used hereinafter in the specification is designed to amplify low-power radio frequency (RF) signals to higher power levels required for effective transmission over long distances or through obstructions. PAMs are commonly used in applications such as base stations, user equipment, and other RF communication systems.

[0018] The expression ‘Antenna Interface Standards Group (AISG)’ used hereinafter in the specification refers to a standardized communication protocol for controlling and monitoring Antenna Line Devices (ALDs) in mobile networks. The AISG includes components like Remote Electrical Tilt (RET) antennas, Tower-Mounted Amplifiers (TMAs), and bias-tee devices.

[0019] The expression ‘Digital Step Attenuator (DSA)’ used hereinafter in the specification refers to an electronic device used in communication and signal processing systems to control the amplitude of a signal. The DSA adjust the power level of a radio frequency or microwave signal in discrete steps. The steps are typically controlled digitally, enabling precise and repeatable attenuation levels.

[0020] These definitions are in addition to those expressed in the art.BACKGROUND

[0021] The following description of related art is intended to provide background information pertaining to the field of the disclosure. This section may include certain aspects of the art that may be related to various features of the present disclosure. However, it should be appreciated that this section be used only to enhance the understanding of the reader with respect to the present disclosure, and not as admissions of prior art.

[0022] The evolution of 5G technology has introduced wireless communication, focusing on achieving higher speeds, better reliability, and enhanced coverage. Massive Multiple Input Multiple Output (MIMO) systems have become fundamental to 5G networks, providing the means to handle dense user environments and deliver high data rates efficiently. By integrating beamforming and advanced multi-user MIMO technologies, the MIMO offers significant improvements in spectral efficiency and network coverage. However, despite these advances, several challenges persist in traditional MIMO systems, particularly regarding scalability, energy efficiency, and cost-effectiveness.

[0023] The Conventional massive MIMO systems are hindered by the separation of baseband and Radio Frequency (RF) front-end processing units, leading to increased design complexity, higher costs, and reliability concerns due to additional interconnects. The conventional massive MIMO systems also struggle to achieve optimal coverage, especially in dense urban or indoor environments, where signal attenuation and interference are significant challenges. Furthermore, the use of existing power amplifier technologies contributes to inefficiencies, with substantial energy consumption and operational costs. These issues are compounded by the limited scalability of conventional massive MIMO systems, which are often incapable of adapting to diverse deployment scenarios or handling the dynamic demands of traffic-heavy locations such as stadiums and urban centres.

[0024] Further, the conventional massive MIMO systems rely heavily on modular designs with separate hardware units for different functions. While functional, thearchitecture of the conventional massive MIMO systems is suboptimal for nextgeneration demands, offering limited integration and using less adaptive beamforming methods. The conventional massive MIMO systems fail to fully capitalize on the transformative potential of 5G, especially in scenarios requiring high capacity and low latency.

[0025] There is, therefore, a need in the art to overcome the shortcomings of the existing prior arts.SUMMARY OF THE DISCLOSURE

[0026] In an embodiment, a method of operating a massive Multiple Input Multiple Output (MIMO) Radio Unit (MRU) is described. The method includes receiving baseband information from a fronthaul interface by a baseband section of the MRU. The method includes generating a plurality of digital transmit signals for a plurality of Radio Frequency (RF) chains by a digital front-end of the MRU. Further, the method further include converting the plurality of digital transmit signals into a plurality of RF transmit signals by at least two RF transceivers. Further, the method includes processing the plurality of RF transmit signals to produce amplified RF signals by an RF front-end section of the MRU. The RF front-end section includes a plurality of RF chains including a high -power amplifier, a driver amplifier, and a low-noise amplifier (LNA). The method includes filtering the amplified RF signals. The cavity filter is coupled to each of the plurality of RF chains by a cavity filter.

[0027] In an embodiment, the method includes synchronizing operation of the baseband section and the RF front-end section by a clock section. Further, the method include dissipating heat generated in the MRU by a thermal management unit.

[0028] In another embodiment, the plurality of RF chains includes at least 32 transmit chains and at least 32 receive chains.

[0029] In another embodiment, the baseband section includes a digital front-end configured to perform at least one of a Crest Factor Reduction (CFR) and a Digital Predistortion (DPD).

[0030] In another embodiment, the digital front-end is configured to perform the Digital Predistortion (DPD) by receiving one or more feedback signals derived from outputs of the high-power amplifiers using the plurality of observation chains. Further, the method includes generating one or more predistortion coefficients based on the one or more feedback signals. The method includes applying the one or more predistortion coefficients to the plurality of digital transmit signals prior to conversion by the at least two RF transceivers.

[0031] In another embodiment, the digital front-end is configured to perform the Crest Factor Reduction (CFR) by detecting one or more peaks in at least one of the plurality of digital transmit signals. Further, the method includes limiting the one or more peaks to satisfy a peak-to-average power ratio threshold prior to conversion by the at least two RF transceivers.

[0032] In another embodiment, the method further includes coupling the high-power amplifiers to at least one RF transceiver by a plurality of observation chains.

[0033] In another embodiment, the method includes receiving the baseband information from at least one of a Distributed Unit (DU) and a combined Central and Distributed Unit (CU / DU).

[0034] In another embodiment, the thermal management unit includes an embedded copper coin disposed beneath the high-power amplifiers.

[0035] In another embodiment, the embedded copper coin includes a T-shaped copper coin configured to increase a contact area with a printed circuit board and a heat sink, and the embedded copper coin includes a mechanically drilled portion to enhance thermal coupling between the printed circuit board and the heat sink.

[0036] In another embodiment, the clock section is configured to distribute a synchronized reference clock to the at least two RF transceivers based on aPrecision Time Protocol (PTP) timing recovered from a 25G optical interface, to maintain phase coherence across the plurality of RF chains.

[0037] In another exemplary embodiment, a massive Multiple Input Multiple Output (MIMO) Radio Unit (MRU) for wireless communication is described. The MRU includes a baseband section including a baseband transceiver and at least two Radio frequency (RF) transceiver. Further, the MRU includes a Radio Frequency (RF) front-end section including a plurality of RF chains. Each RF chain includes a high-power amplifier, a driver amplifier, and a low-noise amplifier (LNA), and each of the plurality of RF chains is coupled to a cavity filter. The MRU includes a power supply section configured to provide power to the RF front-end section and the baseband section. Further, the MRU includes a thermal management unit configured to dissipate heat generated by the MRU. The MRU includes a clock section configured to synchronize the operation of the RF front-end section and the baseband section.

[0038] In yet another embodiment, a computer program product including a non-transitory computer-readable medium including instructions that, when executed by one or more processors, cause the one or more processors to execute a method of operating a massive Multiple Input Multiple Output (MIMO) Radio Unit (MRU) is disclosed. The method includes receiving baseband information from a fronthaul interface by a baseband section of the MRU. The method includes generating a plurality of digital transmit signals for a plurality of Radio Frequency (RF) chains by a digital front-end of the MRU. Further, the method further include converting the plurality of digital transmit signals into a plurality of RF transmit signals by at least two RF transceivers. Further, the method includes processing the plurality of RF transmit signals to produce amplified RF signals by an RF front-end section of the MRU. The RF front-end section includes a plurality of RF chains including a high-power amplifier, a driver amplifier, and a low-noise amplifier (LNA). The method includes filtering the amplified RF signals. The cavity filter is coupled to each of the plurality of RF chains by a cavity filter.OBJECTIVES OF THE PRESENT DISCLOSURE

[0039] Some of the objectives of the present disclosure, which at least one embodiment herein satisfies are as listed herein below.

[0040] An objective of the present disclosure is to provide a compact, integrated 32 transmit 32 receive (32T32R) Massive Multiple Input Multiple Output (MIMO) Radio Unit (MRU), consolidating baseband, high-speed digital, and Radio Frequency (RF) front-end sections into a single unit, minimizing design complexity and eliminating the need for separate boards and interconnects.

[0041] Another objective of the present disclosure is to provide a system that enhances network coverage and capacity in dense urban environments and high-traffic zones by employing advanced beamforming and Multi-User MIMO algorithms, enabling better signal quality and reduced interference.

[0042] Another objective of the present disclosure is to provide a system that optimize energy efficiency and operational costs by utilizing Gallium Nitride (GaN)-based Power Amplifier Modules (PAM), embedded copper coin technology, and heat pipe-based mechanical housing for superior thermal management and power efficiency.

[0043] Another objective of the present disclosure is to provide a system that ensure easy deployment and scalability with flexible MIMO antenna configurations such as 8x8 with 128 antenna elements or 12x8 with 192 antenna elements, adapting to varying network coverage requirements.

[0044] Another objective of the present disclosure is to provide a system that provide a cost-effective and thermally optimized design by implementing cableless architecture with blind-mated connections and integration of a 32-port cavity filter and Antenna Unit.

[0045] Another objective of the present disclosure is to provide a system that enhance system synchronization and network performance using Precision Time Protocol (PTP) on a 25G optical interface for accurate synchronization and AntennaInterface Standards Group (AISG) 2.0 -based remote electrical tilt for dynamic antenna adjustments.

[0046] Another objective of the present disclosure is to provide a system that improve receiver sensitivity and reduce noise using front-end designs with a sub-IdB noise figure (NF), optimizing signal reception in challenging environments.BRIEF DESCRIPTION OF THE ACCOMPANYING DRAWINGS

[0047] The accompanying drawings, which are incorporated herein, and constitute a part of this disclosure, illustrate exemplary embodiments of the disclosed methods and systems in which like reference numerals refer to the same parts throughout the different drawings. Components in the drawings are not necessarily to scale, emphasis instead being placed upon clearly illustrating the principles of the present disclosure. Some drawings may indicate the components using block diagrams and may not represent the internal circuitry of each component. It will be appreciated by those skilled in the art that disclosure of such drawings includes the disclosure of electrical components, electronic components or circuitry commonly used to implement such components.

[0048] FIG. 1 illustrates an exemplary network architecture for implementing a Massive Multiple Input Multiple Output (MIMO) Radio Unit (MRU) for wireless communication in a network, in accordance with embodiments of the present disclosure.

[0049] FIG. 2A illustrates an exemplary structural architecture of the MRU for wireless communication, in accordance with embodiments of the present disclosure.

[0050] FIG. 2B illustrates another exemplary structural architecture of the MRU for wireless communication, in accordance with embodiments of the present disclosure.

[0051] FIG. 3 illustrates an exemplary block diagram of a Radio Frequency (RF) front-end section of the MRU for communication, in accordance with embodiments of the present disclosure.

[0052] FIG. 4 illustrates an exemplary block diagram of a clock section of the MRU, in accordance with embodiments of the present disclosure.

[0053] FIG. 5 illustrates an exemplary architecture of a thermal management unit of the MRU for communication, in accordance with embodiments of the present disclosure.

[0054] FIG. 6 illustrates a flow diagram of a method of operating the MRU for wireless communication for communication, in accordance with embodiments of the present disclosure.

[0055] FIG. 7 illustrates an exemplary computer system in which or with which embodiments of the present disclosure may be implemented.

[0056] The foregoing shall be more apparent from the following more detailed description of the disclosure.LIST OF REFERENCE NUMERALS100 - Network Architecture102-1, 102-2 - Users104-1, 104-2 - User equipments106 - Network108 -Massive Multiple Input Multiple Output (MIMO) Radio Unit (MRU)200A, 200B - Structural architecture202 - Baseband transceiver Application-Specific Integrated Circuit (ASIC)- Radio Frequency (RF) front-end section - Power supply section-1 / 208-2 - Thermal management unit -1 / 210-2 - Memory section- Clock section-1 / 214-2 - RF transceiver ASIC- Power Amplifier- Baseband section- Antenna Filter Unit (AFU)- Block diagram of the RF front-end section - Transmission chain (Tx)- Filter- Gain block- Digital Step Attenuator (DSA)- Pre-driver amplifier- Power Amplifier (PA)- Coupler- Circulator- Cavity Filter- RF Port 0- Attenuation block- Filter- Switch- Switch with Low-Noise Amplifier (LNA)- Cavity Filter- Digital Step Attenuator (DSA)- Gain block- Feedback / Receiving chain (Rx)- Block diagram of clock section- System synchronizer- Phase-Locked Loops (PLLs) and clock generator - Block diagram of thermal management unit- T-shaped Coin- Mechanical drill- Multi-layer substrate- Method- Computer system- External storage device- Bus- Main memory740 - Read only memory750 - Mass storage device760 - Communication port(s)770 - ProcessorDETAILED DESCRIPTION

[0057] In the following description, for the purposes of explanation, various specific details are set forth in order to provide a thorough understanding of embodiments of the present disclosure. It will be apparent, however, that embodiments of the present disclosure may be practiced without these specific details. Several features described hereafter can each be used independently of one another or with any combination of other features. An individual feature may not address all of the problems discussed above or might address only some of the problems discussed above. Some of the problems discussed above might not be fully addressed by any of the features described herein.

[0058] The ensuing description provides exemplary embodiments only, and is not intended to limit the scope, applicability, or configuration of the disclosure. Rather, the ensuing description of the exemplary embodiments will provide those skilled in the art with an enabling description for implementing an exemplary embodiment. It should be understood that various changes may be made in the function and arrangement of elements without departing from the spirit and scope of the disclosure as set forth.

[0059] Specific details are given in the following description to provide a thorough understanding of the embodiments. However, it will be understood by one of ordinary skill in the art that the embodiments may be practiced without these specific details. For example, circuits, systems, networks, processes, and other components may be shown as components in block diagram form in order not to obscure the embodiments in unnecessary detail. In other instances, well-knowncircuits, processes, algorithms, structures, and techniques may be shown without unnecessary detail in order to avoid obscuring the embodiments.

[0060] Also, it is noted that individual embodiments may be described as a process which is depicted as a flowchart, a flow diagram, a data flow diagram, a structure diagram, or a block diagram. Although a flowchart may describe the operations as a sequential process, many of the operations can be performed in parallel or concurrently. In addition, the order of the operations may be re-arranged. A process is terminated when its operations are completed but could have additional steps not included in a figure. A process may correspond to a method, a function, a procedure, a subroutine, a subprogram, etc. When a process corresponds to a function, its termination can correspond to a return of the function to the calling function or the main function.

[0061] The word “exemplary” and / or “demonstrative” is used herein to mean serving as an example, instance, or illustration. For the avoidance of doubt, the subject matter disclosed herein is not limited by such examples. In addition, any aspect or design described herein as “exemplary” and / or “demonstrative” is not necessarily to be construed as preferred or advantageous over other aspects or designs, nor is it meant to preclude equivalent exemplary structures and techniques known to those of ordinary skill in the art. Furthermore, to the extent that the terms “includes,” “has,” “contains,” and other similar words are used in either the detailed description or the claims, such terms are intended to be inclusive in a manner similar to the term “comprising” as an open transition word without precluding any additional or other elements.

[0062] Reference throughout this specification to “one embodiment” or “an embodiment” or “an instance” or “one instance” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present disclosure. Thus, the appearances of the phrases “in one embodiment” or “in an embodiment” in various places throughout this specification are not necessarily all referring to the same embodiment.Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0063] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” and / or “comprising,” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items.

[0064] While considerable emphasis has been placed herein on the components and component parts of the preferred embodiments, it will be appreciated that many embodiments can be made and that many changes can be made in the preferred embodiments without departing from the principles of the disclosure. These and other changes in the preferred embodiment, as well as other embodiments of the disclosure, will be apparent to those skilled in the art from the disclosure herein, whereby it is to be distinctly understood that the foregoing descriptive matter is to be interpreted merely as illustrative of the disclosure and not as a limitation.

[0065] Wireless communication technology has rapidly evolved over the past few decades. The first generation of wireless communication technology was analog, offering only voice services. Further, text messaging and data services became possible when the second-generation (2G) technology was introduced. The third generation (3G) technology marked the introduction of high-speed internet access, mobile video calling, and location-based services. The fourth generation (4G) technology revolutionized the wireless communication with faster data speeds, improved network coverage, and security. Currently, fifth generation (5G) technology is being deployed, offering significantly faster data speeds, lowerlatency, and the ability to connect many devices simultaneously. Further, 6G successor to 5G is expected to provide significantly high data speed with reduced latency, which may offer improved connectivity for a vast number of devices concurrently. The capabilities of 6G enable new types of applications and services, such as advanced augmented reality (AR) and virtual reality (VR), holographic communications, and more immersive digital experiences. These advancements represent a significant leap forward from previous generations, enabling enhanced mobile broadband, improved Internet of Things (loT) connectivity, and more efficient use of network resources. The sixth generation (6G) technology promises to build upon these advancements, pushing the boundaries of wireless communication even further. While the 5G technology is still being rolled out globally, research and development into the 6G are rapidly progressing, with the aim of revolutionizing the way of connecting and interacting with technology.

[0066] The advent of 5G networks has ushered in an era of high-speed, low-latency communication, fundamentally transforming industries such as healthcare, transportation, and entertainment. To fully harness the potential of 5G, Massive Multiple Input Multiple Output (MIMO) technology has become essential, enabling networks to manage large-scale user demands and ensure seamless connectivity.

[0067] Despite advancements, the conventional massive MIMO systems face notable challenges. The separation of baseband and RF front-end units in traditional designs introduces increased complexity, higher costs, and reduced system reliability due to the need for additional connectors and interconnects. Furthermore, the massive MIMO architecture struggle to provide deep indoor penetration and reliable connectivity in dense or high-traffic areas, which are critical for modern 5G applications. Another major issue lies in power inefficiency. Current RF power amplifiers consume significant energy, resulting in high operational costs and environmental impact. Additionally, conventional massive MIMO systems lack scalability and flexibility, making them unsuitable for the dynamic requirements of evolving the 5G networks.

[0068] The present disclosure introduces a 320W 32T32R massive MIMO Radio Unit (MRU) that effectively addresses these limitations through an integrated, innovative design / architecture. By combining baseband, Radio Frequency (RF), and Direct Current (DC) power systems into a single multilayer Printed Circuit Board (PCB), eliminating the need for separate units and interconnects, significantly simplifying deployment and reducing costs. The use of advanced PCB technologies, including embedded copper coin thermal designs, ensures efficient heat dissipation and compact form factors. The MRU also incorporates adaptive beamforming to dynamically adjust radio unit patterns based on real-time traffic, ensuring optimal coverage and interference reduction. Moreover, compliance with standards and support for multiple configurations making MRU a versatile and future-ready solution.

[0069] Further, the MRU is cost-efficient and power-efficient, with an overall power consumption of approximately 1068W, representing a significant improvement over traditional systems. The proposed MRU supports advanced features like Antenna Interface Standards Group (AISG) 2.0-based antenna tilt management and Precision Time Protocol (PTP) synchronization, further enhancing its operational capabilities. These innovations collectively ensure that the MRU is well-equipped to meet the demands of modem 5G networks, providing unmatched performance, reliability, and scalability.

[0070] The MRU employs Gallium Nitride (GaN)-based power amplifier modules that deliver 10W per Radio Frequency (RF) chain, achieving an overall output of 320W with a power-added efficiency exceeding 43%. The efficiency ensures lower operational costs and reduced energy consumption, directly addressing the energy challenges faced by high-capacity network deployments. The MRU further enhances performance through adaptive beamforming techniques, allowing the MRU to dynamically focus signal strength on specific user locations or cell sectors based on real-time traffic and environmental conditions. The targeted approach minimizes interference and maximizes signal quality.

[0071] The MRU also incorporates innovative thermal management using embedded copper coin designs and heat pipe-based mechanical housing, ensuring efficient heat dissipation across the PCB and minimizes the unit's size and weight, making it suitable for various deployment scenarios. Additionally, the product supports scalability through compatibility with different MIMO configurations (8x8 and 12x8), making it versatile for both urban and rural network demands.

[0072] Various embodiments throughout the disclosure will be explained in more detail with reference to FIGS. 1-7.

[0073] FIG. 1 illustrates an exemplary network architecture 100 for implementing a Massive Multiple Input Multiple Output (MIMO) Radio Unit (MRU) 108 for wireless communication in a network 106, in accordance with embodiments of the present disclosure.

[0074] Referring to FIG. 1, the network architecture 100 may include one or more computing devices or user equipments 104-1, 104-2... 104-N associated with one or more users 102-1, 102-2... 102-N in an environment. A person of ordinary skill in the art will understand that one or more users 102-1, 102-2... 102-N may be individually referred to as the user 102 and collectively referred to as the users 102. Similarly, a person of ordinary skill in the art will understand that one or more user equipments (UE) 104-1, 104-2... 104-N may be individually referred to as the user equipment 104 and collectively referred to as the user equipment 104. A person of ordinary skill in the art will appreciate that the terms “computing device(s)” and “user equipment” may be used interchangeably throughout the disclosure. Although three user equipments 104 are depicted in FIG. 1, however, any number of the user equipments 104 may be included without departing from the scope of the ongoing description. In an embodiment, each of the user equipment 104 may have a unique identifier attribute associated therewith. In an embodiment, the unique identifier attribute may be indicative of Mobile Station International Subscriber Directory Number (MSISDFN), International Mobile Equipment Identity (IMEI) number,International Mobile Subscriber Identity (IMSI), Subscriber Permanent Identifier (SUPI) and the like.

[0075] In an embodiment, the user equipment 104 may include smart devices operating in a smart environment, for example, an Internet of Things (loT) system. In such an embodiment, the user equipment 104 may include, but is not limited to, smartphones, smart watches, smart sensors (e.g., mechanical, thermal, electrical, magnetic, etc.), networked appliances, networked peripheral devices, networked lighting system, communication devices, networked vehicle accessories, networked vehicular devices, smart accessories, tablets, smart television (TV), computers, smart security system, smart home system, other devices for monitoring or interacting with or for the users 102 and / or entities, or any combination thereof. A person of ordinary skill in the art will appreciate that the user equipment 104 may include, but is not limited to, intelligent, multi-sensing, network-connected devices that can integrate seamlessly with each other and / or with a central server or a cloudcomputing system or any other device that is network connected.

[0076] In an embodiment, the user equipment 104 may include, but is not limited to, a handheld wireless communication device (e.g., a mobile phone, a smartphone, a phablet device, and so on), a wearable computer device (e.g., a head-mounted display computer device, a head-mounted camera device, a wristwatch computer device, and so on), a Global Positioning System (GPS) device, a laptop computer, a tablet computer, or another type of portable computer, a media playing device, a portable gaming system, and / or any other type of computer device with wireless communication capabilities, and the like. In an embodiment, the user equipment 104 may include but is not limited to, any electrical, electronic, electro-mechanical, or an equipment, or a combination of one or more of the above devices such as virtual reality (VR) devices, augmented reality (AR) devices, laptop, a general -purpose computer, desktop, personal digital assistant, tablet computer, mainframe computer, or any other computing device, wherein the user equipment 104 may include one or more in-built or externally coupled accessories including, but not limited to, a visual aid device such as a camera, an audio aid, a microphone, akeyboard, and input devices for receiving input from the user 102 or the entity such as touchpad, touch-enabled screen, electronic pen, and the like. A person of ordinary skill in the art will appreciate that the user equipment 104 may not be restricted to the mentioned devices and various other devices may be used.

[0077] Referring to FIG. 1, the user equipment 104 may communicate with the MRU 108 via the network 106. The UE 104 may be communicatively coupled with the network 106. The communicative coupling includes receiving, from the UE 104, a connection request by the network 106, sending an acknowledgment of the connection request to the UE 104, and transmitting a plurality of signals in response to the connection request. In an embodiment, the network 106 may include at least one of a Fourth Generation (4G) network, a Fifth Generation (5G) network, a Sixth Generation (6G) network, or the like. The network 106 may enable the user equipment 104 to communicate with other devices in the network architecture 100 and / or with the MRU 108. The network 106 may include a wireless card or another transceiver connection to facilitate this communication. In another embodiment, the network 106 may be implemented as or include any of a variety of different communication technologies such as a wide area network (WAN), a local area network (LAN), a wireless network, a mobile network, a Virtual Private Network (VPN), the Internet, the Public Switched Telephone Network (PSTN), or the like.

[0078] In an embodiment, the MRU 108 may be configured to receive baseband information from a fronthaul interface by a baseband section. The baseband section includes a digital front-end configured to perform at least one of a Crest Factor Reduction (CFR) and a Digital Predistortion (DPD). The MRU 108 may receive the baseband information from at least one of a Distributed Unit (DU) and a combined Central and Distributed Unit (CU / DU). Further, the MRU 108 may be configured to generate a plurality of digital transmit signals for a plurality of Radio Frequency (RF) chains by a digital front-end. The plurality of RF chains includes at least 32 transmit chains and at least 32 receive chains. In an embodiment, the digital front-end is configured to perform the DPD, upon receiving one or more feedback signals derived from the high-power amplifiers using the plurality ofobservation chains. The MRU 108 may couple the high-power amplifiers to at least one RF transceiver by a plurality of observation chains. Further, the digital frontend is configured to generate one or more predistortion coefficients based on the one or more feedback signals. The digital front-end is configured to apply the one or more predistortion coefficients to the plurality of digital transmit signals prior to conversion by the at least two RF transceivers. In some embodiments, the digital front-end is configured to perform the CFR, upon detecting one or more peaks in at least one of the plurality of digital transmit signals. The digital front-end is further configured to limit the one or more peaks to satisfy a peak-to-average power ratio threshold prior to conversion by the at least two RF transceivers.

[0079] In an embodiment, the MRU 108 may be configured to convert the plurality of digital transmit signals into a plurality of RF transmit signals by at least two RF transceivers. Further, the MRU 108 may be configured to process the plurality of RF transmit signals to produce amplified RF signals by an RF front-end section. The RF front-end section includes a plurality of RF chains including a high-power amplifier, a driver amplifier, and a low-noise amplifier (LNA). The MRU 108 may be configured to filter the amplified RF signals by a cavity filter. The cavity filter is coupled to each of the plurality of RF chains. Further, the MRU 108 may be configured to synchronize operation of the baseband section and the RF front-end section. The clock section is configured to distribute a synchronized reference clock to the at least two RF transceivers based on a Precision Time Protocol (PTP) timing recovered from a 25G optical interface, to maintain phase coherence across the plurality of RF chains. Further, the MRU 108 may be configured to dissipate heat generated in the MRU by a thermal management unit. The thermal management unit includes an embedded copper coin disposed beneath the high-power amplifiers. The embedded copper coin includes a T-shaped copper coin configured to increase a contact area with a printed circuit board and a heat sink. Further, the embedded copper coin includes a mechanically drilled portion to enhance thermal coupling between the printed circuit board and the heat sink.

[0080] Although FIG. 1 shows exemplary components of the network architecture 100, in other embodiments, the network architecture 100 may include fewer components, different components, differently arranged components, or additional functional components than depicted in FIG. 1. Additionally, or alternatively, one or more components of the network architecture 100 may perform functions described as being performed by one or more other components of the network architecture 100.

[0081] FIG. 2A illustrates an exemplary structural architecture 200A of the MRU 108 for wireless communication in the network 106, in accordance with embodiments of the present disclosure. FIG. 2A is explained in conjunction with the FIG. 1.

[0082] The MRU 108 is a key component in modern wireless communication networks, particularly in the context of 5G and 4G long term evolution (LTE) systems. The MRU 108 is responsible for transmitting and receiving radio signals to and from the UE 104 and connecting to other network parts, such as a Centralized Unit (CU).

[0083] In an embodiment, the system architecture 200A may include a baseband transceiver Application-Specific Integrated Circuit (ASIC) 202, an Radio Frequency (RF) front-end section 204, a power supply section 206, a thermal management unit 208-1 / 208-2 (cumulatively referred as thermal management unit 208), a memory section 210-1 / 210-2 (cumulatively referred as the memory section 210), a clock section 212, and the RF transceiver ASIC 214-1 / 214-2 (commutatively referred as the RF transceiver ASIC 214). In an embodiment, the front-end section 204 may include a plurality of RF chains. Each RF chain includes a high-power amplifier, a driver amplifier, and a low-noise amplifier (LNA), and each of the plurality of RF chains is coupled to a cavity filter as explained in detail FIG. 3. The plurality of RF chains includes at least 32 transmit chains and at least 32 receive chains.

[0084] In an embodiment, the baseband transceiver ASIC section 202 may be connected to a Cage SFP28 25G connector via a high speed data interface. The "Cage SFP28 25G connector" may refer to the physical housing or "cage" on a network device where a "SFP28" transceiver module, designed to support 25 Gigabit Ethernet (25G) data speeds. Further, the baseband transceiver ASIC section 202 is connected to a Joint Test Action Group (JTAG) connector and a JTAG debug emulator. The JTAG connector is a physical port on a circuit board that allows a JTAG debug emulator to connect and interact with the internal circuitry of a device, enabling debugging of software and hardware by providing access to the chip's internal state through a standardized communication protocol called JTAG. Further, the JTAG debug emulator is a dedicated hardware device that plugs into the JTAG connector and acts as the interface between a computer and the target device, allowing developers to control and monitor the chip's operation during debugging sessions.

[0085] In an embodiment, the baseband transceiver ASIC section 202 may be connected to a Universal Serial Bus (USB) type A port to receive data from the external devices. The baseband transceiver ASIC section 202 may be connected to a debug tool via a high speed data interface. Further, the baseband transceiver ASIC section 202 may be connected to an On-Off Keying (OOK) modem transceiver, surge protection element, and Antenna Interface Standards Group (AISG) 2.0. The OOK modem transceiver is a communication device that uses OOK modulation to transmit and receive data, essentially sending a signal by turning a carrier wave on to represent a " 1 " and off to represent a "0", making it a simple and effective method for short-range wireless data transmission. Further, the surge protection element is used to protect the baseband transceiver ASIC 202 from sudden electrical surges. The AISG 2.0 defines a data interface allowing for remote control of antenna line devices like remote electrical tilt (RET) antennas, boosters, and VSWR measuring units used in mobile radio infrastructure, essentially enabling the monitoring and adjustment of antenna parameters from a central location.

[0086] In an embodiment, the power supply section 206 is configured to provide power to all components of the MRU 108. The power supply section 206 is configured to convert a high-voltage direct current (DC) input power into the appropriate voltage levels required for operation of each of the baseband transceiver ASIC section 202, the RF transceiver ASIC 214, the clock section 212, the thermal management unit 208, and a power amplifier 216.

[0087] In an embodiment, the power supply section 206 may be configured to receive a high-voltage DC input power (for example typical - 48 V to -50 V) via a connector interface that is coupled to an external power source. The external power source may include but is not limited to rectifiers or telecom battery systems, which are commonly used in telecommunications and network equipment. Upon receiving the input power, the power supply section 206 directs the received voltage to an internal power regulation circuit.

[0088] The internal power regulation circuit is designed to perform step-down voltage conversion, utilizing suitable regulation techniques such as buck conversion or other suitable methods to efficiently reduce the voltage to predetermined, stable, and precise output voltage levels. This ensures that the voltage supplied to various internal components is both reliable and accurate, minimizing the risk of power-related malfunctions or inefficiencies.

[0089] The power supply section 206 is further configured to provide specific regulated voltage outputs for different sections of the device. In an example, the power supply section 206 generates 48 V DC, which is supplied to support the operation of the RF amplifiers within the RF front-end section 204. The 48 V output is ideal for the high-power requirements of RF amplification in wireless communication systems. Additionally, the power supply section 206 may generate 12 V DC for powering other critical components, including the baseband transceiver section 202, RF transceiver ASIC section 214, memory units, and various auxiliary control circuits. These components require lower voltage levels to ensure proper operation without compromising their performance or functionality.In an example, the power supply section 206 generates 48 V DC output that is utilized to provide the necessary power to RF amplifiers within the RF front-end section 204 of a telecommunications system, such as a 5G base station. RF amplifiers, which are crucial for boosting the power of the radio frequency signals before transmission, require high-voltage DC input to achieve the power output needed for efficient long-range communication.

[0090] In an embodiment, the voltage regulation process may employ highly efficient switching regulators and DC-DC converters to minimize heat generation while maintaining operational reliability. These circuits are supported by capacitive filtering systems that remove voltage ripples and noise, ensuring clean and stable power output. Additionally, the power supply section 206 incorporates overvoltage and overcurrent protection circuits to safeguard downstream components from power surges or electrical faults.

[0091] In an embodiment, the power supply section 206 may distribute regulated power to various subsystems through one or more dedicated power rails in 26-layer printed circuit board (PCB) of the MRU 108. The multi-layer PCB design is employed to provide high-density power distribution while ensuring minimal interference between different electrical circuits. The integration of power rails within the PCB is essential for efficiently managing the power requirements of the diverse components within the Radio Unit. In an example, one of the dedicated power rails is a 48 V DC rail, which is routed to power the high-power Doherty Gallium Nitride (GaN) amplifiers in the RF front-end section. The dedicated 48 V DC power rail facilitates efficient signal amplification by providing the necessary high-voltage power to the RF amplifiers, enabling them to boost the radio frequency signals with high efficiency. The use of GaN amplifiers is particularly beneficial due to their ability to handle higher power levels and operate at higher frequencies, which is critical for meeting the stringent performance requirements of modem 5G networks.

[0092] In an embodiment, the PCB includes the unique design techniques to route RF signals and high-speed signals running on high speed 25GT / s on adjacent layers and meet design specifications. Further, the PCB has a design approach to measure the temperature of different section in board with the help of temperature sensors, which provides the complete board thermal profile and enables software with the capability to take decision in case of thermal failure. Transceiver monitors PA output by measuring the received power on its feedback while utilizing the feedback chain in system. This measurement power is utilized in the software to monitor total transmit power in close loop.

[0093] In an embodiment, the board includes Antenna Interface Standards Group (AISG) 2.0 interface for controlling and monitoring antenna electrical tilt in a mobile communication network. The AISG 2.0 is employed to make dynamic adjustment of the antenna’ s tilt in response to network demands. Thus, facilitate the remote monitoring of antenna performance, providing valuable data for network optimization and maintenance.

[0094] In a further example, another dedicated power rail may be a 12 V DC rail, which powers critical components in the baseband transceiver ASIC section 202 and the RF transceiver ASIC sections 214. The 12 V DC is converted to various lower voltages based on requirements from different devices on board. Power management integrated chipset (PMIC), DC-DC converters and LDO regulators devices are used to generate these voltages. These generated lower voltages rail supplies power to components such as the Application-Specific Integrated Circuit (ASIC) or Field-Programmable Gate Array (FPGA), memory units, and control logic circuits. These components are essential for processing baseband signals, managing data, and controlling the overall operation of the Radio Unit. The 12 V DC rail ensures that these lower-power components receive a stable and regulated supply, supporting the efficient operation of the MRU 108.

[0095] In an embodiment, the power supply section 206 may include one or more real-time monitoring circuits to track voltage levels, current consumption, andcomponent temperatures. These monitoring features allow the system to detect power anomalies, such as voltage fluctuations or overheating, and initiate protective actions as necessary. The integration of monitoring capabilities ensures uninterrupted and reliable operation of the MRU 108.

[0096] In an embodiment, the power supply section 206 works seamlessly with the thermal management unit 208 to manage the heat dissipation. As the power supply section 206 converts high-voltage input to regulated DC output, significant heat may be generated due to power loss in the conversion circuitry. To ensure that the MRU 108 remains within operational temperature limits and to prevent thermal degradation of components, an integrated heat management system may be employed. Excess heat generated during RF signal power conversion due to Power Added Efficiency (PAE) of Power Amplifier is transferred to an embedded T coin 502, as referenced in FIG. 5, located within the PCB. The embedded T coin is a copper-based thermal management feature specifically designed to conduct thermal energy away from heat-generating components in the RF Front End transmit section. Copper's high thermal conductivity allows for efficient heat transfer, ensuring that heat is quickly removed from critical components, thereby reducing the risk of overheating. Excess heat generated during RF signal power conversion due to Power Added Efficiency (PAE) of Power Amplifier may be transferred to an embedded T coin (502 at FIG. 5) in the PCB, which efficiently conducts thermal energy to a heat sink with vertical fins. This design ensures optimal thermal stability, even under high load conditions.

[0097] In an embodiment, the power supply section 206 enables a seamless flow of energy within the MRU 108. The power supply section 206 is configured to receive the typical - 48 V to -50 V DC input, which is converted into regulated output 12 V DC and 48 V DC. The output is then distributed to the respective components, ensuring synchronized operation across all sections. The inclusion of robust filtering, protection, and monitoring mechanisms guarantees stable and efficient power delivery for the MRU 108.

[0098] In an embodiment, the baseband transceiver ASIC section 202 may be configured for signal processing and control functions. The baseband transceiver ASIC section 202 is pivotal in handling high-speed digital data streams, converting them into signals ready for RF transmission.

[0099] In an embodiment, the baseband transceiver 202 may be configured for receiving high-speed digital data streams (digital data) through an optical fronthaul interface from a Distributed Unit (DU) or a Centralized Unit (CU) within the network 106. The DU is responsible for handling lower-layer functionalities in the Radio Access Network (RAN). The DU is typically deployed closer to the radio hardware (e.g., antennas, radio heads) and is designed to process real-time tasks that require low latency. The DU handles tasks related to the physical layer (Layer 1) and macroscopic control of the UE 104. In an example, the optical fronthaul interface is a 25G optical fronthaul interface. The CU is a network element that handles higher-layer functions within the RAN. The CU is responsible for processing tasks related to the control plane (signalling, management) and non-real-time user plane data. Unlike the DU, which is focused on low-latency tasks, the CU is optimized for computationally intensive operations that do not require immediate real-time processing. The 25G optical fronthaul interface ensures the seamless transfer of digital data streams required for processing and transmission, thereby enabling the efficient operation of the MRU 108. The 25G optical fronthaul interface establish a robust connection between the MRU 108 and the CU-DU, enabling seamless communication and synchronization. The 25G optical fronthaul interface is designed to adhere to an Open Radio Access Network (0-RAN) standards, ensuring interoperability within the network 106.

[0100] In an embodiment, the digital data received via the fronthaul interface is directed to an integrated circuit. In an example, the integrated circuit is an Application-Specific Integrated Circuit (ASIC) / Field-Programmable Gate Array (FPGA) with RF transceiver, the central processing unit of the baseband transceiver ASIC section 202. In an example, the ASIC / FPGA integrated with the RF transceiver may be configured to process the received digital data to generate theprocessed data. The ASIC / FPGA integrated with the RF transceiver serves as the core processing unit responsible for performing key tasks such as signal modulation, demodulation, coding, and decoding of the data. The use of ASIC or FPGA allows for high-speed, parallel processing of complex baseband functions, which are critical for ensuring efficient signal processing and maintaining network performance under varying loads. Advanced digital signal processing (DSP) functions are performed to prepare the data for RF transmission. In an example, the key functions may include:• Digital Up-Conversion (DUC): Converts baseband digital signals into a higher intermediate frequency range, aligning them with the target RF transmission frequency.• Crest Factor Reduction (CFR): Optimizes the power efficiency of the signals by reducing signal peaks, ensuring effective use of the power amplifiers in the RF front-end section.• Digital Pre-Distortion (DPD): Pre-compensates for distortions introduced by non-linearities in the RF amplification process, ensuring the transmitted signal maintains high fidelity and compliance with emission standards.

[0101] In an embodiment, after the signal processing, the processed digital signals may be routed to one or more Transmitter Digital -to- Analog Converters (Tx DACs). The Tx DACs is configured for transforming the processed digital signals into the analog RF signals. This conversion is essential for enabling subsequent RF amplification and transmission through the RF front-end section. These analog RF signals are then passed to the RF front-end section where they are amplified by the RF amplifiers, such as Doherty amplifiers, before being radiated through the antennas.

[0102] In an embodiment, the baseband transceiver ASIC section 202 also includes auxiliary control functions to manage synchronization across the MRU 108. A clock generator and a system synchronizer ensure that all signal processing tasksare precisely timed, facilitating smooth and coordinated operation with the digital RF transceiver ASIC section 214. The clock generator is configured for producing accurate and stable timing signals that serve as the reference for all time-dependent operations within the baseband transceiver ASIC section 202. These timing signals are crucial for coordinating the activities of the digital signal processing blocks, including modulation, demodulation, coding, and decoding. The clock generator ensures that these operations occur in sync with the RF transceiver ASIC section 214, which is handling the analog RF signals. The system synchronizer is configured to operate in conjunction with the clock generator to maintain precise synchronization across the entire system, including both the baseband and RF processing units. The synchronizer ensures that the timing of signal processing tasks across the different subsystems, such as the baseband, RF front-end, and auxiliary control circuits is coordinated to prevent misalignment or timing errors. By integrating these auxiliary control functions within the baseband transceiver ASIC section 202, the design facilitates seamless operation and ensures the reliability and accuracy of the RF transceiver ASIC section 214, ultimately enhancing the overall performance of the MRU 108.

[0103] In an embodiment, the baseband transceiver ASIC section 202 seamlessly integrates with the RF transceiver ASIC section 214 of the MRU 108, ensuring the efficient flow of data from the fronthaul interface to the RF transceiver ASIC section 204. The combination of high-speed fronthaul connectivity, advanced Digital Signal Processor (DSP) functions, and precise synchronization enables the MRU 108 to deliver high-performance signal processing capabilities for 5G NR deployments. In an embodiment, the Baseband transceiver ASIC 202 may be in communication with the fronthaul interface via a cage SFP 2825G connector.

[0104] In an embodiment, the MRU 108 is configured to include the clock section 212, which serves the essential purpose of ensuring precise synchronization across all operational components within the MRU 108. The clock section 212 is critical for maintaining the timing accuracy required for seamless communication andprocessing across the baseband transceiver ASIC section 202 and the RF transceiver ASIC section 214.

[0105] In an embodiment, the clock section 212 includes the clock generator and the system synchronizer, which collectively produce and distribute timing signals throughout the MRU 108. The clock generator is designed to generate stable and accurate reference clock signals, which are the foundation for timing synchronization. The reference clock signals are used to align all data processing and transmission tasks to a common temporal framework.

[0106] In an embodiment, the system synchronizer operates in conjunction with the clock generator to ensure the coordination of processing tasks between the baseband transceiver ASIC section 202 and the RF transceiver ASIC section 214. The synchronization ensures that data processed in the baseband transceiver ASIC section 202 is transmitted at precisely the right moment to the RF transceiver section 214 for amplification and eventual transmission.

[0107] In an embodiment, the clock section 212 supports synchronization protocols and standards compliant with the network 106, ensuring compatibility and interoperability within the broader network infrastructure. The clock section 212 plays a vital role in maintaining the stability and reliability of the operation of the MRU 108, especially in scenarios involving high-speed data transfers and complex signal processing tasks.

[0108] In an embodiment, the clock section 212 is designed with redundancy and fault-tolerance measures to safeguard against timing disruptions, ensuring continuous synchronization and prevents any degradation in performance due to clock-related errors or failures.

[0109] In an embodiment, the RF front-end section 204 is configured for amplifying and preparing RF signals for transmission to integrated antennas. The RF front-end section 204 is responsible for ensuring that the RF signals areoptimized for high-quality transmission, adhering to the requirements of 5G NR networks.

[0110] In an embodiment, the RF front-end section 204 is configured to process the analog RF signals received from the RF transceiver ASIC section 214. The RF signals are routed through a plurality of band-pass filters (BPFs) to remove unwanted frequencies and ensure that only the desired signal spectrum is passed through. The filtered signals then pass through digital step attenuators, which enable precise adjustment of signal power levels. These attenuators provide fine control over the signal strength, ensuring optimal performance and compliance with regulatory power limits.[OHl] In an embodiment, the RF signal is then passed to a first stage of amplification which occurs in the pre-driver amplifier, where the signals are boosted to an intermediate level. This initial amplification step prepares the signals for further enhancement while maintaining signal integrity. In an embodiment, the output from the pre-driver amplifier is fed into the high-power Doherty gallium nitride (GaN) amplifiers, which perform the final-stage amplification. These amplifiers utilize gallium nitride (GaN) technology to achieve high efficiency and power output, enabling the RF signals to meet the necessary transmission power levels for 5G communication. The Doherty architecture is specifically designed to enhance efficiency, especially at peak power levels, making it ideal for the demanding requirements of 5G new radio (NR) systems.

[0112] In an embodiment, the final step in the RF signal preparation involves directing the signals through a 32-port cavity filter through blind mating, which acts as the interface between the RF front-end section 204 and the integrated antennas. The cavity filter ensures that the signals are properly conditioned for transmission and prevents interference by isolating the transmitted signals from unwanted noise or harmonics. The 32-port cavity filter ensures that the transmitted RF signals meet the necessary frequency characteristics for efficient transmission. The 32-port cavity filter performs precise filtering of the RF signals, ensuring that only thedesired frequency components are passed through to the antennas. By attenuating out-of-band signals and harmonics, the 32-port cavity filter ensures that the transmission is clean, minimizing signal degradation and improving overall transmission quality. The 32-port cavity filter is configured to isolate the transmitted signals from unwanted noise or harmonics. The 32-port cavity filter effectively attenuates any spurious signals or harmonic distortions that may arise from the RF transmission process, thereby preventing interference with neighbouring channels and ensuring that the transmission complies with regulatory requirements for spectral purity.

[0113] The 32-port cavity filter may include multiple resonating cavities, each tuned to specific frequencies, allowing for precise filtering characteristics. By utilizing multiple ports, the filter can support multiple frequency bands, enabling it to efficiently manage signals in complex network environments and deliver reliable, interference-free transmission.

[0114] In an embodiment, the 32-port cavity filter is configured to support blind mating with Integrated antenna , simplifying installation and ensuring reliable connectivity. This design enhances the overall robustness and usability of the MRU 108 in field deployments. Blind Mating refers to a mechanical connection design that allows the interface to automatically align and securely connect without requiring manual intervention or precise alignment by the installer. This feature ensures that the connectivity between the 32-port cavity filter and the integrated antennas is both secure and reliable, minimizing the potential for human error during setup. By eliminating the need for precise alignment or external tools, the blind mating design enhances the ease of installation and maintenance, particularly in large-scale or remote deployments where efficiency is critical. In an embodiment, the 32-port cavity filter offers flexibility with an option to integrate with 12 x 8 MIMO antenna consisting of 192 single antenna elements. These provides adaptability for different network requirements enhancing the required coverage options in compact form and ensuring easy deployment.

[0115] In an embodiment, the memory section 210 provides essential storage capabilities to support the operation of the MRU 108. The memory section 210 plays a pivotal role in maintaining system functionality by storing firmware, operational data, and configuration settings required by various components of the MRU 108, particularly the baseband transceiver ASIC section 202 and the RF transceiver ASIC 214.

[0116] In an embodiment, the memory section 210 includes multiple types of memory devices, each tailored to meet specific storage requirements essential for the efficient operation of the MRU 108. The memory devices work in tandem to ensure smooth functionality, data retention, and adaptability of the MRU 108.

[0117] In an embodiment, a Double Data Rate 4 (DDR4) Memory is a high-speed dynamic memory designed to support real-time processing in the baseband and RF transceiver ASIC. The memory section 210 enables the seamless execution of advanced digital signal processing functions, including digital up-conversion (DUC) for frequency adjustment, digital pre-distortion (DPD) for signal correction, and crest factor reduction (CFR) for optimizing power efficiency. By providing rapid access and processing capabilities, the DDR4 memory ensures the high-speed operations required in modern communication systems.

[0118] In an embodiment, the Embedded Multimedia Card (eMMC) serves as a reliable non-volatile storage medium for system firmware and critical operational data. The memory section 210 ensures the MRU 108 can boot up correctly, maintain stable operation during runtime, and securely store essential software components. The eMMC robust design makes it well-suited for handling frequent read / write operations without compromising data integrity.

[0119] In an embodiment, the flash memory is employed for long-term storage of configuration files, software updates, and other critical data. The flash memory provides a reliable medium for storing information that may need to be accessed or modified periodically. The flash memory plays a crucial role in enabling over-the-air (OTA) updates, ensuring that the MRU 108 remains adaptable and future-ready as new features and enhancements are rolled out.

[0120] In an embodiment, the EEPROM (Electrically Erasable Programmable Read-Only Memory) is used to store persistent settings, such as calibration parameters, system identifiers, and other critical data that must remain intact across power cycles. By retaining data even when the MRU 108 is powered off, the EEPROM ensures consistency in operational configurations and facilitates smooth transitions during system restarts.

[0121] The memory devices collectively empower the memory section 210 to handle diverse storage demands efficiently, ensuring the reliable and robust operation of the MRU 108 in dynamic communication environments.

[0122] In an embodiment, the memory devices collectively ensure that the MRU 108 operates efficiently, with the ability to store and retrieve large volumes of data necessary for advanced 5G NR functionalities. The memory section 210 also supports the adaptability of the MRU 108 by enabling OTA updates and configuration changes, making the MRU 108 versatile and future-ready.

[0123] In an aspect, an optimized PCB design is achieved by placing the high-power Doherty GaN power amplifier module (PAM) in a compact form factor to deliver 10 W per chain, resulting in an overall output power of 320 W in a multilayer substrate. The MRU 108 has good power added efficiency of better than 43%, thus improving the efficiency of the overall system.

[0124] In an aspect, advanced PCB embedded copper coin technology may be utilized in the MRU 108 to achieve a thermally efficient design. In an aspect, advanced PCB design techniques may be employed in the MRU 108 to integrate a high DC power system, complex high-speed interfaces running up to 25G, and a high-power RF Front End design into a single board with 26 or more layers.

[0125] In an aspect, the heat pipe-based mechanical housing of the MRU 108 offers significant advantages, including weight reduction, improved thermalefficiency, high performance, and low power consumption, making it a reliable and efficient choice for high-power applications. The 320W MRU 108 incorporates highly efficient heat pipes with superior thermal conductivity to effectively distribute localized heat of ASIC and across the heat sink. The innovative design of the mechanical heat sink featuring vertical fins enhances heat dissipation capabilities. By integrating heat pipes into the finned heat sink, the overall MRU 108 size and weight are reduced, resulting in a compact and lightweight solution. This compact design not only saves space but also ensures optimal power efficiency. Thus, the heat pipe based mechanical housing offers weight reduction, improved thermal efficiency, high performance and low power consumption making it a reliable and efficient choice.

[0126] In an aspect, the MRU 108 incorporates user specific adaptive beamforming techniques to adjust the radio unit's beam pattern to target specific user locations or cell sectors based on real-time traffic patterns, interference, or environmental factors.

[0127] In an aspect, the MRU 108 is designed to be mechanically compatible with 128 single antenna elements in 8 X 8 configuration and 192 single antenna elements in 12 X 8 configuration which supports easy installation and seamless integration.

[0128] In an aspect, the blind mated and cable less design with Integrated 32 port cavity filter and Antenna Unit.

[0129] In an aspect, the MRU 108 includes low PHY section of the LI layer with network layer split of 7.2X, ORAN compliant fronthaul on 25G optical interface and Digital Front End support using two commercial grade ASICs / FPGAs and 32 RF Transceiver chains.

[0130] In an aspect, the MRU 108 improves the receiver sensitivity and cost by utilizing the receiver front end having sub IdB noise figure (NF).

[0131] In an aspect, the MRU 108 synchronization architecture is based on IEEE 1588v2 PTP on 25G optical interface using system synchronizer IC and clock generators.

[0132] In an aspect, the MRU 108 implements RET interface based on AISG 2.0 standard for remote electrical tilt, enabling dynamic adjustments and efficient management of antenna configurations, optimizing network performance.

[0133] In an aspect, the cost of the MRU 108 is optimized RF front end section 204 by implementing fixed attenuation using passive components in feedback path.

[0134] In an aspect, the MRU 108 is power efficient with overall power consumption of around 1068W which will significantly improve the OPEX.

[0135] FIG. 2B illustrates another exemplary structural architecture 200B of the MRU 108 for wireless communication, in accordance with embodiments of the present disclosure. FIG. 2A is explained in conjunction with the FIG. 1 and 2A.

[0136] In an embodiment, the MRU 108 include the baseband section 218, the Radio Frequency (RF) front-end section 204, and the Antenna filter unit 220 which are interconnected to ensure seamless communication and signal processing between the fronthaul interface and integrated antennas. FIG. 2A highlights the data flow and key components involved in the operation of the MRU 108.

[0137] In an embodiment, the baseband section 218 includes the baseband transceiver ASIC 202 and two RF transceiver ASIC 214-1 / 214-2 (cumulatively referred as the RF transceiver ASIC 214) that performs digital signal processing and acts as the core of the system. The baseband section 218 connects to the Open Radio Access Network (ORAN) interface, which serves as the communication link towards the Centralized Unit-Distributed Unit (CU-DU). The CU manages higher-layer protocols, including network control and user-plane data routing, while the DU handles real-time processing tasks, such as scheduling and physical layer operations, ensuring efficient and low -latency communication in the network 106. The ORAN interface is a standardized, open communication pathway betweendifferent components of a mobile network's Radio Access Network (RAN), allowing equipment from various vendors to interoperate seamlessly. The baseband section 218 may perform Digital Up-Conversion (DUC), Crest Factor Reduction (CFR), Digital Pre-Distortion (DPD), and Digital Down-Conversion (DDC). Additionally, each of the RF transceiver ASIC 214 includes 16 chains of Tx DACs, 16 chains of Rx ADCs, and 16 Feedback ADCs, which facilitate the conversion of digital signals to the analog signals and vice versa for seamless RF signal transmission and reception.

[0138] In an embodiment, the RF front-end section 204 may include one or more RF Chains (RF Chain- 1 to RF Chain-32) that process RF signals for transmission to and reception from the external antennas. Each RF chain includes essential components such as Band-Pass Filters (BPFs), Gain Blocks, Digital Step Attenuators, Pre-Driver Amplifiers, , and High-Power Doherty Amplifiers. These components work together to amplify, filter, and adjust signal power levels. The amplified signals are then routed through the 32-port cavity filter, which provides further signal filtering and interfaces with integrated antennas for transmission, ensuring the delivery of high-quality RF signals with minimal distortion and noise.

[0139] In an embodiment, the baseband transceiver ASIC 202 and the RF transceiver ASIC 214 in the baseband section 218 interfaces with the RF chains in the RF front-end section 204 through dedicated connections for each chain. The dedicated connections for each chain facilitate the flow of analog RF signals, ensuring efficient coordination between digital and RF signal processing tasks. The interaction is critical for maintaining synchronization and precision across all operations, enabling the MRU 108 to meet stringent performance requirements.

[0140] In an embodiment, the functional flow begins with the baseband section 218 receiving digital data via the ORAN interface. The data is processed and converted to analog RF signals, which are sent to the RF front-end section 204. The signals are amplified, filtered, and adjusted before being transmitted to the antennasthrough the Antenna Filter Unit (AFU) 220. Similarly, the RF signals received from the AFU 220 are routed back to the baseband section 218 for further processing.

[0141] Referring now to FIG. 3, an exemplary block diagram 300 of a Radio Frequency (RF) front-end section 204 of the MRU 108 for communication, showcasing the components and flow of signals across the Transmission Chain (Tx) 302 and a feedback / Reception Chain (Rx) 306 within the MIMO Radio Unit (MRU) 108 is disclosed, in accordance with embodiments of the present disclosure. FIG. 3 is explained in conjunction with the FIGs. 1, 2A and 2B.

[0142] FIG. 3 illustrates the seamless operation of signal processing in each chain, ensuring efficient and high-quality wireless communication. In an embodiment, the 32T32R RF front end section 204 consists of 32 transmit chains for signal transmission, 32 receive chains for signal reception and 32 observation chains which act as DPD feedback paths from PAs to RF transceiver ASIC for linearization. The RF front-end section 204 receives the control signals from ASIC.

[0143] In an embodiment, the transmission path begins with a signal entering a filter 304. The filter 304 eliminates unwanted frequency components, ensuring that only the desired frequency range is passed through for further processing that is crucial for maintaining signal integrity and avoiding interference with other signals.

[0144] In an embodiment, after filtering, the signal enters the gain block 306, where it is amplified to ensure sufficient power for further processing, ensuring that the signal strength is adequate for subsequent stages without introducing significant noise.

[0145] In an embodiment, the amplified signal then passes through the Digital Step Attenuator (DSA) 308, which provides precise attenuation control and allows the RF front-end section 204 to dynamically adjust the signal power level as needed, ensuring optimal performance under varying conditions. In an embodiment, the attenuated signal is fed into a pre-driver amplifier 310, which further amplifies thesignal to prepare it for the next stage to provide sufficient power for a Power Amplifier (PA) 312.

[0146] In an embodiment, the PA 312 provides a significant boost to the signal power, making the signal suitable for transmission. From here, the signal passes through a coupler 314, which is a passive component, typically a directional coupler, used to sample a small portion of the transmitted RF power to monitor signal strength and adjust the power output of the transmitter based on the reflected signal from the antenna.

[0147] In an embodiment, the signal is then transmitted to a circulator 316. The circulator 316 isolates the transmit and receive paths, preventing interference between the transmit and receive paths. Before reaching the antenna, the signal passes through a cavity filter 318, ensuring only the desired frequency components are transmitted via a RF Port 0320.

[0148] In some embodiments, the circulator 316 may also transmit the signal to a switch with LNA 328. The switch (SPDT) controls the flow of signals into the receive chain and the Low-Noise Amplifier (LNA) boosts the signal strength while minimizing added noise, ensuring that weak incoming signals may be processed effectively.

[0149] In an embodiment, the amplified signal from the switch with LNA 328 is passed through a filter 330, which removes unwanted frequencies and ensures only the desired signal components are processed further. The filtered signal then enters another Digital Step Attenuator (D SA) 332 for precise attenuation control, allowing the system 100 to optimize the signal level.

[0150] In an embodiment, the signal is passed through a gain block 334, providing the final stage of amplification in the reception path and preparing the signal for downstream processing, such as digital conversion or decoding.

[0151] In some embodiments, the coupler 314 may transmit the signal to attenuation 322 using fixed attenuation components, which help bring the signalwithin a measurable range without introducing noise, ensuring that the MRU 108 may accurately assess the performance of the transmitted signal.

[0152] In an embodiment, the feedback signal may be passed through a filter 324, which removes any unwanted frequency components, ensuring accurate signal measurement and analysis.

[0153] In an embodiment, the signal from the gain block 334 and the signal from the filter 324 are received at a switch (SPDT) 326. The switch (SPDT) 326 switches between feedback and receive chain and then the signal is finally received to the feedback / Reception chain (Rx) 336 within the MRU 108.

[0154] FIG. 4 illustrates an exemplary block diagram 400 of the clock section 212 of the MRU 108, in accordance with embodiments of the present disclosure. FIG.4 is explained in conjunction with the FIGs. 1, 2A, 2B and 3.

[0155] FIG. 4 provides the block diagram 400 highlighting the interaction between a system synchroniser 402, a Phase-Locked Loops PLLs and a clock generator 404, and the baseband transceiver Application-Specific Integrated Circuit (ASIC) 202 and the Radio Frequency (RF) transceiver ASIC 214. FIG. 4 complements FIG. 2A by showing how timing and synchronization are achieved across various components of the clock section 212 to ensure efficient and coherent signal processing.

[0156] In an embodiment, the system synchroniser 402 is the primary component responsible for maintaining the timing and synchronization of the entire RF system. The system synchroniser 402 provides a reference signal to the PLLs and the clock generator 404, ensuring that all subsystems operate in a coordinated manner. The system synchroniser 402 ensures that the timing of the transmission, reception, and feedback paths described in FIG. 2A remains accurate, reducing errors caused by timing mismatches. The system synchroniser 402 is also responsible for feeding timing signals directly to the baseband transceiver ASIC 202, establishing a direct synchronization channel for the RF front end section 204.

[0157] In an embodiment, the PLLs and the clock generator 404 are central to generating precise clock signals required for both the baseband section 202 and the RF front end section 204. The PLLs receive a reference signal from the system synchroniser 402, locking the output clock signals to the reference and ensuring stability and accuracy. The clock generator then distributes the clock signals to various subsystems, including the baseband transceiver ASIC 202 and RF transceiver ASIC 214, to support operations like modulation, demodulation, and carrier frequency generation. By providing synchronized clock signals, the PLLs and the clock generator 404 ensures that the RF Chain (as shown in FIG. 2B) functions seamlessly with minimal jitter and phase noise.

[0158] In an embodiment, the baseband transceiver ASIC 202 and the RF transceiver ASIC 214 is the core processing unit that interfaces with the transmission, reception, and feedback paths described in FIG. 2A. The baseband section 202 and the RF transceiver ASIC 202 handles signal modulation, encoding, decoding, and demodulation while ensuring precise timing with the help of synchronization signals received directly from both the system synchroniser 402 and the PLLs and the clock generator 404. The dual synchronization paths (one direct from the synchroniser and another via the clock generator) ensure redundancy and robustness in timing, enabling reliable communication even in challenging operating conditions.

[0159] FIG. 5 illustrates an exemplary architecture 500 of the thermal management unit 208 for the MRU 108, in accordance with embodiments of the present disclosure. FIG. 5 is explained in conjunction with the FIGs. 1, 2A, 2B, 3 and 4.

[0160] In an example, the thermal management unit 208 includes the T-shaped embedded copper coin 502. In an embodiment, the power supply section 206 works seamlessly with the thermal management unit 208 to handle heat dissipation. Excess heat generated during RF signal power conversion due to Power Added Efficiency (PAE) of Power Amplifier is transferred to the T-shaped embedded copper coin 502 in the MRU 108, which efficiently conducts thermal energy to aheat sink with vertical fins. The design ensures optimal thermal stability, even under high load conditions. The T-shaped embedded copper coin 502 may be embedded layer 1 to layer 9 of the multilayer substrate 506. The multilayer substrate 506 may include at least 26 layers. Further, the mechanical drill 504 of the T-shaped embedded copper coin 502 may be embedded from layer 9 to layer 26 of the multilayer substrate 506, ensuring effective thermal conduction and heat dissipation.

[0161] In an embodiment, the 320W 32T32R MRU 108 incorporates highly efficient heat pipes with superior thermal conductivity to effectively distribute localized heat of ASIC, the RF transceiver ASIC 214 and power amplifier across the heat sink. The innovative design of the mechanical heat sink featuring vertical fins enhances heat dissipation capabilities. By integrating heat pipes into the finned heat sink, the MRU 108 size and weight are reduced, resulting in a compact and lightweight solution within 25kg. The compact design not only saves space but also ensures optimal power efficiency. Thus, the heat pipe based mechanical housing offers weight reduction, improved thermal efficiency, high performance and low power consumption making it a reliable and efficient choice.

[0162] In an embodiment, the RF Front end section 204 is designed to deliver 10W high output power per antenna port thermal efficiently with the use of embedded copper coin technology. The T-shaped copper coin 502 and mechanical drill 504 below copper coin provides ground connection for the GaN power Amplifier and removes thermal energy from the PCB to finned heat sink, eliminating the need for any depth or protrusion on the heat sink. Further, the multilayer substrate 506 is designed based on high power Doherty GAN based Power Amplification Module (PAM) is used as final stage amplifier which is designed in multilayer substrate 506.

[0163] In an embodiment, a MIMO Radio Unit (MRU) 108 for use in wireless communication systems is disclosed. The MRU 108 includes baseband section 218 including a baseband transceiver 202 and at least two Radio frequency (RF)transceiver 214. The MRU 108 may further include radio frequency (RF) front-end section 204 including a plurality of RF chains. Each RF chain includes high-power amplifier, pre-driver amplifier, and low-noise amplifier (LNA). The MRU 108 may further include power supply section 206 configured to provide power to RF frontend section 204 and baseband section 218. The MRU 108 may include thermal management unit 208 configured to dissipate heat generated by MRU 108. Further, the MRU 108 may include clock section 212 configured to synchronize the operation of RF front-end section 204 and baseband section 218.

[0164] In an embodiment, the present disclosure relates to a system of 5G NR 320W 32T32R Sub 6 GHz massive MIMO radio unit (MRU). The system employs high-power off-the-shelf GaN-based PAM modules in a compact form factor, delivering 10W per chain and a total output power of 320W in a multilayer substrate. The system incorporates an embedded T-shaped copper coin technology for a thermally efficient design. Further, the system employs an advanced PCB design technique that includes a high DC power system, complex high-speed interfaces up to 25G, and a high-power RF front end into a single board with 26 or more layers. The system offers a blind-mated, cable-less design with an integrated 32-port cavity filter and antenna unit. Further, the system includes a low PHY section of the LI layer with a network layer split of 7.2X, ORAN-compliant fronthaul on a 25G optical interface, and digital front end support using two commercial-grade ASICs / FPGAs and 32 RF transceiver chains.

[0165] FIG. 6 illustrates a flow diagram of a method 600 of operating the MRU 108 for wireless communication, in accordance with embodiments of the present disclosure. FIG. 6 is explained in conjunction with the FIGs. 1, 2A, 2B, 3, 4 and 5.

[0166] At step 602, baseband information is received from a fronthaul interface by a baseband section of the MRU. The baseband section includes a digital front-end configured to perform at least one of a Crest Factor Reduction (CFR) and a Digital Predistortion (DPD). The baseband information may be received from at least one of a Distributed Unit (DU) and a combined Central and Distributed Unit (CU / DU).In an exemplary embodiment, the DU generates downlink baseband streams for a sector serving a high-traffic area (e.g., a stadium). The DU forwards the downlink baseband streams to the MRU over the fronthaul. The MRU baseband section receives and prepares the input for digital front-end (DFE) conditioning and perchain transmission.

[0167] In an embodiment, to perform the DPD, the digital front-end may receive one or more feedback signals derived from the high-power amplifiers using the plurality of observation chains. Further, the digital front-end may generate one or more predistortion coefficients based on the one or more feedback signals. The digital front-end may apply the one or more predistortion coefficients to the plurality of digital transmit signals prior to conversion by the at least two RF transceivers. In an exemplary embodiment, a transmit chain’s GaN PA exhibits AM-AM and AM-PM distortion when driven near saturation for higher EIRP. A directional coupler (in the observation chain) samples a portion of the PA output, routes back to an RF transceiver receive / observation path, and the DFE compares the sampled output to the intended waveform. The DFE then updates predistortion coefficients so that, when applied to the next frames, the PA output becomes substantially more linear, reducing spectral regrowth and improving EVM.

[0168] In another embodiment, to perform the CFR, the digital front-end may detect one or more peaks in at least one of the plurality of digital transmit signals. Further, the digital front-end may limit the one or more peaks to satisfy a peak-to-average power ratio threshold prior to conversion by the at least two RF transceivers. In OFDM-based downlink transmission, certain symbol combinations create high instantaneous peaks. The DFE identifies samples exceeding the configured peak threshold (e.g., during a high-MCS burst). The DFE clips / reshapes the peaks (with controlled distortion) so that the waveform’s PAPR remains below the threshold, allowing the PA to operate more efficiently without frequent compression events.

[0169] At step 604, a plurality of digital transmit signals are generated for a plurality of Radio Frequency (RF) chains by a digital front-end of the MRU. The plurality of RF chains includes at least 32 transmit chains and at least 32 receive chains. In an exemplary embodiment, for an 8 / 8 antenna array realization, the DFE creates 32 digital downlink streams (one per transmit chain). If the scheduler targets a specific user cluster at the cell edge, the DFE applies beamforming weights so the combined radiated pattern concentrates energy toward that sector while limiting interference.

[0170] At step 606, the plurality of digital transmit signals are converted into a plurality of RF transmit signals by at least two RF transceivers. In an exemplary embodiment, the first RF transceiver converts a subset of the transmit streams (e.g., 16 chains) into analog RF, and a second RF transceiver converts the remaining streams. Each transceiver maintains coherent phase relationships across handled channels, enabling constructive combination across the antenna array.

[0171] At step 608, the plurality of RF transmit signals to produce amplified RF signals. The RF front-end section includes a plurality of RF chains including a high-power amplifier, a driver amplifier, and a low-noise amplifier (LNA). Further, the high-power amplifiers are coupled to at least one RF transceiver by a plurality of observation chains. In an exemplary embodiment, a transmit chain’s driver amplifier boosts the RF transceiver output to a level that may drive the final-stage PA. The PA (e.g., a high-power Doherty GaN-based module) amplifies the signal to the target per-port output power. The coupler then samples the PA output into the observation chain so the system may support closed-loop monitoring / linearization.

[0172] At step 610, the amplified RF signals are filtered. The cavity filter is coupled to each of the plurality of RF chains. After PA amplification, the signal may contain harmonics and spectral regrowth (especially under high load). The cavity filter provides steep roll-off outside the operating band, reducing out-of-band power before the signal is delivered to the antenna path.

[0173] In an embodiment, the method 600 may synchronize operation of the baseband section and the RF front-end section by a clock section. The clock section is configured to distribute a synchronized reference clock to the at least two RF transceivers based on a Precision Time Protocol (PTP) timing recovered from a 25G optical interface, to maintain phase coherence across the plurality of RF chains. In an exemplary embodiment, the MRU recovers PTP timing carried via the 25G fronthaul interface and disciplines on-board PLLs / clock generators. As a result, the RF transceivers operate with coherent timing / phase, which is critical for massive MIMO beamforming such as, ensuring that signals from 32 transmit chains add constructively in the intended direction rather than partially cancelling due to phase drift.

[0174] Further, the method 600 may dissipate heat generated in the MRU by a thermal management unit. The thermal management unit includes an embedded copper coin disposed beneath the high-power amplifiers. Further, the embedded copper coin includes a T-shaped copper coin configured to increase a contact area with a printed circuit board and a heat sink, and the embedded copper coin includes a mechanically drilled portion to enhance thermal coupling between the printed circuit board and the heat sink. In an exemplary embodiment, during sustained high-throughput operation (e.g., long duration high duty-cycle downlink), the PAs produce concentrated heat. The embedded copper coin under each PA spreads heat into the PCB and improves conduction into the heatsink. The T-shaped geometry increases the effective contact area, and the mechanically drilled portion enhances thermal coupling, reducing hotspot temperature rise and improving long-term reliability at high output power.

[0175] FIG. 7 illustrates an example computer system 700 in which or with which the embodiments of the present disclosure may be implemented. As shown in FIG.7, the computer system 700 may include an external storage device 710, a bus 720, a main memory 730, a read-only memory 740, a mass storage device 750, a communication port(s) 760, and a processor 770. A person skilled in the art will appreciate that the computer system 700 may include more than one processor andcommunication ports. The processor 770 may include various modules associated with embodiments of the present disclosure. The communication port(s) 760 may be any of an RS-232 port for use with a modem-based dialup connection, a 10 / 100 Ethernet port, a Gigabit or 10 Gigabit port using copper or fiber, a serial port, a parallel port, or other existing or future ports. The communication ports(s) 760 may be chosen depending on a network, such as a Local Area Network (LAN), Wide Area Network (WAN), or any network to which the computer system 700 connects.

[0176] In an embodiment, the main memory 730 may be Random Access Memory (RAM), or any other dynamic storage device commonly known in the art. The readonly memory 740 may be any static storage device(s) e.g., but not limited to, a Programmable Read Only Memory (PROM) chip for storing static information e.g., start-up or basic input / output system (BIOS) instructions for the processor 770. The mass storage device 750 may be any current or future mass storage solution, which can be used to store information and / or instructions. Exemplary mass storage solutions include, but are not limited to, Parallel Advanced Technology Attachment (PATA) or Serial Advanced Technology Attachment (SATA) hard disk drives or solid-state drives (internal or external, e.g., having Universal Serial Bus (USB) and / or Firewire interfaces).

[0177] In an embodiment, the bus 720 may communicatively couple the processor(s) 770 with the other memory, storage, and communication blocks. The bus 720 may be, e.g. a Peripheral Component Interconnect PCI) / PCI Extended (PCI-X) bus, Small Computer System Interface (SCSI), Universal Serial Bus (USB), or the like, for connecting expansion cards, drives, and other subsystems as well as other buses, such a front side bus (FSB), which connects the processor 770 to the computer system 700.

[0178] In another embodiment, operator and administrative interfaces, e.g., a display, keyboard, and cursor control device may also be coupled to the bus 720 to support direct operator interaction with the computer system 700. Other operator and administrative interfaces can be provided through network connectionsconnected through the communication port(s) 760. The components described above are meant only to exemplify various possibilities. In no way should the aforementioned exemplary computer system 700 limit the scope of the present disclosure.

[0179] In an embodiment, a method of operating a massive Multiple Input Multiple Output (MIMO) Radio Unit (MRU) is described. The method includes receiving baseband information from a fronthaul interface by a baseband section of the MRU. The method includes generating a plurality of digital transmit signals for a plurality of Radio Frequency (RF) chains by a digital front-end of the MRU. Further, the method further include converting the plurality of digital transmit signals into a plurality of RF transmit signals by at least two RF transceivers. Further, the method includes processing the plurality of RF transmit signals to produce amplified RF signals by an RF front-end section of the MRU. The RF front-end section includes a plurality of RF chains including a high -power amplifier, a driver amplifier, and a low-noise amplifier (LNA). The method includes filtering the amplified RF signals. The cavity filter is coupled to each of the plurality of RF chains by a cavity filter.

[0180] In another exemplary embodiment, a massive Multiple Input Multiple Output (MIMO) Radio Unit (MRU) for wireless communication is described. The MRU includes a baseband section including a baseband transceiver and at least two Radio frequency (RF) transceiver. Further, the MRU includes a Radio Frequency (RF) front-end section including a plurality of RF chains. Each RF chain includes a high-power amplifier, a driver amplifier, and a low-noise amplifier (LNA), and each of the plurality of RF chains is coupled to a cavity filter. The MRU includes a power supply section configured to provide power to the RF front-end section and the baseband section. Further, the MRU includes a thermal management unit configured to dissipate heat generated by the MRU. The MRU includes a clock section configured to synchronize the operation of the RF front-end section and the baseband section.

[0181] In yet another embodiment, a computer program product including a non-transitory computer-readable medium including instructions that, when executed by one or more processors, cause the one or more processors to execute a method of operating a massive Multiple Input Multiple Output (MIMO) Radio Unit (MRU) is disclosed. The method includes receiving baseband information from a fronthaul interface by a baseband section of the MRU. The method includes generating a plurality of digital transmit signals for a plurality of Radio Frequency (RF) chains by a digital front-end of the MRU. Further, the method further include converting the plurality of digital transmit signals into a plurality of RF transmit signals by at least two RF transceivers. Further, the method includes processing the plurality of RF transmit signals to produce amplified RF signals by an RF front-end section of the MRU. The RF front-end section includes a plurality of RF chains including a high-power amplifier, a driver amplifier, and a low-noise amplifier (LNA). The method includes filtering the amplified RF signals. The cavity filter is coupled to each of the plurality of RF chains by a cavity filter.

[0182] While the foregoing describes various embodiments of the invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof. The scope of the invention is determined by the claims that follow. The invention is not limited to the described embodiments, versions or examples, which are included to enable a person having ordinary skill in the art to make and use the invention when combined with information and knowledge available to the person having ordinary skill in the art.

[0183] The method and system of the present disclosure may be implemented in a number of ways. For example, the methods and systems of the present disclosure may be implemented by software, hardware, firmware, or any combination of software, hardware, and firmware. The above-described order for the steps of the method is for illustration only, and the steps of the method of the present disclosure are not limited to the order specifically described above unless specifically stated otherwise. Further, in some embodiments, the present disclosure may also be embodied as programs recorded in a recording medium, the programs includingmachine-readable instructions for implementing the methods according to the present disclosure. Thus, the present disclosure also covers a recording medium storing a program for executing the method according to the present disclosure.

[0184] While considerable emphasis has been placed herein on the preferred embodiments, it will be appreciated that many embodiments can be made and that many changes can be made in the preferred embodiments without departing from the principles of the disclosure. These and other changes in the preferred embodiments of the disclosure will be apparent to those skilled in the art from the disclosure herein, whereby it is to be distinctly understood that the foregoing descriptive matter to be implemented merely as illustrative of the disclosure and not as limitation.ADVANTAGES OF THE PRESENT DISCLOSURE

[0185] The present disclosure combines Radio Frequency (RF), baseband, and DC power systems into a single multilayer PCB with embedded copper coin technology, eliminating the need for cables and separate components, simplifying the system and enhancing reliability.

[0186] The present disclosure employs narrowband beamforming techniques to improve range and reduce signal interference. Adaptive beamforming further ensures high-quality connections by targeting specific user locations or cell sectors based on real-time traffic patterns.

[0187] The present disclosure utilizes innovative embedded copper coin technology and heat pipe-based mechanical housing for effective heat dissipation, reducing the overall product size and weight, making it compact and lightweight.

[0188] The present disclosure is designed to support multiple MIMO configurations (8x8 and 12x8) with seamless integration and easy installation, ensuring adaptability for different network requirements.

[0189] The present disclosure provides 320W 32T32R MRU, offering an energyefficient, scalable, and high-performing solution for 5G networks.

Claims

CLAIMSWhat is claimed is:

1. A massive Multiple Input Multiple Output (MIMO) Radio Unit (MRU) (108) for wireless communication, the MRU (108) comprising:a baseband section (218) comprising a baseband transceiver (202) and at least two Radio frequency (RF) transceiver (214);a Radio Frequency (RF) front-end section (204) comprising a plurality of RF chains, wherein each RF chain comprises a high-power amplifier (312), a driver amplifier (310), and a low-noise amplifier (LNA) (328), and wherein each of the plurality of RF chains is coupled to a cavity filter (318);a power supply section (206) configured to provide power to the RF frontend section (204) and the baseband section (218);a thermal management unit (208) configured to dissipate heat generated by the MRU (108); anda clock section (212) configured to synchronize the operation of the RF front-end section (204) and the baseband section (218).

2. The MRU (108) as claimed in claim 1, wherein the plurality of RF chains comprises at least 32 transmit chains and at least 32 receive chains.

3. The MRU (108) as claimed in claim 1, wherein the baseband section (218) comprises a digital front-end configured to perform at least one of a Crest Factor Reduction (CFR) and a Digital Predistortion (DPD).

4. The MRU (108) as claimed in claim 3, wherein the digital front-end is configured to perform the Digital Predistortion (DPD) by:receiving one or more feedback signals derived from the high-power amplifiers (312) using the plurality of observation chains;generating one or more predistortion coefficients based on the one or more feedback signals; andapplying the one or more predistortion coefficients to the plurality of digital transmit signals prior to conversion by the at least two RF transceivers (214).

5. The MRU (108) as claimed in claim 3, wherein the digital front-end is configured to perform the Crest Factor Reduction (CFR) by:detecting one or more peaks in at least one of the plurality of digital transmit signals; andlimiting the one or more peaks to satisfy a peak-to-average power ratio threshold prior to conversion by the at least two RF transceivers (214).

6. The MRU (108) as claimed in claim 1, further comprising:a plurality of observation chains coupled from the high-power amplifiers (312) of the RF front-end section (204) to the at least one RF transceiver (214).

7. The MRU (108) as claimed in claim 1, further comprising:a fronthaul interface coupled to the baseband section (218), wherein the fronthaul interface is configured to exchange baseband information with at least one of a Distributed Unit (DU) and a combined Central and Distributed Unit (CU / DU).

8. The MRU (108) as claimed in claim 1, wherein the thermal management unit (208) comprises an embedded copper coin disposed beneath the high-power amplifiers (312).

9. The MRU (108) as claimed in claim 8, wherein the embedded copper coin comprises a T-shaped copper coin (502) configured to increase a contact area with a printed circuit board and a heat sink, and wherein the embedded copper coincomprises a mechanically drilled portion (504) to enhance thermal coupling between the printed circuit board and the heat sink.

10. The MRU (108) as claimed in claim 1, wherein the clock section (212) is configured to distribute a synchronized reference clock to the at least two RF transceivers (214) based on a Precision Time Protocol (PTP) timing recovered from a 25G optical interface, to maintain phase coherence across the plurality of RF chains.

11. A method (600) of operating a massive Multiple Input Multiple Output (MIMO) Radio Unit (MRU) (108), the method (600) comprising:receiving (602), by a baseband section (218) of the MRU (108), baseband information from a fronthaul interface;generating (604), by a digital front-end of the MRU (108), a plurality of digital transmit signals for a plurality of Radio Frequency (RF) chains;converting (606), by at least two RF transceivers (214), the plurality of digital transmit signals into a plurality of RF transmit signals;processing (608), by an RF front-end section (204) of the MRU (108), the plurality of RF transmit signals to produce amplified RF signals, wherein the RF front-end section (204) comprises a plurality of RF chains comprising a high-power amplifier (312), a driver amplifier (310), and a low-noise amplifier (LNA) (328); andfiltering (610), by a cavity filter (318), the amplified RF signals, wherein the cavity filter (318) is coupled to each of the plurality of RF chains.

12. The method (600) as claimed in claim 11, further comprising:synchronizing, by a clock section (212), operation of the baseband section (218) and the RF front-end section (204); anddissipating, by a thermal management unit (208), heat generated in the MRU (108).

13. The method (600) as claimed in claim 11, wherein the plurality of RF chains comprises at least 32 transmit chains and at least 32 receive chains.

14. The method (600) as claimed in claim 11, wherein the baseband section (218) comprises a digital front-end configured to perform at least one of a Crest Factor Reduction (CFR) and a Digital Predistortion (DPD).

15. The method (600) as claimed in claim 14, wherein the digital front-end is configured to perform the Digital Predistortion (DPD) by:receiving one or more feedback signals derived from outputs of the high-power amplifiers (312) using the plurality of observation chains;generating one or more predistortion coefficients based on the one or more feedback signals; andapplying the one or more predistortion coefficients to the plurality of digital transmit signals prior to conversion by the at least two RF transceivers (214).

16. The method (600) as claimed in claim 14, wherein the digital front-end is configured to perform the Crest Factor Reduction (CFR) by:detecting one or more peaks in at least one of the plurality of digital transmit signals; andlimiting the one or more peaks to satisfy a peak-to-average power ratio threshold prior to conversion by the at least two RF transceivers (214).

17. The method (600) as claimed in claim 11, further comprising:coupling, by a plurality of observation chains, the high-power amplifiers (312) to at least one RF transceiver (214).

18. The method (600) as claimed in claim 11, further comprising:receiving the baseband information from at least one of a Distributed Unit (DU) and a combined Central and Distributed Unit (CU / DU).

19. The method (600) as claimed in claim 11, wherein the thermal management unit (208) comprises an embedded copper coin disposed beneath the high-power amplifiers (312).

20. The method (600) as claimed in claim 19, wherein the embedded copper coin comprises a T-shaped copper coin (502) configured to increase a contact area with a printed circuit board and a heat sink, and wherein the embedded copper coin comprises a mechanically drilled portion (504) to enhance thermal coupling between the printed circuit board and the heat sink.

21. The method (600) as claimed in claim 12, wherein the clock section (212) is configured to distribute a synchronized reference clock to the at least two RF transceivers (214) based on a Precision Time Protocol (PTP) timing recovered from a 25G optical interface, to maintain phase coherence across the plurality of RF chains.

22. A computer program product comprising a non -transitory computer-readable medium comprising instructions that, when executed by one or more processors, cause the one or more processors to execute a method (600) of operating a massive Multiple Input Multiple Output (MIMO) Radio Unit (MRU) (108), the method (600) comprising:receiving (602), by a baseband section (218) of the MRU (108), baseband information from a fronthaul interface;generating (604), by a digital front-end of the MRU (108), a plurality of digital transmit signals for a plurality of Radio Frequency (RF) chains;converting (606), by at least two RF transceivers (214), the plurality of digital transmit signals into a plurality of RF transmit signals;processing (608), by an RF front-end section (204) of the MRU (108), the plurality of RF transmit signals to produce amplified RF signals, wherein the RF front-end section (204) comprises a plurality of RF chains comprising a high-power amplifier (312), a driver amplifier (310), and a low-noise amplifier (LNA) (328); andfiltering (610), by a cavity filter (318), the amplified RF signals, wherein the cavity filter (318) is coupled to each of the plurality of RF chains.

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