Optical semiconductor element and method for producing optical semiconductor element

Abstract

This optical semiconductor element includes an embedded layer provided between a first mesa structure of a light-emitting unit and a second mesa structure of a light-receiving unit, and at both a position adjacent to each of the first mesa structure and the second mesa structure in a third direction and a position adjacent to each of the first mesa structure and the second mesa structure in a direction opposite to the third direction. An interface between the second mesa structure and the embedded layer interposed between the second mesa structure and the light-emitting unit has an inclined portion in which, in a light-receiving range of light outputted from the light-emitting unit, a cutting line in the cross section intersecting the first direction is inclined at a prescribed angle with respect to the second direction, where the first direction is a crystal orientation [100] direction, the second direction is a crystal orientation [0-11] direction or a crystal orientation [01-1] direction, the third direction is a crystal orientation [0-1-1] direction or a crystal orientation [011] direction, and the absolute value of the predetermined acute angle is 35° ±30°.

Description

Optical semiconductor device and method for manufacturing the same

[0001] The present invention relates to an optical semiconductor device and a method for manufacturing the optical semiconductor device.

[0002] Conventionally, an optical semiconductor device having an emission part such as a semiconductor laser and a light receiving part such as a photodiode integrated therein has been known (for example, Patent Document 1).

[0003] Japanese Patent Laid-Open No. 3-89577

[0004] In this type of optical semiconductor device, when the light output from the emission part is reflected by the light receiving part and returns to the emission part, there is a risk of adversely affecting the output characteristics of the emission part. Further, if the active layer of the emission part or the absorption layer of the light receiving part is exposed, there is a risk of being easily deteriorated.

[0005] Therefore, one of the problems of the present invention is to provide a novel and improved optical semiconductor device and a method for manufacturing the optical semiconductor device that can suppress, for example, the return of the reflected light at the light receiving part to the emission part and suppress the deterioration of the active layer and the absorption layer.

[0006] The optical semiconductor device of the present invention has, for example, a first mesa structure including a first cladding layer, an active layer, and a second cladding layer stacked in a first direction, and a light-emitting section that emits light in a second direction intersecting the first direction; a second mesa structure having a second mesa structure spaced in the second direction from the first mesa structure including the first cladding layer, an absorption layer made of the same material as the active layer, and the second cladding layer stacked in the first direction, and a light-receiving section that receives light emitted from the light-emitting section; and positions between the first mesa structure and the second mesa structure, and adjacent to the first mesa structure and the second mesa structure in a third direction intersecting the first and second directions, respectively. The structure comprises an embedded layer including a current-blocking layer, provided at both the position and an adjacent position opposite to the third direction, wherein the interface between the second mesa structure and the embedded layer interposed between the light-emitting portion and the second mesa structure has an inclined portion in which, within the light-receiving range of the light output from the light-emitting portion, the cutting line in the cross section intersecting the first direction is inclined at a predetermined angle with respect to the second direction, the first direction is the crystal orientation

[100] direction, the second direction is the crystal orientation [0-11] direction or the crystal orientation [01-1] direction, the third direction is the crystal orientation [0-1-1] direction or the crystal orientation

[011] direction, and the absolute value of the acute predetermined angle is 35° ± 30°.

[0007] In the aforementioned optical semiconductor element, a trench may be provided between the light-emitting portion and the light-receiving portion, which is open in the first direction and extends in a fourth direction that intersects the first and second directions.

[0008] In the aforementioned optical semiconductor device, the fourth direction may be inclined with respect to the third direction.

[0009] In the aforementioned optical semiconductor element, the absolute value of the acute angle difference between the fourth direction and the third direction may be greater than 0° and 18° or less.

[0010] In the aforementioned optical semiconductor element, a plurality of pairs, each having a light-emitting unit and a light-receiving unit that receives the light output by the light-emitting unit, may be arranged in a line with spacing between them in the third direction.

[0011] In the optical semiconductor element, the interface has a ridge portion that protrudes in the direction opposite to the second direction, or a valley portion that is recessed in the direction opposite to the second direction, and the ridge portion or the valley portion may be offset from the optical axis center of the light output from the light-emitting portion and reaching the interface in the third direction or the direction opposite to the third direction.

[0012] The present invention provides a method for manufacturing an optical semiconductor device, for example, comprising: a first mesa structure having a first cladding layer, an active layer, and a second cladding layer stacked in a first direction, and an emission unit that emits light in a second direction intersecting the first direction; a second mesa structure having a second mesa structure spaced in the second direction from the first mesa structure having a first cladding layer, an absorption layer made of the same material as the active layer, and the second cladding layer stacked in the first direction, and a light receiving unit that receives light emitted from the emission unit; and an embedded layer having a current blocking layer, provided between the first mesa structure and the second mesa structure, and at positions adjacent to the first and second mesa structures in a third direction intersecting the first and second directions, and at positions adjacent to the opposite direction of the third direction, respectively, wherein the interface between the second mesa structure and the embedded layer interposed between the emission unit and the emission unit is such that, in the light receiving range of the light emitted from the emission unit, it intersects the first direction. A method for manufacturing an optical semiconductor device, wherein the cutting line in the cross section has an inclined portion that is inclined at a predetermined angle with respect to the second direction, the first direction is the crystal orientation

[100] direction, the second direction is the crystal orientation [0-11] direction or the crystal orientation [01-1] direction, the third direction is the crystal orientation [0-1-1] direction or the crystal orientation

[011] direction, and the absolute value of the acute predetermined angle is 35° ± 30°, comprising the steps of: forming a laminate by stacking the first cladding layer, the active layer, the absorption layer, and the second cladding layer on a substrate; forming the first mesa structure and the second mesa structure by etching the laminate to form recesses; and forming the embedded layer between the first mesa structure and the second mesa structure, and at positions adjacent to the first mesa structure and the second mesa structure in the third direction and the opposite direction of the third direction, respectively, so as to fill the recesses.

[0013] According to the present invention, for example, it is possible to provide an improved novel optical semiconductor device and a method for manufacturing an optical semiconductor device that can suppress the return of reflected light from the light-receiving part to the light-emitting part, and also suppress the deterioration of the active layer and the absorption layer.

[0014] Figure 1 is an exemplary and schematic perspective view of the optical semiconductor element of the first embodiment. Figure 2 is an exemplary and schematic plan view of the optical semiconductor element of the first embodiment. Figure 3 is a cross-sectional view taken along line III-III of Figure 2. Figure 4 is a cross-sectional view taken along line IV-IV of Figure 2. Figure 5 is a cross-sectional view taken along line V-V of Figure 2. Figure 6 is a flowchart showing an example of a procedure for manufacturing the optical semiconductor element of the embodiment. Figure 7 is an exemplary and schematic plan view of the optical semiconductor element of the second embodiment. Figure 8 is an exemplary and schematic plan view of the optical semiconductor element of the third embodiment. Figure 9 is an exemplary and schematic perspective view of the optical semiconductor element of the fourth embodiment. Figure 10 is an exemplary and schematic plan view of the optical semiconductor element of the fifth embodiment. Figure 11 is an exemplary and schematic plan view of the optical semiconductor element of the sixth embodiment. Figure 12 is an exemplary and schematic cross-sectional view of the optical semiconductor element of the seventh embodiment at the same position as in Figure 3. Figure 13 is an exemplary and schematic perspective view of the optical semiconductor element of the eighth embodiment. Figure 14 is an exemplary and schematic plan view of an optoelectronic semiconductor element in a first modified example of the embodiment. Figure 15 is an exemplary and schematic plan view of an optoelectronic semiconductor element in a second modified example of the embodiment. Figure 16 is an exemplary and schematic perspective view of an optoelectronic semiconductor element in a third modified example of the embodiment. Figure 17 is an exemplary and schematic cross-sectional view of a mounting structure on which the optoelectronic semiconductor element of the seventh embodiment is mounted.

[0015] Illustrative embodiments and variations of the present invention are disclosed below. The configurations of the embodiments and variations shown below, as well as the functions and results (effects) brought about by such configurations, are examples only. The present invention can also be realized by configurations other than those disclosed in the following embodiments and variations. Furthermore, according to the present invention, it is possible to obtain at least one of the various effects (including derived effects) that can be obtained by the configuration.

[0016] The multiple embodiments and modifications shown below have similar configurations. Therefore, the configurations of each embodiment and modification yield similar functions and effects based on those similar configurations. In the following, similar components are denoted by the same reference numerals, and redundant explanations may be omitted.

[0017] In this specification, ordinal numbers are assigned for convenience to distinguish directions, parts, etc., and do not indicate priority or order, nor do they limit the number of items.

[0018] In each figure, the X direction is represented by arrow X, the Y direction by arrow Y, and the Z direction by arrow Z. The X, Y, and Z directions intersect and are also orthogonal to each other. The X direction may also be called the extension direction, and the Y direction may also be called the width direction. The Z direction may also be called the height direction, stacking direction, or upward direction.

[0019] Furthermore, each diagram is a schematic representation for explanatory purposes, and the scale and proportions of each diagram do not necessarily match those of the actual object.

[0020] [First Embodiment] [Structure of the Optical Semiconductor Element] Figure 1 is a perspective view of the optical semiconductor element 100A (100) of the first embodiment, and Figure 2 is a plan view of the optical semiconductor element 100A.

[0021] As shown in Figure 1, the optical semiconductor element 100A comprises a laminate 10 in which layers made of semiconductor material are stacked. The laminate 10 is made of semiconductor crystal. As shown in Figures 1 and 2, the laminate 10 is provided with a light-emitting section 20 and a light-receiving section 30A (30). The light-emitting section 20 is a semiconductor laser element and outputs detection light (laser light) in the X direction toward the light-receiving section 30 inside the laminate 10. The light-emitting section 20 also outputs light (laser light) in the opposite direction to the X direction. The light-receiving section 30 is a photodiode and receives the light output from the light-emitting section 20 and outputs an output current corresponding to the amount of light received. The light-receiving section 30 is spaced apart from the light-emitting section 20 in the X direction.

[0022] The laminate 10 has a roughly rectangular parallelepiped shape and extends in the X direction with a predetermined width in the Y direction and a predetermined height in the Z direction.

[0023] Electrodes 18a and 18b are formed on the upper surface 10a located at the Z-direction end of the laminate 10. Electrodes 18a and 18b are P electrodes having the same structure, and for example, they have a laminated structure containing Au, AuZn, Pt, etc. Electrode 18a is provided corresponding to the light-emitting portion 20, and electrode 18b is provided corresponding to the light-receiving portion 30. Electrode 18a is provided spaced apart in the Z-direction from the active layer 17a, and electrode 18b is provided spaced apart in the Z-direction from the absorption layer 17b.

[0024] Furthermore, electrodes 19a and 19b are formed on the lower surface 10b located at the end of the laminate 10 opposite to the Z direction. Electrodes 19a and 19b are N electrodes having the same structure, and for example, they have a laminated structure containing AuGe, Ni, Au, etc. Electrode 19a is provided corresponding to the light-emitting part 20, and electrode 19b is provided corresponding to the light-receiving part 30. Note that electrodes 19a and 19b may be integrated as a single electrode.

[0025] The laminate 10 has a substrate 11. The substrate 11 has a rectangular and plate-like shape intersecting the Z direction, and extends in the X direction with a predetermined width in the Y direction and a predetermined height in the Z direction. The substrate 11 is made of, for example, n-InP.

[0026] On the substrate 11, a lower cladding layer 12, a lower blocking layer 13, an upper blocking layer 14, an upper cladding layer 15, a contact layer 16, an active layer 17a, an absorption layer 17b (see Figure 4), and the like are stacked.

[0027] Figure 3 is a cross-sectional view taken along line III-III in Figure 2. Figure 3 is a cross-sectional view of the portion of the laminate 10 where the light-emitting portion 20 is formed, intersecting the X direction. The laminate 10 has the cross-sectional shape shown in Figure 3 in the area where the light-emitting portion 20 is formed.

[0028] In the relevant portion, approximately in the center in the Y direction, a lower cladding layer 12, an active layer 17a, an upper cladding layer 15, and a contact layer 16 are stacked on the substrate 11 in this order. The active layer 17a is sandwiched between the lower cladding layer 12 and the upper cladding layer 15 in the Z direction. This configuration forms a mesa structure 20a that serves as the functional part of the light-emitting section 20. The lower cladding layer 12 is made of, for example, n-InP. The upper cladding layer 15 is made of, for example, p-InP. The contact layer 16 is made of, for example, InGaAsP. The active layer 17a has a multilayer structure mainly composed of, for example, InGaAsP. The lower cladding layer 12 is an example of a first cladding layer, and the upper cladding layer 15 is an example of a second cladding layer. The mesa structure 20a is an example of a first mesa structure.

[0029] On the substrate 11, at positions adjacent to the mesa structure 20a in the Y direction and adjacent in the opposite direction in the Y direction, the lower cladding layer 12, lower blocking layer 13, upper blocking layer 14, upper cladding layer 15, and contact layer 16 are stacked in this order, respectively. The lower blocking layer 13 is made of, for example, p-InP, and the upper blocking layer 14 is made of, for example, n-InP. The lower blocking layer 13 and the upper blocking layer 14 constitute the embedded layer 41, which is an example of a current blocking layer.

[0030] Figure 4 is a cross-sectional view taken along line IV-IV in Figure 2. Figure 4 is a cross-sectional view of the portion of the laminate 10 where the light-receiving portion 30 is formed, intersecting the X direction. The laminate 10 has the same cross-sectional shape as in Figure 4 in the area where the light-receiving portion 30 is formed. However, the width of the absorption layer 17b in the Y direction gradually widens towards the X direction.

[0031] In the relevant section, approximately in the center in the Y direction, the lower cladding layer 12, the absorption layer 17b, the upper cladding layer 15, and the contact layer 16 are stacked on the substrate 11 in this order. The absorption layer 17b is sandwiched between the lower cladding layer 12 and the upper cladding layer 15 in the Z direction. This configuration forms a mesa structure 30a that serves as the functional part of the light-receiving section 30. The absorption layer 17b is made of the same material as the active layer 17a. The mesa structure 30a is an example of a second mesa structure.

[0032] On the substrate 11, at positions adjacent to the mesa structure 30a in the Y direction and adjacent in the opposite direction in the Y direction, the lower cladding layer 12, lower blocking layer 13, upper blocking layer 14, upper cladding layer 15, and contact layer 16 are stacked in this order, respectively. In these areas as well, the lower blocking layer 13 and upper blocking layer 14 constitute the embedded layer 41 and are an example of a current blocking layer.

[0033] Figure 5 is a cross-sectional view taken along line V-V in Figure 2. Figure 5 is a cross-sectional view of the laminate 10 intersecting the Y direction in the area where the light-receiving portion 30 is formed. The laminate 10 has the cross-sectional shape shown in Figure 5 in the area where the mesa structure 20a and the mesa structure 30a are formed. However, the position of the end of the absorption layer 17b in the opposite direction to the X direction differs depending on the position in the Y direction of the cross-section.

[0034] The configuration of the light-emitting section 20 and the light-receiving section 30 is the same as the structure shown in Figures 3 and 4. Between the mesa structure 20a of the light-emitting section 20 and the mesa structure 30a of the light-receiving section 30, there is an embedded layer 42 having a laminated structure similar to the embedded layer 41. Light emitted from the active layer 17a of the light-emitting section 20 passes through the embedded layer 42 and is received by the absorption layer 17b of the light-receiving section 30.

[0035] The dashed line (VLa) in Figure 2 is the cutting line at the interface 20b between the mesa structure 20a (active layer 17a and lower cladding layer 12) and the embedded layers 41 and 42, in a cross-section intersecting the Z direction. Similarly, the dashed line (VLb) in Figure 2 is the cutting line at the interface 30b between the mesa structure 30a (absorption layer 17b and lower cladding layer 12) and the embedded layers 41 and 42, in a cross-section intersecting the Z direction. Note that the cutting lines VLa and VLb shown in each figure are cutting lines in a cross-section passing through approximately the center of the active layer 17a or absorption layer 17b in the Z direction, but the cutting line of a cross-section at any position in the Z direction will be approximately parallel to the cutting lines VLa and VLb.

[0036] As is clear from Figure 2, in this embodiment, the cutting line VLb of the interface 30b between the light-receiving section 30 and the embedding layer 42 of the mesa structure 30a is inclined at a predetermined angle (angle difference θ1) with respect to the X direction, except for the ridge portion 30c that protrudes in the opposite direction to the X direction (and in the direction between the X and Z directions). In other words, in this configuration, the interface 30b does not face the opposite direction to the X direction. Therefore, the reflected light from the active layer 17a of the light-emitting section 20, excluding the ridge portion 30c of the interface 30b, does not travel in the opposite direction to the X direction and does not return to the active layer 17a of the light-emitting section 20. Thus, with this configuration, it is possible to suppress adverse effects on the light emission characteristics of the light-emitting section 20 due to reflected light at the interface 30b. The portion of the interface 30b excluding the ridge portion 30c is an example of an inclined portion.

[0037] [Manufacturing Method] Figure 6 is a flowchart showing an example of the procedure for manufacturing the optical semiconductor device 100. As shown in Figure 6, first, the layers constituting the mesa structures 20a and 30a, namely the lower cladding layer 12, the active layer 17a and the absorption layer 17b, and a part (lower part) of the upper cladding layer 15 are stacked on the substrate 11 (S1). As described above, the active layer 17a and the absorption layer 17b are made of the same material and can be stacked in the same process.

[0038] Next, mesa structures 20a and 30a are formed on the laminate formed in S1 by, for example, wet etching (S2). Specifically, with the upper ends (ends in the Z direction) of the mesa structures 20a and 30a masked by a dielectric layer, the surrounding areas of the mesa structures 20a and 30a are removed by selective etching in the opposite direction of the Z direction, thereby forming mesa structures 20a and 30a of a predetermined shape. That is, recesses are formed around the mesa structures 20a and 30a in the laminate. The surrounding areas of the mesa structures 20a and 30a refer to the area between mesa structure 20a and mesa structure 30a, as well as the areas adjacent to each mesa structure 20a and 30a in the Y direction and the opposite direction of the Y direction. The dashed lines in Figures 3 to 5 and the interfaces 20b and 30b described above are at least a part of the side surfaces of the mesa structures 20a and 30a at the end of S2.

[0039] Next, layers constituting the embedding layers 41 and 42, namely the lower blocking layer 13 and the upper blocking layer 14, are stacked to fill the recesses formed around the mesa structures 20a and 30a (S3). In S3, the upper ends (ends in the Z direction) of the mesa structures 20a and 30a are masked by a dielectric layer, and the embedding layers 41 and 42 are formed by epitaxial growth. In S3, the area around the mesa structures 20a and 30a, i.e., the recesses, are filled with the embedding layers 41 and 42.

[0040] Here, if the materials constituting the mesa structures 20a, 30a and the embedded layers 41, 42 are, for example, made of a zincblende III-V compound semiconductor, then abnormal growth may occur on the interfaces 20b, 30b depending on their orientation (normal direction), resulting in the formation of voids, unwanted protrusions, or warping. This is because the bonding force between crystals differs depending on the direction. In particular, if voids, protrusions, or warping occur at the interface 30b of the light-receiving section 30, there is a risk of undesirable events such as a decrease in the coupling efficiency of light from the light-emitting section 20 to the light-receiving section 30, an increase in dark current, or reflection of light from the light-emitting section 20 in an undesirable direction at the interface 30b. Furthermore, this may lead to a decrease in detection accuracy in the light-receiving section 30 or individual variations in the detection characteristics of the light-receiving section 30. Therefore, the inventors conducted extensive research through experiments and simulations, and as a result, as shown in Figure 2, the Z direction was set to the crystal orientation

[100] direction, the X direction to the crystal orientation [0-11] direction, and the Y direction to the crystal orientation [0-1-1] direction. Furthermore, they confirmed that by setting the absolute value of the acute angle difference θ1 between the cutting line VLb and the X direction at interface 30b to 35° ± 30°, abnormal growth does not occur at interface 30b, and the occurrence of voids, protrusions, and warping can be suppressed. From this viewpoint, they also confirmed that it is more preferable for the absolute value of the acute angle difference θ1 to be 35° ± 10°.

[0041] Next, the upper surface of the laminate formed in S3 is smoothed by, for example, etching (S4), and the upper structure, for example, a part of the upper cladding layer 15 (the upper part, above the embedded layers 41 and 42) and the contact layer 16 are formed on the upper surface (S5). After that, electrodes 18a, 18b, 19a, and 19b are formed (S6).

[0042] As described above, according to the optical semiconductor device 100 of the present embodiment, since the light emitting portion 20 and the light receiving portion 30 have a so-called double heterostructure, the light confinement property can be enhanced, and the laser oscillation efficiency in the light emitting portion 20 and the photoelectric conversion efficiency in the light receiving portion 30 can be further enhanced. Further, since the active layer 17a and the absorption layer 17b are covered with the embedded layer 42 and are not exposed, deterioration of the active layer 17a and the absorption layer 17b can be suppressed. Further, when etching is performed on the above-described laminate or laminate 10 in order to expose the active layer 17a and the absorption layer 17b, the exposed surfaces may be roughened by the etching, which may adversely affect the optical characteristics of the light emitting portion 20 or the light receiving portion 30. In this regard, in the present embodiment, since etching for exposing the active layer 17a and the absorption layer 17b is not required, an increase in the surface roughness of the end face can be suppressed.

[0043] Further, according to the present embodiment, as described above, at an inclined portion of the interface 30b excluding the ridge line portion 30c, a cutting line VLb in a cross section intersecting the Z direction of the interface 30b is inclined at a predetermined angle (angle difference θ1) with respect to the X direction. Therefore, it is possible to suppress the reflected light of the light from the light emitting portion 20 at the interface 30b from returning to the light emitting portion 20. In the present embodiment, the entire portion of the interface 30b excluding the ridge line portion 30c is an inclined portion, but the inclined portion may be provided in the light receiving range of the light from the light emitting portion 20 in the interface 30b.

[0044] Furthermore, according to the present embodiment, as described above, after setting the Z direction as the crystal orientation

[100] direction, the X direction as the crystal orientation [0-11] direction, and the Y direction as the crystal orientation [0-1-1] direction, at the interface 30b, the absolute value of the angle difference θ1 between the cutting line VLb and the X direction is set to 35° ± 30°. Thereby, generation of voids, protrusions, and warpage due to abnormal growth at the interface 30b can be suppressed, and thus, occurrence of inconvenient events such as a decrease in the detection accuracy of the light receiving portion 30 and variation in individual differences in detection characteristics can be suppressed.

[0045] [Second and Third Embodiments] Figure 7 is a plan view of the optical semiconductor element 100B (100) of the second embodiment. Figure 8 is a plan view of the optical semiconductor element 100C (100) of the third embodiment. The optical semiconductor element 100B of the second embodiment and the optical semiconductor element 100C of the third embodiment have the same configuration as the optical semiconductor element 100A of the first embodiment, and the same effects can be obtained based on this same configuration.

[0046] However, as will become clear when comparing Figures 7 and 8 with Figure 2, the configuration of the light-receiving sections 30B and 30C (30) in the second and third embodiments differs from the configuration of the light-receiving section 30A (30) in the first embodiment. The interface 30b of the light-receiving section 30C in the third embodiment, as shown in Figure 8, has a recessed valley section 30d in the direction between the opposite directions of the X and Z directions, instead of a ridge section 30c. That is, the area of ​​the interface 30b excluding the valley section 30d is an inclined portion. Furthermore, the interface 30b of the light-receiving section 30B in the second embodiment, as shown in Figure 7, does not have a ridge section 30c like in the first embodiment or a valley section 30d like in the third embodiment. That is, the entire light-receiving area of ​​the light output from the light-emitting section 20 within the interface 30b is an inclined portion. Furthermore, in both the second and third embodiments, the cutting line VLb of the inclined portion is inclined with respect to the X direction at a predetermined angle (angle difference θ1) similar to that of the first embodiment. Therefore, in these embodiments as well, it is possible to suppress the return of reflected light from the light-emitting portion 20 at the interface 30b of the light-emitting portion 20 back to the light-emitting portion 20.

[0047] [Fourth and Fifth Embodiments] Figure 9 is a perspective view of the optical semiconductor element 100D (100) of the fourth embodiment. Figure 10 is a plan view of the optical semiconductor element 100E (100) of the fifth embodiment. The optical semiconductor element 100D of the fourth embodiment and the optical semiconductor element 100E of the fifth embodiment have the same configuration as the optical semiconductor element 100A of the first embodiment, and the same effects can be obtained based on this same configuration.

[0048] However, as will be apparent when comparing FIGS. 9 and 10 with FIGS. 1 and 2, the configuration of the laminate 10 of the fourth and fifth embodiments is different from that of the first embodiment. In the laminate 10 of the optical semiconductor device 100D of the fourth embodiment and the laminate 10 of the optical semiconductor device 100E of the fifth embodiment, trenches 51 (50) extending in a direction intersecting the Z direction and the Y direction are provided between the light emitting portion 20 and the light receiving portions 30A, 30B (30), respectively. In the fourth embodiment, as shown in FIG. 9, the trench 51 is recessed in the Z direction from the upper surface 10a and extends in the Y direction with a predetermined width (for example, a substantially constant width) in the X direction and a predetermined depth (for example, a substantially constant depth) in the Z direction. In this case, the Y direction is an example of the fourth direction. On the other hand, in the fifth embodiment, as shown in FIG. 10, the trench 51 is recessed in the Z direction from the upper surface 10a. However, in this configuration, the trench 51 extends in the D4 direction inclined at a predetermined angle (angle difference θ2) with respect to the Y direction. In this case, the D4 direction is an example of the fourth direction. The trench 51 has a predetermined width (for example, a substantially constant width) in the direction intersecting the Z direction and the D4 direction and a predetermined depth (for example, a substantially constant depth) in the Z direction. Note that the trench 51 (50) is provided at least after S5 (S7) as shown by a broken line in FIG. 6.

[0049] In the fourth and fifth embodiments, the trench 51 (50) extends from the upper surface 10a of the laminate 10 to the lower cladding layer 12. Thereby, the light emitting portion 20 and the light receiving portion 30 can be electrically separated. Further, according to this configuration, there may be an effect of confining the reflected light (stray light) at the interface 30b in the trench 51 (50).

[0050] Furthermore, as in the fifth embodiment, by having the trench 51 extend in the D4 direction inclined with respect to the Y direction, it is possible to suppress the reflection of light output from the light-emitting unit 20 at the interface between the trench 51 and the embedded layer 42 and return to the light-emitting unit 20. In this case, through diligent study by the inventors, it was found that it is preferable for the absolute value of the acute angle difference θ2 to be greater than 0° and 18° or less. That is, if the absolute value of the angle difference θ2 is greater than 18°, the laser light output from the light-emitting unit 20 may undergo total internal reflection at the side surface (interface) of the trench 51 on the light-emitting unit 20 side and not proceed beyond the trench 51. Also, the larger the absolute value of the angle difference θ2, the wider the gap between the light-emitting unit 20 and the light-receiving unit 30 becomes, and the larger the optical semiconductor element 100 becomes. Therefore, by setting the absolute value of the acute angle difference θ2 to be greater than 0° and 18° or less, these problems can be avoided.

[0051] [Sixth Embodiment] Figure 11 is a plan view of the optical semiconductor element 100F (100) of the sixth embodiment. The optical semiconductor element 100F has a plurality of pairs 101, each having a light-emitting part 20 and a light-receiving part 30F (30) similar to the above embodiment, arranged at intervals in the Y direction. With this configuration, for example, light of different wavelengths can be output from the plurality of pairs 101. In addition, for example, by making one of the pairs 101 a spare pair 101 to be used when the pair 101 being used fails, the reliability of the optical semiconductor element 100F can be increased. In this embodiment, the light-receiving part 30F has an elongated hexagonal shape in the X direction when viewed in a plan view in the opposite direction to the Z direction. In this case, abnormal growth in the process of forming the embedded layers 41 and 42 (S3, see Figure 6) can be suppressed at the interface of the X-direction end of the light-receiving part 30F.

[0052] Furthermore, the optical semiconductor element 100F is provided with a trench 51 (50) between the light-emitting portion 20 and the light-receiving portion 30, similar to the fourth and fifth embodiments. However, in this embodiment, a trench 52 (50) is also provided between adjacent pairs 101. These trenches 51, 52 (50) extend from the upper surface 10a to the lower cladding layer 12, similar to the trenches 51 in the fourth and fifth embodiments. This allows for electrical isolation of both sides of the trench 50. With this configuration, it may be possible to confine reflected light (stray light) at the interface 30b within the trenches 51, 52 (50).

[0053] [Seventh and Eighth Embodiments] Figure 12 is a cross-sectional view of the optical semiconductor element 100G (100) of the seventh embodiment at the same position as in Figure 3. Figure 13 is a perspective view of the optical semiconductor element 100H (100) of the eighth embodiment. The optical semiconductor element 100G of the seventh embodiment and the optical semiconductor element 100H of the eighth embodiment have the same configuration as the optical semiconductor element 100A of the first embodiment, and the same effects can be obtained based on this same configuration.

[0054] However, as will become clear when comparing Figures 12 and 13 with Figures 3 and 1, the position of the electrode 19a in the seventh and eighth embodiments differs from that of the first embodiment. Specifically, the electrode 19a is not located on the lower surface 10b, but on the bottom surface 10c1 of a recess 10c provided in the laminate 10. The recess 10c is recessed in the opposite direction from the upper surface 10a in the Z direction. In other words, the recess 10c is open in the Z direction on the upper surface 10a. Furthermore, the recess 10c reaches the lower cladding layer 12. In other words, the lower cladding layer 12 is exposed at the bottom surface 10c1 of the recess 10c. In this configuration, the electrode 19a is electrically connected to the lower cladding layer 12. Also, in the configuration of Figure 13, the electrode 19a is both the N electrode for the light-emitting section 20 and the N electrode for the light-receiving section 30. In other words, the electrode 19a is shared by the light-emitting unit 20 and the light-receiving unit 30.

[0055] In the configurations shown in Figures 12 and 13, current can be passed between electrode 18a and electrode 19a via the contact layer 16, upper cladding layer 15, active layer 17a (or absorption layer 17b), and lower cladding layer 12. Although the position of electrode 19a differs from that of the first embodiment, the same operation and effects as those of the first embodiment can be obtained with this configuration as well.

[0056] Furthermore, as shown in Figure 13, a trench 52 (50) may be provided between the recess 10c and the light-emitting unit 20 and the light-receiving unit 30. In addition, the trench 52 may be connected to the trench 51 (50) between the light-emitting unit 20 and the light-receiving unit 30. With this configuration, the trench 50 can more reliably isolate each part electrically.

[0057] [Modified Version] Figure 14 is a plan view of the optical semiconductor element 100I (100) of the first modified version of the embodiment. As can be seen by comparing Figure 14 with Figure 2, the optical semiconductor element 100I basically has substantially the same configuration as the optical semiconductor element 100A of the first embodiment. However, in this modified version, the ridge portion 30c is shifted in the Y direction (or the opposite direction of the Y direction) with respect to the optical axis center Co of the light L output from the light-emitting portion 20 and reaching the interface 30b. If the ridge portion 30c becomes rounded during the manufacturing process of the optical semiconductor element 100, there is a risk that the light L output from the light-emitting portion 20 will be reflected at the ridge portion 30c and return to the light-emitting portion 20. In this respect, according to this modified version, even if the ridge portion 30c becomes rounded, the light L output from the light-emitting portion 20 will not be reflected at the ridge portion 30c, thus avoiding such an undesirable event.

[0058] Figure 15 is a plan view of the optical semiconductor element 100J (100) of the second modified embodiment. As can be seen by comparing Figure 15 with Figure 8, the optical semiconductor element 100J basically has substantially the same configuration as the optical semiconductor element 100C of the first embodiment. However, in this modified embodiment, the valley line portion 30d is shifted in the Y direction (or the opposite direction of the Y direction) with respect to the optical axis center Co of the light L output from the light-emitting portion 20 and reaching the interface 30b. If the valley line portion 30d becomes rounded during the manufacturing process of the optical semiconductor element 100, there is a risk that the light L output from the light-emitting portion 20 will be reflected at the valley line portion 30d and return to the light-emitting portion 20. In this respect, according to this modified embodiment, even if the valley line portion 30d becomes rounded, the light L output from the light-emitting portion 20 will not be reflected at the valley line portion 30d, thus avoiding such an undesirable event.

[0059] Figure 16 is a plan view of the optical semiconductor element 100K (100) of the third modified embodiment. As can be seen by comparing Figure 16 with Figure 2, the optical semiconductor element 100K basically has substantially the same configuration as the optical semiconductor element 100A of the first embodiment. However, in this modified embodiment, a trench 51 (50) substantially similar to that of the optical semiconductor element 100E of the fifth embodiment is provided between the light-emitting part 20 and the light-receiving part 30. In this modified embodiment, the light-emitting part 20 and the ridge part 30c are aligned in the X direction. Therefore, if there were no trench 51, there would be a risk that the light L output from the light-emitting part 20 would reach the ridge part 30c. In this modified embodiment, the light L output from the light-emitting part 20 can be refracted by the trench 51 extending in the D4 direction which is inclined with respect to the Y direction. This makes it possible to shift the optical axis center Co of the light L that has reached the interface 30b in the opposite direction to the Y direction relative to the ridge part 30c. Therefore, the same effects as those of the first and second modified examples can be obtained with this modified example as well. Furthermore, by providing a trench 50 that extends in the X direction as it extends in the Y direction, the optical axis center Co of the light L that reaches the interface 30b can be shifted in the Y direction relative to the ridge portion 30c. The same effect can also be obtained when the light receiving portion 30 has a valley portion 30d instead of a ridge portion 30c at the same position in the Y direction.

[0060] [Example of mounting of optical semiconductor element] Figure 17 is a cross-sectional view of a mounting structure 200 in which the optical semiconductor element 100G of the seventh embodiment shown in Figure 12 is flip-chip mounted on a substrate 201. As shown in Figure 17, electrodes 18a and 19a are bonded to electrodes 201a and 201b provided on the substrate 201 via P-type solder 202a and N-type solder 202b, respectively, and are also electrically connected. Flip-chip mounting is highly effective in terms of high integration, miniaturization, thinning, improved luminous efficiency, and improved heat dissipation efficiency compared to other mounting structures such as wire bonding. However, if the optical semiconductor element 100 develops protrusions or warping as described above, there is a risk that problems may arise such as a decrease in the coupling efficiency of the light output from the optical semiconductor element 100 with, for example, an optical functional element. In this regard, in the optical semiconductor element 100 of each embodiment described above, protrusions and warping can be suppressed, thereby preventing problems such as a decrease in coupling efficiency.

[0061] Although embodiments and modifications of the present invention have been illustrated above, these embodiments and modifications are merely examples and are not intended to limit the scope of the invention. The above embodiments and modifications can be implemented in various other forms, and various omissions, substitutions, combinations, and changes can be made without departing from the spirit of the invention. Furthermore, each configuration, shape, and other specifications (structure, type, orientation, model, size, length, width, thickness, height, number, arrangement, position, material, etc.) can be modified as appropriate.

[0062] For example, in the above embodiments and modifications, the second direction was the crystal orientation [0-11] direction, but it is not limited to this, and may be the crystal orientation [01-1] direction. Also, in the above embodiments and modifications, the third direction was the crystal orientation [0-1-1] direction, but it is not limited to this, and may be the crystal orientation

[011] direction.

[0063] Furthermore, the interface (cutting line) may be gently curved or a curved surface.

[0064] This invention can be used in substrate assemblies and intervening components.

[0065] 10...Laminate 10a...Top surface 10b...Bottom surface 10c...Recess 10c1...Bottom surface 11...Substrate 12...Lower cladding layer (first cladding layer) 13...Lower blocking layer (current blocking layer) 14...Upper blocking layer (current blocking layer) 15...Upper cladding layer (second cladding layer) 16...Contact layer 17a...Active layer 17b...Absorption layer 18a, 18b, 19a, 19b...Electrodes 20...Light-emitting part 20a...Mesa structure (first mesa structure) 30a...Mesa structure (second mesa structure) 20b...Interface 30b...Interface (gradient part) 30, 30A, 30B, 30C, 30F...Light-receiving part 30c...Ridge part 30d...Valley part 41, 42...Embedding layer 50, 51, 52...Trench 100, 100A, 100B, 100C, 100D, 100E, 100F, 100G, 100H, 100I, 100J, 100K...Optical semiconductor element 101...Pair D4...Direction (fourth direction) L...Light VLa, VLb...Cutting line X...Direction (second direction) Y...Direction (third direction, fourth direction) Z...Direction (first direction) θ1, θ2...Angular difference

Claims

1. A light-emitting section having a first mesa structure including a first cladding layer, an active layer, and a second cladding layer stacked in a first direction, and emitting light in a second direction intersecting the first direction; a light-receiving section having a second mesa structure spaced in the second direction from the first mesa structure including the first cladding layer, an absorbent layer made of the same material as the active layer, and the second cladding layer stacked in the first direction, and receiving light emitted from the light-emitting section; and an embedded layer including a current-blocking layer, provided between the first mesa structure and the second mesa structure, and at positions adjacent to the first and second mesa structures in a third direction intersecting the first and second directions, and at positions adjacent to the opposite direction of the third direction, respectively, wherein the interface of the second mesa structure between the light-emitting section and the embedded layer interposed therebetween has an inclined portion in which, within the light-receiving range of the light emitted from the light-emitting section, the cutting line in the cross section intersecting the first direction is inclined at a predetermined angle with respect to the second direction. The first direction is the crystal orientation [100] direction, the second direction is the crystal orientation [0-11] direction or the crystal orientation [01-1] direction, the third direction is the crystal orientation [0-1-1] direction or the crystal orientation [011] direction, and the absolute value of the predetermined acute angle is 35° ± 30°, an optical semiconductor element.

2. The optical semiconductor element according to claim 1, wherein a trench is provided between the light-emitting portion and the light-receiving portion, which is open in the first direction and extends in a fourth direction intersecting the first direction and the second direction.

3. The optical semiconductor element according to claim 2, wherein the fourth direction is inclined with respect to the third direction.

4. The optical semiconductor element according to claim 3, wherein the absolute value of the acute angle difference between the fourth direction and the third direction is greater than 0° and 18° or less.

5. The optical semiconductor element according to any one of claims 1 to 4, wherein a plurality of pairs, each having a light-emitting unit and a light-receiving unit that receives light output by the light-emitting unit, are arranged in a row at intervals in the third direction.

6. The optical semiconductor element according to claim 1, wherein the interface has a ridge portion protruding in the direction opposite to the second direction, or a valley portion recessed in the direction opposite to the second direction, and the ridge portion or the valley portion is offset from the optical axis center of the light output from the light-emitting portion and reaching the interface in the third direction or the direction opposite to the third direction.

7. A light-emitting section having a first mesa structure including a first cladding layer, an active layer, and a second cladding layer stacked in a first direction, and emitting light in a second direction intersecting the first direction; a light-receiving section having a second mesa structure spaced in the second direction from the first mesa structure including the first cladding layer, an absorbent layer made of the same material as the active layer, and the second cladding layer stacked in the first direction, and receiving light emitted from the light-emitting section; and an embedded layer including a current-blocking layer, provided between the first mesa structure and the second mesa structure, and at positions adjacent to the first mesa structure and the second mesa structure in a third direction intersecting the first and second directions, and at positions adjacent to the opposite direction of the third direction, respectively, wherein the interface of the second mesa structure between the light-emitting section and the embedded layer interposed therebetween has an inclined portion in which, within the light-receiving range of the light emitted from the light-emitting section, the cutting line in the cross section intersecting the first direction is inclined at a predetermined angle with respect to the second direction. A method for manufacturing an optical semiconductor device, wherein the first direction is the crystal orientation [100] direction, the second direction is the crystal orientation [0-11] direction or the crystal orientation [01-1] direction, the third direction is the crystal orientation [0-1-1] direction or the crystal orientation [011] direction, and the absolute value of the predetermined acute angle is 35° ± 30°, comprising: a step of forming a laminate by stacking the first cladding layer, the active layer, the absorption layer, and the second cladding layer on a substrate; a step of forming the first mesa structure and the second mesa structure by etching the laminate to form recesses; and a step of forming the embedded layer between the first mesa structure and the second mesa structure, and at positions adjacent to the first mesa structure and the second mesa structure in the third direction and the opposite direction to the third direction, respectively, so as to fill the recesses.

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