Semiconductor device and method for manufacturing semiconductor device
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- ROHM CO LTD
- Filing Date
- 2026-01-19
- Publication Date
- 2026-08-06
Smart Images
Figure JP2026001477_06082026_PF_FP_ABST
Abstract
Description
Semiconductor device and method for manufacturing a semiconductor device
[0001] The present disclosure relates to a semiconductor device and a method for manufacturing a semiconductor device.
[0002] Patent Document 1 discloses a diode chip, which is an example of a conventional semiconductor element. The diode chip disclosed in this document has a semiconductor body and two electrodes disposed on one side of the semiconductor body. When the diode chip is used as a component of a semiconductor device, the diode chip is mounted on, for example, two leads. The two electrodes and the two leads are individually connected by, for example, two wires.
[0003] Japanese Unexamined Patent Application Publication No. 2021-57493
[0004] [Summary] In a semiconductor device, an electrical capacitance component may exist unintentionally. The larger the capacitance component, the more likely it is to inhibit the proper operation of the semiconductor device.
[0005] One problem of the present disclosure is to provide a semiconductor device improved from the prior art. In particular, in view of the above circumstances, one problem of the present disclosure is to provide a semiconductor device capable of reducing the capacitance component and a method for manufacturing such a semiconductor device.
[0006] The semiconductor device provided by the first aspect of the present disclosure includes a semiconductor body having a semiconductor body main surface facing one side in a first direction and a semiconductor body back surface facing the other side, a semiconductor element having a first electrode and a second electrode disposed on the semiconductor body main surface, a first conduction portion facing the semiconductor body back surface in the first direction and conducting to the first electrode, a second conduction portion conducting to the second electrode, an insulating layer interposed between the semiconductor body back surface and the first conduction portion, and a bonding layer interposed between the insulating layer and the first conduction portion.
[0007] A method for manufacturing a semiconductor device provided by a second aspect of this disclosure comprises the steps of: preparing a semiconductor wafer; forming a plurality of first electrodes and a plurality of second electrodes on the main surface of the semiconductor body of the semiconductor wafer; forming an intermediate insulating layer on the back surface of the semiconductor body of the semiconductor wafer; forming an intermediate junction layer on the intermediate insulating layer; cutting the semiconductor wafer, the intermediate insulating layer and the intermediate junction layer together to form a plurality of semiconductor elements, each having the first electrode, the second electrode and a semiconductor body; a plurality of insulating layers that individually cover the back surface of the semiconductor body of the plurality of semiconductor elements; a plurality of junction layers that individually cover the plurality of insulating layers; joining a first conductive portion to the junction layer; and making the first electrode and the first conductive portion electrically conductive, and the second electrode and the second conductive portion electrically conductive.
[0008] Other features and advantages of this disclosure will become more apparent from the detailed description below, with reference to the accompanying drawings.
[0009] Figure 1 is a plan view showing a semiconductor device according to the first embodiment of the present disclosure. Figure 2 is a partial plan view showing a semiconductor device according to the first embodiment of the present disclosure. Figure 3 is a cross-sectional view along the line III-III in Figure 1. Figure 4 is a partially enlarged cross-sectional view showing a semiconductor device according to the first embodiment of the present disclosure. Figure 5 is a partial bottom view showing an example of a semiconductor element of the semiconductor device according to the first embodiment of the present disclosure. Figure 6 is a partial cross-sectional view showing a method for manufacturing a semiconductor device according to the first embodiment of the present disclosure. Figure 7 is a partial cross-sectional view showing a method for manufacturing a semiconductor device according to the first embodiment of the present disclosure. Figure 8 is a partial cross-sectional view showing a method for manufacturing a semiconductor device according to the first embodiment of the present disclosure. Figure 9 is a partial cross-sectional view showing a method for manufacturing a semiconductor device according to the first embodiment of the present disclosure. Figure 10 is a partial cross-sectional view showing a method for manufacturing a semiconductor device according to the first embodiment of the present disclosure. Figure 11 is a partial cross-sectional view showing a method for manufacturing a semiconductor device according to the first embodiment of the present disclosure. Figure 12 is a partial bottom view showing another example of an insulating layer of the semiconductor device according to the first embodiment of the present disclosure. Figure 13 is a partial bottom view showing another example of an insulating layer of the semiconductor device according to the first embodiment of the present disclosure. Figure 14 is a partial bottom view showing another example of an insulating layer of the semiconductor device according to the first embodiment of the present disclosure. Figure 15 is a partial bottom view showing another example of the insulating layer of a semiconductor device according to the first embodiment of the present disclosure. Figure 16 is a partially enlarged cross-sectional view showing a first modification of the semiconductor device according to the first embodiment of the present disclosure. Figure 17 is a partial plan view showing a semiconductor device according to the second embodiment of the present disclosure. Figure 18 is a cross-sectional view along the line XVIII-XVIII in Figure 17. Figure 19 is a cross-sectional view showing a semiconductor device according to the third embodiment of the present disclosure. Figure 20 is a cross-sectional view showing a semiconductor device according to the fourth embodiment of the present disclosure.
[0010] [Detailed Description] Preferred embodiments of this disclosure will be described below with reference to the drawings.
[0011] The terms "first," "second," "third," etc., used in this disclosure are for identification purposes only and are not intended to assign any order to the objects.
[0012] In this disclosure, "object A is formed on object B" and "object A is formed on object B" include, unless otherwise specified, "object A is directly formed on object B" and "object A is formed on object B with another object interposed between object A and object B." Similarly, "object A is located on object B" and "object A is located on object B" include, unless otherwise specified, "object A is directly located on object B" and "object A is located on object B with another object interposed between object A and object B." Similarly, "object A is located on object B" includes, unless otherwise specified, "object A is located on object B in contact with object B" and "object A is located on object B with another object interposed between object A and object B." Unless otherwise specified, "object A overlaps with object B when viewed in a certain direction" includes "object A overlapping all of object B" and "object A overlapping a part of object B." In this disclosure, "a surface A facing direction B (one or the other side of it)" is not limited to the case where the angle of surface A with respect to direction B is 90°, but also includes the case where surface A is inclined with respect to direction B.
[0013] Figures 1 to 5 show a semiconductor device according to the first embodiment of the present disclosure. The semiconductor device A1 of this embodiment comprises a semiconductor element 1, an insulating layer 2, a bonding layer 3, a first conductive portion 41, and a second conductive portion 42. The semiconductor device A1 may further comprise a first conductive connection member 51, a second conductive connection member 52, and a sealing resin 6.
[0014] The semiconductor element 1 is a functional element that performs the electrical function of the semiconductor device A1. The specific type of semiconductor element 1 is not limited in any way. The semiconductor element 1 may be, for example, a diode, an LED (Light Emitting Diode), etc. In this embodiment, the semiconductor element 1 is a diode, and moreover, a TVS (Transient Voltage Suppressors) diode.
[0015] The semiconductor element 1 has a semiconductor body 10, a first electrode 11, and a second electrode 12. The semiconductor body 10 includes a semiconductor such as Si. The semiconductor body 10 has a main surface 101 and a back surface 102. The main surface 101 faces one side in the first direction z. The back surface 102 faces the other side in the first direction z. The thickness of the semiconductor body 10 in the first direction z is not limited and may be, for example, 100 μm or more and 150 μm or less.
[0016] The first electrode 11 and the second electrode 12 are arranged on the main surface 101 of the semiconductor body. In this embodiment, one of the first electrode 11 and the second electrode 12 may be an anode electrode and the other may be a cathode electrode. The first electrode 11 and the second electrode 12 may include metals such as Cu (copper), Al (aluminum), Ni (nickel), Au (gold), or alloys thereof. The surfaces of the first electrode 11 and the second electrode 12 may be provided with a metal layer formed by a method such as plating.
[0017] A functional part that functions as a diode is incorporated into the main surface 101 side of the semiconductor body 10. Such a semiconductor element 1 is a lateral structure element in which current flows between the first electrode 11 and the second electrode 12 in a direction intersecting the first direction z (the second direction x in the illustrated example).
[0018] The first conductive portion 41 faces the back surface 102 of the semiconductor body in the first direction z. Viewed in the first direction z, the first conductive portion 41 and the semiconductor body 10 overlap by at least a portion of each. The first conductive portion 41 is electrically connected to the first electrode 11. The specific configuration of the first conductive portion 41 is not limited in any way. In this embodiment, the first conductive portion 41 is a lead. The first conductive portion 41 may include metals such as Cu (copper), Ni (nickel), Fe (iron), or alloys thereof.
[0019] The first conductive portion 41 may have a first main surface 411 and a first back surface 412. The first main surface 411 faces one side in the first direction z and faces the back surface 102 of the semiconductor body. The first back surface 412 faces the other side in the first direction z and is exposed to the outside. The first back surface 412 can be used as a mounting terminal when mounting the semiconductor device A1 on a circuit board or the like.
[0020] The second conductive portion 42 is electrically connected to the second electrode 12. The specific configuration of the second conductive portion 42 is not limited in any way. In this embodiment, the second conductive portion 42 is a lead. The second conductive portion 42 may include metals such as Cu (copper), Ni (nickel), Fe (iron), or alloys thereof. In this embodiment, the second conductive portion 42 faces the back surface 102 of the semiconductor body in the first direction z. Viewed in the first direction z, the second conductive portion 42 and the semiconductor body 10 overlap by at least a portion of each.
[0021] The second conductive portion 42 may have a second main surface 421 and a second back surface 422. The second main surface 421 faces one side in the first direction z and, in this embodiment, faces the back surface 102 of the semiconductor body. The second back surface 422 faces the other side in the first direction z and is exposed to the outside. The second back surface 422 can be used as a mounting terminal when mounting the semiconductor device A1 on a circuit board or the like.
[0022] The insulating layer 2 is interposed between the back surface 102 of the semiconductor body and the first conductive portion 41. In this embodiment, the insulating layer 2 may also be interposed between the main surface 101 of the semiconductor body and the first conductive portion 41 and the second conductive portion 42. The insulating layer 2 is made of an insulating material and may include, for example, a thermosetting resin, silicon dioxide, etc. If the insulating layer 2 includes a thermosetting resin, it may include, for example, an epoxy resin. The thickness of the insulating layer 2 in the first direction z is not limited in any way and may be, for example, 10 μm or more and 100 μm or less. In this example, the insulating layer 2 is in direct contact with the back surface 102 of the semiconductor body. Unlike this example, the insulating layer 2 may be provided on the back surface 102 of the semiconductor body via, for example, another bonding layer.
[0023] The size, shape, and position of the insulating layer 2 are not limited in any way. The insulating layer 2 may cover the entire back surface 102 of the semiconductor body, or it may cover only a part of the back surface 102 of the semiconductor body. The insulating layer 2 may contain only one region, or it may contain multiple regions. Figure 5 is a bottom view of the semiconductor element 1 and the insulating layer 2 as seen from the other side in the first direction z. In this figure, dot hatching is applied to the insulating layer 2 for ease of understanding. In this example, the insulating layer 2 covers the entire back surface 102 of the semiconductor body.
[0024] The bonding layer 3 is interposed between the insulating layer 2 and the first conductive portion 41. That is, the bonding layer 3 bonds the insulating layer 2 and the first main surface 411. In this example, the bonding layer 3 is interposed between the insulating layer 2 and the first conductive portion 41 and the second conductive portion 42. That is, in this example, the bonding layer 3 bonds the insulating layer 2 and the first main surface 411 and the second main surface 421. The thickness of the bonding layer 3 in the first direction z is not limited in any way and may be, for example, 8 μm or more and 80 μm or less. The specific configuration of the bonding layer 3 is not limited in any way and may be, for example, a die attach film (DAF) adhesive.
[0025] In this example, the material of the insulating layer 2 may be harder than the material of the bonding layer 3. The thickness of the insulating layer 2 in the first direction z may be greater than the thickness of the bonding layer 3 in the first direction z. The thickness of the insulating layer 2 in the first direction z may be 1.25 times or more and 5 times or less the thickness of the bonding layer 3 in the first direction z.
[0026] The semiconductor body 10 has a plurality of semiconductor body sides 103. The plurality of semiconductor body sides 103 face in a direction intersecting the first direction z, and in the illustrated example, they face in the second direction x or the third direction y. The insulating layer 2 has a plurality of insulating layer sides 23. The plurality of insulating layer sides 23 face in a direction intersecting the first direction z, and in the illustrated example, they face in the second direction x or the third direction y. The junction layer 3 has a plurality of junction layer sides 33. The plurality of junction layer sides 33 face in a direction intersecting the first direction z, and in the illustrated example, they face in the second direction x or the third direction y.
[0027] As shown in Figure 4, in this example, the semiconductor body side surface 103 and the insulating layer side surface 23 may be flush with each other. The bonding layer side surface 33 may be flush with the insulating layer side surface 23. Such a configuration can be realized, for example, when the semiconductor device A1 is manufactured by the manufacturing method described later. As shown in Figure 4, with a configuration in which the semiconductor body side surface 103, the insulating layer side surface 23, and the bonding layer side surface 33 are flush with each other, stress concentration at these laminated interfaces can be suppressed, and adhesion with the sealing resin 6 can be improved, thereby improving moisture resistance and reliability.
[0028] The first conductive connecting member 51 is connected to the first electrode 11 and the first conductive portion 41, and makes them electrically connected. The second conductive connecting member 52 is connected to the second electrode 12 and the second conductive portion 42, and makes them electrically connected. The specific configurations of the first conductive connecting member 51 and the second conductive connecting member 52 are not limited in any way. In this example, the first conductive connecting member 51 and the second conductive connecting member 52 may be wires containing metals such as Au (gold), Cu (copper), or alloys thereof. The first conductive connecting member 51 is connected to the first electrode 11 and the first main surface 411. The second conductive connecting member 52 is connected to the second electrode 12 and the second main surface 421.
[0029] The sealing resin 6 covers the semiconductor element 1, the insulating layer 2, the bonding layer 3, a part of the first conductive portion 41, a part of the second conductive portion 42, the first conductive connecting member 51, and the second conductive connecting member 52. The sealing resin 6 includes an insulating resin such as epoxy resin. This insulating resin may be opaque, translucent, or transparent. If the semiconductor element 1 is a TVS (Transient Voltage Suppressors) diode, the sealing resin 6 may include an opaque insulating resin. If the semiconductor element 1 is an LED (Light Emitting Diode), the sealing resin 6 may include a transparent insulating resin. The specific configuration of the sealing resin 6 is not limited in any way, and in the illustrated example, the sealing resin 6 may have a resin main surface 61, a resin back surface 62, and a plurality of resin side surfaces 63.
[0030] The main resin surface 61 faces one side in the first direction z. The resin back surface 62 faces the other side in the first direction z. The multiple resin side surfaces 63 face directions intersecting the first direction z, and in the illustrated example, they face the second direction x or the third direction y. The sealing resin 6 has four resin side surfaces 63. That is, in the illustrated example, the semiconductor device A1 is a rectangular parallelepiped. The first back surface 412 and the second back surface 422 may be exposed from the resin back surface 62.
[0031] Next, an example of a method for manufacturing the semiconductor device A1 will be described below with reference to Figures 6 to 11.
[0032] The manufacturing method for the semiconductor device A1 in this example comprises the steps of: preparing a semiconductor wafer 10A; forming a plurality of first electrodes 11 and second electrodes 12 on the main semiconductor body surface 101 of the semiconductor wafer 10A; forming an intermediate insulating layer 2A on the back surface 102 of the semiconductor body of the semiconductor wafer 10A; forming an intermediate bonding layer 3A on the intermediate insulating layer 2A; cutting the semiconductor wafer 10A, the intermediate insulating layer 2A and the intermediate bonding layer 3A together to form a plurality of semiconductor elements 1, each having a first electrode 11, a second electrode 12 and a semiconductor body 10; a plurality of insulating layers 2 that individually cover the back surface 102 of the semiconductor body of the plurality of semiconductor elements 1; a plurality of bonding layers 3 that individually cover the plurality of insulating layers 2; bonding a first conductive portion 41 and a second conductive portion 42 to the bonding layer 3; and making the first electrode 11 and the first conductive portion 41 electrically conductive, and the second electrode 12 and the second conductive portion 42 electrically conductive.
[0033] First, as shown in Figure 6, a semiconductor wafer 10A is prepared. The semiconductor wafer 10A contains a semiconductor such as Si. Next, multiple first electrodes 11 and multiple second electrodes 12 are formed on the main semiconductor surface 101 of the semiconductor wafer 10A. Prior to forming the multiple first electrodes 11 and multiple second electrodes 12, for example, a functional portion that functions as a diode is formed on the part of the semiconductor wafer 10A that is on the main semiconductor surface 101 side.
[0034] Next, as shown in Figure 7, the semiconductor wafer 10A may be polished from the back surface 102 side of the semiconductor body. This polishing may be performed, for example, by polishing the semiconductor wafer 10A from the back surface 102 side of the semiconductor body with a polishing tool Ps. As a result, the thickness of the semiconductor wafer 10A in the first direction z may be, for example, 100 μm or more and 150 μm or less.
[0035] Next, as shown in Figure 8, an insulating material 20A is provided on the back surface 102 of the semiconductor body. For example, an insulating material 20A containing an epoxy resin component may be applied to the back surface 102 of the semiconductor body. Then, by heating the insulating material 20A, an intermediate insulating layer 2A is formed, as shown in Figure 9.
[0036] Next, as shown in Figure 10, an intermediate bonding layer 3A is formed. The intermediate bonding layer 3A may be, for example, a die attach film (DAF) adhesive, and may be attached to the intermediate insulating layer 2A.
[0037] Next, as shown in Figure 11, the semiconductor wafer 10A, the intermediate insulating layer 2A, and the intermediate junction layer 3A are cut together. This cutting is performed, for example, using a dicing blade Db. In the illustrated example, the semiconductor wafer 10A, the intermediate insulating layer 2A, and the intermediate junction layer 3A are cut by rotating the dicing blade Db and moving it from one side to the other in the first direction z. This forms a plurality of semiconductor elements 1, each having a first electrode 11, a second electrode 12, and a semiconductor body 10; a plurality of insulating layers 2 that individually cover the back surface 102 of the semiconductor body of the plurality of semiconductor elements 1; and a plurality of junction layers 3 that individually cover the plurality of insulating layers 2. As a result of this cutting, as shown in Figure 4, the semiconductor body side surface 103, the insulating layer side surface 23, and the junction layer side surface 33 become flush with each other.
[0038] Next, the first conductive portion 41 and the second conductive portion 42 are joined to the bonding layer 3. Specifically, they are joined by pressing the first main surface 411 and the first back surface 412 against the bonding layer 3.
[0039] Next, the first electrode 11 and the first conductive portion 41 are connected, and the second electrode 12 and the second conductive portion 42 are connected. Specifically, for example, the first conductive connecting member 51 is connected to the first electrode 11 and the first main surface 411, and the second conductive connecting member 52 is connected to the second electrode 12 and the second main surface 421. After this, the semiconductor device A1 is obtained by forming a sealing resin 6, etc.
[0040] Next, the operation of semiconductor device A1 will be explained.
[0041] The semiconductor element 1 has a first electrode 11 and a second electrode 12 located on the main surface 101 of the semiconductor body. When the semiconductor device A1 is in operation, current flows through the semiconductor body 10 in a direction intersecting the first direction z (for example, the second direction x). When this current flows, a potential difference may be generated between the semiconductor body 10 and the first conductive portion 41. As a result, an electrical capacitive component may exist between the semiconductor body 10 and the first conductive portion 41. The magnitude of this capacitive component is inversely proportional to the distance d between the back surface 102 of the semiconductor body and the first main surface 411.
[0042] As shown in Figures 3 and 4, the semiconductor device A1 includes an insulating layer 2 interposed between the back surface 102 of the semiconductor body and the first conductive portion 41, and a bonding layer 3 interposed between the insulating layer 2 and the first conductive portion 41. This allows the distance d between the back surface 102 of the semiconductor body and the first main surface 411 to be increased compared to, for example, a semiconductor device without the insulating layer 2. Therefore, according to this embodiment, the capacitance component of the semiconductor device A1 can be reduced.
[0043] In this embodiment, the back surface 102 of the semiconductor body faces the first main surface 411 of the first conductive portion 41 and the second main surface 421 of the second conductive portion 42. The insulating layer 2 and the bonding layer 3 are interposed between the back surface 102 of the semiconductor body and the first main surface 411 and the second main surface 421. This makes it possible to reduce the capacitance component when a potential difference may occur between the semiconductor body 10 and the first conductive portion 41 and the second conductive portion 42.
[0044] If the material of the insulating layer 2 is harder than the material of the bonding layer 3 (for example, having a relatively large elastic modulus), for example, when the semiconductor element 1 and the first conduction portion 41 are joined, if pressure is applied to the insulating layer 2, it is possible to suppress the reduction in the thickness of the insulating layer 2. Therefore, it is preferable for reducing the capacitance component of the semiconductor device A1. Adopting an epoxy resin as the material of the insulating layer 2 is preferable for making the insulating layer 2 surely harder than the bonding layer 3.
[0045] If the thickness of the insulating layer 2 in the first direction z is larger than the thickness of the bonding layer 3 in the first direction z, it is possible to ensure a larger distance d. Therefore, it is preferable for reducing the capacitance component of the semiconductor device A1. According to the configuration in which the thickness of the insulating layer 2 in the first direction z is 1.25 times or more and 5 times or less the thickness of the bonding layer 3 in the first direction z, it is possible to avoid unnecessarily increasing the size of the semiconductor device A1 in the first direction z while sufficiently ensuring the distance d.
[0046] If the insulating layer 2 covers all of the back surface 102 of the semiconductor body, it is possible to uniformly maintain the distance d over the entire surface of the back surface 102 of the semiconductor body, which is preferable for reducing the capacitance component.
[0047] FIGS. 12 to 20 show other embodiments of the present disclosure. In these figures, the same or similar elements as those in the above embodiment are denoted by the same reference numerals as those in the above embodiment. The configurations of each part in each modification and each embodiment can be appropriately combined with each other within a range that does not cause a technical contradiction.
[0048] FIGS. 12 to 15 show other examples of the insulating layer 2 in the semiconductor device A1. In these figures, for convenience of understanding, the insulating layer 2 is hatched with dots as in FIG. 5.
[0049] In the example shown in FIG. 12, when viewed in the first direction z, the insulating layer 2 is smaller than the back surface 102 of the semiconductor body. The side surface 23 of the insulating layer is located inside the side surface 103 of the semiconductor body. [[ID==16]]
[0050] In the example shown in Figure 13, the insulating layer 2 includes multiple regions 21. In this example, the insulating layer 2 includes two regions 21. The two regions 21 are separated in the second direction x. The two regions 21 overlap the first main surface 411 and the second main surface 421 respectively when viewed in the first direction z.
[0051] In the example shown in Figure 14, the insulating layer 2 includes multiple regions 21. In this example, the insulating layer 2 includes two regions 21. The two regions 21 are separated in the third direction y. The two regions 21 overlap the first main surface 411 and the second main surface 421, respectively, when viewed in the first direction z.
[0052] In the example shown in Figure 15, the insulating layer 2 includes multiple regions 21. In this example, the insulating layer 2 includes six regions 21. The three regions 21 are spaced apart in the third direction y. Three of the regions 21 overlap the first main surface 411 when viewed in the first direction z. The other three regions 21 overlap the second main surface 421 when viewed in the first direction z.
[0053] As can be seen in the examples shown in Figures 12 to 15, it is possible to secure a larger distance d, thereby reducing the capacitance component of the semiconductor device A1. As can be seen from these examples, the specific configuration of the insulating layer 2 is not limited in any way.
[0054] Figure 16 shows a first modified example of semiconductor device A1. In this modified semiconductor device A11, the bonding layer side surface 33 is not flush with the insulating layer side surface 23. The bonding layer side surface 33 protrudes outward from the insulating layer side surface 23 in a direction intersecting the first direction z (the second direction x in the illustrated example). Such a structure can be formed, for example, when the bonding layer 3 is deformed due to the semiconductor element 1 being strongly pressed against the first conductive portion 41 and the second conductive portion 42.
[0055] This modified example also reduces the capacitance component of the semiconductor device A11. As can be seen from this modified example, the specific configuration of the bonding layer 3 is not limited in any way.
[0056] Figures 17 and 18 show a semiconductor device according to a second embodiment of the present disclosure. In the semiconductor device A2 of this embodiment, the first conductive connecting member 51 and the second conductive connecting member 52 are different from the first conductive connecting member 51 and the second conductive connecting member 52 of the semiconductor device A1.
[0057] The first conductive connecting member 51 and the second conductive connecting member 52 of this embodiment are formed by cutting and bending a metal plate material. The first conductive connecting member 51 and the second conductive connecting member 52 may include metals such as Cu (copper), Ni (nickel), Fe (iron), or alloys thereof. The first conductive connecting member 51 and the second conductive connecting member 52 are electrically joined to the first electrode 11, the second electrode 12, the first main surface 411, and the second main surface 421 by, for example, a conductive bonding material 59. The conductive bonding material 59 may be, for example, solder or Ag paste.
[0058] This embodiment also makes it possible to reduce the capacitance component of the semiconductor device A2. As can be seen from this modified example, the specific configurations of the first conductive connection member 51 and the second conductive connection member 52 are not limited in any way.
[0059] Figure 19 shows a semiconductor device according to a third embodiment of the present disclosure. In semiconductor device A3 of this embodiment, the back surface 102 of the semiconductor body faces the first main surface 411 but does not face the second main surface 421. The insulating layer 2 and the bonding layer 3 are interposed between the back surface 102 of the semiconductor body and the first main surface 411, but not between the back surface 102 of the semiconductor body and the second main surface 421. Viewed in the first direction z, the semiconductor element 1, the insulating layer 2, and the bonding layer 3 each overlap the first main surface 411 and are separated from the second main surface 421.
[0060] This embodiment also makes it possible to reduce the capacitance component of semiconductor device A3. As can be seen from this embodiment, even if the semiconductor body back surface 102, insulating layer 2, and bonding layer 3 are configured not to overlap with the second main surface 421 when viewed in the first direction z, a capacitance component may exist between the semiconductor body back surface 102 and the first main surface 411. According to this embodiment, this capacitance component can be reduced.
[0061] Figure 20 shows a semiconductor device according to a fourth embodiment of the present disclosure. In the semiconductor device A4 of this embodiment, the first conductive portion 41 and the second conductive portion 42 are included as components of the conductive support member 4.
[0062] The conductive support member 4 includes a first conductive portion 41 and a second conductive portion 42 and a base material 40, and is configured as, for example, a wiring board. The base material 40 is an insulating material containing, for example, glass epoxy resin. The first conductive portion 41 and the second conductive portion 42 are metal layers containing, for example, Cu (copper) or Au (gold), and are arranged on one side of the base material 40 in the first direction z. In the illustrated example, the semiconductor element 1, the insulating layer 2, and the bonding layer 3 overlap with the first conductive portion 41 and are separated from the second conductive portion 42 when viewed in the first direction z. In a different configuration, the semiconductor element 1, the insulating layer 2, and the bonding layer 3 may overlap with the first conductive portion 41 and the second conductive portion 42.
[0063] This embodiment makes it possible to reduce the capacitance component of semiconductor device A4. As can be seen from this embodiment, the specific configuration of the first conductive portion 41 and the second conductive portion 42 is not limited in any way.
[0064] The semiconductor device and method for manufacturing the semiconductor device described herein are not limited to the embodiments described above. The specific configuration of the semiconductor device and method for manufacturing the semiconductor device described herein can be modified in various ways.
[0065] This disclosure includes embodiments described in the following appendices. Appendix 1. A semiconductor device (A1) comprising: a semiconductor body (10) having a semiconductor body main surface (101) facing one side in a first direction (z) and a semiconductor body back surface (102) facing the other side; a first electrode (11) and a second electrode (12) disposed on the semiconductor body main surface (101); a first conductive portion (41) facing the semiconductor body back surface (102) in the first direction (z) and conductive to the first electrode (11); a second conductive portion (42) conductive to the second electrode (12); an insulating layer (2) interposed between the semiconductor body back surface (102) and the first conductive portion (41); and a junction layer (3) interposed between the insulating layer (2) and the first conductive portion (41). Appendix 2. The semiconductor device (A1) according to Appendix 1, wherein the second conductive portion (42) faces the back surface (102) of the semiconductor body in the first direction (z), the insulating layer (2) is interposed between the back surface (102) of the semiconductor body and the first conductive portion (41), and between the back surface (102) of the semiconductor body and the second conductive portion (42), and the bonding layer (3) is interposed between the insulating layer (2) and the first conductive portion (41), and between the insulating layer (2) and the second conductive portion (42). Appendix 3. The semiconductor device (A1) according to Appendix 1 or 2, wherein the material of the insulating layer (2) is harder than the material of the bonding layer (3). Appendix 4. The semiconductor device (A1) according to any one of Appendix 1 to 3, wherein the insulating layer (2) contains epoxy resin. Appendix 5. The semiconductor device (A1) according to any one of the appendices 1 to 4, wherein the thickness of the insulating layer (2) in the first direction (z) is greater than the thickness of the bonding layer (3) in the first direction (z). Appendix 6. The semiconductor device (A1) according to appendice 5, wherein the thickness of the insulating layer (2) in the first direction (z) is 1.25 times or more and 5 times or less the thickness of the bonding layer (3) in the first direction (z). Appendix 7. The semiconductor device (A1) according to any one of the appendices 1 to 6, wherein the insulating layer (2) covers the entire back surface (102) of the semiconductor body.Note 8. The semiconductor device (A1) according to Note 7, wherein the semiconductor body (10) has a semiconductor body side surface (103) facing a direction intersecting the first direction (z), the insulating layer (2) has an insulating layer side surface (23) facing a direction intersecting the first direction (z), and the semiconductor body side surface (103) and the insulating layer side surface (23) are flush. Note 9. The semiconductor device (A1) according to Note 8, wherein the junction layer (3) has a junction layer side surface (33) facing a direction intersecting the first direction (z), and the junction layer side surface (33) is flush with the insulating layer side surface (23). Note 10. The semiconductor device (A1) according to any one of Notes 1 to 6, wherein the insulating layer (2) covers only a part of the back surface (102) of the semiconductor body. Note 11. The semiconductor device (A1) according to Note 10, wherein the insulating layer (2) includes a plurality of regions (21) that are separated from each other. Note 12. The semiconductor device (A1) according to any one of Appendix 1 to 11, wherein the insulating layer (2) is in direct contact with the back surface (102) of the semiconductor body. Appendix 13. The semiconductor device (A1) according to any one of Appendix 1 to 12, wherein the first conductive portion (41) and the second conductive portion (42) are metal-containing leads. Appendix 14. The semiconductor device (A1) according to any one of Appendix 1 to 13, comprising a first conductive connecting member (51) connected to the first electrode (11) and the first conductive portion (41), and a second conductive connecting member (52) connected to the second electrode (12) and the second conductive portion (42).Note 15. The process of preparing a semiconductor wafer (10A), forming multiple first electrodes (11) and second electrodes (12) on the main semiconductor body surface (101) of the semiconductor wafer (10A), forming an intermediate insulating layer (2A) on the back surface (102) of the semiconductor body of the semiconductor wafer (10A), forming an intermediate bonding layer (3A) on the intermediate insulating layer (2A), cutting the semiconductor wafer (10A), the intermediate insulating layer (2A), and the intermediate bonding layer (3A) together to form a plurality of semiconductor elements (1), each having the first electrode (11), the second electrode (12), and the semiconductor body (10), a plurality of insulating layers (2) that individually cover the back surface (102) of the semiconductor body of the plurality of semiconductor elements (1), and a plurality of bonding layers (3) that individually cover the plurality of insulating layers (2), and bonding a first conductive portion (41) to the bonding layer (3), A method for manufacturing a semiconductor device (A1), comprising the steps of: making the first electrode (11) and the first conductive portion (41) electrically conductive, and making the second electrode (12) and the second conductive portion (42) electrically conductive.
[0066] A1, A11, A2, A3, A4: Semiconductor device, 1: Semiconductor element, 2: Insulating layer, 2A: Intermediate insulating layer, 3: Bonding layer, 3A: Intermediate bonding layer, 4: Conductive support member, 6: Sealing resin, 10: Semiconductor body, 10A: Semiconductor wafer, 11: First electrode, 12: Second electrode, 20A: Insulating material, 21: Region, 23: Side surface of insulating layer, 33: Side surface of bonding layer, 40: Substrate, 41: First conductive part, 42: Second conductive part, 5 1: First conductive connecting member, 52: Second conductive connecting member, 59: Conductive bonding material, 61: Main resin surface, 62: Back surface of resin, 63: Side surface of resin, 101: Main semiconductor body surface, 102: Back surface of semiconductor body, 103: Side surface of semiconductor body, 411: First main surface, 412: First back surface, 421: Second main surface, 422: Second back surface, Db: Dicing blade, Ps: Polishing tool, x: Second direction, y: Third direction, z: First direction
Claims
1. A semiconductor device comprising: a semiconductor body having a main semiconductor body surface facing one side in a first direction and a back surface facing the other side; a first electrode and a second electrode disposed on the main semiconductor body surface; a first conductive portion facing the back surface of the semiconductor body in the first direction and conductive to the first electrode; a second conductive portion conductive to the second electrode; an insulating layer interposed between the back surface of the semiconductor body and the first conductive portion; and a bonding layer interposed between the insulating layer and the first conductive portion.
2. The semiconductor device according to claim 1, wherein the second conductive portion faces the back surface of the semiconductor body in the first direction, the insulating layer is interposed between the back surface of the semiconductor body and the first conductive portion, and between the back surface of the semiconductor body and the second conductive portion, and the bonding layer is interposed between the insulating layer and the first conductive portion, and between the insulating layer and the second conductive portion.
3. The semiconductor device according to claim 1 or 2, wherein the material of the insulating layer is harder than the material of the bonding layer.
4. The semiconductor device according to any one of claims 1 to 3, wherein the insulating layer comprises an epoxy resin.
5. The semiconductor device according to any one of claims 1 to 4, wherein the thickness of the insulating layer in the first direction is greater than the thickness of the bonding layer in the first direction.
6. The semiconductor device according to claim 5, wherein the thickness of the insulating layer in the first direction is 1.25 times or more and 5 times or less the thickness of the bonding layer in the first direction.
7. The semiconductor device according to any one of claims 1 to 6, wherein the insulating layer covers the entire back surface of the semiconductor body.
8. The semiconductor device according to claim 7, wherein the semiconductor body has a semiconductor body side facing a direction intersecting the first direction, the insulating layer has an insulating layer side facing a direction intersecting the first direction, and the semiconductor body side and the insulating layer side are flush.
9. The semiconductor device according to claim 8, wherein the bonding layer has a bonding layer side surface facing a direction intersecting the first direction, and the bonding layer side surface is flush with the insulating layer side surface.
10. The semiconductor device according to any one of claims 1 to 6, wherein the insulating layer covers only a portion of the back surface of the semiconductor body.
11. The semiconductor device according to claim 10, wherein the insulating layer includes a plurality of regions that are separated from each other.
12. The semiconductor device according to any one of claims 1 to 11, wherein the insulating layer is in direct contact with the back surface of the semiconductor body.
13. The semiconductor device according to any one of claims 1 to 12, wherein the first conductive portion and the second conductive portion are leads containing metal.
14. A semiconductor device according to any one of claims 1 to 13, comprising a first conductive connecting member connected to the first electrode and the first conductive portion, and a second conductive connecting member connected to the second electrode and the second conductive portion.
15. A method for manufacturing a semiconductor device, comprising: a step of preparing a semiconductor wafer; a step of forming a plurality of first electrodes and a plurality of second electrodes on the main surface of the semiconductor body of the semiconductor wafer; a step of forming an intermediate insulating layer on the back surface of the semiconductor body of the semiconductor wafer; a step of forming an intermediate junction layer on the intermediate insulating layer; a step of cutting the semiconductor wafer, the intermediate insulating layer and the intermediate junction layer together to form a plurality of semiconductor elements, each having the first electrode, the second electrode and a semiconductor body, a plurality of insulating layers that individually cover the back surface of the semiconductor body of the plurality of semiconductor elements, and a plurality of junction layers that individually cover the plurality of insulating layers; a step of joining a first conductive portion to the junction layer; and a step of making the first electrode and the first conductive portion electrically conductive, and the second electrode and the second conductive portion electrically conductive.