Processing method and apparatus, and vehicle

WO2026165919A1PCT designated stage Publication Date: 2026-08-13YINWANG INTELLIGENT TECHNOLOGIES CO LTD
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Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Filing Date
2025-02-08
Publication Date
2026-08-13

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Abstract

The present application provides a processing method and apparatus, and a vehicle. The method comprises: acquiring a first duration and the remaining duration of a first gated time slot, wherein the first duration is the total duration of sending packets in M queues, gate flags of the M queues within the first gated time slot are in an enabled state, and M is a positive integer; and when the ratio of the first duration to the remaining duration is less than or equal to a first threshold, sending packets in N queues within the remaining duration, wherein gate flags of the packets in the N queues within the first gated time slot are in a disabled state, and N is a positive integer. By means of the method, the blocking time in a transmission queue for packets that arrive with delay in queues having disabled gate flags can be reduced, thereby optimizing an inherent delay introduced in a Qbv gate scheduling process, and improving bandwidth utilization efficiency.
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Description

Treatment methods, devices and vehicles Technical Field

[0001] This application relates to the field of intelligent vehicles, and more specifically, to a processing method, apparatus, and vehicle. Background Technology

[0002] Time-Sensitive Networking (TSN) is a next-generation network standard based on Ethernet, ensuring the smooth transmission of real-time information in various scenarios within standard Ethernet. Qbv (Time-Based Queue Gating, IEEE 802.1Qbv) is a key scheduling mechanism within the TSN framework. Qbv controls the opening and closing of data queues through a pre-defined gate control list (GCL), allocating specific time windows for different types of data streams within each cycle to ensure that high-priority, time-sensitive data is transmitted within a strict timeframe.

[0003] While Qbv's scheduling mechanism solves the problem of stable communication latency—that is, it avoids interference from other non-critical traffic for critical traffic requiring low latency, thus ensuring relatively stable latency for critical traffic in the network and avoiding unnecessary latency fluctuations—Qbv's scheduling mechanism inevitably introduces inherent latency, thereby reducing bandwidth utilization efficiency. Summary of the Invention

[0004] This application provides a processing method, apparatus, and vehicle that can reduce the blocking time of messages in queues with closed gating flags after they arrive late in the transmission queue, thereby optimizing the inherent latency introduced in the Qbv gating scheduling process and improving bandwidth utilization efficiency.

[0005] In a first aspect, a processing method is provided, comprising: obtaining a first duration and the remaining duration of a first gated time slot, wherein the first duration is the total duration for sending messages in M ​​queues, the gate flags of the M queues are in an open state in the first gated time slot, and M is a positive integer; and, if the ratio of the first duration to the remaining duration is less than or equal to a first threshold, sending messages in N queues within the remaining duration, wherein the gate flags of the N queues are in a closed state in the first gated time slot, and N is a positive integer.

[0006] In one possible implementation, the gating flag of the messages in the N queues is in the open state in the second gating time slot, and the latest time of the second gating time slot is earlier than the earliest time of the first gating time slot, or the latest time of the first gating time slot is earlier than the earliest time of the second gating time slot.

[0007] In one possible implementation, the first gating time slot can be called the open gating time slot for packets in M ​​queues, the first gating time slot can be called the closed gating time slot for packets in N queues, and the second gating time slot can be called the open gating time slot for packets in N queues.

[0008] In one possible implementation, the remaining duration of the first gated time slot may include not only the duration of the actual transmitted data, but also the blank time during which the protection signals do not interfere with each other, i.e., the guard band time.

[0009] In one possible implementation, a ratio of the first duration to the remaining duration that is less than or equal to the first threshold can be understood as: there is idle time within the remaining duration, and the first gated time slot is in a non-congested state. Correspondingly, a ratio of the first duration to the remaining duration that is greater than the first threshold can be understood as: there is no idle time within the remaining duration, and the first gated time slot is in a congested state.

[0010] In this embodiment, when there is idle time within the remaining duration of the first gating time slot, the delayed packets in the N queues are sent within the remaining duration of the first gating time slot. This reduces the blocking time of the packets in the N queues in the sending queue, thereby optimizing the inherent latency introduced in the Qbv gating scheduling process and improving bandwidth utilization efficiency.

[0011] In conjunction with the first aspect, in some implementations of the first aspect, the remaining duration includes a second duration and a third duration, the latest time of the second duration is earlier than the earliest time of the third duration, and the step of sending messages in N queues within the remaining duration includes: sending messages in M ​​queues within the second duration, and sending messages in N queues within the third duration.

[0012] In this embodiment, messages in M ​​queues are sent first during the remaining time of the first gated time slot. After the messages in the M queues are sent, messages in N queues are sent. In this way, messages in N queues can be sent during the idle time of the first gated time slot without changing the sending rules of the messages in the M queues, thereby achieving efficient utilization of the remaining bandwidth in the first gated time slot.

[0013] In conjunction with the first aspect, in some implementations of the first aspect, the N queues include a first queue and a second queue, the priority of messages in the first queue is higher than the priority of messages in the second queue, the third duration includes a fourth duration and a fifth duration, the latest time of the fourth duration is earlier than the earliest time of the fifth duration, and sending messages in the N queues within the third duration includes: sending messages in the first queue within the fourth duration and sending messages in the second queue within the fifth duration.

[0014] In this embodiment of the application, when messages in N queues can be transmitted in order of message priority within the third duration of the first gating time slot, the inherent latency introduced in the Qbv gating scheduling process is optimized, while ensuring that high-priority messages in the N queues are processed first within the third duration.

[0015] In conjunction with the first aspect, in some implementations of the first aspect, before sending messages in the N queues within the remaining time, the method further includes: marking the first gated time slot as non-congested.

[0016] In one possible implementation, the congestion status of the first gated time slot can be marked with a color. For example, marking the first gated time slot with a first color indicates that the time slot is in a non-congested state, and packets from N queues can be transmitted within the remaining time. Alternatively, if the ratio of the first time slot to the remaining time slot is greater than a first threshold, the first gated time slot can be marked with a second color to indicate that the time slot is in a congested state, and packets from N queues cannot be transmitted within the remaining time.

[0017] In one possible implementation, the first color can be green and the second color can be red.

[0018] In one possible implementation, the congestion state of the first gated time slot can be marked by the value of the bit. For example, marking the first gated time slot as "1" indicates that the time slot is in a non-congested state, and marking the first gated time slot as "0" indicates that the time slot is in a congested state.

[0019] In this embodiment of the application, marking the first gated time slot as non-congested can help improve the overall bandwidth utilization. In particular, after the high-priority packets (packets in M ​​queues) have been transmitted, the remaining duration of the first gated time slot can be used to send low-priority packets (packets in N queues), ensuring that important data is transmitted first while avoiding bandwidth waste.

[0020] In conjunction with the first aspect, in some implementations of the first aspect, before obtaining the first duration and the remaining duration of the first gated time slot, the method further includes: obtaining the number of messages in the M queues and the data packet transmission speed of each of the M queues; and determining the first duration based on the number of messages in the M queues and the data packet transmission speed of each queue.

[0021] In one possible implementation, the data packet transmission speed of each of the M queues can be the same or different.

[0022] In this embodiment, the first duration can be determined based on the number of messages in the M queues and the transmission speed of the data packets in each queue, so as to facilitate the determination of whether the first gating time slot is in a congested state based on the first duration, thereby optimizing the inherent delay introduced in the Qbv gating scheduling process.

[0023] In conjunction with the first aspect, in some implementations of the first aspect, before obtaining the first duration and the remaining duration of the first gated time slot, the method further includes: obtaining the length of the messages in the M queues and the bit stream transmission speed of each of the M queues; and determining the first duration based on the length of the messages in the M queues and the proportional stream transmission speed of each queue.

[0024] In one possible implementation, the bit stream transmission speed of each of the M queues can be the same or different.

[0025] In this embodiment of the application, the first duration can be determined based on the message length of M queues and the bit stream transmission speed of each queue, so as to facilitate the determination of whether the first gated time slot is in a congested state based on the first duration, thereby optimizing the inherent delay introduced in the Qbv gated scheduling process.

[0026] Secondly, a processing apparatus is provided, comprising: an acquisition unit and a processing unit; the acquisition unit is configured to acquire a first duration and the remaining duration of a first gated time slot, the first duration being the total duration for sending messages in M ​​queues, wherein the gate flags of the M queues are in an open state in the first gated time slot, and M is a positive integer; the processing unit is configured to send messages in N queues within the remaining duration if the ratio of the first duration to the remaining duration is less than or equal to a first threshold, wherein the gate flags of the N queues are in a closed state in the first gated time slot, and N is a positive integer.

[0027] For a description of the beneficial effects of the second aspect, please refer to the description of the beneficial effects of the first aspect, which will not be repeated here.

[0028] In conjunction with the second aspect, in some implementations of the second aspect, the remaining duration includes a second duration and a third duration, wherein the latest moment of the second duration is earlier than the earliest moment of the third duration; the processing unit is specifically used to send messages in the M queues within the second duration and to send messages in the N queues within the third duration.

[0029] In conjunction with the second aspect, in some implementations of the second aspect, the N queues include a first queue and a second queue, the priority of messages in the first queue is higher than the priority of messages in the second queue, the third duration includes a fourth duration and a fifth duration, the latest time of the fourth duration is earlier than the earliest time of the fifth duration; the processing unit is specifically used to send messages in the first queue within the fourth duration and to send messages in the second queue within the fifth duration.

[0030] In conjunction with the second aspect, in some implementations of the second aspect, the processing unit is further configured to mark the first gated time slot as non-congested.

[0031] In conjunction with the second aspect, in some implementations of the second aspect, the acquisition unit is further configured to acquire the number of messages in the M queues and the data packet transmission speed of each of the M queues; the processing unit is further configured to determine the first duration based on the number of messages in the M queues and the data packet transmission speed of each queue.

[0032] In conjunction with the second aspect, in some implementations of the second aspect, the acquisition unit is further configured to acquire the length of the messages in the M queues and the bit stream transmission speed of each of the M queues; the processing unit is further configured to determine the first duration based on the length of the messages in the M queues and the bit stream transmission speed of each queue.

[0033] Thirdly, a processing apparatus is provided, comprising: at least one processor and a memory, wherein the at least one processor is coupled to the memory for reading and executing instructions in the memory, such that the apparatus implements the method in any of the implementations of the first aspect described above.

[0034] Fourthly, a computer-readable storage medium is provided, the computer-readable storage medium storing program code, which, when run on a computer, causes the computer to perform the method in any of the implementations of the first aspect described above.

[0035] Fifthly, a chip is provided, the chip including circuitry for performing the method in any of the implementations of the first aspect described above.

[0036] Sixthly, a computer program product is provided, the computer product including a computer program that, when the computer program is run by a processor, causes the method in any of the implementations of the first aspect to be executed.

[0037] In a seventh aspect, a vehicle is provided, comprising: the processing device described in any of the second or third aspects above. Attached Figure Description

[0038] Figure 1 is a functional schematic diagram of a vehicle provided in an embodiment of this application;

[0039] Figure 2 is a schematic diagram of transmission gate control based on a gate list according to an embodiment of this application;

[0040] Figure 3 is a schematic diagram illustrating the inherent delay introduced during Qbv scheduling according to an embodiment of this application;

[0041] Figure 4 is a schematic flowchart of a processing method provided in an embodiment of this application;

[0042] Figure 5 is a schematic diagram of an enqueue optimization strategy for a processing method provided in an embodiment of this application;

[0043] Figure 6 is a schematic diagram of a dequeue optimization strategy for a processing method provided in an embodiment of this application;

[0044] Figure 7 is a schematic diagram comparing the gate control state before and after optimization of a processing method provided in an embodiment of this application;

[0045] Figure 8 is a schematic diagram of a processing method provided in an embodiment of this application to optimize the inherent latency in the Qbv scheduling process;

[0046] Figure 9 is a schematic diagram of a processing device provided in an embodiment of this application;

[0047] Figure 10 is a schematic diagram of another processing device provided in an embodiment of this application. Detailed Implementation

[0048] In the description of the embodiments of this application, unless otherwise stated, " / " means "or", for example, A / B can mean A or B; "and / or" in this document is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. In this application, "at least one" means one or more, and "more" means two or more. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or multiple items. For example, at least one of a, b, or c can represent: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple.

[0049] The use of prefixes such as "first" and "second" in this application embodiment is solely for distinguishing different descriptive objects and does not limit the position, order, priority, quantity, or content of the described objects. The use of ordinal numbers and other prefixes to distinguish descriptive objects in this application embodiment does not constitute a limitation on the described objects. The description of the described objects is found in the claims or the context of the embodiments, and the use of such prefixes should not constitute unnecessary restrictions.

[0050] The technical solutions in this application will now be described with reference to the accompanying drawings.

[0051] Figure 1 is a functional schematic diagram of a vehicle provided in an embodiment of this application.

[0052] As shown in Figure 1, the vehicle 100 involved in this application may include multiple subsystems, such as a perception system 120, a computing platform 130, and a clock synchronization module 140. Optionally, the vehicle 100 may include more or fewer subsystems, and each subsystem may include one or more components. In addition, each subsystem and component of the vehicle 100 can be interconnected via wired or wireless means.

[0053] The perception system 120 may include several sensors for sensing information about the environment surrounding the vehicle 100. For example, the perception system 120 may include a positioning system, which may be a global positioning system (GPS), a BeiDou system, or another positioning system. The perception system 120 may include one or more of the following: an inertial measurement unit (IMU), a rain sensor, a humidity and temperature sensor, a lidar, a millimeter-wave radar, an ultrasonic radar, and a camera device.

[0054] Some or all of the functions of vehicle 100 can be controlled by computing platform 130. Computing platform 130 may include processors 131 to 13n (n being a positive integer). A processor is a circuit with signal processing capabilities. In one implementation, the processor can be a circuit with instruction read and execute capabilities, such as a central processing unit (CPU), microprocessor, graphics processing unit (GPU) (which can be understood as a type of microprocessor), or digital signal processor (DSP). In another implementation, the processor can implement certain functions through the logical relationships of hardware circuits. These logical relationships are fixed or reconfigurable. For example, the processor may be a hardware circuit implemented using an application-specific integrated circuit (ASIC) or a programmable logic device (PLD), such as an FPGA. In reconfigurable hardware circuits, the process of the processor loading a configuration document and configuring the hardware circuit can be understood as the process of the processor loading instructions to implement some or all of the functions of the aforementioned units. Furthermore, the processor can also be a hardware circuit designed for artificial intelligence, which can be understood as an ASIC, such as a neural network processing unit (NPU), tensor processing unit (TPU), deep learning processing unit (DPU), etc. In addition, the computing platform 130 may also include a memory for storing instructions. Some or all of the processors 131 to 13n can call the instructions in the memory to implement the corresponding functions.

[0055] The computing platform 130 can control the functions of the vehicle 100 based on inputs received from various subsystems (e.g., the sensing system 120). In some embodiments, the computing platform 130 can be used to provide control over many aspects of the vehicle 100 and its subsystems.

[0056] The clock synchronization module 140 ensures time consistency between electronic control units and sensors in the vehicle, providing fundamental support for real-time communication and precise control. This module can be synchronized with an external clock source (such as a GNSS or network-synchronized clock) via communication protocols to eliminate clock skew and drift between different modules or units within the vehicle.

[0057] Optionally, the above components are just an example. In actual applications, the components in each of the above modules may be added or deleted as needed.

[0058] The vehicle 100 in this application may include: road vehicles, water vehicles, air vehicles, industrial equipment, agricultural equipment, or entertainment equipment, etc. For example, vehicle 100 may be a means of transportation (such as commercial vehicles, passenger cars, motorcycles, flying cars, trains, etc.), industrial vehicles (such as forklifts, trailers, tractors, etc.), engineering vehicles (such as excavators, bulldozers, cranes, etc.), agricultural equipment (such as lawnmowers, harvesters, etc.), amusement equipment, toy vehicles, etc. The embodiments of this application do not specifically limit the type of vehicle.

[0059] Traditional Ethernet uses a carrier sense multiple access / collision detection mechanism. When two workstations (nodes in the network) collide, the message must be retransmitted after a certain delay. During congestion, some messages may not be able to be delivered within a short time, causing uncertainty in communication time. To meet the real-time and deterministic requirements of some data transmissions, time-sensitive and non-time-sensitive data often need to be transmitted through two networks. That is, all controllers are equipped with two network ports: one for real-time Ethernet and one for standard Ethernet. Real-time Ethernet is used to transmit time-sensitive data, which is usually deterministic, ensuring real-time transmission and low latency, suitable for applications such as industrial control and autonomous driving. Standard Ethernet is used to transmit non-time-sensitive data (e.g., ordinary communication and office data). This network is best-effort, and data transmission may experience delays or jitter. While this approach can guarantee the real-time data transmission requirements to a certain extent, it requires the deployment of two independent network infrastructures, increasing system complexity, construction costs, and maintenance difficulty, while also reducing network resource utilization.

[0060] To address the aforementioned issues, TSN not only ensures the real-time and deterministic transmission of time-sensitive data streams but also enables the integration of time-sensitive and non-time-sensitive data transmission within the same network. This means that TSN can provide precise bandwidth allocation and transmission scheduling for data streams with different priorities and real-time requirements within a unified network architecture, thereby achieving collaborative transmission of various data types. In its implementation, Qbv is a key scheduling mechanism within the TSN framework. Qbv controls the opening and closing of data queues through a pre-defined GCL, allocating specific time windows for different types of data streams within each cycle to ensure that high-priority time-sensitive data is transmitted within a strict time frame. This achieves precise time-based scheduling control of packets, reducing mutual interference between traffic flows.

[0061] For example, as shown in Figure 2, a single Qbv scheduling can include multiple gating cycles. T00 to T79 in the gating list constitute one gating cycle, and the next gating cycle can begin after each gating cycle ends. Qbv scheduling periodically controls the on / off state of all traffic queues according to time, isolating real-time and non-real-time traffic into different gating time slots (corresponding to T00 to T79 in Figure 2), thereby enabling time-sensitive and non-time-sensitive data to be transmitted in the same network without interference. In T00 to T79, C indicates a closed transmission gate, and o indicates an open transmission gate. For example, for gating time slot T05: CoCCoCCC, it means that traffic queues #0, #1, #2, #4, #5, and #7 are closed, while traffic queues #3 and #6 are open.

[0062] While Qbv's scheduling mechanism solves the communication latency stability problem—that is, for critical traffic requiring low latency, it avoids interference from other non-critical traffic, thus ensuring relatively stable latency for critical traffic in the network—it also inevitably introduces inherent latency (e.g., the closing duration of gating slots). This inherent latency can pose a significant risk to vehicle safety-critical services (e.g., autonomous driving control signals, onboard sensor data transmission, braking control commands), impacting the normal operation and safety performance of the entire vehicle.

[0063] For example, according to Qbv's scheduling rules, when the gate flag of a transmission gate is closed, the corresponding queue is not allowed to send messages within that gated time slot; when the gate flag is open, the corresponding queue is allowed to send messages. Affected by these scheduling rules, when a message enters the transmission queue and the gate flag is closed, the current message stops sending and needs to wait for the gate flag to change to open. In this case, the message latency will increase. The increased latency can be the duration corresponding to one or more gated time slots, or the duration corresponding to a gated period. For example, as shown in Figure 3, if a message in queue 7 arrives and is dequeued within the time period T0, the Qbv scheduling effect is better; that is, Qbv schedules messages without waiting and can complete message transmission within the currently open gated time slot. However, if a message in queue 7 arrives and is dequeued within time period T1, since the gating flag is closed during time period T1, the message in queue 7 needs to wait for the gating flag to change to open before it can be dequeued. This introduces the inherent delay of Qbv scheduling, meaning the message in queue 7 needs to wait 0 to 200µs, the specific duration depending on when the message is dequeued. This inherent delay can pose a significant risk to vehicle safety-critical services. Furthermore, in Figure 3, Ethernet messages are forwarded based on port queues. Sudden traffic surges or congestion in the network can also affect the forwarding delay and cause jitter. Therefore, it cannot be guaranteed that all traffic will arrive and be dequeued precisely within the gating open time slot. Messages will always arrive within the gating closed time slot. In this case, the message cannot be immediately dequeued and must wait for the next gating open time slot to continue processing. This waiting causes scheduling delay, the maximum of which is one gating cycle, and the minimum is 0 or one gating time slot. The aforementioned opening gate control time slot can refer to the time slot corresponding to the gate control flag being in the open state, and the closing gate control time slot can refer to the time slot corresponding to the gate control flag being in the closed state.

[0064] This application provides a processing method, apparatus, and vehicle that can reduce the blocking time of messages in queues with closed gating flags after they arrive in the sending queue, thereby optimizing the inherent latency introduced in the Qbv gating scheduling process and improving bandwidth utilization efficiency.

[0065] Figure 4 is a schematic flowchart of a processing method provided in an embodiment of this application. The execution subject of method 400 can be a vehicle. When the execution subject of method 400 is vehicle 100, it can be executed by computing platform 130 in vehicle 100, or by system-on-chip (SoC) in computing platform 130, or by processor in computing platform 130. The following describes method 400 with vehicle as the execution subject. Method 400 can include steps S401 to S402.

[0066] S401, obtain the first duration and the remaining duration of the first gated time slot.

[0067] Wherein, the first duration is the total duration for sending messages in the M queues, the gating flag of the M queues is in the open state in the first gating time slot, and M is a positive integer.

[0068] Optionally, the first gating slot can be any gating slot in the gating cycle.

[0069] S402, if the ratio of the first duration to the remaining duration is less than or equal to the first threshold, send the messages in the N queues within the remaining duration.

[0070] In this context, the gating flag of the messages in the N queues is closed in the first gating time slot, and N is a positive integer.

[0071] For example, M queues include queue 1, and N queues include queue 2. Under the current Qbv scheduling mechanism, messages in queue 1 can be sent in the first gated time slot, and messages in queue 2 can be sent in the second gated time slot, but cannot be sent in the first gated time slot.

[0072] Optionally, the gating flag of the messages in the N queues is enabled in the second gating time slot, and the latest time of the second gating time slot is earlier than the earliest time of the first gating time slot, or the latest time of the first gating time slot is earlier than the earliest time of the second gating time slot. For example, in the example in Figure 3, for queue 7, when the first gating time slot is time slot 2, the second gating time slot is time slot 1 or time slot 5.

[0073] Optionally, the first gated time slot can be called an open gated time slot for packets in M ​​queues, and the first gated time slot can be called a closed gated time slot for packets in N queues. The second gated time slot can also be called an open gated time slot for packets in N queues. For example, in the example in Figure 3, when the first gated time slot is time slot 3, time slot 3 is called an open gated time slot for packets in queue 0, time slot 3 is called a closed gated time slot for packets in queue 7, and time slot 1 or time slot 5 is called an open gated time slot for packets in queue 7.

[0074] Optionally, the remaining duration of the first gating cycle may include not only the duration of actual data transmission, but also the blank time during which there is no interference between protection signals, i.e., the protection band time.

[0075] Optionally, a ratio of the first duration to the remaining duration less than or equal to a first threshold can be understood as: there is idle time within the remaining duration, and the first gated time slot is in a non-congested state. Conversely, a ratio of the first duration to the remaining duration greater than the first threshold can be understood as: there is no idle time within the remaining duration, and the first gated time slot is in a congested state. For example, the first threshold can be set to 50%.

[0076] Based on the above processing method, when there is idle time within the remaining duration of the first gating time slot, the packets in the N queues that are delayed in arrival will be sent within the remaining duration of the first gating time slot. This can reduce the blocking time of the packets in the N queues in the sending queue, thereby optimizing the inherent latency introduced in the Qbv gating scheduling process and improving the bandwidth utilization efficiency.

[0077] According to some embodiments, the first duration can be determined based on a variety of methods.

[0078] In one possible implementation, before step S401, method 400 further includes: obtaining the number of messages in the M queues and the data packet transmission speed of each of the M queues; and determining a first duration based on the number of messages in the M queues and the data packet transmission speed of each queue.

[0079] Optionally, the data packet transmission speed of each of the M queues can be the same or different.

[0080] For example, the duration of the first gated time slot is T0, the remaining duration is T1 (including the guard band time), and the number of packets in the i-th queue out of the M queues is M. i Where i is a positive integer less than or equal to M; the data packet transmission speed of the i-th queue is V. i V i The unit can be packets per second (PPS), then the time T for the i-th queue to complete sending the message is... i It can be calculated using formula (1-1):

[0081] The first duration can then be expressed as ∑T i .

[0082] Accordingly, in step S402, if the conditions of formula (1-2) are met, messages in N queues can be sent within the remaining time:

[0083] Formula (1-2) can be understood as follows: within the remaining time, the messages in the M queues can be sent, and there is idle time within the remaining time, with the idle time accounting for more than 50%, that is, the first gated time slot is in a non-congested state.

[0084] Based on the above processing method, the first duration can be determined based on the number of messages in the M queues and the data packet transmission speed of each queue. This makes it easier to determine whether the first gating time slot is in a congested state based on the first duration, so as to optimize the inherent delay introduced in the Qbv gating scheduling process.

[0085] In one possible implementation, before step S401, method 400 further includes: obtaining the length of the messages in the M queues and the bit stream transmission speed of each of the M queues; and determining a first duration based on the length of the messages in the M queues and the bit stream transmission speed of each queue.

[0086] Optionally, the bit stream transmission speed of each of the M queues can be the same or different.

[0087] For example, the duration of the first gated time slot is T0, the remaining duration is T1 (including the guard band time), and the number of packets in the i-th queue out of the M queues is M. i , where i is a positive integer less than or equal to M; the total length of the message is L (which may include inter-frame gaps), and the bit stream transmission rate of the i-th queue is V. i The unit can be bits per second (bps), then the time T for the message to be sent in the i-th queue is... i It can be calculated using formula (1-3):

[0088] The first duration can then be expressed as ∑T i .

[0089] Accordingly, in step S402, if the conditions of formula (1-2) are met, messages in N queues can be sent within the remaining time:

[0090] Based on the above processing method, the first duration can be determined based on the message length of M queues and the bit stream transmission speed of each queue, which makes it easier to determine whether the first gated time slot is in a congested state based on the first duration, so as to optimize the inherent delay introduced in the Qbv gated scheduling process.

[0091] According to some embodiments, in step S402, before sending messages in the N queues within the remaining time, method 400 further includes: marking the first gated time slot as non-congested.

[0092] Based on the above processing method, marking the first gated time slot as non-congested can help improve the overall bandwidth utilization. In particular, after the high-priority packets (packets in M ​​queues) have been transmitted, the remaining duration of the first gated time slot can be used to send low-priority packets (packets in N queues), ensuring that important data is transmitted first while avoiding bandwidth waste.

[0093] In one possible implementation, the congestion status of the first gated time slot can be marked with a color. For example, marking the first gated time slot with a first color indicates that the time slot is in a non-congested state, and packets from N queues can be transmitted within the remaining time. Alternatively, if the ratio of the first time slot to the remaining time slot is greater than a first threshold, the first gated time slot can be marked with a second color, indicating that the time slot is in a congested state, and packets from N queues cannot be transmitted within the remaining time. Marking the first gated time slot with a first color can also be understood as coloring the first gated time slot with the first color, and marking the first gated time slot with a second color can also be understood as coloring the first gated time slot with the second color. Optionally, the first color can be green, and the second color can be red.

[0094] For example, as shown in Figure 5, the Ethernet network can map packets to different queues according to their priority. The processing method of method 400 can optimize packet enqueuing based on the coloring result of the gating slots when packets are enqueued. Specifically, if the first packet needs to be mapped to one of the M queues according to its priority when enqueuing, then the first packet is mapped to that queue. If the second packet needs to be mapped to one of the N queues according to its priority when enqueuing, then if the first gating slot is marked in green, the second packet can be mapped to one of the N queues first, and then mapped to one of the M queues; if the first gating slot is marked in red, the second packet is mapped to one of the N corresponding queues and no further adjustment is made. For example, in Figure 5, within the first gating slot, transmission gate 7 is open and transmission gate 0 is closed, meaning that the M queues include queue 7, and the N queues include queue 1. When the first message is enqueued, it can be enqueued in queue 7 because its frame priority is 7. The second message, however, has a frame priority of 0. According to the current Qbv scheduling mechanism, the second message should be enqueued in queue 0, and it cannot be sent within the first gated time slot. After optimization by processing method 400, if the first gated time slot is marked green, the second message can first be enqueued in queue 0 and then scheduled to queue 7, meaning it can be sent within the remaining duration of the first gated time slot. Conversely, if the first gated time slot is marked red, the second message will not be scheduled after being enqueued in queue 0.

[0095] In one possible implementation, the congestion state of the first gated time slot can be marked by the value of the bit. For example, marking the first gated time slot as "1" indicates that the time slot is in a non-congested state, and marking the first gated time slot as "0" indicates that the time slot is in a congested state.

[0096] According to some embodiments, the remaining duration includes a second duration and a third duration, and the latest time of the second duration is earlier than the earliest time of the third duration. Then, in step S402, sending messages in N queues within the remaining duration includes: sending messages in M ​​queues within the second duration and sending messages in N queues within the third duration.

[0097] Based on the above processing method, messages in M ​​queues are sent first during the remaining time of the first gated time slot. After the messages in M ​​queues have been sent, messages in N queues are sent. In this way, messages in N queues can be sent during the idle time of the first gated time slot without changing the sending rules of the messages in M ​​queues, thereby achieving efficient utilization of the remaining bandwidth in the first gated time slot.

[0098] According to some embodiments, in step S402, sending messages in N queues within the remaining duration includes: if the ratio of the third duration to the duration of the first gated time slot is greater than or equal to a second threshold, sending messages in N queues within the third duration.

[0099] Based on the above processing method, by setting the second threshold, it is possible to ensure that the packets in the M queues are sent first, and also to ensure that there is a sufficiently long third duration within the first gated time slot for sending packets in the N queues. This can further optimize the inherent delay introduced in the Qbv gating scheduling process and achieve efficient utilization of the remaining bandwidth within the first gated time slot.

[0100] Optionally, the ratio of the third duration to the duration of the first gating slot being greater than or equal to the second threshold can be interpreted as: there is idle time exceeding the proportion of the second threshold within the first gating period. For example, when the second threshold is 30%, it means that there is more than 30% idle time within the first gating period.

[0101] Optionally, the purpose of setting the second threshold is to ensure that the messages in the M queues can be sent with priority. The value of the second threshold can be configured to 0, that is, to do one's best, as long as there is free space in the first gated time slot, it can be used to send messages.

[0102] For example, as shown in Figure 6, according to the current Qbv scheduling mechanism, packets need to be scheduled according to the state of the gating flags when dequeuing. In the first gating time slot, if the gating flag of queue 7 is open and the gating flag of queue 0 is closed, then packets in queue 0 are blocked (not allowed to be sent) in the first gating time slot, while packets in queue 7 can be sent. However, after optimization by method 400, assuming the duration of the first gating time slot is T0, after the packets in queue 7 are sent, the remaining duration of the first gating time slot is T1 (including the guard band time). If the ratio of T1 to T0 is greater than 30%, it indicates that the first gating time slot is in a non-congested state and can be used to send packets in queue 0.

[0103] According to some embodiments, the N queues include a first queue and a second queue, where the priority of messages in the first queue is higher than that of messages in the second queue. The third duration includes a fourth duration and a fifth duration, where the latest time of the fourth duration is earlier than the earliest time of the fifth duration. Then, sending messages from the N queues within the third duration includes sending messages from the first queue within the fourth duration and sending messages from the second queue within the fifth duration.

[0104] Based on the above processing method, when messages in N queues can be transmitted in order of message priority within the third duration of the first gating time slot, this method optimizes the inherent delay introduced in the Qbv gating scheduling process while ensuring that high-priority messages can be processed first within the third duration.

[0105] For example, as shown in Figure 7, the Qbv gating schedule includes 8 queues. When the first gating time slot is T00, the M queues include: queue 0, queue 2, queue 3, queue 5, queue 6, and queue 7; the N queues include queue 1 and queue 4. When the first gating time slot is in a non-congested state, since the priority of the packets in queue 1 is higher than that of the packets in queue 4 (C1 > C2), the packets in queue 1 can be sent first, followed by the packets in queue 4, within the third time slot.

[0106] In another example, as shown in Figure 7, when the first gating time slot is T01, there are M queues: queue 1, queue 3, queue 4, and queue 7; and N queues: queue 0, queue 2, queue 5, and queue 6, with the priority of packets in the queues decreasing sequentially (C1>C2>C3>C4). If the first gating time slot is in a non-congested state, packets in the aforementioned queues can be sent sequentially within the third time period, according to the order of queue 0, queue 2, queue 5, and queue 6.

[0107] The application scenarios of the above processing method are described in detail below with reference to Figure 8. Figure 8 is a schematic diagram of a processing method provided in this application to optimize the inherent latency in the Qbv scheduling process.

[0108] As shown in Figure 8, in a Qbv scheduling, two queues, queue 0 and queue 7, are configured. Queue 7 is for critical traffic, and the gating slot configuration is shown in Table 1.

[0109] Table 1

[0110] According to the configuration in Table 1, gating time slots T00 to T05 form a gating cycle and are executed cyclically. Within gating time slot T02, the gating flag of queue 0 is in the open state, meaning that messages in queue 0 can be sent within gating time slot T02; the gating flag of queue 7 is in the closed state, meaning that messages in queue 7 are blocked from being sent within gating time slot T02.

[0111] Without optimization using method 400, message enqueuing is done in a fixed queue, and there is a certain probability that a message will encounter a queue with its gate flag closed. For example, if a message is enqueued at time t1 in Figure 8, and queue 7 is selected by default, the message transmission will be blocked because the gate flag of this queue is closed, and the blocking time is 125 to 200 μs.

[0112] After optimization using method 400, packets are queued according to the gating congestion level to minimize congestion time. For example, a packet is enqueued in queue 7 at time t1 and is blocked in queue 7. If the gating time slot T02 is in a non-congested state (the time it takes for packets in queue 0 to complete transmission is less than or equal to the remaining time in T02 is less than or equal to a first threshold), packets in queue 7 can be moved to queue 0 for transmission. On the other hand, when dequeuing packets, if all packets in queue 0 have been sent and the remaining time in gating time slot T02 is greater than a second threshold, packets originally in queue 7 can be sent (in this example, only packets in queue 7 exist; in other examples, if packets from other queues exist, they are scheduled according to packet priority). For example, as shown in Figure 8 and Table 2, when a message enters queue 7 at time t1, the message transmission is blocked. When the gated time slot T02 is in a non-congested state and all messages in queue 0 have been sent, messages in queue 7 can be sent within the remaining duration of the gated time slot T02. Through the above processing method, the blocking time of messages in queue 7 is between 0 and 75us, with a maximum delay of less than 75us, which reduces the delay by 60% compared to before optimization.

[0113] Table 2

[0114] It should be understood that, in the various embodiments of this application, unless otherwise specified or in case of logical conflict, the terms and / or descriptions between the various embodiments are consistent and can be referenced by each other, and the technical features in different embodiments can be combined to form new embodiments according to their inherent logical relationships.

[0115] Figure 9 is a schematic diagram of a processing device provided in an embodiment of this application. The device 900 may include an acquisition unit 910, a storage unit 920, and a processing unit 930. The acquisition unit 910 is used to acquire instructions and / or data, the storage unit 920 is used to implement corresponding storage functions and store corresponding instructions and / or data, and the processing unit 930 is used to perform data processing so that the device 900 can implement the aforementioned processing method.

[0116] According to some embodiments, the apparatus 900 includes: an acquisition unit 910 and a processing unit 930; the acquisition unit 910 is used to acquire a first duration and the remaining duration of a first gated time slot, the first duration being the total duration for sending messages in M ​​queues, the gate flags of the M queues being in the open state in the first gated time slot, and M being a positive integer; the processing unit 930 is used to send messages in N queues within the remaining duration if the ratio of the first duration to the remaining duration is less than or equal to a first threshold, the gate flags of the N queues being in the closed state in the first gated time slot, and N being a positive integer.

[0117] In one possible implementation, the remaining duration includes a second duration and a third duration, with the latest moment of the second duration being earlier than the earliest moment of the third duration; the processing unit 930 is specifically used to send messages in M ​​queues during the second duration and to send messages in N queues during the third duration.

[0118] In one possible implementation, the N queues include a first queue and a second queue, where the message priority in the first queue is higher than that in the second queue. The third duration includes a fourth duration and a fifth duration, where the latest time of the fourth duration is earlier than the earliest time of the fifth duration. The processing unit 930 is specifically used to send messages from the first queue within the fourth duration and to send messages from the second queue within the fifth duration.

[0119] In one possible implementation, the processing unit 930 is also configured to mark the first gated time slot as non-congested.

[0120] In one possible implementation, the acquisition unit 910 is further configured to acquire the number of messages in the M queues and the data packet transmission speed of each of the M queues; the processing unit 930 is further configured to determine the first duration based on the number of messages in the M queues and the data packet transmission speed of each queue.

[0121] In one possible implementation, the acquisition unit 910 is further configured to acquire the length of the messages in the M queues and the bit stream transmission speed of each of the M queues; the processing unit 930 is further configured to determine the first duration based on the length of the messages in the M queues and the bit stream transmission speed of each queue.

[0122] Figure 10 is a schematic diagram of another processing device provided in an embodiment of this application.

[0123] The device 1000 includes a memory 1010, a processor 1020, and a communication interface 1030. The memory 1010, processor 1020, and communication interface 1030 are connected via an internal connection path. The memory 1010 stores instructions, and the processor 1020 executes the instructions stored in the memory 1010 to control the communication interface 1030 to acquire information, thereby enabling the device 1000 to implement the aforementioned processing method. Optionally, the memory 1010 can be coupled to the processor 1020 via an interface, or it can be integrated with the processor 1020.

[0124] It should be noted that the communication interface 1030 described above uses a transceiver device, such as, but not limited to, a transceiver. The communication interface 1030 may also include an input / output interface.

[0125] The processor 1020 stores one or more computer programs, which include instructions. When the instructions are executed by the processor 1020, the processing device 1000 performs the processing methods described in the above embodiments.

[0126] In implementation, each step of the above method can be completed by the integrated logic circuitry of the hardware in the processor 1020 or by instructions in software form. The method disclosed in the embodiments of this application can be directly implemented by the hardware processor, or by a combination of hardware and software modules in the processor. The software modules can reside in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. This storage medium is located in memory 1010, and the processor 1020 reads the information in memory 1010 and, in conjunction with its hardware, completes the steps of the above method. To avoid repetition, detailed descriptions are not provided here.

[0127] Optionally, the memory 1010 in FIG10 can implement the storage unit 920 in FIG9, the processor 1020 in FIG10 can implement the processing unit 930 in FIG9, and the communication interface 1030 in FIG10 can implement the acquisition unit 910 in FIG9.

[0128] This application embodiment also provides a computer-readable storage medium storing program code, which, when run on a computer, causes the computer to perform the processing method shown in FIG4 above.

[0129] This application also provides a computer program product, which includes a computer program that, when run, causes the computer to perform the processing method shown in FIG4 above.

[0130] This application also provides a chip, including: a circuit for performing the method shown in FIG4 above.

[0131] This application also provides a vehicle, which includes a processing device as shown in FIG9 or FIG10.

[0132] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0133] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0134] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0135] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0136] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0137] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0138] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A processing method, characterized in that, The method includes: Obtain the first duration and the remaining duration of the first gated time slot. The first duration is the total duration for sending messages in M ​​queues. The gate flags of the M queues are in the open state in the first gated time slot, and M is a positive integer. If the ratio of the first duration to the remaining duration is less than or equal to a first threshold, messages in N queues are sent within the remaining duration. The gating flag of the messages in the N queues is in the closed state in the first gating time slot, and N is a positive integer.

2. The method as described in claim 1, characterized in that, The remaining time includes a second time and a third time, wherein the latest time of the second time is earlier than the earliest time of the third time, and sending messages from N queues within the remaining time includes: During the second duration, messages from the M queues are sent, and during the third duration, messages from the N queues are sent.

3. The method as described in claim 2, characterized in that, The N queues include a first queue and a second queue, where the message priority in the first queue is higher than that in the second queue. The third duration includes a fourth duration and a fifth duration, where the latest time of the fourth duration is earlier than the earliest time of the fifth duration. Sending messages from the N queues within the third duration includes: During the fourth time period, messages in the first queue are sent, and during the fifth time period, messages in the second queue are sent.

4. The method according to any one of claims 1 to 3, characterized in that, Before sending messages from the N queues within the remaining time, the method further includes: The first gated time slot is marked as non-congested.

5. The method according to any one of claims 1 to 4, characterized in that, Before obtaining the first duration and the remaining duration of the first gated time slot, the method further includes: Obtain the number of messages in the M queues and the data packet transmission speed of each of the M queues; The first duration is determined based on the number of messages in the M queues and the data packet transmission speed of each queue.

6. The method according to any one of claims 1 to 4, characterized in that, Before obtaining the first duration and the remaining duration of the first gated time slot, the method further includes: Obtain the length of the messages in the M queues and the bit stream transmission speed of each of the M queues; The first duration is determined based on the length of the messages in the M queues and the proportional stream transmission speed of each queue.

7. A processing apparatus, characterized in that, The processing device includes: an acquisition unit and a processing unit; The acquisition unit is used to acquire the first duration and the remaining duration of the first gated time slot. The first duration is the total duration for sending messages in M ​​queues. The gate flags of the M queues in the first gated time slot are in the open state, and M is a positive integer. The processing unit is configured to send messages in N queues within the remaining time when the ratio of the first duration to the remaining duration is less than or equal to a first threshold, wherein the gating flag of the messages in the N queues is in the closed state in the first gating time slot, and N is a positive integer.

8. The apparatus as claimed in claim 7, characterized in that, The remaining duration includes a second duration and a third duration, wherein the latest moment of the second duration is earlier than the earliest moment of the third duration; The processing unit is specifically configured to send messages from the M queues within the second duration and to send messages from the N queues within the third duration.

9. The apparatus as claimed in claim 8, characterized in that, The N queues include a first queue and a second queue, where the message priority in the first queue is higher than that in the second queue, and the third duration includes a fourth duration and a fifth duration, where the latest time of the fourth duration is earlier than the earliest time of the fifth duration. The processing unit is specifically configured to send messages from the first queue within a fourth time period and messages from the second queue within a fifth time period.

10. The apparatus according to any one of claims 7 to 9, characterized in that, The processing unit is further configured to mark the first gated time slot as non-congested.

11. The apparatus according to any one of claims 7 to 10, characterized in that, The acquisition unit is also used to acquire the number of messages in the M queues and the data packet transmission speed of each of the M queues; The processing unit is further configured to determine the first duration based on the number of messages in the M queues and the data packet transmission speed of each queue.

12. The apparatus according to any one of claims 7 to 10, characterized in that, The acquisition unit is also used to acquire the length of the messages in the M queues and the bit stream transmission speed of each of the M queues; The processing unit is further configured to determine the first duration based on the length of the messages in the M queues and the proportional stream transmission speed of each queue.

13. A processing apparatus, characterized in that, The device includes a processor and a memory, the processor being coupled to the memory, the memory being used to store computer programs or instructions, and the processor being used to execute the computer programs or instructions in the memory, such that the method of any one of claims 1 to 6 is performed.

14. A chip, characterized in that, The chip includes circuitry for performing the method as described in any one of claims 1 to 6.

15. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores program code that, when executed on a computer, causes the computer to perform the method as described in any one of claims 1 to 6.

16. A computer program product, characterized in that, The computer product includes a computer program that, when run, causes the computer to perform the method as described in any one of claims 1 to 6.

17. A vehicle, characterized in that, The processing apparatus includes any one of claims 7 to 13.