Semiconductor photonic crystal light-emitting structure and method for preparing same
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-06-24
- Publication Date
- 2026-08-13
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Figure CN2025102950_13082026_PF_FP_ABST
Abstract
Description
Semiconductor photonic crystal light-emitting structure and its preparation method
[0001] Cross-references to related applications
[0002] This disclosure claims priority to Chinese patent application CN202510134531.8, filed on February 7, 2025, entitled “Semiconductor photonic crystal light-emitting structure and preparation method thereof,” the entire contents of which are incorporated herein by reference. Technical Field
[0003] This disclosure relates to the field of semiconductor technology, specifically to a semiconductor photonic crystal light-emitting structure and its preparation method. Background Technology
[0004] Semiconductor lasers have wide applications in the modern optoelectronic industry. Introducing embedded periodic photonic crystals into semiconductor lasers is a common method for effectively controlling optical field modes and manufacturing various high-performance semiconductor lasers. The output performance (mode, divergence angle, and slope efficiency, etc.) of semiconductor lasers with photonic crystals is often closely related to the processing quality of the photonic crystal. Producing photonic crystals that meet theoretical design requirements (morphology, size, and roughness) is crucial for maximizing the effects of photonic crystals and achieving high-performance lasing. However, some technical solutions have limited tunable optical field modes in the photonic crystal layer, affecting the performance of photonic crystal lasers. A technical problem in this field is how to improve the optical field mode control capability of semiconductor photonic crystal light-emitting structures. Summary of the Invention
[0005] Therefore, the technical problem to be solved by this disclosure is how to improve the light field mode modulation capability of the semiconductor photonic crystal light-emitting structure, thereby providing a semiconductor photonic crystal light-emitting structure and its preparation method.
[0006] This disclosure provides a semiconductor photonic crystal light-emitting structure, comprising: a semiconductor substrate layer; an active layer located on one side of the semiconductor substrate layer; and a photonic crystal layer located on the side of the active layer away from the semiconductor substrate layer. The photonic crystal layer includes a first semiconductor layer, a second semiconductor layer, and a passivation protection layer. The first semiconductor layer has a groove extending from the surface of the first semiconductor layer away from the active layer into the first semiconductor layer. The passivation protection layer is located on the inner wall of the groove. The second semiconductor layer is located on the surface of the first semiconductor layer away from the active layer between adjacent grooves and does not extend into the groove.
[0007] In one exemplary embodiment, a semiconductor protective layer is further included, wherein the passivation protective layer is located on the side of the semiconductor protective layer opposite to the first semiconductor layer.
[0008] In one exemplary embodiment, the material of the passivation protective layer is an insulating oxide or an insulating nitride.
[0009] In an exemplary embodiment, the semiconductor protective layer is a phosphide semiconductor material, a selenide semiconductor material, or a sulfide semiconductor material.
[0010] In one exemplary embodiment, the thickness of the passivation protective layer is 1 nm to 50 nm.
[0011] In one exemplary embodiment, the thickness of the semiconductor protective layer is 1 nm to 50 nm.
[0012] In an exemplary embodiment, the second semiconductor layer includes: a first portion and a second portion, the first portion being located on the side of the groove facing away from the semiconductor substrate layer, and the second portion being located on the side of the first semiconductor layer facing away from the semiconductor substrate layer between adjacent grooves; wherein, the surface of the first portion facing the groove is recessed inward relative to the surface of the second portion facing the first semiconductor layer.
[0013] In one exemplary embodiment, the region of the groove surrounded by the passivation protective layer away from the surface of the first semiconductor layer is rectangular along a cross-sectional shape perpendicular to the semiconductor substrate layer.
[0014] In one exemplary embodiment, the region of the groove surrounded by the surface of the passivation protective layer away from the first semiconductor layer has a first end away from the semiconductor substrate layer and a second end facing the semiconductor substrate layer, wherein the width of the first end parallel to the semiconductor substrate layer is smaller than the width of the second end parallel to the semiconductor substrate layer.
[0015] In one exemplary embodiment, the region of the groove surrounded by the passivation protective layer away from the surface of the first semiconductor layer is trapezoidal in shape along a cross-sectional shape perpendicular to the semiconductor substrate layer.
[0016] In one exemplary embodiment, the region of the groove surrounded by the passivation protective layer away from the surface of the first semiconductor layer first increases and then decreases along a direction parallel to the width of the semiconductor substrate layer from the semiconductor substrate layer to the active layer.
[0017] In one exemplary embodiment, the system further includes: a Bragg mirror located on the side of the photonic crystal layer opposite to the active layer; and a carrier transport layer located between the semiconductor substrate layer and the active layer, wherein the doping type of the carrier transport layer is opposite to that of the Bragg mirror.
[0018] This disclosure also provides a method for fabricating a semiconductor photonic crystal light-emitting structure, comprising: forming an active layer on one side of a semiconductor substrate; forming a photonic crystal layer on the side of the active layer away from the semiconductor substrate; wherein the step of forming the photonic crystal comprises: forming a first semiconductor layer on the side of the active layer away from the semiconductor substrate; forming a groove extending from the surface of the first semiconductor layer away from the active layer into the first semiconductor layer; forming a passivation protection layer on the inner wall of the groove; and forming a second semiconductor layer on the surface of the first semiconductor layer away from the active layer between adjacent grooves, wherein the second semiconductor layer does not extend into the groove.
[0019] In an exemplary embodiment, the step of forming a passivation protection layer on the inner wall of the groove includes: forming an initial passivation protection layer on the inner wall of the groove and on the side of the first semiconductor layer between adjacent grooves that is away from the semiconductor substrate layer; forming a mask layer in the groove that covers the initial passivation protection layer, the mask layer exposing the initial passivation protection layer on the side of the first semiconductor layer between adjacent grooves that is away from the semiconductor substrate layer; and removing the initial passivation protection layer on the side of the first semiconductor layer between adjacent grooves that is away from the semiconductor substrate layer by etching with the mask layer as a mask, and then removing the mask layer.
[0020] In one exemplary embodiment, the method further includes: before forming an initial passivation protection layer, forming an initial semiconductor protection layer on the inner wall surface of the groove and on the side of the first semiconductor layer between adjacent grooves that is away from the semiconductor substrate layer; after removing the initial passivation protection layer on the side of the first semiconductor layer between adjacent grooves that is away from the semiconductor substrate layer by etching with a mask layer as a mask, removing the initial semiconductor protection layer on the side of the first semiconductor layer between adjacent grooves that is away from the semiconductor substrate layer by etching with a mask layer as a mask, and forming a semiconductor protection layer on the inner wall of the groove. Attached Figure Description
[0021] To more clearly illustrate the technical solutions in the specific embodiments of this disclosure or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0022] Figure 1 is a schematic diagram of a semiconductor photonic crystal light-emitting structure according to an embodiment of the present disclosure;
[0023] Figure 2 is a schematic diagram of the structure of a semiconductor photonic crystal light-emitting structure according to another embodiment of the present disclosure;
[0024] Figure 3 is a schematic diagram of the structure of a semiconductor photonic crystal light-emitting structure according to another embodiment of the present disclosure;
[0025] Figures 4 to 13 are schematic diagrams of the fabrication process of a semiconductor photonic crystal light-emitting structure in one embodiment of this disclosure. Detailed Implementation
[0026] Photonic crystal lasers utilize the two-dimensional resonance of singularities in two-dimensional photonic crystals to simultaneously achieve high output power and narrow beam divergence angles. The main principle is to form a periodically arranged two-dimensional photonic crystal structure in the photonic crystal layer through etching and secondary epitaxy, thereby achieving the confinement and manipulation of the optical field modes.
[0027] A method for fabricating a photonic crystal laser includes: forming a carrier transport layer on one side of a semiconductor substrate; forming an active layer on the side of the carrier transport layer opposite to the semiconductor substrate; forming a photonic crystal layer on the side of the active layer opposite to the carrier transport layer; and forming a Bragg mirror on the side of the photonic crystal layer opposite to the active layer. The formation of the photonic crystal layer includes: forming a first semiconductor layer on the side of the active layer opposite to the semiconductor substrate; forming periodically arranged grooves extending from the surface of the first semiconductor layer opposite to the active layer into the first semiconductor layer; and forming a second semiconductor layer on the surface of the first semiconductor layer opposite to the active layer within the grooves and between adjacent grooves.
[0028] However, since the second semiconductor layer is formed using an epitaxial growth process, a second semiconductor layer is also formed in the grooves during the process of forming the second semiconductor layer on the side of the first semiconductor layer away from the active layer between adjacent grooves. This results in a small duty cycle in the gaps inside the second semiconductor layer, and limited ability of the photonic crystal layer to control the optical field mode, which greatly affects the performance of the photonic crystal laser.
[0029] Based on this, this disclosure provides a semiconductor photonic crystal light-emitting structure and its preparation method, which improves the light field mode modulation capability of the semiconductor photonic crystal light-emitting structure.
[0030] The technical solutions of this disclosure will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.
[0031] In the description of this disclosure, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this disclosure and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this disclosure. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.
[0032] Furthermore, the technical features involved in the different embodiments of this disclosure described below can be combined with each other as long as they do not conflict with each other.
[0033] One embodiment of this disclosure provides a semiconductor photonic crystal light-emitting structure, referring to Figures 1, 2, and 3, including:
[0034] Semiconductor substrate layer 100;
[0035] An active layer 120 is located on one side of the semiconductor substrate layer 100;
[0036] A photonic crystal layer 130 is located on the side of the active layer 120 away from the semiconductor substrate layer 100. The photonic crystal layer 130 includes a first semiconductor layer 1300, a second semiconductor layer 1302, and a passivation protection layer 200a. The first semiconductor layer 1300 has a groove that extends from the surface of the first semiconductor layer 1300 away from the active layer 120 into the first semiconductor layer 1300. The passivation protection layer 200a is located on the inner wall of the groove. The second semiconductor layer 1302 is located on the surface of the first semiconductor layer 1300 away from the active layer 120 between adjacent grooves and does not extend into the groove.
[0037] In this embodiment, the passivation protection layer 200a is not a semiconductor material. The passivation protection layer 200a is used to protect the inner wall of the groove and prevent the material of the second semiconductor layer 1302 from growing in the groove. In this way, the area of the groove surrounded by the passivation protection layer 200a away from the surface of the first semiconductor layer 1300 has a large occupancy ratio, which improves the light field mode modulation capability of the semiconductor photonic crystal light emission structure.
[0038] For example, semiconductor photonic crystal light-emitting structures have more fundamental modes and fewer higher-order modes.
[0039] In this embodiment, the semiconductor photonic crystal light-emitting structure includes a surface-emitting semiconductor laser.
[0040] In one embodiment, the photonic crystal layer 130 includes a first semiconductor layer 1300 and a second semiconductor layer 1302. The material of the first semiconductor layer 1300 includes III-V compound semiconductors. The material of the first semiconductor layer 1300 includes, but is not limited to, GaAs, GaSb, GaN, InP, silicon, or sapphire.
[0041] In one embodiment, the material of the first semiconductor layer 1300 includes GaAs, and the material of the second semiconductor layer 1302 includes Al. x1 Ga 1-x1 As.
[0042] In some embodiments, the refractive index of the second semiconductor layer 1302 is lower than that of the first semiconductor layer 1300. In other embodiments, there is no limitation on the magnitude relationship between the refractive indices of the second semiconductor layer 1302 and the first semiconductor layer 1300.
[0043] In one embodiment, the first semiconductor layer 1300 and the second semiconductor layer 1302 are not doped with conductive ions.
[0044] In one embodiment, the area surrounded by the passivation protective layer 200a away from the surface of the first semiconductor layer 1300 is called a gap. Multiple gaps are periodically arranged in a direction parallel to the surface of the semiconductor substrate layer 100. The gaps are used to transmit light of a specific wavelength, so that the wavelength of the light emitted by the semiconductor photonic crystal light-emitting structure is more concentrated.
[0045] If the thickness of the passivation protective layer 200a is too large, the degree to which the photonic crystal layer 130 enhances the ability to modulate the optical field will be reduced. If the thickness of the passivation protective layer 200a is too small, the thickness uniformity of the passivation protective layer 200a will be poor. In an exemplary embodiment, the thickness of the passivation protective layer 200a is 1 nm-50 nm, for example, 1 nm, 5 nm, 10 nm, 20 nm, 30 nm, 40 nm, or 50 nm.
[0046] In one embodiment, the material of the passivation protective layer 200a is, for example, an insulating oxide or an insulating nitride. Insulating oxides include, for example, aluminum oxide or silicon oxide. Insulating nitrides include, for example, silicon nitride.
[0047] In one embodiment, the semiconductor photonic crystal light-emitting structure further includes a semiconductor protective layer, with a passivation protective layer 200a located on the side of the semiconductor protective layer facing away from the first semiconductor layer 1300. The semiconductor protective layer and the passivation protective layer 200a are made of different materials. The lattice constant of the semiconductor protective layer is similar to that of the first semiconductor layer 1300, and the lattice matching between the semiconductor protective layer and the first semiconductor layer 1300 reduces defects on the surface of the first semiconductor layer 1300 facing the passivation protective layer, and reduces carrier recombination on the surface of the first semiconductor layer 1300 facing the passivation protective layer. The passivation protective layer 200a prevents the material of the second semiconductor layer 1302 from growing in the groove. By combining the semiconductor protective layer and the passivation protective layer 200a with different properties, multiple protections are provided.
[0048] In one embodiment, the semiconductor protective layer is made of a phosphide semiconductor material, a selenide semiconductor material, or a sulfide semiconductor material, such as gallium phosphide, zinc selenide, or cadmium sulfide.
[0049] In one embodiment, the thickness of the semiconductor protective layer is 1nm-50nm, such as 1nm, 5nm, 10nm, 20nm, 30nm, 40nm or 50nm.
[0050] In one embodiment, the second semiconductor layer 1302 includes a first portion and a second portion. The first portion is located on the side of the groove facing away from the semiconductor substrate layer 100, and the second portion is located on the side of the first semiconductor layer 1300 facing away from the semiconductor substrate layer 100 between adjacent grooves. The surface of the first portion facing the groove is recessed inward relative to the surface of the second portion facing the first semiconductor layer 1300. This keeps the second semiconductor layer 1302 further away from the groove, preventing it from extending into the groove. This allows for better control over the position of the second semiconductor layer 1302 during the manufacturing process.
[0051] In one embodiment, referring to FIG1, the area of the groove surrounded by the passivation protective layer 200a away from the surface of the first semiconductor layer 1300 is rectangular in shape along a cross-sectional shape perpendicular to the semiconductor substrate layer 100.
[0052] In one embodiment, referring to FIG2, the region of the groove surrounded by the passivation protective layer 200a away from the surface of the first semiconductor layer 1300 has a first end away from the semiconductor substrate layer 100 and a second end facing the semiconductor substrate layer 100. The width of the first end parallel to the semiconductor substrate layer is smaller than the width of the second end parallel to the semiconductor substrate layer. This makes it more difficult for the second semiconductor layer 1302 to enter the groove, and the second semiconductor layer 1302 around the groove is continuous on the side of the groove away from the semiconductor substrate layer. This allows for better control over the position of the second semiconductor layer 1302 during the manufacturing process.
[0053] In one embodiment, referring to FIG2, the region of the groove surrounded by the passivation protective layer 200a away from the surface of the first semiconductor layer 1300 is trapezoidal in shape along the cross-sectional shape perpendicular to the semiconductor substrate layer 100.
[0054] In one embodiment, referring to FIG3, the region of the groove surrounded by the passivation layer 200a away from the first semiconductor layer 1300 increases and then decreases along a width parallel to the semiconductor substrate layer from the semiconductor substrate layer 100 to the active layer 120. The region of the groove surrounded by the passivation layer 200a away from the first semiconductor layer 1300 has a first end away from the semiconductor substrate layer 100 and a second end facing the semiconductor substrate layer 100. The first end has a smaller width parallel to the semiconductor substrate layer. This makes it more difficult for the second semiconductor layer 1302 to enter the groove, and the second semiconductor layer 1302 around the groove is continuous on the side of the groove away from the semiconductor substrate layer. This allows for better control over the position of the second semiconductor layer 1302 in the manufacturing process.
[0055] In one embodiment, the semiconductor photonic crystal light-emitting structure further includes: a Bragg mirror 150 located on the side of the photonic crystal layer 130 opposite to the active layer 120; and a carrier transport layer 110 located between the semiconductor substrate layer 100 and the active layer 120, wherein the doping type of the carrier transport layer 110 is opposite to that of the Bragg mirror 150. For example, the Bragg mirror 150 is p-type doped, and the carrier transport layer 110 is n-type doped.
[0056] In one embodiment, there is no Bragg reflector between the semiconductor substrate 100 and the active layer 120. Light emitted from the active layer 120 is transmitted to and reflected by the Bragg reflector 150, and then emitted from the semiconductor substrate 100 to the side of the semiconductor substrate 100 away from the active layer 120. The photonic crystal layer 130 selects the wavelength of the light.
[0057] In one embodiment, the semiconductor photonic crystal light-emitting structure further includes: a bottom Bragg mirror located between the semiconductor substrate layer and the active layer, wherein the reflectivity of the bottom Bragg mirror is greater than that of the Bragg mirror.
[0058] This disclosure also provides a method for fabricating a semiconductor photonic crystal light-emitting structure, comprising: forming an active layer on one side of a semiconductor substrate; forming a photonic crystal layer on the side of the active layer away from the semiconductor substrate; wherein the step of forming the photonic crystal comprises: forming a first semiconductor layer on the side of the active layer away from the semiconductor substrate; forming a groove extending from the surface of the first semiconductor layer away from the active layer into the first semiconductor layer; forming a passivation protection layer on the inner wall of the groove; and forming a second semiconductor layer on the surface of the first semiconductor layer away from the active layer between adjacent grooves, wherein the second semiconductor layer does not extend into the groove.
[0059] The step of forming a passivation protection layer on the inner wall of the groove includes: forming an initial passivation protection layer on the inner wall of the groove and on the side of the first semiconductor layer between adjacent grooves that is away from the semiconductor substrate layer; after forming the initial passivation protection layer, forming a mask layer in the groove that covers the initial passivation protection layer, the mask layer exposing the initial passivation protection layer on the side of the first semiconductor layer between adjacent grooves that is away from the semiconductor substrate layer; after etching away the initial passivation protection layer on the side of the first semiconductor layer between adjacent grooves that is away from the semiconductor substrate layer using the mask layer as a mask, removing the mask layer.
[0060] The fabrication process for forming a semiconductor photonic crystal structure is described below with reference to Figures 4 to 13.
[0061] Referring to Figure 4, a carrier transport layer 110 is formed on one side of the semiconductor substrate 100; an active layer 120 is formed on the side of the carrier transport layer 110 opposite to the semiconductor substrate 100.
[0062] In this embodiment, the method further includes: forming a photonic crystal layer on the side of the active layer away from the semiconductor substrate layer; wherein the step of forming the photonic crystal includes: forming a first semiconductor layer on the side of the active layer away from the semiconductor substrate layer; forming a groove extending from the surface of the first semiconductor layer away from the active layer into the first semiconductor layer; forming a passivation protection layer on the inner wall of the groove; and forming a second semiconductor layer on the surface of the first semiconductor layer away from the active layer between adjacent grooves, wherein the second semiconductor layer does not extend into the groove.
[0063] Referring to Figure 5, a first semiconductor layer 1300 is formed on the side of the active layer 120 that is away from the semiconductor substrate layer 100.
[0064] In one embodiment, the process for forming the first semiconductor layer 1300 is a deposition process, such as metal-organic chemical vapor deposition. The material of the first semiconductor layer 1300 is as described in the foregoing embodiments.
[0065] Referring to Figure 6, a groove 1301 is formed, which extends from the surface of the first semiconductor layer 1300 away from the active layer 120 into the first semiconductor layer 1300.
[0066] In one embodiment, the process for forming the groove 1301 is an etching process.
[0067] In this embodiment, the groove 1301 is rectangular in shape along the cross-sectional shape perpendicular to the semiconductor substrate layer 100.
[0068] In other embodiments, the groove has a first end facing away from the semiconductor substrate 100 and a second end facing the semiconductor substrate 100, the width of the first end parallel to the semiconductor substrate being smaller than the width of the second end parallel to the semiconductor substrate. In an exemplary embodiment, the groove has a trapezoidal cross-sectional shape perpendicular to the semiconductor substrate 100.
[0069] In other embodiments, the groove first increases and then decreases along a direction parallel to the width of the semiconductor substrate from the semiconductor substrate 100 to the active layer 120.
[0070] Referring to Figure 7, an initial passivation protection layer 200 is formed on the surface of the groove 1301 and on the side of the first semiconductor layer 1300 between adjacent grooves 1301 that faces away from the semiconductor substrate layer 100.
[0071] In one embodiment, the process for forming the initial passivation protective layer 200 is a deposition process, which includes one or more combinations of atomic layer deposition, physical vapor deposition, and chemical vapor deposition.
[0072] The thickness and material of the initial passivation protective layer 200 are the same as those of the passivation protective layer in the aforementioned embodiment.
[0073] In one embodiment, depositing the initial passivation protective layer 200 at a temperature of 150°C to 200°C can yield an initial passivation protective layer 200 with better film uniformity and lower stress.
[0074] Referring to Figures 8 to 11, a mask layer 210a is formed in the groove 1301 to cover the initial passivation protection layer 200. The mask layer 210a exposes the initial passivation protection layer 200 of the first semiconductor layer 1300 between adjacent grooves 1301 on the side away from the semiconductor substrate layer 100.
[0075] Referring to Figure 8, an initial mask layer 210 covering the initial passivation protection layer 200 is formed on the side of the first semiconductor layer 1300 facing away from the semiconductor substrate layer 100 in the groove 1301 and between adjacent grooves 1301.
[0076] The material of the initial mask layer 210 includes photoresist. The process for forming the initial mask layer 210 includes spin coating.
[0077] Referring to Figure 9, the initial mask layer 210 of the first semiconductor layer 1300 between adjacent grooves 1301 is removed from the side facing away from the semiconductor substrate layer 100, and the initial mask layer 210 in the groove 1301 forms a mask layer 210a.
[0078] Referring to Figure 10, the initial passivation protection layer 200 of the first semiconductor layer 1300 between adjacent grooves 1301 is etched away from the semiconductor substrate layer 100 using mask layer 210a. The initial passivation protection layer 200 on the sidewall of the groove 1301 forms passivation protection layer 200a.
[0079] The process of etching away the initial passivation protection layer 200 of the first semiconductor layer 1300 on the side away from the semiconductor substrate layer 100 between adjacent grooves 1301 using mask layer 210a includes anisotropic dry etching process.
[0080] The description of the passivation protective layer 200a is the same as that of the foregoing embodiments and will not be repeated in detail.
[0081] The description of the area of the groove surrounded by the passivation protective layer 200a away from the surface of the first semiconductor layer 1300 refers to the foregoing embodiment.
[0082] Referring to Figure 11, after the initial passivation protection layer 200 of the first semiconductor layer 1300 between adjacent grooves 1301 on the side away from the semiconductor substrate layer 100 is removed by etching with mask layer 210a as a mask, mask layer 210a is removed.
[0083] In one embodiment, the mask layer 210a is removed using acetone or N-methylpyrrolidone.
[0084] Referring to Figure 12, a second semiconductor layer 1302 is formed on the side surface of the first semiconductor layer 1300 between adjacent recesses 1301 that is away from the active layer 120. The second semiconductor layer 1302 does not extend into the recesses 1301.
[0085] The material of the second semiconductor layer 1302 is the same as in the aforementioned embodiment.
[0086] In one embodiment, the process for forming the second semiconductor layer 1302 includes an epitaxial growth process. In another embodiment, the process for forming the second semiconductor layer 1302 is, for example, a metal-organic chemical vapor deposition process. The material of the second semiconductor layer 1302 is as described in the foregoing embodiments.
[0087] In this embodiment, during the formation of the second semiconductor layer 1302, the first semiconductor layer 1300 is used as the substrate for epitaxial growth of the second semiconductor layer 1302. Since the interior of the groove 1301 contains a passivation protection layer 200a, which is not a semiconductor material, the passivation protection layer 200a cannot serve as the substrate for the epitaxial growth of the second semiconductor layer 1302. Therefore, the second semiconductor layer 1302 will not extend into the groove 1301. This results in a large duty cycle in the region of the groove 1301 surrounded by the passivation protection layer 200a away from the surface of the first semiconductor layer 1300.
[0088] Because the groove 1301 has a passivation protective layer 200a inside, the passivation protective layer 200a can protect the inner wall surface of the groove 1301 from being damaged.
[0089] Referring to Figure 13, a Bragg reflector 150 is formed on the side of the photonic crystal layer 130 opposite to the active layer 120. The material of the Bragg reflector 150 is the same as in the aforementioned embodiment.
[0090] Another embodiment of this disclosure provides a method for fabricating a semiconductor photonic crystal light-emitting structure. The difference between this embodiment and the above embodiment is that: before forming the initial passivation protective layer, an initial semiconductor protective layer is formed on the inner wall surface of the groove and on the side of the first semiconductor layer between adjacent grooves that is away from the semiconductor substrate layer; after removing the initial passivation protective layer on the side of the first semiconductor layer between adjacent grooves that is away from the semiconductor substrate layer by etching with a mask layer as a mask, the initial semiconductor protective layer on the side of the first semiconductor layer between adjacent grooves that is away from the semiconductor substrate layer is removed by etching with a mask layer as a mask, and the initial semiconductor protective layer on the inner wall of the groove forms a semiconductor protective layer; then, the mask layer is removed.
[0091] In one embodiment, the initial semiconductor protective layer is manufactured using a deposition process, which includes one or more combinations of atomic layer deposition, physical vapor deposition, and chemical vapor deposition.
[0092] The material and thickness of the semiconductor protective layer are described with reference to the description in the foregoing embodiments.
[0093] The technical solution disclosed herein has the following beneficial effects: In the semiconductor photonic crystal light-emitting structure provided by the technical solution disclosed herein, the passivation protection layer is not a semiconductor material. The passivation protection layer is used to protect the inner wall of the groove and prevent the material of the second semiconductor layer from growing in the groove. In this way, the area of the groove surrounded by the passivation protection layer away from the surface of the first semiconductor layer has a large occupancy ratio, which improves the light field mode modulation capability of the semiconductor photonic crystal light-emitting structure.
[0094] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this invention.
Claims
1. A semiconductor photonic crystal light-emitting structure, comprising: Semiconductor substrate layer; An active layer located on one side of the semiconductor substrate layer; A photonic crystal layer is located on the side of the active layer away from the semiconductor substrate layer. The photonic crystal layer includes a first semiconductor layer, a second semiconductor layer, and a passivation protection layer. The first semiconductor layer has a groove that extends from the surface of the first semiconductor layer away from the active layer into the first semiconductor layer. The passivation protection layer is located on the inner wall of the groove. The second semiconductor layer is located on the surface of the first semiconductor layer away from the active layer between adjacent grooves and does not extend into the groove.
2. The semiconductor photonic crystal light-emitting structure according to claim 1, wherein, It also includes a semiconductor protective layer, wherein the passivation protective layer is located on the side of the semiconductor protective layer opposite to the first semiconductor layer.
3. The semiconductor photonic crystal light-emitting structure according to claim 1, wherein, The passivation protective layer is made of insulating oxide or insulating nitride.
4. The semiconductor photonic crystal light-emitting structure according to claim 2, wherein, The semiconductor protective layer is a phosphide semiconductor material, a selenide semiconductor material, or a sulfide semiconductor material.
5. The semiconductor photonic crystal light-emitting structure according to claim 1, wherein, The thickness of the passivation protective layer is 1nm-50nm.
6. The semiconductor photonic crystal light-emitting structure according to claim 2, wherein, The thickness of the semiconductor protective layer is 1nm-50nm.
7. The semiconductor photonic crystal light-emitting structure according to claim 1, wherein, The second semiconductor layer includes: a first portion and a second portion, wherein the first portion is located on the side of the groove facing away from the semiconductor substrate layer, and the second portion is located on the side of the first semiconductor layer facing away from the semiconductor substrate layer between adjacent grooves; Wherein, the surface of the first portion facing the groove is recessed inward relative to the surface of the second portion facing the first semiconductor layer.
8. The semiconductor photonic crystal light-emitting structure according to claim 1, wherein, The region of the groove surrounded by the passivation protective layer away from the surface of the first semiconductor layer is rectangular in shape along a cross-section perpendicular to the semiconductor substrate layer.
9. The semiconductor photonic crystal light-emitting structure according to claim 1, wherein, The region of the groove surrounded by the passivation protective layer away from the surface of the first semiconductor layer has a first end away from the semiconductor substrate layer and a second end facing the semiconductor substrate layer, wherein the width of the first end parallel to the semiconductor substrate layer is smaller than the width of the second end parallel to the semiconductor substrate layer.
10. The semiconductor photonic crystal light-emitting structure according to claim 9, wherein, The region of the groove surrounded by the passivation protective layer away from the surface of the first semiconductor layer has a trapezoidal shape along a cross-sectional shape perpendicular to the semiconductor substrate layer.
11. The semiconductor photonic crystal light-emitting structure according to claim 1, wherein, The region of the groove surrounded by the passivation protective layer away from the surface of the first semiconductor layer first increases and then decreases along a direction parallel to the width of the semiconductor substrate layer from the semiconductor substrate layer to the active layer.
12. The semiconductor photonic crystal light-emitting structure according to claim 1, wherein, It also includes: a Bragg mirror located on the side of the photonic crystal layer opposite to the active layer; and a carrier transport layer located between the semiconductor substrate layer and the active layer, wherein the doping type of the carrier transport layer is opposite to that of the Bragg mirror.
13. A method for fabricating a semiconductor photonic crystal light-emitting structure, comprising: An active layer is formed on one side of the semiconductor substrate; A photonic crystal layer is formed on the side of the active layer opposite to the semiconductor substrate layer; The step of forming the photonic crystal includes: forming a first semiconductor layer on the side of the active layer away from the semiconductor substrate; forming a groove extending from the surface of the first semiconductor layer away from the active layer into the first semiconductor layer; forming a passivation protection layer on the inner wall of the groove; and forming a second semiconductor layer on the surface of the first semiconductor layer away from the active layer between adjacent grooves, wherein the second semiconductor layer does not extend into the groove.
14. The method for preparing a semiconductor photonic crystal light-emitting structure according to claim 13, wherein, The step of forming a passivation protective layer on the inner wall of the groove includes: An initial passivation protection layer is formed on the inner wall of the groove and on the side of the first semiconductor layer facing away from the semiconductor substrate layer between adjacent grooves; A mask layer is formed in the groove to cover the initial passivation protection layer, the mask layer exposing the initial passivation protection layer of the first semiconductor layer between adjacent grooves on the side opposite to the semiconductor substrate layer; After removing the initial passivation protection layer of the first semiconductor layer on the side away from the semiconductor substrate layer between adjacent grooves by etching with the mask layer as a mask, the mask layer is removed.
15. The method for preparing a semiconductor photonic crystal light-emitting structure according to claim 14, wherein, It also includes: before forming the initial passivation protective layer, forming an initial semiconductor protective layer on the inner wall surface of the groove and on the side surface of the first semiconductor layer facing away from the semiconductor substrate layer between adjacent grooves; After etching away the initial passivation protective layer of the first semiconductor layer on the side away from the semiconductor substrate between adjacent grooves using the mask layer as a mask, the initial semiconductor protective layer of the first semiconductor layer on the side away from the semiconductor substrate between adjacent grooves is etched away using the mask layer as a mask, and the initial semiconductor protective layer on the inner wall of the groove forms a semiconductor protective layer.