Pad assembly, circuit board, memory card, card socket and startup determination device

WO2026166094A1PCT designated stage Publication Date: 2026-08-13BIWIN STORAGE TECH CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Filing Date
2025-09-18
Publication Date
2026-08-13

Smart Images

  • Figure CN2025122307_13082026_PF_FP_ABST
    Figure CN2025122307_13082026_PF_FP_ABST
Patent Text Reader

Abstract

The present application relates to the technical field of solid state drives, and particularly relates to a pad assembly, a circuit board, a memory card, a card socket and a startup determination device. The pad assembly is disposed on a substrate of the memory card; the pad assembly comprises a plurality of rows of pads; the plurality of rows of pads include a first row of pads; the first row of pads include a first ground pad; the width of the first ground pad is greater than the width of any other pad in the first row of pads; the length of the first ground pad is greater than or equal to the length of any other pad in the first row of pads; and the distance from the center point of the first ground pad to a preset reference line on the substrate is less than the distance from the center point of any other pad in the first row of pads to the reference line, the direction parallel to the reference line being the width direction of components of the pad assembly. The pad assembly has a small size, enabling hot-plugging.
Need to check novelty before this filing date? Find Prior Art

Description

Pad assembly, circuit board, memory card, card slot and start-up determination device

[0001] Cross-references to related applications

[0002] This application claims priority to Chinese Patent Application No. 202510143000.5, filed on February 10, 2025, entitled "Pad Assembly, Circuit Board, Memory Card, Card Socket and Startup Determination Device", the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of solid-state drive technology, and in particular to a pad assembly, circuit board, memory card, card socket and boot determination device. Background Technology

[0004] BGA packaging is a technology that directly solders integrated circuit chips onto a PCB board, using a series of solder balls to connect the chip and the PCB. BGA SSD refers to a solid-state drive that uses BGA (Ball Grid Array) packaging technology. For example, the controller and bare NAND flash chips are packaged into a single package using BGA technology and soldered onto the PCB as a single chip, thus creating a BGA SSD. However, BGA SSDs require fixed soldering to the system PCB, making it difficult to easily replace the BGA SSD chips, which poses challenges for repair or system upgrades. Furthermore, the solder balls themselves, with their considerable height of several hundred micrometers, make further miniaturization of BGA SSD chips difficult. Summary of the Invention

[0005] The purpose of this application's embodiments includes, for example, providing a pad assembly, circuit board, memory card, card socket, and start-up determination device to improve the shortcomings of related technologies, which is beneficial for shortening the production cycle, reducing production costs, and improving product reliability.

[0006] This application provides a pad assembly distributed on the substrate of a memory card;

[0007] The pad assembly includes multiple rows of pads;

[0008] The multi-row pads include a first row of pads; the first row of pads includes a first ground pad; the first row of pads also includes multiple elongated power pads and multiple elongated second ground pads;

[0009] The width of the first grounding pad is greater than the width of any pad in the first row of pads; the length of the first grounding pad is greater than or equal to the length of any pad in the first row of pads.

[0010] The distance from the center point of the first grounding pad to the preset reference line on the substrate is less than the distance from the center point of any pad in the first row of pads to the reference line.

[0011] Wherein, the first row of pads is the row of pads with the smallest vertical distance to the reference line among the multiple rows of pads; the straight line direction parallel to the reference line is the width direction of each component of the pad assembly.

[0012] Optionally, the lengths of each of the second ground pads and the first ground pads are equal, and the center points of the first ground pads and each of the second ground pads are on a first straight line parallel to the reference line;

[0013] Each of the power pads has the same length, and the center point of each power pad is located on a second straight line parallel to the reference line.

[0014] The distance from the first straight line to the reference line is less than the distance from the second straight line to the reference line.

[0015] Optionally, the width of the first grounding pad is N times the width of the second grounding pad; N is an integer greater than or equal to 2; the length of the first grounding pad is equal to the length of each of the power pads.

[0016] Optionally, the multiple power pads are divided into a corresponding number of power pad units according to the planned number of power networks, and each group of power pad units includes at least two power pads; the multiple second ground pads are divided into multiple groups of second ground pad units, and each group of second ground pad units includes at least one second ground pad.

[0017] The following are arranged sequentially from both ends of the first row of pads toward the middle: the power pad unit, the second ground pad unit, and the first ground pad.

[0018] Optionally, the first row of pads includes two sets of power pad units, one set of power pad units includes two power pads belonging to the first power network, and the other set of power pad units includes three power pads belonging to the second power network.

[0019] The first row of pads includes two sets of second grounding pad units. One set of second grounding pad units includes one second grounding pad, and the other set of second grounding pad units includes two second grounding pads.

[0020] Optionally, the pad assembly further includes a second row of pads; the vertical distance between the second row of pads and the reference line is greater than the vertical distance between the first row of pads and the reference line.

[0021] The second row of pads includes at least two sets of hybrid pad units;

[0022] Each group of hybrid pad units includes at least one second ground pad and at least one first signal pad; the second ground pad and the first signal pad in the hybrid pad unit to which it belongs are distributed in close proximity; the length of the first signal pad is less than the length of the second ground pad.

[0023] The center points of all the second ground pads and all the first signal pads lie on a third straight line parallel to the reference line.

[0024] Optionally, the pad assembly further includes a third row of pads; the vertical distance from the third row of pads to the reference line is greater than the vertical distance from the first row of pads to the reference line;

[0025] The center points of each pad in the third row are arranged at intervals on a fourth straight line parallel to the reference line;

[0026] The third row of pads includes at least one set of differential signal pads, and a third grounding pad is provided on each side of the differential signal pads; the length of the third grounding pad is greater than the length of the differential signal pads.

[0027] Optionally, the pad assembly further includes rectangular solder mask components in the same number as the third ground pad; the differential signal pads include positive phase signal pads and negative phase signal pads;

[0028] The rectangular strip solder resist component has multiple through holes;

[0029] The wide side of the third ground pad is parallel to the long side of the corresponding rectangular solder mask component and the distance is less than a preset spacing threshold. The first wide side of the rectangular solder mask component is located on the center line of the positive phase signal pad adjacent to one side of the third ground pad, and the second wide side of the rectangular solder mask component coincides with the center line of the negative phase signal pad adjacent to the other side of the third ground pad.

[0030] Optionally, the substrate includes a first short side and a first long side; a corner-prevention feature is provided between the first short side and the first long side; the reference line is the first short side, a second short side corresponding to the first short side, or a middle line in the substrate parallel to the first short side or the second short side.

[0031] Optionally, each pad in the pad assembly is a gold finger pad.

[0032] This application also provides a printed circuit board, which includes a substrate; a pad assembly as provided in this application is soldered onto the passive surface of the substrate.

[0033] The substrate has multiple circuit layers; multiple device pads are soldered on the active surface of the substrate; the device pads are configured to solder bare cores, and each device pad is connected to the corresponding pad in the pad assembly through the circuits in the multiple circuit layers and the vias.

[0034] Optionally, the printed circuit board further includes: a plurality of cut-out areas provided in the other circuit layers besides the defined intermediate circuit layers;

[0035] The intermediate circuit layer is a complete circuit layer.

[0036] Alternatively, the intermediate circuit layer can be determined using the following method:

[0037] Based on the fact that the area of ​​each pad in the device and the pad assembly is positively related to the planar capacitance and negatively related to the distance from the reference plane, and with the goal of minimizing the planar capacitance, signal quality simulation is performed to obtain the intermediate circuit layer; wherein, the reference plane is the projection of the pad on the circuit layer.

[0038] This application embodiment also provides a memory card, the memory card including a main controller bare die, at least one flash memory bare die, multiple electronic components and a printed circuit board as provided in this application embodiment;

[0039] The main control die, the flash memory die, and the plurality of electronic components are soldered to the printed circuit board via corresponding device pads on the printed circuit board.

[0040] Optionally, the memory card further includes a plastic encapsulation; the main controller die, the at least one flash memory die, and the plurality of electronic components are all encapsulated in the plastic encapsulation.

[0041] Optionally, the material of the molding compound includes epoxy resin molding compound.

[0042] This application embodiment also provides a card holder, the card holder including: a sampling signal terminal, a comparison signal terminal and a plurality of spring electrode terminals;

[0043] When a memory card, as provided in the embodiments of this application, is inserted into the card slot, the comparison signal terminal begins to contact the first ground pad to output a comparison signal;

[0044] At the second moment when the memory card is inserted into the card slot, the plurality of spring electrode terminals begin to make contact with each pad on the passive surface of the printed circuit board in the memory card, except for the first grounding pad;

[0045] At the third moment when the memory card is inserted into the card slot, the sampling signal terminal begins to contact the first ground pad to output the start signal of the memory card;

[0046] The first moment is earlier than the second moment, and the second moment is earlier than the third moment.

[0047] Optionally, the length of the comparison signal terminal is greater than the length of the sampling signal terminal.

[0048] Optionally, the length of the spring electrode terminal is the same as that of the sampling signal terminal.

[0049] This application embodiment also provides a startup determination device for an electronic device, the startup determination device for the electronic device including a processor; the processor is connected to a sampling signal terminal and a comparison signal terminal on a card holder as provided in this application embodiment;

[0050] When a memory card, as provided in the embodiment of this application, is inserted into the card slot, a comparison signal is acquired through the comparison signal terminal at the first moment;

[0051] At the third moment when the memory card is fully inserted into the card slot, a start signal is acquired through the sampling signal terminal;

[0052] The power is turned on based on the comparison signal and the start signal to start the memory card.

[0053] The beneficial effects of the embodiments of this application include, for example:

[0054] The pad assembly of this application embodiment includes multiple rows of pads; the multiple rows of pads include a first row of pads; the first row of pads includes a first ground pad; the width of the first ground pad is greater than the width of any pad in the first row of pads; the length of the first ground pad is greater than or equal to the length of any pad in the first row of pads; the distance from the center point of the first ground pad to a preset reference line on the substrate is less than the distance from the center point of any pad in the first row to the reference line; wherein, the straight line direction parallel to the reference line is the width direction of each component of the pad assembly. The pad assembly of this application is obtained using LGA (Land Grid Array) packaging technology, which results in a small pad assembly size and supports hot-swapping; secondly, the first ground pad is closest to the reference line, which is beneficial for discharging static electricity; finally, the width of the first ground pad is relatively large, which can accommodate two spring electrode terminals for configuring the memory card's boot detection.

[0055] The printed circuit board of this application embodiment has multiple cut-out areas, which is beneficial for high-speed signal anti-interference routing in high-density circuit areas.

[0056] The memory card in this embodiment includes the above-described pad assembly and printed circuit board, and has all the beneficial effects of the pad assembly and printed circuit board.

[0057] The card slot in this embodiment supports hot-swapping of memory cards, making it more convenient to use.

[0058] The start-up determination device of the electronic device in this application embodiment can be plugged into and detached from the above-mentioned card slot, making it convenient to connect and use. Attached Figure Description

[0059] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0060] Figure 1 shows a physical image of a memory card according to an embodiment of this application;

[0061] Figure 2 shows a physical diagram of a card holder according to an embodiment of this application;

[0062] Figure 3 shows a schematic diagram of a pad assembly according to an embodiment of this application;

[0063] Figure 4-1 shows a schematic diagram of a first pad layout of the pad assembly according to an embodiment of this application;

[0064] Figure 4-2 shows a schematic diagram of a second pad layout for the pad assembly according to an embodiment of this application;

[0065] Figure 4-3 shows a schematic diagram of a third pad layout for the pad assembly according to an embodiment of this application;

[0066] Figure 5 shows a schematic diagram of a substrate with anti-foolproof corner cutting according to an embodiment of this application;

[0067] Figure 6 shows a schematic diagram of a pad assembly according to an embodiment of this application;

[0068] Figure 7 shows a front view of a memory card according to an embodiment of this application;

[0069] Figure 8 shows a side view of a memory card according to an embodiment of this application;

[0070] Figure 9 shows a cross-sectional view of a printed circuit board according to an embodiment of this application.

[0071] Icons: 100-Memory card; 110-Printed circuit board; 120-Main controller bare die; 130-Flash memory bare die; 140-Electronic components; 150-Epoxy resin molding compound; 111-Pad assembly; 1111-Rectangular component with solder mask; 1112-High-speed differential signal line and layer-changing via; 1113-LGA pad; 112-Substrate; 1121-Foothole prevention; 1122-First short side; 1123-First long side; 1124-Second short side; 1125-Linear layer; 1126-Device pad; 1127-Knockout area; 200-Card slot; 201-Comparison signal terminal; 202-Sampling signal terminal. Detailed Implementation

[0072] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments.

[0073] The components of the embodiments of this application described and illustrated in the accompanying drawings can be arranged and designed in a variety of different configurations. Therefore, the following detailed description of the embodiments of this application provided in the drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0074] In the following text, the terms "comprising," "having," and their cognates, which may be used in various embodiments of this application, are intended only to indicate a particular feature, number, step, operation, element, component, or combination thereof, and should not be construed as primarily excluding the presence of one or more other features, numbers, steps, operations, elements, components, or combinations thereof, or adding the possibility of one or more combinations thereof. Furthermore, the terms "first," "second," "third," etc., are used only for distinguishing descriptions and should not be construed as indicating or implying relative importance.

[0075] Unless otherwise specified, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which the various embodiments of this application pertain. Terms (such as those defined in commonly used dictionaries) shall be interpreted as having the same meaning as in their contextual meaning in the relevant technical field and shall not be construed as having an idealized or overly formal meaning, unless clearly defined in the various embodiments of this application.

[0076] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0077] In existing technologies, BGA SSDs, due to their BGA packaging technology, require two reflow soldering processes: chip balling and chip PCB mounting. Specifically, a high-temperature reflow soldering process is performed before the chips are divided into unit chips, and another high-temperature reflow soldering process is performed after the chips are divided and mounted onto the PCB. These two processes increase production cycle and cost, and the multiple high-temperature reflow soldering processes reduce product reliability. Therefore, this application provides a pad assembly, circuit board, memory card, card socket, and boot determination device. The pad assembly is small in size, supports hot-swapping of the memory card, and can improve the reliability of the memory card.

[0078] As shown in Figure 1, this application embodiment provides a memory card 100. Optionally, the memory card 100 includes a printed circuit board 110 and a bare chip disposed on the active surface of a substrate 112.

[0079] This application embodiment also provides a printed circuit board 110 configurable in the aforementioned memory card 100. The printed circuit board 110 may include a substrate 112; a pad assembly 111 provided in this application embodiment is soldered onto the passive surface of the substrate 112. This application embodiment features a layout design for the pad assembly 111, which is distributed on the substrate 112. The pad assembly 111 enables a pluggable connection between the memory card 100 and the card holder 200 provided in this application embodiment.

[0080] This application embodiment also provides a card holder 200. Optionally, as shown in FIG2, the card holder 200 includes: a comparison signal terminal 201, a sampling signal terminal 202, and a plurality of spring electrode terminals (e.g., pressure spring electrode terminals). The card holder 200 in this application embodiment is fixedly mounted on the system PCB board. Optionally, the length of the comparison signal terminal 201 is greater than the length of the sampling signal terminal 202.

[0081] The memory card 100 (also known as an LGA SSD) in this embodiment uses LGA (Land Grid Array) packaging technology, eliminating the need for a secondary high-temperature reflow process during production and installation, thus improving the stability of the memory card 100. In this embodiment, the card socket 200 is first mounted on the PCB board, decoupling the LGA SSD from the PCB board mounting. Simply insert the LGA SSD manually into the card socket 200, and the LGA SSD can transmit signals with the PCB board through the card socket 200. The LGA SSD supports hot-swapping, allowing it to be removed from the card socket 200 at any time, simplifying installation.

[0082] The pad assembly 111 will be described below with reference to some specific embodiments.

[0083] This application provides a pad assembly 111. Understandably, the pad assembly 111 is distributed on the substrate 112 of the memory card 100.

[0084] Optionally, as shown in Figure 3, the pad assembly 111 includes multiple rows of pads. The multiple rows of pads include a first row of pads; the first row of pads includes a first ground pad; the width of the first ground pad is greater than the width of any pad in the first row; the length of the first ground pad is greater than or equal to the length of any pad in the first row. That is, the first ground pad has different dimensions from the other pads; the first ground pad needs a larger width to accommodate two spring-loaded electrode terminals (spring-loaded electrode terminals), while the other pads only need to accommodate one spring-loaded electrode terminal to ensure support for the startup detection of the memory card 100.

[0085] The distance from the center point of the first grounding pad to the preset reference line on the substrate 112 is less than the distance from the center point of any pad in the first row of pads to the reference line.

[0086] Wherein, the straight line parallel to the reference line is the width direction of each component of the pad assembly. The pad labeled "5" in Figure 3 is the first ground pad. Optionally, each pad in the pad assembly 111 is a strip-shaped gold finger pad, such as a rectangular gold finger pad, wherein the short side of the rectangular pad is parallel to the reference line of the substrate 112, or if it is an elliptical gold finger pad, wherein the major axis of the ellipse is perpendicular to the reference line of the substrate 112.

[0087] In this embodiment, LGA packaging technology is used to redesign the original circular solder ball pads into rectangular pads, removing the original solder balls and applying a hard gold surface finish. All pads in the pad assembly 111 are collectively referred to as LGA pads 1113 to facilitate insertion and removal contact and improve insertion / removal reliability. By replacing the solder ball pads with a certain height with hardware gold finger pads, the thickness of the LGA SSD can be further reduced, resulting in higher integration.

[0088] Optionally, the substrate 112 includes a first short side 1122 and a first long side 1123. A foolproof notch 1121 is provided between the first short side 1122 and the first long side 1123; the side corresponding to the first short side 1122 is the second short side 1124. The reference line can be the first short side 1122, the second short side 1122, or a midline between the first short side 1122 and the second short side 1124, and the reference line is parallel to the first short side 1122 or the second short side 1124. Optionally, the pad assembly 111 may include three rows of pads. If the reference line is the first short side 1122, as shown in FIG4-1, the first row of pads is the row of pads closest to the first short side 1122. If the reference line is the second short side 1124, as shown in FIG4-2, the first row of pads is the row of pads closest to the second short side 1124. If the reference line is the center line, as shown in Figure 4-3, the first row of pads is the row of pads closest to the center line; where the center line is the line between the first short side 1122 and the second short side 1124.

[0089] Optionally, the first row of pads is the row of pads with the smallest vertical distance to the reference line among the multiple rows of pads. The first row of pads also includes multiple elongated power pads and multiple elongated second ground pads.

[0090] Each second grounding pad is of equal length to the first grounding pad, and the center points of the first grounding pad and each second grounding pad lie on a first straight line parallel to the reference line. Optionally, the width of the first grounding pad is N times the width of the second grounding pad, where N is an integer greater than or equal to 2. For example, the width of the first grounding pad is twice the width of the second grounding pad, thereby ensuring that the first grounding pad can accommodate two spring electrode terminals.

[0091] The length of the first grounding pad is equal to the length of each power pad.

[0092] All power pads are of uniform length, and their center points lie on a second straight line parallel to the reference line. The lengths of both the second and first ground pads are greater than or equal to the lengths of the power pads. The perpendicular distance between the first and second straight lines is less than the length of the power pads.

[0093] The distance from the first straight line to the reference line is less than the distance from the second straight line to the reference line. That is, the perpendicular distance from the center point of the multiple second ground pads and the first ground pad to the reference line is less than the perpendicular distance from the center point of any one of the multiple power pads to the reference line.

[0094] Optionally, if the second ground pad, the first ground pad, and the power pad are all rectangular pads, then the vertical distance from the target width of the plurality of second ground pads and the first ground pad to the reference line is less than the vertical distance from the target width of any of the plurality of power pads to the reference line; wherein, the target width is the width of the plurality of second ground pads and the first ground pad with the smallest vertical distance from the two widths to the reference line. To ensure that the spring clip electrode terminals contact the ground pad first to release static electricity, the ground pad is close to the reference line.

[0095] The first row of pads contains a first grounding pad that can accommodate two spring electrode terminals. These two spring electrode terminals on the card holder 200 are connected to this first grounding pad. The two spring electrode terminals are of different lengths and are arranged one after the other. The longer spring electrode terminal has the same length as the spring electrode terminals connected to the other pads. The shorter spring electrode terminal is a detection pin. When the card body is inserted but not yet fully inserted, all spring electrode terminals except the detection pin are in contact with the pads in the pad assembly 111. At this time, no function commands are output, and there is no function output. When the memory card 100 is fully inserted, the detection pin and the detection pin in the card holder 200 are shorted, the memory card 100 is powered on, the system recognizes the insertion of the memory card 100, and the memory card 100 starts operating.

[0096] Optionally, multiple power pads are divided into a corresponding number of power pad units based on the planned number of power networks, with each power pad unit comprising at least two power pads. Each power pad is assigned to a different power pad unit based on its associated power network. A power network refers to different voltage rails configured on a circuit board to supply power. Each power network typically represents a specific power supply voltage, such as +5V, +3.3V, or +1.8V.

[0097] Multiple second grounding pads are divided into multiple groups of second grounding pad units, and each group of second grounding pad units includes at least one second grounding pad.

[0098] The first row of pads is arranged sequentially from both ends toward the middle as follows: power pad unit, second ground pad unit, and first ground pad.

[0099] Optionally, as shown in Figure 5, the first row of pads includes two sets of power pad units. One set of power pad units includes two power pads (PWR1) belonging to the first power network, such as labels "8" and "9" in Figure 5. The other set of power pad units includes three power pads (PWR2) belonging to the second power network, such as labels "1", "2", and "3" in Figure 5.

[0100] The first row of pads includes two sets of second ground pad units. One set of second ground pad units includes one second ground pad (GND), as labeled "4" in Figure 5. The other set of second ground pad units includes two second ground pads (GND), as labeled "6" and "7" in Figure 5.

[0101] Optionally, the pad assembly 111 may further include a second row of pads; the vertical distance between the second row of pads and the reference line is greater than the vertical distance between the first row of pads and the reference line. The second row of pads includes at least two sets of hybrid pad units.

[0102] Each group of hybrid pad units includes at least one second ground pad and at least one first signal pad; the second ground pad and the first signal pad in the hybrid pad unit to which it belongs are distributed in close proximity; the length of the first signal pad is less than the length of the second ground pad. The first signal pad is small and short, which can reduce the pad area, reduce the capacitive reactance, and improve impedance continuity. The ground pad next to the first signal pad is longer, which can increase the contact area of ​​the spring electrode terminal to reduce the contact resistance. The portion extending from the ground pad can also better shield the signal, forming an enclosed structure.

[0103] The center points of all second ground pads and all first signal pads are located on a third straight line, which is parallel to the reference line. For example, consider two hybrid pad units, each containing two first signal pads (SIGNAL) and one second ground pad (GND). In Figure 5, one hybrid pad unit has first signal pads labeled "11" and "12," and a second ground pad labeled "10." Another hybrid pad unit has two first signal pads labeled "14" and "15," and a second ground pad labeled "13." The distance between the third straight line and the second straight line is greater than the length of the second ground pad.

[0104] Optionally, the pad assembly 111 further includes a third row of pads; the vertical distance from the third row of pads to the reference line is greater than the vertical distance from the first row of pads to the reference line. The center points of each pad in the third row are spaced apart on a fourth straight line parallel to the reference line. The third row of pads includes at least one set of differential signal pads, and a third ground pad is provided on each side of the differential signal pads; the length of the third ground pad is greater than the length of the differential signal pad. For example, the difference between the length of the third ground pad and the length of the differential signal pad is 0.3 mm.

[0105] Optionally, as shown in Figure 4-1, if the reference line is the first short side 1122, the first row of pads is the row of pads closest to the first short side 1122, the distance between the third straight line and the second straight line is greater than (L1+L2) / 2, and the distance between the third straight line and the second straight line is less than L3 / 2, where L1 is the length of the power pad, L2 is the length of the first signal pad, and L3 is the length of the substrate 112. The fourth straight line has the smallest vertical distance to the second short side 1124. The distance from the fourth straight line to the second short side 1124 is greater than half the length of the third ground pad, and the distance from the fourth straight line to the second short side 1124 is less than half the length of the substrate 112.

[0106] Optionally, the pad assembly 111 includes four sets of differential signal pads, each set of differential signal pads including a positive phase signal pad (SIGNAL) and a negative phase signal pad (DIFF), such as the labels "17 and 18", "20 and 21", "23 and 24" and "26 and 27" in Figure 5; in addition, there is a ground pad GND between each set of differential signal pads, and a ground pad GND on the outer side of each differential signal pad at both ends, such as the labels "16", "19", "22", "25" and "28" in Figure 5.

[0107] Optionally, the pad assembly 111 further includes rectangular solder mask components 1111 in the same number as the third ground pad; the differential signal pads include positive phase signal pads and negative phase signal pads, as shown in FIG6, and the rectangular solder mask components 1111 have multiple vias. High-speed differential signal lines and layer-switching vias 1112 are provided on the substrate 112, and the high-speed differential signal lines and layer-switching vias 1112 are located above the positive phase signal pads and negative phase signal pads on the substrate 112 near the reference line.

[0108] The wide side of the third ground pad is parallel to the long side of the corresponding rectangular solder mask component 1111, and the distance between them is less than a preset spacing threshold. The first short wide side of the rectangular solder mask component 1111 is located on the center line of the positive phase signal pad adjacent to one side of the third ground pad, and the second short wide side of the rectangular solder mask component 1111 coincides with the center line of the negative phase signal pad adjacent to the other side of the third ground pad. For example, if the preset spacing threshold is zero, the wide side of the third ground pad is joined to the long side of the corresponding rectangular solder mask component 1111. That is, this embodiment also incorporates SIPI technology to perform impedance continuity and crosstalk reduction design for key signals, and utilizes a dynamic impedance continuity processing method to further reduce the capacitive reactance value of the large pad.

[0109] The third row of pads are high-speed signal pads. Two short pads form a pair of differential signal pads, and there are multiple pairs of high-speed differential signal pads. A long grounding pad is placed adjacent to each high-speed differential signal pad, forming a semi-enclosed shape to provide better return-current ground shielding. The high-speed differential signal is connected to the line layer via a layer-change via through the high-speed differential signal line. The high-speed differential signal line and the layer-change via 1112 are located between two rectangular solder mask components 1111. The adjacent grounding pads and the corresponding rectangular solder mask components 1111 form a semi-enclosed loop-shaped shielding component, which further grounds and shields the differential signal. The adjacent vias shorten the signal return path and improve signal quality. The solder mask insulation prevents the spring electrode terminals on the card holder 200 from contacting the area beyond the open solder mask rectangular pads, thus avoiding signal short circuits.

[0110] Based on the characteristics of high-speed interface signals, this application embodiment redesigns the pad layout and reduces the number of pads to fewer than dozens in a BGA SSD. The space freed up can be configured for circuit design optimization, improving signal design quality and increasing the integration density of the components.

[0111] This application embodiment also provides a memory card 100. Optionally, as shown in Figures 7 to 9, the memory card 100 includes a printed circuit board 110, a main controller die 120, a plurality of stacked flash memory dies 130, and a plurality of electronic components 140.

[0112] The printed circuit board 110 is provided with multiple device pads 1126. The main control bare die 120, flash memory bare die 130 and multiple electronic components 140 are respectively soldered to the corresponding device pads 1126 to achieve soldering with the printed circuit board 110.

[0113] Optionally, the memory card 100 may also include a molding compound; the controller die 120, multiple flash memory dies 130, and multiple electronic components 140 are all encapsulated in the molding compound. The molding compound is made of, but is not limited to, epoxy resin molding compound 150.

[0114] This application embodiment also provides a printed circuit board 110, which can be configured in the aforementioned memory card 100. Optionally, the printed circuit board 110 includes a substrate 112, and a pad assembly 111 provided in this application embodiment is soldered on the passive surface of the substrate 112. Various types of pads in the pad assembly 111 are collectively referred to as LGA pads 1113.

[0115] As shown in Figure 8, a multilayer circuit layer 1125 is provided on the substrate 112; a plurality of device pads 1126 are soldered on the active surface of the substrate 112; the device pads 1126 are configured to solder bare cores, and each device pad 1126 is connected to the corresponding LGA pad 1113 in the pad assembly 111 through the circuits in the multilayer circuit layer 1125 and the vias opened therein.

[0116] Optionally, the substrate 112 has two or more circuitry layers configured to transmit electrical signals. The side of the substrate 112 that contacts the main controller die 120, multiple flash memory dies 130, and multiple electronic components 140 is the front side, which has device pads 1126. Chip signals are transferred from the chip pads to the device pads 1126 on the front side of the substrate 112 via wire bond bonding or solder ball soldering. The other side of the substrate 112 is the back side, where LGA pads 1113 are distributed. The LGA pads 1113 are configured to contact external electrode terminals. The LGA SSD contacts the spring electrode terminals on the card slot 200 on the PCB motherboard via the LGA pads 1113, thereby transmitting signals to the PCB motherboard.

[0117] Optionally, as shown in FIG9, the printed circuit board 110 further includes a plurality of cut-out areas 1127: the plurality of cut-out areas 1127 are disposed in other circuit layers besides the defined intermediate circuit layer; the intermediate circuit layer is a complete circuit layer 1125; the cut-out area 1127 is an empty area obtained by removing the copper foil of the projection area of ​​each pad in the pad assembly 1126 of each device or the pad assembly 111 on the corresponding circuit layer 1125.

[0118] Alternatively, the intermediate circuit layer can be determined using the following method:

[0119] Based on the fact that the area of ​​each pad in the pad assembly 1126 of each device is positively related to the planar capacitance and negatively related to the distance from the reference plane, signal quality simulation is performed with the goal of minimizing the planar capacitance to obtain the intermediate circuit layer; wherein, the reference plane is the projection of the pad on the circuit layer 1125. The front side of the substrate 112 has device pads 1126 and several circuit layers 1125. The device pads 1126 on the front side of the substrate 112 and the LGA pads 1113 on the back side of the substrate 112 will form planar capacitance with the adjacent circuit layers 1125. The planar capacitance will generate a large capacitive reactance to the link and damage the impedance continuity. According to the formula C=ε*S / d (ε is the dielectric constant, S is the projection of the pad on the plane of the circuit layer 1125, and d is the plane distance), the area of ​​the device pads 1126 and LGA pads 1113 is positively related to the planar capacitance, and the plane distance between the pads and the adjacent circuit layers 1125 is negatively related. One circuit layer 1125 between the device pads 1126 and LGA pads 1113 is retained on the Z-axis, and the conductors of other layers are removed. The area of ​​different pads can be confirmed by signal quality simulation, and the retained intermediate circuit layer is determined by signal quality. This dynamic selection of intermediate circuit layers minimizes the empty areas that need to be hollowed out, isolating them from other signals, which is beneficial for high-speed signal anti-interference routing in high-density circuit areas.

[0120] Signal quality is related to the parasitic capacitance of the pads; a larger parasitic capacitance results in poorer signal quality. The size of the parasitic capacitance is related to the area of ​​the reference layer (also known as the intermediate circuit layer) opposite the pads and the distance between them. Since the thickness of the substrate 112 is fixed, signal quality can only be adjusted by changing the area and distance of the reference layer corresponding to the pads.

[0121] Ideally, the pads on the front and back sides of the substrate 112 should have their own decoupled reference layers, and the distance and area can be adjusted at will. However, due to distance limitations, retaining the middle circuit layer 1125 is already the optimal design. Therefore, the middle reference layer will be either too close or too far from the pads on both sides, and the parasitic capacitance of the pads at both ends will be either too small or too large. Simulation is needed to confirm the capacitance ratio at both ends in order to find an optimal reference layer.

[0122] Optionally, in this embodiment, the pad assembly 111 is divided into three rows. The memory card 100 is rectangular, and the substrate 112 is provided with a foolproof corner notch 1121. The wide side connected by the foolproof corner notch 1121 is a reference line. Starting from one end of the foolproof corner notch 1121, the socket card holder 200 is pushed in, and the pads are arranged in the order of contact with the card holder 200: the first row of pads, the second row of pads, and the third row of pads. The first row of pads includes power pads, the second row includes ordinary signal pads, and the third row includes high-speed signal pads (differential signal pads). A certain number of ground pads are arranged adjacent to the power pads and signal pads. Moreover, in the first row of pads, the ground pads are closer to the wide side (first short side 1122) connected to the notch edge of the foolproof corner notch 1121 than the power pads. When the LGA SSD is pushed into the card slot 200, the grounding pad first contacts the spring electrode terminal on the card slot 200, thereby discharging the electrostatic discharge of the LGA SSD and improving the product's anti-static reliability.

[0123] Optionally, the substrate 112 has two or more circuit layers (line layers) configured to transmit electrical signals. The contact surface between the substrate 112 and the chip is an active surface (also called the front side) with solder pads (device pads 1126). Chip signals are transferred from the chip pads to the solder pads on the active surface of the substrate 112 via wire bond bonding or solder balls. The other side of the substrate 112 is a passive surface (also called the back side), with pad assemblies 111 distributed on the back side of the substrate 112. The LGA SSD contacts the spring electrode terminals on the card slot 200 on the PCB motherboard through the pad assemblies 111, thereby transmitting signals to the PCB motherboard.

[0124] This application provides a card holder 200, which optionally includes a sampling signal terminal 202, a comparison signal terminal 201, and a plurality of spring electrode terminals; the sampling signal terminal 202 and the comparison signal terminal 201 are connected to the same voltage. Optionally, the length of the comparison signal terminal 201 is greater than the length of the sampling signal terminal 202.

[0125] When the memory card 100 of this embodiment is inserted into the card holder 200 at the first moment, the comparison signal terminal 201 begins to contact the first ground pad to output a comparison signal. During the insertion of the memory card 100, the first ground pad is configured to contact the comparison signal terminal 201 on the card holder 200 at the first moment.

[0126] At the second moment when the memory card 100 is inserted into the card holder 200, multiple spring electrode terminals begin to make contact with each pad on the passive surface of the printed circuit board 110 in the memory card 100, except for the first grounding pad.

[0127] At the third moment when the memory card 100 is inserted into the card holder 200, the sampling signal terminal 202 begins to contact the first ground pad to output a start signal for the memory card 100. The first ground pad is also configured to begin contacting the sampling signal terminal 202 on the card holder 200 at the third moment.

[0128] The first moment is earlier than the second moment, and the second moment is earlier than the third moment. The contact sequence between each pad and the terminal on the card holder 200, from first to last, is as follows: comparison signal terminal 201 (long terminal), each spring electrode terminal, and sampling signal terminal 202 (short terminal). Among them, the spring electrode terminals and the sampling signal terminal 202 have the same length.

[0129] Optionally, the card holder 200 in this embodiment is fixedly mounted on the system PCB board.

[0130] The length of the sampling signal terminal 202 is less than the length of the comparison signal terminal 201. The specific length can be adjusted according to the specific product requirements, and this application embodiment does not impose any restrictions.

[0131] The comparison signal terminal 201 is grounded on the link between the card slot 200 and the PCB board. The shorter sampling signal terminal 202 is a detection PIN. The detection PIN is connected to the start-up determination device of the electronic device on the PCB board. By determining whether the detection PIN is grounded, it is determined whether the memory card 100 is installed in place, and then it is determined whether to start the memory card 100.

[0132] In other words, in order to support the hot-swapping of the memory card 100, this application adds a detection signal to the card socket 200. This detection signal requires the addition of a PIN and a spring electrode terminal to the card socket 200 to support its signal transmission to the hot-swapping start determination device.

[0133] In this embodiment, the first grounding pad first contacts the signal terminal on the card holder 200, thus releasing static electricity. When the pad assembly 111 of this embodiment is disposed in the memory card 100, the first grounding pad contacts the comparison signal terminal 201 at a first moment and the sampling signal terminal 202 at a third moment. The activation function of the memory card 100 can be determined based on these two signal terminals, enabling hot-swapping of the memory card 100. When the pad assembly 111 of this embodiment is disposed in the memory card 100, a secondary high-temperature reflow soldering is unnecessary, improving the reliability of the memory card 100.

[0134] This application embodiment also provides a start-up determination device for an electronic device, the device including a processor; the processor is connected to a sampling signal terminal 202 and a comparison signal terminal 201 on a card holder 200 as provided in this application embodiment.

[0135] When the memory card 100 in this embodiment is inserted into the card slot 200, a comparison signal is acquired through the comparison signal terminal 201.

[0136] At the third moment when the memory card 100 is fully inserted into the card slot 200, the start signal is acquired through the sampling signal terminal 202.

[0137] The power is turned on based on the comparison signal and the start signal to start the memory card 100.

[0138] In the prior art, solid-state drives (SSDs) are BGA soldered and do not support hot-swapping. To support hot-swapping, this application embodiment requires a startup determination device (e.g., a control circuit) to be set on the SSD circuit PCB. The detection PIN is connected to the control circuit. The working principle of the control circuit is as follows: when the control circuit detects that the detection PIN is in contact with the first ground pad, it confirms that the memory card 100 has been installed in place, the system recognizes the insertion of the memory card 100, and the memory card 100 starts running; when the memory card 100 is inserted but the card holder 200 is not yet in place, except for the detection PIN, all other spring electrode terminals are in contact with the target pad, the detection PIN is open from GND, the memory card 100 does not perform any functions, does not output any commands, and has no functional output.

[0139] According to the characteristics of high-speed interface signals, the pad assembly 111 of this application redesigns the pad position layout and reduces the number of pads to less than dozens of BGA SSDs. The space freed up can be configured for circuit design optimization, improving signal design quality and increasing particle integration.

[0140] The LGA SSD of this application embodiment not only has the advantages of being thin, light, small, large capacity, and high-frequency read / write, but also has the advantages of being hot-swappable and easy to replace. Since the LGA hard gold finger pads on the back of the substrate 112 replace the solder ball pads with a certain height, the thickness of the LGA SSD can be further reduced and the integration density is higher.

[0141] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Industrial applicability

[0142] In summary, this application provides a pad assembly, circuit board, memory card, card socket, and start-up determination device, which have the advantages of being thin and light, small in size, large in capacity, high-frequency read and write, hot-swappable, easy to replace, and highly integrated.

Claims

1. A pad assembly, characterized in that: The pad assembly is distributed on the substrate of the memory card; The pad assembly includes multiple rows of pads; The multi-row pads include a first row of pads; the first row of pads includes a first ground pad; the first row of pads also includes multiple elongated power pads and multiple elongated second ground pads; The width of the first grounding pad is greater than the width of any pad in the first row of pads; the length of the first grounding pad is greater than or equal to the length of any pad in the first row of pads. The distance from the center point of the first grounding pad to the preset reference line on the substrate is less than the distance from the center point of any non-grounding pad in the first row of pads to the reference line. Wherein, the first row of pads is the row of pads with the smallest vertical distance to the reference line among the multiple rows of pads; the straight line direction parallel to the reference line is the width direction of each component of the pad assembly.

2. The pad assembly according to claim 1, characterized in that, Each of the second ground pads and the first ground pads are of equal length, and the center points of the first ground pads and each of the second ground pads are on a first straight line parallel to the reference line; Each of the power pads has the same length, and the center point of each power pad is located on a second straight line parallel to the reference line. The distance from the first straight line to the reference line is less than the distance from the second straight line to the reference line.

3. The pad assembly according to claim 2, characterized in that, The width of the first grounding pad is N times the width of the second grounding pad; N is an integer greater than or equal to 2; the length of the first grounding pad is equal to the length of each of the power pads.

4. The pad assembly according to claim 2, characterized in that, The multiple power pads are divided into a corresponding number of power pad units according to the planned number of power networks, and each group of power pad units includes at least two power pads; the multiple second ground pads are divided into multiple groups of second ground pad units, and each group of second ground pad units includes at least one second ground pad. The following are arranged sequentially from both ends of the first row of pads toward the middle: the power pad unit, the second ground pad unit, and the first ground pad.

5. The pad assembly according to claim 4, characterized in that, The first row of pads includes two sets of power pad units. One set of power pad units includes two power pads belonging to the first power network, and the other set of power pad units includes three power pads belonging to the second power network. The first row of pads includes two sets of second grounding pad units. One set of second grounding pad units includes one second grounding pad, and the other set of second grounding pad units includes two second grounding pads.

6. The pad assembly according to claim 2, characterized in that, The pad assembly further includes a second row of pads; the vertical distance between the second row of pads and the reference line is greater than the vertical distance between the first row of pads and the reference line; The second row of pads includes at least two sets of hybrid pad units; Each group of hybrid pad units includes at least one second ground pad and at least one first signal pad; the second ground pad and the first signal pad in the hybrid pad unit to which it belongs are distributed in close proximity; the length of the first signal pad is less than the length of the second ground pad. The center points of all the second ground pads and all the first signal pads lie on a third straight line parallel to the reference line.

7. The pad assembly according to claim 2, characterized in that, The pad assembly further includes a third row of pads; the vertical distance from the third row of pads to the reference line is greater than the vertical distance from the first row of pads to the reference line. The center points of each pad in the third row are arranged at intervals on a fourth straight line parallel to the reference line; The third row of pads includes at least one set of differential signal pads, and a third grounding pad is provided on each side of the differential signal pads; the length of the third grounding pad is greater than the length of the differential signal pads.

8. The pad assembly according to claim 7, characterized in that, The pad assembly also includes rectangular solder mask components in the same number as the third ground pad; the differential signal pads include positive phase signal pads and negative phase signal pads; The rectangular strip solder resist component has multiple through holes; The wide side of the third ground pad is parallel to the long side of the corresponding rectangular solder mask component and the distance is less than a preset spacing threshold. The first wide side of the rectangular solder mask component is located on the center line of the positive phase signal pad adjacent to one side of the third ground pad, and the second wide side of the rectangular solder mask component coincides with the center line of the negative phase signal pad adjacent to the other side of the third ground pad.

9. The pad assembly according to any one of claims 1-8, characterized in that, The substrate includes a first short side and a first long side; a corner-prevention feature is provided between the first short side and the first long side; the reference line is the first short side, a second short side corresponding to the first short side, or a middle line in the substrate parallel to the first short side or the second short side.

10. The pad assembly according to any one of claims 1-8, characterized in that, Each pad in the pad assembly is a gold finger pad.

11. A printed circuit board, characterized in that, The printed circuit board includes a substrate; a pad assembly as described in any one of claims 1-10 is soldered onto the passive surface of the substrate; The substrate has multiple circuit layers; multiple device pads are soldered on the active surface of the substrate; the device pads are configured to solder bare cores, and each device pad is connected to the corresponding pad in the pad assembly through the circuits in the multiple circuit layers and the vias.

12. The printed circuit board according to claim 11, characterized in that, The printed circuit board further includes: multiple cut-out areas set in the other circuit layers besides the defined intermediate circuit layers; The intermediate circuit layer is a complete circuit layer.

13. The printed circuit board according to claim 12, characterized in that, The intermediate circuit layer is determined using the following method: Based on the fact that the area of ​​each pad in the device and the pad assembly is positively related to the planar capacitance and negatively related to the distance from the reference plane, and with the goal of minimizing the planar capacitance, signal quality simulation is performed to obtain the intermediate circuit layer; wherein, the reference plane is the projection of the pad on the circuit layer.

14. A memory card, characterized in that, The memory card includes a main controller die, at least one flash memory die, multiple electronic components, and a printed circuit board as described in any one of claims 11-13; The main control die, the flash memory die, and the plurality of electronic components are soldered to the printed circuit board via corresponding device pads on the printed circuit board.

15. The memory card according to claim 14, characterized in that, The memory card also includes a plastic encapsulation; the main controller die, the at least one flash memory die, and the plurality of electronic components are all encapsulated in the plastic encapsulation.

16. The memory card according to claim 15, characterized in that, The material of the molding compound includes epoxy resin molding compound.

17. A card holder, characterized in that, The card holder includes: a sampling signal terminal, a comparison signal terminal, and multiple spring electrode terminals; At the first moment when the memory card as described in any one of claims 14-16 is inserted into the card slot, the comparison signal terminal begins to contact the first ground pad to output a comparison signal; At the second moment when the memory card is inserted into the card slot, the plurality of spring electrode terminals begin to make contact with each pad on the passive surface of the printed circuit board in the memory card, except for the first grounding pad; At the third moment when the memory card is inserted into the card slot, the sampling signal terminal begins to contact the first ground pad to output the start signal of the memory card; The first moment is earlier than the second moment, and the second moment is earlier than the third moment.

18. The card holder according to claim 17, characterized in that, The length of the comparison signal terminal is greater than the length of the sampling signal terminal.

19. The card holder according to claim 17 or 18, characterized in that, The length of the spring electrode terminal is the same as that of the sampling signal terminal.

20. A start-up determination device for an electronic device, characterized in that, The start-up determination device of the electronic device includes a processor; the processor is connected to a sampling signal terminal and a comparison signal terminal on the card slot as described in any one of claims 17 to 19; At the first moment when the memory card as described in any one of claims 14 to 16 is inserted into the card slot, a comparison signal is acquired through the comparison signal terminal; At the third moment when the memory card is fully inserted into the card slot, a start signal is acquired through the sampling signal terminal; The power is turned on based on the comparison signal and the start signal to start the memory card.