Communication method and apparatus, and device and storage medium

Abstract

The present application relates to the technical field of communications. Disclosed are a communication method and apparatus, and a device and a storage medium. In the method, a random access preamble is sent in a first random access occasion (RO); when the first RO is a first-type RO, a payload is sent on a first PRU, the first PRU being a first-type PRU or a second-type PRU; when the first RO is a second-type RO, a payload is sent on a second PRU, the second PRU being the second-type PRU; and the first PRU and the second PRU are determined on the basis of mapping rules between PRACH slots and PRU sets, wherein the first-type RO / first-type PRU is a newly added RO / PRU in sub-band full-duplex communication, and the second-type RO / second-type PRU is an existing RO / PRU in time division duplex communication. The method provided in the present application can effectively support a terminal device in initiating 2-step random access in a 2-step random access scenario.

Description

A communication method, apparatus, device, and storage medium

[0001] This application claims priority to Chinese Patent Application No. 202510130831.9, filed on February 5, 2025, entitled "A Communication Method, Apparatus, Device and Storage Medium", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of communication technology, and in particular to a communication method, apparatus, device and storage medium. Background Technology

[0003] With the rapid development of 5G mobile communication technology, new radio (NR), diverse communication needs have emerged. To meet the demands of these emerging services, a sub-band full duplex (SBFD) scheme has been proposed to improve uplink coverage in time division duplex (TDD) systems. Sub-band full duplex refers to a TDD system where network devices utilize different sub-bands for uplink and downlink transmissions, enabling both reception and transmission within a single time slot or orthogonal frequency division multiplexing (OFDM) symbol.

[0004] Currently, in SBFD communication schemes, configuring TDD downlink symbols or flexible symbols as SBFD symbols and configuring random access occupancy (RO) on the SBFD symbols can increase the number of ROs. In a two-step random access scenario, how to map the newly added ROs to Physical Uplink Shared Channel (PUSCH) resource units is a problem that needs to be solved. Summary of the Invention

[0005] This application provides a communication method, apparatus, device, and storage medium that can effectively support terminal devices initiating two-step random access in a two-step random access scenario. The technical solution is as follows:

[0006] In a first aspect, embodiments of this application provide a communication method applied to a first terminal device, the first terminal device being a terminal device supporting sub-band full-duplex SBFD. The method includes: sending a random access preamble to a first random access location (RO) during a first random access event, the random access preamble being used for two-step random access; when the first RO is a first type RO, sending a payload to a first physical uplink shared channel resource unit (PRU), the first PRU being either a first type PRU or a second type PRU; when the first RO is a second type RO, sending a payload to a second PRU, the second PRU being a second type PRU, the first PRU and the second PRU being determined based on a mapping rule between PRACH time slots and PRU sets; wherein, the first type RO is a newly added RO in sub-band full-duplex communication, the second type RO is an existing RO in time-division full-duplex communication, the first type PRU is a newly added PRU in sub-band full-duplex communication, and the second type PRU is an existing PRU in time-division full-duplex communication.

[0007] Based on the above technical solution, when initiating a two-step random access, a terminal device supporting subband full-duplex SBFD (hereinafter referred to as SBFD terminal device) can send a random access preamble on the RO during the first random access time and send the payload on the corresponding PRU. Based on the mapping rules between the Physical Random Access Channel (PRACH) time slots and the PRU set, if the first RO is a first-type RO, the SBFD terminal device can send the payload on the first PRU, which can be either a first-type PRU or a second-type PRU. If the first RO is a second-type RO, the SBFD terminal device can send the payload on the second PRU, which can also be a second-type PRU. In summary, after adding RO resources and PRUs to subband full-duplex communication, the SBFD terminal device can choose either the newly added first-type RO for two-step random access or the existing second-type RO for two-step random access. Furthermore, this application provides a reasonable mapping rule for PRACH slots to PUSCH resources under SBFD operation for SBFD terminal devices, enabling SBFD terminal devices to send payloads when selecting different types of ROs, thereby effectively supporting SBFD terminal devices to initiate two-step random access.

[0008] In conjunction with the first aspect, in certain implementations of the first aspect, the mapping rules between PRACH time slots and PRU sets include: for a first type RO in a first type time slot, the first type RO is mapped to a first type PRU and a second type PRU, with the second type PRU being mapped first. After all second type PRUs have been mapped to random access preambles, the random access preambles on the first type ROs continue to be mapped to first type PRUs; or, the first type RO is mapped only to first type PRUs; or, the first type RO is not mapped to PRUs. For a first type RO in a second type time slot, the first type RO is mapped only to a first type PRU; for a second type RO, the second type RO is mapped only to a second type PRU. Wherein, the first type time slot includes both first type ROs and second type ROs, and the second type time slot includes first type ROs. Traditional terminal devices can only use second type ROs and second type PRUs during random access. In this embodiment, multiple options are provided for mapping the first type of RO, while the second type of RO is only mapped to the second type of PRU. In this way, traditional terminal devices and SBFD terminal devices can use a common PUSCH resource configuration, which can reduce the impact on traditional terminal devices while supporting SBFD terminal devices to initiate two-step random access.

[0009] In conjunction with the first aspect, in some implementations of the first aspect, for a first type RO in a first type time slot, if the first type RO is mapped only to a first type PRU, the mapping rule between the PRACH time slot and the PRU set further includes: if the first PRU set includes first type PRUs, the first type RO is mapped to the first type PRUs in the first PRU set, and the first PRU set is the PRU set corresponding to the first type time slot; if the first PRU set does not include first type PRUs, the first type RO is not mapped to PRUs, or the first type RO is mapped to the first type PRUs in the second PRU set, and the second PRU set is the PRU set corresponding to the second type time slot. In this way, the mapping from the first type RO to the first type PRU and the mapping from the second type RO to the second type PRU are determined separately. When selecting a second type RO, the SBFD terminal device follows the mapping rule from the second type RO to the second type. When selecting a first type RO, the SBFD terminal device follows the mapping rule from the first type RO to the first type PRU. Traditional terminal devices also follow the mapping rule from the first type RO to the first type PRU. Therefore, SBFD terminal devices and traditional terminal devices have a consistent understanding of the PRU position corresponding to a specific first-type RO / preamble combination. The embodiments of this application, while supporting SBFD terminal devices in initiating two-step random access, can reduce the impact on traditional terminal devices.

[0010] In conjunction with the first aspect, in some implementations of the first aspect, the mapping of the first type RO to the first type PRU in the second PRU set includes: mapping the first type RO to the first type PRU in the target PRU set of multiple second PRU sets, wherein the first slot of the target PRU set is located before the first PRU set and has the smallest slot interval with the first PRU set.

[0011] In conjunction with the first aspect, in some implementations of the first aspect, the mapping from the first type RO to the second type PRU includes: after all the random access preambles on the second type RO have been mapped to the second type PRU, the random access preambles on the first type RO continue to be mapped to the second type PRU; or, the starting point of the mapping from the first type RO to the second type PRU is the same as the starting point of the mapping from the second type RO to the second type PRU.

[0012] In this embodiment of the application, for a first type RO in a first type time slot, in one implementation, the first type RO can be mapped to a first type PRU or a second type PRU, and the mapping order of the second type PRU is first. After all the second type PRUs have been mapped with random access preambles, the random access preambles on the first type ROs continue to be mapped to the first type PRUs. Specifically, when mapping from the first type RO to the second type PRU, the starting point of the mapping from the first type RO to the second type PRU is the same as the starting point of the mapping from the second type RO to the second type PRU.

[0013] In another implementation, the first type of RO can be mapped to either the first type of PRU or the second type of PRU, with the second type of PRU being mapped first. After all the second type of PRUs have been mapped with random access preambles, the random access preambles on the first type of RO continue to be mapped to the first type of PRU. Specifically, the second type of RO is mapped to the second type of PRU first, and after all the random access preambles on the second type of RO have been mapped to the second type of PRU, the random access preambles on the first type of RO continue to be mapped to the second type of PRU.

[0014] In conjunction with the first aspect, in certain implementations of the first aspect, the random access preamble on the first type RO continues to be mapped to the second type PRU, including: the random access preamble on the first type RO is mapped starting from the PRU after the third PRU, where the third PRU is the second type PRU mapped by the last random access preamble on the second type RO; or, the random access preamble on the first type RO is mapped starting from the third PRU.

[0015] In conjunction with the first aspect, in some implementations of the first aspect, the random access preamble on the first type RO is mapped starting from the third PRU, including: when the third PRU has mapped *a* random access preambles on the second type RO, the random access preamble on the first type RO is mapped starting from the third PRU, and the third PRU is mapped with *X1-a* random access preambles on the first type RO, where *a* ≤ *X1*, and *X1* is the number of random access preambles on the second type RO that can be mapped to each second type PRU. Thus, if the third PRU has not mapped *X1* preambles, the starting point for the PRU mapping from the preamble on the first type RO is the third PRU. If the third PRU has mapped exactly *X1* preambles, the starting point for the PRU mapping from the preamble on the first type RO is still the third PRU, and mapping continues to the next PRU after the third PRU. In another implementation, regardless of whether the third PRU has mapped *X1* preambles, the random access preamble on the first type RO is mapped starting from the PRU after the third PRU.

[0016] In conjunction with the first aspect, in certain implementations of the first aspect, a first-type RO in a first-type time slot is associated with a first-type PRU set, and a second-type RO in a first-type time slot is associated with a second-type PRU set. The time slot positions of the first-type PRU set and the second-type PRU set are different. The mapping rules between the PRACH time slot and the PRU set include: for the first-type RO, the first-type RO is mapped only to the first-type PRU; for the second-type RO, the second-type RO is mapped only to the second-type PRU. In this way, the first-type PRU and the second-type PRU can be configured separately, and they do not affect each other. Thus, without affecting traditional terminal equipment, it effectively supports SBFD terminal equipment to initiate two-step random access.

[0017] In conjunction with the first aspect, in some implementations of the first aspect, the number of random access preambles that can be mapped on the second type RO for each second type PRU is X1, and X1 is determined based on the number of valid second type ROs in the first association mode period, the number of random access preambles in each valid second type RO, and the number of valid second type PRUs.

[0018] In conjunction with the first aspect, in some implementations of the first aspect, Where R1 equals the number of all valid second-type ROs in the first association mode period multiplied by the number of random access preambles in each valid second-type RO, and P1 equals the number of all valid second-type PRUs in the first association mode period.

[0019] In conjunction with the first aspect, in some implementations of the first aspect, the number of random access preambles that can be mapped on the first type RO for each first type PRU is X2, and X2 is determined based on the number of valid first type ROs in the second association mode period, the number of random access preambles in each valid first type RO, and the number of valid first type PRUs.

[0020] In conjunction with the first aspect, in some implementations of the first aspect, In the case of mapping from Type I RO to PRU, R2 equals the number of all valid Type I ROs in the second association mode period multiplied by the number of random access preambles in each valid Type I RO, and P2 equals the number of all valid Type I PRUs in the second association mode period.

[0021] In conjunction with the first aspect, in some implementations of the first aspect, all valid first-type PRUs are all valid first-type PRUs in the first PRU set and the second PRU set, where the first PRU set is the PRU set corresponding to the first-type time slot and the second PRU set is the PRU set corresponding to the second-type time slot.

[0022] In conjunction with the first aspect, in some implementations of the first aspect, If the first type RO in the first type time slot is not mapped to the PRU, R2 is equal to the number of valid first type ROs in all second type time slots in the second association mode period multiplied by the number of random access preambles in each valid first type RO, and P2 is equal to the number of valid first type PRUs in the PRU set corresponding to all second type time slots in the second association mode period.

[0023] Secondly, embodiments of this application provide a communication method applied to a network device. The method includes: receiving a random access preamble at a first random access time RO, the random access preamble being used for two-step random access; when the first RO is a first type RO, receiving a payload at a first physical uplink shared channel resource unit (PRU), the first PRU being either a first type PRU or a second type PRU; when the first RO is a second type RO, receiving a payload at a second PRU, the second PRU being a second type PRU, the first PRU and the second PRU being determined based on a mapping rule between PRACH time slots and PRU sets; wherein, the first type RO is a newly added RO in sub-band full-duplex communication, the second type RO is an existing RO in time-division full-duplex communication, the first type PRU is a newly added PRU in sub-band full-duplex communication, and the second type PRU is an existing PRU in time-division full-duplex communication.

[0024] Based on the above technical solution, when initiating a two-step random access, a terminal device supporting subband full-duplex SBFD (hereinafter referred to as SBFD terminal device) can send a random access preamble on the RO during the first random access time and send the payload on the corresponding PRU. Based on the mapping rules between the Physical Random Access Channel (PRACH) time slots and the PRU set, if the first RO is a first-type RO, the SBFD terminal device can send the payload on the first PRU, which can be either a first-type PRU or a second-type PRU. If the first RO is a second-type RO, the SBFD terminal device can send the payload on the second PRU, which can also be a second-type PRU. In summary, after adding RO resources and PRUs to subband full-duplex communication, the SBFD terminal device can choose either the newly added first-type RO for two-step random access or the existing second-type RO for two-step random access. Furthermore, this application provides a reasonable mapping rule for PRACH time slots to PUSCH resources under SBFD operation for SBFD terminal devices, enabling SBFD terminal devices to send payloads when selecting different types of ROs, thereby effectively supporting SBFD terminal devices to initiate two-step random access.

[0025] In conjunction with the second aspect, in certain implementations of the second aspect, the mapping rules between PRACH time slots and PRU sets include: For a first type RO in a first type time slot, the first type RO is mapped to both first type PRUs and second type PRUs, with the second type PRUs mapped first. After all second type PRUs have been mapped to random access preambles, the random access preambles on the first type ROs continue to be mapped to first type PRUs; or, the first type RO is mapped only to first type PRUs; or, the first type RO is not mapped to PRUs. For a first type RO in a second type time slot, the first type RO is mapped only to first type PRUs; for a second type RO, the second type RO is mapped only to second type PRUs. Wherein, the first type time slot includes both first type ROs and second type ROs, and the second type time slot includes first type ROs. Traditional terminal devices can only use second type ROs and second type PRUs during random access. In this embodiment, multiple options are provided for mapping the first type of RO, while the second type of RO is only mapped to the second type of PRU. In this way, traditional terminal devices and SBFD terminal devices can use a common PUSCH resource configuration, which can reduce the impact on traditional terminal devices while supporting SBFD terminal devices to initiate two-step random access.

[0026] In conjunction with the second aspect, in some implementations of the second aspect, for a first type RO in a first type time slot, if the first type RO is mapped only to a first type PRU, the mapping rule between the PRACH time slot and the PRU set further includes: if the first PRU set includes first type PRUs, the first type RO is mapped to the first type PRUs in the first PRU set, and the first PRU set is the PRU set corresponding to the first type time slot; if the first PRU set does not include first type PRUs, the first type RO is not mapped to PRUs, or the first type RO is mapped to the first type PRUs in the second PRU set, and the second PRU set is the PRU set corresponding to the second type time slot. In this way, the mapping from the first type RO to the first type PRU and the mapping from the second type RO to the second type PRU are determined separately. When selecting a second type RO, the SBFD terminal device follows the mapping rule from the second type RO to the second type. When selecting a first type RO, the SBFD terminal device follows the mapping rule from the first type RO to the first type PRU. Traditional terminal devices also follow the mapping rule from the first type RO to the first type PRU. Therefore, SBFD terminal devices and traditional terminal devices have a consistent understanding of the PRU position corresponding to a specific first-type RO / preamble combination. The embodiments of this application, while supporting SBFD terminal devices in initiating two-step random access, can reduce the impact on traditional terminal devices.

[0027] In conjunction with the second aspect, in some implementations of the second aspect, the mapping of the first type RO to the first type PRU in the second PRU set includes: mapping the first type RO to the first type PRU in the target PRU set of multiple second PRU sets, wherein the first slot of the target PRU set is located before the first PRU set and has the smallest slot interval with the first PRU set.

[0028] In conjunction with the second aspect, in some implementations of the second aspect, the mapping from the first type RO to the second type PRU includes: after all the random access preambles on the second type RO have been mapped to the second type PRU, the random access preambles on the first type RO continue to be mapped to the second type PRU; or, the starting point of the mapping from the first type RO to the second type PRU is the same as the starting point of the mapping from the second type RO to the second type PRU.

[0029] In this embodiment of the application, for a first type RO in a first type time slot, in one implementation, the first type RO can be mapped to a first type PRU or a second type PRU, and the mapping order of the second type PRU is first. After all the second type PRUs have been mapped with random access preambles, the random access preambles on the first type ROs continue to be mapped to the first type PRUs. Specifically, when mapping from the first type RO to the second type PRU, the starting point of the mapping from the first type RO to the second type PRU is the same as the starting point of the mapping from the second type RO to the second type PRU.

[0030] In another implementation, the first type of RO can be mapped to either the first type of PRU or the second type of PRU, with the second type of PRU being mapped first. After all the second type of PRUs have been mapped with random access preambles, the random access preambles on the first type of RO continue to be mapped to the first type of PRU. Specifically, the second type of RO is mapped to the second type of PRU first, and after all the random access preambles on the second type of RO have been mapped to the second type of PRU, the random access preambles on the first type of RO continue to be mapped to the second type of PRU.

[0031] In conjunction with the second aspect, in some implementations of the second aspect, the random access preamble on the first type RO continues to be mapped to the second type PRU, including: the random access preamble on the first type RO is mapped starting from the PRU after the third PRU, where the third PRU is the second type PRU mapped by the last random access preamble on the second type RO; or, the random access preamble on the first type RO is mapped starting from the third PRU.

[0032] In conjunction with the second aspect, in some implementations of the second aspect, the random access preamble on the first type RO is mapped starting from the third PRU, including: when the third PRU is mapped with a random access preambles on the second type RO, the random access preamble on the first type RO is mapped starting from the third PRU, and the third PRU is mapped with X1-a random access preambles on the first type RO, where a≤X1, and X1 is the number of random access preambles on the second type RO that can be mapped by each second type PRU.

[0033] Thus, if the third PRU is not fully mapped to X1 preambles, the starting point for the PRU mapping from the preambles on the first type RO is the third PRU. If the third PRU is fully mapped to X1 preambles, the starting point for the PRU mapping from the preambles on the first type RO is still the third PRU, and the mapping continues to the next PRU after the third PRU. In another implementation, regardless of whether the third PRU is fully mapped to X1 preambles, the random access preambles on the first type RO are mapped starting from the PRU after the third PRU.

[0034] In conjunction with the second aspect, in some implementations of the second aspect, the first type RO in the first type time slot is associated with the first type PRU set, and the second type RO in the first type time slot is associated with the second type PRU set. The time slot positions of the first type PRU set and the second type PRU set are different. The mapping rules between the PRACH time slot and the PRU set include: for the first type RO, the first type RO is mapped only to the first type PRU; for the second type RO, the second type RO is mapped only to the second type PRU. In this way, the first type PRU and the second type PRU can be configured separately, and they do not affect each other. Thus, without affecting traditional terminal equipment, it effectively supports SBFD terminal equipment to initiate two-step random access.

[0035] In conjunction with the second aspect, in some implementations of the second aspect, the number of random access preambles that can be mapped on the second type RO for each second type PRU is X1, and X1 is determined based on the number of valid second type ROs in the first association mode period, the number of random access preambles in each valid second type RO, and the number of valid second type PRUs.

[0036] In conjunction with the second aspect, in some implementations of the second aspect, Where R1 equals the number of all valid second-type ROs in the first association mode period multiplied by the number of random access preambles in each valid second-type RO, and P1 equals the number of all valid second-type PRUs in the first association mode period.

[0037] In conjunction with the second aspect, in some implementations of the second aspect, the number of random access preambles that can be mapped on the first type RO for each first type PRU is X2, and X2 is determined based on the number of valid first type ROs in the second association mode period, the number of random access preambles in each valid first type RO, and the number of valid first type PRUs.

[0038] In conjunction with the second aspect, in some implementations of the second aspect, In the case of mapping from Type I RO to PRU, R2 equals the number of all valid Type I ROs in the second association mode period multiplied by the number of random access preambles in each valid Type I RO, and P2 equals the number of all valid Type I PRUs in the second association mode period.

[0039] In conjunction with the second aspect, in some implementations of the second aspect, all valid first-type PRUs are all valid first-type PRUs in the first PRU set and the second PRU set. The first PRU set is the PRU set corresponding to the first-type time slot, and the second PRU set is the PRU set corresponding to the second-type time slot.

[0040] In conjunction with the second aspect, in some implementations of the second aspect, If the first type RO in the first type time slot is not mapped to the PRU, R2 is equal to the number of valid first type ROs in all second type time slots in the second association mode period multiplied by the number of random access preambles in each valid first type RO, and P2 is equal to the number of valid first type PRUs in the PRU set corresponding to all second type time slots in the second association mode period.

[0041] Thirdly, a communication apparatus is provided, comprising units for performing steps of the method as described in any implementation of the first aspect, or comprising units for performing steps of the method as described in any implementation of the second aspect.

[0042] Fourthly, a communication device is provided, including a processor and an interface, the interface being used to send and / or receive signals, such that the processor performs the method described in any of the implementations of any of the preceding aspects.

[0043] Fifthly, a communication device is provided, comprising: a processor coupled to a memory for storing programs or instructions, wherein when the program or instructions are executed by the processor, the communication device performs the method described in any of the above-mentioned implementations.

[0044] In a sixth aspect, a communication system is provided, which includes the network equipment as described in the first aspect above and the terminal equipment as described in the second aspect above.

[0045] In a seventh aspect, a computer-readable medium is provided for storing a computer program that, when run on a computer, causes the computer to perform the method described in any of the implementations of any of the preceding aspects.

[0046] Eighthly, a chip is provided, on which a processing circuit (or processor) is disposed, the processing circuit (or processor) being used to execute the method in any of the above-mentioned implementations.

[0047] Ninthly, a computer program product comprising instructions is provided, the computer program product including: a computer program (also referred to as code or instructions), which, when run, causes a computer to perform a method in any of the implementations of any of the above aspects. Attached Figure Description

[0048] Figure 1 shows a schematic diagram of the structure of a communication system provided in an embodiment of this application;

[0049] Figure 2 shows a schematic diagram of the mapping order between RO and PRU provided in an embodiment of this application;

[0050] Figure 3 shows a schematic diagram of the TDD and SBFD communication principles provided in an embodiment of this application;

[0051] Figure 4 shows a flowchart of a communication method provided in an embodiment of this application;

[0052] Figure 5A shows a schematic diagram of a PRACH slot to PUSCH resource mapping provided in an embodiment of this application;

[0053] Figure 5B illustrates another schematic diagram of PRACH slot-to-PUSCH resource mapping provided in an embodiment of this application;

[0054] Figure 5C illustrates another schematic diagram of PRACH slot-to-PUSCH resource mapping provided in an embodiment of this application;

[0055] Figure 5D illustrates another schematic diagram of PRACH slot-to-PUSCH resource mapping provided in an embodiment of this application;

[0056] Figure 6A illustrates another schematic diagram of PRACH slot-to-PUSCH resource mapping provided in an embodiment of this application;

[0057] Figure 6B illustrates another schematic diagram of PRACH slot-to-PUSCH resource mapping provided in an embodiment of this application;

[0058] Figure 6C illustrates another schematic diagram of PRACH slot-to-PUSCH resource mapping provided in an embodiment of this application;

[0059] Figure 6D illustrates another PRACH slot to PUSCH resource mapping provided by an embodiment of this application;

[0060] Figure 6E illustrates another schematic diagram of PRACH slot-to-PUSCH resource mapping provided in an embodiment of this application;

[0061] Figure 7A illustrates another schematic diagram of PRACH slot-to-PUSCH resource mapping provided by an embodiment of this application;

[0062] Figure 7B illustrates another schematic diagram of PRACH slot-to-PUSCH resource mapping provided in an embodiment of this application;

[0063] Figure 7C illustrates another schematic diagram of PRACH slot-to-PUSCH resource mapping provided in an embodiment of this application;

[0064] Figure 7D illustrates another schematic diagram of PRACH slot-to-PUSCH resource mapping provided in an embodiment of this application;

[0065] Figure 8A illustrates another schematic diagram of PRACH slot-to-PUSCH resource mapping provided in an embodiment of this application;

[0066] Figure 8B illustrates another schematic diagram of PRACH slot-to-PUSCH resource mapping provided in an embodiment of this application;

[0067] Figure 8C illustrates another schematic diagram of PRACH slot-to-PUSCH resource mapping provided in an embodiment of this application;

[0068] Figure 8D illustrates another PRACH slot to PUSCH resource mapping provided by an embodiment of this application;

[0069] Figure 8E illustrates another schematic diagram of PRACH slot-to-PUSCH resource mapping provided in an embodiment of this application;

[0070] Figure 8F illustrates another schematic diagram of PRACH slot-to-PUSCH resource mapping provided in an embodiment of this application;

[0071] Figure 9A illustrates another schematic diagram of PRACH slot-to-PUSCH resource mapping provided in an embodiment of this application;

[0072] Figure 9B illustrates another schematic diagram of PRACH slot-to-PUSCH resource mapping provided in an embodiment of this application;

[0073] Figure 10 is a schematic diagram of the structure of a communication device provided in an embodiment of this application;

[0074] Figure 11 is a schematic diagram of another communication device provided in an embodiment of this application. Detailed Implementation

[0075] The technical solutions in the embodiments of this application will now be described with reference to the accompanying drawings. The network architecture and business scenarios described in the embodiments of this application are for the purpose of more clearly illustrating the technical solutions of the embodiments of this application, and do not constitute a limitation on the technical solutions provided in the embodiments of this application. As those skilled in the art will know, with the evolution of network architecture and the emergence of new business scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.

[0076] In this application, ordinal numbers such as "1", "2", "3", "first", "second", "third", and "fourth" are used to distinguish multiple objects and are not used to limit the order of multiple objects. "Multiple" in this application refers to two or more. The term "and / or" in this application is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship. The term "at least one" in this application can represent "one" and "two or more". For example, at least one of A, B, and C can represent: A existing alone, B existing alone, C existing alone, A and B existing simultaneously, A and C existing simultaneously, C and B existing simultaneously, and A, B, and C existing simultaneously. In this application, "instruction" can include both direct and indirect instruction. For example, when describing information that indicates information I, the information can directly indicate I or indirectly indicate I, but does not necessarily indicate that the information carries I.

[0077] The technical solutions provided in this application can be applied to various communication systems, such as: Long Term Evolution (LTE) systems, LTE Frequency Division Duplex (FDD) systems, LTE Time Division Duplex (TDD) systems, 5th Generation (5G) mobile communication systems, and New Radio (NR). The 5G mobile communication systems in this application include non-standalone (NSA) 5G mobile communication systems and standalone (SA) 5G mobile communication systems. The technical solutions provided in this application can also be applied to future communication systems, such as 6th Generation (GMT) mobile communication systems and 7th Generation (GMT) mobile communication systems. The technical solutions provided in this application can also be applied to device-to-device (D2D) communication, vehicle-to-everything (V2X) communication, machine-to-machine (M2M) communication, machine-type communication (MTC), and Internet of Things (IoT) communication systems (e.g., Ambient Internet of Things (A-IoT) communication systems), or other communication systems. The embodiments in this application do not limit the scope of the application.

[0078] For example, Figure 1 is a schematic diagram of a communication system provided in an embodiment of this application. As shown in Figure 1, the communication system includes a radio access network (RAN) 100 and a core network (CN) 200. RAN 100 includes at least one RAN node (110a and 110b in Figure 1, collectively referred to as 110) and at least one terminal (120a-120f in Figure 1). RAN 100 may also include other RAN nodes, such as wireless relay devices and / or wireless backhaul devices (not shown in Figure 1). The terminal is connected to RAN node 110 wirelessly. RAN node 110 is connected to core network 200 wirelessly or via wired connection. The core network device in core network 200 and RAN node 110 in RAN 100 may be different physical devices, or they may be the same physical device integrating core network logical functions and radio access network logical functions.

[0079] RAN node 110, sometimes also referred to as access network equipment, radio access network equipment, RAN entity, or access node, constitutes part of the communication system and is used to help terminals achieve wireless access. RAN nodes can be base stations, evolved Node Bs (eNodeBs), radio network controllers (RNCs), node Bs (NBs), base station controllers (BSCs), base transceiver stations (BTSs), home base stations (e.g., home evolved Node Bs or home node Bs (HNBs)), base band units (BBUs), access points (APs) in wireless fidelity (Wi-Fi) systems, wireless relay nodes, wireless backhaul nodes, transmission points (TPs), or transmission and reception points (TRPs / TPs), or remote radio heads (RRHs), etc. Alternatively, the network device can also be a radio unit (RU), a centralized unit (CU), a distributed unit (DU), a CU control plane (CU-CP) node, or a CU user plane (CU-UP) node. This application does not limit the specific type of the network device. It is understood that all or part of the functions of the wireless access network device in this application can also be implemented through software functions running on hardware, or through virtualization functions instantiated on a platform (e.g., a cloud platform). This application does not limit the specific technology or device form used in the wireless access network device. In this application, the access network device is referred to as a network device; unless otherwise specified, the term "network device" refers to the access network device.

[0080] A terminal device is a device with wireless transceiver capabilities. Terminal devices can also be called terminals, access terminals, user terminals, user equipment (UE), mobile stations (MS), mobile terminals (MT), wireless terminals, wireless communication devices, etc. Terminal devices can be mobile phones, tablets, laptops, PDAs, mobile internet devices (MID), wearable devices, in-vehicle terminal devices, virtual reality (VR) devices, augmented reality (AR) devices, wireless terminals in industrial control, wireless terminals in self-driving vehicles, wireless terminals in smart grids, wireless terminals in transportation safety, wireless terminals in smart cities, or wireless terminals in smart homes, etc. This application does not limit the specific technology or device form used in the terminal embodiments.

[0081] Terminal devices can also be Internet of Things (IoT) terminal devices, such as smart tags, industrial control components, smart home devices, and environmental IoT devices (A-IoT devices). Among them, A-IoT devices can be battery-free devices without energy storage or devices with limited energy storage. A-IoT devices can be powered by energy harvesting (such as solar energy, radio waves, motion, vibration, heat, pressure, or other power sources).

[0082] Access network devices and / or terminals can be fixed or mobile. They can be deployed on land, including indoors or outdoors, handheld or vehicle-mounted; on water; or in the air on aircraft, balloons, and satellites. This application does not limit the application scenarios of the access network devices and terminals. Access network devices and terminal devices can be deployed in the same or different scenarios; for example, both can be deployed on land; or the access network device can be deployed on land, and the terminal device on water, etc., and so on.

[0083] In the embodiments of this application, the communication device with access network device function can be an access network device, or a module (such as a chip, chip system, or software module) in the access network device, or a control subsystem containing access network device function. For example, a control subsystem containing access network device function can be a control center in scenarios where terminals can be applied, such as smart grids, industrial control, intelligent transportation, or smart cities.

[0084] In the embodiments of this application, the communication device with terminal function can be a terminal, or a module in a terminal (such as a chip, chip system, modem, or software model, etc.), or a device that includes terminal function. In the embodiments of this application, for ease of description, a base station, terminal equipment, or UE will be used as examples for the following description.

[0085] To facilitate understanding of the technical solutions in the embodiments of this application, the terminology involved in the embodiments of this application will be briefly explained below. Optionally, the explanation of some terms may also refer to the explanation in the 3rd Generation Partnership Project (3GPP) standard protocol.

[0086] 1. Random Access Preamble: The random access sequence carried in the random access signal sent by the terminal during the Random Access (RA) process. The random access preamble used in a 4-step RA process is also called a Type-1 preamble. The random access preamble used in a 2-step RA process is also called a Type-2 preamble. In this application embodiment, the terms "preamble" and "random access preamble" mentioned thereafter refer to the Type-2 preamble.

[0087] 2. Two-Step Random Access: The two-step RA access process completes initial access in only two steps. Step 1: The terminal device sends message A (MsgA), which includes a random access preamble and a payload. Step 2: The network device (e.g., a base station) sends a response (referred to as message B or MsgB), which includes, for example, one or more of the following: identifier allocation, timing advance information, contention resolution message, backoff indication, and fallback command.

[0088] 3. Random access Occasion (RO): The Physical Random Access Channel (PRACH) resource used to carry the preamble during the random access process.

[0089] Random access timing includes resources in both the frequency and time domains. Each RO (Random Access Response) consists of several orthogonal frequency division multiplexing (OFDM) symbols in the time domain and several subcarriers in the frequency domain. PRACH resource configuration includes one or more PRACH slots. A PRACH slot contains one or more ROs. One or more preambles are configured on a single RO. ROs can also be referred to as RACH timings, PRACH timings, or RA timings.

[0090] 4. RO-SSB Association: When a terminal device initiates random access, it needs to measure the SSBs (Signal Subsystems) before selecting an RO (Reference Received Power). It then selects an SSB index whose reference signal received power (RSRP) is higher than a set threshold, and chooses an RO based on the network's configured mapping between SSB indices and ROs. This allows the network device to use an appropriate receiving filter to receive data from a specific RO. For example, if a network device configures a certain RO to correspond to SSB1, when the terminal device measures that the RSRP of SSB1 is higher than the threshold, it selects that RO to send the preamble. The network device then uses the receiving filter corresponding to SSB1 to receive the preamble sent by the terminal device on that RO, thus improving reception performance.

[0091] 5. SSB Association Period: The association period during which the synchronization signal and PBCH block (SSB) is mapped to the RO. The association period between the SSB and RO resources can also be called the mapping period between the SSB and RO resources, or simply the association period or mapping period.

[0092] See the relevant content in 3GPP TS 38.213 V18.1.0: The association period is the period during which at least one round of SSB-to-RO mapping is completed, ensuring that each actually transmitted SSB is mapped to at least one RO. The association period for SSB-to-RO mapping is an integer multiple of the PRACH configuration period, and the multiple is the minimum value of the PRACH configuration period in the configuration table. If, within a mapping period, after the entire SSB-to-RO cyclic mapping is completed, some ROs have not been mapped, then the unmapped ROs will no longer establish a mapping relationship with the SSB.

[0093] 6. SSB Association Pattern Period: See the relevant content in 3GPP TS 38.213 V18.1.0: The association pattern period consists of one or more association periods, and is determined to be a pattern between the PRACH event and the SS / PBCH block index that repeats at most once every 160 milliseconds. In simpler terms, multiple SSB association periods of different lengths cycle according to a certain period, and the total length of these multiple SSB association periods of different lengths is the SSB association pattern period.

[0094] 7. Physical Uplink Shared Channel (PUSCH) Resource Unit (PRU): A PRU may include time-frequency resources configured for transmitting payloads on the PUSCH, as well as antenna ports and sequence scrambling IDs configured for transmitting the Demodulation Reference Signal (DMRS). Each PRU can be considered a PUSCH opportunity with DMRS resources. A PUSCH opportunity is also referred to as a PO.

[0095] The 3GPP TS 38.213 V18.1.0 protocol describes the following: PRU is configured through the PUSCH resource (MsgA-PUSCH-Resource) parameter. MsgA-PUSCH-Resource can include, but is not limited to, the following parameters: msgA-PUSCH-TimeDomainOffset, which represents the offset of the first slot of the PO relative to the PRACH slot; nrofMsgA-PO-PerSlot, which represents the number of POs in each slot in the time domain; and nrofMsgA-PO-FDM, which represents the number of POs in the frequency domain.

[0096] 8. Mapping relationship between RO / preamble and PRU: Each PRACH slot is mapped to a specific set of PRUs. Within a PRACH slot, each Type-2 preamble from a valid RO is mapped to a valid PRU in the PRU set. The PRU set represents the collection of multiple PRUs contained in the PUSCH resource configuration (MsgA-PUSCH-Resource).

[0097] The mapping order is related to the preamble index, the time-frequency domain position of the RO, and the time-frequency spatial domain position of the PRU. Refer to the relevant content in 3GPP TS 38.213 V18.1.0 pp.61-62, as follows: For the preamble, firstly, within a single RO, they are arranged in ascending order of the preamble index. Secondly, for multiple ROs in the frequency domain, they are arranged in ascending order of the frequency resource index. Then, for multiple ROs in the time domain, they are arranged in ascending order of the time resource index.

[0098] When mapping preambles to PRUs, firstly, multiple PRUs in the frequency domain are arranged in ascending order of their frequency resource indices. Secondly, they are arranged in ascending order of their DMRS resource indices, which are first determined by ascending order of DMRS port indices, and then by ascending order of DMRS sequence indices. Then, when configuring multiple PRUs within a single PUSCH slot, they are arranged in ascending order of their time domain resource indices. Finally, when configuring multiple PUSCH slots, they are arranged in ascending order of their PUSCH slot indices.

[0099] The number of preambles mapped to a PRU is N = ceil(T) preamble / T PUSCH ), T preamble T represents the number of valid ROs in the associated pattern cycle multiplied by the number of preambles in each RO. PUSCH T represents the number of valid POs in the associated pattern cycle multiplied by the number of DMRS resources in each PO. PUSCH This indicates the number of valid PRUs in the associated pattern cycle.

[0100] Whether a Returning Item (RO) is valid and whether a Prefix Item (PRU) is valid are determined by the terminal device. For example, if the terminal device does not receive the tdd-UL-DL-ConfigurationCommon configuration, an RO is valid if the following conditions are met: the terminal device has not processed an SSB in the PRACH time slot corresponding to the RO, and the RO is at least N units away from the nearest preceding SSB. gap A symbol. If the terminal device receives the tdd-UL-DL-ConfigurationCommon configuration, the RO is a valid RO if the following conditions are met: the RO is within the UL symbol range; the terminal device has not processed an SSB in the PRACH time slot corresponding to the RO; and the RO is at least N units away from the nearest preceding SSB. gap The symbols are not specified in this application embodiment. The method by which the terminal device determines valid RO and valid PRU is not limited.

[0101] Figure 2 is a schematic diagram of the mapping order between RO and PRU provided in an embodiment of this application. The horizontal axis represents the time domain, and the vertical axis represents the frequency domain. Assuming that there are 4 ROs in the time domain and 2 ROs in the frequency domain in each RO mapping cycle, there are 8 ROs in one RO mapping cycle (for example, if an SSB is mapped to a RO mapping cycle with 4 SSBs in a cell's SSB burst set, and the network configures each SSB to map to 2 ROs, then there are 8 ROs in one RO mapping cycle). Each RO in one RO mapping cycle is configured with 4 preamble indices, resulting in 32 preamble indices in that RO mapping cycle. If the network device configures 16 PRU resources in this RO mapping cycle, then every two preambles correspond to one PRU, forming the RO and PRU mapping relationship as shown in Figure 2. The index in the PUSCH occasion refers to the index of the preamble corresponding to the DMRS in the PUSCH. For example, in Figure 2, index 0-1 in the first PUSCH occasion means that DMRS-1 in the PUSCH corresponds to index 0-1 of the preamble in the first RO, and index 8-9 means that DMRS-2 in the PUSCH corresponds to index 8-9 of the preamble in the third RO.

[0102] 9. Symbol: Short for time-domain symbol, also known as OFDM symbol.

[0103] Symbols within a time slot can include four types: downlink symbols, uplink symbols, SBFD symbols, and flexible (X) symbols. Uplink symbols can only be used for uplink (UL) transmission, and downlink symbols can only be used for downlink (DL) transmission. Flexible symbols do not have a defined transmission direction and can be used for either uplink or downlink transmission according to control signaling instructions. On SBFD symbols, frequency domain resources are divided into multiple subbands (SBs), each including one UL subband and at least one DL subband; the UL subband is used for uplink transmission, and the DL subband is used for downlink transmission. A time slot can contain only downlink symbols, or only uplink symbols, or only flexible symbols, or only SBFD symbols, or a mixture of several types of symbols.

[0104] 10. Time Division Duplex (TDD): In TDD mode, the transmission of information in the uplink and downlink can occur on the same carrier frequency. That is, the transmission of information in the uplink and downlink is achieved through time division on the same carrier. TDD mode only includes uplink symbols and downlink symbols / flexible symbols. As shown in Figure 3(a), the vertically filled rectangles represent a set of time-frequency resources used for uplink transmission, and the time domain range they occupy is called the uplink time slot. RO is located within the uplink time slot. The white-filled rectangles represent a set of time-frequency resources used for downlink transmission, and the time domain range they occupy is called the downlink time slot.

[0105] 11. Subband Full-Duplex: Full-duplex is achieved on the base station side by dividing a single TDD carrier into non-overlapping UL subbands and DL subbands, transmitting DL signals in the DL subband and receiving UL signals in the UL subband at the same time.

[0106] Under SBFD operation, a downlink symbol or flexible symbol of a carrier component of TDD can be configured as an SBFD symbol. As shown in Figure 3(b), where the horizontal axis represents the time domain and the vertical axis represents the frequency domain, the two rectangles filled with white in the figure represent a set of time-frequency resources for downlink transmission, and the rectangles filled with vertical bars represent a set of time-frequency resources for uplink transmission.

[0107] Because the UE can transmit uplink signals in the UL subband on SBFD symbols, configuring TDD downlink symbols or flexible symbols as SBFD symbols and configuring ROs on SBFD symbols increases the number of ROs and reduces access latency compared to traditional TDD mode. Therefore, under SBFD operation, there are two types of RO resources: newly added RO resources in subband full-duplex communication and existing RO resources in time-division full-duplex communication. Correspondingly, there are also two types of PRUs: newly added PRUs in subband full-duplex communication and existing PRUs in time-division full-duplex communication.

[0108] In time-division full-duplex communication, the original RO is denoted as legacy RO, and the original PRU is denoted as legacy PRU. In sub-band full-duplex communication, the newly added RO is denoted as additional RO, and the newly added PRU is denoted as additional PRU.

[0109] Among them, additional RO is an RO that can only be recognized by SBFD terminal devices, and additional PRU is a PRU that can only be recognized by SBFD terminal devices. legacy RO is an RO that can be recognized by both SBFD terminal devices and non-SBFD terminal devices, and legacy PRU is a PRU that can be recognized by both SBFD terminal devices and non-SBFD terminal devices.

[0110] In the 3GPP RAN1#118 meeting, additional ROs were described as follows: (1) In the case of dual configuration, an RO configured under an additional RACH configuration is an additional RO. (2) In the case of single configuration, if a downlink symbol configured by tdd-UL-DL-ConfigurationCommon is configured as an SBFD symbol, the RO on that SBFD symbol is an additional RO. (3) In the case of single configuration, if an RO spans two SBFD symbols, that RO is an additional RO, where the two SBFD symbols are the SBFD symbols configured by the downlink symbols configured by tdd-UL-DL-ConfigurationCommon and the SBFD symbols configured by the flexible symbols configured by tdd-UL-DL-ConfigurationCommon, respectively. Here, single configuration refers to providing a common configuration for additional ROs and legacy ROs; dual configuration refers to providing a separate configuration for additional ROs and legacy ROs.

[0111] In this embodiment, a valid additional PRU can have two forms: (1) When a PRACH slot includes only an additional RO, all PRUs in the PRU set corresponding to the PRACH slot are additional PRUs, as shown in PRU set 1 in Figure 5B below. (2) When a PRACH slot includes both additional ROs and legacy ROs, the slot containing the PRU set corresponding to the PRACH slot is configured with SBFD symbols configured by downlink symbols configured by tdd-UL-DL-ConfigurationCommon, and the PRUs on the UL subband resources of the SBFD symbols are additional PRUs, as shown in PRU set 2 in Figure 5B below.

[0112] Optionally, in the embodiments of this application, a non-SBFD terminal device can also be understood as a terminal device that does not support SBFD, an earlier version of the terminal device, or a legacy terminal device (UE).

[0113] Optionally, in this embodiment, the SBFD terminal device can also be understood as a terminal device that supports SBFD, a later version of the terminal device, an SBFD-aware terminal device, or a terminal device capable of recognizing SBFD symbols (SBFD-aware UE). The SBFD terminal device can use the UL subband resources of the SBFD symbol for uplink transmission and / or use the DL subband resources of the SBFD symbol for downlink transmission.

[0114] Non-SBFD terminal devices cannot recognize additional RO and additional PRU. Therefore, non-SBFD terminal devices can only use legacy RO and legacy PRU during random access, and cannot use additional RO and additional PRU.

[0115] SBFD terminal equipment can recognize both legacy ROs and legacy PRUs, as well as additional ROs and additional PRUs. Therefore, SBFD terminal equipment can use both legacy ROs and legacy PRUs, as well as additional ROs and additional PRUs, during random access.

[0116] In a two-step random access scenario, how to map additional ROs to PRUs is a problem that needs to be discussed. To address this, this application provides a communication method that maps PRACH slots to PUSCH resources under SBFD operations, providing reasonable mapping rules for SBFD-aware UEs and effectively supporting SBFD-aware UEs initiating two-step random access. Using additional ROs to initiate two-step random access can reduce access latency for SBFD-aware UEs.

[0117] The technical solutions provided by the embodiments of this application will be described in detail below with reference to Figures 4 to 11. Figure 4 is a flowchart of a communication method provided by an embodiment of this application.

[0118] It is understood that the terminal device in Figure 4 can be the terminal device in Figure 1, or it can refer to the device within the terminal device (such as a processor, chip, or chip system). The network device can be the access network device in Figure 1, or it can refer to the device within the access network device (such as a processor, chip, or chip system).

[0119] It can also be understood that some or all of the information exchanged between the terminal device and the access network device in Figure 4 can be carried in existing messages, channels, signals, or signaling, or can be newly defined messages, channels, signals, or signaling, without specific limitations. As shown in Figure 4, the communication method may specifically include the following steps S401-S403.

[0120] S401, the network device sends random access configuration information to the terminal device. Correspondingly, the terminal device receives the random access configuration information.

[0121] Random access configuration information indicates the location of multiple PRACH time slots, thereby enabling the terminal device to determine uplink and downlink transmission resources.

[0122] The random access configuration information also indicates multiple RO locations associated with one or more Synchronization Signal Block (SSB) beams. The SSBs associated with additional ROs and legacy ROs are determined separately, and the random access configuration information configures the locations of the additional and legacy ROs. Thus, the terminal device can determine the locations of the additional and legacy ROs in the uplink transmission resources.

[0123] The random access configuration information also indicates information related to the random access preamble. Thus, the terminal device can determine the number of preambles on a single access route (RO).

[0124] The random access configuration information also indicates the PUSCH resource (MsgA-PUSCH-Resource), which includes: the time offset of the PO relative to the PRACH slot, the number of POs in each slot, the location of the PO in the frequency domain, and the number of slots for the PUSCH resource. Thus, the terminal device can determine the location of multiple PRUs corresponding to each PRACH slot. The multiple PRUs in one or more slots are referred to as a PRU set.

[0125] Based on the aforementioned random access configuration information, the SBFD terminal device can determine all PRACH and PUSCH resources in an SSB-additional RO association mode cycle, and all PRACH and PUSCH resources in an SSB-legacy RO association mode cycle. Traditional terminal devices can determine all PRACH and PUSCH resources in an SSB-legacy RO association mode cycle.

[0126] Optionally, random access configuration information can be sent using system information or at least radio resource control (RRC) signaling.

[0127] Optionally, the above-mentioned random access configuration information can also be referred to as resource configuration information, random access resources, etc.

[0128] S402, the terminal device determines the valid RO for sending PRACH based on the random access configuration information. Furthermore, based on the mapping rules from PRACH slots to PUSCH resources, it determines the valid PRU for sending PUSCH.

[0129] S403: The terminal device sends message A (msgA), which includes a random access preamble and a payload.

[0130] After receiving random access configuration information from the base station, the terminal device can determine the PRACH time slot from the random access configuration information. After determining the PRACH time slot, the terminal device can determine the associated PUSCH resources (i.e., the PRU set) through the PRACH time slot. For example, the PUSCH resources may be located after a fixed number of time slots / symbols of the PRACH time slot, or there may be a fixed number of RB intervals between the PUSCH resources and the PRACH time slot. Further, the terminal device can determine the valid ROs and valid PRUs. After selecting a Type-2 preamble in a valid RO, the terminal device determines the valid PRUs for transmitting the PUSCH based on the mapping rules from PRACH time slots to PUSCH resources. Then, the terminal device can transmit PRACH signals, such as the random access preamble, to the network device on the valid ROs; and transmit PUSCH signals, such as the payload, to the network device on the valid PRUs. Correspondingly, the network device receives the random access preamble and PUSCH from the terminal device.

[0131] In this embodiment, the mapping rules from PRACH slots to PUSCH resources include: the mapping rules from preambles on additional ROs to PRUs, and the mapping rules from preambles on legacy ROs to PRUs. The mapping rules from PRACH slots to PUSCH resources can also be described as PUSCH resource configurations for MsgA.

[0132] Regarding the PUSCH resource configuration for MsgA, one implementation uses a universal configuration that is used by both traditional and SBFD terminal devices; this approach is referred to as the single MsgA PUSCH configuration. Another implementation provides one PUSCH resource configuration for the additional RO and another for the legacy RO; only SBFD terminal devices can recognize the additional RO configuration, while traditional terminal devices can only recognize the legacy RO configuration. The PUSCH resource configuration provided for the additional RO is referred to as the additional MsgA PUSCH configuration, and the PUSCH resource configuration provided for the legacy RO is referred to as the legacy MsgA PUSCH configuration; this approach is referred to as the separated MsgA PUSCH configuration.

[0133] Under different MsgA PUSCH configuration methods, this application provides different PRACH slot to PUSCH resource mapping rules. The single MsgA PUSCH configuration is described first below.

[0134] In a single MsgA PUSCH configuration, the set of multiple PRUs (PRUs) included in the MsgA PUSCH configuration is denoted as the PRU set. Each PRACH slot is mapped to a specific PRU set. The preimage of the mapping is the Type-2 preamble in the valid ROs within the PRACH slot, and the image of the mapping is the PRU in the PRU set corresponding to that PRACH slot. Further, every X preambles are mapped to one valid PRU, where X is an integer ≥ 1. The mapping order is described in the relevant descriptions in 3GPP TS 38.213 V18.1.0pp.61-62.

[0135] The X used when mapping the preamble in legacy RO to PRU may differ from that in additional RO. For ease of distinction, the number of preambles in legacy RO is denoted as X1 when mapping to PRU; the number of preambles in additional RO is denoted as X2 when mapping to PRU.

[0136] The value of X1 is determined by the terminal device itself based on the SSB-legacy RO association mode period. For example, X1 can be determined based on the number of valid second-type ROs within the SSB-legacy RO association mode period, the number of random access preambles within each valid second-type RO, and the number of valid second-type PRUs.

[0137] The value of X2 is determined by the terminal device itself based on the SSB-additional RO association mode period. For example, X2 can be determined based on the number of valid first-type ROs in the second association mode period, the number of random access preambles in each valid first-type RO, and the number of valid first-type PRUs.

[0138] The SSB-legacy RO correlation pattern cycle corresponds to the aforementioned first correlation pattern cycle, and the SSB-additional RO correlation pattern cycle corresponds to the aforementioned second correlation pattern cycle. All ROs mentioned below are valid ROs, and all PRUs mentioned below are valid PRUs.

[0139] In all embodiments of this application, for ease of description, additional RO is referred to as first type RO, additional PRU as first type PRU, legacy RO as second type RO, and legacy PRU as second type PRU. PRACH time slots containing both legacy RO and additional RO are referred to as first type PRACH time slots (first type time slots); PRACH time slots containing only additional RO are referred to as second type PRACH time slots (second type time slots); and PRACH time slots containing only legacy RO are referred to as third type PRACH time slots (third type time slots).

[0140] Each PRU set corresponding to each Type 1 time slot is designated as the First PRU Set. Each PRU set corresponding to each Type 2 time slot is designated as the Second PRU Set. Each PRU set corresponding to each Type 3 time slot is designated as the Third PRU Set. The First PRU Set may include both Additional PRUs and Legacy PRUs, or it may include only Legacy PRUs. The Second PRU Set includes only Additional PRUs. The Third PRU Set includes only Legacy PRUs, or the Third PRU Set may include both Legacy PRUs and Additional PRUs, but the Additional PRUs may be invalid.

[0141] For the mapping of the second type of PRACH slot to the associated second PRU set, the additional RO is mapped only to the additional PRU, and the starting point of the mapped PRU is the additional PRU. That is, for the first type of RO in the second type of slot, the first type of RO is mapped only to the first type of PRU. Thus, when the SBFD terminal device determines the PRU mapped to the preamble on the additional RO in the second type of PRACH slot, it can start from the first additional PRU in the second PRU set and determine the additional PRU corresponding to each preamble according to the mapping order. Furthermore, within the second type of PRACH slot, only the SBFD terminal device can identify the additional RO; conventional terminal devices cannot. Consequently, conventional terminal devices do not use the PRUs in the second PRU set associated with the second type of PRACH slot. Therefore, within the second PRACH slot, there is no conflict between the SBFD terminal device and the conventional terminal device in using PRU positions.

[0142] For the mapping of the third type PRACH time slot to its associated third PRU set, the legacy RO is mapped only to the legacy PRU, and the starting point of the mapped PRU is the legacy PRU. That is, for the second type RO, the second type RO is mapped only to the second type PRU. Thus, whether it's an SBFD terminal device or a traditional terminal device, when determining the PRU mapped to the preamble on the legacy RO in the third type PRACH time slot, they can start from the first legacy PRU in the third PRU set and determine the legacy PRU corresponding to each preamble according to the mapping order. Furthermore, within the third type PRACH time slot, the ROs available to SBFD terminal devices and traditional terminal devices are the same, and their understanding of PRU locations is identical.

[0143] For the mapping of the first type of PRACH slot to the associated first set of PRUs, regarding the mapping method of legacy ROs in the first type of PRACH slot, legacy ROs are only mapped to legacy PRUs, with the starting point of the mapped RO being the legacy RO and the starting point of the mapped PRU being the legacy PRU. That is, for the second type of RO, the second type of RO is only mapped to the second type of PRU. Thus, when determining the PRU mapped to the preamble on the legacy RO in the first type of PRACH slot, SBFD terminal equipment or traditional terminal equipment can start from the first legacy PRU in the first set of PRUs and determine the legacy PRU corresponding to each preamble according to the mapping order.

[0144] For the mapping of preambles to PRUs in legacy ROs, legacy ROs in both type 1 and type 3 PRACH slots participate in the mapping, and the available PRU sets are the first PRU set and the third PRU set. Alternatively, it can be expressed as X1 = ceil(R1 / P1), where R1 equals the number of all valid legacy ROs within the SSB-legacy RO association mode period multiplied by the number of Type-2 preambles within each valid legacy RO, and P1 equals the number of all valid legacy PRUs within the SSB-legacy RO association mode period. Here, all valid legacy PRUs are the valid legacy PRUs in all first PRU sets and all third PRU sets.

[0145] Regarding the mapping method of additional RO in the first type of PRACH slot, different mapping methods are provided in the embodiments of this application.

[0146] In the first mapping method, additional ROs are not mapped to PRUs. That is, first-type ROs in the first type of time slot are not mapped to PRUs. Thus, the SBFD terminal device does not use additional ROs in the first type of PRACH time slot, but only uses legacy ROs, determining the legacy PRU according to the mapping method of legacy ROs in the first type of PRACH time slot. In this way, both the SBFD terminal device and the legacy terminal device have legacy ROs available, and the mapping starts from the same PRU starting point, so both have the same understanding of the PRU location.

[0147] Based on the first mapping rule, for the mapping of preambles in additional ROs to PRUs, additional ROs of second-type PRACH slots participate in the mapping, while additional ROs of first-type PRACH slots do not participate in the mapping. The usable PRU set is the second PRU set. Alternatively, it can be expressed as X2 = ceil(R2 / P2), where R2 equals the number of valid additional ROs in all second-type PRACH slots within the SSB-additional RO association mode period multiplied by the number of Type-2 preambles in each valid additional RO, and P2 equals the number of valid additional PRUs in all second-type PRU sets within the SSB-additional RO association mode period.

[0148] The first mapping rule is illustrated below with reference to Figures 5A to 5D. The base station is configured with three time slots: PRACH time slot 1, PRACH time slot 2, and PRACH time slot 3. PRACH time slots 1, 2, and 3 are mapped to PRU sets 1, 2, and 3, respectively. Specifically, PRACH time slot 1 is a second-type PRACH time slot, PRACH time slot 2 is a first-type PRACH time slot, and PRACH time slot 3 is a third-type PRACH time slot. PRU set 1 corresponds to the aforementioned second PRU set, PRU set 2 corresponds to the aforementioned first PRU set, and PRU set 3 corresponds to the aforementioned third PRU set. The SBFD symbol in PRACH time slot 1 is configured using the downlink symbol configuration of tdd-UL-DL-ConfigurationCommon. For ease of understanding, the preamble in the additional RO and the preamble in the legacy RO are distinguished in the figures. Unless otherwise specified, subsequent embodiments of other mapping rules will use this configuration as an example.

[0149] Referring to Figure 5A, PRACH slot 1 contains 6 additional ROs. PRACH slot 2 contains 2 additional ROs and 2 legacy ROs. PRACH slot 3 contains 6 legacy ROs. PRU set 1 contains 6 additional PRUs. PRU set 2 and PRU set 3 each contain 6 legacy PRUs. In the examples shown in Figure 5A and Figure 5B below, the SBFD symbol in PRACH slot 2 is configured as a downlink symbol using the tdd-UL-DL-ConfigurationCommon configuration. The additional ROs and legacy ROs are configured in a single configuration scenario.

[0150] For legacy RO, every 3 preambles are mapped to 1 valid legacy PRU, X1 = 3; for additional RO, every 4 preambles are mapped to 1 valid additional PRU, X2 = 4.

[0151] For the mapping from PRACH slot 1 to PRU set 1, every 4 preambles are mapped to 1 additional PRU, with the mapping order described in Figure 2 above. As shown in Figure 5A, preambles 0-3 are mapped to additional PRU#0. Preambles 4-7 are mapped to additional PRU#1. Preambles 8-11 are mapped to additional PRU#2. Additional PRUs#3-#5 are not consumed. For example, when the SBFD terminal device selects preamble 0 on PRACH slot 1, the payload is transmitted on additional PRU#0 in PRU set 1.

[0152] For the mapping of PRACH slot 2 to PRU set 2, additional ROs are not mapped to PRUs. As shown in Figure 5A, preambles 16-18 on legacy ROs are mapped to legacy PRU#6, and preamble 19 on legacy ROs is mapped to legacy PRU#7. However, preambles 12-15 on additional ROs are not mapped to legacy PRU#6, thus avoiding collisions. For example, when the SBFD terminal device selects preamble 16, 17, or 18 on legacy ROs in PRACH slot 2, the payload is transmitted on legacy PRU#6 in PRU set 2.

[0153] For the mapping of PRACH slot 3 to PRU set 3, every 3 preambles are mapped to 1 legacy PRU. As shown in Figure 5A, preambles 20-22 are mapped to legacy PRU#12, preambles 23-25 ​​are mapped to legacy PRU#13, preambles 26-28 are mapped to legacy PRU#14, and preambles 29-31 are mapped to legacy PRU#15. For example, when the SBFD terminal device selects preamble 16, 17, or 18 on legacy PRU in PRACH slot 3, the payload is transmitted on legacy PRU#6 in PRU set 3.

[0154] Referring to Figure 5B, PRACH slot 1 contains 6 additional ROs. PRACH slot 2 contains 2 additional ROs and 2 legacy ROs. PRACH slot 3 contains 6 legacy ROs. PRU set 1 contains 4 additional PRUs. PRU set 2 contains 2 additional PRUs and 3 legacy PRUs. PRU set 3 contains 6 legacy PRUs.

[0155] For legacy RO, every 3 preambles are mapped to 1 valid legacy PRU, X1 = 3; for additional RO, every 4 preambles are mapped to 1 valid additional PRU, X2 = 4.

[0156] For the mapping from PRACH slot 1 to PRU set 1, every 4 preambles are mapped to 1 additional PRU. As shown in Figure 5B, preambles 0-3 are mapped to additional PRU#0, preambles 4-7 are mapped to additional PRU#1, and preambles 8-11 are mapped to additional PRU#2. Additional PRU#3 is not consumed.

[0157] For the mapping from PRACH slot 2 to PRU set 2, additional ROs are not mapped to PRUs. Consequently, additional PRUs #4 and #5 in PRU set 2 are not used. Therefore, both the SBFD-aware UE and the legacy UE select the legacy RO in PRACH slot 2 for mapping. As shown in Figure 5B, preambles 16-18 on the legacy RO are mapped to legacy PRU #6, and preamble 19 on the legacy RO is mapped to legacy PRU #7. However, preambles 12-15 on the additional RO are neither mapped to additional PRU #4 nor legacy PRU #6.

[0158] For the PRACH slot 3 to PRU set 3 mapping, every 3 preambles are mapped to 1 legacy PRU. As shown in Figure 5B, preambles 20-22 are mapped to legacy PRU#9, preambles 23-25 ​​are mapped to legacy PRU#10, preambles 26-28 are mapped to legacy PRU#11, and preambles 29-31 are mapped to legacy PRU#12.

[0159] Referring to Figure 5C, PRACH slot 1 contains 3 additional ROs. PRACH slot 2 contains 3 additional ROs and 3 legacy ROs. PRACH slot 3 contains 3 legacy ROs. PRU set 1 contains 6 additional PRUs. PRU set 2 and PRU set 3 each contain 6 legacy PRUs. In the examples shown in Figure 5C and Figure 5D below, the SBFD symbol in PRACH slot 2 is configured using flexible symbol configuration via tdd-UL-DL-ConfigurationCommon. The additional ROs and legacy ROs are configured in a dual-configuration scenario.

[0160] For legacy RO, every 3 preambles are mapped to 1 valid legacy PRU, X1 = 3; for additional RO, every 4 preambles are mapped to 1 valid additional PRU, X2 = 4.

[0161] For the mapping from PRACH slot 1 to PRU set 1, every four preambles are mapped to one additional PRU. As shown in Figure 5C, preambles 0-3 are mapped to additional PRU#0, and preambles 4-5 are mapped to additional PRU#1. For example, when the SBFD terminal device selects preamble 0 on PRACH slot 1, the payload is transmitted on additional PRU#0 in PRU set 1.

[0162] For the PRACH slot 2 to PRU set 2 mapping, the additional RO does not map to PRUs. As shown in Figure 5C, preambles 12-14 on the legacy RO are mapped to legacy PRU#6, and preambles 15-17 on the legacy RO are mapped to legacy PRU#7. However, preambles 6-9 on the additional RO are not mapped to legacy PRU#6, and preambles 10-11 on the additional RO are not mapped to legacy PRU#7.

[0163] For PRACH slot 3 to PRU set 3 mapping, every 3 preambles are mapped to 1 legacy PRU. Preambles 18-20 are mapped to legacy PRU#12, and preambles 21-23 are mapped to legacy PRU#13.

[0164] Referring to Figure 5D, PRACH slot 1 contains 3 additional ROs. PRACH slot 2 contains 3 additional ROs and 3 legacy ROs. PRACH slot 3 contains 3 legacy ROs. PRU set 1 contains 4 additional PRUs. PRU set 2 contains 2 additional PRUs and 3 legacy PRUs. PRU set 3 contains 6 legacy PRUs.

[0165] For legacy RO, every 3 preambles are mapped to 1 valid legacy PRU, X1 = 3; for additional RO, every 4 preambles are mapped to 1 valid additional PRU, X2 = 4.

[0166] For the PRACH slot 1 to PRU set 1 mapping, preambles 0-3 are mapped to additional PRU#0, and preambles 4-5 are mapped to additional PRU#1.

[0167] For the mapping of PRACH slot 2 to PRU set 2, additional ROs are not mapped to PRUs. Consequently, additional PRUs #4 and #5 in PRU set 2 are not used. Preambles 12-14 on legacy ROs are mapped to legacy PRU #6, and preambles 15-17 on legacy ROs are mapped to legacy PRU #7.

[0168] For the PRACH time slot 3 to PRU set 3 mapping, preambles 18-20 are mapped to legacy PRU#9, and preambles 21-23 are mapped to legacy PRU#10.

[0169] In the second mapping rule, additional ROs are mapped to additional PRUs, with the starting point of the mapped RO being the additional RO and the starting point of the mapped PRU being the additional PRU. That is, for a first-type RO in a first-type time slot, the first-type RO is only mapped to a first-type PRU. Preambles on additional ROs are not mapped to legacy PRUs. When determining the PRU mapped to the preamble on an additional RO in a first-type PRACH time slot, the SBFD terminal device can start from the first additional PRU in the first PRU set and determine the corresponding additional PRU according to the mapping order.

[0170] In this way, the mapping from legacy RO to legacy PRU and the mapping from additional RO to additional PRU are determined separately. When selecting an additional RO, the SBFD terminal device follows the mapping rule from additional RO to additional PRU. When selecting a legacy RO, the SBFD terminal device follows the mapping rule from legacy RO to legacy PRU. The legacy terminal device also follows the mapping rule from legacy RO to legacy PRU. Therefore, the SBFD terminal device and the legacy terminal device have a consistent understanding of the PRU location corresponding to a specific legacy RO / preamble combination.

[0171] The second mapping rule is illustrated below with reference to Figures 6A to 6D. In the examples shown in Figures 6A and 6C, the SBFD symbol in PRACH slot 2 is configured as a downlink symbol using the tdd-UL-DL-ConfigurationCommon configuration. The additional RO and legacy RO are configured in a single configuration scenario. In the examples shown in Figures 6B and 6D, the SBFD symbol in PRACH slot 2 is configured as a flexible symbol using the tdd-UL-DL-ConfigurationCommon configuration. The additional RO and legacy RO are configured in a dual configuration scenario.

[0172] Referring to Figure 6A, PRACH slot 1 contains 6 additional ROs. PRACH slot 2 contains 2 additional ROs and 2 legacy ROs. PRACH slot 3 contains 6 legacy ROs. PRU set 1 includes 4 additional PRUs. PRU set 2 includes 2 additional PRUs and 3 legacy PRUs. PRU set 3 includes 6 legacy PRUs.

[0173] For legacy RO, every 3 preambles are mapped to 1 valid legacy PRU, X1 = 3; for additional RO, every 4 preambles are mapped to 1 valid additional PRU, X2 = 4.

[0174] For the mapping from PRACH slot 1 to PRU set 1, every 4 preambles are mapped to 1 additional PRU, and the mapping order is described in the previous section. As shown in Figure 6A, preambles 0-3 are mapped to additional PRU#0, preambles 4-7 are mapped to additional PRU#1, and preambles 8-11 are mapped to additional PRU#2. Additional PRU#3 is not consumed.

[0175] As shown in Figure 6A, for the mapping of PRACH slot 2 to PRU set 2, for the SBFD-aware UE, preambles 12-15 on additional RO are mapped to additional PRU#4. For both the SBFD-aware UE and the legacy UE, preambles 16-18 on legacy RO are mapped to legacy PRU#6, and preamble 19 is mapped to legacy PRU#7. For example, when the SBFD terminal device selects preamble 16 on legacy RO in PRACH slot 2, the payload is transmitted on legacy PRU#6 in PRU set 2. When the SBFD terminal device selects preamble 12 on additional RO in PRACH slot 2, the payload is transmitted on additional PRU#4 in PRU set 2.

[0176] For the PRACH slot 3-to-PRU set 3 mapping, every 3 preambles are mapped to 1 legacy PRU. As shown in Figure 6A, preambles 20-22 are mapped to legacy PRU#9, preambles 23-25 ​​are mapped to legacy PRU#10, preambles 26-28 are mapped to legacy PRU#11, and preambles 29-31 are mapped to legacy PRU#12.

[0177] Referring to Figure 6B, PRACH slot 1 contains 3 additional ROs. PRACH slot 2 contains 3 additional ROs and 3 legacy ROs. PRACH slot 3 contains 3 legacy ROs. PRU set 1 contains 4 additional PRUs. PRU set 2 contains 2 additional PRUs and 3 legacy PRUs. PRU set 3 contains 6 legacy PRUs.

[0178] For legacy RO, every 3 preambles are mapped to 1 valid legacy PRU, X1 = 3; for additional RO, every 4 preambles are mapped to 1 valid additional PRU, X2 = 4.

[0179] For the PRACH slot 1 to PRU set 1 mapping, preambles 0-3 are mapped to additional PRU#0, and preambles 4-5 are mapped to additional PRU#1.

[0180] For the PRACH slot 2 to PRU set 2 mapping, preambles 6-9 on the additional RO are mapped to additional PRU#4, and preambles 10-11 are mapped to additional PRU#5. Preambles 12-14 on the legacy RO are mapped to legacy PRU#6, and preambles 15-17 on the legacy RO are mapped to legacy PRU#7.

[0181] For the PRACH time slot 3 to PRU set 3 mapping, preambles 18-20 are mapped to legacy PRU#9, and preambles 21-23 are mapped to legacy PRU#10.

[0182] In the second mapping rule, if the first PRU set associated with the first type of PRACH slot does not include additional PRUs, the mapping from additional ROs to PRUs can be handled in several ways. In some implementations, additional ROs are not mapped to PRUs. This implementation is similar to the first mapping rule, as shown in the examples in Figures 5A and 5C.

[0183] In some other implementations, if the first PRU set associated with the first type of PRACH time slot does not include additional PRUs, the additional ROs in the first type of PRACH time slot are mapped to the additional PRUs in the second PRU set corresponding to the second type of time slot.

[0184] For example, an additional RO in a first-type PRACH slot can be mapped to an additional PRU in the second PRU set corresponding to the previous second-type PRACH slot, following the additional RO in the previous second-type PRACH slot. Here, the "previous second-type PRACH slot" can be the second-type PRACH slot closest to the first-type PRACH slot, preceding it. Correspondingly, the "second PRU set corresponding to the previous second-type PRACH slot" is the PRU set among multiple second PRU sets whose first slot precedes the first PRU set and has the smallest slot interval with the first PRU set; the "second PRU set corresponding to the previous second-type PRACH slot" corresponds to the aforementioned target PRU set.

[0185] For example, an additional RO in a first-type PRACH slot can be mapped to the second PRU set corresponding to a second-type slot following the first-type PRACH slot. Or, an additional RO can be mapped to the PRU set following the first PRU set in the first slot.

[0186] Referring to Figure 6C, PRACH slot 1 contains 6 additional ROs. PRACH slot 2 contains 2 additional ROs and 2 legacy ROs. PRACH slot 3 contains 6 legacy ROs. PRU set 1 includes 6 additional PRUs. PRU set 2 and PRU set 3 each include 6 legacy PRUs.

[0187] For legacy RO, every 3 preambles are mapped to 1 valid legacy PRU, X1 = 3; for additional RO, every 4 preambles are mapped to 1 valid additional PRU, X2 = 4.

[0188] For the mapping from PRACH slot 1 to PRU set 1, every 4 preambles are mapped to 1 additional PRU, and the mapping order is described in the previous section. As shown in Figure 6C, preambles 0-3 are mapped to additional PRU#0. Preambles 4-7 are mapped to additional PRU#1. Preambles 8-11 are mapped to additional PRU#2.

[0189] For the mapping of PRACH slot 2 to PRU set 2, since PRU set 2 does not include additional PRUs, the additional RO of PRACH slot 2 can be mapped to the additional PRU of PRU set 1 after the additional RO of PRACH slot 1. As shown in Figure 6C, preambles 12-15 are mapped to additional PRU#3. For legacy ROs, preambles 16-18 are mapped to legacy PRU#6, and preamble 19 is mapped to legacy PRU#7. It can be seen that both SBFD-aware UE and legacy UE are mapped to legacy PRU#6 when selecting preambles 16-18. For SBFD-aware UE, the selection of additional ROs does not interfere with legacy UEs. For example, when the SBFD terminal device selects preamble 12 on PRACH slot 1, the payload is transmitted on additional PRU#3 in PRU set 1.

[0190] For the PRACH slot 3-to-PRU set 3 mapping, every 3 preambles are mapped to 1 legacy PRU. As shown in Figure 6C, preambles 20-22 are mapped to legacy PRU#12, preambles 23-25 ​​are mapped to legacy PRU#13, preambles 26-28 are mapped to legacy PRU#14, and preambles 29-31 are mapped to legacy PRU#15.

[0191] Referring to Figure 6D, PRACH slot 1 contains 3 additional ROs. PRACH slot 2 contains 3 additional ROs and 3 legacy ROs. PRACH slot 3 contains 3 legacy ROs. PRU set 1 contains 6 additional PRUs. PRU set 2 and PRU set 3 each contain 6 legacy PRUs.

[0192] For legacy RO, every 3 preambles are mapped to 1 valid legacy PRU, X1 = 3; for additional RO, every 4 preambles are mapped to 1 valid additional PRU, X2 = 4.

[0193] For the PRACH slot 1 to PRU set 1 mapping, preambles 0-3 are mapped to additional PRU#0, and preambles 4-5 are mapped to additional PRU#1.

[0194] For the mapping from PRACH slot 2 to PRU set 2, since PRU set 2 does not include additional PRUs, the additional ROs of PRACH slot 2 are mapped to the additional PRUs of PRU set 1. The last PRU mapped from the additional ROs in PRACH slot 1 is additional PRU#1, and the additional ROs in PRACH slot 2 are mapped backwards starting from additional PRU#2. As shown in Figure 6D, preambles 6-9 on additional ROs are mapped to additional PRU#2, and preambles 10-11 are mapped to additional PRU#3. Preambles 12-14 on legacy ROs are mapped to legacy PRU#6, and preambles 15-17 on legacy ROs are mapped to legacy PRU#7.

[0195] For the PRACH slot 3 to PRU set 3 mapping, preambles 18-20 are mapped to legacy PRU#12, and preambles 21-23 are mapped to legacy PRU#13.

[0196] In another implementation of the mapping from PRACH slot 2 to PRU set 2, if additional PRU#1 is not fully mapped, the additional RO in PRACH slot 2 is mapped backwards starting from additional PRU#1. As shown in Figure 6E, preambles 6-7 on additional RO are mapped to additional PRU#1, and preambles 8-11 are mapped to additional PRU#2.

[0197] Based on the second mapping rule mentioned above, it can be concluded that for a first type RO in a first type time slot, if the first type RO is only mapped to a first type PRU, and the first PRU set includes a first type PRU, the first type RO is mapped to a first type PRU in the first PRU set; if the first PRU set does not include a first type PRU, the first type RO is not mapped to a PRU, or the first type RO is mapped to a first type PRU in the second PRU set.

[0198] In the third mapping rule, additional ROs can be mapped to either legacy PRUs or additional PRUs, with legacy PRUs mapped first. The starting point of the PRU for additional RO mapping is the legacy PRU, the same as the starting point for legacy RO mapping. After all legacy PRUs have been mapped with random access preambles, the preambles of additional ROs continue to be mapped to additional PRUs.

[0199] When determining the PRU for the preamble mapping on each additional RO, the SBFD terminal device starts from the first legacy PRU in the first PRU set and determines the corresponding legacy PRU according to the mapping order. After mapping X2 random access preambles on each legacy PRU, it continues to determine the corresponding additional PRU according to the mapping order. Similarly, when determining the PRU for the preamble mapping on legacy ROs, the SBFD terminal device also starts from the first legacy PRU in the first PRU set and determines the corresponding legacy PRU according to the mapping order.

[0200] The third mapping rule is illustrated below with examples from Figures 7A to 7D. In the examples shown in Figures 7A and 7B, the SBFD symbol in PRACH slot 2 is configured using downlink symbols configured with tdd-UL-DL-ConfigurationCommon. The additional RO and legacy RO are configured in a single configuration scenario. In the examples shown in Figures 7C and 7D, the SBFD symbol in PRACH slot 2 is configured using flexible symbols configured with tdd-UL-DL-ConfigurationCommon. The additional RO and legacy RO are configured in a dual configuration scenario.

[0201] Referring to Figure 7A, PRACH slot 1 contains 6 additional ROs. PRACH slot 2 contains 2 additional ROs and 2 legacy ROs. PRACH slot 3 contains 6 legacy ROs. PRU set 1 includes 6 additional PRUs. PRU set 2 and PRU set 3 each include 6 legacy PRUs.

[0202] For legacy RO, every 3 preambles are mapped to 1 valid legacy PRU, X1 = 3; for additional RO, every 4 preambles are mapped to 1 valid additional PRU, X2 = 4.

[0203] For the mapping from PRACH slot 1 to PRU set 1, every 4 preambles are mapped to 1 additional PRU, and the mapping order is described in the previous section. As shown in Figure 7A, preambles 0-3 are mapped to additional PRU#0. Preambles 4-7 are mapped to additional PRU#1. Preambles 8-11 are mapped to additional PRU#2.

[0204] For the mapping of PRACH slot 2 to PRU set 2, both legacy ROs and additional ROs are mapped to legacy PRUs. As shown in Figure 7A, preambles 12-15 in the additional RO are mapped to legacy PRU#6. Preambles 16-18 in the legacy RO are mapped to legacy PRU#6, and preamble 19 is mapped to legacy PRU#7. Legacy PRU#6 in PRU set 2 maps both three legacy RO preambles and four additional RO preambles. When the SBFD-aware UE selects preambles 12-15 on the additional RO or preambles 16-18 on the legacy RO, it is mapped to legacy PRU#6.

[0205] For the PRACH slot 3-to-PRU set 3 mapping, every 3 preambles are mapped to 1 legacy PRU. As shown in Figure 7A, preambles 20-22 are mapped to legacy PRU#12, preambles 23-25 ​​are mapped to legacy PRU#13, preambles 26-28 are mapped to legacy PRU#14, and preambles 29-31 are mapped to legacy PRU#15.

[0206] Referring to Figure 7B, PRACH slot 1 contains 6 additional ROs. PRACH slot 2 contains 2 additional ROs and 2 legacy ROs. PRACH slot 3 contains 6 legacy ROs. PRU set 1 includes 4 additional PRUs. PRU set 2 includes 2 additional PRUs and 3 legacy PRUs. PRU set 3 includes 6 legacy PRUs.

[0207] For legacy RO, every 3 preambles are mapped to 1 valid legacy PRU, X1 = 3; for additional RO, every 1 preamble is mapped to 1 valid additional PRU, X2 = 1.

[0208] For the mapping from PRACH slot 1 to PRU set 1, each preamble is mapped to one additional PRU. As shown in Figure 7B, preamble 0 is mapped to additional PRU#0, preamble 1 is mapped to additional PRU#1, preamble 2 is mapped to additional PRU#2, and preamble 3 is mapped to additional PRU#3.

[0209] For the mapping from PRACH slot 2 to PRU set 2, the starting point for both additional RO and legacy RO is legacy PRU#6. As shown in Figure 7B, preamble 12 in additional RO is mapped to legacy PRU#6. Preamble 13 in additional RO is mapped to legacy PRU#7. Preamble 14 in additional RO is mapped to legacy PRU#8. At this point, for additional RO, legacy PRU is fully mapped, and additional RO continues to map to additional PRU. Preamble 15 in additional RO is mapped to additional PRU#4. For legacy RO, preambles 16-18 in legacy RO are mapped to legacy PRU#6, and preamble 19 is mapped to legacy PRU#7.

[0210] For the PRACH slot 3 to PRU set 3 mapping, every 3 preambles are mapped to 1 legacy PRU. As shown in Figure 5B, preambles 20-22 are mapped to legacy PRU#9, preambles 23-25 ​​are mapped to legacy PRU#10, preambles 26-28 are mapped to legacy PRU#11, and preambles 29-31 are mapped to legacy PRU#12.

[0211] Referring to Figure 7C, PRACH slot 1 contains 3 additional ROs. PRACH slot 2 contains 3 additional ROs and 3 legacy ROs. PRACH slot 3 contains 3 legacy ROs. PRU set 1 contains 6 additional PRUs. PRU set 2 and PRU set 3 each contain 6 legacy PRUs.

[0212] For legacy RO, every 3 preambles are mapped to 1 valid legacy PRU, X1 = 3; for additional RO, every 4 preambles are mapped to 1 valid additional PRU, X2 = 4.

[0213] For the PRACH slot 1 to PRU set 1 mapping, preambles 0-3 are mapped to additional PRU#0, and preambles 4-5 are mapped to additional PRU#1.

[0214] For the PRACH slot 2 to PRU set 2 mapping, preambles 6-9 on the additional RO are mapped to legacy PRU#6, and preambles 10-11 are mapped to legacy PRU#7. Preambles 12-14 on the legacy RO are mapped to legacy PRU#6, and preambles 15-17 on the legacy RO are mapped to legacy PRU#7.

[0215] For the PRACH slot 3 to PRU set 3 mapping, preambles 18-20 are mapped to legacy PRU#12, and preambles 21-23 are mapped to legacy PRU#13.

[0216] Referring to Figure 7D, PRACH slot 1 contains 3 additional ROs. PRACH slot 2 contains 3 additional ROs and 3 legacy ROs. PRACH slot 3 contains 3 legacy ROs. PRU set 1 contains 4 additional PRUs. PRU set 2 contains 2 additional PRUs and 3 legacy PRUs. PRU set 3 contains 6 legacy PRUs. For legacy ROs, every 3 preambles are mapped to 1 valid legacy PRU, X1 = 3; for additional ROs, every 1 preamble is mapped to 1 valid additional PRU, X2 = 1.

[0217] For the mapping of PRACH slot 1 to PRU set 1, preamble 0 is mapped to additional PRU#0, preamble 1 is mapped to additional PRU#1, preamble 2 is mapped to additional PRU#2, and preamble 3 is mapped to additional PRU#3.

[0218] For the mapping from PRACH slot 2 to PRU set 2, preamble 6 in additional RO is mapped to legacy PRU#6. Preamble 7 in additional RO is mapped to legacy PRU#7. Preamble 8 in additional RO is mapped to legacy PRU#8. At this point, for additional RO, legacy PRU is fully mapped, and additional RO continues to map to additional PRU. Preamble 9 in additional RO is mapped to additional PRU#4, and preamble 10 in additional RO is mapped to additional PRU#5. For legacy RO, preambles 12-14 in legacy RO are mapped to legacy PRU#6, and preambles 15-17 are mapped to legacy PRU#7.

[0219] For the PRACH time slot 3 to PRU set 3 mapping, preambles 18-20 are mapped to legacy PRU#9, and preambles 21-23 are mapped to legacy PRU#10.

[0220] Based on the third mapping rule described above, it can be concluded that for a first-type RO in a first-type time slot, the first-type RO maps to both first-type PRUs and second-type PRUs, with the second-type PRUs being mapped first. After all second-type PRUs have been mapped with random access preambles, the random access preambles on the first-type ROs continue to be mapped to first-type PRUs. The starting point of the mapping from the first-type RO to the second-type PRU is the same as the starting point of the mapping from the second-type RO to the second-type PRU. It can be understood that the mapping from the first-type RO to both first-type and second-type PRUs means that the first-type RO can be mapped to either the first-type PRU or the second-type PRU, but not simultaneously.

[0221] In the fourth mapping rule, additional ROs can be mapped to either legacy PRUs or additional PRUs, with legacy PRUs being mapped first. Additional ROs follow legacy ROs and begin mapping to legacy PRUs. After all legacy PRUs have been mapped with random access preambles, the random access preambles on additional ROs continue to be mapped to additional PRUs.

[0222] The additional RO starts mapping to the legacy PRU after the legacy RO, including: after the random access preambles on each legacy RO have been mapped to the legacy PRU, the random access preambles on the additional RO continue to be mapped to the subsequent legacy PRU. That is, the legacy PRUs in the first type of time slots are divided into a first part and a second part. The random access preambles on the legacy RO are mapped to the first part of the legacy PRUs, and the random access preambles on the additional RO are mapped to the second part of the legacy PRUs. The first part is located before the second part, and the first part and the second part do not overlap. Hereinafter, the legacy PRU to which the last preamble in the last legacy RO is mapped is denoted as the third PRU.

[0223] For the additional RO to map to the legacy PRU after the legacy RO, in one implementation, strong continuous PRU mapping can be adopted. Exemplarily, if the third PRU is not mapped with X1 preambles, for example, it is mapped with a preambles and a < X1, then the starting PRU for the additional RO to map to the PRU is the third PRU, and at most X1 - a additional RO / preamble combinations can be mapped on the third PRU. If the third PRU is just mapped with X1 preambles, the additional RO is mapped to the next PRU after the third PRU. In this implementation, all the legacy PRUs have been mapped with random access preambles, indicating that each legacy PRU in the first part is mapped with X1 preambles, and each legacy PRU in the second part is mapped with X₂ preambles.

[0224] In another implementation, weak continuous PRU mapping can be adopted. Exemplarily, regardless of whether the third PRU is mapped with X1 preambles, the starting PRU for the additional RO to map to the PRU set is the next PRU after the third PRU.

[0225] The fourth mapping rule is illustrated below with examples from Figures 8A to 8F. In the examples shown in Figures 8A to 8D, the SBFD symbol in PRACH slot 2 is configured as a downlink symbol using the tdd-UL-DL-ConfigurationCommon configuration. The additional RO and legacy RO are configured in a single configuration scenario. In the examples shown in Figures 8E and 8F, the SBFD symbol in PRACH slot 2 is configured as a flexible symbol using the tdd-UL-DL-ConfigurationCommon configuration. The additional RO and legacy RO are configured in a dual configuration scenario.

[0226] For a strongly continuous PRU mapping, see Figure 8A. PRACH slot 1 contains 6 additional ROs. PRACH slot 2 contains 2 additional ROs and 2 legacy ROs. PRACH slot 3 contains 6 legacy ROs. PRU set 1 contains 6 additional PRUs. PRU set 2 and PRU set 3 each contain 6 legacy PRUs.

[0227] For legacy RO, every 3 preambles are mapped to 1 valid legacy PRU, X1 = 3; for additional RO, every 4 preambles are mapped to 1 valid additional PRU, X2 = 4.

[0228] For the mapping from PRACH slot 1 to PRU set 1, every 4 preambles are mapped to 1 additional PRU, and the mapping order is described in the previous section. As shown in Figure 8A, preambles 0-3 are mapped to additional PRU#0. Preambles 4-7 are mapped to additional PRU#1. Preambles 8-11 are mapped to additional PRU#2.

[0229] For the mapping of PRACH slot 2 to PRU set 2, preambles 16-18 on legacy RO are mapped to legacy PRU#6, and preamble 19 is mapped to legacy PRU#7. At this point, legacy PRU#7 is the third PRU, and only one legacy RO preamble is mapped to it, i.e., a=1. Two additional RO preambles can also be mapped to legacy PRU#7. Preambles 12-13 on the additional RO are mapped to legacy PRU#7. Preambles 14-15 on the additional RO are mapped to legacy PRU#8. At this point, the legacy PRU is not fully mapped. For example, when the terminal device selects preamble 12, the payload is transmitted on legacy PRU#7 in PRU set 2.

[0230] For the PRACH slot 3-to-PRU set 3 mapping, every 3 preambles are mapped to 1 legacy PRU. As shown in Figure 8A, preambles 20-22 are mapped to legacy PRU#12, preambles 23-25 ​​are mapped to legacy PRU#13, preambles 26-28 are mapped to legacy PRU#14, and preambles 29-31 are mapped to legacy PRU#15.

[0231] Referring to Figure 8B, PRACH slot 1 contains 6 additional ROs. PRACH slot 2 contains 2 additional ROs and 2 legacy ROs. PRACH slot 3 contains 6 legacy ROs. PRU set 1 includes 4 additional PRUs. PRU set 2 includes 2 additional PRUs and 3 legacy PRUs. PRU set 3 includes 6 legacy PRUs.

[0232] For legacy RO, every 3 preambles are mapped to 1 valid legacy PRU, X1 = 3; for additional RO, every 1 preamble is mapped to 1 valid additional PRU, X2 = 1.

[0233] For the mapping from PRACH slot 1 to PRU set 1, each preamble is mapped to one additional PRU. As shown in Figure 8B, preamble 0 is mapped to additional PRU#0, preamble 1 is mapped to additional PRU#1, preamble 2 is mapped to additional PRU#2, and preamble 3 is mapped to additional PRU#3.

[0234] For the mapping of PRACH slot 2 to PRU set 2, preambles 16-18 in legacy RO are mapped to legacy PRU#6, and preamble 19 is mapped to legacy PRU#7. At this point, legacy PRU#7 is the third PRU, and only one legacy RO preamble is mapped to it, i.e., a=1. Two additional RO preambles can also be mapped to legacy PRU#7. Preambles 12-13 in additional RO are mapped to legacy PRU#7. Preamble 14 in additional RO is mapped to legacy PRU#8. After all the legacy PRUs have been mapped with random access preambles, the random access preambles on additional ROs continue to be mapped to additional PRUs; preamble 15 in additional RO is mapped to additional PRU#4.

[0235] For the PRACH slot 3-to-PRU set 3 mapping, every 3 preambles are mapped to 1 legacy PRU. As shown in Figure 8B, preambles 20-22 are mapped to legacy PRU#9, preambles 23-25 ​​are mapped to legacy PRU#10, preambles 26-28 are mapped to legacy PRU#11, and preambles 29-31 are mapped to legacy PRU#12.

[0236] For the weakly continuous PRU mapping, see Figure 8C. PRACH slot 1 contains 6 additional ROs. PRACH slot 2 contains 2 additional ROs and 2 legacy ROs. PRACH slot 3 contains 6 legacy ROs. PRU set 1 contains 6 additional PRUs. PRU set 2 and PRU set 3 each contain 6 legacy PRUs.

[0237] For legacy RO, every 3 preambles are mapped to 1 valid legacy PRU, X1 = 3; for additional RO, every 4 preambles are mapped to 1 valid additional PRU, X2 = 4.

[0238] For the mapping from PRACH slot 1 to PRU set 1, every 4 preambles are mapped to 1 additional PRU, and the mapping order is described in the previous section. As shown in Figure 8C, preambles 0-3 are mapped to additional PRU#0. Preambles 4-7 are mapped to additional PRU#1. Preambles 8-11 are mapped to additional PRU#2.

[0239] For the PRACH slot 2 to PRU set 2 mapping, preambles 16-18 in legacy RO are mapped to legacy PRU#6, and preamble 19 is mapped to legacy PRU#7. At this point, legacy PRU#7 is the third PRU, and additional RO mapping starts from legacy PRU#8 to the PRU set. Preambles 12-15 in additional RO are mapped to legacy PRU#8.

[0240] For the PRACH slot 3-to-PRU set 3 mapping, every 3 preambles are mapped to 1 legacy PRU. As shown in Figure 8C, preambles 20-22 are mapped to legacy PRU#12, preambles 23-25 ​​are mapped to legacy PRU#13, preambles 26-28 are mapped to legacy PRU#14, and preambles 29-31 are mapped to legacy PRU#15.

[0241] Referring to Figure 8D, PRACH slot 1 contains 6 additional ROs. PRACH slot 2 contains 2 additional ROs and 2 legacy ROs. PRACH slot 3 contains 6 legacy ROs. PRU set 1 contains 4 additional PRUs. PRU set 2 contains 2 additional PRUs and 3 legacy PRUs. PRU set 3 contains 6 legacy PRUs.

[0242] For legacy RO, every 3 preambles are mapped to 1 valid legacy PRU, X1 = 3; for additional RO, every 1 preamble is mapped to 1 valid additional PRU, X2 = 1.

[0243] For the mapping from PRACH slot 1 to PRU set 1, each preamble is mapped to one additional PRU. As shown in Figure 8D, preamble 0 is mapped to additional PRU#0, preamble 1 is mapped to additional PRU#1, preamble 2 is mapped to additional PRU#2, and preamble 3 is mapped to additional PRU#3.

[0244] For the mapping of PRACH slot 2 to PRU set 2, preambles 16-18 in legacy RO are mapped to legacy PRU#6, and preamble 19 is mapped to legacy PRU#7. At this point, legacy PRU#7 is the third PRU. Additional RO starts mapping to the PRU set from legacy PRU#8. Preamble 12 in additional RO is mapped to legacy PRU#8. After all legacy PRUs have been mapped with random access preambles, random access preambles on additional RO continue to be mapped to additional PRUs. Preamble 13 in additional RO is mapped to additional PRU#4. Preamble 14 in additional RO is mapped to additional PRU#5.

[0245] For the PRACH slot 3-to-PRU set 3 mapping, every 3 preambles are mapped to 1 legacy PRU. As shown in Figure 8D, preambles 20-22 are mapped to legacy PRU#9, preambles 23-25 ​​are mapped to legacy PRU#10, preambles 26-28 are mapped to legacy PRU#11, and preambles 29-31 are mapped to legacy PRU#12.

[0246] Referring to Figure 8E, PRACH slot 1 contains 3 additional ROs. PRACH slot 2 contains 3 additional ROs and 3 legacy ROs. PRACH slot 3 contains 3 legacy ROs. PRU set 1 contains 6 additional PRUs. PRU set 2 and PRU set 3 each contain 6 legacy PRUs. For legacy ROs, every 3 preambles are mapped to 1 valid legacy PRU, X1 = 3; for additional ROs, every preamble is mapped to 1 valid additional PRU, X2 = 4.

[0247] For the PRACH slot 1 to PRU set 1 mapping, preambles 0-3 are mapped to additional PRU#0, and preambles 4-5 are mapped to additional PRU#1.

[0248] For the PRACH slot 2 to PRU set 2 mapping, preambles 12-14 in legacy RO are mapped to legacy PRU#6, and preambles 15-17 are mapped to legacy PRU#7. At this point, legacy PRU#7 is the third PRU. The third PRU is fully mapped. Regardless of whether it is a strongly continuous PRU mapping or a weakly continuous PRU mapping, the preambles on additional RO are mapped to legacy PRU#8. Preambles 6-9 in additional RO are mapped to legacy PRU#8, and preambles 10-11 are mapped to legacy PRU#9.

[0249] For the PRACH slot 3 to PRU set 3 mapping, preambles 18-20 are mapped to legacy PRU#12, and preambles 21-23 are mapped to legacy PRU#13.

[0250] Referring to Figure 8F, PRACH slot 1 contains 3 additional ROs. PRACH slot 2 contains 3 additional ROs and 3 legacy ROs. PRACH slot 3 contains 3 legacy ROs. PRU set 1 contains 4 additional PRUs. PRU set 2 contains 2 additional PRUs and 3 legacy PRUs. PRU set 3 contains 6 legacy PRUs. For legacy ROs, every 3 preambles are mapped to 1 valid legacy PRU, X1 = 3; for additional ROs, every 1 preamble is mapped to 1 valid additional PRU, X2 = 1.

[0251] For the mapping of PRACH slot 1 to PRU set 1, preamble 0 is mapped to additional PRU#0, preamble 1 is mapped to additional PRU#1, preamble 2 is mapped to additional PRU#2, and preamble 3 is mapped to additional PRU#3.

[0252] For the mapping of PRACH slot 2 to PRU set 2, preambles 12-14 in legacy RO are mapped to legacy PRU#6, and preambles 15-17 are mapped to legacy PRU#7. At this point, legacy PRU#7 is the third PRU. The third PRU is now fully mapped. Regardless of whether it's a strongly consecutive or weakly consecutive PRU mapping, the preambles on additional RO are mapped to legacy PRU#8, and preamble 6 in additional RO is mapped to legacy PRU#8. After all legacy PRUs have been mapped with random access preambles, the random access preambles on additional RO continue to be mapped to additional PRUs, with preamble 7 in additional RO mapped to additional PRU#4. Preamble 8 in additional RO is mapped to additional PRU#5.

[0253] For the PRACH time slot 3 to PRU set 3 mapping, preambles 18-20 are mapped to legacy PRU#9, and preambles 21-23 are mapped to legacy PRU#10.

[0254] Based on the fourth mapping rule described above, for a first-type RO in a first-type time slot, the first-type RO is mapped to a first-type PRU and a second-type PRU, with the second-type PRUs mapped first. After all second-type PRUs have been mapped with random access preambles, the random access preambles on the first-type ROs continue to be mapped to first-type PRUs. Specifically, the mapping from a first-type RO to a second-type PRU includes: after all second-type ROs have been mapped to second-type PRUs, the random access preambles on the first-type ROs continue to be mapped to second-type PRUs. The continued mapping of random access preambles on the first-type ROs to second-type PRUs includes: starting mapping from PRUs after the third PRU, or starting mapping from the third PRU.

[0255] In the second, third, or fourth mapping rule, for the mapping of the preamble in the additional RO to the PRU (except for the third PRU under the strongly continuous PRU mapping), the additional RO in the first type PRACH slot and the second type slot both participate in the mapping. Where R2 equals the number of all valid additional ROs within the SSB-additional RO association mode period multiplied by the number of Type-2 preambles within each valid additional RO, and P2 equals the number of all valid additional PRUs within the SSB-additional RO association mode period. Here, if the available PRU sets are the first PRU set and the second PRU set, then all valid additional PRUs are the valid additional PRUs in all the first PRU sets and all the valid additional PRUs in all the second PRU sets. Alternatively, if the third PRU set includes additional PRUs and can be used as valid additional PRUs, then all valid additional PRUs are the additional PRUs in all the first PRU sets, all the second PRU sets, and all the valid additional PRUs in all the third PRU sets.

[0256] In summary, in the embodiments of this application, for a single MsgA PUSCH configuration, the mapping rules between PRACH slots and PRU sets include, but are not limited to: for a first type RO in a first type slot, the first type RO is mapped to a first type PRU and a second type PRU, with the second type PRU being mapped first. After all second type PRUs have been mapped to random access preambles, the random access preambles on the first type RO continue to be mapped to the first type PRU; or, the first type RO is mapped only to a first type PRU; or, the first type RO is not mapped to a PRU; for a first type RO in a second type slot, the first type RO is mapped only to a first type PRU; for a second type RO, the second type RO is mapped only to a second type PRU.

[0257] Both SBFD terminal equipment and traditional terminal equipment use this single MsgA PUSCH configuration. After the SBFD terminal equipment selects a random access preamble, it transmits the random access preamble on the corresponding RO (e.g., the first RO). Then, it transmits the payload on the PRU mapped by the random access preamble. For example, if the first RO is a first-type RO, the payload is transmitted on the first PRU, which can be either a first-type PRU or a second-type PRU. For example, if the first RO is a first-type RO in a first-type time slot, the first PRU can be a first-type PRU when using a second, third, or fourth mapping rule; and a second-type PRU when using a third or fourth mapping rule. For example, if the first RO is a first-type RO in a second-type time slot, the first PRU can be a first-type PRU.

[0258] For example, if the first RO is a second type RO, the payload is transmitted on the second PRU, which is also a second type PRU. For example, the first RO can be a second type RO in a first type time slot, or it can be a second type RO in a third type time slot.

[0259] The above describes the configuration for a single MsgA PUSCH. The following describes the configuration for a separate MsgA PUSCH.

[0260] In the mapping rules for separating MsgA PUSCH configurations, the set of PRUs contained in the legacy MsgA PUSCH configuration is denoted as the legacy PRU set. The set of PRUs contained in the additional MsgA PUSCH configuration is denoted as the additional PRU set.

[0261] Each PRACH slot containing a legacy RO is mapped to a specific legacy PRU set. The preimage of the mapping is the Type-2 preamble in the valid legacy ROs within the PRACH slot, and the image of the mapping is the legacy PRU in the legacy PRU set corresponding to that PRACH slot. That is, the first type of slot corresponds to one legacy PRU set, and the third type of slot corresponds to another legacy PRU set. Legacy ROs in the first type of slot are mapped to their corresponding legacy PRU set. Legacy ROs in the third type of slot are mapped to their corresponding legacy PRU set. Further, every X1 preambles are mapped to one valid PRU; the mapping order is described in the relevant content of 3GPP TS 38.213V18.1.0pp.61-62.

[0262] Each PRACH slot containing an additional RO is mapped to a specific additional PRU set. The preimage of the mapping is the Type-2 preamble in the valid additional ROs within the PRACH slot, and the mapped image is the additional PRU in the corresponding additional PRU set for that PRACH slot. In other words, a first-type slot corresponds to one additional PRU set, and a second-type slot corresponds to another additional PRU set. Additional ROs in a first-type slot are mapped to their corresponding additional PRU set. Additional ROs in a second-type slot are mapped to their corresponding additional PRU set. Further, every x2 preambles are mapped to one valid PRU; the mapping rules are detailed in the relevant sections of 3GPP TS 38.213V18.1.0pp.61-62.

[0263] For the determination of X1 when mapping the preamble to the PRU in legacy RO, we have Where R1 equals the number of all valid legacy ROs in the SSB-legacy RO association mode period multiplied by the number of Type-2 preambles in each valid legacy RO, and P1 equals the number of valid legacy PRUs in all legacy PRU sets in the SSB-legacy RO association mode period.

[0264] For the determination of X when mapping the preamble in additional RO to PRU, we have Where R2 equals the number of all valid additional ROs in the SSB-additional RO association mode period multiplied by the number of Type-2 preambles in each valid additional RO, and P2 equals the number of valid additional PRUs in the set of all additional PRUs in the SSB-additional RO association mode period.

[0265] Referring to Figures 9A and 9B, the base station is configured with three time slots: PRACH time slot 1, PRACH time slot 2, and PRACH time slot 3. PRACH time slot 1 is a second-type PRACH time slot. PRACH time slot 2 is a first-type PRACH time slot. PRACH time slot 3 is a third-type PRACH time slot. PRACH time slot 1 is additional PRACH time slot 1, mapped to additional PRU set 1. PRACH time slot 2 is additional PRACH time slot 2, mapped to additional PRU set 2. PRACH time slot 2 is also legacy PRACH time slot 1, mapped to legacy PRU set 1. PRACH time slot 3 is also legacy PRACH time slot 2, mapped to legacy PRU set 2. In the example shown in Figure 9A, the SBFD symbol in PRACH time slot 2 is configured using downlink symbols configured by tdd-UL-DL-ConfigurationCommon. The additional RO and legacy RO are configured in a single configuration scenario. In the example shown in Figure 9B, the SBFD symbol in PRACH slot 2 is configured using the flexible symbol configuration of tdd-UL-DL-ConfigurationCommon. The additional RO and legacy RO are configured in a dual configuration scenario.

[0266] As shown in Figure 9A, PRACH slot 1 contains 6 additional ROs. PRACH slot 2 contains 2 additional ROs and 2 legacy ROs. PRACH slot 3 contains 6 legacy ROs. Additional PRU set 1 contains 6 additional PRUs. Additional PRU set 2 contains 6 additional PRUs. Legacy PRU set 1 contains 4 legacy PRUs. Legacy PRU set 2 contains 4 legacy PRUs.

[0267] For legacy RO, every 3 preambles are mapped to 1 valid legacy PRU, X1 = 3; for additional RO, every 1 preamble is mapped to 1 valid additional PRU, X2 = 4.

[0268] For the mapping of PRACH slot 1 to additional PRU set 1, preambles 0-3 are mapped to additional PRU#0, preambles 4-7 are mapped to additional PRU#1, and preambles 8-11 are mapped to additional PRU#2.

[0269] For additional RO in PRACH slot 2, to additional PRU set 2, preamble 12-15 is mapped to additional PRU#6.

[0270] For legacy RO in PRACH slot 2, mapping to legacy PRU set 1, preamble 16-18 is mapped to legacy PRU#12, and preamble 19 is mapped to legacy PRU#13.

[0271] For the PRACH slot 3 to legacy PRU set 2 mapping, preambles 20-22 are mapped to legacy PRU#16, preambles 23-25 ​​are mapped to legacy PRU#17, preambles 26-28 are mapped to legacy PRU#18, and preambles 29-31 are mapped to legacy PRU#19.

[0272] As shown in Figure 9B, PRACH slot 1 contains 3 additional ROs. PRACH slot 2 contains 3 additional ROs and 3 legacy ROs. PRACH slot 3 contains 3 legacy ROs.

[0273] For the PRACH slot 1 to additional PRU set 1 mapping, preambles 0-3 are mapped to additional PRU#0, and preambles 4-5 are mapped to additional PRU#1.

[0274] For additional RO in PRACH slot 2, additional PRU set 2, preambles 6-9 are mapped to additional PRU#6, and preambles 10-11 are mapped to additional PRU#7.

[0275] For legacy RO in PRACH slot 2, mapping to legacy PRU set 1, preambles 12-14 are mapped to legacy PRU#12, and preambles 15-17 are mapped to legacy PRU#13.

[0276] For the PRACH slot 3 to legacy PRU set 2 mapping, preambles 18-20 are mapped to legacy PRU#16, and preambles 21-23 are mapped to legacy PRU#17.

[0277] Based on the above-described separated MsgA PUSCH configuration, the SBFD terminal device maps the preamble on the additional RO to the additional PRU set based on the additional MsgA PUSCH configuration; and maps the preamble on the legacy RO to the legacy PRU set based on the legacy MsgA PUSCH configuration. Traditional terminal devices map the preamble on the legacy RO to the legacy PRU set based on the legacy MsgA PUSCH configuration. The SBFD terminal device and the legacy terminal device have the same understanding of the PRU location corresponding to a specific legacy RO / preamble combination.

[0278] The additional PRU set is designated as the first type PRU set, and the legacy PRU set is designated as the second type PRU set. In the above separated MsgA PUSCH configuration, the first type RO in the first type time slot is associated with the first type PRU set, and the second type RO in the first type time slot is associated with the second type PRU set. The time slot positions of the first type PRU set and the second type PRU set are different. The mapping rules between PRACH time slots and PRU sets include, but are not limited to: the first type RO is mapped only to the first type PRU; the second type RO is mapped only to the second type PRU.

[0279] After the SBFD terminal device selects a random access preamble, it transmits the random access preamble on the corresponding RO (such as the first RO). Furthermore, if the first RO is a first-type RO, the payload is transmitted on the first PRU, which is a first-type PRU. For example, the first RO can be a first-type RO in a first-type time slot, or a first-type RO in a second-type time slot.

[0280] When the first RO is a second type RO, the payload is transmitted on the second PRU, which is also a second type PRU. For example, the first RO can be a second type RO in a first type time slot, or it can be a second type RO in a third type time slot.

[0281] In summary, the embodiments of this application provide a communication method and provide a PRACH slot-PUSCH resource mapping rule under SBFD operation, which can effectively support SBFD terminal devices to initiate two-step random access.

[0282] It should be understood that, in the various embodiments of this application, unless otherwise specified or in case of logical conflict, the terms and / or descriptions between different embodiments may be consistent and may be referenced by each other, and the technical features in different embodiments may be combined to form new embodiments according to their inherent logical relationships.

[0283] The communication method provided by the embodiments of this application has been described above with reference to Figures 1 to 9B. The communication device for performing the above communication method provided by the embodiments of this application is described below.

[0284] Referring to Figure 10, which is a schematic diagram of the communication device provided in this application, the communication device 1000 may include a communication unit 1010 and optionally a processing unit 1020. The communication unit 1010 can implement corresponding communication functions, which can be internal communication within the communication device 1000 or communication between the communication device 1000 and other devices. The processing unit 1020 can implement corresponding processing functions. The communication unit 1010 may also be referred to as a communication interface or a transceiver unit. Optionally, the communication device 1000 may also include a storage unit, which can be used to store instructions and / or data. The processing unit 1020 can read the instructions and / or data from the storage unit to enable the communication device 1000 to implement the aforementioned method embodiments.

[0285] In one possible design, the communication device 1000 can be a network device in the above method embodiments, or it can be a module or chip applied to a network device. The communication device 1000 can be used to execute the steps or processes performed by the network device in the above embodiments.

[0286] Specifically, the communication unit 1010 is used to: receive a random access preamble at the first random access time RO, the random access preamble being used for two-step random access; when the first RO is a first type RO, receive a payload at the first PRU, the first PRU being either a first type PRU or a second type PRU; when the first RO is a second type RO, receive a payload at the second PRU, the second PRU being a second type PRU, the first PRU and the second PRU being determined based on the mapping rules between PRACH time slots and PRU sets; wherein, the first type RO is a newly added RO in sub-band full-duplex communication, the second type RO is an existing RO in time-division full-duplex communication, the first type PRU is a newly added PRU in sub-band full-duplex communication, and the second type PRU is an existing PRU in time-division full-duplex communication.

[0287] In one possible design, the communication device 1000 can be the terminal device in the above method embodiments, or it can be a module or chip applied to the terminal device. The communication device 1000 can be used to execute the steps or processes performed by the terminal device in the above embodiments.

[0288] Specifically, the communication unit 1010 is used to: send a random access preamble to the RO during the first random access event, the random access preamble being used for two-step random access; when the first RO is a first type RO, send a payload to the first PRU, the first PRU being either a first type PRU or a second type PRU; when the first RO is a second type RO, send a payload to the second PRU, the second PRU being a second type PRU, the first PRU and the second PRU being determined based on the mapping rules between PRACH time slots and PRU sets; wherein, the first type RO is a newly added RO in sub-band full-duplex communication, the second type RO is an existing RO in time-division full-duplex communication, the first type PRU is a newly added PRU in sub-band full-duplex communication, and the second type PRU is an existing PRU in time-division full-duplex communication.

[0289] For details regarding the steps or processes executed by each unit in the communication device 1000, please refer to the above method embodiments; they will not be described in detail here.

[0290] It should be understood that the "unit" in the communication device 1000 can be implemented in hardware, software, or by hardware executing corresponding software. For example, the "unit" can refer to an application-specific integrated circuit (ASIC), electronic circuitry, a processor (e.g., a shared processor, a proprietary processor, or a group processor, etc.) and memory for executing one or more software or firmware programs, combined logic circuitry, and / or other suitable components supporting the described functions. Furthermore, the communication unit 1010 can be replaced by a transceiver circuit (e.g., it may include a receiving circuit and a transmitting circuit), and the processing unit 1020 can be replaced by a processor or processing circuitry.

[0291] Referring to Figure 11, Figure 11 is a schematic structural diagram of a communication device 1100 applicable to an embodiment of this application. The device 1100 can be a communication equipment, or a chip, chip system, or processor that supports the communication equipment in implementing the above methods. The communication equipment can be a terminal device or a network device. This device can be used to implement the methods described in the above method embodiments; for details, please refer to the descriptions in the above method embodiments.

[0292] The communication device 1100 includes one or more processors 1101, which can also be called processing units, and can perform certain control functions. The processor 1101 can be a general-purpose processor or a special-purpose processor, etc.

[0293] In an alternative design, the processor 1101 may also store instructions and / or data that can be executed by the processor 1101 to cause the communication device 1100 to perform the methods described in the above method embodiments.

[0294] Optionally, the communication device 1100 may include one or more memories 1102, which may store instructions that can be executed on the processor 1101, causing the communication device 1100 to perform the methods described in the above method embodiments. Optionally, the memories 1102 may also store data. Optionally, the processor 1101 may also store instructions and / or data. The processor 1101 and the memories 1102 may be provided separately or integrated together.

[0295] In another alternative design, the communication device 1100 may include a communication interface 1103 for implementing receiving and transmitting functions. For example, the communication interface 1103 may be a transceiver circuit, interface, interface circuit, or transceiver. The transceiver circuit, interface, interface circuit, or transceiver for implementing receiving and transmitting functions may be separate or integrated. The aforementioned transceiver circuit, interface, interface circuit, or transceiver may be used for reading and writing code / data, or it may be used for transmitting or relaying signals.

[0296] Those skilled in the art will understand that, for ease of explanation, Figure 11 shows only one memory and processor. In actual devices, multiple processors and memories may exist. Memory may also be referred to as storage medium or storage device, etc., and the embodiments of this application do not impose such limitations.

[0297] It should be understood that, in one possible design, the steps in the method embodiments provided in this application can be implemented by integrated logic circuits in the processor's hardware or by instructions in software form. The steps of the methods disclosed in the embodiments of this application can be directly implemented by a hardware processor, or implemented by a combination of hardware and software modules in the processor. The software modules can reside in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. This storage medium is located in memory, and the processor reads information from the memory and, in conjunction with its hardware, completes the steps of the above method. To avoid repetition, detailed descriptions are not provided here.

[0298] It should be noted that the processor in the embodiments of this application can be an integrated circuit chip with signal processing capabilities. In implementation, the steps of the above method embodiments can be completed by the integrated logic circuitry in the processor's hardware or by software instructions.

[0299] In the embodiments of this application, the processor can be a CPU, or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor can be a microprocessor or any conventional processor. The steps of the method disclosed in the embodiments of this application can be directly manifested as execution by a hardware decoding processor, or execution by a combination of hardware and software modules in the decoding processor. The software modules can reside in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. This storage medium is located in memory; the processor reads information from the memory and, in conjunction with its hardware, completes the steps of the above method.

[0300] It should be understood that, in the embodiments of this application, the memory may include read-only memory and random access memory, and provides instructions and data to the processor. The memory may also include non-volatile random access memory. The memory may be volatile memory or non-volatile memory, or may include both. The non-volatile memory may be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory may be random access memory (RAM), which serves as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous linked dynamic random access memory (SLDRAM), and direct rambus RAM (DR RAM).

[0301] This application provides a communication network, including at least one application function entity, at least one network device, and at least one read / write device. The application entity is used to execute the steps of application function execution in the method embodiment, the network device is used to execute the steps of core network execution in the method embodiment, and the read / write device is used to execute the steps of reader execution in the method embodiment.

[0302] This application provides a computer storage medium that stores a computer program (also referred to as code or instructions) that, when run on a computer, causes the computer to perform the methods of this application.

[0303] This application provides a computer program product containing instructions, which includes a computer program (also referred to as code or instructions) that, when run, causes a computer to perform the method of this application embodiment.

[0304] The above embodiments can be implemented, in whole or in part, by software, hardware, firmware, or any other combination thereof. When implemented using software, the above embodiments can be implemented, in whole or in part, as a computer program product. This computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer program are loaded or executed on a computer, all or part of the processes or functions according to the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more sets of available media. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium. A semiconductor medium can be a solid-state drive.

[0305] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0306] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0307] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0308] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0309] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0310] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0311] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A communication method characterized by comprising: The method is applied to a first terminal device, and the first terminal device is a terminal device supporting sub-band full duplex (SBFD), and the method comprises the following steps: sending a random access preamble at a first random access occasion (RO), wherein the random access preamble is used for two-step random access; when the first RO is a first type RO, sending a payload at a first physical uplink shared channel resource unit (PRU), wherein the first PRU is a first type PRU or a second type PRU; when the first RO is a second type RO, sending a payload at a second PRU, wherein the second PRU is a second type PRU, and the first PRU and the second PRU are determined based on a mapping rule of a PRACH time slot and a PRU set; wherein the first type RO is a newly added RO in sub-band full duplex communication, the second type RO is an original RO in time division duplex communication, the first type PRU is a newly added PRU in sub-band full duplex communication, and the second type PRU is an original PRU in time division duplex communication.

2. The method of claim 1, wherein, The mapping rule of the PRACH time slot and the PRU set comprises: for the first type RO in a first type time slot, the first type RO is mapped to the first type PRU and the second type PRU, and the mapping order of the second type PRU is in front, after the second type PRU has all mapped random access preambles, the random access preamble on the first type RO continues to be mapped to the first type PRU, or the first type RO is only mapped to the first type PRU, or the first type RO is not mapped to a PRU; for the first type RO in a second type time slot, the first type RO is only mapped to the first type PRU; for the second type RO, the second type RO is only mapped to the second type PRU; wherein the first type time slot comprises the first type RO and the second type RO, and the second type time slot comprises the first type RO.

3. The method of claim 2, wherein, for the first type RO in the first type time slot, if the first type RO is only mapped to the first type PRU, the mapping rule of the PRACH time slot and the PRU set further comprises: in a case where a first PRU set comprises the first type PRU, the first type RO is mapped to the first type PRU in the first PRU set, and the first PRU set is a PRU set corresponding to the first type time slot; in a case where the first PRU set does not comprise the first type PRU, the first type RO is not mapped to a PRU, or the first type RO is mapped to a first type PRU in a second PRU set, and the second PRU set is a PRU set corresponding to the second type time slot.

4. The method of claim 3, wherein, the first type RO is mapped to the first type PRU in the second PRU set, comprising: the first type RO is mapped to the first type PRU in a target PRU set in a plurality of the second PRU sets, and a first time slot of the target PRU set is located before the first PRU set and is spaced apart from a time slot of the first PRU set by a minimum interval.

5. The method of claim 2, wherein, For the first type RO mapping to the second type PRU, comprising: After all the random access preambles on the second type RO have been mapped to the second type PRU, the random access preambles on the first type RO continue to be mapped to the second type PRU; Or, the starting point of the first type RO mapping to the second type PRU is the same as the starting point of the second type RO mapping to the second type PRU.

6. The method of claim 5, wherein, The random access preambles on the first type RO continue to be mapped to the second type PRU, comprising: The random access preambles on the first type RO start to be mapped from a PRU after a third PRU, the third PRU being a second type PRU on which the last random access preamble on the second type RO is mapped; or The random access preambles on the first type RO start to be mapped from a third PRU.

7. The method of claim 6, wherein, The random access preambles on the first type RO start to be mapped from a third PRU, comprising: In the case that the third PRU has mapped a random access preamble on the second type RO, the random access preambles on the first type RO start to be mapped from the third PRU, and X1-a random access preambles on the first type RO are mapped on the third PRU, a≤X1.

8. The method of claim 1, wherein, The first type RO in the first type time slot is associated with a first type PRU set, the second type RO in the first type time slot is associated with a second type PRU set, the first type PRU set and the second type PRU set are two different PRU sets, and the mapping rule of the PRACH time slot and the PRU set comprises: For the first type RO, the first type RO is only mapped to the first type PRU; For the second type RO, the second type RO is only mapped to the second type PRU.

9. The method according to any one of claims 1 to 8, characterized in that, The number of random access preambles on the second type RO that each second type PRU can map is X1, which is determined according to the number of valid second type ROs within a first association mode period, the number of random access preambles within each valid second type RO, and the number of valid second type PRUs.

10. The method of claim 9, wherein, The wherein R1 is equal to the number of all valid second type ROs within the first associated pattern period multiplied by the number of random access preambles within each valid second type RO, and P1 is equal to the number of all valid second type PRUs within the first associated pattern period.

11. The method according to any one of claims 1 to 10, characterized in that, The number of random access preambles on the first type RO that each first type PRU can map is X2, which is determined according to the number of valid first type ROs within a second association mode period, the number of random access preambles within each valid first type RO, and the number of valid first type PRUs.

12. The method of claim 11, wherein, The In case of the first type RO mapping to PRU, R2 is equal to the number of all valid first type ROs in the second association mode period multiplied by the number of random access preambles in each valid first type RO, and P2 is equal to the number of all valid first type PRUs in the second association mode period.

13. The method of claim 12, wherein, The all valid first type PRUs are all valid first type PRUs in a first PRU set and a second PRU set, the first PRU set being a PRU set corresponding to a first type time slot, and the second PRU set being a PRU set corresponding to a second type time slot.

14. The method of claim 11, wherein, The In the case that the first type RO is not mapped to the PRU, R2 is equal to the number of valid first type ROs in all second type time slots within the second association mode period multiplied by the number of random access preambles within each valid first type RO, and P2 is equal to the number of valid first type PRUs in the PRU set corresponding to all the second type time slots within the second association mode period.

15. A method of communication, comprising: The method is applied to a network device, and the method comprises: Receiving a random access preamble at a first random access occasion (RO), the random access preamble being used for two-step random access; In a case that the first RO is a first type RO, a payload is received at a first physical uplink shared channel resource unit (PRU), the first PRU being a first type PRU or a second type PRU; In a case that the first RO is a second type RO, a payload is received at a second PRU, the second PRU being a second type PRU, the first PRU and the second PRU being determined based on a mapping rule of a PRACH time slot and a PRU set; The first type RO is a newly added RO in sub-band full-duplex communication, the second type RO is an original RO in time-division duplex communication, the first type PRU is a newly added PRU in sub-band full-duplex communication, and the second type PRU is an original PRU in time-division duplex communication.

16. The method of claim 15, wherein, The mapping rule of the PRACH time slot and the PRU set comprises: For the first type RO in a first type time slot, the first type RO is mapped to the first type PRU and the second type PRU, and the mapping order of the second type PRU is in front, after the random access preamble on the second type PRU has been completely mapped, the random access preamble on the first type RO continues to be mapped to the first type PRU; or, the first type RO is only mapped to the first type PRU; or, the first type RO is not mapped to a PRU; For the first type RO in a second type time slot, the first type RO is only mapped to the first type PRU; For the second type RO, the second type RO is only mapped to the second type PRU; The first type time slot comprises the first type RO and the second type RO, and the second type time slot comprises the first type RO.

17. The method of claim 16, wherein, For the first type RO in a first type time slot, if the first type RO is only mapped to the first type PRU, the mapping rule of the PRACH time slot and the PRU set further comprises: In a case that the first PRU set comprises the first type PRU, the first type RO is mapped to the first type PRU in the first PRU set, the first PRU set being a PRU set corresponding to the first type time slot; In a case that the first PRU set does not comprise the first type PRU, the first type RO is not mapped to a PRU, or the first type RO is mapped to the first type PRU in a second PRU set, the second PRU set being a PRU set corresponding to the second type time slot.

18. The method of claim 17, wherein, The first type RO is mapped to the first type PRU in the second PRU set, comprising: The first type RO is mapped to the first type PRU in a target PRU set in a plurality of the second PRU sets, a first time slot of the target PRU set being located before the first PRU set and being spaced apart from a time slot of the first PRU set by a minimum interval.

19. The method of claim 16, wherein, For the first type RO being mapped to the second type PRU, comprising: After the random access preamble on the second type RO has been completely mapped to the second type PRU, the random access preamble on the first type RO continues to be mapped to the second type PRU; Or, the starting point of the first type RO mapping to the second type PRU is the same as the starting point of the second type RO mapping to the second type PRU.

20. The method of claim 19, wherein, The random access preamble on the first type RO continues to map to the second type PRU, including: The random access preamble on the first type RO starts to map from the PRU after the third PRU, and the third PRU is the last second type PRU to which the random access preamble on the second type RO is mapped; or The random access preamble on the first type RO starts to map from the third PRU.

21. The method of claim 20, wherein, The random access preamble on the first type RO starts to map from the third PRU, including: In the case that the third PRU maps a random access preamble on the second type RO, the random access preamble on the first type RO starts to map from the third PRU, and at most X1-a random access preambles on the first type RO are mapped on the third PRU, a≤X1.

22. The method of claim 15, wherein, The first type RO in the first type time slot is associated with a first type PRU set, and the second type RO in the first type time slot is associated with a second type PRU set, the time slot positions of the first type PRU set and the second type PRU set are different, and the mapping rule of the PRACH time slot and the PRU set includes: For the first type RO, the first type RO is only mapped to the first type PRU; For the second type RO, the second type RO is only mapped to the second type PRU.

23. The method of any one of claims 15-22, wherein, The number of random access preambles on the second type RO that each second type PRU can map is X1, which is determined according to the number of valid second type ROs in a first association mode period, the number of random access preambles in each valid second type RO, and the number of valid second type PRUs.

24. The method of claim 23, wherein, The wherein R1 is equal to the number of all valid second type ROs within the first association mode period multiplied by the number of random access preambles within each valid second type RO, and P1 is equal to the number of all valid second type PRUs within the first association mode period.

25. The method of any one of claims 15-24, wherein, The number of random access preambles on the first type RO that each first type PRU can map is X2, which is determined according to the number of valid first type ROs in a second association mode period, the number of random access preambles in each valid first type RO, and the number of valid first type PRUs.

26. The method of claim 25, wherein, The In case of the first type RO mapping to PRU, R2 is equal to the number of all valid first type ROs in the second association mode period multiplied by the number of random access preambles in each valid first type RO, and P2 is equal to the number of all valid first type PRUs in the second association mode period.

27. The method of claim 26, wherein, All valid first type PRUs are all valid first type PRUs in a first PRU set and a second PRU set, the first PRU set is a PRU set corresponding to the first type time slot, and the second PRU set is a PRU set corresponding to the second type time slot.

28. The method of claim 25, wherein, In the case that the first type ROs are not mapped to PRUs, R2 is equal to the number of valid first type ROs in all second type time slots in the second associated mode period multiplied by the number of random access preambles in each valid first type RO, and P2 is equal to the number of valid first type PRUs in the PRU set corresponding to all the second type time slots in the second associated mode period.

29. A communications device, comprising: Including: The processor is coupled with the memory, and the memory is used to store programs or instructions, which are executed by the processor to make the communication device execute the method in any one of claims 1-14 or the method in any one of claims 15-28.

30. A communications device, characterized by The processor and the interface are included, and the interface is used to send and / or receive signals, so that the processor executes the method in any one of claims 1-14 or the method in any one of claims15-28.

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