Semiconductor device and method for manufacturing semiconductor device

WO2026167508A1PCT designated stage Publication Date: 2026-08-13SEMICON ENERGY LAB CO LTD
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Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Filing Date
2026-01-30
Publication Date
2026-08-13

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Abstract

Provided is a new semiconductor device. This semiconductor device comprises an oxide semiconductor layer, a first conductive layer, a first insulating layer, a second insulating layer, and a first oxygen block layer. The oxide semiconductor layer has a first portion in contact with the first insulating layer and in contact with the second insulating layer, and a second portion in contact with the first conductive layer and in contact with the first oxygen block layer. The first oxygen block layer is provided between the second insulating layer and the second portion. The material of the first oxygen block layer has an oxygen diffusion coefficient that is less than that of at least one of the material of the second insulating layer and the material of the oxide semiconductor layer.
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Description

Semiconductor Device and Method of Manufacturing the Same

[0001] One aspect of the present invention relates to a semiconductor device and a method of manufacturing the same. One aspect of the present invention relates to a transistor and a method of manufacturing the same. One aspect of the present invention relates to a semiconductor device having a transistor.

[0002] Note that one aspect of the present invention is not limited to the above technical field. Examples of the technical field of one aspect of the present invention include a semiconductor device, a display device, a light-emitting device, a power storage device, a storage device, an electronic device, a lighting device, an input device (e.g., a touch sensor), an input / output device (e.g., a touch panel), a driving method thereof, or a manufacturing method thereof.

[0003] In the present specification and the like, a semiconductor device is a device that utilizes semiconductor characteristics, and refers to a semiconductor element (such as a transistor, a diode, a photodiode, etc.), a circuit including the semiconductor element, a device having the circuit, and the like. It also refers to all devices that can function by utilizing semiconductor characteristics. For example, an integrated circuit, a chip provided with an integrated circuit, and an electronic component in which a chip is housed in a package are examples of semiconductor devices. In addition, a storage device, a display device, a light-emitting device, a lighting device, and an electronic device are semiconductor devices themselves and may each have a semiconductor device.

[0004] In recent years, high-definition display devices have been demanded. As devices that require high-definition display devices, for example, devices for virtual reality (VR: Virtual Reality), augmented reality (AR: Augmented Reality), substitutional reality (SR: Substitutional Reality), and mixed reality (MR: Mixed Reality) have been actively developed.

[0005] Examples of display devices include a display device having a liquid crystal element and a display device having a light-emitting element (also referred to as a light-emitting device). Examples of light-emitting elements include an organic EL (Electro Luminescence) element and a light-emitting diode (LED: Light Emitting Diode). Patent Document 1 discloses a high-definition display device using an organic EL element.

[0006] Technologies related to transistors using semiconductor thin films have been attracting attention. Such transistors are widely applied to electronic devices such as integrated circuits (ICs) and display devices. Silicon-based semiconductor materials are widely known as semiconductor materials applicable to transistors, but oxide semiconductors are attracting attention as other materials.

[0007] International Publication No. 2016 / 038508

[0008] In a transistor using an oxide semiconductor as a semiconductor material, there is a problem that the contact resistance (contact resistance) between a source electrode or a drain electrode and an oxide semiconductor layer provided above the source electrode or the drain electrode may increase, become parasitic resistance, and deteriorate the characteristics of the transistor.

[0009] One aspect of the present invention is to provide a semiconductor device having a transistor with a large on-current as one of the problems. Or, to provide a semiconductor device having a transistor with a high field-effect mobility as one of the problems. Or, to provide a semiconductor device having a transistor with a fine size as one of the problems. Or, to provide a semiconductor device having a transistor with a short channel length as one of the problems. Or, to provide a semiconductor device having a transistor with good electrical characteristics as one of the problems. Or, to provide a semiconductor device that operates at high speed as one of the problems. Or, to provide a semiconductor device with a small occupied area as one of the problems. Or, to provide a semiconductor device with low wiring resistance as one of the problems. Or, to provide a semiconductor device or a display device with low power consumption as one of the problems. Or, to provide a highly reliable transistor, semiconductor device, or display device as one of the problems. Or, to provide a high-definition display device as one of the problems. Or, to provide a method for manufacturing the aforementioned transistor, semiconductor device, or display device as one of the problems. Or, to provide a method for manufacturing a highly productive transistor, semiconductor device, or display device as one of the problems. Or, to provide a novel transistor, semiconductor device, display device, or a method for manufacturing these as one of the problems.

[0010] Furthermore, the description of these problems does not preclude the existence of other problems. One aspect of the present invention does not necessarily have to solve all of these problems. It is possible to extract other problems from the description in the specification, drawings, and claims.

[0011] One aspect of the present invention is a semiconductor device having an oxide semiconductor layer, a first conductive layer, a first insulating layer, a second insulating layer, and a first oxygen blocking layer. The oxide semiconductor layer has a first portion that is in contact with the first insulating layer and the second insulating layer, and a second portion that is in contact with the first conductive layer and the first oxygen blocking layer. The first oxygen blocking layer is provided between the second insulating layer and the second portion. The material of the first oxygen blocking layer is a material having a smaller oxygen diffusion coefficient than at least one of the material of the second insulating layer and the material of the oxide semiconductor layer.

[0012] One aspect of the present invention is a semiconductor device having an oxide semiconductor layer, a first conductive layer, a first insulating layer, a second insulating layer, and a first oxygen blocking layer. The first insulating layer has a portion provided above the first conductive layer. The oxide semiconductor layer has a first portion that is in contact with the side surface of the first insulating layer and in contact with the second insulating layer, and a second portion that is in contact with the first conductive layer and in contact with the first oxygen blocking layer. The first oxygen blocking layer is provided between the second insulating layer and the second portion. The material of the first oxygen blocking layer is a material having a smaller oxygen diffusion coefficient than at least one of the material of the second insulating layer and the material of the oxide semiconductor layer.

[0013] One aspect of the present invention is a semiconductor device comprising an oxide semiconductor layer, a first conductive layer, a second conductive layer, a first insulating layer, a second insulating layer, a first oxygen block layer, and a second oxygen block layer. The first insulating layer has a portion provided above the first conductive layer. The second conductive layer has a portion provided above the first insulating layer. The oxide semiconductor layer has a first portion in contact with the side surface of the first insulating layer and in contact with the second insulating layer, a second portion in contact with the first conductive layer and in contact with the first oxygen block layer, and a third portion in contact with the second conductive layer and in contact with the second oxygen block layer. The first oxygen block layer is provided between the second insulating layer and the second portion. The second oxygen block layer is provided between the second insulating layer and the third portion. The material for the first oxygen-blocking layer and the material for the second oxygen-blocking layer are each materials having a smaller oxygen diffusion coefficient than at least one of the material for the second insulating layer and the material for the oxide semiconductor layer.

[0014] One aspect of the present invention is a semiconductor device comprising an oxide semiconductor layer, a first conductive layer, a second conductive layer, a first insulating layer, a second insulating layer, a first oxygen block layer, and a second oxygen block layer. The first insulating layer has a portion provided above the first conductive layer. The second conductive layer has a portion provided above the first insulating layer. The first insulating layer and the second conductive layer have an opening that reaches the first conductive layer. The oxide semiconductor layer has a first portion that is in contact with the side surface of the first insulating layer and the second insulating layer at the opening, a second portion that is in contact with the upper surface of the first conductive layer and the first oxygen block layer at the opening, and a third portion that is in contact with the second conductive layer and the second oxygen block layer. The first oxygen block layer is provided between the second insulating layer and the second portion. The second oxygen block layer is provided between the second insulating layer and the third portion. The material for the first oxygen-blocking layer and the material for the second oxygen-blocking layer are each materials having a smaller oxygen diffusion coefficient than at least one of the material for the second insulating layer and the material for the oxide semiconductor layer.

[0015] In the aforementioned semiconductor device, the second insulating layer preferably contains oxygen and silicon.

[0016] One aspect of the present invention is a semiconductor device comprising an oxide semiconductor layer, a first conductive layer, a second conductive layer, a first insulating layer, a second insulating layer, a first oxygen block layer, and a second oxygen block layer. The first insulating layer has a portion provided above the first conductive layer. The second conductive layer has a portion provided above the first insulating layer. The first insulating layer has a slit portion reaching the first conductive layer. The oxide semiconductor layer has a first portion that is in contact with the side surface of the first insulating layer and the second insulating layer at the slit portion, a second portion that is in contact with the upper surface of the first conductive layer and the first oxygen block layer at the slit portion, and a third portion that is in contact with the second conductive layer and the second oxygen block layer. The first oxygen block layer is provided between the second insulating layer and the second portion. The second oxygen block layer is provided between the second insulating layer and the third portion. The material for the first oxygen-blocking layer and the material for the second oxygen-blocking layer are each materials having a smaller oxygen diffusion coefficient than at least one of the material for the second insulating layer and the material for the oxide semiconductor layer.

[0017] In the aforementioned semiconductor device, it is preferable to have a second oxide semiconductor layer in the slit portion. The oxide semiconductor layer has a channel formation region for the first transistor, and the second oxide semiconductor layer has a channel formation region for the second transistor.

[0018] One aspect of the present invention is a semiconductor device comprising an oxide semiconductor layer, a first conductive layer, a second conductive layer, a first insulating layer, a second insulating layer, a first oxygen block layer, and a second oxygen block layer. The first insulating layer has a portion provided above the first conductive layer. The second conductive layer has a portion provided above the first insulating layer. The upper surface shape of the second conductive layer is consistent with or substantially consistent with the upper surface shape of the first insulating layer. The oxide semiconductor layer has a first portion in contact with the side surface of the first insulating layer and the second insulating layer, a second portion in contact with the upper surface of the first conductive layer and the first oxygen block layer, and a third portion in contact with the second conductive layer and the second oxygen block layer. The first oxygen block layer is provided between the second insulating layer and the second portion. The second oxygen block layer is provided between the second insulating layer and the third portion. The material for the first oxygen-blocking layer and the material for the second oxygen-blocking layer are each materials having a smaller oxygen diffusion coefficient than at least one of the material for the second insulating layer and the material for the oxide semiconductor layer.

[0019] In the semiconductor device described above, it is preferable that a portion of the third portion overlaps with a portion of the first portion via a portion of the first insulating layer, or overlaps with a portion of the first portion via a portion of the second conductive layer.

[0020] One aspect of the present invention is a semiconductor device having an oxide semiconductor layer, a first conductive layer, a first insulating layer, a second insulating layer, and a first layer. The first insulating layer has a portion provided above the first conductive layer. The oxide semiconductor layer has a first portion that is in contact with the side surface of the first insulating layer and in contact with the second insulating layer, and a second portion that is in contact with the first conductive layer and in contact with the first layer. The first layer is provided between the second insulating layer and the second portion. The second insulating layer has silicon oxide. The first layer comprises at least one of aluminum, hafnium, molybdenum, tungsten, titanium, aluminum oxide, hafnium oxide, hafnium aluminate, magnesium oxide, gallium oxide, molybdenum oxide, tungsten oxide, titanium oxide, zinc gallium oxide, aluminum nitride, hafnium nitride, magnesium nitride, gallium nitride, molybdenum nitride, tungsten nitride, titanium nitride, silicon nitride, and silicon nitride or indium tin oxide.

[0021] One aspect of the present invention is a semiconductor device having an oxide semiconductor layer, a first conductive layer, a first insulating layer, a second insulating layer, and a first layer. The first insulating layer has a portion provided above the first conductive layer. The oxide semiconductor layer has a first portion that is in contact with the side surface of the first insulating layer and in contact with the second insulating layer, and a second portion that is in contact with the first conductive layer and in contact with the first layer. The first layer is provided between the second insulating layer and the second portion. The first layer is an oxide having the same metal element as the oxide semiconductor layer, and has higher crystallinity than the oxide semiconductor layer.

[0022] One aspect of the present invention is a semiconductor device having an oxide semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, a first insulating layer, and a second insulating layer. The first insulating layer has a portion provided above the first conductive layer. The second conductive layer has a portion provided above the first insulating layer. The oxide semiconductor layer has a first portion that is in contact with the side surface of the first insulating layer and in contact with the second insulating layer, a second portion that is in contact with the first conductive layer and in contact with the third conductive layer, and a third portion that is in contact with the second conductive layer and in contact with the first insulating layer. The third conductive layer is provided between the second insulating layer and the second portion. The second conductive layer is provided between the second insulating layer and the third portion. A part of the third portion overlaps with a part of the first portion via a part of the first insulating layer.

[0023] One aspect of the present invention is a method for manufacturing a semiconductor device, comprising: forming a first conductive layer; forming a first insulating layer above the first conductive layer; forming a second conductive layer above the first insulating layer; forming openings in the second conductive layer and the first insulating layer that reach the first conductive layer; forming an oxide semiconductor layer in contact with the side surface of the first insulating layer, the upper surface of the first conductive layer, and the upper surface of the second conductive layer; forming a first layer above the portion of the oxide semiconductor layer that overlaps with the first conductive layer, and forming a first film above the portion of the oxide semiconductor layer that overlaps with the second conductive layer; processing the first film into a second layer; forming a second insulating layer in contact with the portion of the oxide semiconductor layer facing the side surface of the first insulating layer, in contact with the portion of the first layer that overlaps with the oxide semiconductor layer and the first conductive layer, and in contact with the portion of the second layer that overlaps with the oxide semiconductor layer and the second conductive layer; and performing a heat treatment after forming the second insulating layer. The first layer and the first film are deposited separately by a single sputtering process. The materials of the first layer and the second layer are each materials that have a lower oxygen diffusion coefficient at the heat treatment temperature than at least one of the materials of the second insulating layer and the materials of the oxide semiconductor layer.

[0024] In the aforementioned method for fabricating semiconductor devices, the oxide semiconductor layer is preferably formed by the ALD method.

[0025] In the aforementioned method for manufacturing a semiconductor device, the method for forming the first layer and the first film is preferably a film formation method with greater anisotropy than the method for forming the oxide semiconductor layer.

[0026] One aspect of the present invention can provide a semiconductor device having a transistor with a large on-current. Or, a semiconductor device having a transistor with high field-effect mobility. Or, a semiconductor device having a transistor of a very small size. Or, a semiconductor device having a transistor with a short channel length. Or, a semiconductor device having a transistor with good electrical characteristics. Or, a semiconductor device that operates at high speed. Or, a semiconductor device with a small footprint. Or, a semiconductor device with low wiring resistance. Or, a semiconductor device or display device with low power consumption. Or, a highly reliable transistor, semiconductor device, or display device. Or, a high-definition display device. Or, a method for manufacturing the aforementioned transistor, semiconductor device, or display device. Or, a highly productive method for manufacturing a transistor, semiconductor device, or display device. Or, a novel transistor, semiconductor device, display device, or method for manufacturing them.

[0027] Furthermore, the description of these effects does not preclude the existence of other effects. One aspect of the present invention does not necessarily have to possess all of these effects. Other effects can be extracted from the description, drawings, and claims.

[0028] Figure 1A is a top view showing an example of a semiconductor device. Figures 1B and 1C are cross-sectional views showing an example of a semiconductor device. Figures 2A, 2B, 2C, and 2D are perspective views showing an example of a semiconductor device. Figure 3A is a top view showing an example of a semiconductor device. Figure 3B is a cross-sectional view showing an example of a semiconductor device. Figures 4A and 4B are cross-sectional views showing an example of a semiconductor device. Figures 5A and 5B are cross-sectional views showing an example of a semiconductor device. Figures 6A, 6B, and 6C are cross-sectional views showing an example of a semiconductor device. Figure 7A is a top view showing an example of a semiconductor device. Figures 7B and 7C are cross-sectional views showing an example of a semiconductor device. Figures 8A and 8B are perspective views showing an example of a semiconductor device. Figure 9 is a perspective view showing an example of a semiconductor device. Figure 10 is a top view showing an example of a semiconductor device. Figure 11A is a top view showing an example of a semiconductor device. Figures 11B and 11C are cross-sectional views showing an example of a semiconductor device. Figures 12A, 12B, and 12C are perspective views showing an example of a semiconductor device. Figure 13A is a top view showing an example of a semiconductor device. Figures 13B and 13C are cross-sectional views showing an example of a semiconductor device. Figures 14A, 14B, 14C, 14D, and 14E are cross-sectional views showing an example of a method for manufacturing a semiconductor device. Figures 15A, 15B, 15C, and 15D are cross-sectional views showing an example of a method for manufacturing a semiconductor device. Figures 16A, 16B, 16C, and 16D are cross-sectional views showing an example of a method for manufacturing a semiconductor device. Figure 17A is a perspective view showing an example of a display device. Figure 17B is a block diagram showing an example of a display device. Figures 18A, 18B, 18C, 18D, and 18E are circuit diagrams of pixel circuits. Figures 19A and 19B are circuit diagrams of pixel circuits. Figures 20A and 20B are circuit diagrams of pixel circuits. Figures 21A and 21B are cross-sectional views showing an example of a display device. Figures 22A and 22B are cross-sectional views showing an example of a display device. Figures 23A, 23B, 23C, and 23D show examples of electronic devices. Figures 24A, 24B, 24C, 24D, 24E, and 24F show examples of electronic devices. Figures 25A, 25B, 25C, 25D, 25E, 25F, and 25G show examples of electronic devices.

[0029] Embodiments will be described in detail with reference to the drawings. However, it will be readily apparent to those skilled in the art that the present invention is not limited to the following description, and that its form and details can be modified in various ways without departing from the spirit and scope of the present invention. Accordingly, the present invention shall not be construed as being limited to the descriptions of the embodiments shown below.

[0030] In the configuration of the invention described below, the same reference numerals are used in common across different drawings for parts that are identical or have similar functions, and repeated explanations are omitted. In addition, when referring to similar functions, the hatching patterns are the same, and reference numerals may not be assigned.

[0031] The position, size, and scope of each component shown in the drawings may not represent the actual position, size, and scope for the sake of ease of understanding. Therefore, the disclosed invention is not necessarily limited to the position, size, and scope disclosed in the drawings.

[0032] In this specification, ordinal numbers such as "first," "second," etc., are added to avoid confusion of components and do not limit the number of components or the order of components (e.g., process order or stacking order). Furthermore, even if a term does not have an ordinal number in this specification, an ordinal number may be added in the claims to avoid confusion of components. Even if a term has an ordinal number in this specification, a different ordinal number may be added in the claims. Even if a term has an ordinal number in this specification, an ordinal number may be omitted in the claims.

[0033] In this specification and drawings, when the same reference numeral is used for multiple elements, and especially when it is necessary to distinguish them, the reference numeral may be accompanied by an identifying numeral such as "_1", "[n]", or "[m,n]". Furthermore, when describing a common matter for multiple elements with identifying numerals, or when it is not necessary to distinguish them, the identifying numeral may be omitted.

[0034] In this specification, phrases indicating arrangement such as "above," "below," "upward," or "downward" are sometimes used for convenience to explain the positional relationship between components with reference to the drawings. Furthermore, the positional relationship between components changes as appropriate depending on the direction in which each component is depicted. Therefore, the phrases explained in the specification are not limited to those described and can be appropriately rephrased depending on the situation. For example, the expression "insulator located on the upper surface of the conductor" can be rephrased as "insulator located on the lower surface of the conductor" by rotating the orientation of the drawing shown by 180 degrees.

[0035] Furthermore, the terms "above" and "below" do not limit the positional relationship of the components to being directly above or below each other and in direct contact. For example, the expression "electrode B on insulating layer A" does not require that electrode B be formed in direct contact with insulating layer A, and does not exclude cases where other components are included between insulating layer A and electrode B.

[0036] In this specification, terms such as "overlapping" do not limit the stacking order or other states of the constituent elements. For example, the expression "electrode B overlapping insulating layer A" does not exclude not only the state in which electrode B is formed on top of insulating layer A in a cross-sectional view, but also the state in which electrode B is formed below insulating layer A or the state in which electrode B is formed to the right (or left) of insulating layer A. In this specification, unless otherwise specified, "overlapping" refers to a plan view (plan diagram).

[0037] In this specification, terms such as "film" and "layer" are interchangeable. For example, the term "conductive layer" can be changed to "conductive film." It is also possible to omit terms such as "film" and "layer" and replace them with other terms. For example, the terms "conductive layer" or "conductive film" can be changed to "conductor." Similarly, the term "conductor" can be changed to "conductive layer" or "conductive film." When multiple identical materials (those with the same insulator, semiconductor, or conductor) are stacked, they may be collectively referred to as insulating film, insulating layer, semiconductor film, semiconductor layer, conductive film, conductive layer, etc.

[0038] A transistor is a type of semiconductor device that can perform functions such as amplifying current or voltage, and switching operations that control conduction or non-conductivity. Transistors as used herein include IGFETs (Insulated Gate Field Effect Transistors) and thin-film transistors (TFTs).

[0039] The functions of "source" and "drain" may be reversed when transistors with different polarities are used, or when the direction of current changes during circuit operation. For this reason, in this specification, the terms "source" and "drain" may be used interchangeably. The names of the source and drain of a transistor can also be rephrased as source terminal and drain terminal, or source electrode and drain electrode, etc.

[0040] The terms "gate" and "back gate" are interchangeable. Therefore, in this specification, the terms "gate" and "back gate" may be used interchangeably. Furthermore, the terms "gate" and "back gate" of a transistor can be rephrased as "gate electrode" and "back gate electrode," etc.

[0041] Furthermore, in this specification, "electrically connected" includes cases where a connection is made via "something that has some kind of electrical function." Here, "something that has some kind of electrical function" is not particularly limited as long as it enables the exchange of electrical signals between the connected objects. For example, "something that has some kind of electrical function" includes electrodes or wiring, switching elements such as transistors, resistive elements, coils, and other elements with various functions.

[0042] In this specification, cases where two nodes are connected via an insulator, such as the dielectric of a capacitive element, the gate insulating film of a transistor, or an interlayer insulating film, are not included in the definition of "electrical connection."

[0043] In this specification, unless otherwise specified, on-current refers to the drain current (also called the conduction state) when the transistor is in the on state. Unless otherwise specified, the on state refers to the state in an n-channel transistor where the voltage between the gate and source (also called Vg or Vgs) is equal to or greater than the threshold voltage (also called Vth), and to the state in a p-channel transistor where it is less than or equal to the threshold voltage.

[0044] In this specification, unless otherwise specified, off-current refers to the source-drain leakage current when the transistor is in the off state (also called the non-conducting state or cutoff state). Unless otherwise specified, the off state refers to the state in an n-channel transistor where the voltage between the gate and source is lower than the threshold voltage, and in a p-channel transistor where it is higher than the threshold voltage. Cutoff current refers to the leakage current when the potential difference between the source and gate is 0V. The current flowing between the gate and source or between the gate and drain is called gate leakage current.

[0045] In this specification, "approximately parallel" or "roughly parallel" means a state in which two lines are arranged in a relationship that is close to "parallel," and the two lines are arranged at an angle of -15° or more and 15° or less, preferably at an angle of -10° or more and 10° or less, and more preferably at an angle of -5° or more and 5° or less. Also, "approximately perpendicular" or "roughly perpendicular" means a state in which two lines are arranged in a relationship that is close to "perpendicular," and the two lines are arranged at an angle of 60° or more and 120° or less, preferably at an angle of 80° or more and 100° or less, and more preferably at an angle of 85° or more and 95° or less.

[0046] In this specification, the top surface shape of a component refers to the contour shape of the component when viewed from above (also called a plan view). Furthermore, a top view refers to viewing from the direction normal to the surface on which the component is formed, or to the surface of the support (e.g., substrate) on which the component is formed.

[0047] In this specification, "matching or roughly matching top shapes" means that at least a portion of the contours overlap between stacked layers. For example, this includes cases where the upper and lower layers are processed with the same mask pattern, or partially with the same mask pattern. However, strictly speaking, the contours may not overlap, and the upper layer may be located inside the lower layer, or the upper layer may be located outside the lower layer; in this case, it may also be said that the "matching or roughly matching top shapes" apply. Furthermore, when the top shapes match or roughly match, it can also be said that the "edges match or roughly match," or "the edges are aligned or roughly aligned."

[0048] In this specification, a tapered shape refers to a shape in which at least a portion of the side surface of a structure is inclined with respect to the substrate surface or the surface to be formed. The angle formed between the inclined side surface and the substrate surface or the surface to be formed may be called the taper angle.

[0049] In this specification, "step breakage" refers to the phenomenon in which a layer, film, or electrode is divided due to the shape of the surface on which it is formed (e.g., a step).

[0050] In this specification, "island-like" refers to a state in which two or more layers made of the same material and formed in the same process are physically separated. For example, an island-like metal oxide layer refers to a state in which the metal oxide layer and adjacent metal oxide layers are physically separated.

[0051] In this specification, devices manufactured using a metal mask or FMM (Fine Metal Mask, high-resolution metal mask) may be referred to as MM (metal mask) structured devices. Furthermore, in this specification, devices manufactured without using a metal mask or FMM may be referred to as MML (metal maskless) structured devices. Since MML structured devices can be manufactured without using a metal mask, they can exceed the upper limit of resolution imposed by the alignment accuracy of the metal mask. Additionally, MML structured devices eliminate the need for equipment and metal mask cleaning processes associated with metal mask manufacturing. Moreover, MML structured devices are suitable for mass production because their manufacturing costs can be kept low.

[0052] In this specification, a structure in which different light-emitting layers are created using light-emitting elements (light-emitting devices) with different emission wavelengths is sometimes referred to as an SBS (Side By Side) structure. Because the SBS structure allows for the optimization of materials and configurations for each light-emitting element, it broadens the range of material and configuration choices, making it easier to improve brightness and reliability.

[0053] In this specification, when we refer to count values ​​and measured values ​​as "identical," "same," "equal," or "uniform" (including synonyms), we mean when the difference between two numerical values ​​is within the range of measurement error dependent on the measuring device and its measurement method, or when the statistical error is within 3σ. Furthermore, when we use expressions such as "approximately identical" or "roughly identical," unless otherwise explicitly stated, this includes cases where the difference between two numerical values ​​is within 10% or less of the value with the larger absolute value.

[0054] In this specification, "different materials" refers to materials in which some or all of the constituent elements are different, or materials in which the constituent elements are the same but the composition is different. "Same materials" refers to materials in which the constituent elements are the same and the composition is also the same. In this specification, unless otherwise specified, "composition" refers to the proportion of constituent elements contained in the material.

[0055] (Embodiment 1) In this embodiment, a semiconductor device according to one aspect of the present invention will be described with reference to Figures 1 to 16. The semiconductor device according to one aspect of the present invention can be suitably used, for example, in one or both of the pixel circuit and the drive circuit of a display device.

[0056] One aspect of the present invention relates to the contact resistance between a source electrode or drain electrode and an oxide semiconductor layer provided above the source electrode or drain electrode in a transistor using an oxide semiconductor as the semiconductor material. A configuration in which the oxide semiconductor layer is in contact with the source electrode or drain electrode provided below the oxide semiconductor layer is hereinafter referred to as a bottom contact structure. Oxide semiconductor layers used in transistors undergo oxygenation treatment to control carrier concentration. In the case of a bottom contact structure, oxygen diffuses from the upper surface of the oxide semiconductor layer into the oxide semiconductor layer, reaching the interface between the oxide semiconductor layer and the source electrode or drain electrode. This increases the contact resistance between the oxide semiconductor layer and the source electrode or drain electrode, resulting in parasitic resistance and potentially degrading the characteristics of the transistor. One aspect of the present invention involves placing an oxygen-blocking layer above the oxide semiconductor layer to block oxygen diffusion, thereby suppressing the diffusion of oxygen into the oxide semiconductor layer, which can suppress the increase in contact resistance and enable the realization of a transistor with a large on-current.

[0057] Figure 4A shows a cross-sectional view of a part of the bottom contact structure. An insulating layer 110 and a conductive layer 112 are provided on the substrate 102. An oxide semiconductor layer 108 is provided above the insulating layer 110 and the conductive layer 112. An oxygen blocking layer 301 is provided above the portion of the oxide semiconductor layer 108 that is in contact with the conductive layer 112, and an insulating layer 106 is provided above the oxide semiconductor layer 108 and the oxygen blocking layer 301. The oxide semiconductor layer 108 has a first portion 401 sandwiched between the insulating layer 110 and the insulating layer 106. This first portion 401 can function as a channel formation region of the transistor. The oxide semiconductor layer 108 also has a second portion 402 that is in contact with the conductive layer 112. This second portion 402 functions as a so-called source region or drain region. Above the second portion 402, there is an oxygen blocking layer 301 between the oxide semiconductor layer 108 and the insulating layer 106.

[0058] The oxygen blocking layer 301 uses a material that is less permeable to oxygen than at least one of the insulating layer 106 and the oxide semiconductor layer 108. By providing the oxygen blocking layer 301 above the second portion, the diffusion of oxygen into the oxide semiconductor layer 108 can be suppressed.

[0059] Furthermore, since there is no oxygen blocking layer 301 between the first portion 401 and the insulating layer 106, sufficient oxygenation is achieved, making it possible to reduce the carrier concentration in the first portion 401.

[0060] Below, we will explain more specific configuration examples with reference to the drawings.

[0061] <Configuration Example 1> Figure 1A shows a top view (also called a plan view) of the semiconductor device 10. Figure 1B shows a cross-sectional view of the cross-section along the dashed line A1-A2 shown in Figure 1A, and Figure 1C shows a cross-sectional view of the cross-section along the dashed line B1-B2. Note that in Figure 1A, some of the components of the semiconductor device 10 (such as the gate insulating layer) are omitted. In the top view of the semiconductor device, as in Figure 1A, some of the components are omitted in the following drawings as well. Figures 2A to 2D show perspective views of the semiconductor device 10. Figure 2B shows a cross-section along the dashed line C1-C2 shown in Figure 2A. In Figure 2C, the insulating layer shown in Figure 2A is made transparent, and the outline is shown with a dashed line. Similarly, in Figure 2D, the insulating layer shown in Figure 2B is made transparent, and the outline is shown with a dashed line.

[0062] The semiconductor device 10 includes a transistor 100 and an insulating layer 110. The transistor 100 is provided on the insulating surface. Figure 1B and other figures show a configuration in which the transistor 100 is provided on a substrate 102 having an insulating surface. Alternatively, an insulating layer can be provided on the substrate 102, and the transistor 100 can be provided on the insulating layer.

[0063] The transistor 100 is composed of a part of a conductive layer 104, a part of an insulating layer 106, a part of an oxide semiconductor layer 108, a part of a conductive layer 112a, and a part of a conductive layer 112b. The conductive layer 104 has a portion that functions as a gate electrode. A part of the insulating layer 106 has a portion that functions as a gate insulating layer. The conductive layer 112a has a portion that functions as one of the source electrode and the drain electrode, and the conductive layer 112b has a portion that functions as the other. In the oxide semiconductor layer 108, the portion that is in contact with the source electrode and the portion that is in contact with the drain electrode has a portion that faces the gate electrode (part of the conductive layer 104) via the gate insulating layer (part of the insulating layer 106) that functions as a channel formation region. In addition, the portion of the oxide semiconductor layer 108 that is in contact with the source electrode functions as a source region, and the portion that is in contact with the drain electrode functions as a drain region. In the oxide semiconductor layer 108, the channel formation region is located between the source region and the drain region.

[0064] A conductive layer 112a is provided on the substrate 102, an insulating layer 110 is provided so as to have a portion above the conductive layer 112a, and a conductive layer 112b is provided so as to have a portion above the insulating layer 110. The insulating layer 110 is in contact with the conductive layers 112a and 112b and has a portion sandwiched between them. The conductive layer 112a may have a portion that overlaps with the conductive layer 112b via the insulating layer 110. The insulating layer 110 and the conductive layer 112b have an opening 141 that reaches the conductive layer 112a. It can also be said that the conductive layer 112a is exposed at the opening 141.

[0065] The oxide semiconductor layer 108 is provided so as to cover the inner wall of the opening 141. The oxide semiconductor layer 108 has portions that contact the upper surface of the conductive layer 112a, the side surface of the insulating layer 110, and the side surface of the conductive layer 112b at the opening 141. Furthermore, the oxide semiconductor layer 108 has portions that contact the upper surface of the conductive layer 112b. That is, the oxide semiconductor layer 108 has a cross-sectional shape that conforms to the shape of the upper and side surfaces of the conductive layer 112b, the side surface of the insulating layer 110, and the upper surface of the conductive layer 112a (Figures 1B and 1C).

[0066] Oxygen block layers 301 and 302 are provided above the upper surface of the oxide semiconductor layer 108, parallel or substantially parallel to the upper surface of the substrate 102. Oxygen block layer 301 is in contact with the oxide semiconductor layer 108 and is provided to face the conductive layer 112a via the oxide semiconductor layer 108. Oxygen block layer 302 is in contact with the oxide semiconductor layer 108 and is provided to have a portion facing the upper surface of the conductive layer 112b via the oxide semiconductor layer 108. Oxygen block layers 301 and 302 may be considered as part of the configuration of the transistor 100, or they may be considered as part of the semiconductor device 10 as a separate configuration from the transistor 100.

[0067] The insulating layer 106 is provided so as to cover the inner wall of the opening 141. The insulating layer 106 is provided on the oxygen block layer 301, the oxygen block layer 302, the oxide semiconductor layer 108, the conductive layer 112b, and the insulating layer 110. The insulating layer 106 has portions that are in contact with the upper surface of the oxygen block layer 301, the upper and side surfaces of the oxygen block layer 302, the upper and side surfaces of the oxide semiconductor layer 108, the upper and side surfaces of the conductive layer 112b, and the upper surface of the insulating layer 110. The insulating layer 106 has a cross-sectional shape that conforms to the shape of the upper surface of the insulating layer 110, the upper and side surfaces of the conductive layer 112b, the upper and side surfaces of the oxide semiconductor layer 108, the upper and side surfaces of the oxygen block layer 302, and the upper surface of the oxygen block layer 301 (Figures 1B and 1C).

[0068] The conductive layer 104 is provided so as to cover the inner wall of the opening 141. The conductive layer 104 is provided on the insulating layer 106. The conductive layer 104 has a portion facing the oxygen block layer 301 via the insulating layer 106, a portion facing the oxygen block layer 302 via the insulating layer 106, and a portion facing the oxide semiconductor layer 108 via the insulating layer 106.

[0069] In transistor 100, the source electrode and drain electrode are positioned at different heights relative to the surface of the substrate 102, which is the surface to be formed, and the drain current flows perpendicular to, or approximately perpendicular to, the surface of the substrate 102. In transistor 100, it can also be said that the drain current flows in the vertical direction. Therefore, a transistor according to one aspect of the present invention can also be called a VFET (Vertical Field Effect Transistor), vertical transistor, vertical channel transistor, or vertical channel type transistor. Furthermore, the conductive layer 112a can be called the lower electrode of the transistor, and the conductive layer 112b can be called the upper electrode. Since the source electrode, oxide semiconductor layer, and drain electrode can be stacked in a VFET, the occupied area can be significantly reduced compared to a so-called planar type transistor in which the oxide semiconductor layer is arranged in a planar manner.

[0070] The conductive layers 112a, 112b, and 104 can each function as wiring, and the transistor 100 can be placed in the region where these wirings overlap. In other words, in a circuit having the transistor 100 and wiring, the area occupied by the transistor 100 and wiring can be reduced. Therefore, the area occupied by the circuit can be reduced, resulting in a compact semiconductor device. Furthermore, when the semiconductor device is applied to the pixel circuit of a display device, the area occupied by the pixel circuit can be reduced, resulting in a high-definition display device. Also, for example, when the semiconductor device according to one aspect of the present invention is applied to the drive circuit of a display device (for example, one or both of a gate line drive circuit and a source line drive circuit), the area occupied by the drive circuit can be reduced, resulting in a narrow-bezel display device.

[0071] The oxide semiconductor layer 108 preferably uses a metal oxide exhibiting semiconductor properties (also called an oxide semiconductor (OS)). Transistors using oxide semiconductors (hereinafter referred to as OS transistors) have extremely high field-effect mobility compared to transistors using amorphous silicon. Furthermore, OS transistors can be formed at lower temperatures compared to transistors using polycrystalline silicon, making them easier to manufacture. In addition, OS transistors have significantly lower off-currents compared to silicon transistors, and can retain the charge stored in a capacitor connected in series with the transistor for a long period of time. Moreover, by applying OS transistors, the power consumption of semiconductor devices can be reduced.

[0072] [Oxide Semiconductor Layer 108] The oxide semiconductor layer 108 preferably contains indium and oxygen. The oxide semiconductor layer 108 preferably contains indium oxide (also written as indium oxide, In-O, or IO). By using an oxide semiconductor with a high indium content as the semiconductor layer of the transistor, a transistor with high field-effect mobility can be made. Therefore, a transistor with a large on-current can be made. It is preferable to use a polycrystalline indium oxide film as the oxide semiconductor layer 108, and it is more preferable to use an indium oxide film that does not have or does not show grain boundaries in the channel formation region in cross-sectional TEM observation. In the case of a transistor to which a polycrystalline film is applied, if the channel formation region does not have or does not show grain boundaries in cross-sectional TEM observation, the channel formation region is located within the single-crystal region contained in the polycrystalline film, and therefore it can be considered a transistor to which a single-crystal film is applied.

[0073] Furthermore, it is preferable that the oxide semiconductor layer 108 has crystallinity. That is, it is preferable that the oxide semiconductor layer 108 has crystal grains. Examples of films having crystal grains include polycrystalline films and amorphous films containing crystal grains. Using a crystalline oxide semiconductor for the oxide semiconductor layer 108 is preferable because it can suppress the deterioration of transistor characteristics. The crystallinity of the oxide semiconductor layer 108 is preferably high, and it is more preferable to use a polycrystalline film or a film that does not have crystal grain boundaries in the channel formation region, or in which crystal grain boundaries are not observed. Crystallinity can be evaluated by the grain size of the crystal grains or the ratio of crystals to amorphous material. A oxide semiconductor layer 108 with a large grain size of crystal grains is said to have high crystallinity. Alternatively, a oxide semiconductor layer 108 with a large ratio of crystals to amorphous material is said to have high crystallinity.

[0074] Polycrystalline indium oxide films can reduce impurity scattering compared to microcrystalline and amorphous films, resulting in transistors with high field-effect mobility. When a polycrystalline film is used for the oxide semiconductor layer 108, it is preferable that the grain size of the crystals contained in the oxide semiconductor layer 108 is large. By using a polycrystalline film with large grain size, the number of crystal grain boundaries located in the channel formation region can be reduced, and the length of the crystal grain boundaries located in the channel formation region can be shortened, resulting in transistors with high field-effect mobility. Furthermore, it is preferable to have a small number of crystal grain boundaries that intersect with the direction of drain current flow (also known as the channel length direction) in the channel formation region. By reducing the number of crystal grain boundaries that span the current path between the source region and the drain region, transistors with high field-effect mobility can be achieved. Note that even with a polycrystalline film, if no crystal grain boundaries are located in the channel formation region in cross-sectional TEM observation, the channel formation region is located within the single-crystal region contained in the polycrystalline film, thus achieving the same effect as when a single-crystal film is applied to the semiconductor layer. In the channel formation region, crystal grains, grain boundaries, crystal axes, and crystal orientation can be confirmed by cross-sectional observation including the semiconductor layer, source electrode, and drain electrode.

[0075] The crystallinity of the oxide semiconductor layer 108 can be analyzed, for example, by X-ray diffraction (XRD), transmission electron microscopy (TEM), or electron diffraction (ED). Alternatively, a combination of these methods can be used for the analysis.

[0076] The crystal grains contained in the oxide semiconductor layer 108 can be identified, for example, by transmission electron microscopy, scanning transmission electron microscopy (STEM), or electron backscatter diffraction (EBSD or EBSP). Alternatively, a combination of these methods can be used for analysis. Crystal grain boundaries can sometimes be identified, for example, by high-resolution TEM. In other words, crystal grains and crystal grain boundaries can sometimes be identified in high-resolution TEM images. The magnification for TEM observation is preferably 2 million times or more, and more preferably 4 million times or more. As the grain size of the crystal grains, for example, the average value of the grain sizes of multiple crystal grains can be used. Also, the grain size of the crystal grains can be defined, for example, as the diameter of a circle with the same area as the crystal grain in a cross-sectional TEM observation image. The diameter at this time is sometimes called the equivalent diameter of a circle. Furthermore, if the number of crystal grains exceeds the thickness of the oxide semiconductor layer 108, the maximum value of the grain size can be used as the grain size of that crystal grain.

[0077] The crystal grains contained in the oxide semiconductor layer 108 can be observed, for example, with an optical microscope or a scanning electron microscope (SEM). Furthermore, by creating surface irregularities on the oxide semiconductor layer 108 using etchants with different etching rates depending on the crystal plane or crystallinity, the crystal grains can be more easily observed with an optical microscope or a scanning electron microscope (SEM). When an indium oxide film is used as the oxide semiconductor layer 108, the crystal grains of indium oxide can be more easily observed by using an etchant containing an acid. For example, one or more of phosphoric acid, oxalic acid, nitric acid, and hydrochloric acid can be used as the acid. However, if the etching rate is too fast, a portion of the oxide semiconductor layer 108 may disappear, making it difficult to observe the crystal grains. Therefore, it is preferable to adjust the etching rate by controlling the concentration, temperature, and processing time of the etchant so that the oxide semiconductor layer 108 does not disappear but its thickness is reduced (also called half-etching). Half-etching allows for easy observation of the crystal grains.

[0078] In this specification, a grain boundary refers, for example, to the boundary between adjacent grains with different crystal orientations. Furthermore, if no clear grain boundary is observed in cross-sectional TEM observation, and the difference in crystal orientation between adjacent measurement points in EBSD is small (for example, if the difference in crystal orientation is less than 5 degrees), these measurement points can be considered to belong to the same grain.

[0079] In this specification, space groups are denoted using the international notation (or Hermann-Mauguin notation) Short notation. In addition, space group numbers from the International Tables for Crystallography Volume A (hereinafter also referred to as ITA) may be included. Furthermore, Miller indices are used to indicate crystal planes and crystal directions. In crystallography, space groups, crystal planes, and crystal directions are indicated by a bar above the number, but in this specification, due to formatting constraints, a minus sign (-) may be placed before the number instead of a bar above it. In addition, individual orientations indicating directions within a crystal are indicated by [ ], collective orientations indicating all equivalent directions are indicated by < >, individual crystal planes are indicated by ( ), and collective planes with equivalent symmetry are indicated by {}. Note that even with the same space group number, the notation for the space group may differ depending on how the crystal axis is defined.

[0080] In this specification, the crystal orientation of a crystal refers to its orientation relative to the surface of the substrate 102. For example, a crystal with a crystal orientation of <100> can be said to be a crystal in which the (100) plane is parallel to the surface of the substrate.

[0081] The cubic crystal structure of indium oxide belongs to space group Ia-3 (space group number 206). In this specification, the cubic crystal structure is sometimes referred to as cubic crystal or cubic structure. The same applies to other crystal systems (hexagonal, trigonal, tetragonal, orthorhombic, monoclinic, and triclinic).

[0082] Furthermore, gallium oxide and zinc oxide can be used as metal oxides for the oxide semiconductor layer 108. The metal oxide preferably contains at least indium. It is also preferable that the metal oxide contains either or both indium and zinc. Furthermore, it is preferable that the metal oxide has one or more elements selected from indium, element M, and zinc. Element M is a metal or metalloid element with a high bond energy with oxygen, for example, a metal or metalloid element with a higher bond energy with oxygen than indium. Specific examples of element M include aluminum, gallium, tin, yttrium, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, zirconium, molybdenum, hafnium, tantalum, tungsten, lanthanum, cerium, neodymium, magnesium, calcium, strontium, barium, boron, silicon, germanium, and antimony. The element M present in the metal oxide is preferably one or more of the above elements, more preferably one or more selected from gallium, aluminum, tin, and yttrium, and even more preferably one or more of gallium, aluminum, and tin. These elements are more preferred because they have high bonding energy with oxygen and their ionic radii are similar to those of indium or zinc. Furthermore, tin is more preferred because its tetravalent state can increase carrier mobility. In this specification, metallic elements and metalloid elements are sometimes collectively referred to as "metallic elements," and the "metallic elements" described in this specification may include metalloid elements.

[0083] The oxide semiconductor layer 108 is, for example, made of indium oxide (also written as indium oxide, In-O, IO), indium zinc oxide (also written as In-Zn oxide, IZO®), indium tin oxide (also written as In-Sn oxide, ITO), indium titanium oxide (In-Ti oxide), indium gallium oxide (In-Ga oxide), indium tungsten oxide (also written as In-W oxide, IWO), indium gallium aluminum oxide (In-Ga-Al oxide), indium gallium tin oxide (also written as In-Ga-Sn oxide, IGTO), gallium zinc oxide (also written as Ga-Zn oxide, GZO), aluminum Indium zinc oxide (Al-Zn oxide, also written as AZO), indium aluminum zinc oxide (In-Al-Zn oxide, also written as IAZO), indium tin zinc oxide (In-Sn-Zn oxide, also written as ITZO®), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium zinc oxide (In-Ga-Zn oxide, also written as IGZO), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide, also written as IGZTO), indium gallium aluminum zinc oxide (In-Ga-Al-Zn oxide, also written as IGAZO, IGZAO, or IAGZO), etc., can be used. Alternatively, silicon-containing indium tin oxide (also written as ITSO), gallium tin oxide (Ga-Sn oxide), aluminum tin oxide (Al-Sn oxide), etc., can be used.

[0084] Furthermore, the metal oxide can be composed of one or more metal elements with high periodic numbers in the periodic table, either in place of indium or in addition to indium. The greater the overlap of the metal element orbitals, the greater the carrier conduction in the metal oxide tends to be. Therefore, by including metal elements with high periodic numbers, the field-effect mobility of the transistor can be increased. Examples of metal elements with high periodic numbers include those belonging to the 5th period and those belonging to the 6th period. Specifically, these metal elements include yttrium, zirconium, silver, cadmium, tin, antimony, barium, lead, bismuth, lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium. Lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium are called light rare earth elements.

[0085] Metal oxides may contain one or more nonmetallic elements. The presence of nonmetallic elements in metal oxides can increase carrier concentration or reduce the band gap, potentially improving the field-effect mobility of transistors. Examples of nonmetallic elements include carbon, nitrogen, phosphorus, sulfur, selenium, fluorine, chlorine, bromine, and hydrogen.

[0086] By increasing the ratio of indium atoms to the sum of all metal element atoms in the metal oxide, the field-effect mobility of the transistor can be increased. Furthermore, a transistor with a high on-current can be realized.

[0087] In this specification, the ratio of the number of indium atoms to the sum of the total number of atoms of all contained metal elements may be referred to as the indium content. The same applies to other metal elements. If element M contains multiple elements, the sum of the ratios of the number of atoms of element M to the sum of the total number of atoms of all contained metal elements may be referred to as the element M content.

[0088] By increasing the zinc content in a metal oxide, a highly crystalline metal oxide is obtained, which suppresses the diffusion of impurities within the metal oxide. Therefore, fluctuations in the electrical characteristics of the transistor are suppressed, and reliability can be improved.

[0089] Hydrogen reacts with oxygen that is bonded to the metal atoms of metal oxides to form water, and oxygen vacancies (V) form at the locations where the oxygen was removed from the metal oxide. O ) is formed. Furthermore, oxygen deficiency (V O A defect in which hydrogen has entered (hereinafter referred to as V O H acts as a donor, generating electrons, which are carriers.

[0090] By increasing the content of element M in the metal oxide, a metal oxide with a large band gap can be obtained. Furthermore, by increasing the content of element M in the metal oxide, oxygen vacancies (V) can be created in the metal oxide. O The formation of oxygen deficiency (V) is suppressed. O The formation of ) is suppressed, resulting in an oxygen deficiency (V O A defect (V) into which hydrogen has entered O Carrier generation caused by H) is suppressed, and the shift in the transistor's threshold voltage (Vth) can be suppressed. This allows for a smaller cutoff current, enabling a normally-off transistor. Furthermore, a transistor with a small off-current can be created. In addition, fluctuations in the transistor's electrical characteristics are suppressed, improving reliability.

[0091] The composition of the metal oxide applied to the oxide semiconductor layer 108 affects the electrical characteristics and reliability of the transistor. Therefore, by varying the composition of the metal oxide according to the required electrical characteristics and reliability of the transistor, it is possible to create a semiconductor device that achieves both excellent electrical characteristics and high reliability.

[0092] When the metal oxide is an In-M-Zn oxide, it is preferable that the atomic ratio of In in the In-M-Zn oxide is equal to or greater than the atomic ratio of element M. Examples of such atomic ratios of metal elements in an In-M-Zn oxide include In:M:Zn = 1:1:1, In:M:Zn = 1:1:1.2, In:M:Zn = 2:1:3, In:M:Zn = 3:1:1, In:M:Zn = 3:1:2, In:M:Zn = 4:2:3, In:M:Zn = 4:2:4.1, In:M:Zn = 5:1:3, In:M:Zn = 5:1:6, In:M:Zn = 5:1:7, In:M:Zn = 5:1:8, and In:M Compositions such as Zn=5:1:9, In:M:Zn=6:1:6, In:M:Zn=10:1:1, In:M:Zn=10:1:3, In:M:Zn=10:1:4, In:M:Zn=10:1:6, In:M:Zn=10:1:7, In:M:Zn=10:1:8, In:M:Zn=5:2:5, In:M:Zn=10:1:10, In:M:Zn=20:1:10, In:M:Zn=40:1:10, and compositions near these. A composition near these elements means that when the ratio of one element is fixed, the ratios of the other elements are within ±30% of the original atomic ratio. For example, compositions near In:M:Zn = 1:1:1 include a range where, when the ratio of In is fixed, the ratios of M and Zn are between 0.7 and 1.3, respectively. Increasing the atomic ratio of indium in a metal oxide can increase the on-current or field-effect mobility of a transistor.

[0093] The atomic ratio of In in an In-M-Zn oxide can be less than the atomic ratio of element M. Examples of such atomic ratios of metal elements in an In-M-Zn oxide include In:M:Zn = 1:3:2, In:M:Zn = 1:3:3, In:M:Zn = 1:3:4, In:M:Zn = 1:3:6, and compositions close to these. By increasing the proportion of M atoms in the metal oxide, oxygen deficiency (V) can be reduced. O This can suppress the generation of ()

[0094] By using a material with a high indium content in the oxide semiconductor layer 108, the on-current or field-effect mobility of the transistor can be increased. Furthermore, the presence of element M allows for oxygen deficiency (VO The generation of ) can be suppressed. The content rate of element M (the ratio of the number of atoms of element M to the sum of the number of atoms of all contained metal elements) is preferably 0.1% or more and 25% or less, more preferably 0.1% or more and 20% or less, still more preferably 0.1% or more and 10% or less, still more preferably 0.1% or more and 8% or less, still more preferably 0.1% or more and 6% or less, and still more preferably 0.1% or more and 4% or less. Thereby, a transistor with good electrical characteristics can be obtained. For example, it is preferable to use metal oxides having a composition such as In:M:Zn = 40:1:10 and compositions in the vicinity thereof. Element M is preferably any one or more of the above elements, and more preferably one or more selected from aluminum, gallium, tin, and yttrium. Specifically, metal oxides having a composition such as In:Sn:Zn = 40:1:10 and compositions in the vicinity thereof can be preferably used. Alternatively, metal oxides having a composition such as In:Al:Zn = 40:1:10 and compositions in the vicinity thereof can be preferably used.

[0095] A metal oxide containing no element M can be applied to the oxide semiconductor layer 108. When the metal oxide is an In-Zn oxide, for example, as the atomic ratio of metal elements, In:Zn = 1:1, In:Zn = 2:1, In:Zn = 1:2, In:Zn = 3:1, In:Zn = 3:2, In:Zn = 2:3, In:Zn = 4:1, In:Zn = 4:3, In:Zn = 5:1, In:Zn = 5:2, In:Zn = 5:3, In:Zn = 5:4, In:Zn = 5:6, In:Zn = 5:7, In:Zn = 5:8, In:Zn = 5:9, In:Zn = 7:1, In:Zn = 10:1, In:Zn = 10:3, In:Zn = 10:7, and compositions in the vicinity thereof can be mentioned. Further, it is more preferable that the atomic ratio of In is not less than the atomic ratio of Zn. By increasing the atomic ratio of indium in the metal oxide, the on-current or field-effect mobility of the transistor can be increased.

[0096] For the analysis of the composition of the oxide semiconductor layer 108, for example, energy-dispersive X-ray spectroscopy (EDX), X-ray photoelectron spectroscopy (XPS), or Electron Spectrometer for Chemical Analysis (ESCA), inductively coupled plasma mass spectrometry (ICP-MS), or inductively coupled high-frequency plasma atomic emission spectroscopy (ICP-AES) can be used. Spectrometry can be used. Alternatively, a combination of these methods can be used for analysis. It is preferable to separate the peaks of the spectrum obtained by the analysis and then identify and quantify the elements. Note that for elements with low content, the actual content may differ from the content obtained by the analysis due to the effect of analytical accuracy. For example, if the content of element M is low, the content of element M obtained by the analysis may be lower than the actual content, it may be difficult to quantify the content of element M, or element M may be below the detection limit.

[0097] For depositing metal oxide films, sputtering or atomic layer deposition (ALD) can be suitably used. When depositing metal oxide films by sputtering, the composition of the deposited metal oxide film may differ from that of the sputtering target. In particular, the zinc content in the deposited metal oxide film may decrease to about 50% of that in the sputtering target. Furthermore, when depositing metal oxide films by atomic layer deposition, it is preferable because the metal oxide film can be deposited without breaks (discontinuities in the film) even if the surface of the sidewall within the opening is perpendicular, approximately perpendicular, or reverse-tapered to the substrate surface in cross-sectional view. Similarly, when using sputtering, it is preferable to use conditions with low anisotropy, i.e., high isotropy, as the film deposition conditions to prevent breaks.

[0098] By using oxygen gas when forming the metal oxide film, oxygen can be supplied into the insulating layer 110 during the formation of the metal oxide film. This allows oxygen to be supplied to the oxide semiconductor layer 108 in a later process, and oxygen vacancies (V) in the oxide semiconductor layer 108 can be eliminated. O ) and oxygen deficiency (V O A defect (V) into which hydrogen has entered O H) can be reduced. When forming a metal oxide film, oxygen gas and an inert gas (e.g., helium gas, argon gas, xenon gas, etc.) can be mixed and used. The oxygen flow rate ratio is preferably higher than 0% and 10% or less, more preferably higher than 0% and 5% or less, and even more preferably higher than 0% and 3% or less.

[0099] It is preferable to use a crystalline metal oxide for the oxide semiconductor layer 108. Examples of crystalline metal oxide structures include single crystal, polycrystalline, microcrystalline, nanocrystalline (nc: nano-crystal) structures, and CAAC (c-axis aligned crystal) structures (when having hexagonal and layered crystal structures). By using a crystalline metal oxide, the defect level density in the oxide semiconductor layer 108 can be reduced, and a highly reliable semiconductor device can be realized.

[0100] When the oxide semiconductor layer 108 has a hexagonal and layered crystal structure, it is preferable to use CAAC-OS or nc-OS.

[0101] CAAC-OS has multiple layered crystals. The c-axis of these crystals is oriented in the direction normal to the surface to be formed. Preferably, the oxide semiconductor layer 108 has layered crystals that are parallel or approximately parallel to the surface to be formed. For example, preferably, the oxide semiconductor layer 108 has layered crystals that are parallel or approximately parallel to the upper surface of the conductive layer 112b in the portion that contacts the upper surface of the conductive layer 112b, and layered crystals that are parallel or approximately parallel to the side surface in the portion that contacts the side surface of the conductive layer 112b. In particular, preferably, the oxide semiconductor layer 108 has layered crystals that are parallel or approximately parallel to the side surface that is the surface to be formed in the portion that contacts the side surface of the insulating layer 110. With this configuration, the diffusion coefficient of oxygen becomes smaller and oxygen is less likely to escape compared to an amorphous oxide semiconductor, so a highly reliable transistor can be realized. In addition, CAAC-OS can suppress variations in transistors compared to a polycrystalline oxide semiconductor.

[0102] By using a highly crystalline metal oxide in the channel formation region, the defect level density in the channel formation region can be reduced. On the other hand, by using a less crystalline metal oxide, it is possible to realize a transistor that can carry a large current.

[0103] The higher the substrate temperature during metal oxide film deposition, the more crystalline the metal oxide film can be formed. The substrate temperature during deposition can be adjusted, for example, by the temperature of the stage on which the substrate is placed. Furthermore, the higher the oxygen flow rate ratio of the deposition gas used, or the higher the oxygen partial pressure in the processing chamber, the more crystalline the metal oxide film can be formed.

[0104] When a metal oxide is used for the oxide semiconductor layer 108, the channel formation region V O It is preferable to reduce H as much as possible and make it high-purity intrinsic or substantially high-purity intrinsic. In this way, V O To obtain a metal oxide with sufficiently reduced H content, impurities such as water and hydrogen must be removed from the metal oxide (sometimes referred to as dehydration and dehydrogenation treatment), and oxygen must be supplied to the metal oxide to eliminate oxygen deficiency (V). O It is important to repair ). OBy using metal oxides with sufficiently reduced impurities such as H in the channel formation region of a transistor, stable electrical characteristics can be provided. Furthermore, by supplying oxygen to the metal oxide, oxygen deficiencies (V) can be eliminated. O The process of repairing this is sometimes referred to as oxygenation treatment.

[0105] When a metal oxide is used for the oxide semiconductor layer 108, the carrier concentration in the channel formation region is 1 × 10⁻⁶. 18 cm −3 The following is preferable: 1 × 10 17 cm −3 It is more preferable that it be less than 1 × 10 16 cm −3 It is even more preferable that the carrier concentration in the channel-forming region be less than 1 × 10⁻⁶. 18 cm −3 If the value becomes larger, the transistor's threshold voltage (Vth) shifts negatively, resulting in normally-on characteristics. There is no limit to the lower limit of the carrier concentration in the channel formation region, but for example, 1 × 10⁻⁶ 15 cm −3 If the value is less than this, there is almost no effect on the transistor's threshold voltage (Vth).

[0106] OS transistors exhibit minimal fluctuations in electrical properties due to radiation exposure, meaning they have high resistance to radiation, making them suitable for use in environments where radiation may be incident. OS transistors can also be said to have high reliability against radiation. For example, OS transistors can be suitably used in the pixel circuits of X-ray flat panel detectors. Furthermore, OS transistors can be suitably used in semiconductor devices used in outer space. Examples of radiation include electromagnetic radiation (e.g., X-rays and gamma rays) and particle radiation (e.g., alpha rays, beta rays, proton beams, and neutron beams).

[0107] The oxide semiconductor layer 108 can have a laminated structure having two or more metal oxide layers. The two or more metal oxide layers of the oxide semiconductor layer 108 can have the same or substantially the same composition. By having a laminated structure of metal oxide layers with the same composition, for example, it can be formed using the same sputtering target, thus reducing manufacturing costs. When the two or more metal oxide layers of the oxide semiconductor layer 108 have the same or substantially the same composition, it may not be possible to clearly identify the boundaries (interfaces) of these metal oxide layers.

[0108] [Insulating layer 110] An inorganic insulating layer can be used as the insulating layer 110. Preferably, the insulating layer 110 has one or more inorganic insulating layers. Examples of materials that can be used for the inorganic insulating layer include oxides, nitrides, oxidized nitrides, and nitride oxides. Examples of oxides include silicon oxide, aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, tantalum oxide, cerium oxide, zinc gallium oxide, and hafnium aluminate. Examples of nitrides include silicon nitride and aluminum nitride. Examples of oxidized nitrides include silicon oxidized nitride, aluminum oxidized nitride, gallium oxidized nitride, yttrium oxidized nitride, and hafnium oxidized nitride. Examples of nitride oxides include silicon nitride and aluminum nitride.

[0109] In this specification, the term "oxidogenic nitride" refers to a material whose composition contains more oxygen than nitrogen. The term "nitride oxide" refers to a material whose composition contains more nitrogen than oxygen.

[0110] The insulating layer 110 has a portion that contacts the oxide semiconductor layer 108. When a metal oxide is used for the oxide semiconductor layer 108, it is preferable that at least a portion of the portion of the insulating layer 110 that contacts the oxide semiconductor layer 108 contains oxygen in order to improve the interfacial characteristics between the oxide semiconductor layer 108 and the insulating layer 110. Specifically, it is preferable that the portion of the insulating layer 110 that contacts the channel-forming region of the oxide semiconductor layer 108 contains oxygen. One or more oxides and oxiditrides can be suitably used in the portion of the insulating layer 110 that contacts the channel-forming region of the oxide semiconductor layer 108.

[0111] The insulating layer 110 preferably has a laminated structure. Figure 1A and the like show an example in which the insulating layer 110 has an insulating layer 110a, an insulating layer 110b on insulating layer 110a, and an insulating layer 110c on insulating layer 110b. The insulating layers 110a, 110b, and 110c can each be made from the materials listed as insulating layer 110.

[0112] When a metal oxide is used for the oxide semiconductor layer 108, it is preferable that at least a portion of the insulating layer 110 that is in contact with the oxide semiconductor layer 108 releases oxygen when heat is applied. This supplies oxygen from the insulating layer 110 to the oxide semiconductor layer 108, reducing oxygen vacancies (V) in the oxide semiconductor layer 108. O ), and defects in which hydrogen enters the oxygen vacancy (V O H) can be reduced.

[0113] The channel length of the transistor 100 can be controlled by the thickness of the insulating layer 110 provided between the conductive layer 112a and the conductive layer 112b. Therefore, transistors with a channel length shorter than the minimum exposure dimension of the exposure apparatus used to manufacture the transistors can be manufactured with high precision. Furthermore, the variation in characteristics between multiple transistors 100 is also reduced. As a result, the operation of the semiconductor device 10 becomes more stable and its reliability is increased. In addition, when the variation in transistor characteristics is reduced, the degree of freedom in circuit design increases, and the operating voltage of the semiconductor device can be lowered. As a result, the power consumption of the semiconductor device can be reduced.

[0114] The portion of the oxide semiconductor layer 108 that is in contact with the insulating layer 110b functions as a channel-forming region. The insulating layer 110b preferably contains oxygen, and it is preferable to use one or more of the aforementioned oxides and oxiditrides. Specifically, silicon oxide and silicon oxiditride, or both, can be suitably used for the insulating layer 110b.

[0115] It is more preferable to use a material that releases oxygen when heat is applied for the insulating layer 110b. The heat applied during the manufacturing process of the semiconductor device 10 causes the insulating layer 110b to release oxygen, thereby supplying oxygen to the oxide semiconductor layer 108. By supplying oxygen from the insulating layer 110b to the oxide semiconductor layer 108, particularly to the channel formation region, oxygen deficiencies (V) can be reduced. O ) is repaired, and oxygen deficiency (V O This can reduce the V in the channel formation region. O H can be reduced. Therefore, a transistor with good electrical characteristics and high reliability can be obtained.

[0116] For example, oxygen can be supplied to the insulating layer 110b by heat treatment in an oxygen-containing atmosphere or by plasma treatment in an oxygen-containing atmosphere. Alternatively, oxygen can be supplied to the upper surface of the insulating layer 110b by sputtering in an oxygen-containing atmosphere. The film can then be removed. The oxygen supplied to the insulating layer 110 in this way is released by the heat applied during the manufacturing process.

[0117] The insulating layer 110b is preferably formed by a film deposition method such as sputtering or PECVD. In particular, by forming it using a method that does not use a gas containing hydrogen (for example, hydrogen gas and ammonia gas) as the deposition gas, a film with an extremely low hydrogen content can be made. The sputtering method is particularly suitable for forming the insulating layer 110b. This suppresses the supply of hydrogen to the channel formation region and stabilizes the electrical characteristics of the transistor 100.

[0118] The insulating layer 110a is provided between the insulating layer 110b and the conductive layer 112a. The insulating layer 110c is provided between the insulating layer 110b and the conductive layer 112b. It is preferable that the insulating layer 110a and the insulating layer 110c each release small amounts of impurities (e.g., water and hydrogen). Furthermore, it is preferable that the insulating layer 110a and the insulating layer 110c each impede substances (e.g., atoms, molecules and ions) to be impermeable. It can also be said that the insulating layer 110a and the insulating layer 110c function as barrier films. Specifically, it is preferable that the insulating layer 110a and the insulating layer 110c each impede substances to be impermeable to. This suppresses the diffusion of impurities contained in the insulating layer 110a and the insulating layer 110c into the channel formation region. Therefore, it is possible to produce a transistor that exhibits good electrical characteristics and is highly reliable.

[0119] It is preferable that insulating layer 110a and insulating layer 110c are made of materials that are impermeable to oxygen, that is, barrier films that have barrier properties against oxygen are used. This suppresses the diffusion of oxygen contained in insulating layer 110b to the conductive layer 112a side via insulating layer 110a. Similarly, it suppresses the diffusion of oxygen contained in insulating layer 110b to the conductive layer 112b side via insulating layer 110c. This increases the amount of oxygen supplied from insulating layer 110b to the channel formation region of oxide semiconductor layer 108, thereby reducing oxygen deficiencies (V) in the channel formation region. O ) and V O H can be reduced. Therefore, a transistor with good electrical characteristics and high reliability can be obtained. In addition, oxidation of the conductive layer 112a by oxygen contained in the insulating layer 110b and an increase in the electrical resistance of the conductive layer 112a can be suppressed. Similarly, oxidation of the conductive layer 112b by oxygen contained in the insulating layer 110b and an increase in the electrical resistance of the conductive layer 112b can be suppressed. Therefore, a transistor with a large on-current can be obtained.

[0120] In this specification, the term "barrier film" refers to a film that possesses barrier properties. Barrier properties refer to one or both of the following functions: a function that makes it difficult for a target substance to diffuse, thereby suppressing the permeation of the substance through the film (also referred to as having a low diffusion coefficient of the substance or low permeability of the substance); and a function that captures or fixes the substance (also referred to as gettering). For example, an insulating layer that possesses barrier properties can be called a barrier insulating layer.

[0121] For the insulating layers 110a and 110c, which function as barrier films, one or more of the following can be used: an oxide having one or both aluminum and hafnium, an oxide having magnesium, an oxide having gallium, an aluminum nitride, a silicon nitride, and a silicon nitride oxide. Specifically, for the insulating layers 110a and 110c, one or more of the following can be suitably used: aluminum oxide, hafnium oxide, hafnium aluminate, magnesium oxide, gallium oxide, gallium zinc oxide, aluminum nitride, silicon nitride, and silicon nitride oxide. Note that the insulating layers 110a and 110c can be made of the same material, or different materials can be used for the insulating layers 110a and 110c.

[0122] By using an oxide or oxiditride for the insulating layer 110c, oxygen can be supplied to the insulating layer 110b (or the insulating film that becomes the insulating layer 110b) when forming the insulating layer 110c (or the insulating film that becomes the insulating layer 110c).

[0123] The insulating layer 110c can preferably be made of an oxide or oxidized nitride. More specifically, one or more of aluminum oxide, hafnium oxide, hafnium aluminate, magnesium oxide, gallium oxide, and gallium zinc oxide can preferably be used for the insulating layer 110c. Using an oxide or oxidized nitride for the insulating layer 110c is preferable because it allows oxygen to be supplied to the insulating layer 110b (or the insulating film that becomes the insulating layer 110b) when forming the layer (or the film that becomes the layer).

[0124] [Opening 141] The shape of the top surface of the opening 141 is not limited to any particular shape. For example, it can be a circle, an ellipse, a triangle, a quadrilateral (including rectangles, rhombuses, and squares), a pentagon, or any of these polygons with rounded corners. The polygon may be either a concave polygon (a polygon in which at least one interior angle exceeds 180 degrees) or a convex polygon (a polygon in which all interior angles are 180 degrees or less). As shown in Figure 1A, etc., the shape of the top surface of the opening 141 is preferably circular. By making the shape of the top surface of the opening circular, the processing accuracy when forming the opening can be improved, and an opening of a fine size can be formed. In this specification, the term "circular" is not limited to a perfect circle.

[0125] In this specification, the upper surface shape of the opening 141 refers to the shape of the upper edge of the conductive layer 112b.

[0126] The channel length and channel width of transistor 100 will be explained using Figures 3A and 3B. Here, the portion of the oxide semiconductor layer 108 that is in contact with the insulating layer 110b will be described as the channel formation region.

[0127] In Figure 3B, the channel length L100 of transistor 100 is indicated by a dashed double arrow. The channel length L100 of transistor 100 is the length of the side surface of the insulating layer 110b on the side of the opening 141 in a cross-sectional view. In other words, the channel length L100 is determined by the thickness T110 of the insulating layer 110b and the angle θ110 (also called the taper angle) between the side surface of the insulating layer 110b on the side of the opening 141 and the surface of the insulating layer 110b to be formed (here, the upper surface of the insulating layer 110a). Therefore, the channel length L100 can be set to a value smaller than the minimum exposure dimension of the exposure apparatus, making it possible to realize transistors of a very small size. Specifically, it is possible to realize transistors with extremely short channel lengths that could not be realized with conventional exposure apparatus for mass production of flat panel displays (for example, minimum dimensions of about 2 μm or 1.5 μm). Furthermore, it is possible to realize transistors with channel lengths of less than 10 nm without using the extremely expensive exposure apparatus used in state-of-the-art LSI technology.

[0128] The channel length L100 can be, for example, 5 nm or more, 7 nm or more, or 10 nm or more, and can be less than 3 μm, 2.5 μm or less, 2 μm or less, 1.5 μm or less, 1.2 μm or less, 1 μm or less, 500 nm or less, 300 nm or less, 200 nm or less, 100 nm or less, 50 nm or less, 30 nm or less, or 20 nm or less. For example, the channel length L100 can also be 100 nm or more and 1 μm or less.

[0129] By shortening the channel length L100, the on-current of the transistor 100 can be increased. Using the transistor 100, a circuit capable of high-speed operation can be fabricated. Furthermore, the circuit's occupied area can be reduced. Therefore, a compact semiconductor device can be made. For example, when applying a semiconductor device according to one aspect of the present invention to a large display device or a high-resolution display device, even when the number of wires increases, the signal delay in each wire can be reduced, and display unevenness can be suppressed. Also, because the circuit's occupied area can be reduced, the bezel of the display device can be narrowed.

[0130] The channel length L100 can be controlled by adjusting the thickness T110 and angle θ110 of the insulating layer 110b.

[0131] The thickness T110 of the insulating layer 110b can be, for example, 5 nm or more, 7 nm or more, or 10 nm or more, and can be less than 3 μm, 2.5 μm or less, 2 μm or less, 1.5 μm or less, 1.2 μm or less, 1 μm or less, 500 nm or less, 300 nm or less, 200 nm or less, 100 nm or less, 50 nm or less, 30 nm or less, or 20 nm or less.

[0132] In Figure 3B and other figures, the angle θ110 is shown as less than 90 degrees, but the present invention is not limited to this. The angle θ110 can be 90 degrees or approximately 90 degrees.

[0133] Figure 1B and others show a configuration in which the side surface of the insulating layer 110 on the side of the opening 141 is straight in a cross-sectional view, but the present invention is not limited to this. In a cross-sectional view, the side surface of the insulating layer 110 on the side of the opening 141 can be curved. Alternatively, the side surface can have both a straight portion and a curved portion.

[0134] In this case, it is preferable that the conductive layer 112b is not provided on the inside of the opening 141. Specifically, it is preferable that the conductive layer 112b does not have a portion that is in contact with the side surface of the insulating layer 110 on the side of the opening 141. If the conductive layer 112b is also provided on the inside of the opening 141, the channel length L100 of the transistor 100 may become shorter than the length of the side surface of the insulating layer 110b, making it difficult to control the channel length L100.

[0135] In Figures 3A and 3B, the width D141 of the opening 141 is indicated by a solid double arrow. Figure 3A shows an example where the top surface shape of the opening 141 is circular. In this case, the width D141 corresponds to the diameter of the circle, and the channel width W100 of the transistor 100 is the circumference of the circle. That is, the channel width W100 is π × D141. Thus, when the top surface shape of the opening 141 is circular, a transistor with a smaller channel width W100 can be realized compared to other shapes.

[0136] The width D141 of the opening 141 may vary in the depth direction. As the width D141 of the opening 141, for example, the average value of three points in a cross-sectional view of the insulating layer 110b (or insulating layer 110): the diameter at the highest point, the diameter at the lowest point, and the diameter at the midpoint between these points. Alternatively, as the diameter of the opening 141, for example, the diameter at the highest point, the diameter at the lowest point, or the diameter at the midpoint between these points in a cross-sectional view of the insulating layer 110b (or insulating layer 110) may be used.

[0137] When forming the aperture 141 using lithography, the width D141 of the aperture 141 is greater than or equal to the minimum exposure dimension of the exposure apparatus. The width D141 can be, for example, 20 nm or more, 50 nm or more, 100 nm or more, 200 nm or more, 300 nm or more, 400 nm or more, or 500 nm or more, and less than 5 μm, 4.5 μm or less, 4 μm or less, 3.5 μm or less, 3 μm or less, 2.5 μm or less, 2 μm or less, 1.5 μm or less, or 1 μm or less.

[0138] The channel formation region, source region, and drain region of transistor 100 will be explained using Figure 4B. The first portion 401 sandwiched between the insulating layer 110b and the insulating layer 106 functions as the channel formation region. The second portion 402 sandwiched between the conductive layer 112a and the oxygen blocking layer 301 functions as either the source region or the drain region, and the third portion 403 sandwiched between the conductive layer 112b and the oxygen blocking layer 302 functions as the other of the source region or the drain region.

[0139] In this explanation, we have used as an example a configuration in which the portion of the oxide semiconductor layer 108 in contact with the insulating layer 110b functions as a channel-forming region, but the present invention is not limited to this. The portion of the oxide semiconductor layer 108 in contact with the insulating layer 110a may also function as a channel-forming region. Similarly, the portion in contact with the insulating layer 110c may also function as a channel-forming region.

[0140] [Insulating layer 106] The insulating layer 106 preferably has one or more inorganic insulating layers. The insulating layer 106 can be made from the materials listed for the insulating layer 110.

[0141] The insulating layer 106 has portions that are in contact with the oxide semiconductor layer 108, the conductive layer 112b, the conductive layer 104, and the insulating layer 110. Furthermore, the insulating layer 106 overlaps with one of the source region or drain region via the oxygen block layer 301, and overlaps with the other of the source region or drain region via the oxygen block layer 302. When a metal oxide is used for the oxide semiconductor layer 108, it is preferable that at least the film constituting the insulating layer 106 that is in contact with the oxide semiconductor layer 108 uses one of the aforementioned oxides and oxiditrides. When the insulating layer 106 has a single-layer structure, silicon oxide, silicon oxiditride, or aluminum oxide can be suitably used for the insulating layer 106.

[0142] Furthermore, in miniature transistors, if the thickness of the gate insulating layer is reduced, the gate leakage current may increase. By using a material with a high dielectric constant (also called a high-k material) for the gate insulating layer, it is possible to reduce the voltage during transistor operation while maintaining the physical film thickness. Examples of high-k materials that can be used for the insulating layer 106 include gallium oxide, hafnium oxide, zirconium oxide, oxides having aluminum and hafnium, oxidized nitrides having aluminum and hafnium, oxides having silicon and hafnium, oxidized nitrides having silicon and hafnium, and nitrides having silicon and hafnium.

[0143] Although the insulating layer 106 is shown as a single layer in Figure 1B, etc., the present invention is not limited to this. The insulating layer 106 can be a laminated structure of two or more layers. When the insulating layer 106 is a laminated structure, it is preferable that the insulating layer on the oxide semiconductor layer 108 side has an oxide or oxidizride. The insulating layer on the oxide semiconductor layer 108 side can preferably be one or more of silicon oxide, silicon oxidizride, or aluminum oxide.

[0144] It is more preferable to use a material that releases oxygen when heat is applied for the insulating layer 106. During the manufacturing process of the semiconductor device 10, the heat applied causes the insulating layer 106 to release oxygen, thereby supplying oxygen to the oxide semiconductor layer 108. By supplying oxygen from the insulating layer 106 to the oxide semiconductor layer 108, particularly to the channel formation region, oxygen deficiencies (V) can be reduced. O ) is repaired, and oxygen deficiency (V O This can reduce the V in the channel formation region. O H can be reduced. Therefore, a transistor with good electrical characteristics and high reliability can be obtained.

[0145] For example, oxygen can be supplied to the insulating layer 106 by heat treatment in an oxygen-containing atmosphere or by plasma treatment in an oxygen-containing atmosphere. Alternatively, oxygen can be supplied to the upper surface of the insulating layer 106 by sputtering in an oxygen-containing atmosphere. The film can then be removed. The oxygen supplied to the insulating layer 106 in this way is released by the heat applied during the manufacturing process.

[0146] When the insulating layer 106 has a laminated structure of two or more layers, it is preferable to use a material that is impermeable to oxygen for the layer on the conductive layer 104 side. This layer can also be said to function as a barrier film. This suppresses the diffusion of oxygen contained in the oxide semiconductor layer 108 side of the insulating layer 106 to the conductive layer 104 side through the conductive layer 104 side of the insulating layer 106. As a result, the amount of oxygen supplied from the oxide semiconductor layer 108 side of the insulating layer 106 to the channel formation region of the oxide semiconductor layer 108 increases, and oxygen deficiencies (V) in the channel formation region are reduced. O ) and V O H can be reduced. Therefore, a transistor with good electrical characteristics and high reliability can be obtained.

[0147] It is preferable to use a material that is difficult for substances to permeate in one or more of the layers constituting the insulating layer 106. This layer can also be said to function as a barrier film. By providing a layer that functions as a barrier film, it is possible to suppress the diffusion of metal components contained in the conductive layer 104 and impurities (e.g., water and hydrogen) contained in the layer formed on the transistor 100 into the oxide semiconductor layer 108 via the insulating layer 106. Furthermore, it is possible to suppress the diffusion of oxygen contained in the oxide semiconductor layer 108 into the conductive layer 104 side via the insulating layer 106. As a result, oxygen vacancies (V) in the oxide semiconductor layer 108 are suppressed. O This suppresses the formation of ) and prevents oxidation of the conductive layer 104 by oxygen contained in the oxide semiconductor layer 108, thereby preventing an increase in the electrical resistance of the conductive layer 104. As a result, a transistor with good electrical characteristics and high reliability can be obtained. The layer that functions as a barrier film preferably uses one or more of the nitrides and nitride oxides mentioned above. Alternatively, one or more of the oxides and oxidized nitrides can be used as the layer, and for example, aluminum oxide can be suitably used.

[0148] The insulating layer 106 can, for example, be a laminated structure of a silicon oxide nitride film and a silicon nitride film on the silicon oxide nitride film. Alternatively, the insulating layer 106 can be a laminated structure of a silicon oxide nitride film and an aluminum oxide film on the silicon oxide nitride film. Alternatively, the insulating layer 106 can be a laminated structure of an aluminum oxide film and a silicon oxide nitride film on the aluminum oxide film. Alternatively, the insulating layer 106 can be a laminated structure of an aluminum oxide film and a silicon nitride film on the aluminum oxide film.

[0149] Here, an example is shown in which the insulating layer 106 has a two-layer laminated structure, but the present invention is not limited to this. The insulating layer 106 can also have a three-layer or more laminated structure.

[0150] Furthermore, the configuration of the insulating layer 106 shown here can be applied to other variations and configuration examples.

[0151] [Conductive layer 112a, conductive layer 112b, conductive layer 104] Conductive layer 112a, conductive layer 112b, and conductive layer 104 can each be a single layer or a laminated structure of two or more layers. Materials that can be used for conductive layer 112a, conductive layer 112b, and conductive layer 104 include, for example, one or more of chromium, copper, aluminum, gold, silver, zinc, tantalum, titanium, tungsten, manganese, nickel, iron, cobalt, molybdenum, and niobium, as well as alloys composed of one or more of the aforementioned metals. Conductive layers 112a, conductive layer 112b, and conductive layer 104 can preferably be conductive materials with low electrical resistivity that include one or more of copper, silver, gold, and aluminum. Copper or aluminum are particularly preferred because they are easy to mass-produce.

[0152] Conductive layer 112a, conductive layer 112b, and conductive layer 104 can each be made of a conductive metal oxide (also called an oxide conductor (OC)).

[0153] Examples of oxide conductors include indium oxide, zinc oxide, In-Sn oxide (ITO), In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, In-Sn-Si oxide (also called silicon-containing ITO or ITSO), zinc oxide with added gallium, and In-Ga-Zn oxide. Oxide conductors containing indium are particularly preferred due to their high conductivity.

[0154] When oxygen vacancies are formed in a metal oxide with semiconductor properties, and hydrogen is added to these vacancies, donor levels are formed near the conduction band. As a result, the metal oxide becomes highly conductive and turns into a conductor. A metal oxide that has become conductive can be called an oxide conductor.

[0155] The conductive layer 112a, conductive layer 112b, and conductive layer 104 can each have a laminated structure consisting of a conductive film containing the aforementioned oxide conductor (metal oxide) and a conductive film containing a metal or alloy. By using a conductive film containing a metal or alloy, the wiring resistance can be reduced.

[0156] The conductive layers 112a, 112b, and 104 can each be made of a Cu-X alloy film (where X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti). Using a Cu-X alloy film allows for processing by wet etching, thus reducing manufacturing costs.

[0157] The conductive layer 112a, conductive layer 112b, and conductive layer 104 may be made of the same material. Alternatively, at least one of them may be made of a different material.

[0158] The conductive layer 112a and the conductive layer 112b each have a portion that is in contact with the oxide semiconductor layer 108. When an oxide semiconductor is used for the oxide semiconductor layer 108, if an easily oxidized metal (e.g., aluminum) is used for the conductive layer 112a or the conductive layer 112b, an insulating oxide (e.g., aluminum oxide) may be formed between the conductive layer 112a or the conductive layer 112b and the oxide semiconductor layer 108, which may hinder conductivity. Therefore, it is preferable to use a conductive material that is not easily oxidized, a conductive material that maintains low electrical resistance even when oxidized, or an oxide conductor for the conductive layer 112a and the conductive layer 112b.

[0159] For conductive layers 112a and 112b, it is preferable to use materials such as titanium, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel, respectively. These are preferred because they are conductive materials that are resistant to oxidation, or materials that maintain low electrical resistance even when oxidized. Furthermore, if conductive layer 112a or conductive layer 112b has a laminated structure, it is preferable to use a conductive material that is resistant to oxidation in at least the layer in contact with the oxide semiconductor layer 108.

[0160] The conductive layer 112a and the conductive layer 112b can each be made from the aforementioned oxide conductors. Specifically, oxide conductors such as indium oxide, zinc oxide, ITO, In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, silicon-containing In-Sn oxide, and zinc oxide with gallium added can be used.

[0161] Nitride conductors can also be used for conductive layers 112a and 112b, respectively. Examples of nitride conductors include tantalum nitride and titanium nitride. Furthermore, the aforementioned nitride conductors can be used for conductive layer 104.

[0162] [Oxygen Blocking Layer 301, Oxygen Blocking Layer 302] The oxygen blocking layer 301 and the oxygen blocking layer 302 are made of materials that are less permeable to oxygen than at least one of the insulating layer 106 and the oxide semiconductor layer 108. The oxygen blocking layer 301 is provided between the insulating layer 106 and the portion of the oxide semiconductor layer 108 that is in contact with the conductive layer 112a. The oxygen blocking layer 302 is provided between the insulating layer 106 and the portion of the oxide semiconductor layer 108 that is in contact with the conductive layer 112b. This prevents oxygen contained in the insulating layer 106 from diffusing through the oxygen blocking layer 301 to the portion of the oxide semiconductor layer 108 that is in contact with the conductive layer 112a. Similarly, it prevents oxygen contained in the insulating layer 106 from diffusing through the oxygen blocking layer 302 to the portion of the oxide semiconductor layer 108 that is in contact with the conductive layer 112b. As a result, oxygen supplied from the insulating layer 106 to the portion of the oxide semiconductor layer 108 in contact with the conductive layer 112a is blocked, suppressing the increase in resistance of the portion of the oxide semiconductor layer 108 in contact with the conductive layer 112a. Furthermore, oxidation of the conductive layer 112a by the oxygen contained in the insulating layer 106, which would increase the electrical resistance of the conductive layer 112a, can be suppressed. In other words, the increase in contact resistance between the oxide semiconductor layer 108 and the conductive layer 112a is suppressed. Similarly, the increase in resistance of the portion of the oxide semiconductor layer 108 in contact with the conductive layer 112b is suppressed, and oxidation of the conductive layer 112b by the oxygen contained in the insulating layer 106, which would increase the electrical resistance of the conductive layer 112b, can be suppressed. In other words, the increase in contact resistance between the oxide semiconductor layer 108 and the conductive layer 112b is suppressed. Therefore, a transistor with good electrical characteristics and a large on-current can be made.

[0163] In this specification, the term "oxygen blocking layer" refers to a film having barrier properties against oxygen, and is synonymous with "barrier film against oxygen." The oxygen blocking layer refers to a film that has at least one of the following functions: a function that makes it difficult for oxygen to diffuse, thereby suppressing the permeation of oxygen through the film (also known as having a small oxygen diffusion coefficient or low oxygen permeability); a function that captures or fixes oxygen (also known as gettering); and a function that suppresses oxygen from combining with hydrogen in the film and permeating through it. The materials used for the oxygen blocking layer 301 and the oxygen blocking layer 302 are materials that have a smaller oxygen diffusion coefficient than at least one of the materials for the insulating layer 106 and the oxide semiconductor layer 108.

[0164] The diffusion coefficients of oxygen can be compared using the coefficient at any temperature between 150°C and 450°C. In particular, it is preferable to compare them using the maximum temperature applied to the oxide semiconductor layer 108 after the deposition of the insulating layer 106. Alternatively, the temperature of the heat treatment in the oxygenation process can be used for comparison. Specifically, for example, the diffusion coefficients at 250°C, 300°C, or 350°C can be compared.

[0165] The oxygen blocking layer may be a metal oxide of a different material or the same material as the oxide semiconductor layer 108, and a material with higher crystallinity than the oxide semiconductor layer 108 may be used. In particular, it is preferable to use a material with the same constituent elements as the oxide semiconductor layer 108 but a different composition. Metal oxides with high crystallinity have a lower oxygen diffusion coefficient than metal oxides with low crystallinity and can be suitably used.

[0166] The oxygen blocking layer may be insulating or conductive. In the case of insulating, the oxygen blocking layer 301 and the oxygen blocking layer 302 can be, for example, one or more of the following: an oxide having one or both of aluminum and hafnium; an oxide or nitride having at least one of magnesium, gallium, molybdenum, tungsten, or titanium; an oxide having gallium; a nitride having aluminum; a nitride having silicon; and a nitride oxide having silicon. Specifically, the oxygen blocking layer 301 and the oxygen blocking layer 302 can be, for example, preferably one or more of the following: aluminum oxide, hafnium oxide, hafnium aluminate, magnesium oxide, gallium oxide, molybdenum oxide, tungsten oxide, titanium oxide, zinc gallium oxide, aluminum nitride, hafnium nitride, magnesium nitride, gallium nitride, molybdenum nitride, tungsten nitride, titanium nitride, silicon nitride, and silicon nitride oxide. Each nitride is particularly preferred because it has a small oxygen diffusion coefficient, and silicon nitride is particularly preferred.

[0167] Furthermore, as a material for capturing and fixing oxygen, it is preferable to use silicon oxide to which one or more elements selected from boron, carbon, magnesium, aluminum, phosphorus, calcium, scandium, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, gallium, germanium, arsenic, yttrium, zirconium, niobium, molybdenum, indium, tin, lanthanum, cerium, neodymium, hafnium, tantalum, and tungsten are added. In particular, a film in which phosphorus (P) or boron (B) is implanted (ion-doped or ion-implanted) into silicon oxide can be used. By implanting phosphorus (P) or boron (B) into silicon oxide, defects are created in the silicon oxide, and oxygen is captured by the phosphorus or boron and the defects. In addition, silicon oxide films, silicon nitride films, or silicon oxynitride films with a high hydrogen content can be used. The hydrogen in the silicon oxide film or silicon oxynitride film reacts with oxygen to become water, which is then fixed in the film.

[0168] For conductivity, suitable materials for the oxygen blocking layer 301 and oxygen blocking layer 302 include, for example, a metal or alloy containing one or both aluminum and hafnium, a metal or alloy containing magnesium, gallium, molybdenum, tungsten, titanium, etc., or an oxide conductor such as indium tin oxide (ITO). When aluminum is included as the metal or alloy, it is preferable because aluminum has a strong bond with oxygen and a high oxygen-blocking effect. Oxide conductors such as ITO are also preferable because they contain many oxygen vacancies, allowing oxygen to be captured and fixed in these vacancies. Furthermore, even if the conductivity of the film used as a conductive material decreases or it becomes insulating due to diffused oxygen, this does not pose a problem for the oxygen blocking layer.

[0169] Sputtering can be suitably used to deposit the oxygen block layer 301 and the oxygen block layer 302. By employing sputtering conditions that result in high anisotropy, the film can be deposited only on the surface of the oxide semiconductor layer 108 parallel to the substrate surface, allowing the oxygen block layer 301 and the oxygen block layer 302 to be formed separately. In other words, the film can be prevented from being deposited on the sidewall of the opening 141 (the portion along the side surface of the insulating layer 110 in the oxide semiconductor layer 108). In particular, setting the angle θ110 (Figure 3B) to 90 degrees or approximately 90 degrees is preferable because it makes it difficult for the film to be deposited on the sidewall of the opening 141. As for sputtering conditions, the anisotropy can be increased by increasing the distance between the sputtering target and the substrate. Anisotropy can also be increased by lowering the deposition pressure.

[0170] [Substrate 102] There are no major restrictions on the material of the substrate 102, but it must have at least enough heat resistance to withstand subsequent heat treatment. For example, single-crystal semiconductor substrates made of silicon or silicon carbide, polycrystalline semiconductor substrates, compound semiconductor substrates such as silicon germanium, SOI substrates, glass substrates, quartz substrates, sapphire substrates, ceramic substrates, or resin substrates can be used as the substrate 102. In addition, a substrate on which a semiconductor element is provided can be used as the substrate 102. A substrate with an insulating film formed on its surface can be used as the substrate 102. The shape of the substrate 102 is not particularly limited and can be circular or rectangular, for example.

[0171] A flexible substrate can be used as the substrate 102, and transistors 100, etc., can be formed directly on the flexible substrate. Alternatively, a release layer can be provided between the substrate 102 and the transistors 100, etc. By providing a release layer, after partially or completely completing the semiconductor device on it, it can be separated from the substrate 102 and transferred to another substrate. In this case, the transistors 100, etc., can also be transferred to a substrate with low heat resistance or a flexible substrate.

[0172] [Insulating layer 218] An insulating layer 218 is provided on the transistor 100. The insulating layer 218 functions as a protective layer for the transistor. The insulating layer 218 can be made of the same material that can be used for the insulating layer 110. Preferably, the insulating layer 218 has one or more inorganic insulating layers. Note that the insulating layer 218 is omitted in the perspective views shown in Figures 2A to 2D.

[0173] It is preferable to use a material that does not easily allow impurities such as water and hydrogen to diffuse into the insulating layer 218. This allows the insulating layer 218 to function as a barrier film. With this configuration, the diffusion of impurities from the outside into the transistor can be effectively suppressed, and the reliability of the display device can be improved. For details on the barrier film, please refer to the above description.

[0174] The following describes modified examples of semiconductor devices with configurations that differ in some respects from the aforementioned configuration example. Note that in the following, explanations of parts that overlap with the aforementioned configuration example may be omitted. Furthermore, in the drawings shown below, parts having the same function as the aforementioned configuration example may use the same hatching pattern and may not be labeled with reference numerals.

[0175] <Modification 1> Figures 5A and 5B show cross-sectional views of a semiconductor device 10A, which is one embodiment of the present invention. A top view of the semiconductor device 10A can be found in Figure 1A. Figure 5A is a cross-sectional view of the section along the dashed line A1-A2 shown in Figure 1A, and Figure 5B is a cross-sectional view of the section along the dashed line A1-A2.

[0176] The semiconductor device 10A differs from the semiconductor device 10 shown in Figure 1B, etc., in that the oxygen block layer 302 is in contact with the side surface of the oxide semiconductor layer 108 and the upper surface of the conductive layer 112b.

[0177] Since the oxygen blocking layer 302 is positioned between the insulating layer 106 and the oxide semiconductor layer 108 on its upper and side surfaces, the diffusion of oxygen from the insulating layer 106 from the side surfaces of the oxide semiconductor layer 108 can be suppressed.

[0178] Furthermore, the configuration of the oxygen block layer 302 described here can be applied to other modifications and configuration examples.

[0179] <Modification 2> Cross-sectional views of semiconductor devices 10B, 10C, and 10D, which are one embodiment of the present invention, are shown in Figures 6A to 6C, respectively.

[0180] The semiconductor devices 10B, 10C, and 10D differ primarily from the semiconductor device 10 shown in Figure 1B, etc., in that they each have different shapes for their apertures 141.

[0181] In semiconductor device 10B, the shape of the side wall portion of the insulating layer 110 in cross-sectional view is a so-called reverse taper shape (angle θ110 is greater than 90 degrees). Furthermore, in semiconductor device 10C, the width D110 of the opening in insulating layer 110b is larger than the width of the openings in insulating layers 110a and 110c, and in semiconductor device 10D, the width D110 of the opening in insulating layer 110 is larger than the width of the opening in conductive layer 112b. These shapes can also be called eaves shapes.

[0182] In this overhang shape, a portion of the oxide semiconductor layer 108 that contacts the oxygen block layer 302 and the conductive layer 112b (third portion 403) overlaps with a portion of the oxide semiconductor layer 108 that contacts the insulating layer 110b (first portion 401) in a plan view via the insulating layer 110. Furthermore, a portion of the oxide semiconductor layer 108 that contacts the oxygen block layer 302 and the conductive layer 112b (third portion 403) overlaps with a portion of the oxide semiconductor layer 108 that contacts the insulating layer 110b (first portion 401) in a plan view via the conductive layer 112b.

[0183] By adopting this canopy shape, the oxygen blocking layer 302 is less likely to adhere to the side wall of the opening 141.

[0184] Furthermore, the cross-sectional shape of the opening 141 can be applied to other modified examples and configurations.

[0185] <Configuration Example 2> Figure 7A shows a top view of a semiconductor device 10E, which is one embodiment of the present invention. Figure 7B shows a cross-sectional view of the cross-section along the dashed line A1-A2 shown in Figure 7A. Figure 7C shows a cross-sectional view of the cross-section along the dashed line B1-B2 shown in Figure 7A.

[0186] Perspective views of the semiconductor device 10E are shown in Figures 8A, 8B, and 9. Figure 8B shows a cross-section along the dashed line C1-C2 shown in Figure 8A. Figure 9 is a perspective view in which the conductive layer 104 and insulating layer 106 shown in Figure 8A are omitted.

[0187] The semiconductor device 10E differs from the semiconductor device 10 shown in Figure 1, etc., in that the insulating layer 110 is divided by grooves (slits).

[0188] The insulating layer 110 has a slit portion 137 that reaches the conductive layer 112a and the substrate 102. As shown in Figure 7B, the insulating layer 110 has a pair of sides (side 70 and side 70a) facing each other with the slit portion 137 in between. Side 70 includes a portion located on the conductive layer 112a and a portion located on the substrate 102. Similarly, side 70a includes a portion located on the conductive layer 112a and a portion located on the substrate 102.

[0189] A conductive layer 112b and a conductive layer 112bS are provided on the insulating layer 110. The conductive layer 112bS is the portion of the conductive layer 112b that remains after being separated during the formation of the slit portion 137. The conductive layer 112b is provided on the insulating layer 110 on the side 70 side, and the conductive layer 112bS is provided on the insulating layer 110 on the side 70a side. Note that a configuration without the conductive layer 112bS is also possible.

[0190] The oxide semiconductor layer 108 has portions that are in contact with the upper and side surfaces of the conductive layer 112b, the upper and side surfaces of the conductive layer 112bS, side surface 70, side surface 70a, and the upper surface of the conductive layer 112a. The oxide semiconductor layer 108 is connected to the conductive layer 112a and connected to the conductive layer 112b. The oxide semiconductor layer 108 has a cross-sectional shape that follows the shape of the upper and side surfaces of the conductive layer 112b, the upper and side surfaces of the conductive layer 112bS, side surface 70, side surface 70a, and the upper surface of the conductive layer 112a. The oxide semiconductor layer 108 is provided spanning the portion of the conductive layer 112a where the insulating layer 110 is provided and the portion of the conductive layer 112a where the insulating layer 110 is not provided. In addition, the oxide semiconductor layer 108 is provided not only on side surface 70 but also on side surface 70a.

[0191] An oxygen blocking layer 302 and an oxygen blocking layer 301 are provided on the oxide semiconductor layer 108. An oxygen blocking layer is also provided on the conductive layer 112bS.

[0192] An insulating layer 106 is provided on the oxygen block layer 302, the oxygen block layer 301, and the oxide semiconductor layer 108, and a conductive layer 104 is provided on the insulating layer 106. The conductive layer 104 has a portion that faces the side surface 70 via the insulating layer 106. The conductive layer 104 also has a portion that faces the side surface 70a via the insulating layer 106. Note that the conductive layer 112bS does not come into contact with the conductive layer 112b and is not connected to either the source electrode or the drain electrode, so the portion of the oxide semiconductor layer 108 that comes into contact with the side surface 70a does not function as a channel formation region of the transistor 100. The portion of the oxide semiconductor layer 108 that comes into contact with the side surface 70 functions as a channel formation region of the transistor 100.

[0193] Figure 7A and others show a region where the insulating layer 110 is divided into two by a slit portion 137 extending in one direction. The shape of the upper surface of the slit portion 137 is not particularly limited. The insulating layer 110 may be connected in parts other than the region shown in Figure 7A.

[0194] Figure 7A and others show a configuration in which one transistor (here, transistor 100) is provided for each slit portion 137, but the present invention is not limited to this. Two or more oxide semiconductor layers can be provided for each slit portion 137, and multiple transistors can be formed with each layer serving as a channel formation region. Figure 10 shows an example in which multiple transistors (transistors 100A, 100B, and 100C) are provided for each slit portion 137. Multiple transistors (transistors 100A and 100B) can be provided in which the portion of the oxide semiconductor layer 108 that is in contact with the side surface 70 functions as a channel formation region. Alternatively, a transistor (transistor 100C) can be provided in which the portion of the oxide semiconductor layer 108 that is in contact with the side surface 70a functions as a channel formation region. This makes it possible to create a semiconductor device in which transistors are densely integrated.

[0195] Furthermore, the configuration of the insulating layer 110 and the slit portion 137 shown here can also be applied to other configuration examples.

[0196] <Configuration Example 3> Figure 11A shows a top view of a semiconductor device 10F, which is one embodiment of the present invention. Figure 11B shows a cross-sectional view of the cross-section along the dashed line A1-A2 shown in Figure 11A. Figure 11C shows a cross-sectional view of the cross-section along the dashed line B1-B2 shown in Figure 11A.

[0197] Figures 12A to 12C show perspective views of the semiconductor device 10F. Figure 12B shows a cross-section along the dashed line C1-C2 shown in Figure 12A. Figure 12C is a perspective view in which the conductive layer 104 and insulating layer 106 shown in Figure 12A are omitted.

[0198] The semiconductor device 10F includes a transistor 100 and an insulating layer 110. The semiconductor device 10F differs from the semiconductor device 10E shown in Figure 7, etc., in that it does not have an insulating layer 110 on the side surface 70a. In addition, the insulating layer 110 has been removed in areas other than the area where the conductive layer 112b is provided.

[0199] <Configuration Example 4> Figure 13A shows a top view of a semiconductor device 10G, which is one embodiment of the present invention. Figure 13B shows a cross-sectional view of the cross-section along the dashed line A1-A2 shown in Figure 13A. Figure 13C shows a cross-sectional view of the cross-section along the dashed line B1-B2 shown in Figure 13A.

[0200] The semiconductor device 10G differs from the semiconductor device 10 shown in Figure 1, etc., in that it does not have an oxygen blocking layer, and the conductive layer 112b is formed after the oxide semiconductor layer 108.

[0201] The conductive layer 112c formed at the bottom of the opening 141 has the same effect as the oxygen blocking layer 301 of the semiconductor device 10, and can suppress the increase in contact resistance between the conductive layer 112a and the oxide semiconductor layer 108.

[0202] The opening 141 provided in the insulating layer 110 is preferably provided in a so-called reverse tapered shape. This structure prevents the conductive layer from being formed on the side walls of the opening when the conductive layer 112b and conductive layer 112c are formed.

[0203] The conductive layer 112b and conductive layer 112c can be suitably deposited using the sputtering method. By employing highly anisotropic sputtering conditions, the film can be deposited only on the surface of the oxide semiconductor layer 108 parallel to the substrate surface, and not on the sidewalls of the opening 141 (the portion along the side surface of the insulating layer 110 in the oxide semiconductor layer 108).

[0204] Even when conductive layers 112b and 112c are deposited under highly anisotropic deposition conditions, a thin conductive layer may still be formed on the sidewall of the opening 141. In such cases, the thin conductive layer formed on the sidewall can be removed by isotropic dry etching or wet etching.

[0205] This configuration eliminates the need for an oxygen block layer, thus simplifying the process.

[0206] <Example of Manufacturing Method> Here, an example of a manufacturing method for the semiconductor device 10 shown in Figures 1A to 1C will be explained using Figures 14A to 16D. Figures 14A to 16D show side by side the cross-sectional view between the dashed-dotted lines A1-A2 and the cross-sectional view between the dashed-dotted lines B1-B2 shown in Figure 1A.

[0207] First, a conductive film to be formed as the conductive layer 112a is deposited on the substrate 102, and the conductive film is processed to form the conductive layer 112a (Figure 14A). Sputtering is preferably used for depositing the conductive film. The materials described above can be used as the conductive layer 112a. Here, a laminated film of copper and ITO is used.

[0208] Next, an insulating film 110af, which will become the insulating layer 110a, and an insulating film 110bf, which will become the insulating layer 110b, are formed on the conductive layer 112a (Figure 14B).

[0209] The insulating film 110af and insulating film 110bf can preferably be formed by sputtering or PECVD. It is preferable to form insulating film 110bf without exposing the surface of insulating film 110af to the atmosphere after forming insulating film 110af. This suppresses the adhesion of airborne impurities such as water and organic matter to the surface of insulating film 110af.

[0210] The substrate temperature during the formation of insulating film 110af and insulating film 110bf is preferably 180°C to 450°C, more preferably 200°C to 450°C, more preferably 250°C to 450°C, more preferably 300°C to 450°C, more preferably 300°C to 400°C, and more preferably 350°C to 400°C. By setting the substrate temperature during the formation of insulating film 110af and insulating film 110bf within the above range, the amount of impurities (e.g., water and hydrogen) released from the film itself can be reduced, and the diffusion of impurities into the oxide semiconductor layer 108 can be suppressed. Therefore, a transistor with good electrical characteristics and high reliability can be obtained.

[0211] Furthermore, since the insulating film 110af and insulating film 110bf are formed before the oxide semiconductor layer 108, there is no need to worry about oxygen being released from the oxide semiconductor layer 108 due to the heat applied during the formation of the insulating film 110af and insulating film 110bf.

[0212] After forming the insulating film 110af and insulating film 110bf, a heat treatment can be performed. By performing the heat treatment, impurities (e.g., water and hydrogen) can be removed from the insulating film 110af and from the insulating film 110bf and from its surface.

[0213] Next, it is preferable to supply oxygen to the insulating film 110bf (Figure 14C). For example, oxygen can be supplied to the insulating film 110bf by forming an oxide film on the insulating film 110bf by sputtering in an oxygen-containing atmosphere. Alternatively, oxygen radicals, oxygen atoms, oxygen atomic ions, or oxygen molecular ions can be supplied to the insulating film 110bf by ion implantation or plasma treatment. As the plasma treatment, a device that generates plasma from oxygen gas using high-frequency power can be suitably used. Examples of devices that generate plasma from gas using high-frequency power include PECVD devices, plasma etching devices, and plasma ashing devices. Plasma treatment is preferably performed in an oxygen-containing atmosphere. For example, oxygen, nitrous oxide (N) 2 O), Nitrogen dioxide (NO)2 It is preferable to perform the plasma treatment in an atmosphere containing one or more of the following: carbon monoxide and carbon dioxide. The amount of oxygen supplied can be adjusted, for example, by the power and treatment time in the plasma treatment.

[0214] Furthermore, after forming a film on the insulating film 110bf that suppresses oxygen desorption, oxygen can be supplied to the insulating film 110bf through the film. It is preferable to remove the film after supplying oxygen. As the film that suppresses oxygen desorption mentioned above, a conductive film or semiconductor film having one or more of indium, zinc, gallium, tin, aluminum, chromium, tantalum, titanium, molybdenum, nickel, iron, cobalt, and tungsten can be used.

[0215] Next, an insulating film 110cf, which will become the insulating layer 110c, is deposited on the insulating film 110bf (Figure 14D). The formation of the insulating film 110cf can be found in the description of the formation of the insulating film 110af, so a detailed explanation is omitted.

[0216] Next, a conductive film 112bf, which will become the conductive layer 112b, is deposited on the insulating film 110cf (Figure 14E). Sputtering can be suitably used to deposit the conductive film 112bf.

[0217] Next, the conductive film 112bf is processed to form the conductive layer 112B (Figure 15A). The conductive layer 112B later becomes the conductive layer 112b. For example, a wet etching method can be suitably used to form the conductive layer 112B. The processing of the conductive film 112bf may be performed after the processing of the oxide semiconductor layer 108 or after the processing of the oxygen block layer 302. Alternatively, the processing of the conductive film 112bf may be performed at the same time as the processing of the oxygen block layer 302 (see Figure 5).

[0218] Next, a portion of the conductive layer 112B and portions of the insulating films 110af, 110bf, and 110cf are removed to form an opening 141 (Figure 15B). A wet etching method can be preferably used to form the conductive layer 112b. A dry etching method can be preferably used to form the insulating layer 110. The conductive layer 112a is exposed by the formation of the opening 141.

[0219] The opening 141 can be formed in a single photolithography step. Specifically, a resist mask can be formed on the conductive layer 112B, a portion of the conductive layer 112B can be removed using the resist mask, and a portion of the insulating film 110af, insulating film 110bf, and insulating film 110cf can be removed using the same resist mask to form the opening 141. The opening 141 can also be formed using different resist masks for processing the conductive layer 112B and for processing the insulating films 110af, insulating film 110bf, and insulating film 110cf.

[0220] The angle θ110 between the conductive layer 112b and the insulating layer 110 and the conductive layer 112a in a cross-sectional view of the opening 141 is preferably 90 degrees or approximately 90 degrees. Alternatively, the shape of the side surfaces of the conductive layer 112b and the insulating layer 110 is preferably such that it is eaves-shaped or inversely tapered (Figures 6A to 6C). By adopting such a shape, the oxide semiconductor layer 108 can be deposited along the side wall of the opening 141, and the deposition conditions can be selected such that the oxygen block layer is not deposited on the side wall, making it easier to form the oxygen block layer 302 and the oxygen block layer 301.

[0221] Instead of the opening 141, a slit portion 137 may be formed (Figures 7A to 7C). Alternatively, the insulating layer 110 outside the region where the conductive layer 112b is provided may be removed to expose the conductive layer 112a (Figures 11A to 11C).

[0222] Next, a metal oxide film 108f, which will become the oxide semiconductor layer 108, is formed to cover the inner wall of the opening 141 (Figure 15C). The metal oxide film 108f is provided in contact with the upper and side surfaces of the conductive layer 112b, the upper and side surfaces of the insulating layer 110, and the upper surface of the conductive layer 112a. For details on the formation of the metal oxide film 108f, please refer to the previous description.

[0223] Before forming the metal oxide film 108f, it is preferable to perform at least one of the following: a treatment to desorb water, hydrogen, and organic matter adsorbed on the surface of the insulating layer 110, and a treatment to supply oxygen into the insulating layer 110. For example, a heat treatment can be performed in a reduced-pressure atmosphere at a temperature of 70°C to 200°C. Alternatively, a plasma treatment can be performed in an oxygen-containing atmosphere. Alternatively, nitrous oxide (N) can be used. 2 Oxygen can be supplied to the insulating layer 110 by plasma treatment in an atmosphere containing an oxidizing gas such as 0). Plasma treatment containing nitrous oxide gas can suitably remove organic matter from the surface of the insulating layer 110 while supplying oxygen. After such treatment, it is preferable to continuously form a metal oxide film 108f without exposing the surface of the insulating layer 110 to the atmosphere.

[0224] Next, a heat treatment may be performed. The heat treatment causes the metal oxide film 108f to crystallize, and a crystallized metal oxide film 108f can be obtained. However, the heat treatment may be omitted here and performed in a later step. For example, after the formation of the oxygen block layer 302 and the oxygen block layer 301, the heat treatment is performed before processing the metal oxide film 108f into island shapes. By processing the metal oxide film 108f, which has been crystallized by the heat treatment, into island shapes, a crystallized oxide semiconductor layer 108 can be obtained. Alternatively, the heat treatment may be performed after processing the metal oxide film 108f into island shapes (forming the oxide semiconductor layer 108).

[0225] Alternatively, this process can be combined with a heat treatment performed in a later step. In some cases, a heat treatment in a later step (for example, a film deposition process) can also serve as this heat treatment.

[0226] Heat treatment can remove hydrogen and water contained in the metal oxide film 108f or oxide semiconductor layer 108, as well as those adsorbed on its surface. Heat treatment can also supply oxygen from the insulating layer 110b to the metal oxide film 108f or oxide semiconductor layer 108.

[0227] Next, the oxygen block layer 302f and oxygen block layer 301 are formed by covering the metal oxide film 108f, the conductive layer 112b, and the insulating layer 110 (Figure 15D). For example, sputtering can be used to form the oxygen block layer 302f and oxygen block layer 301. For details on the deposition of the oxygen block layer 302f and oxygen block layer 301, please refer to the above description.

[0228] Even when oxygen blocking layers 302f and 301 are formed under highly anisotropic deposition conditions, a thin layer of oxygen blocking layer may still be formed on the sidewall of the opening 141. In such cases, the thin layer of oxygen blocking layer formed on the sidewall can be removed by isotropic dry etching or wet etching.

[0229] Next, the metal oxide film 108f and the oxygen block layer 302f are processed into island shapes to form the oxide semiconductor layer 108 and the oxygen block layer 302 (Figure 16A). For the formation of the oxygen block layer 302f, either a dry etching method or a wet etching method can be appropriately selected depending on the material used for the oxygen block layer. Furthermore, a wet etching method can be suitably used for the formation of the oxide semiconductor layer 108.

[0230] Next, an insulating layer 106 is formed by covering the oxygen block layer 302, the oxygen block layer 301, the oxide semiconductor layer 108, the conductive layer 112b, and the insulating layer 110 (Figure 16B). The insulating layer 106 can be formed by, for example, the PECVD method, the sputtering method, or the ALD method.

[0231] Next, it is preferable to supply oxygen to the insulating layer 106. For example, oxygen can be supplied to the insulating layer 106 by forming an oxide film on the insulating layer 106 by sputtering in an oxygen-containing atmosphere. Alternatively, oxygen radicals, oxygen atoms, oxygen atom ions, or oxygen molecular ions can be supplied to the insulating layer 106 by ion implantation or plasma treatment.

[0232] Next, a conductive layer 104 is formed on the insulating layer 106 (Figures 16C and 16D). The conductive film 104f that will become the conductive layer 104 can be suitably formed by, for example, sputtering, thermal CVD (including MOCVD), or ALD.

[0233] Next, an insulating layer 218 is formed (Figure 16D). The PECVD method can be suitably used to form the insulating layer 218.

[0234] By following the above steps, a semiconductor device 10 according to one aspect of the present invention can be manufactured.

[0235] This embodiment can be combined with other embodiments as appropriate. Furthermore, if multiple modifications and configuration examples are shown within a single embodiment in this specification, the modifications and configuration examples can be combined as appropriate.

[0236] (Embodiment 2) This embodiment describes an indium oxide film that can be used in the semiconductor layer of a transistor in a semiconductor device according to one aspect of the present invention.

[0237] In this specification, indium oxide having at least a crystalline portion or crystalline region in the film is referred to as crystalline indium oxide (crystal IO) or crystalline indium oxide (crystalline IO). Examples of crystal IO or crystalline IO include single-crystal indium oxide, polycrystalline indium oxide, and microcrystalline indium oxide.

[0238] Indium oxide is a semiconductor material with completely different physical properties from oxide semiconductors such as In-Ga-Zn oxide (hereinafter also referred to as IGZO) and zinc oxide.

[0239] This paper describes the carrier concentration dependence of the hole mobility of indium oxide, silicon, and IGZO.

[0240] IGZO tends to exhibit higher hole mobility as the carrier concentration increases. On the other hand, single-crystal indium oxide tends to exhibit higher hole mobility as the carrier concentration decreases. This trend is similar to that of silicon, where lower dopant (impurity) concentrations in the material reduce impurity scattering and increase hole mobility. In other words, the higher the purity and intrinsic nature of single-crystal indium oxide, the higher its hole mobility. From these results, it can be said that single-crystal indium oxide, unlike IGZO, is a material with physical properties similar to silicon. Note that when indium oxide is not single-crystal (e.g., polycrystalline), the trend may differ from that of single crystals.

[0241] The range of carrier concentrations suitable for the channel formation region of a transistor is 1 × 10⁻⁶. 15 cm −3 This range includes, for example, 1 × 10 14 cm −3 The above is 1 x 10 18 cm −3 The range is as follows: By sufficiently reducing the carrier concentration, the hole mobility value can be increased to 270 cm⁻¹. 2 It can be expected to be raised to the level of / (V・s).

[0242] Indium oxide can contain elements that lower the carrier concentration. Examples of elements that lower the carrier concentration include magnesium, calcium, zinc, cadmium, and copper. These elements can lower the carrier concentration by substituting for indium. Other examples include nitrogen, phosphorus, arsenic, and antimony. These elements can lower the carrier concentration by substituting for oxygen.

[0243] On the other hand, electrical resistance can be reduced by increasing the carrier concentration. For example, the suitable carrier concentration range for the source and drain regions of a transistor, or for a resistor or transparent conductive film, is when the carrier concentration value is 1 × 10⁻⁶ 20 cm −3 This range includes, for example, 1 × 10 19 cm −3 The above is 1 x 10 22 cm −3The range is as follows: By making the carrier concentration sufficiently high, the resistivity can be increased to 1 × 10⁻⁶. −4 It is expected that the level can be reduced to below Ω·cm.

[0244] Indium oxide may contain elements that increase the carrier concentration. For example, it is preferable to include elements common to the source and drain electrodes of the transistor. Examples of elements that increase the carrier concentration include titanium, zirconium, hafnium, tantalum, tungsten, molybdenum, tin, silicon, and boron. In particular, it is more preferable to use elements in which the oxide is conductive or semiconducting.

[0245] Because indium oxide is an oxide whose valence electrons can be controlled, the region with a low carrier concentration can be used for the channel formation region of the transistor, and the region with a high carrier concentration can be used for the source and drain regions of the transistor. This makes it possible to create a so-called n-i-n junction (a junction between an n-type region, an i-type region, and an n-type region). Valence electron control in transistors using silicon is generally known. On the other hand, valence electron control in transistors using indium oxide is a novel technological concept that would not normally be conceived. By using this technological concept, it is possible to realize a transistor with high mobility, low off-current, normally-off capability, and high reliability.

[0246] The indium oxide film is preferably crystalline. In particular, the indium oxide film is preferably polycrystalline, and more preferably single-crystal. A single-crystal film does not have grain boundaries. By using a single-crystal film, carrier scattering at grain boundaries can be suppressed, enabling the realization of transistors that exhibit high field-effect mobility. Furthermore, it has the excellent effect of suppressing variations in transistor characteristics caused by these grain boundaries.

[0247] Furthermore, polycrystalline films are preferable because they can reduce carrier scattering and exhibit high field-effect mobility compared to microcrystalline or amorphous films. When using polycrystalline films, it is preferable to use films with the largest possible grain size and few grain boundaries. In a transistor to which a polycrystalline film is applied, if there are no grain boundaries in the channel formation region, or if no grain boundaries are observed, the channel formation region is located within the single-crystal region contained in the polycrystalline film, and therefore it can be considered a transistor to which a single-crystal film is applied.

[0248] The crystallinity of indium oxide can be analyzed, for example, by X-ray diffraction (XRD), transmission electron microscopy (TEM), or electron diffraction (ED). Alternatively, a combination of these methods may be used for analysis.

[0249] Furthermore, in this specification, a semiconductor layer in which no grain boundaries are observed in the channel formation region, a semiconductor layer in which the channel formation region is contained within a single crystal grain, or a semiconductor layer in which the crystal axis directions are the same in at least two regions within the channel formation region can be considered as a single crystal film.

[0250] The channel formation region refers to the region of the semiconductor layer that overlaps with (or faces) the gate electrode via the gate insulating layer, and is located between the region in contact with the source electrode and the region in contact with the drain electrode. The crystal grains, grain boundaries, crystal axes, and crystal orientation in the channel formation region can be confirmed by cross-sectional observation including the semiconductor layer, source electrode, and drain electrode.

[0251] Impurities in the indium oxide film can act as a source of carrier scattering, thus potentially causing a decrease in field-effect mobility and inhibiting crystal growth. Examples of impurities in the indium oxide film include boron and silicon. In the channel-forming region of the indium oxide film, lower concentrations of these impurities are preferable. For example, the concentration of each of the above impurity elements should be 0.1% or less, more preferably 0.01% (100 ppm) or less. Note that elements such as carbon and hydrogen may be present in the deposition gas or precursor during film formation, and may remain in the indium oxide film in higher concentrations than the above impurities.

[0252] Furthermore, the indium oxide film may contain elements that can become trivalent cations like indium, as long as their crystals maintain a cubic crystal structure (Bixbite type). Examples include Group 13 elements of the periodic table such as gallium and aluminum, and Group 3 elements of the periodic table. Since these elements mainly exist as trivalent cations in the oxide, the carrier concentration of indium oxide can be kept low.

[0253] By using such an indium oxide film in a transistor, the field-effect mobility of the transistor can be increased to 50 cm². 2 / (V·s) or more, preferably 100 cm 2 / (V·s) or more, more preferably 150 cm 2 / (V·s) or more, more preferably 200 cm 2 / (V·s) or more, more preferably 250 cm 2 It can be set to (V・s) or more.

[0254] One of the characteristics of indium oxide films is their higher oxygen permeability (diffusivity) compared to IGZO films. For example, oxygen diffusing into an indium oxide film permeates the film and is released as oxygen molecules. In some cases, it may also be released as water molecules by reacting with hydrogen contained in the film. Furthermore, if there is an oxygen deficiency in the film, diffusing oxygen atoms will fill the deficiency. Because oxygen diffuses easily through indium oxide films, it can be said that oxygen deficiencies are more easily filled in compared to IGZO films.

[0255] Thus, because indium oxide films are more likely to reduce oxygen vacancies in the film compared to IGZO films, applying such indium oxide films to transistors makes it possible to realize transistors with extremely high reliability.

[0256] Furthermore, the indium oxide film diffuses hydrogen. Hydrogen diffusing into the indium oxide film from the outside permeates the film and is released as hydrogen molecules. Alternatively, it reacts with oxygen contained in the film and is released as water molecules.

[0257] Indium oxide is characterized by a small effective electron mass and a large effective hole mass. Furthermore, the effective electron mass of indium oxide is largely independent of the crystal orientation. Therefore, using crystalline indium oxide in transistors allows for the realization of transistors with high field-effect mobility and high frequency characteristics (also known as f-response). Moreover, due to the large effective hole mass, transistors with extremely low off-currents can be realized. For example, by applying an indium oxide film to a transistor, the off-current per 1 μm of channel width is 1 fA (1 × 10⁻¹⁶) at 125°C. −15 A) Less than or equal to, or 1aA (1 × 10 −18 A) Less than or equal to 1aA (1 × 10) in a room temperature (25°C) environment. −18 A) Less than or equal to, or 1zA (1 × 10⁻¹⁰ −21 A) The following is possible. Furthermore, because indium oxide has a smaller effective electron mass and a larger effective hole mass than silicon, it may be possible to realize transistors with higher field-effect mobility and lower off-current than Si transistors.

[0258] It is preferable to provide a seed layer so as to be in contact with at least a portion of the crystalline indium oxide film. It is preferable to use a material containing crystals with a small difference in lattice constant (also called lattice mismatch) with the indium oxide for the seed layer. This improves the crystallinity of the indium oxide film. A substrate (e.g., a single-crystal substrate) may be used as one of the layers in contact with at least a portion of the crystalline indium oxide film.

[0259] One method for evaluating the degree of lattice mismatch is to use the following lattice mismatch value. The lattice mismatch Δa [%] of the crystals in the formed film (in this case, the indium oxide film) relative to the crystals in the seed layer is given by Δa = ((L 1 -L 2 ) / L 2 It is calculated as ) × 100. Here L 1 L is the length of the unit cell vector of the crystals in the formed film, or the lattice constant. 2 This is the length of the unit cell vector of the crystal in the seed layer, or the lattice constant.

[0260] The lattice mismatch Δa between the seed layer and the indium oxide film is preferably small in absolute value, and most preferably zero. For example, Δa can be -5% or more and 5% or less, preferably -4% or more and 4% or less, more preferably -3% or more and 3% or less, and even more preferably -2% or more and 2% or less.

[0261] Here, the indium oxide crystal has a cubic structure (bixbite type). For example, yttria-stabilized zirconia (YSZ) crystals can have a cubic structure (fluorite type). The lattice mismatch of the indium oxide crystal with respect to the cubic YSZ crystal is in the range of -2% to 2%, and a single crystal film of indium oxide can be epitaxially grown on a YSZ substrate.

[0262] Furthermore, the crystal structure of the seed layer and the crystal structure of the indium oxide film do not necessarily have to be the same in terms of crystal system or crystal orientation. For example, a film with a hexagonal or trigonal crystal structure can be used beneath an indium oxide film with a cubic crystal structure. For example, by setting the crystal orientation of the surface of the seed layer to

[001] and the crystal orientation of the underside of the indium oxide film to

[111] , the requirements related to crystal orientation necessary for epitaxial growth can be met. Examples of hexagonal or trigonal crystals include wurtzite-type structures and YbFe. 2 O 4 Type structure, Yb 2 Fe 3 O 7 These include type structures and their modified forms. YbFe 2 O4 Type structure or Yb 2 Fe 3 O 7 An example of a crystal having a type structure is IGZO.

[0263] This embodiment can be implemented in appropriate combination with other embodiments described herein, at least in part.

[0264] (Embodiment 3) In this embodiment, a display device according to one aspect of the present invention will be described with reference to Figures 17 to 22.

[0265] The display device of this embodiment can be a high-resolution display device or a large-screen display device. Therefore, the display device of this embodiment can be used in electronic devices with relatively large screens, such as television equipment, desktop or notebook computers, computer monitors, digital signage, and large game machines such as pachinko machines, as well as in the display units of digital cameras, digital video cameras, digital photo frames, mobile phones, portable game consoles, personal information terminals, and audio playback devices.

[0266] The display device of this embodiment can be a high-definition display device. Therefore, the display device of this embodiment can be used, for example, as a display unit for information terminals (wearable devices) such as wristwatches and bracelets, as well as as a display unit for wearable devices that can be worn on the head, such as VR devices such as head-mounted displays (HMDs) and AR devices such as glasses.

[0267] A semiconductor device according to one aspect of the present invention can be used in a display device or a module having said display device. That is, the transistor shown in Embodiment 1 can be used in a display device or a module having said display device. Examples of modules having said display devices include a module to which a connector such as a flexible printed circuit board (FPC) or TCP (Tape Carrier Package) is attached, and a module on which an integrated circuit (IC) is mounted using the COG (Chip On Glass) method or COF (Chip On Film) method.

[0268] The display device of this embodiment may also function as a touch panel. For example, the display device can be fitted with various detection elements (also called sensor elements) that can detect the proximity or contact of an object to be detected, such as a finger.

[0269] Examples of sensor types include capacitive, resistive, surface acoustic wave, infrared, optical, and pressure-sensitive sensors.

[0270] Examples of capacitance methods include surface capacitance and projected capacitance. Furthermore, projected capacitance methods include self-capacitance and mutual capacitance. Mutual capacitance is preferable because it enables simultaneous multi-point detection.

[0271] Examples of touch panels include out-cell, on-cell, and in-cell types. An in-cell type touch panel refers to a configuration in which electrodes constituting the sensing element are provided on one or both of the substrate supporting the display element and the opposing substrate.

[0272] <Example of Display Device Configuration 1> Figure 17A shows a perspective view of the display device 50A.

[0273] The display device 50A has a configuration in which substrate 152 and substrate 151 are bonded together. In Figure 17A, substrate 152 is shown with a dashed line.

[0274] The display device 50A includes a display unit 162, a connection unit 140, a circuit unit 164, a conductive layer 165, etc. Figure 17A shows an example in which the IC 173 and FPC 172 are mounted on the display device 50A. Therefore, the configuration shown in Figure 17A can also be described as a display module having the display device 50A, an IC, and an FPC.

[0275] The connection portion 140 is provided on the outside of the display unit 162. The connection portion 140 can be provided along one or more sides of the display unit 162. There may be one or more connection portions 140. Figure 17A shows an example in which the connection portion 140 is provided so as to surround all four sides of the display unit 162. The connection portion 140 connects the common electrode of the display element to the conductive layer, and can supply potential to the common electrode.

[0276] The circuit section 164 may include, for example, a scan line drive circuit (also called a gate driver). Alternatively, the circuit section 164 may include both a scan line drive circuit and a signal line drive circuit (also called a source driver).

[0277] The conductive layer 165 has the function of supplying signals and power to the display unit 162 and the circuit unit 164. These signals and power are input to the conductive layer 165 from the outside via the FPC 172, or from the IC 173.

[0278] Figure 17A shows an example in which IC 173 is provided on the substrate 151 using a COG (Cambodia Grading) or COF (Cambodia Frame) method. IC 173 can be an IC having, for example, one or both of a scan line drive circuit and a signal line drive circuit. Note that the display device 50A and the display module may be configured without an IC. Alternatively, the IC may be mounted on an FPC using a COF method or the like.

[0279] A semiconductor device according to one aspect of the present invention can be applied, for example, to one or both of the display unit 162 and the circuit unit 164 of a display device 50A. Oxide semiconductors (OS) can preferably be used in the channel formation region of the transistors in the display device. By using OS transistors, a display device with low power consumption can be made. Furthermore, the semiconductor device according to one aspect of the present invention can be used in both the display unit 162 and the circuit unit 164, that is, all of the transistors in the display device can be OS transistors. By making all of the transistors in the display device OS transistors in this way, the manufacturing cost can be kept low.

[0280] For example, when a semiconductor device according to one aspect of the present invention is applied to the pixel circuit of a display device, the occupied area of ​​the pixel circuit can be reduced, resulting in a high-definition display device. Also, for example, when a semiconductor device according to one aspect of the present invention is applied to the drive circuit of a display device (for example, one or both of a gate line drive circuit and a source line drive circuit), the occupied area of ​​the drive circuit can be reduced, resulting in a narrow-bezel display device. Furthermore, because the semiconductor device according to one aspect of the present invention has good electrical characteristics, its use in a display device can improve the reliability of the display device.

[0281] The display unit 162 is the area in the display device 50A that displays images, and has a plurality of pixels 201 arranged periodically. Figure 17A shows a magnified view of one pixel 201.

[0282] There are no particular limitations on the pixel arrangement in the display device of this embodiment, and various methods can be applied. Examples of pixel arrangements include stripe arrangements, S-stripe arrangements, matrix arrangements, delta arrangements, Bayer arrangements, and pentile arrangements.

[0283] The pixel 201 shown in Figure 17A has a sub-pixel 11R that emits red light, a sub-pixel 11G that emits green light, and a sub-pixel 11B that emits blue light. The number of sub-pixels that a single pixel has is not particularly limited.

[0284] Each sub-pixel 11R, 11G, and 11B includes a display element and a circuit that controls the driving of the display element.

[0285] Various elements can be used as display elements, such as liquid crystal elements and light-emitting elements. In addition, display elements using shutter-type or optical interference-type MEMS (Micro Electro Mechanical Systems), microcapsule-type, electrophoretic-type, electrowetting-type, or electronic powder fluid (registered trademark)-type may also be used. Furthermore, a QLED (Quantum-dot LED) using a light source and color conversion technology using quantum dot materials may also be used.

[0286] Examples of quantum dot materials used in the color conversion layer include Group 14 elements, Group 15 elements, Group 16 elements, compounds consisting of multiple Group 14 elements, compounds of elements belonging to Groups 4 to 14 and Group 16 elements, compounds of Group 2 elements and Group 16 elements, compounds of Group 13 elements and Group 15 elements, compounds of Group 13 elements and Group 17 elements, compounds of Group 14 elements and Group 15 elements, compounds of Group 11 elements and Group 17 elements, iron oxides, titanium oxides, chalcogenide spinels, and various semiconductor clusters.

[0287] Specifically, cadmium selenide, cadmium sulfide, cadmium telluride, zinc selenide, zinc oxide, zinc sulfide, zinc telluride, mercury sulfide, mercury selenide, mercury telluride, indium arsenide, indium phosphide, gallium arsenide, gallium phosphide, indium nitride, gallium nitride, indium antimonide, gallium antimonide, aluminum phosphide, aluminum arsenide, aluminum antimonide, lead selenide, lead telluride, lead sulfide, indium selenide, telluride Indium sulfide, indium sulfide, gallium selenide, arsenic sulfide, arsenic selenide, arsenic telluride, antimony sulfide, antimony selenide, antimony telluride, bismuth sulfide, bismuth selenide, bismuth telluride, silicon, silicon carbide, germanium, tin, selenium, tellurium, boron, carbon, phosphorus, boron nitride, boron phosphide, boron arsenide, aluminum nitride, aluminum sulfide, barium sulfide, barium selenide, barium telluride, calcium sulfide, gallium selenide Calcium, calcium telluride, beryllium sulfide, beryllium selenide, beryllium telluride, magnesium sulfide, magnesium selenide, germanium sulfide, germanium selenide, germanium telluride, tin sulfide, tin selenide, tin telluride, lead oxide, copper fluoride, copper chloride, copper bromide, copper iodide, copper oxide, copper selenide, nickel oxide, cobalt oxide, cobalt sulfide, iron oxide, iron sulfide, manganese oxide, molybdenum sulfide, vanadium oxide, tungsten oxide, tungsten oxide Examples include carbon dioxide, titanium dioxide, zirconium dioxide, silicon nitride, germanium nitride, aluminum oxide, barium titanate, compounds of selenium, zinc, and cadmium, compounds of indium, arsenic, and phosphorus, compounds of cadmium, selenium, and sulfur, compounds of cadmium, selenium, and tellurium, compounds of indium, gallium, and arsenic, compounds of indium, gallium, and selenium, compounds of indium, selenium, and sulfur, compounds of copper, indium, and sulfur, and combinations thereof. In addition, so-called alloy-type quantum dots, in which the constituent elements are expressed in any ratio, may also be used.

[0288] Examples of quantum dot structures include core-type, core-shell-type, and core-multishell-type structures. Furthermore, because quantum dots have a high proportion of surface atoms, they are highly reactive and prone to aggregation. Therefore, it is preferable that a protective agent or protective group is attached to the surface of the quantum dots. This attachment of a protective agent or protective group prevents aggregation and improves solubility in solvents. It also reduces reactivity and improves electrical stability.

[0289] As the size of a quantum dot decreases, its band gap increases, so its size is adjusted appropriately to obtain light of a desired wavelength. As the size decreases, the emission of quantum dots shifts towards the blue side, that is, towards higher energy, so by changing the size of the quantum dots, the emission wavelength can be adjusted across the ultraviolet, visible, and infrared spectral wavelength ranges. The size (diameter) of a quantum dot is, for example, 0.5 nm to 20 nm, preferably 1 nm to 10 nm. Furthermore, the narrower the size distribution of quantum dots, the narrower the emission spectrum becomes, and the better the color purity of the emission can be obtained. The shape of the quantum dots is not particularly limited and may be spherical, rod-shaped, disc-shaped, or other shapes. A quantum rod, which is a rod-shaped quantum dot, has the function of exhibiting directional light.

[0290] The color conversion layer can be formed using methods such as droplet ejection (e.g., inkjet), coating, imprint, and various printing methods (screen printing, offset printing). Alternatively, a color conversion film such as a quantum dot film may be used.

[0291] When processing the film that will become the color conversion layer, it is preferable to use photolithography. Photolithography includes a method in which a resist mask is formed on the thin film to be processed, the thin film is processed by etching or the like, and the resist mask is removed, and a method in which a photosensitive thin film is formed, and then exposed and developed to process the thin film into a desired shape. For example, an island-shaped color conversion layer can be formed by forming a thin film using a material in which quantum dots are mixed with photoresist, and then processing the thin film using photolithography.

[0292] Examples of display devices using liquid crystal elements include transmissive liquid crystal display devices, reflective liquid crystal display devices, and semi-transmissive liquid crystal display devices.

[0293] Modes that can be used in display devices using liquid crystal elements include, for example, Vertical Alignment (VA) mode, FFS (Fringe Field Switching) mode, IPS (In-Plane-Switching) mode, TN (Twisted Nematic) mode, ASM (Axially Symmetric aligned Micro-cell) mode, OCB (Optically Compensated Birefringence) mode, FLC (Ferroelectric Liquid Crystal) mode, AFLC (AntiFerroelectric Liquid Crystal) mode, and ECB (Electrically Examples of VA modes include Controlled Birefringence mode and Guest Host mode. Examples of VA modes include MVA (Multi-Domain Vertical Alignment) mode, PVA (Patterned Vertical Alignment) mode, and ASV (Advanced Super View) mode.

[0294] Examples of liquid crystal materials that can be used in liquid crystal elements include thermotropic liquid crystals, low molecular weight liquid crystals, polymer liquid crystals, polymer dispersed liquid crystals (PDLC), polymer network liquid crystals (PNLC), ferroelectric liquid crystals, and antiferroelectric liquid crystals. Depending on the conditions, these liquid crystal materials exhibit cholesteric phases, smectic phases, cubic phases, chiral nematic phases, isotropic phases, blue phases, etc. Furthermore, either positive-type or negative-type liquid crystals may be used as the liquid crystal material, and can be selected according to the applied mode or design.

[0295] Examples of light-emitting elements include self-emissive light-emitting elements such as LEDs (Light Emitting Diodes), OLEDs (Organic LEDs), and semiconductor lasers. For example, mini-LEDs and micro-LEDs can be used as LEDs.

[0296] Examples of light-emitting materials for light-emitting devices include fluorescent materials, phosphorescent materials, thermally activated delayed fluorescence (TADF) materials, and inorganic compounds (such as quantum dot materials).

[0297] The light-emitting element can emit light in the following colors: infrared, red, green, blue, cyan, magenta, yellow, or white. Furthermore, the color purity can be improved by adding a microcavity structure to the light-emitting element.

[0298] Of the pair of electrodes in a light-emitting element, one electrode functions as the anode and the other electrode functions as the cathode.

[0299] Furthermore, a display device according to one aspect of the present invention may be any of the following: a top-emission type that emits light in the direction opposite to the substrate on which the light-emitting element is formed; a bottom-emission type that emits light toward the substrate on which the light-emitting element is formed; or a dual-emission type that emits light on both sides.

[0300] Figure 17B is a block diagram illustrating the display device 50A. The display device 50A has a display unit 162 and a circuit unit 164. The display unit 162 has a plurality of periodically arranged pixels 230 (pixels 230[1,1] to pixels 230[m,n], where m and n are each independent integers of 2 or more). The circuit unit 164 has a first drive circuit unit 231 and a second drive circuit unit 232.

[0301] The circuit included in the first drive circuit section 231 functions, for example, as a scan line drive circuit (also called a gate line drive circuit, gate driver, scan driver, or low driver). The circuit included in the second drive circuit section 232 functions, for example, as a signal line drive circuit (also called a source line drive circuit, source driver, data driver, or column driver). Note that some circuit may be provided at a position facing the first drive circuit section 231 across the display section 162. Similarly, some circuit may be provided at a position facing the second drive circuit section 232 across the display section 162.

[0302] The circuit section 164 can utilize various circuits, including shift register circuits, level shifter circuits, inverter circuits, latch circuits, analog switch circuits, demultiplexer circuits, and logic circuits. The circuit section 164 can also utilize transistors and capacitive elements. The transistors in the circuit section 164 can be formed using the same process as the transistors in the pixel 230.

[0303] The display device 50A includes wiring 236, each arranged in parallel or approximately parallel, and whose potential is controlled by a circuit included in the first drive circuit unit 231, and wiring 238, each arranged in parallel or approximately parallel, and whose potential is controlled by a circuit included in the second drive circuit unit 232. Figure 17B shows an example in which wiring 236 and wiring 238 are connected to a pixel 230. However, wiring 236 and wiring 238 are just examples, and the wiring connected to the pixel 230 is not limited to wiring 236 and wiring 238.

[0304] In Figure 17B, the direction in which wiring 236 extends is sometimes referred to as the row direction, and the direction in which wiring 238 extends is sometimes referred to as the column direction. Note that while the horizontal direction in the drawing is considered the row direction and the vertical direction as the column direction, this is not the only way to represent them; the row and column directions can be interchanged.

[0305] One embodiment of the present invention is a semiconductor device having a vertical transistor (VFET) with a submicron-sized channel length and a large on-current. An oxide semiconductor (OS) can be suitably used in the channel formation region of the transistor, resulting in a transistor with a small off-current. The semiconductor device according to one embodiment of the present invention can be suitably used in either or both of the display unit 162 and the circuit unit 164. Furthermore, the semiconductor device according to one embodiment of the present invention can be used in both the display unit 162 and the circuit unit 164, meaning that all transistors in the display device can be OS transistors. By using OS transistors for all transistors in the display device in this way, manufacturing costs can be kept low.

[0306] <Example of Pixel Configuration> An example of the configuration of pixel 230 is shown in Figure 18A. Pixel 230 has a pixel circuit 51 and a light-emitting device 61.

[0307] The pixel circuit 51 includes transistors 52A and 52B, and a capacitive element 53. The pixel circuit 51 is a 2Tr1C type pixel circuit having two transistors and one capacitive element. The pixel circuit applicable to the display device according to one embodiment of the present invention is not particularly limited.

[0308] The anode of the light-emitting device 61 is connected to one of the source and drain electrodes of transistor 52B and one electrode of the capacitive element 53. The other source and drain of transistor 52B is connected to wiring ANO. The gate of transistor 52B is connected to one of the source and drain electrodes of transistor 52A and the other electrode of the capacitive element 53. The other source and drain of transistor 52A is connected to wiring SL. The gate of transistor 52A is connected to wiring GL. The cathode of the light-emitting device 61 is connected to wiring VCOM.

[0309] Wiring GL corresponds to wiring 236, and wiring SL corresponds to wiring 238. Wiring VCOM is a wire that provides a potential for supplying current to the light-emitting device 61. Transistor 52A has the function of controlling the conduction or non-conduction state between wiring SL and the gate of transistor 52B based on the potential of wiring GL. For example, VDD is supplied to wiring ANO, and VSS is supplied to wiring VCOM.

[0310] Transistor 52A functions as a selection transistor to control the selected state of the pixel 230. Transistor 52B functions as a drive transistor to control the amount of current flowing to the light-emitting device 61. Capacitive element 53 has the function of maintaining the gate potential of transistor 52B. The intensity of the light emitted by the light-emitting device 61 is controlled according to the image signal supplied to the gate of transistor 52B.

[0311] The aforementioned semiconductor device can be used in the pixel circuit 51. This reduces the area occupied by the pixel circuit 51, enabling a high-resolution display device. It also enables a high-speed display device.

[0312] By using multiple transistors and capacitive elements in a pixel circuit, a high-performance display device can be created. By applying a semiconductor device according to one aspect of the present invention, the occupied area can be reduced even if the number of transistors and capacitive elements increases, resulting in a high-performance and high-resolution display device. For example, a display device with a resolution of 300 ppi or more, 500 ppi or more, 1000 ppi or more, 2000 ppi or more, or 3000 ppi or more can be realized.

[0313] A semiconductor device according to one aspect of the present invention can reduce the occupied area, thereby increasing the aperture ratio of pixels in a display device with a bottom emission structure. For example, a display device with an aperture ratio of 50% or more, 55% or more, or 60% or more can be realized.

[0314] In this specification, the term "aperture ratio" refers to the ratio of the area of ​​the region from which light is emitted to the area of ​​the pixel.

[0315] Figure 18B shows an example of a different configuration of the pixel 230 from the one shown in Figure 18A. The pixel 230 has a pixel circuit 51A and a light-emitting device 61.

[0316] The pixel circuit 51A differs from the pixel circuit 51 shown in Figure 18A in that the anode of the light-emitting device 61 is connected to the wiring ANO.

[0317] One electrode of the source and drain of transistor 52B, and one electrode of the capacitive element 53, are connected to the wiring VCOM. The cathode of the light-emitting device 61 is connected to the other electrode of the source and drain of transistor 52B.

[0318] In the pixel circuit 51A, the source potential of transistor 52B, which functions as a drive transistor, is equal to the potential of the wiring VCOM. Therefore, fluctuations in the voltage (Vgs) between the gate and source of transistor 52B can be suppressed. Consequently, variations in brightness can be reduced.

[0319] Figure 18C shows an example of a different configuration from the pixel 230 shown in Figure 18A. The pixel 230 has a pixel circuit 51B and a light-emitting device 61.

[0320] Pixel circuit 51B differs from pixel circuit 51 shown in Figure 18A mainly in that it has a transistor 52C. Pixel circuit 51B has transistors 52A, 52B, 52C, and a capacitive element 53. Pixel circuit 51B is a 3Tr1C type pixel circuit having three transistors and one capacitive element.

[0321] One of the source and drain of transistor 52C is connected to one of the source and drain of transistor 52B. The other of the source and drain of transistor 52C is connected to wiring V0. For example, a reference potential is supplied to wiring V0. The gate of transistor 52C is connected to wiring GL.

[0322] Transistor 52C has the function of controlling the conduction or non-conduction state between one of the source and drain electrodes of transistor 52B and the wiring V0 based on the potential of the wiring GL. The reference potential of the wiring V0 provided via transistor 52C can suppress variations in the gate-source potential of transistor 52B.

[0323] The wiring V0 can be used to obtain current values ​​that can be used to set pixel parameters. Specifically, wiring V0 can function as a monitor line to output the current flowing through transistor 52B or the current flowing through light-emitting device 61 to the outside. The current output to wiring V0 can be converted into a voltage by a source follower circuit and output to the outside. Alternatively, it can be converted into a digital signal by an AD converter and output to the outside.

[0324] Back gates can be provided for some or all of the transistors included in the pixel circuit 51. The pixel circuit 51C shown in Figure 18D shows a configuration in which the transistor 52B of the pixel circuit 51 shown in Figure 18A has a back gate, and this back gate is connected to either the source or the drain of the transistor 52B. The pixel circuit 51D shown in Figure 18E shows a configuration in which the transistor 52B of the pixel circuit 51B shown in Figure 18C has a back gate, and this back gate is connected to either the source or the drain of the transistor 52B. This can improve reliability. It is also possible to configure the back gate of transistor 52B to be connected to the gate of transistor 52B. This can increase the on-current of transistor 52B.

[0325] Figure 19A shows an example of a different configuration from the aforementioned pixel 230. The pixel 230 has a pixel circuit 51E and a light-emitting device 61.

[0326] The pixel circuit 51E has transistors M21, M22, M23, and a capacitive element C21. The pixel circuit 51E is a 3Tr1C type pixel circuit having three transistors and one capacitive element. One of the source and drain of transistor M21 is connected to wiring SL. One of the source and drain of transistor M22 is connected to wiring ANO. One of the source and drain of transistor M23 is connected to wiring V0. The other of the source and drain of transistor M21 is connected to the gate of transistor M22 and one electrode of capacitive element C21. The other of the source and drain of transistor M22 is connected to the other of the source and drain of transistor M23, the other electrode of capacitive element C21, and the anode of light-emitting device 61. The cathode of light-emitting device 61 is connected to wiring VCOM.

[0327] The gate of transistor M21 is connected to wiring GL11. The gate of transistor M23 is connected to wiring GL12. By making the wiring to which the gate of transistor M21 is connected different from the wiring to which the gate of transistor M23 is connected, different potentials can be applied to the gates of transistor M21 and transistor M23, allowing these transistors to operate independently.

[0328] Transistor M21 functions as a selector transistor, transistor M22 functions as a drive transistor, and capacitive element C21 has the function of maintaining the gate potential of transistor M22. The intensity of the light emitted by the light-emitting device 61 is controlled according to the image signal supplied to the gate of transistor M22. For transistor M23, refer to the description relating to transistor 52C.

[0329] Figure 19B shows an example of a different configuration from the aforementioned pixel 230. The pixel 230 has a pixel circuit 51F and a light-emitting device 61.

[0330] The pixel circuit 51F has transistors M11, M12, M13, M14, M15, M16, capacitive element C11, and capacitive element C12. The pixel circuit 51F is a 6Tr2C type pixel circuit having six transistors and two capacitive elements.

[0331] The anode of the light-emitting device 61 is connected to one of the source and drain of transistor M15. The cathode of the light-emitting device 61 is connected to the wiring VCOM. The other source and drain of transistor M15 is connected to one of the source and drain of transistor M12, one of the source and drain of transistor M13, one of the source and drain of transistor M16, one electrode of capacitive element C11, and one electrode of capacitive element C12. The gate of transistor M12 is connected to one of the source and drain of transistor M11, the other source and drain of transistor M13, and the other electrode of capacitive element C11. The back gate of transistor M12 is connected to one of the source and drain of transistor M14, and the other electrode of capacitive element C12.

[0332] The source and the other drain of transistor M11 are connected to wiring SL. The source and the other drain of transistor M12 are connected to wiring ANO. The source and the other drain of transistor M14 are connected to wiring V0. The source and the other drain of transistor M16 are connected to wiring V1. For example, a constant potential is supplied to wiring V1. The gates of transistor M11 and transistor M16 are connected to wiring GL1. The gates of transistor M13 and transistor M14 are connected to wiring GL2. The gate of transistor M15 is connected to wiring GL3.

[0333] Transistor M11 functions as a selector transistor that controls the conduction or non-conduction state between the gate of transistor M12 and the wiring SL. Transistor M12 functions as a drive transistor that controls the current flowing to the light-emitting device 61. Transistor M14 has the function of changing the potential supplied from the wiring V0 to a potential corresponding to the threshold voltage of transistor M12 and supplying that potential to the back gate of transistor M12. By supplying a constant potential to the back gate of transistor M12, the threshold voltage can be controlled. Capacitor element C11 has the function of holding the gate potential of transistor M12. Capacitor element C12 has the function of holding the back gate potential of transistor M12. Pixel circuit 51F has a so-called internal threshold voltage correction function that corrects the threshold voltage of transistor M12 using the back gate. Specifically, it causes capacitor element C12 to hold a back gate potential such that the threshold voltage of transistor M12 becomes 0V. This makes it possible to correct the threshold voltage of transistor M12 to be constant at or near 0V, regardless of variations in the transistor's threshold voltage and degradation over time.

[0334] Figure 20A shows an example of a different configuration from the aforementioned pixel 230. The pixel 230 has a pixel circuit 51G and a liquid crystal device 62.

[0335] The pixel circuit 51G includes a transistor 52A and a capacitive element 53. One of the source and drain of transistor 52A is electrically connected to wiring SL, and the gate of transistor 52A is electrically connected to wiring GL. The other of the source and drain of transistor 52A is electrically connected to one terminal of the capacitive element 53 and the liquid crystal device 62. The other terminal of the capacitive element 53 is electrically connected to wiring VCOM.

[0336] As shown in Figure 20B, the pixel circuit 51H can also be configured in which the transistor 52A has a back gate. Figure 20B shows a configuration in which the back gate of transistor 52A is electrically connected to the gate.

[0337] Figure 21A shows an example of a cross-section obtained by cutting a portion of the display device 50A, including the FPC 172, a portion of the circuit section 164, a portion of the display section 162, a portion of the connection section 140, and a portion of the end section.

[0338] The display device 50A shown in Figure 21A has transistors 205D, 205R, 205G, 205B, light-emitting elements 130R, 130G, 130B, etc. between substrates 151 and 152. Light-emitting element 130R is a display element of a sub-pixel 11R that emits red light, light-emitting element 130G is a display element of a sub-pixel 11G that emits green light, and light-emitting element 130B is a display element of a sub-pixel 11B that emits blue light.

[0339] The display device 50A employs an SBS structure. Because the SBS structure allows for the optimization of materials and configurations for each light-emitting element, it increases the freedom of material and configuration selection, making it easier to improve brightness and reliability.

[0340] The display device 50A is a top-emission type. In the top-emission type, transistors and the like can be placed overlapping with the light-emitting region of the light-emitting element, which allows for a higher aperture ratio of pixels compared to the bottom-emission type.

[0341] Transistors 205D, 205R, 205G, and 205B are all formed on the substrate 151. These transistors can be manufactured using the same process. However, transistors with different structures may be used for transistors 205D, 205R, 205G, and 205B.

[0342] In this embodiment, an example is shown in which OS transistors are used for transistors 205D, 205R, 205G, and 205B. Transistors according to one aspect of the present invention can be used for transistors 205D, 205R, 205G, and 205B. In other words, the display device 50A has transistors according to one aspect of the present invention in both the display unit 162 and the circuit unit 164. By using transistors according to one aspect of the present invention in the display unit 162, the pixel size can be reduced and high resolution can be achieved. Furthermore, by using transistors according to one aspect of the present invention in the circuit unit 164, the occupied area of ​​the circuit unit 164 can be reduced and a narrow bezel can be achieved. For details on transistors according to one aspect of the present invention, refer to the description in the previous embodiment.

[0343] Furthermore, since the display device according to one aspect of the present invention has an oxygen blocking layer 301 and an oxygen blocking layer 302, it is preferable that a transistor with a large on-current can be used.

[0344] Specifically, transistors 205D, 205R, 205G, and 205B each have a conductive layer 104 that functions as a gate, an insulating layer 106 that functions as a gate insulating layer, conductive layers 112a and 112b that function as source and drain, an oxide semiconductor layer 108 having a metal oxide, and an insulating layer 110, respectively. Here, the same hatching pattern is applied to multiple layers obtained by processing the same conductive film.

[0345] The transistors in the display device of this embodiment are not limited to those of one aspect of the present invention. For example, the transistors of one aspect of the present invention may be combined with transistors of other structures.

[0346] The display device of this embodiment may have, for example, one or more of planar transistors, staggered transistors, or inverse staggered transistors. The transistors in the display device of this embodiment may be either top-gate or bottom-gate types. Alternatively, gates may be provided above and below the semiconductor layer in which the channel is formed.

[0347] The display device of this embodiment may have a Si transistor.

[0348] To increase the luminescence brightness of a light-emitting element included in a pixel circuit, it is necessary to increase the amount of current flowing through the light-emitting element. To achieve this, it is necessary to increase the source-drain voltage of the drive transistor included in the pixel circuit. Compared to Si transistors, OS transistors have a higher breakdown voltage between the source and drain, so a higher voltage can be applied to the source-drain of an OS transistor. Therefore, by using an OS transistor as the drive transistor in the pixel circuit, the amount of current flowing through the light-emitting element can be increased, thereby increasing the luminescence brightness of the light-emitting element.

[0349] When a transistor operates in the saturation region, an OS transistor exhibits a smaller change in source-drain current in response to a change in gate-source voltage than a Si transistor. Therefore, by using an OS transistor as the driving transistor in a pixel circuit, the current flowing between the source and drain can be precisely controlled by the change in gate-source voltage, thereby allowing control of the current flowing to the light-emitting element. This allows for an increase in the number of grayscale levels in the pixel circuit.

[0350] In terms of the saturation of the current flowing when a transistor operates in the saturation region, OS transistors can supply a more stable current (saturation current) than Si transistors, even when the source-drain voltage gradually increases. Therefore, by using an OS transistor as a driving transistor, a stable current can be supplied to a light-emitting element even if there are variations in the current-voltage characteristics of the light-emitting element. In other words, when operating in the saturation region, OS transistors can stabilize the luminescence brightness of a light-emitting element because the change in source-drain current is small even when the source-drain voltage is changed.

[0351] The transistors in the circuit unit 164 and the transistors in the display unit 162 may have the same structure or different structures. The structures of the multiple transistors in the circuit unit 164 may all be the same or there may be two or more different structures. Similarly, the structures of the multiple transistors in the display unit 162 may all be the same or there may be two or more different structures.

[0352] All transistors in the display unit 162 may be OS transistors, all transistors in the display unit 162 may be Si transistors, or some of the transistors in the display unit 162 may be OS transistors and the rest may be Si transistors. Examples of silicon include single-crystal silicon, polycrystalline silicon, microcrystalline silicon, and amorphous silicon. An example of polycrystalline silicon is low-temperature polysilicon (LTPS). Transistors using LTPS in the channel formation region (hereinafter also referred to as LTPS transistors) have high field-effect mobility and can operate at high speed.

[0353] For example, by using both an LTPS transistor and an OS transistor in the display unit 162, a display device with low power consumption and high driving capability can be realized. Furthermore, a configuration combining an LTPS transistor and an OS transistor is sometimes referred to as LTPO. A more preferable example is a configuration in which an OS transistor is used for transistors that function as switches to control conduction and non-conduction between wires, and an LTPS transistor is used for transistors that control current.

[0354] For example, one of the transistors in the display unit 162 functions as a transistor for controlling the current flowing to the light-emitting element, and can also be called a drive transistor. One of the source and drain of the drive transistor is connected to the pixel electrode of the light-emitting element. It is preferable to use an LTPS transistor for the drive transistor. This makes it possible to increase the current flowing to the light-emitting element in the pixel circuit.

[0355] On the other hand, the other transistor in the display unit 162 functions as a switch for controlling the selection and deselection of pixels, and can also be called a selection transistor. The gate of the selection transistor is connected to the gate line, and one of the source and drain is connected to the source line (signal line). It is preferable to use an OS transistor for the selection transistor. This makes it possible to maintain the gradation of pixels even when the frame frequency is significantly low (for example, 1 fps or less), and thus power consumption can be reduced by stopping the driver when displaying a still image.

[0356] An insulating layer 218 is provided to cover transistors 205D, 205R, 205G, and 205B, and an insulating layer 235 is provided on top of the insulating layer 218. The details of the insulating layer 218 can be found in the previous description.

[0357] The insulating layer 235 preferably functions as a planarization layer, and an organic insulating film is preferred. Examples of materials that can be used for the organic insulating film include acrylic resin, polyimide resin, epoxy resin, polyamide resin, polyimidoamide resin, siloxane resin, benzocyclobutene resin, phenolic resin, and precursors of these resins. The insulating layer 235 may also be a laminated structure of an organic insulating film and an inorganic insulating film. The outermost layer of the insulating layer 235 preferably functions as an etching protection layer. This makes it possible to suppress the formation of recesses in the insulating layer 235 when processing the pixel electrodes 111R, 111G, 111B, etc. Alternatively, recesses may be provided in the insulating layer 235 when processing the pixel electrodes 111R, 111G, and 111B, etc. Note that the pixel electrodes 111R, 111G, and 111B are sometimes collectively referred to as the pixel electrode 111.

[0358] Light-emitting elements 130R, 130G, and 130B are provided on the insulating layer 235.

[0359] The light-emitting element 130R has a pixel electrode 111R on an insulating layer 235, an EL layer 113R on the pixel electrode 111R, and a common electrode 115 on the EL layer 113R. The light-emitting element 130R shown in Figure 21A emits red light (R). The EL layer 113R has a light-emitting layer that emits red light.

[0360] The light-emitting element 130G has a pixel electrode 111G on an insulating layer 235, an EL layer 113G on the pixel electrode 111G, and a common electrode 115 on the EL layer 113G. The light-emitting element 130G shown in Figure 21A emits green light (G). The EL layer 113G has a light-emitting layer that emits green light.

[0361] The light-emitting element 130B has a pixel electrode 111B on an insulating layer 235, an EL layer 113B on the pixel electrode 111B, and a common electrode 115 on the EL layer 113B. The light-emitting element 130B shown in Figure 21A emits blue light (B). The EL layer 113B has a light-emitting layer that emits blue light.

[0362] In Figure 21A, the EL layers 113R, 113G, and 113B are all shown to be the same thickness, but this is not the only option. The thicknesses of the EL layers 113R, 113G, and 113B may be different. For example, it is preferable to set the thickness of the EL layers 113R, 113G, and 113B so that the optical path length is such that the light emitted by each layer is intensified. This makes it possible to realize a microcavity structure and improve the color purity of the light emitted from each light-emitting element.

[0363] The pixel electrode 111R is connected to the conductive layer 112b of the transistor 205R at openings provided in the insulating layer 106, insulating layer 218, and insulating layer 235. Similarly, the pixel electrode 111G is connected to the conductive layer 112b of the transistor 205G, and the pixel electrode 111B is connected to the conductive layer 112b of the transistor 205B.

[0364] Each end of the pixel electrodes 111R, 111G, and 111B is covered by an insulating layer 237. The insulating layer 237 functions as a partition. The insulating layer 237 can be provided in a single-layer or multi-layer structure using one or both inorganic insulating materials and / or organic insulating materials. For example, the insulating layer 237 can be made of materials that can be used for the insulating layer 218 and materials that can be used for the insulating layer 235. The insulating layer 237 electrically insulates the pixel electrodes from the common electrodes. In addition, the insulating layer 237 electrically insulates adjacent light-emitting elements from each other.

[0365] The insulating layer 237 is provided at least on the display unit 162. The insulating layer 237 may be provided not only on the display unit 162, but also on the connection unit 140 and the circuit unit 164. Furthermore, the insulating layer 237 may extend to the end of the display device 50A.

[0366] The common electrode 115 is a continuous film provided in common to the light-emitting elements 130R, 130G, and 130B. The common electrode 115, which is shared by multiple light-emitting elements, is connected to a conductive layer 123 provided at the connection portion 140. It is preferable to use a conductive layer for the conductive layer 123 that is made of the same material and formed using the same process as the pixel electrodes 111R, 111G, and 111B.

[0367] In a display device according to one aspect of the present invention, among the pixel electrodes and common electrodes, the electrode that extracts light is preferably made of a conductive film that transmits visible light. Furthermore, it is preferable that the electrode that does not extract light is made of a conductive film that reflects visible light.

[0368] A conductive film that transmits visible light may also be used on the electrode that does not extract light. In this case, it is preferable to place the electrode between the reflective layer and the EL layer. In other words, the light emitted from the EL layer may be reflected by the reflective layer and extracted from the display device.

[0369] As the material for forming the pair of electrodes of the light-emitting element, metals, alloys, electrically conductive compounds, and mixtures thereof can be used as appropriate. Specifically, such materials include metals such as aluminum, magnesium, titanium, chromium, manganese, iron, cobalt, nickel, copper, gallium, zinc, indium, tin, molybdenum, tantalum, tungsten, palladium, gold, platinum, silver, yttrium, and neodymium, and alloys containing these in appropriate combinations. Other examples of such materials include indium tin oxide (In-Sn oxide, also called ITO), In-Si-Sn oxide (also called ITSO), indium zinc oxide (In-Zn oxide), and In-W-Zn oxide. Furthermore, other examples of such materials include aluminum-containing alloys such as aluminum, nickel, and lanthanum alloys (Al-Ni-La), as well as silver-magnesium alloys and silver-containing alloys such as silver-palladium-copper alloys (Ag-Pd-Cu, also written as APC). Other materials include elements belonging to Group 1 or Group 2 of the periodic table not exemplified above (e.g., lithium, cesium, calcium, strontium), rare earth metals such as europium and ytterbium, alloys containing these in appropriate combinations, graphene, and the like.

[0370] It is preferable that the light-emitting element has a microcavity structure. Therefore, it is preferable that one of the pair of electrodes in the light-emitting element is a semitransmitting / semi-reflective electrode that transmits and reflects visible light, and the other is a reflective electrode that reflects visible light. By having a microcavity structure in the light-emitting element, the light emitted from the light-emitting layer can be resonated between the two electrodes, thereby strengthening the light emitted from the light-emitting element.

[0371] The light transmittance of the transparent electrode shall be 40% or more. For example, it is preferable to use an electrode with a transmittance of 40% or more for visible light (light with a wavelength of 400 nm or more and less than 750 nm) for the transparent electrode of the light-emitting element. The visible light reflectance of the semi-transparent and semi-reflective electrodes shall be 10% or more and 95% or less, preferably 30% or more and 80% or less. The visible light reflectance of the reflective electrode shall be 40% or more and 100% or less, preferably 70% or more and 100% or less. Furthermore, the electrical resistivity of these electrodes shall be 1 × 10⁻⁶ −2 A value of Ωcm or less is preferable.

[0372] The EL layers 113R, 113G, and 113B are each provided in an island-like manner. In Figure 21A, the edges of adjacent EL layers 113R and 113G overlap, the edges of adjacent EL layers 113G and 113B overlap, and the edges of adjacent EL layers 113R and 113B overlap. When forming island-like EL layers using a fine metal mask, the edges of adjacent EL layers may overlap as shown in Figure 21A, but this is not the only case. In other words, adjacent EL layers may not overlap and may be separated from each other. Furthermore, in a display device, there may be both areas where adjacent EL layers overlap and areas where adjacent EL layers do not overlap and are separated.

[0373] Each of the EL layers 113R, 113G, and 113B has at least one light-emitting layer. The light-emitting layer has one or more types of light-emitting materials. As the light-emitting material, a material that exhibits a light-emitting color such as blue, purple, blue-violet, green, yellow-green, yellow, orange, or red can be used as appropriate. In addition, a material that emits near-infrared light can also be used as the light-emitting material.

[0374] Examples of luminescent materials include fluorescent materials, phosphorescent materials, TADF materials, and quantum dot materials.

[0375] Examples of quantum dot materials include colloidal quantum dots, alloy quantum dots, core-shell quantum dots, and core quantum dots. Furthermore, quantum dot materials containing elemental groups of Group 2 and Group 16, Group 13 and Group 15, Group 13 and Group 17, Group 11 and Group 17, or Group 14 and Group 15 can be used. Alternatively, quantum dot materials containing elements such as cadmium (Cd), selenium (Se), zinc (Zn), sulfur (S), phosphorus (P), indium (In), tellurium (Te), lead (Pb), gallium (Ga), arsenic (As), and aluminum (Al) can be used.

[0376] The light-emitting layer may contain one or more types of organic compounds (host material, assist material, etc.) in addition to the light-emitting substance (guest material). One or more of the organic compounds may be substances with high hole transport properties (hole transport material) and / or substances with high electron transport properties (electron transport material). Alternatively, one or more of the organic compounds may be bipolar substances (substances with high electron and hole transport properties) or TADF materials.

[0377] The light-emitting layer preferably comprises, for example, a phosphorescent material and a combination of a hole-transporting material and an electron-transporting material that readily forms an excitation complex. This configuration allows for efficient emission using ExTET (Exciplex-Triplet Energy Transfer), which is energy transfer from the excitation complex to the light-emitting substance (phosphorescent material). By selecting a combination that forms an excitation complex that exhibits emission overlapping with the wavelength of the lowest-energy absorption band of the light-emitting substance, energy transfer becomes smoother, and light emission can be obtained efficiently. This configuration simultaneously achieves high efficiency, low-voltage operation, and a long lifespan for the light-emitting element.

[0378] The EL layer may have, in addition to the light-emitting layer, one or more of the following: a layer containing a material with high hole injection properties (hole injection layer), a layer containing a hole transport material (hole transport layer), a layer containing a material with high electron blocking properties (electron blocking layer), a layer containing a material with high electron injection properties (electron injection layer), a layer containing an electron transport material (electron transport layer), and a layer containing a material with high hole blocking properties (hole blocking layer). Furthermore, the EL layer may contain either or both a bipolar material and a TADF material.

[0379] The light-emitting element can be made of either low-molecular-weight compounds or high-molecular-weight compounds, and may also contain inorganic compounds. The layers constituting the light-emitting element can be formed by methods such as vapor deposition (including vacuum deposition), transfer, printing, inkjet, and coating.

[0380] The light-emitting element may be a single structure (a structure having only one light-emitting unit) or a tandem structure (a structure having multiple light-emitting units). Each light-emitting unit has at least one light-emitting layer. The tandem structure is a configuration in which multiple light-emitting units are connected in series via a charge generation layer. The charge generation layer has the function of injecting electrons into one of the two light-emitting units and holes into the other when a voltage is applied between a pair of electrodes. By using a tandem structure, a light-emitting element capable of high-brightness emission can be made. Furthermore, compared to a single structure, the tandem structure can reduce the current required to obtain the same brightness, thus improving reliability. The tandem structure can also be called a stack structure.

[0381] In Figure 21A, when using a tandem light-emitting element, it is preferable that the EL layer 113R has a structure having multiple light-emitting units that emit red light, the EL layer 113G has a structure having multiple light-emitting units that emit green light, and the EL layer 113B has a structure having multiple light-emitting units that emit blue light.

[0382] A protective layer 131 is provided on the light-emitting elements 130R, 130G, and 130B. The protective layer 131 and the substrate 152 are bonded together via an adhesive layer 142. A light-shielding layer 117 is provided on the substrate 152. For sealing the light-emitting elements, for example, a solid sealing structure or a hollow sealing structure can be applied. In Figure 21A, the space between the substrate 152 and the substrate 151 is filled with the adhesive layer 142, and a solid sealing structure is applied. Alternatively, the space may be filled with an inert gas (such as nitrogen or argon), and a hollow sealing structure may be applied. In this case, the adhesive layer 142 may be provided in a frame shape so as not to overlap with the light-emitting elements. Furthermore, the space may be filled with a resin different from the adhesive layer 142 provided in a frame shape.

[0383] The protective layer 131 is provided at least on the display section 162, and preferably so as to cover the entire display section 162. It is preferable that the protective layer 131 covers not only the display section 162, but also the connection section 140 and the circuit section 164. Furthermore, it is preferable that the protective layer 131 extends to the end of the display device 50A. On the other hand, in the connection section 197, there is a portion where the protective layer 131 is not provided in order to connect the FPC 172 and the conductive layer 166.

[0384] By providing a protective layer 131 on the light-emitting elements 130R, 130G, and 130B, the reliability of the light-emitting elements can be improved.

[0385] The protective layer 131 can be a single layer or a laminated structure of two or more layers. Furthermore, the conductivity of the protective layer 131 is not required. At least one of an insulating film, a semiconductor film, and a conductive film can be used as the protective layer 131.

[0386] The presence of an inorganic film in the protective layer 131 prevents oxidation of the common electrode 115 and suppresses the intrusion of impurities (such as moisture and oxygen) into the light-emitting element, thereby suppressing degradation of the light-emitting element and improving the reliability of the display device.

[0387] The protective layer 131 preferably has one or more inorganic insulating layers. The protective layer 131 can be made of the same material that can be used for the insulating layer 110. In particular, the protective layer 131 preferably uses a nitride or nitride oxide, and more preferably uses a nitride.

[0388] The protective layer 131 may also be an inorganic film containing ITO, In-Zn oxide, Ga-Zn oxide, Al-Zn oxide, or IGZO. The inorganic film is preferably highly resistive, and more specifically, it is preferably more resistive than the common electrode 115. The inorganic film may further contain nitrogen.

[0389] When the light emitted from a light-emitting element is extracted via a protective layer 131, it is preferable that the protective layer 131 has high transmittance to visible light. For example, ITO, IGZO, and aluminum oxide are preferred because they are inorganic materials with high transmittance to visible light.

[0390] As the protective layer 131, for example, a laminated structure of an aluminum oxide film and a silicon nitride film on the aluminum oxide film, or a laminated structure of an aluminum oxide film and an IGZO film on the aluminum oxide film can be used. By using such a laminated structure, it is possible to suppress the penetration of impurities (water, oxygen, etc.) into the EL layer.

[0391] Furthermore, the protective layer 131 may have an organic film. For example, the protective layer 131 may have both an organic film and an inorganic film. Examples of organic films that can be used for the protective layer 131 include organic insulating films that can be used for the insulating layer 235.

[0392] A connection portion 197 is provided in the region of substrate 151 where substrate 152 does not overlap. At the connection portion 197, the conductive layer 165 is connected to the FPC 172 via the conductive layer 166 and the connection layer 242. Figure 21A shows an example where the conductive layer 165 is a conductive layer obtained by processing the same conductive film as the conductive layer 112b. The conductive layer 166 is an example where it is a conductive layer obtained by processing the same conductive film as the pixel electrodes 111R, 111G, and 111B. The connection portion between conductive layer 165 and conductive layer 166 can be configured in the same way as the connection portion between the pixel electrode 111 and conductive layer 112b. Specifically, Figure 21A shows an example where an opening is provided in the upper layer of conductive layer 165, and the conductive layer 166 is in contact with the upper surface of conductive layer 165 at this opening. The conductive layer 166 is exposed on the upper surface of the connection portion 197. This allows the connection part 197 and the FPC 172 to be connected via the connection layer 242.

[0393] The display device 50A is of the top-emission type. The light emitted by the light-emitting element is emitted towards the substrate 152. It is preferable to use a material with high transmittance to visible light for the substrate 152. The pixel electrodes 111R, 111G, and 111B contain a material that reflects visible light, and the counter electrode (common electrode 115) contains a material that transmits visible light.

[0394] It is preferable to provide a light-shielding layer 117 on the surface of the substrate 152 that faces the substrate 151. The light-shielding layer 117 can be provided between adjacent light-emitting elements, in connection portions 140, and in circuit portions 164, etc.

[0395] A colored layer, such as a color filter, may be provided on the surface of the substrate 152 facing the substrate 151, or on the protective layer 131. By placing a color filter on top of the light-emitting element, the color purity of the light emitted from the pixel can be increased.

[0396] A colored layer is a colored layer that selectively transmits light in a specific wavelength range and absorbs light in other wavelength ranges. For example, a red (R) color filter that transmits light in the red wavelength range, a green (G) color filter that transmits light in the green wavelength range, and a blue (B) color filter that transmits light in the blue wavelength range can be used. One or more of the following can be used for each colored layer: metal materials, resin materials, pigments, and dyes. The colored layers are formed at the desired positions using methods such as printing, inkjet printing, and photolithography etching.

[0397] Various optical components can be placed on the outside of the substrate 152 (the side opposite to the substrate 151). Examples of optical components include polarizing plates, phase difference plates, light diffusion layers (such as diffusion films), anti-reflective layers, and light-gathering films. In addition, surface protection layers such as an antistatic film to suppress the adhesion of dust, a water-repellent film to make it difficult for dirt to adhere, a hard coat film to suppress the occurrence of scratches during use, and a shock-absorbing layer may be placed on the outside of the substrate 152. For example, a glass layer or a silica layer (SiO x By providing a protective layer, surface contamination and scratching can be suppressed, which is preferable. Furthermore, DLC (diamond-like carbon), aluminum oxide (AlO2) can be used as the surface protective layer. x ), polyester-based materials, or polycarbonate-based materials may be used. It is preferable to use a material with high transmittance to visible light for the surface protective layer. Furthermore, it is preferable to use a material with high hardness for the surface protective layer.

[0398] Substrates 151 and 152 can be made of glass, quartz, ceramics, sapphire, resin, metal, alloy, semiconductor, etc., respectively. The substrate on the side that extracts light from the light-emitting element should be made of a material that transmits the light. Using flexible materials for substrates 151 and 152 increases the flexibility of the display device, enabling a flexible display. A polarizing plate may also be used as at least one of substrates 151 and 152.

[0399] As substrates 151 and 152, various materials can be used, such as polyester resins like polyethylene terephthalate (PET) and polyethylene naphthalate (PEN), polyacrylonitrile resin, acrylic resin, polyimide resin, polymethyl methacrylate resin, polycarbonate (PC) resin, polyethersulfone (PES) resin, polyamide resin (nylon, aramid, etc.), polysiloxane resin, cycloolefin resin, polystyrene resin, polyamide-imide resin, polyurethane resin, polyvinyl chloride resin, polyvinylidene chloride resin, polypropylene resin, polytetrafluoroethylene (PTFE) resin, ABS resin, cellulose nanofiber, etc. At least one of substrates 151 and 152 may be made of glass of a thickness sufficient to provide flexibility.

[0400] Furthermore, when a circular polarizing plate is superimposed on a display device, it is preferable to use a substrate with high optical isotropy for the substrate of the display device. A substrate with high optical isotropy has low birefringence (or a small amount of birefringence). Examples of films with high optical isotropy include triacetylcellulose (TAC, also called cellulose triacetate) film, cycloolefin polymer (COP) film, cycloolefin copolymer (COC) film, and acrylic film.

[0401] Various types of curing adhesives can be used as the adhesive layer 142, including UV-curing adhesives, reaction-curing adhesives, thermosetting adhesives, and anaerobic adhesives. Examples of these adhesives include epoxy resins, acrylic resins, silicone resins, phenolic resins, polyimide resins, imide resins, PVC (polyvinyl chloride) resins, PVB (polyvinyl butyral) resins, and EVA (ethylene vinyl acetate) resins. Materials with low moisture permeability, such as epoxy resins, are particularly preferred. Two-component mixed resins may also be used. Adhesive sheets may also be used.

[0402] As the connecting layer 242, an anisotropic conductive film (ACF), anisotropic conductive paste (ACP), etc., can be used.

[0403] <Configuration Example 2 of Display Device> FIG. 21B shows an example of a cross-section of the display unit 162 of the display device 50B. The display device 50B is mainly different from the display device 50A in that a light-emitting element having a common EL layer 113 and a coloring layer (such as a color filter) are used for each sub-pixel of each color. The configuration shown in FIG. 21B can be combined with the configuration of the region including the FPC 172, the circuit unit 164, the laminated structure from the substrate 151 of the display unit 162 to the insulating layer 235, the connection unit 140, and the configuration of the end portion shown in FIG. 21A. In the following description of the display device, the description of the same parts as those of the display device described above may be omitted.

[0404] The display device 50B shown in FIG. 21B includes light-emitting elements 130R, 130G, 130B, a coloring layer 132R that transmits red light, a coloring layer 132G that transmits green light, and a coloring layer 132B that transmits blue light.

[0405] The light-emitting element 130R includes a pixel electrode 111R, an EL layer 113 on the pixel electrode 111R, and a common electrode 115 on the EL layer 113. The light emitted by the light-emitting element 130R is taken out as red light to the outside of the display device 50B through the coloring layer 132R.

[0406] The light-emitting element 130G includes a pixel electrode 111G, an EL layer 113 on the pixel electrode 111G, and a common electrode 115 on the EL layer 113. The light emitted by the light-emitting element 130G is taken out as green light to the outside of the display device 50B through the coloring layer 132G.

[0407] The light-emitting element 130B includes a pixel electrode 111B, an EL layer 113 on the pixel electrode 111B, and a common electrode 115 on the EL layer 113. The light emitted by the light-emitting element 130B is taken out as blue light to the outside of the display device 50B through the coloring layer 132B.

[0408] The light-emitting elements 130R, 130G, and 130B share the EL layer 113 and the common electrode 115, respectively. The configuration in which a common EL layer 113 is provided for each sub-pixel of each color can reduce the number of manufacturing steps compared to the configuration in which different EL layers are provided for each sub-pixel of each color.

[0409] For example, the light-emitting elements 130R, 130G, and 130B shown in FIG. 21B emit white light. By allowing the white light emitted by the light-emitting elements 130R, 130G, and 130B to pass through the colorant layers 132R, 132G, and 132B, light of a desired color can be obtained.

[0410] The light-emitting element that emits white light preferably includes two or more light-emitting layers. When obtaining white light using two light-emitting layers, light-emitting layers can be selected such that the emission colors of the two light-emitting layers are complementary. For example, by making the emission color of the first light-emitting layer and the emission color of the second light-emitting layer have a complementary relationship, a configuration that emits white light as a whole light-emitting element can be obtained. Also, when obtaining white light using three or more light-emitting layers, by combining the emission colors of the three or more light-emitting layers, a configuration that emits white light as a whole light-emitting element can be achieved.

[0411] The EL layer 113 preferably has, for example, a light-emitting layer having a light-emitting substance that emits blue light and a light-emitting layer having a light-emitting substance that emits visible light with a longer wavelength than blue. The EL layer 113 preferably has, for example, a light-emitting layer that emits yellow light and a light-emitting layer that emits blue light. Alternatively, the EL layer 113 preferably has, for example, a light-emitting layer that emits red light, a light-emitting layer that emits green light, and a light-emitting layer that emits blue light.

[0412] For light-emitting elements that emit white light, a tandem structure is preferable. Specifically, a two-stage tandem structure having a light-emitting unit that emits yellow light and a light-emitting unit that emits blue light, a two-stage tandem structure having a light-emitting unit that emits red and green light and a light-emitting unit that emits blue light, a three-stage tandem structure having a light-emitting unit that emits blue light, a light-emitting unit that emits yellow, yellow-green, or green light, and a light-emitting unit that emits blue light in that order, or a three-stage tandem structure having a light-emitting unit that emits blue light, a light-emitting unit that emits yellow, yellow-green, or green light, a light-emitting unit that emits red light, and a light-emitting unit that emits blue light in that order. For example, the number of layers and color order of the light-emitting unit can be, from the anode side, a two-layer structure of B and Y, a two-layer structure of B and light-emitting unit X, a three-layer structure of B, Y, B, or a three-layer structure of B, X, B. The number of layers and color order of the light-emitting layers in light-emitting unit X can be, from the anode side, a two-layer structure of R and Y, a two-layer structure of R and G, a two-layer structure of G and R, a three-layer structure of G, R, G, or a three-layer structure of R, G, R. In addition, other layers may be provided between the two light-emitting layers.

[0413] Furthermore, by applying a microcavity structure, a light-emitting element that normally emits white light may also emit light of specific wavelengths, such as red, green, or blue, with increased intensity.

[0414] Alternatively, for example, the light-emitting elements 130R, 130G, and 130B shown in Figure 21B emit blue light. In this case, the EL layer 113 has one or more light-emitting layers that emit blue light. In the sub-pixel 11B that emits blue light, the blue light emitted by the light-emitting element 130B can be extracted. In the sub-pixel 11R that emits red light and the sub-pixel 11G that emits green light, by providing a color conversion layer between the light-emitting element 130R or light-emitting element 130G and the substrate 152, the blue light emitted by the light-emitting element 130R or light-emitting element 130G can be converted into longer wavelength light, and red or green light can be extracted. The color conversion layer can be described in the above description. Specifically, the various quantum dot materials described above can be used for the color conversion layer. Furthermore, it is preferable to provide a coloring layer 132R between the color conversion layer and the substrate 152 on the light-emitting element 130R, and a coloring layer 132G between the color conversion layer and the substrate 152 on the light-emitting element 130G. Some of the light emitted by a light-emitting element may pass through without being converted by the color conversion layer. By extracting the light that has passed through the color conversion layer via a colored layer, the color of light other than the desired color can be absorbed by the colored layer, thereby increasing the color purity of the light exhibited by the subpixel.

[0415] <Example of Display Device Configuration 3> The display device 50H shown in Figure 22A is an example of a display device to which an MML (metal maskless) structure is applied. In other words, the display device 50H has a light-emitting element manufactured without using a fine metal mask.

[0416] In a display device using an MML structure, the island-shaped light-emitting layers in the light-emitting elements are formed by depositing a light-emitting layer onto one surface and then processing it using lithography. Therefore, it is possible to realize high-definition display devices or display devices with high aperture ratios, which have been difficult to achieve until now. Furthermore, since the light-emitting layers can be made separately for each color, it is possible to realize a display device that is extremely vivid, has high contrast, and displays high quality. For example, if the display device is composed of three types of light-emitting elements, such as a blue light-emitting element, a green light-emitting element, and a red light-emitting element, three types of island-shaped light-emitting layers can be formed by repeating the deposition of the light-emitting layer and processing by lithography three times.

[0417] Because MML (Multilayer Molded) devices can be manufactured without using a metal mask, they can exceed the resolution limits imposed by the precision required for metal mask alignment. Furthermore, when manufacturing devices without a metal mask, the equipment and cleaning processes associated with metal mask manufacturing are eliminated. Additionally, since the lithography process can utilize equipment common to or similar to that used for transistor manufacturing, there is no need to introduce special equipment for manufacturing MML devices. Thus, MML structures allow for lower manufacturing costs, making them suitable for mass production of devices.

[0418] In a display device to which an MML structure is applied, there is no need to artificially increase the resolution by applying a special pixel arrangement such as a pentile arrangement. Therefore, a display device with high resolution (for example, 500 ppi or more, 1000 ppi or more, 2000 ppi or more, 3000 ppi or more, or 5000 ppi or more) can be realized using a so-called stripe arrangement in which the R, G, and B subpixels are each arranged in one direction.

[0419] By providing a sacrificial layer on the light-emitting layer, damage to the light-emitting layer during the manufacturing process of the display device can be reduced, thereby improving the reliability of the light-emitting element.

[0420] By employing a film deposition process using an area mask and a processing process using a resist mask, light-emitting elements can be fabricated using a relatively simple process.

[0421] Note that the laminated structure from substrate 151 to insulating layer 235, and the laminated structure from protective layer 131 to substrate 152 are the same as those of the display device 50A, so their explanation is omitted.

[0422] In Figure 22A, light-emitting elements 130R, 130G, and 130B are provided on the insulating layer 235.

[0423] The light-emitting element 130R includes a conductive layer 124R on an insulating layer 235, a conductive layer 126R on the conductive layer 124R, a layer 133R on the conductive layer 126R, a common layer 114 on the layer 133R, and a common electrode 115 on the common layer 114. The light-emitting element 130R shown in Figure 22A emits red light (R). Layer 133R has a light-emitting layer that emits red light. In the light-emitting element 130R, layer 133R and the common layer 114 can be collectively called the EL layer. In addition, one or both of the conductive layer 124R and the conductive layer 126R can be called the pixel electrode.

[0424] The light-emitting element 130G includes a conductive layer 124G on an insulating layer 235, a conductive layer 126G on the conductive layer 124G, a layer 133G on the conductive layer 126G, a common layer 114 on the layer 133G, and a common electrode 115 on the common layer 114. The light-emitting element 130G shown in Figure 22A emits green light (G). Layer 133G has a light-emitting layer that emits green light. In the light-emitting element 130G, layer 133G and the common layer 114 can be collectively called the EL layer. In addition, one or both of the conductive layer 124G and the conductive layer 126G can be called the pixel electrode.

[0425] The light-emitting element 130B includes a conductive layer 124B on an insulating layer 235, a conductive layer 126B on the conductive layer 124B, a layer 133B on the conductive layer 126B, a common layer 114 on the layer 133B, and a common electrode 115 on the common layer 114. The light-emitting element 130B shown in Figure 22A emits blue light (B). Layer 133B has a light-emitting layer that emits blue light. In the light-emitting element 130B, layer 133B and the common layer 114 can be collectively called the EL layer. In addition, one or both of the conductive layer 124B and the conductive layer 126B can be called the pixel electrode.

[0426] In this specification, among the EL layers of a light-emitting element, layers provided in an island-like manner for each light-emitting element are referred to as layer 133B, layer 133G, or layer 133R, and a layer shared by multiple light-emitting elements is referred to as the common layer 114. In this specification, the common layer 114 may be omitted, and layers 133R, 133G, and 133B may be referred to as island-like EL layers, island-shaped EL layers, etc. Furthermore, light-emitting elements manufactured without using a metal mask do not need to have a common layer, and all layers constituting the EL layer may be formed in an island-like manner.

[0427] Layers 133R, 133G, and 133B are separated from each other. By providing the EL layer in an island-like configuration for each light-emitting element, leakage current between adjacent light-emitting elements can be suppressed. This prevents unintended light emission caused by crosstalk, enabling the realization of a display device with extremely high contrast.

[0428] Note that in Figure 22A, layers 133R, 133G, and 133B are all shown to be the same thickness, but this is not the only option. The thicknesses of layers 133R, 133G, and 133B may be different.

[0429] The conductive layer 124R is connected to the conductive layer 112b of transistor 205R at openings provided in the insulating layer 106, insulating layer 218, and insulating layer 235. Similarly, the conductive layer 124G is connected to the conductive layer 112b of transistor 205G, and the conductive layer 124B is connected to the conductive layer 112b of transistor 205B.

[0430] The conductive layers 124R, 124G, and 124B are formed to cover the openings provided in the insulating layer 235. Layer 128 is embedded in the recesses of the conductive layers 124R, 124G, and 124B, respectively.

[0431] Layer 128 has the function of flattening the recesses of the conductive layers 124R, 124G, and 124B. Conductive layers 126R, 126G, and 126B are provided on conductive layers 124R, 124G, and 124B and on layer 128, and are connected to conductive layers 124R, 124G, and 124B. Therefore, the regions that overlap with the recesses of conductive layers 124R, 124G, and 124B can also be used as light-emitting regions, and the aperture ratio of the pixels can be increased. It is preferable to use conductive layers that function as reflective electrodes for conductive layers 124R and 126R.

[0432] Layer 128 may be an insulating layer or a conductive layer. Various inorganic insulating materials, organic insulating materials, and conductive materials can be used for layer 128 as appropriate. In particular, it is preferable that layer 128 be formed using an insulating material, and especially preferable that it be formed using an organic insulating material. For example, an organic insulating material that can be used for the insulating layer 237 described above can be applied to layer 128.

[0433] Figure 22A shows an example where the upper surface of layer 128 has a flat portion, but the shape of layer 128 is not particularly limited. The upper surface of layer 128 can have at least one of a convex curved surface, a concave curved surface, and a flat surface.

[0434] The height of the top surface of layer 128 and the height of the top surface of conductive layer 124R may be the same, approximately the same, or different from each other. For example, the height of the top surface of layer 128 may be lower or higher than the height of the top surface of conductive layer 124R.

[0435] The end of the conductive layer 126R may be aligned with the end of the conductive layer 124R, or it may cover the side surface of the end of the conductive layer 124R. Preferably, the ends of the conductive layer 124R and the conductive layer 126R have a tapered shape. Specifically, it is preferable that the ends of the conductive layer 124R and the conductive layer 126R have a tapered shape with a taper angle greater than 0 degrees and less than 90 degrees. When the end of the pixel electrode has a tapered shape, the layer 133R provided along the side surface of the pixel electrode has an inclined portion. By making the side surface of the pixel electrode tapered, the coverage of the EL layer provided along the side surface of the pixel electrode can be improved.

[0436] Detailed explanations of conductive layers 124G, 126G, and conductive layers 124B, 126B are omitted because they are the same as conductive layers 124R, 126R.

[0437] The top and sides of the conductive layer 126R are covered by layer 133R. Similarly, the top and sides of the conductive layer 126G are covered by layer 133G, and the top and sides of the conductive layer 126B are covered by layer 133B. Therefore, the entire region where the conductive layers 126R, 126G, and 126B are provided can be used as the light-emitting region of the light-emitting elements 130R, 130G, and 130B, thereby increasing the aperture ratio of the pixels.

[0438] The upper surfaces and sides of layers 133R, 133G, and 133B are covered by insulating layers 125 and 127. A common layer 114 is provided on layers 133R, 133G, 133B, and insulating layers 125 and 127, and a common electrode 115 is provided on the common layer 114. The common layer 114 and the common electrode 115 are each a continuous film provided in common to multiple light-emitting elements.

[0439] In Figure 22A, the insulating layer 237 shown in Figure 21A, etc., is not provided between the conductive layer 126R and layer 133R. Similarly, the insulating layer 237 is not provided between the conductive layer 126G and layer 133G, and between the conductive layer 126B and layer 133B. In other words, the display device 50H does not have an insulating layer (also called a partition, bank, spacer, etc.) that is in contact with the pixel electrodes and covers the upper edges of the pixel electrodes. Therefore, the spacing between adjacent light-emitting elements can be made extremely narrow. Consequently, a high-definition or high-resolution display device can be made. In addition, a mask for forming the insulating layer is not required, and the manufacturing cost of the display device can be reduced.

[0440] As described above, each of the layers 133R, 133G, and 133B has a light-emitting layer. Each of the layers 133R, 133G, and 133B preferably has a light-emitting layer and a carrier transport layer (electron transport layer or hole transport layer). Alternatively, each of the layers 133R, 133G, and 133B preferably has a light-emitting layer and a carrier blocking layer (hole blocking layer or electron blocking layer). Alternatively, each of the layers 133R, 133G, and 133B preferably has a light-emitting layer, a carrier blocking layer, and a carrier transport layer on the carrier blocking layer. The carrier transport layer is more preferably provided on the light-emitting layer. The carrier blocking layer is more preferably provided on the light-emitting layer. Since the surfaces of the layers 133R, 133G, and 133B are exposed during the manufacturing process of the display device, by providing one or both of the carrier transport layer and the carrier blocking layer on the light-emitting layer, it is possible to suppress the light-emitting layer from being exposed on the outermost surface and reduce the damage received by the light-emitting layer. Thereby, the reliability of the light-emitting element can be enhanced.

[0441] The common layer 114 has, for example, an electron injection layer or a hole injection layer. Alternatively, the common layer 114 may have a stacked structure of an electron transport layer and an electron injection layer, or may have a stacked structure of a hole transport layer and a hole injection layer. The common layer 114 is shared by the light-emitting elements 130R, 130G, and 130B.

[0442] The side surfaces of each of the layers 133R, 133G, and 133B are covered by the insulating layer 125. The insulating layer 127 covers the side surfaces of each of the layers 133R, 133G, and 133B via the insulating layer 125.

[0443] Since the side surfaces (and also a part of the upper surface) of the layers 133R, 133G, and 133B are covered by at least one of the insulating layer 125 and the insulating layer 127, it is possible to suppress the common layer 114 (or the common electrode 115) from contacting the pixel electrode and the side surfaces of the layers 133R, 133G, and 133B, and suppress a short circuit of the light-emitting element. Thereby, the reliability of the light-emitting element can be enhanced.

[0444] Preferably, the insulating layer 125 has regions that are in contact with the respective sides of layers 133R, 133G, and 133B. By configuring the insulating layer 125 to be in contact with layers 133R, 133G, and 133B, peeling of the layers 133R, 133G, and 133B can be prevented, and the reliability of the light-emitting element can be improved.

[0445] The insulating layer 127 is provided on the insulating layer 125 so as to fill the recesses of the insulating layer 125. Preferably, the insulating layer 127 covers at least a portion of the side surface of the insulating layer 125.

[0446] By providing insulating layers 125 and 127, the gaps between adjacent island-shaped layers can be filled, thereby reducing the large height differences and irregularities on the formed surface of layers (e.g., carrier injection layers and common electrodes) on the island-shaped layers, making it flatter. Consequently, the coverage of the carrier injection layers and common electrodes can be improved.

[0447] The common layer 114 and the common electrode 115 are provided on layers 133R, 133G, 133B, insulating layer 125, and insulating layer 127. Before the insulating layer 125 and insulating layer 127 are provided, a step difference occurs due to the region where the pixel electrode and island-shaped EL layer are provided and the region where the pixel electrode and island-shaped EL layer are not provided (the region between light-emitting elements). In one embodiment of the present invention, the presence of the insulating layer 125 and insulating layer 127 can flatten this step difference and improve the coverage of the common layer 114 and the common electrode 115. Therefore, connection failures due to step breaks can be suppressed. In addition, it is possible to suppress the local thinning of the common electrode 115 due to the step difference and the resulting increase in electrical resistance.

[0448] The upper surface of the insulating layer 127 is preferably flatter. The upper surface of the insulating layer 127 may have at least one of a flat surface, a convex surface, and a concave surface. For example, the upper surface of the insulating layer 127 is preferably a convex surface with a large radius of curvature.

[0449] The insulating layer 125 can be a single-layer structure or a laminated structure of two or more layers. Preferably, the insulating layer 125 has one or more inorganic insulating layers. The insulating layer 125 can be made of any material that can be used for the insulating layer 110. In particular, aluminum oxide is preferred because it has a high selectivity ratio with the EL layer during etching and has the function of protecting the EL layer during the formation of the insulating layer 127. In particular, by applying an inorganic insulating film such as an aluminum oxide film, hafnium oxide film, or silicon oxide film formed by the ALD method to the insulating layer 125, an insulating layer 125 can be formed with fewer pinholes and excellent function in protecting the EL layer. Alternatively, the insulating layer 125 may be a laminated structure of a film formed by the ALD method and a film formed by the sputtering method. For example, the insulating layer 125 may be a laminated structure of an aluminum oxide film formed by the ALD method and a silicon nitride film formed by the sputtering method.

[0450] Preferably, the insulating layer 125 functions as a barrier insulating layer against at least one of water and oxygen. Preferably, the insulating layer 125 has the function of suppressing the diffusion of at least one of water and oxygen. Furthermore, preferably, the insulating layer 125 has the function of capturing or fixing (getting) at least one of water and oxygen.

[0451] The insulating layer 125 functions as a barrier insulating layer, thereby suppressing the intrusion of impurities (typically at least one of water and oxygen) that could diffuse from the outside into each light-emitting element. This configuration makes it possible to provide a highly reliable light-emitting element and, furthermore, a highly reliable display device.

[0452] The insulating layer 125 preferably has a low concentration of impurities. This prevents impurities from mixing from the insulating layer 125 into the EL layer and degrading the EL layer. Furthermore, by lowering the concentration of impurities in the insulating layer 125, the barrier properties against at least one of water and oxygen can be improved. For example, it is desirable that the insulating layer 125 has a sufficiently low concentration of hydrogen and / or carbon, preferably both.

[0453] The insulating layer 127 provided on the insulating layer 125 has the function of flattening the large height differences and irregularities in the insulating layer 125 formed between adjacent light-emitting elements. In other words, the presence of the insulating layer 127 has the effect of improving the flatness of the surface forming the common electrode 115.

[0454] As the insulating layer 127, an insulating layer having an organic material can be suitably used. Preferably, a photosensitive resin is used as the organic material; for example, a photosensitive resin composition containing an acrylic resin is preferred. In this specification, the term "acrylic resin" does not refer only to polymethacrylate esters or methacrylic resins, but may refer to acrylic polymers in a broad sense.

[0455] As the insulating layer 127, acrylic resin, polyimide resin, epoxy resin, imide resin, polyamide resin, polyimidoamide resin, silicone resin, siloxane resin, benzocyclobutene resin, phenol resin, and precursors of these resins may be used. Alternatively, as the insulating layer 127, organic materials such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinylpyrrolidone, polyethylene glycol, polyglycerin, pullulan, water-soluble cellulose, or alcohol-soluble polyamide resin may be used. Furthermore, a photoresist may be used as the photosensitive resin. Either a positive-type or negative-type material may be used as the photosensitive resin.

[0456] The insulating layer 127 may be made of a material that absorbs visible light. By absorbing the light emitted from the light-emitting element, the insulating layer 127 can suppress light leakage (stray light) from the light-emitting element to adjacent light-emitting elements through the insulating layer 127. This improves the display quality of the display device. Furthermore, since the display quality can be improved without using a polarizing plate in the display device, the display device can be made lighter and thinner.

[0457] Examples of materials that absorb visible light include materials containing pigments such as black, materials containing dyes, light-absorbing resin materials (e.g., polyimide), and resin materials that can be used in color filters (color filter materials). In particular, it is preferable to use a resin material obtained by laminating or mixing two or more color filter materials, as this can enhance the visible light shielding effect. In particular, by mixing three or more color filter materials, it is possible to create a black or near-black resin layer.

[0458] <Example of Display Device Configuration 4> Figure 22B shows an example of a cross-section of the display unit 162 of the display device 50I. The display device 50I differs from the display device 50H in that a coloring layer (such as a color filter) is provided for each sub-pixel of each color. The configuration shown in Figure 22B can be combined with the configuration shown in Figure 22A, which includes the region containing the FPC 172, the circuit unit 164, the laminated structure from the substrate 151 to the insulating layer 235 of the display unit 162, the connection unit 140, and the end portion.

[0459] The display device 50I shown in Figure 22B includes light-emitting elements 130R, 130G, 130B, a colored layer 132R that transmits red light, a colored layer 132G that transmits green light, and a colored layer 132B that transmits blue light, etc.

[0460] The light emitted from the light-emitting element 130R is extracted as red light to the outside of the display device 50I via the colored layer 132R. Similarly, the light emitted from the light-emitting element 130G is extracted as green light to the outside of the display device 50I via the colored layer 132G. The light emitted from the light-emitting element 130B is extracted as blue light to the outside of the display device 50I via the colored layer 132B.

[0461] Each of the light-emitting elements 130R, 130G, and 130B has a layer 133. These three layers 133 are formed using the same material and the same process. Furthermore, these three layers 133 are spaced apart from each other. By providing the EL layer in an island-like configuration for each light-emitting element, leakage current between adjacent light-emitting elements can be suppressed. This prevents unintended light emission caused by crosstalk, enabling the realization of a display device with extremely high contrast.

[0462] For example, the light-emitting elements 130R, 130G, and 130B shown in Figure 22B emit white light. The white light emitted by the light-emitting elements 130R, 130G, and 130B passes through the colored layers 132R, 132G, and 132B, thereby obtaining light of a desired color.

[0463] Alternatively, for example, the light-emitting elements 130R, 130G, and 130B shown in Figure 22B emit blue light. In this case, layer 133 has one or more light-emitting layers that emit blue light. In the sub-pixel 11B that emits blue light, the blue light emitted by the light-emitting element 130B can be extracted. Furthermore, in the sub-pixel 11R that emits red light and the sub-pixel 11G that emits green light, by providing a color conversion layer between the light-emitting element 130R or light-emitting element 130G and the substrate 152, the blue light emitted by the light-emitting element 130R or light-emitting element 130G can be converted into longer wavelength light, and red or green light can be extracted. Moreover, it is preferable to provide a coloring layer 132R between the color conversion layer and the substrate 152 on the light-emitting element 130R, and a coloring layer 132G between the color conversion layer and the substrate 152 on the light-emitting element 130G. By extracting the light that has passed through the color conversion layer via the colored layer, the colored layer absorbs light of colors other than the desired color, thereby increasing the color purity of the light exhibited by the subpixel.

[0464] This embodiment can be combined with other embodiments as appropriate.

[0465] (Embodiment 4) In this embodiment, an electronic device according to one aspect of the present invention will be described with reference to Figures 23 to 25.

[0466] The electronic device of this embodiment has a display device according to one aspect of the present invention in its display unit. The display device according to one aspect of the present invention is easily made high-definition and high-resolution. Therefore, it can be used in the display units of various electronic devices.

[0467] A semiconductor device according to one aspect of the present invention can also be applied to components other than the display unit of an electronic device. For example, using a semiconductor device according to one aspect of the present invention in the control unit of an electronic device is preferable because it enables lower power consumption.

[0468] Examples of electronic devices include television sets, desktop or notebook computers, computer monitors, digital signage, and large game machines such as pachinko machines, as well as other electronic devices with relatively large screens, digital cameras, digital video cameras, digital photo frames, mobile phones, portable game consoles, personal digital assistants, and audio playback devices.

[0469] In particular, a display device according to one aspect of the present invention can be used suitably in electronic devices having a relatively small display area because it can increase the resolution. Examples of such electronic devices include wristwatch-type and bracelet-type information terminals (wearable devices), as well as wearable devices that can be worn on the head, such as VR devices such as head-mounted displays, AR devices such as glasses, and MR devices.

[0470] A display device according to one aspect of the present invention preferably has an extremely high resolution such as HD (1280 x 720 pixels), FHD (1920 x 1080 pixels), WQHD (2560 x 1440 pixels), WQXGA (2560 x 1600 pixels), 4K (3840 x 2160 pixels), or 8K (7680 x 4320 pixels). In particular, a resolution of 4K, 8K, or higher is preferred. Furthermore, the pixel density (resolution) of the display device according to one aspect of the present invention is preferably 100 ppi or more, preferably 300 ppi or more, more preferably 500 ppi or more, more preferably 1000 ppi or more, more preferably 2000 ppi or more, more preferably 3000 ppi or more, more preferably 5000 ppi or more, and even more preferably 7000 ppi or more. By using a display device having either high resolution or high detail, or both, it becomes possible to further enhance the sense of presence and depth. Furthermore, there are no particular limitations on the aspect ratio of the display device according to one embodiment of the present invention. For example, the display device can support various aspect ratios such as 1:1 (square), 4:3, 16:9, and 16:10.

[0471] The electronic device of this embodiment may be configured to include sensors (including functions for detecting, detecting, or measuring force, displacement, position, velocity, acceleration, angular velocity, rotational speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared radiation).

[0472] The electronic device of this embodiment can have a variety of functions. For example, it can have a function to display various information (still images, videos, text images, etc.) on the display unit, a touch panel function, a function to display a calendar, date or time, a function to execute various software (programs), a wireless communication function, a function to read programs or data recorded on a recording medium, and so on.

[0473] Figures 23A to 23D illustrate an example of a wearable device that can be worn on the head. These wearable devices have at least one of the following functions: a function to display AR content, a function to display VR content, a function to display SR content, and a function to display MR content. By having an electronic device that has the function to display at least one of the following content types, such as AR, VR, SR, and MR, it is possible to enhance the user's sense of immersion.

[0474] The electronic device 700A shown in Figure 23A and the electronic device 700B shown in Figure 23B each include a pair of display panels 751, a pair of housings 721, a communication unit (not shown), a pair of mounting units 723, a control unit (not shown), an imaging unit (not shown), a pair of optical members 753, a frame 757, and a pair of nose pads 758.

[0475] A display device according to one embodiment of the present invention can be applied to the display panel 751. Therefore, an electronic device capable of displaying extremely high resolution can be created.

[0476] Electronic devices 700A and 700B can project an image displayed on the display panel 751 onto the display area 756 of the optical element 753. Because the optical element 753 is translucent, the user can see the image displayed on the display area superimposed on the transmitted image visible through the optical element 753. Therefore, electronic devices 700A and 700B are electronic devices capable of AR display.

[0477] Electronic devices 700A and 700B can be equipped with cameras capable of capturing images of the area in front of them as imaging units. Furthermore, electronic devices 700A and 700B can each be equipped with acceleration sensors such as gyro sensors to detect the orientation of the user's head and display an image corresponding to that orientation in the display area 756.

[0478] The communications unit has a wireless communication device, which can supply video signals and the like. Alternatively, instead of the wireless communication device, or in addition to the wireless communication device, it may be equipped with a connector to which a cable supplying video signals and power potential can be connected.

[0479] Electronic devices 700A and 700B are equipped with batteries (not shown) that can be charged wirelessly, wired, or both.

[0480] The housing 721 may be equipped with a touch sensor module. The touch sensor module has the function of detecting when the outer surface of the housing 721 is touched. The touch sensor module can detect the user's tap or slide operations and perform various processes. For example, a tap operation can be used to pause or resume the video, and a slide operation can be used to fast forward or rewind. Furthermore, by providing a touch sensor module in each of the two housings 721, the range of operations can be expanded.

[0481] Various types of touch sensors can be applied to the touch sensor module. For example, various methods such as capacitive, resistive, infrared, electromagnetic induction, surface acoustic wave, and optical sensors can be used. In particular, it is preferable to apply a capacitive or optical sensor to the touch sensor module.

[0482] When using an optical touch sensor, a photoelectric conversion element can be used as the light-receiving element. The active layer of the photoelectric conversion element can be made of either an inorganic semiconductor or an organic semiconductor, or both.

[0483] The electronic device 800A shown in Figure 23C and the electronic device 800B shown in Figure 23D each include a pair of display units 820, a housing 821, a communication unit 822, a pair of mounting units 823, a control unit 824, a pair of imaging units 825, and a pair of lenses 832. Note that the display unit 820, communication unit 822, and imaging unit 825 are omitted in Figure 23D.

[0484] A display device according to one embodiment of the present invention can be applied to the display unit 820. Therefore, an electronic device capable of displaying extremely high resolution can be created. This allows the user to experience a high level of immersion.

[0485] The display unit 820 is located inside the housing 821 in a position visible through the lens 832. Furthermore, by displaying different images on a pair of display units 820, a three-dimensional display using parallax can be achieved.

[0486] Electronic devices 800A and 800B can each be described as electronic devices for VR. A user wearing electronic device 800A or electronic device 800B can view the image displayed on the display unit 820 through the lens 832.

[0487] It is preferable that electronic devices 800A and 800B each have a mechanism that allows adjustment of the left and right positions of the lens 832 and the display unit 820 so that they are in the optimal position according to the user's eye position. It is also preferable that they have a mechanism that adjusts the focus by changing the distance between the lens 832 and the display unit 820.

[0488] The attachment portion 823 allows the user to attach the electronic device 800A or 800B to their head. While the attachment portion 823 is exemplified in Figure 23C and other figures as resembling the temples of eyeglasses, it is not limited to this shape. The attachment portion 823 only needs to be wearable by the user; for example, it may be helmet-shaped or band-shaped.

[0489] The imaging unit 825 has the function of acquiring external information. The data acquired by the imaging unit 825 can be output to the display unit 820. An image sensor can be used in the imaging unit 825. In addition, multiple cameras may be provided to accommodate multiple angles of view, such as telephoto and wide-angle.

[0490] Although an example with an imaging unit 825 is shown here, any distance measuring sensor (hereinafter also referred to as a detection unit) capable of measuring the distance to an object can be provided. In other words, the imaging unit 825 is one form of a detection unit. As the detection unit, for example, an image sensor or a distance image sensor such as LiDAR (Light Detection and Ranging) can be used. By using the image obtained by the camera and the image obtained by the distance image sensor, more information can be acquired, enabling more accurate gesture control.

[0491] The electronic device 800A may have a vibration mechanism that functions as a bone conduction earphone. For example, a configuration having such a vibration mechanism can be applied to one or more of the display unit 820, housing 821, and mounting unit 823. This eliminates the need for separate audio equipment such as headphones, earphones, or speakers, allowing users to enjoy video and audio simply by wearing the electronic device 800A.

[0492] Electronic devices 800A and 800B may each have input terminals. Cables can be connected to the input terminals to supply video signals from video output devices, etc., and power for charging batteries provided in the electronic devices.

[0493] An electronic device according to one aspect of the present invention may have a function for wireless communication with an earphone 750. The earphone 750 has a communication unit (not shown) and has a wireless communication function. The earphone 750 can receive information (e.g., voice data) from the electronic device through its wireless communication function. For example, the electronic device 700A shown in Figure 23A has a function for transmitting information to the earphone 750 through its wireless communication function. Also, for example, the electronic device 800A shown in Figure 23C has a function for transmitting information to the earphone 750 through its wireless communication function.

[0494] The electronic device may have an earphone section. The electronic device 700B shown in Figure 23B has an earphone section 727. For example, the earphone section 727 and the control unit can be connected to each other by a wire. Part of the wiring connecting the earphone section 727 and the control unit may be located inside the housing 721 or the mounting section 723.

[0495] Similarly, the electronic device 800B shown in Figure 23D has an earphone unit 827. For example, the earphone unit 827 and the control unit 824 can be connected to each other by a wire. Part of the wiring connecting the earphone unit 827 and the control unit 824 may be located inside the housing 821 or the mounting unit 823. Also, the earphone unit 827 and the mounting unit 823 may have magnets. This allows the earphone unit 827 to be fixed to the mounting unit 823 by magnetic force, which is preferable as it makes storage easier.

[0496] Furthermore, the electronic device may have an audio output terminal to which earphones or headphones can be connected. The electronic device may also have an audio input terminal and / or an audio input mechanism. For example, a sound-collecting device such as a microphone can be used as the audio input mechanism. By having an audio input mechanism, the electronic device may be given the function of a so-called headset.

[0497] Thus, in one aspect of the present invention, the electronic device is preferably either a glasses type (electronic device 700A, electronic device 700B, etc.) or a goggle type (electronic device 800A, electronic device 800B, etc.).

[0498] An electronic device according to one aspect of the present invention can transmit information to earphones by wire or wireless means.

[0499] The electronic device 6500 shown in Figure 24A is a portable information terminal that can be used as a smartphone.

[0500] The electronic device 6500 includes a housing 6501, a display unit 6502, a power button 6503, a button 6504, a speaker 6505, a microphone 6506, a camera 6507, and a light source 6508. The display unit 6502 has a touch panel function.

[0501] A display device according to one embodiment of the present invention can be applied to the display unit 6502.

[0502] Figure 24B is a schematic cross-sectional view of the housing 6501 including the end on the microphone 6506 side.

[0503] A light-transmitting protective member 6510 is provided on the display side of the housing 6501, and the display panel 6511, optical member 6512, touch sensor panel 6513, printed circuit board 6517, battery 6518, etc. are arranged in the space enclosed by the housing 6501 and the protective member 6510.

[0504] The protective member 6510 is fixed to the display panel 6511, the optical member 6512, and the touch sensor panel 6513 by an adhesive layer (not shown).

[0505] In the area outside the display unit 6502, a portion of the display panel 6511 is folded back, and the FPC 6515 is connected to this folded portion. IC 6516 is mounted on the FPC 6515. The FPC 6515 is connected to terminals provided on the printed circuit board 6517.

[0506] A display device according to one embodiment of the present invention can be applied to the display panel 6511. As a result, an extremely lightweight electronic device can be realized. Furthermore, because the display panel 6511 is extremely thin, a large-capacity battery 6518 can be installed while keeping the thickness of the electronic device low. In addition, by folding back a part of the display panel 6511 and placing the connection part with the FPC 6515 on the back of the pixel section, an electronic device with a narrow bezel can be realized.

[0507] Figure 24C shows an example of a television system. The television system 7100 has a display unit 7000 incorporated into a housing 7101. Here, the housing 7101 is shown to be supported by a stand 7103.

[0508] A display device according to one embodiment of the present invention can be applied to the display unit 7000.

[0509] The television device 7100 shown in Figure 24C can be operated using the operation switches on the housing 7101 and a separate remote control unit 7111. Alternatively, the display unit 7000 may be equipped with a touch sensor, and the television device 7100 can be operated by touching the display unit 7000 with a finger or the like. The remote control unit 7111 may have a display unit that displays information output from the remote control unit 7111. Channels and volume can be controlled and the image displayed on the display unit 7000 can be controlled using the operation keys or touch panel on the remote control unit 7111.

[0510] The television system 7100 is configured to include a receiver and a modem. The receiver can receive general television broadcasts. Furthermore, by connecting to a wired or wireless communication network via the modem, it is possible to perform one-way (from sender to receiver) or two-way (between sender and receiver, or between receivers, etc.) information communication.

[0511] Figure 24D shows an example of a notebook computer. The notebook computer 7200 has a casing 7211, a keyboard 7212, a pointing device 7213, an external connection port 7214, etc. A display unit 7000 is incorporated into the casing 7211.

[0512] A display device according to one embodiment of the present invention can be applied to the display unit 7000.

[0513] Figures 24E and 24F show examples of digital signage.

[0514] The digital signage 7300 shown in Figure 24E includes a housing 7301, a display unit 7000, and a speaker 7303, etc. Furthermore, it may include LED lamps, operation keys (including a power switch or operation switch), connection terminals, various sensors, a microphone, etc.

[0515] Figure 24F shows a digital signage 7400 mounted on a cylindrical column 7401. The digital signage 7400 has a display unit 7000 that is provided along the curved surface of the column 7401.

[0516] In Figures 24E and 24F, a display device according to one embodiment of the present invention can be applied to the display unit 7000.

[0517] The larger the display area 7000, the more information can be provided at once. Furthermore, a larger display area 7000 is more eye-catching, which can, for example, enhance the effectiveness of advertising.

[0518] Applying a touch panel to the display unit 7000 is preferable because it not only allows images or videos to be displayed on the display unit 7000, but also enables intuitive operation by the user. Furthermore, when used for purposes such as providing route information or traffic information, intuitive operation can enhance usability.

[0519] As shown in Figures 24E and 24F, it is preferable that the digital signage 7300 or digital signage 7400 can be linked wirelessly with an information terminal 7311 or information terminal 7411 such as a smartphone owned by the user. For example, the advertising information displayed on the display unit 7000 can be displayed on the screen of the information terminal 7311 or information terminal 7411. In addition, the display on the display unit 7000 can be switched by operating the information terminal 7311 or information terminal 7411.

[0520] The digital signage 7300 or digital signage 7400 can also be used to run games using the screen of the information terminal 7311 or information terminal 7411 as the control device (controller). This allows an unspecified number of users to participate in and enjoy the game simultaneously.

[0521] The electronic device shown in Figures 25A to 25G includes a housing 9000, a display unit 9001, a speaker 9003, operation keys 9005 (including a power switch or operation switch), connection terminals 9006, a sensor 9007 (including a function to detect, detect, or measure force, displacement, position, velocity, acceleration, angular velocity, rotational speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared radiation), a microphone 9008, etc.

[0522] In Figures 25A to 25G, a display device according to one embodiment of the present invention can be applied to the display unit 9001.

[0523] The electronic devices shown in Figures 25A to 25G have various functions. For example, they may have functions to display various information (still images, videos, text images, etc.) on a display unit, a touch panel function, a function to display a calendar, date or time, a function to control processing by various software (programs), a wireless communication function, a function to read and process programs or data recorded on a recording medium, etc. However, the functions of electronic devices are not limited to these and can have various functions. Electronic devices may have multiple display units. Furthermore, electronic devices may be equipped with a camera, etc., and have functions to capture still images or videos and save them to a recording medium (external or built into the camera), a function to display the captured images on a display unit, etc.

[0524] Details of the electronic equipment shown in Figures 25A to 25G will be explained below.

[0525] Figure 25A is a perspective view showing a personal digital information terminal (PDI) 9101. The PDI 9101 can be used, for example, as a smartphone. The PDI 9101 may also be equipped with a speaker 9003, connection terminals 9006, sensors 9007, etc. The PDI 9101 can also display text and image information on multiple surfaces. Figure 25A shows an example where three icons 9050 are displayed. Information 9051, indicated by a dashed rectangle, can also be displayed on other surfaces of the display unit 9001. Examples of information 9051 include notifications of incoming emails, SNS messages, and phone calls, the subject of an email or SNS message, the sender's name, date and time, time, battery level, and signal strength. Alternatively, icons 9050 or the like may be displayed in the position where the information 9051 is displayed.

[0526] Figure 25B is a perspective view showing the personal digital assistant (PDA) 9102. The PDA 9102 has the function of displaying information on three or more sides of the display unit 9001. Here, an example is shown in which information 9052, information 9053, and information 9054 are displayed on different sides. For example, a user can check information 9053, which is displayed in a position that can be observed from above the PDA 9102, while the PDA 9102 is stored in the breast pocket of their clothing. The user can check the display without taking the PDA 9102 out of their pocket and decide, for example, whether or not to answer a call.

[0527] Figure 25C is a perspective view showing the tablet terminal 9103. The tablet terminal 9103 can run various applications, such as mobile phone calls, email, document viewing and creation, music playback, internet communication, and computer games. The tablet terminal 9103 has a display unit 9001, a camera 9002, a microphone 9008, and a speaker 9003 on the front of the housing 9000, operation keys 9005 as buttons for operation on the side of the housing 9000, and connection terminals 9006 on the bottom.

[0528] Figure 25D is a perspective view showing a wristwatch-type personal information terminal 9200. The personal information terminal 9200 can be used, for example, as a smartwatch (registered trademark). The display unit 9001 has a curved display surface, allowing it to display information along the curved surface. The personal information terminal 9200 can also make hands-free calls by communicating with, for example, a wireless communication headset. Furthermore, the personal information terminal 9200 can transmit data to other information terminals and be charged via a connection terminal 9006. The charging operation may be performed by wireless power supply.

[0529] Figures 25E to 25G are perspective views showing a foldable portable information terminal 9201. Figure 25E shows the portable information terminal 9201 in an unfolded state, Figure 25G shows it in a folded state, and Figure 25F shows a perspective view of the state in between, transitioning from one of Figures 25E or 25G to the other. The portable information terminal 9201 offers excellent portability in its folded state and excellent readability of the display due to its seamless, wide display area in its unfolded state. The display unit 9001 of the portable information terminal 9201 is supported by three housings 9000 connected by hinges 9055. For example, the display unit 9001 can be bent with a radius of curvature of 0.1 mm to 150 mm.

[0530] This embodiment can be combined with other embodiments as appropriate.

[0531] ANO: Wiring, C11: Capacitive element, C12: Capacitive element, C21: Capacitive element, D110: Width, D141: Width, GL: Wiring, GL11: Wiring, GL12: Wiring, L100: Channel length, m: Pixel, M11: Transistor, M12: Transistor, M13: Transistor, M14: Transistor, M15: Transistor, M16: Transistor, M21: Transistor, M22: Transistor, M23: Transistor, SL: Wiring, T110: Thickness, VCOM: Wiring, W100: Channel width, 10: Semiconductor device, 10A: Semiconductor device, 10B: Semiconductor device, 10C : Semiconductor device, 10D: Semiconductor device, 10E: Semiconductor device, 10F: Semiconductor device, 10G: Semiconductor device, 11B: Sub-pixel, 11G: Sub-pixel, 11R: Sub-pixel, 50A: Display device, 50B: Display device, 50H: Display device, 50I: Display device, 51: Pixel circuit, 51A: Pixel circuit, 51B: Pixel circuit, 51C: Pixel circuit, 51D: Pixel circuit, 51E: Pixel circuit, 51F: Pixel circuit, 51G: Pixel circuit, 51H: Pixel circuit, 52A: Transistor, 52B: Transistor, 52C: Transistor, 53: Capacitive element, 61: Light-emitting device, 62: Liquid crystal device, 70 : Side view, 70a: Side view, 100: Transistor, 102: Substrate, 104: Conductive layer, 104f: Conductive film, 106: Insulating layer, 108: Oxide semiconductor layer, 108f: Metal oxide film, 110: Insulating layer, 110a: Insulating layer, 110af: Insulating film, 110b: Insulating layer, 110bf: Insulating film, 110c: Insulating layer, 110cf: Insulating film, 111: Pixel electrode, 111B: Pixel electrode, 111G: Pixel electrode, 111R: Pixel electrode, 112: Conductive layer, 112a: Conductive layer, 112B: Conductive layer, 112b: Conductive layer, 112bf: Conductive film, 112bS: Conductive layer, 112c: Conductive layer, 113: EL layer, 113B: EL layer, 113G: EL layer, 113R: EL layer, 114: common layer, 115: common electrode, 117: light shielding layer, 123: conductive layer, 124B: conductive layer, 124G: conductive layer, 124R: conductive layer, 125: insulating layer, 126B: conductive layer, 126G: conductive layer, 126R: conductive layer, 127: insulating layer, 128: layer, 130B: light-emitting element, 130G: light-emitting element, 130R: light-emitting element, 131: protective layer, 132B: colored layer, 132G: colored layer, 132R: colored layer, 133: layer, 133B: layer, 133G: layer, 133R: layer, 137: slit portion, 140: connection portion,141: Aperture, 142: Adhesive layer, 151: Substrate, 152: Substrate, 162: Display section, 164: Circuit section, 165: Conductive layer, 166: Conductive layer, 172: FPC, 173: IC, 197: Connection section, 201: Pixel, 205B: Transistor, 205D: Transistor, 205G: Transistor, 205R: Transistor, 218: Insulating layer, 230: Pixel, 231: First drive circuit section, 232: Second drive circuit section, 235: Insulating layer, 236: Wiring, 237: Insulating layer, 238: Wiring, 242: Connection layer, 301: Oxygen block layer, 302: Oxygen block layer, 302f: Acid Basic block layer, 401: first part, 402: second part, 403: third part, 700A: electronic equipment, 700B: electronic equipment, 721: housing, 723: mounting part, 727: earphone part, 750: earphone, 751: display panel, 753: optical component, 756: display area, 757: frame, 758: nose pad, 800A: electronic equipment, 800B: electronic equipment, 820: display part, 821: housing, 822: communication part, 823: mounting part, 824: control unit, 825: imaging unit, 827: earphone part, 832: lens, 6500: electronic equipment, 6501: housing, 6502 : Display unit, 6503: Power button, 6504: Button, 6505: Speaker, 6506: Microphone, 6507: Camera, 6508: Light source, 6510: Protective component, 6511: Display panel, 6512: Optical component, 6513: Touch sensor panel, 6515: FPC, 6516: IC, 6517: Printed circuit board, 6518: Battery, 7000: Display unit, 7100: Television equipment, 7101: Housing, 7103: Stand, 7111: Remote control unit, 7200: Notebook computer, 7211: Housing, 7212: Keyboard, 7213: Pointing Device, 7214: External connection port, 7300: Digital signage, 7301: Enclosure, 7303: Speaker, 7311: Information terminal, 7400: Digital signage, 7401: Pillar, 7411: Information terminal, 9000: Enclosure, 9001: Display unit, 9002: Camera, 9003: Speaker, 9005: Operation key, 9006: Connection terminal, 9007: Sensor, 9008: Microphone, 9050: Icon, 9051: Information, 9052: Information, 9053: Information, 9054: Information, 9055: Hinge, 9101: Portable information terminal, 9102: Portable information terminal,9103: Tablet device, 9200: Personal digital assistant, 9201: Personal digital assistant,

Claims

It comprises an oxide semiconductor layer, a first conductive layer, a first insulating layer, a second insulating layer, and a first oxygen blocking layer. The oxide semiconductor layer has a first portion that is in contact with the first insulating layer and the second insulating layer, and a second portion that is in contact with the first conductive layer and the first oxygen block layer. The first oxygen blocking layer is provided between the second insulating layer and the second portion. A semiconductor device wherein the material of the first oxygen blocking layer is a material having a lower oxygen diffusion coefficient than at least one of the material of the second insulating layer and the material of the oxide semiconductor layer.   It comprises an oxide semiconductor layer, a first conductive layer, a first insulating layer, a second insulating layer, and a first oxygen blocking layer. The first insulating layer has a portion provided above the first conductive layer, The oxide semiconductor layer has a first portion that is in contact with the side surface of the first insulating layer and the second insulating layer, and a second portion that is in contact with the first conductive layer and the first oxygen block layer. The first oxygen blocking layer is provided between the second insulating layer and the second portion. A semiconductor device wherein the material of the first oxygen blocking layer is a material having a lower oxygen diffusion coefficient than at least one of the material of the second insulating layer and the material of the oxide semiconductor layer.   It comprises an oxide semiconductor layer, a first conductive layer, a second conductive layer, a first insulating layer, a second insulating layer, a first oxygen blocking layer, and a second oxygen blocking layer. The first insulating layer has a portion provided above the first conductive layer, The second conductive layer has a portion provided above the first insulating layer, The oxide semiconductor layer has a first portion that is in contact with the side surface of the first insulating layer and the second insulating layer, a second portion that is in contact with the first conductive layer and the first oxygen block layer, and a third portion that is in contact with the second conductive layer and the second oxygen block layer. The first oxygen blocking layer is provided between the second insulating layer and the second portion. The second oxygen blocking layer is provided between the second insulating layer and the third portion. A semiconductor device wherein the material of the first oxygen blocking layer and the material of the second oxygen blocking layer are each materials having a smaller oxygen diffusion coefficient than at least one of the material of the second insulating layer and the material of the oxide semiconductor layer.   It comprises an oxide semiconductor layer, a first conductive layer, a second conductive layer, a first insulating layer, a second insulating layer, a first oxygen blocking layer, and a second oxygen blocking layer. The first insulating layer has a portion provided above the first conductive layer, The second conductive layer has a portion provided above the first insulating layer, The first insulating layer and the second conductive layer have openings that reach the first conductive layer. The oxide semiconductor layer has a first portion that is in contact with the side surface of the first insulating layer and the second insulating layer at the opening, a second portion that is in contact with the upper surface of the first conductive layer and the first oxygen block layer at the opening, and a third portion that is in contact with the second conductive layer and the second oxygen block layer. The first oxygen blocking layer is provided between the second insulating layer and the second portion. The second oxygen blocking layer is provided between the second insulating layer and the third portion. A semiconductor device wherein the material of the first oxygen blocking layer and the material of the second oxygen blocking layer are each materials having a smaller oxygen diffusion coefficient than at least one of the material of the second insulating layer and the material of the oxide semiconductor layer.   In any one of claims 1 to 4, The semiconductor device comprises the second insulating layer, which contains oxygen and silicon.   It comprises an oxide semiconductor layer, a first conductive layer, a second conductive layer, a first insulating layer, a second insulating layer, a first oxygen blocking layer, and a second oxygen blocking layer. The first insulating layer has a portion provided above the first conductive layer, The second conductive layer has a portion provided above the first insulating layer, The first insulating layer has a slit portion that reaches the first conductive layer, The oxide semiconductor layer has a first portion in the slit that is in contact with the side surface of the first insulating layer and the second insulating layer, a second portion in the slit that is in contact with the upper surface of the first conductive layer and the first oxygen block layer, and a third portion that is in contact with the second conductive layer and the second oxygen block layer. The first oxygen blocking layer is provided between the second insulating layer and the second portion. The second oxygen blocking layer is provided between the second insulating layer and the third portion. A semiconductor device wherein the material of the first oxygen blocking layer and the material of the second oxygen blocking layer are each materials having a smaller oxygen diffusion coefficient than at least one of the material of the second insulating layer and the material of the oxide semiconductor layer.   In claim 6, The slit portion has a second oxide semiconductor layer, The oxide semiconductor layer has a channel formation region for the first transistor. The semiconductor device has a second oxide semiconductor layer having a channel formation region for a second transistor. It comprises an oxide semiconductor layer, a first conductive layer, a second conductive layer, a first insulating layer, a second insulating layer, a first oxygen blocking layer, and a second oxygen blocking layer. The first insulating layer has a portion provided above the first conductive layer, The second conductive layer has a portion provided above the first insulating layer, The upper surface shape of the second conductive layer is consistent with or substantially consistent with the upper surface shape of the first insulating layer. The oxide semiconductor layer has a first portion that is in contact with the side surface of the first insulating layer and the second insulating layer, a second portion that is in contact with the upper surface of the first conductive layer and the first oxygen block layer, and a third portion that is in contact with the second conductive layer and the second oxygen block layer. The first oxygen blocking layer is provided between the second insulating layer and the second portion. The second oxygen blocking layer is provided between the second insulating layer and the third portion. A semiconductor device wherein the material of the first oxygen blocking layer and the material of the second oxygen blocking layer are each materials having a smaller oxygen diffusion coefficient than at least one of the material of the second insulating layer and the material of the oxide semiconductor layer.   In any one of claims 3, 4, 6 to 8, A semiconductor device wherein a portion of the third portion overlaps with a portion of the first portion via a portion of the first insulating layer.   In any one of claims 3, 4, 6 to 8, A semiconductor device wherein a portion of the third portion overlaps with a portion of the first portion via a portion of the second conductive layer.   It comprises an oxide semiconductor layer, a first conductive layer, a first insulating layer, a second insulating layer, and a first layer. The first insulating layer has a portion provided above the first conductive layer, The oxide semiconductor layer has a first portion that is in contact with the side surface of the first insulating layer and in contact with the second insulating layer, and a second portion that is in contact with the first conductive layer and in contact with the first layer. The first layer is provided between the second insulating layer and the second portion. The second insulating layer comprises silicon oxide, A semiconductor device having at least one of the following as the first layer: aluminum, hafnium, molybdenum, tungsten, titanium, aluminum oxide, hafnium oxide, hafnium aluminate, magnesium oxide, gallium oxide, molybdenum oxide, tungsten oxide, titanium oxide, zinc gallium oxide, aluminum nitride, hafnium nitride, magnesium nitride, gallium nitride, molybdenum nitride, tungsten nitride, titanium nitride, silicon nitride, and silicon nitride or indium tin oxide.   It comprises an oxide semiconductor layer, a first conductive layer, a first insulating layer, a second insulating layer, and a first layer. The first insulating layer has a portion provided above the first conductive layer, The oxide semiconductor layer has a first portion that is in contact with the side surface of the first insulating layer and in contact with the second insulating layer, and a second portion that is in contact with the first conductive layer and in contact with the first layer. The first layer is provided between the second insulating layer and the second portion. A semiconductor device wherein the first layer is an oxide having the same metal elements as the oxide semiconductor layer, and has higher crystallinity than the oxide semiconductor layer.   It comprises an oxide semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, a first insulating layer, and a second insulating layer. The first insulating layer has a portion provided above the first conductive layer, The second conductive layer has a portion provided above the first insulating layer, The oxide semiconductor layer has a first portion that is in contact with the side surface of the first insulating layer and the second insulating layer, a second portion that is in contact with the first conductive layer and the third conductive layer, and a third portion that is in contact with the second conductive layer and the first insulating layer. The third conductive layer is provided between the second insulating layer and the second portion. The second conductive layer is provided between the second insulating layer and the third portion. A semiconductor device wherein a portion of the third portion overlaps with a portion of the first portion via a portion of the first insulating layer.   A first conductive layer is formed, A first insulating layer is formed above the first conductive layer. A second conductive layer is formed above the first insulating layer. An opening is formed in the second conductive layer and the first insulating layer, reaching the first conductive layer. An oxide semiconductor layer is formed so as to be in contact with the side surface of the first insulating layer, the upper surface of the first conductive layer, and the upper surface of the second conductive layer. A first layer is formed above the portion of the oxide semiconductor layer that overlaps with the first conductive layer, and a first film is formed above the portion of the oxide semiconductor layer that overlaps with the second conductive layer. The first film is processed into a second layer, A second insulating layer is formed such that it is in contact with the portion of the oxide semiconductor layer facing the side surface of the first insulating layer, in contact with the portion of the first layer that overlaps the oxide semiconductor layer and the first conductive layer, and in contact with the portion of the second layer that overlaps the oxide semiconductor layer and the second conductive layer. After forming the second insulating layer, heat treatment is performed. The first layer and the first film are deposited separately by a single sputtering method. A method for manufacturing a semiconductor device, wherein the material of the first layer and the material of the second layer are each materials having a smaller oxygen diffusion coefficient at the temperature of the heat treatment than at least one of the material of the second insulating layer and the material of the oxide semiconductor layer.   In claim 14, A method for fabricating a semiconductor device, wherein the oxide semiconductor layer is formed by the ALD method.   In claim 14 or claim 15, A method for manufacturing a semiconductor device, wherein the method for forming the first layer and the first film is a film formation method with greater anisotropy than the method for forming the oxide semiconductor layer.