Pixel circuit, display device, and method for driving same

Abstract

The present application discloses an active current-driven display device of which the luminance quickly reaches a target luminance when pixel circuits are switched from a dark state to a bright state. In an active organic EL display device, each pixel circuit includes a preliminary charging circuit having an auxiliary capacitor for charge accumulation. Charges are accumulated in the pixel circuits by the charging of the auxiliary capacitors before the writing of the data voltage, and then, when organic EL elements start emitting light on the basis of the writing of the data voltage, the charges are injected from the auxiliary capacitors to the organic EL elements and the parasitic capacitance of the organic EL elements is charged during a charge injection period that is a predetermined period (predetermined period that includes the starting time of the writing) that includes the point of time when the organic EL elements should start emitting light.

Description

Pixel Circuit, Display Device, and Driving Method Thereof

[0001] The present disclosure relates to a current-driven display device provided with a light-emitting element driven by a current such as an organic EL (Electroluminescence) element as a display element, and a pixel circuit thereof.

[0002] In recent years, an organic EL display device including a pixel circuit including an organic EL element (also called an organic light-emitting diode (Organic Light Emitting Diode: OLED)) has been put into practical use. The pixel circuit of the organic EL display device includes, in addition to the organic EL element, a driving transistor, a writing control transistor, a holding capacitor, and the like. A thin film transistor (Thin Film Transistor) is used for the driving transistor and the writing control transistor, and a holding capacitor is connected to the gate terminal as a control terminal of the driving transistor. A voltage corresponding to a video signal representing an image to be displayed (more specifically, a voltage indicating the gradation value of a pixel to be formed in the pixel circuit, hereinafter referred to as a "data voltage") is applied to this holding capacitor via a data signal line from a driving circuit. The organic EL element is a self-emitting display element that emits light with a luminance corresponding to the current flowing through it. The driving transistor is provided in series with the organic EL element and controls the current flowing through the organic EL element according to the voltage held in the holding capacitor.

[0003] In such an active-type organic EL display device including a pixel circuit including a driving transistor and the like in addition to the organic EL element, there is one configured to be able to perform high-speed video display with high resolution. For example, such an organic EL display device is used for image display of a fast-moving game or the like.

[0004] Furthermore, some active-type organic EL displays are configured to allow changing the refresh rate, which indicates the frequency at which the image data for one screen, consisting of pixel data held in each pixel circuit of the display unit, is rewritten. Among such variable refresh rate organic EL displays, there are displays that have a low-speed drive mode that displays images at a relatively low refresh rate and a normal drive mode that displays images at a relatively high refresh rate. In the low-speed drive mode, the display unit (or each pixel circuit) may be driven so that a refresh frame period in which the image data for one screen in the display unit is rewritten and multiple non-refresh frame periods in which the image data for one screen held in the display unit is not rewritten appear alternately (this drive is called "pause drive").

[0005] In connection with this application, International Publication No. 02 / 075710 discloses an organic EL display device equipped with a pixel circuit that has a function to pre-charge the capacitance (parasitic capacitance) formed on the organic EL element with a charge below the emission threshold. As shown in Figure 6, the pixel circuit in this organic EL display device includes a video signal current supply circuit that includes a thin-film transistor (hereinafter referred to as "TFT") 61 selected by scan lines 66 and data lines 67 and a TFT 62 that constitutes a source follower circuit, as well as a pre-charge circuit consisting of a reference voltage source 9 and a TFT 2 provided in parallel with the organic EL element 1. In this pixel circuit, by applying a voltage below the emission threshold voltage to the organic EL element 1 in advance of emission using the pre-charge circuit, it is possible to shorten the time required until emission.

[0006] International Publication No. 02 / 075710 Pamphlet

[0007] In conventional active organic EL displays that perform high-resolution, high-speed video display as described above, when the display changes from dark to bright (for example, from black to white), a phenomenon occurs where the target brightness is not reached for several frames from the first display frame after the change, as shown in Figure 5. In the example shown in Figure 5, the target brightness is reached in the third frame period Tfr3 after the change to bright display. In this example, the average brightness value in frame periods Tfr1 to Tfr6 is a relative brightness of 1. In such displays, when displaying images such as fast-moving games, outlines with different color tones than the original display may appear around the objects.

[0008] Furthermore, in an active organic EL display device with a variable refresh rate, when displaying a still image by sleep drive in low-speed drive mode, when the screen display switches from dark to bright, the display continues for a predetermined period of time with the write state at the time of the switch, resulting in a difference from the display in normal drive mode. In other words, an image that should be displayed with a relative brightness of 1 is displayed with a lower brightness.

[0009] Furthermore, in active organic EL display devices configured with adjustable light emission duty cycles, when controlling the maximum light output for the entire frame with a low light emission duty cycle during low-brightness display, the balance of each emitted color in the displayed image may be disrupted. The main cause of this phenomenon is the decrease in brightness due to the delay in the start of light emission caused by the parasitic capacitance of the light-emitting element. This phenomenon occurs when the balance of each emitted color is set for a display image with a high light emission duty cycle, and then the ratio of the light emission delay period to the total light emission period becomes relatively non-negligible when the light emission duty cycle is lowered. In this case, when displaying with a low light emission duty cycle, not only the outlines of moving images but also the overall color tone of the screen changes from the original color tone compared to when displaying with a high light emission duty cycle.

[0010] Therefore, in current-driven display devices such as active organic EL displays, it is desirable that the brightness quickly reaches the target brightness when switching from a dark display to a bright display.

[0011] Pixel circuits according to some embodiments of the present disclosure are in a display device having a display unit including a plurality of data signal lines and a plurality of first scan signal lines, wherein the pixel circuit is provided in the display unit so as to correspond to one of the plurality of data signal lines and one of the plurality of first scan signal lines, and comprises: a current-driven light-emitting element having a parasitic capacitance and an emission threshold voltage; a holding capacitor; a drive transistor that supplies an amount of current to the light-emitting element corresponding to the voltage held in the holding capacitor; a write control switching element having a control terminal connected to one of the scan signal lines and controlling whether or not to write the voltage of one of the data signal lines to the holding capacitor as a data voltage; and a pre-charging circuit for charging the parasitic capacitance of the light-emitting element, wherein the display unit further includes a common pre-charging line or a plurality of individual pre-charging lines. The pre-charging circuit includes an auxiliary capacitor, a pre-charging control switching element that controls whether or not to charge the auxiliary capacitor by the voltage of the common pre-charging line or the voltage of one of the plurality of individual pre-charging lines, and a charge injection control switching element that controls whether or not to electrically connect the auxiliary capacitor to the light-emitting element so that charge can be injected from the auxiliary capacitor to the light-emitting element and the parasitic capacitance can be charged.

[0012] Some embodiments of the present disclosure include a display unit including a plurality of data signal lines, a plurality of first scan signal lines, a common pre-charge line or a plurality of individual pre-charge lines, and a plurality of pixel circuits, each corresponding to one of the plurality of data signal lines and one of the plurality of first scan signal lines; a drive circuit for driving the plurality of pixel circuits; and a pre-charge voltage supply circuit, wherein each of the plurality of pixel circuits includes a current-driven light-emitting element having a parasitic capacitance and an emission threshold voltage, a holding capacitor, a drive transistor that supplies an amount of current to the light-emitting element corresponding to the voltage held in the holding capacitor, a write control switching element having a control terminal connected to one of the first scan signal lines and controlling whether or not to write the voltage of one of the data signal lines to the holding capacitor as a data voltage; and a pre-charge circuit for charging the parasitic capacitance of the light-emitting element. The pre-charging circuit includes an auxiliary capacitor, a pre-charging control switching element that controls whether or not to charge the auxiliary capacitor by the voltage of the common pre-charging line or the voltage of one of the plurality of individual pre-charging lines, and a charge injection control switching element that controls whether or not to electrically connect the auxiliary capacitor to the light-emitting element so that charge can be injected from the auxiliary capacitor to the light-emitting element and the parasitic capacitance can be charged; the pre-charging voltage supply circuit supplies a voltage for charging the auxiliary capacitor to each of the plurality of pixel circuits as a pre-charging voltage via the common pre-charging line or the plurality of individual pre-charging lines; each of the plurality of pixel circuits is provided with a pre-charging period for charging the auxiliary capacitor and a writing period for writing the data voltage to the holding capacitor, and a charge injection period is provided after the pre-charging period for injecting charge from the auxiliary capacitor to the light-emitting element, which includes the time when the light-emitting element should start to emit light based on the writing of the data voltage to the holding capacitor.The drive circuit drives the plurality of pixel circuits such that the pre-charge control switching element is ON and the charge injection control switching element is OFF during the pre-charge period, the write control switching element is ON during the write period, and the pre-charge control switching element is OFF and the charge injection control switching element is ON during the charge injection period.

[0013] A driving method according to some embodiments of the present disclosure is a driving method for a display device having a display unit including a plurality of data signal lines and a plurality of pixel circuits, comprising the step of driving the plurality of pixel circuits, each of the plurality of pixel circuits including a pre-charging circuit having a current-driven light-emitting element with parasitic capacitance and a light emission threshold voltage, a holding capacitor, a driving transistor that supplies an amount of current to the light-emitting element corresponding to the voltage held in the holding capacitor, and an auxiliary capacitor for storing charge to charge the parasitic capacitance of the light-emitting element, each of the plurality of pixel circuits is provided with a pre-charging period and a writing period, the driving step comprising the step of charging the auxiliary capacitor during the pre-charging period, writing the voltage of one of the plurality of data signal lines to the holding capacitor as a data voltage during the writing period, and, when the light-emitting element starts to emit light based on the writing of the data voltage, injecting charge from the auxiliary capacitor to the light-emitting element to charge the parasitic capacitance during a charge injection period provided after the pre-charging period as a period including the time when the light-emitting element should start to emit light.

[0014] In some embodiments of the present disclosure, the display unit includes a plurality of data signal lines, a plurality of first scan signal lines, a common pre-charge line or a plurality of individual pre-charge lines, and a plurality of pixel circuits, each corresponding to one of the plurality of data signal lines and one of the plurality of first scan signal lines. Each pixel circuit includes a current-driven light-emitting element having a parasitic capacitance and an emission threshold voltage, a holding capacitor, a drive transistor that supplies an amount of current to the light-emitting element corresponding to the voltage held in the holding capacitor, a write control switching element having a control terminal connected to one of the first scan signal lines and controlling whether or not to write the voltage of one of the data signal lines as a data voltage to the holding capacitor, and a pre-charge circuit for charging the parasitic capacitance of the light-emitting element, the pre-charge circuit including an auxiliary capacitor, a pre-charge control switching element that controls whether or not to charge the auxiliary capacitor with the voltage of the common pre-charge line or the voltage of one of the plurality of individual pre-charge lines, and a charge injection control switching element that controls whether or not to electrically connect the auxiliary capacitor to the light-emitting element so that charge can be injected from the auxiliary capacitor to the light-emitting element and the parasitic capacitance can be charged. Furthermore, each pixel circuit is provided with a pre-charging period and a writing period. The on / off switching of the write control switching element, pre-charging control switching element, and charge injection control switching element within the pixel circuit is controlled by the drive circuit, resulting in the following operation. Specifically, during the pre-charging period, the auxiliary capacitor is charged by a pre-charging voltage supplied from the pre-charging voltage supply circuit via a common pre-charging line or one of several individual pre-charging lines. During the writing period, the voltage of the one data signal line is written to the holding capacitor as a data voltage. A charge injection period is provided as a period including the time when the light-emitting element should start emitting light based on the writing of this data voltage. During this charge injection period, charge is injected from the auxiliary capacitor charged by the pre-charging voltage to the light-emitting element, charging the parasitic capacitance of the light-emitting element. As a result, the delay in the start of light emission is reduced compared to conventional methods when the light-emitting element should start emitting light based on the writing of the data voltage.

[0015] This is a block diagram showing the overall configuration of a display device according to the first embodiment. This is a timing chart for explaining the general operation of the display device according to the first embodiment. This is a circuit diagram showing the configuration of the pixel circuit in a display device according to the first comparative example. This is a diagram showing the rise time characteristics of the light emission of the organic EL element in the pixel circuit in the first comparative example. This is a diagram showing the change in brightness when the pixel circuit switches from a dark state to a bright state in the first comparative example. This is a circuit diagram showing the configuration of the pixel circuit in a display device according to the second comparative example. This is a circuit diagram showing the configuration of the pixel circuit in the first embodiment. This is a signal waveform diagram for explaining the operation of the pixel circuit in the first embodiment. This is a characteristic diagram of an organic EL element for explaining the operation of the organic EL element in the first embodiment, where (A) shows the voltage-current characteristics of the organic EL element, (B) shows the voltage-luminance characteristics of the organic EL element, and (C) shows the current-luminance characteristics of the organic EL element. This is a block diagram showing the overall configuration of a display device according to the second embodiment. This is a circuit diagram showing the configuration of the pixel circuit in the second embodiment. This is a signal waveform diagram for explaining the operation of the pixel circuit in the second embodiment. This is a signal waveform diagram for explaining the pre-charging operation for driving the pixel circuit in the display device according to the second embodiment. This is a signal waveform diagram illustrating the operation of the pixel circuit in the first modified example of the second embodiment described above. This is a block diagram showing the overall configuration of the display device according to the second modified example of the second embodiment described above. This is a block diagram showing the configuration of the display control circuit in the second modified example described above. This is a flowchart showing the pre-charging voltage processing in the second modified example described above. This is a block diagram showing the overall configuration of the display device according to the third embodiment described above. This is a circuit diagram showing the configuration of the pixel circuit in the third embodiment described above. This is a signal waveform diagram illustrating the operation of the pixel circuit in the third embodiment described above.

[0016] Embodiments will be described below with reference to the attached drawings. In each of the transistors mentioned below, the gate terminal corresponds to the control terminal, one of the drain terminal and the source terminal corresponds to the first conduction terminal, and the other corresponds to the second conduction terminal. Furthermore, the transistors in each of the embodiments below are thin-film transistors having a channel layer formed of, for example, low-temperature polysilicon, but the present invention is not limited thereto, and some or all of the transistors used may be N-channel thin-film transistors having a channel layer formed of, for example, an oxide semiconductor containing indium, gallium, zinc, and oxygen. Moreover, in this specification, "connection" means "electrical connection" unless otherwise specified, and to the extent that it does not depart from the gist of the present invention, it includes not only direct connections but also indirect connections via other elements.

[0017] <1. First Embodiment> Figure 1 is a block diagram showing the overall configuration of a display device according to the first embodiment. This display device is an active-matrix type organic EL display device that uses organic EL elements (OLEDs) as light-emitting elements.

[0018] <1.1 Outline Configuration> As shown in Figure 1, this organic EL display device comprises a display unit 100, a data driver (data signal line driving circuit) 300, a first scanning driver 410, a second scanning driver 420, and a third scanning driver 430, a display control circuit 200, and a power supply circuit 500. In the configuration shown in Figure 1, the first scanning driver 410 and the second scanning driver 420 of the three scanning drivers 410 to 430 are arranged on one side of the display unit 100, and the third scanning driver is arranged on the other side of the display unit 100. However, the combination of scanning drivers arranged on one side and the other side of the display unit 100 may differ from the configuration shown in Figure 1, and the three scanning drivers 410 to 430 may be arranged only on one side of the display unit 100. Furthermore, at least a portion of the scanning drivers 410 to 430 and the data driver 300 may be integrally formed with the display unit 100. These points are also the same in other embodiments described later. The power supply circuit 50 generates the high-level power supply voltage ELVDD and low-level power supply voltage ELVSS to be supplied to the display unit 100, and a power supply voltage (not shown) to be supplied to the display control circuit 200, data driver 300, and scanning-side drivers 410 to 430. The three scanning-side drivers 410 to 430 constitute a scanning-side drive circuit, and the data driver 300 constitutes a data-side drive circuit. The scanning-side drive circuit and the data-side drive circuit together constitute a drive circuit that drives the following n × m pixel circuits 15 provided on the display unit 100.

[0019] The display unit 100 is equipped with m data signal lines DL1 to DLm (where m is an integer of 2 or more), n first scan signal lines SC11 to SC1n (where n is an integer of 2 or more), n second scan signal lines SC21 to SC2n, and n third scan signal lines SC31 to SC3n, which intersect these lines. Furthermore, the display unit 100 is provided with n × m pixel circuits 15 arranged in a matrix along m data signal lines DL1 to DLm and n first scan signal lines SC11 to SC1n. Each pixel circuit 15 corresponds to one of the m data signal lines DL1 to DLm and one of the n first scan signal lines SC11 to SC1n (hereinafter, when distinguishing each pixel circuit 15, the pixel circuit corresponding to the i-th first scan signal line SC1i and the j-th data signal line DLj will be referred to as the "i-th row, j-th column pixel circuit" and will be denoted by the symbol "Pix(i,j)"). Each pixel circuit 15 also corresponds to one of the n second scan signal lines SC21 to SC2n and one of the n third scan signal lines SC31 to SC3n.

[0020] The display unit 100 is further provided with a voltage line common to n × m pixel circuits Pix(1,1) to Pix(n,m). More specifically, it is provided with a first power line for supplying a high-level power supply voltage ELVDD for driving the organic EL element (hereinafter referred to as the "high-level power line," and denoted by the same symbol "ELLVDD" as the high-level power supply voltage), a second power line for supplying a low-level power supply voltage ELVSS for driving the organic EL element (hereinafter referred to as the "low-level power line," and denoted by the same symbol "ELVSS" as the low-level power supply voltage), a first auxiliary charging line VLC1 for supplying the first auxiliary charging voltage Vc1 described later, and a second auxiliary charging line VLC2 for supplying the second auxiliary charging voltage Vc2 described later.

[0021] <1.2 General Operation> The display control circuit 200 receives an input signal Sin from outside the display device, which includes image information representing the image to be displayed and timing control information for image display. Based on this input signal Sin, it generates an image data signal DV, a data-side control signal DCT, a first scanning-side control signal SCT1, a second scanning-side control signal SCT2, and a third scanning-side control signal SCT3. It outputs the image data signal DV and the data-side control signal DCT to the data driver 300, the first scanning-side control signal SCT1 to the first scanning-side driver 410, the second scanning-side control signal SCT2 to the second scanning-side driver 420, and the third scanning-side control signal SCT3 to the third scanning-side driver 430. Furthermore, the display control circuit 200 also functions as a pre-charging voltage supply circuit, generating a first pre-charging voltage Vc1 as a pre-charging reference voltage and a second pre-charging voltage Vc2 as a common pre-charging voltage, and applying them to the first pre-charging line VLC1 and the second pre-charging line VLC2 in the display unit 100, respectively.

[0022] Figure 2 is a timing chart illustrating the schematic operation of the display device according to this embodiment. Based on the first scanning control signal SCT1, the first scanning driver 410 generates first scanning signals SC1(1) to SC1(n) that are sequentially at a low level (L level) as an active level for a predetermined period corresponding to one horizontal period in each frame period, as shown in Figure 2, and applies them to the first scanning signal lines SC11 to SC1n, respectively. The second scanning driver 420 generates second scanning signals SC2(1) to SC2(n) that are sequentially at an L level (active level) for a predetermined period corresponding to one horizontal period in each frame period, as shown in Figure 2, and applies them to the second scanning signal lines SC21 to SC2n, respectively. The third scanning driver 430 generates third scanning signals SC3(1) to SC3(n) that are sequentially at an L level (active level) for a predetermined period corresponding to one horizontal period in each frame period, as shown in Figure 2, and applies them to the third scanning signal lines SC31 to SC3n, respectively.

[0023] On the other hand, the data driver 300 generates data signals D(1) to D(m) that change in conjunction with the first scanning signals SC1(1) to SC1(n), as shown in Figure 2, based on the image data signal DV and the data-side control signal DCT, and applies them to the data signal lines DL1 to DLm, respectively.

[0024] In this way, the first scanning signal lines SC11 to SC1n and the data signal lines DL1 to DLm in the display unit 100 are driven, and the voltage of the data signal D(j) indicating the pixel data is written as a data voltage to each pixel circuit Pix(i,j), and each pixel circuit Pix(i,j) emits light with a brightness corresponding to the written data voltage. Furthermore, in this light emission operation, the second scanning signal lines SC21 to SC2n and the third scanning signal lines SC31 to SC3n in the display unit 100 are driven, and in order to reduce the delay in the start of light emission when each pixel circuit Pix(i,j) switches from a dark display state (non-emitting state) to a bright display state (emitting state) due to the writing of the above data voltage to each pixel circuit Pix(i,j), the parasitic capacitance of the organic EL element as a light-emitting element in the pixel circuit Pix(i,j) is charged based on the first pre-charging voltage Vc1 and the second pre-charging voltage Vc2 (details will be described later).

[0025] <1.3 Display Problems in Conventional Display Devices (First Comparative Example)> As described above, in conventional active-matrix organic EL display devices that display high-resolution, high-speed video, when a certain pixel circuit Pix(i,j) is changed from a dark display state (hereinafter referred to as "dark state") to a bright display state (hereinafter referred to as "bright state"), a phenomenon occurs in which the target brightness is not reached for several frames from the first display frame after the change. As a result, when displaying images such as fast-moving games, contours with different color tones than the original display may appear around the object. Before describing the configuration and operation of the pixel circuit 15 in this embodiment, we will explain such display problems using a conventional display device (hereinafter referred to as "First Comparative Example") that uses a pixel circuit 14a with the configuration shown in Figure 3 as an example. In the following, the same reference numerals will be used for parts of the configuration in the First Comparative Example that are the same as or correspond to the configuration in this embodiment. In the following, unless otherwise specified, "dark state" means that the organic EL element OL in the pixel circuit Pix(i,j) is in an off state (non-emitting state).

[0026] In the first comparative example, the display unit 100 is equipped with scan signal lines SC1 to SCn and data signal lines DL1 to DLm, which correspond to the first scan signal lines SC11 to SC1n. However, unlike this embodiment, neither the second scan signal lines SC21 to SC2n nor the second scan signal lines SC21 to SC2n are provided. For this reason, neither the second scan-side driver 420 nor the third scan-side driver 430 is provided in the first comparative example.

[0027] Figure 3 is a circuit diagram showing the configuration of the pixel circuit 14a in the first comparative example, and shows the configuration of the pixel circuit Pix(i,j) in the i-th row and j-th column, corresponding to the i-th scan signal line SCi and the j-th data signal line DLj (1 ≤ i ≤ n, 1 ≤ j ≤ m). As shown in Figure 3, the pixel circuit 14a includes an organic EL element (organic light-emitting diode) OL, a write control transistor T1, a drive transistor T2, and a holding capacitor C1. Both transistors T1 and T2 are P-channel thin-film transistors, and transistor T1 is a double-gate transistor that functions as a switching element. The organic EL element OL contains a parasitic capacitance Cp.

[0028] As shown in Figure 3, the drive transistor has a source terminal connected to the high-level power line ELVDD, a gate terminal connected to the data signal line DLj via the write control transistor T1 and also connected to the high-level power line ELVDD via the holding capacitor C1, and a drain terminal connected to the anode of the organic EL element OL. The cathode of the organic EL element OL is connected to the low-level power line ELVSS, and the gate terminal of the write control transistor T1 is connected to the scan signal line SCi.

[0029] Figure 4 shows the rise time characteristics of the light emission of the organic EL element OL in the pixel circuit in the first comparative example. In the pixel circuit 14a shown in Figure 3, when the voltage of the data signal D(j) is written to the holding capacitor C1 via the write control transistor T1, which is in the ON state, during the write period when the scanning signal SC(i) is at the L level, the pixel circuit 14a, i.e., Pix(i,j), switches from a dark state (non-emitting state) to a bright state (emitting state), and as shown in Figure 4, a delay (Tdelay) occurs in the start of light emission of the organic EL element OL.

[0030] In other words, when the voltage of node NOL, which includes the anode of the organic EL element OL, is equal to the low-level power supply voltage ELVSS and the pixel circuit 14a is in a dark state, when a data voltage that switches the pixel circuit 14a from the dark state to the bright state is written, a drain current Id flows from the drive transistor T2 towards the organic EL element OL accordingly. However, immediately after writing the data voltage, the charge injected into the organic EL element OL by this drain current Id is consumed by charging the parasitic capacitance Cp and does not contribute to light emission. For this reason, as shown in Figure 4, immediately after writing the data voltage, the organic EL element OL remains in a non-emitting state for a predetermined time (5 μs in the example of Figure 4). After the end of the data voltage writing period, the write control transistor T1 is in an off state, the holding capacitor C1 holds a voltage corresponding to the data voltage, and the drive transistor T2 receives a drain current Id determined by the gate-source voltage Vgs and the drain-source voltage Vds corresponding to the held voltage. Ideally, a current IOL equal to the drain current Id flows through the organic EL element OL, and the voltage VNOL at the anode node NOL is desirable to be the voltage corresponding to this current IOL (see Figure 9(A) below). However, when high-speed video display is performed, the charging of the parasitic capacitance Cp causes the rise in the anode node NOL voltage VNOL not to saturate within the writing period of the data voltage. As a result, after the end of the writing period of the data voltage, the display will be performed at a brightness lower than the original brightness corresponding to the data voltage for a while.

[0031] <1.4 Second Comparative Example> A conventional display device (hereinafter referred to as "Second Comparative Example") using a pixel circuit with a pre-charge function that can address the display problems in the First Comparative Example described above will be explained.

[0032] Figure 6 is a circuit diagram showing the configuration of the pixel circuit 14b in the second comparative example. This pixel circuit 14b is the pixel circuit described in the organic EL display device disclosed in International Publication No. 02 / 075710. This pixel circuit 14b includes a precharge circuit provided in parallel with the organic EL element 1. This precharge circuit consists of a TFT 4 connected in series with a reference voltage source 9, and the voltage of the reference voltage source 9 is below the emission threshold voltage. According to this second comparative example, in the pixel circuit 14b, the time required until emission can be shortened by applying a voltage below the emission threshold voltage to the organic EL element 1 in the precharge circuit prior to emission.

[0033] However, in the pixel circuit 14b of this second comparative example, the precharge voltage is a fixed voltage below the emission threshold voltage determined by the reference voltage source 9. Therefore, in organic EL display devices that display high-resolution, high-speed video, the reduction in the time required for light emission may not be sufficient.

[0034] <1.5 Configuration and Operation of Pixel Circuit in the First Embodiment> Figure 7 is a circuit diagram showing the configuration of the pixel circuit 15, i.e., the i-th row and j-th column pixel circuit Pix(i,j), corresponding to the i-th first scan signal line SC1i and the j-th data signal line DLj in the first embodiment (1 ≤ i ≤ n, 1 ≤ j ≤ m). As shown in Figure 7, the corresponding first scan signal line SC1i, the corresponding second scan signal line SC2i, the corresponding third scan signal line SC3i, and the corresponding data signal line DLj are connected to this pixel circuit Pix(i,j), as well as the high-level power line ELVDD, the low-level power line ELVSS, the first auxiliary charge line VLC1 as an auxiliary charge reference voltage line, and the second auxiliary charge line VLC2 as a common auxiliary charge line. Note that the pixel circuit 15 in this embodiment is the same as the pixel circuit 14a in the first comparative example described above, except for matters that are not newly described below (see Figure 3).

[0035] As shown in Figure 7, this pixel circuit 15, like the pixel circuit 14a in the first comparative example (Figure 3), includes an organic EL element OL as a light-emitting element with parasitic capacitance Cp, a write control transistor T1, a drive transistor T2, and a holding capacitor C1, and in addition to these, it includes a pre-charging circuit 152. This pre-charging circuit 152 has an auxiliary capacitor C2, a pre-charging control transistor T4, and a charge injection control transistor T3, and transistors T3 and T4 both function as switching elements. As shown in Figure 7, the pre-charging control transistor T4 and the charge injection control transistor T3 are connected in series with each other, and the node corresponding to their connection point (hereinafter referred to as the "auxiliary capacitor node") NC2 is connected to the first pre-charging line VLC1 via the auxiliary capacitor C2. This auxiliary capacitor node NC2 is connected to the second pre-charging line VLC2 via the pre-charging control transistor T4, and is also connected to the node (hereinafter referred to as the "anode node") NOL containing the anode of the organic EL element OL via the charge injection control transistor T3. The gate terminal of the pre-charge control transistor T4 is connected to the second scan signal line SC2i, and the gate terminal of the charge injection control transistor T3 is connected to the third scan signal line SC3i.

[0036] Next, the operation of the pixel circuit 15 shown in Figure 7, that is, the i-th row, j-th column pixel circuit Pix(i,j) in this embodiment, will be explained with reference to Figure 8. Figure 8 is a signal waveform diagram for explaining the operation of this pixel circuit Pix(i,j). In this embodiment, as shown in Figure 8, the pixel circuit Pix(i,j) is driven by a first scan signal SC1(i), a second scan signal SC2(i), a third scan signal SC3(i), and a data signal D(j), etc., which are changing drive signals. In addition to these drive signals SC1(i) ​​to SC3(i) and D(j), the pixel circuit Pix(i,j) is supplied with a first pre-charging voltage Vc1 and a second pre-charging voltage Vc2 for driving. The first pre-charging voltage Vc1 is set to a constant voltage lower than the light emission threshold voltage Vth, with respect to the low-level power supply voltage ELVSS. In the following explanation, for convenience, unless otherwise specified, ELVSS = 0. The second pre-charging voltage Vc2 is a fixed voltage applied to the pixel circuit Pix(i,j) via the second pre-charging line VLC2. This second pre-charging voltage Vc2 is slightly higher than the light emission threshold voltage Vth, and an appropriate value for improving the delay in the start of light emission of the organic EL element OL when the pixel circuit Pix(i,j) switches from the dark state to the bright state is predetermined based on experiments or computer simulations, taking into account the electrical characteristics of the organic EL element OL (including the capacitance value of parasitic capacitance Cp), etc.

[0037] The first scan signal line SC1i corresponding to each pixel circuit Pix(i,j) is in a selected state for the duration of the write period Twr, which is set for each frame period. That is, as shown in Figure 8, for the pixel circuit Pix(i,j) in Figure 7, the write period Twr is the period during which the first scan signal SC1(i) ​​transmitted by the corresponding first scan signal line SC1i is at the L level. During this write period Twr, the voltage of the corresponding data signal line DLj, i.e., the voltage of the data signal D(j), is written as a data voltage to the holding capacitor C1 via the ON-state write control transistor T1. Figure 8 shows the operation of the pixel circuit Pix(i,j) when the voltage of the data signal D(j) indicating a bright display is written during the write period Twr while the pixel circuit Pix(i,j) is in a dark state (non-emitting state).

[0038] In this embodiment, a pre-charging period Tpc is provided before the write period Twr in which such data voltages are written. Immediately before the pre-charging period Tpc, the first scan signal SC1(i), the second scan signal SC2(i), and the third scan signal SC3(i) are all at a high level (H level) as an inactive level. During this pre-charging period Tpc, i.e., the period t1 to t2 shown in Figure 8, the second scan signal SC2(i) is at an L level and the second scan signal line SC2i is in a selected state. Therefore, the pre-charging control transistor T4 is in the ON state, and the second pre-charging voltage Vc2 is supplied from the second pre-charging line VLC2 through the pre-charging control transistor T4 to one end of the auxiliary capacitor C2. The other end of the auxiliary capacitor C2 is supplied with a first pre-charging voltage Vc1, which is a fixed voltage lower than the light emission threshold voltage Vth(OL), through the first pre-charging line VLC1. As a result, the auxiliary capacitor C2 is charged and the voltage Vc2 - Vc1 is maintained in the auxiliary capacitor C2, and the voltage at the auxiliary capacitor node NC2 is maintained at the second pre-charge voltage Vc2.

[0039] At time t3, after this pre-charging period Tc, the third scanning signal SC3(i) changes from a high level to a low level, remains at the low level until time t5, and then changes back to a high level. The period t3 to t5 during which the third scanning signal SC3(i) is at the low level is the charge injection period Tci of this pixel circuit Pix(i,j). During this charge injection period Tci, the pre-charging control transistor T4 is in the off state and the charge injection control transistor T3 is in the on state. At the start time t3 of this charge injection period Tci, the voltage at the auxiliary capacitor node NC2 is equal to the voltage at the end time t2 of the pre-charging period Tpc. On the other hand, before this starting point t3, the pixel circuit Pix(i,j) is in a dark state and there is no current supplied from the driving transistor T2 to the organic EL element OL. Therefore, the charge accumulated in the parasitic capacitance Cp moves to the low-level power line ELVSS via the organic EL element OL according to the characteristics shown in Figure 9(A) below, and the voltage of the anode node NOL is lower than the emission threshold voltage Vth(OL). For this reason, the charge accumulated in the auxiliary capacitor C2 during the pre-charging period Tpc is injected from the anode to the organic EL element OL via the charge injection control transistor T3 and is accumulated in the parasitic capacitance Cp. That is, a current IOL flows from the auxiliary capacitor node NC2 to the organic EL element OL via the charge injection control transistor T3, and this current (hereinafter referred to as "OLED current") IOL charges the parasitic capacitance Cp, causing the anode node voltage VNOL to rise.

[0040] Following the start of the charge injection period Tci described above, at time t4, the first scanning signal SC1(i) ​​changes from a high level to a low level, maintains the low level until time t6 after the charge injection period Tci, and then changes back to a high level. The period t4 to t6 during which the first scanning signal SC1(i) ​​is at a low level is the writing period Twr. During this writing period Twr, the write control transistor T1 is in the ON state, and the voltage of the data signal D(j) is written as a data voltage to the holding capacitor C1 via the write control transistor T1. As a result, the voltage held in the holding capacitor C1 changes from a voltage indicating a dim display to a voltage indicating a bright display. A current corresponding to the holding voltage of this holding capacitor C1 is supplied from the drive transistor T2 to the organic EL element OL.

[0041] Figure 9 is a characteristic diagram illustrating the operation of the organic EL element OL in the pixel circuit Pix(i,j). Figure 9(A) shows the voltage-current characteristics of the organic EL element OL, Figure 9(B) shows the voltage-luminance characteristics of the organic EL element OL, and Figure 9(C) shows the current-luminance characteristics of the organic EL element OL.

[0042] During the charge injection period Tci, when the anode voltage VNOL rises to equal the voltage VNC2 of the auxiliary capacitor node NC2, charge injection from the auxiliary capacitor C2 to the organic EL element OL stops, and the increasing OLED current IOL begins to decrease after reaching a peak. However, at this point, a drain current Id corresponding to the voltage indicating brightness held in the holding capacitor C1 is supplied as a drive current from the drive transistor T2 to the organic EL element OL. Based on the voltage-current characteristics in Figure 9(A), the OLED current IOL settles to the amount of this drive current. The anode voltage VNOL also changes in accordance with this change in OLED current IOL. That is, the anode voltage VNOL starts to rise from the start time t3 of the charge injection period Tci, continues to rise after the start time t4 of the write period Twr, reaches the light emission threshold voltage Vth, then begins to decrease after reaching a peak value, and asymptotically approaches the voltage corresponding to the above drive current based on the voltage-current characteristics in Figure 9(A). As the anode voltage VNOL rises, the organic EL element OL begins to emit light when it reaches the emission threshold voltage Vth, as shown in Figure 9(B). The luminescence brightness of the organic EL element OL is approximately proportional to the OLED current IOL, as shown in Figure 9(C).

[0043] Thus, in the pre-charge period Tpc immediately before the writing period Twr in which the data voltage is written into the pixel circuit Pix(i,j), the auxiliary capacitor node voltage VNC2 is charged until it reaches a predetermined voltage (second pre-charge voltage) Vc2 that is higher than the light emission threshold voltage Vth. Thereafter, charge injection from the auxiliary capacitor C2 to the organic EL element OL is started at time t3 before the writing period Twr, and the charge injection continues until time t5 before the end point t6 of the writing period Twr. Therefore, when the pixel circuit Pix(i,j) switches from the dark state to the bright state by writing the data voltage, the anode node voltage VNOL, which was lower than the light emission threshold voltage Vth in the previous frame period when it was in the dark state, exceeds the light emission threshold voltage Vth in a short time, and the organic EL element OL starts to emit light. Note that, in the period where the charge injection period Tci and the writing period Twr overlap, spike-like light emission with a light amount several times the original light amount may occur instantaneously. Therefore, the second pre-charge voltage Vc2 is preferably a voltage at which the organic EL element OL emits light with low luminance while exceeding the light emission threshold voltage Vth.

[0044] When the bright state continues for the pixel circuit Pix(i,j) in a plurality of subsequent frame periods, in each of the plurality of frame periods, immediately before the charge injection period Tci, the organic EL element OL is in the light emission state and the anode node voltage VNOL is higher than the light emission threshold voltage Vth. When the charge injection period Tci is started, the auxiliary capacitor node NC2 is connected to the anode node NOL through the charge injection control transistor T3 in the on state. At this time, the auxiliary capacitor node voltage VNC2 is higher than the light emission threshold voltage Vth. Therefore, in the plurality of frame periods, the bright display continues with the luminance corresponding to the data voltage held in the holding capacitor C1 without causing a decrease in luminance.

[0045] Even when the display switches from a bright state to a dark state by writing a data voltage during the write period Twr of the next frame period following multiple bright state frame periods as described above, the auxiliary capacitor C2 is charged during the pre-charge period Tpc until the auxiliary capacitor node voltage VNC2 becomes a second pre-charge voltage Vc2 that is slightly higher than the light emission threshold voltage Vth. Then, when the charge injection period Tci starts at time t3 before the write period Twr, the auxiliary capacitor node NC2 is electrically connected to the anode node NOL via the ON-state charge injection control transistor T3. Meanwhile, in the next frame period, the data voltage indicating a dark display (the voltage that turns off the organic EL element OL) is written to the holding capacitor C1 during the write period Twr. As a result, the current supply from the drive transistor T2 to the organic EL element OL stops, and the anode node voltage VNOL changes in the direction of decreasing below the light emission threshold voltage Vth. On the other hand, as described above, when the charge injection period Tci begins, the auxiliary capacitor node NC2, which has a voltage VNC2 higher than the light emission threshold voltage Vth, is electrically connected to the anode node NOL. However, when the current supply from the drive transistor T2 to the organic EL element OL stops, the accumulated charge of the parasitic capacitance Cp and the charge supplied from the auxiliary capacitor C2 to the anode node NOL of the organic EL element OL are rapidly discharged through the organic EL element OL (see Figure 9(A)), and the pixel circuit Pix(i,j) becomes dark. Therefore, when the second pre-charging voltage Vc2 is slightly higher than the light emission threshold voltage Vth, as in this embodiment, the delay in the organic EL element OL turning off during the switch from the bright state to the dark state is usually not a problem.

[0046] <1.6 Effects> According to the embodiment described above, during the pre-charging period Tpc immediately preceding the writing period Twr in which the data voltage is written to the pixel circuit Pix(i,j), the auxiliary capacitor C2 is charged with a second pre-charging voltage Vc2 that is slightly higher than the light emission threshold voltage Vth. Subsequently, during the charge injection period Tci, which includes the time when the organic EL element OL should start emitting light based on the writing of the data voltage (start time t4 of the writing period Twr), the accumulated charge of the auxiliary capacitor C2 is injected into the organic EL element OL, and the parasitic capacitance Cp is charged. As a result, when the pixel circuit Pix(i,j) switches from a dark state to a bright state due to the writing of the data voltage, the anode voltage VNOL quickly reaches the light emission threshold voltage Vth. Consequently, when the data voltage is written to the holding capacitor C1 during the writing period Twr, light emission starts in a shorter time than in the conventional method, and the pixel circuit Pix(i,j) quickly switches from a dark display to a bright display. Thus, in conventional active organic EL display devices, as shown in Figure 5, when the pixel circuit Pix(i,j) switches from a dark state to a bright state, the display may be at a lower brightness than the original brightness for a few frames immediately after the switch due to a delay in the start of light emission. However, in this embodiment, the delay in the start of light emission when switching from a dark state to a bright state is reduced, thereby suppressing the decrease in brightness for a few frames immediately after the switch.

[0047] Also, in this embodiment, unlike the second comparative example (FIG. 6) in which pre-charging is performed by applying a constant voltage from the reference voltage source 9 to the organic EL element 1 to shorten the time required for light emission, in the pre-charging period Tpc, charges are injected from the auxiliary capacitor C2 charged to the second pre-charging voltage Vc2 slightly higher than the light emission threshold voltage Vth to the organic EL element OL (parasitic capacitance Cp), thereby reducing the light emission delay of the organic EL element OL (see FIGS. 7 and 8). For this reason, charges are injected from the auxiliary capacitor C2 according to the voltage difference between the auxiliary capacitor node voltage VNC2 and the anode node voltage VNOL. Therefore, according to this embodiment, compared with the second comparative example, charges for charging the parasitic capacitance Cp are supplied from the pre-charging circuit 152 to the organic EL element OL almost without excess or deficiency, thereby avoiding inconvenient display due to charge injection and reducing the delay in the start of light emission due to the writing of the data voltage.

[0048] <2. Second Embodiment> Next, a display device according to the second embodiment of the present invention will be described. In the first embodiment described above, the first pre-charging voltage Vc1 applied to the first terminal as one terminal of the auxiliary capacitor C2 in each pixel circuit Pix(i, j) and the second pre-charging voltage Vc2 applied to the second terminal as the other terminal are fixed voltages having different values from each other. In contrast, in this embodiment, the voltage applied to the first terminal of the auxiliary capacitor C2 is the first pre-charging voltage Vc1 as a fixed voltage, similar to the first embodiment described above. However, the voltage applied to the second terminal of the auxiliary capacitor C2 switches between the high-level charging voltage VcH and the low-level charging voltage VcL according to the display state of each pixel circuit Pix(i, j). The high-level charging voltage VcH is a constant voltage higher than the light emission threshold voltage Vth, and the low-level charging voltage VcL is a constant voltage lower than the light emission threshold voltage Vth (see FIG. 13 described later). Hereinafter, the configuration and operation of this embodiment will be described mainly focusing on the differences from the first embodiment described above. Regarding the configuration and operation that are not newly described below for this embodiment, they are the same as the configuration and operation of the first embodiment described above. Also, the same reference numerals will be assigned to the same or corresponding parts of the configuration of this embodiment as those of the first embodiment described above.

[0049] <2.1 Outline Configuration> Figure 10 is a block diagram showing the overall configuration of the display device according to this embodiment. As shown in Figure 10, this display device, similar to the first embodiment described above, includes a display unit 100, a display control circuit 200, a data driver 300 as a data-side drive circuit, first, second and third scanning-side drivers 410, 420, and 430, and a power supply circuit 500. In addition to these, it also includes a backup charge driver 310 as a data-side drive circuit, an image processing circuit 201, and a history discrimination circuit 202. The power supply voltage (not shown) to be supplied to the image processing circuit 201, the history discrimination circuit 202, and the backup charge driver 310 is generated by the power supply circuit 500. The backup charge driver 310 may be integrally formed with the display unit 100.

[0050] Unlike the first embodiment described above, the display unit 100 has, instead of a second auxiliary charging line VLC2 common to each pixel circuit Pix(i,j), m auxiliary charging lines VL1 to VLm corresponding to m data signal lines DL1 to DLm, respectively, arranged as individual auxiliary charging lines, and these auxiliary charging lines VL1 to VLm are driven by an auxiliary charging driver 310. Each pixel circuit Pix(i,j) corresponds to one of these m auxiliary charging lines VL1 to VLm, VLj.

[0051] <2.2 General Operation> The general operation of the display device according to this embodiment is the same as in the first embodiment described above for the operation of driving the data signal lines DL1 to DLm, the first scan signal lines SC11 to SC1n, the second scan signal lines SC21 to SC2n, and the third scan signal lines SC31 to SC3n.

[0052] In this embodiment, the image processing circuit 201 generates a difference signal between the display signal of the previous frame (a signal indicating pixel data for one frame) and the display signal of the current frame, as well as an index of the average display level in each frame, based on the image data signal DV and the data-side control signal DCT. The history discrimination circuit 202 generates a history signal Sh indicating the lighting history information of each pixel based on these difference signals and the index of the average display level, and outputs this history signal Sh together with the data-side control signal DCT to the auxiliary charging driver 310. The auxiliary charging driver 310 generates auxiliary charging signals Vc(1) to Vc(m) based on these history signals Sh and the data-side control signal DCT and applies them to the auxiliary charging lines VL1 to VLm, respectively. As a result, the auxiliary charging driver 310 functions as an auxiliary charging voltage supply circuit that provides the voltage of the auxiliary charging signal Vc(j) as the auxiliary charging voltage to each pixel circuit Pix(i,j).

[0053] <2.3 Pixel Circuit Configuration and Operation> Figure 11 is a circuit diagram showing the configuration of the pixel circuit 15, i.e., the i-th row and j-th column pixel circuit Pix(i,j), corresponding to the i-th first scan signal line SC1i and the j-th data signal line DLj in this embodiment (1 ≤ i ≤ n, 1 ≤ j ≤ m). As can be seen by comparing Figure 11 with Figure 7, the i-th row and j-th column pixel circuit Pix(i,j) in this embodiment is connected to the auxiliary charging line VLj, one of the m auxiliary charging lines VL1 to VLm arranged in the display unit 100, instead of the second auxiliary charging line VLC2 in the first embodiment described above. That is, as shown in Figure 11, the auxiliary capacitor node NC2 in the pixel circuit Pix(i,j) is connected to the corresponding auxiliary charging line VLj via the auxiliary charging control transistor T4. Other configurations of the pixel circuit Pix(i,j) in this embodiment are the same as those of the pixel circuit Pix(i,j) in the first embodiment described above (see Figure 7).

[0054] Figure 12 is a signal waveform diagram illustrating the operation of the pixel circuit Pix(i,j) in this embodiment, showing the operation of the pixel circuit Pix(i,j) when it changes from a dark state (non-emitting state) to a bright state (emitting state) by writing a data voltage to the pixel circuit Pix(i,j). As can be seen by comparing Figure 12 with Figure 8, the pixel circuit Pix(i,j) in this embodiment is driven by a first scan signal SC1(i), a second scan signal SC2(i), a third scan signal SC3(i), and a data signal D(j), similar to the pixel circuit Pix(i,j) in the first embodiment (see Figure 8). In this case, the pre-charging voltage Vchg(i,j) supplied to the pixel circuit Pix(i,j) in this embodiment via the corresponding pre-charging line VLj is substantially the same as the second pre-charging voltage Vc2 supplied to the pixel circuit Pix(i,j) via the second pre-charging line VLC2 in the first embodiment, and has a voltage value slightly higher than the light emission threshold voltage Vth. Therefore, in this embodiment as well, the anode voltage VNOL and OLED current IOL change in the same way as in the first embodiment (see Figures 8 and 12). As a result, when switching from a dark state to a bright state by writing a data voltage to the pixel circuit Pix(i,j), the delay in the start of light emission is reduced, and the same effect as in the first embodiment is obtained.

[0055] On the other hand, in this embodiment, the voltage supplied to the auxiliary capacitor node NC2 (the second terminal of the auxiliary capacitor C2) switches between two constant voltages, a high-level charging voltage VcH and a low-level charging voltage VcL, depending on the display state of each pixel circuit Pix(i,j). Therefore, the operation when the display changes from a bright state to a dark state due to the writing of data voltage to the pixel circuit Pix(i,j) differs from that of the first embodiment described above. This point will be explained below.

[0056] Figure 13 is a signal waveform diagram illustrating the pre-charging operation for driving the pixel circuit 15 in the display device according to this embodiment. Figure 13 shows the data voltage Vdat(i,j) supplied to the i-th row, j-th column pixel circuit Pix(i,j) via the data signal line DLj, and the pre-charging voltage Vchg(i,j) supplied to the same pixel circuit Pix(i,j) via the pre-charging line VLj. Here, the data voltage Vdat(i,j) is the voltage of the data signal D(j) when the i-th first scan signal SC1(i) ​​is at the L level, i.e., the voltage of the data signal D(j) during the write period Twr of the pixel circuit Pix(i,j), and the pre-charging voltage Vchg(i,j) is the voltage of the pre-charging signal Vc(j) when the i-th second scan signal SC2(i) is at the L level, i.e., the voltage of the pre-charging signal Vc(j) during the pre-charging period Tpc of the pixel circuit Pix(i,j).

[0057] The auxiliary charging driver 310 generates an auxiliary charging signal Vc(j) such that the auxiliary charging voltage Vchg(i,j) switches between two constant voltages, a high-level charging voltage VcH and a low-level charging voltage VcL, depending on the display state of the pixel circuit Pix(i,j), and applies it to the auxiliary charging line VLj. That is, as shown in Figure 13, in the pixel circuit Pix(i,j), if the dark state continues for multiple frame periods, the auxiliary charging voltage Vchg(i,j) is the low-level charging voltage VcL, and if the bright state continues for multiple frame periods, the auxiliary charging voltage Vchg(i,j) is the high-level charging voltage VcH. When the pixel circuit Pix(i,j) switches from a dark state to a bright state by writing a data voltage Vdat(i,j), a pre-charging signal Vc(j) is generated such that the pre-charging voltage Vchg(i,j) is a high-level charging voltage VcH during the pre-charging period Tpc immediately preceding the writing period Twr of the data voltage Vdat(i,j) for the switching. When the pixel circuit Pix(i,j) switches from a bright state to a dark state by writing a data voltage Vdat(i,j), a pre-charging signal Vc(j) is generated such that the pre-charging voltage Vchg(i,j) is a low-level charging voltage VcL during the pre-charging period Tpc immediately preceding the writing period Twr of the data voltage Vdat(i,j) for the switching.

[0058] To generate such a pre-charge signal Vc(j), a history signal Sh indicating the lighting history of the pixel circuit Pix(i,j) and a data-side control signal DCT are input to the pre-charge driver 310. The data-side control signal DCT is generated by the display control circuit 200, as in the first embodiment. The history signal Sh is generated by the image processing circuit 201 and the history discrimination circuit 202, as described above. Specifically, the image processing circuit 201 generates a difference signal between the display signal of the previous frame and the display signal of the current frame, and the history discrimination circuit 202 detects the switching from a dark state to a bright state and the switching from a bright state to a dark state for each pixel circuit based on this difference signal, and generates a history signal Sh indicating lighting history information including this detection result.

[0059] Based on these history signals Sh and data-side control signals DCT, the pre-charge driver 310 changes the voltage level of the pre-charge signal Vc(j) in accordance with the switching from a dark state to a bright state or from a bright state to a dark state, as shown in Figure 13. As a result, a high-level charging voltage VcH, which is a constant voltage higher than the emission threshold voltage Vth, is provided as the pre-charge signal Vc(j) to the pixel circuit Pix(i,j) that should display in a bright state, and a low-level charging voltage VcL, which is a constant voltage lower than the emission threshold voltage Vth, is provided as the pre-charge signal Vc(j) to the pixel circuit Pix(i,j) that should display in a dark state.

[0060] <2.4 Effects> According to the embodiment described above, when the state switches from dark to bright by writing a data voltage Vdat(i,j) to the pixel circuit Pix(i,j), as shown in Figure 13, during the pre-charging period Tpc immediately preceding the data voltage writing period Twr, the auxiliary capacitor C2 is charged with a high-level charging voltage VcH that is higher than the light emission threshold voltage Vth. During the subsequent charge injection period Tci, the accumulated charge of the auxiliary capacitor C2 is injected into the organic EL element OL, charging the parasitic capacitance Cp, so that the anode voltage VNOL quickly reaches the light emission threshold voltage Vth. As a result, the same effects as in the first embodiment are obtained.

[0061] Furthermore, according to this embodiment, when the pixel circuit Pix(i,j) switches from a bright state to a dark state due to the writing of a data voltage Vdat(i,j) to the pixel circuit Pix(i,j), as shown in Figure 13, the voltage of the pre-charging signal Vc(j) for charging the auxiliary capacitor C2 during the pre-charging period Tpc immediately preceding the data voltage writing period Twr is a low-level charging voltage VcL. After the auxiliary capacitor C2 is charged by this low-level charging voltage VcL, during the charge injection period Tci, the auxiliary capacitor node NC2 is electrically connected to the anode node NOL via the ON-state charge injection control transistor T3. Since this low-level charging voltage VcL is a constant voltage lower than the light emission threshold voltage Vth, when the data voltage Vdat(i,j) is written to the holding capacitor C1 during the writing period Twr, the current supply from the drive transistor T2 to the organic EL element OL in the pixel circuit Pix(i,j) stops, and the anode voltage VNOL quickly becomes a voltage below the light emission threshold voltage Vth. As a result, the pixel circuit Pix(i,j) switches from the bright state to the dark state more quickly than in the first embodiment described above.

[0062] <2.5 First Modification of the Second Embodiment> In the display device according to the second embodiment configured as described above, when the refresh rate is low (low-frequency drive), the amount of fluctuation in the auxiliary capacitor node voltage VNC2 due to the off-leak current of the charge injection control transistor T3 and the pre-charge control transistor T4 is larger than when the refresh rate is high (high-frequency drive). Therefore, it is conceivable to compensate for this fluctuation by changing the first pre-charge voltage Vc1 according to the refresh rate. Hereinafter, a display device in which the first pre-charge voltage Vc1 is changed according to the refresh rate in order to compensate for the amount of fluctuation in the auxiliary capacitor node voltage VNC2 due to the off-leak current in the display device according to the second embodiment described above will be described as the first modification of the second embodiment. Note that matters not newly described below regarding the display device according to this modification are the same as those of the display device according to the second embodiment described above, and the same or corresponding parts will be denoted by the same reference numerals.

[0063] In this modified example, the pre-charging driver 310 changes from the off state to the on state when the pixel circuit Pix(i,j) changes from a dark state to a bright state due to the writing of the data voltage Vdat(i,j), which is the voltage of the data signal D(j), to the pixel circuit Pix(i,j). However, at the start of writing the data voltage Vdat(i,j), the gate-source voltage Vgs of the drive transistor T2 does not immediately become Vdat(i,j)-ELVDD, and in the period immediately following the start of the writing period Twr (hereinafter referred to as the "period immediately after writing"), the drive transistor T2 is in a state in which virtually no current flows. Therefore, assuming that the anode voltage VNOL changes from the anode voltage VoB of the previous frame period to the anode voltage VoC of the current frame period when the charge injection control transistor T3 changes from the off state to the on state, then from the law of conservation of charge for the sum of the charge amount of the auxiliary capacitor node NC2 and the charge amount of the node NOL, the following equation (1) holds: C2(VcH-Vc1)+Cp・VoB=C2(VoC-Vc1)+Cp・VoC …(1) Here, let ΔVnc2 (>0) be the amount of fluctuation (decrease) of the auxiliary capacitor node voltage VNC2 due to the off-leak current from the end of the pre-charging period Tpr to the start of the charge injection period Tpr, and that in order to compensate for this fluctuation amount ΔVnc2, the first pre-charging voltage Vc1 is changed from voltage Vc1o to Vc1c just before the charge injection control transistor T3 turns on, then the following equation is obtained from the above equation (1). C2{(VcH-ΔVnc2)-Vc1o}+Cp・VoB=C2(VoC-Vc1c)+Cp・VoC …(2) From equation (2) above, the following equation is obtained: VoC={C2(VcH+Vc1c-Vc1o-ΔVnc2)+Cp・VoB+} / (C2+Cp) …(3) From equation (3) above, if Vc1c is set to satisfy the following equation, the fluctuation amount ΔVnc2 of the auxiliary capacitor node voltage VNC2 can be compensated. Vc1c=Vc1o+ΔVnc2 …(4)

[0064] Therefore, in this modified example, the first pre-charging voltage Vc1, which is commonly supplied to each pixel circuit Pix(i,j), is configured to change by ΔVnc2 (>0) immediately before the charge injection control transistor T3 turns on. The configuration in this modified example will be explained below with reference to Figure 14. Figure 14 is a signal waveform diagram illustrating the operation of the pixel circuit Pix(i,j) in this modified example.

[0065] In this modified example, the amount of fluctuation ΔVnc2 of the auxiliary capacitor node voltage VNC2 due to the off-leak current of the charge injection control transistor T3 and the pre-charge control transistor T4 in each pixel circuit Pix(i,j) is determined in advance for various refresh rates (drive frequencies) by computer simulation or experiment, and a representative value of the fluctuation amount ΔVnc2, such as the average value, is stored in the internal memory. The display control circuit 200 is configured such that, during display operation, for example as shown in Figure 14, the first pre-charging voltage Vc1 is set to a predetermined voltage Vc1o (<Vth) immediately before the start of the pre-charging period Tpc, the first pre-charging voltage Vc1 is increased by ΔVnc2, the amount of change in the auxiliary capacitor node voltage VNC2 corresponding to the refresh rate of the display operation, to Vc1 = Vc1o + ΔVnc2, and then immediately before the start of the pre-charging period Tpc in the next frame period, the first pre-charging voltage Vc1 is decreased by ΔVnc2 to Vc1 = Vc1o.

[0066] According to this modified version, the level of the first pre-charge voltage Vc1 is not fixed but is changed according to the refresh rate as described above, thereby compensating for the fluctuation amount ΔVnc2 of the auxiliary capacitor node voltage VNC2 due to the off-leak current of the charge injection control transistor T3 and the pre-charge control transistor T4. As a result, even when the fluctuation amount ΔVnc2 is large due to a low refresh rate, the delay in the start of light emission when switching from a dark state to a bright state by writing the data voltage to the pixel circuit Pix(i,j) is reduced, and the decrease in brightness during the frame period immediately after the switch can be suppressed.

[0067] <2.6 Second Modification of the Second Embodiment> In the second embodiment described above, the pre-charging signal Vc(j) for charging the auxiliary capacitor C2 in the pixel circuit Pix(i,j) is set to either a high-level charging voltage VcH or a low-level charging voltage VcL, as shown in Figure 13, depending on whether the display switches from bright to dark or from dark to bright when a data voltage Vdat(i,j) is written to the pixel circuit Pix(i,j). However, both the high-level charging voltage VcH and the low-level charging voltage VcL are constant voltages that do not depend on the data voltage Vdat(i,j) to be written. However, in order to quickly start emitting light at a desired brightness when the display switches from a dark state to a bright state when a data voltage Vdat(i,j) is written to the pixel circuit Pix(i,j), it is conceivable to change the level of the pre-charging signal Vc(j) corresponding to the high-level charging voltage VcH according to the data voltage Vdat(i,j) to be written. Hereinafter, such an active-matrix type organic EL display device will be described as a second modification of the second embodiment. Note that matters not newly described below for this modification are the same as those of the second embodiment described above (see Figures 10 and 11).

[0068] <2.6.1 Overall Configuration of the Display Device According to the Second Modified Example> Figure 15 is a block diagram showing the overall configuration of the display device according to this modified example. This display device, like the second embodiment described above, is equipped with a backup charging driver 310, but it is not equipped with an image processing circuit 201 and a history discrimination circuit 202.

[0069] In this modified example, along with the data-side control signal DCT, a charging data signal DVC consisting of the digital voltage value of the pre-charging signal Vc(j) to be applied to each pixel circuit Pix(i,j) is provided to the pre-charging driver 310. The charging data signal DVC to be applied to the pre-charging driver 310 is generated by the display control circuit 200. In this modified example, the pre-charging driver 310 generates pre-charging signals Vc(1) to Vc(m) based on the charging data signal DVC and the data-side control signal DCT from the display control circuit 200 and applies them to the pre-charging lines VL1 to VLm, respectively.

[0070] <2.6.2 Configuration and Operation of Display Control Circuit> Figure 16 is a block diagram showing the configuration of the display control circuit 200 in this modified example. This display control circuit 200 includes a drive control circuit 250 and a control unit 210, as well as RAM (Radom Access Memory) 220 and flash memory 230 as non-volatile memory. The control unit 210 includes a CPU (Central Processing Unit) and memory for program storage area and working area for the CPU.

[0071] The RAM 220 includes an anode voltage data storage unit 221 for storing the anode node NOL voltage (hereinafter referred to as "previous frame anode voltage") VoB(i,j) at each pixel circuit Pix(i,j) during the frame period immediately preceding the current frame period (previous frame period), and a pre-charging voltage data storage unit 222 for storing the pre-charging voltage Vchg(i,j) applied to the pixel circuit Pix(i,j) via the pre-charging line VLj during the previous frame period. The flash memory 230 stores parameters (hereinafter referred to as "characteristic parameters") that indicate the electrical characteristics of the drive transistor T2 and the organic EL element OL at each pixel circuit Pix(i,j). Specifically, these characteristic parameters include parameters such as the threshold voltage Vt and gain β for calculating the drain current Id from the gate-source voltage Vgs for the drive transistor T2, and parameters for calculating the OLED current IOL from the anode node voltage VNOL for the organic EL element OL. The control unit 210 in the display control circuit 200 controls the drive control circuit 250 so that an image data signal DV is output based on the image information contained in the input signal Sin, a charging data signal DVC is output based on this image data signal DV and the previous frame anode voltage VoB stored in the anode voltage data storage unit 221, and a first scanning-side control signal SCT1, a second scanning-side control signal SCT2, a third scanning-side control signal SCT3, and a data-side control signal DCT are output based on the timing control information for image display contained in the input signal Sin. The first scanning-side control signal SCT1 is provided to the first scanning-side driver 410, the second scanning-side control signal SCT2 to the second scanning-side driver 420, and the third scanning-side control signal SCT3 to the third scanning-side driver 430, the image data signal DV is provided to the data driver 300, the charging data signal DVC to the auxiliary charging driver 310, and the data-side control signal DCT is provided to the data driver 300 and the auxiliary charging driver 310.

[0072] In this modified example, unlike the second embodiment described above, when switching from a dark state (non-emitting state) to a bright state (emitting state) by writing the voltage of the data signal D(j) as the data voltage Vdat(i,j) to each pixel circuit Pix(i,j), the pre-charging voltage Vchg(i,j), which is the voltage of the pre-charging signal Vc(j) to be applied to the pixel circuit Pix(i,j) during the pre-charging period Tpc immediately preceding the writing period Twr of the data voltage Vdat(i,j), is calculated as follows, based on the image data signal DV.

[0073] In the previous frame period, which is the frame period immediately preceding the current frame period that includes the writing period Twr of the data voltage Vdat(i,j), the pixel circuit Pix(i,j) is in a dark state, and the anode voltage at this time is denoted as VoB. Let Lc be the brightness when the pixel circuit Pix(i,j) emits light due to the writing of the data voltage Vdat(i,j) in the current frame period. Let VoC be the anode voltage when the OLED current IOL is passed through the organic EL element OL to emit light at this brightness Lc. The following equation holds true according to the approximate charge conservation law described below: C2(Vchg(i,j)-Vc1)+Cp・VoB=C2(VoC-Vc1)+Cp・VoC …(5)

[0074] In equation (5) above, the left side represents the sum of the charge amount of the auxiliary capacitor C2 and the charge amount of the parasitic capacitance Cp immediately before the charge injection period Tci, which starts before the write period Twr after the pre-charging period Tpc, and the right side represents the sum of the charge amount of the auxiliary capacitor C2 and the charge amount of the parasitic capacitance Cp immediately after the charge injection control transistor T3 is turned on at the start of the charge injection period Tci. As previously described, when the pixel circuit Pix(i,j) changes from a dark state to a bright state by writing the data voltage Vdat(i,j) to the pixel circuit Pix(i,j), the drive transistor T2 is in a state where virtually no current flows during the period immediately after the start of the write period Twr (the period immediately after writing). From this, the OLED current IOL can be considered to be only the current based on the charge that moves from the auxiliary capacitor C2 to the parasitic capacitance Cp when the charge injection control transistor T3 is turned on. Therefore, in this modified example, we assume that the charge conservation law shown in equation (5) above approximately holds, and determine the pre-charging voltage Vchg(i,j).

[0075] In other words, in this modified example, the pre-charging voltage Vchg(i,j), which is the voltage of the pre-charging signal Vc(j) to be applied to the j-th pre-charging line VLj during the pre-charging period Tpc, which is the selection period of the second scanning signal line SC2i, is calculated based on the following equation obtained from equation (5) above: Vchg(i,j) = {(C2 + Cp)・VoC - Cp・VoB} / C2 … (6)

[0076] Furthermore, VoC in equation (6) above is determined as follows. That is, based on the following equation which shows the drain current Id in the saturation region of the drive transistor T2, the drain current Id is determined when the voltage Vdat(i,j) of the data signal D(j) indicated by the image data signal DV is written to the holding capacitor C1, using the threshold voltage Vt and gain β stored in the flash memory 230 as characteristic parameters of the drive transistor T2 of the pixel circuit Pix(i,j). This drain current Id is taken as the OLED current IOL (IOL = Id). Id = (β / 2)(|Vgs| - |Vt|) 2 …(7) Vgs=Vdat(i,j)−ELVDD …(8)

[0077] Next, using the characteristic parameters of the organic EL element OL of the pixel circuit Pix(i,j), the voltage of the anode node NOL when the OLED current IOL flows through the organic EL element OL is determined, and this voltage is defined as VoC. In addition, a predetermined voltage (low-level charging voltage) VcL, which is slightly lower than the light emission threshold voltage Vth, is pre-written in the anode voltage data storage unit 221 as the previous frame anode voltage VoB, as the initial value of the anode voltage in each pixel circuit Pix(i,j). In this way, when a new anode voltage VoC is determined, the anode voltage VoB of the pixel circuit Pix(i,j) stored in the anode voltage data storage unit 221 is used together with the newly determined anode voltage VoC to calculate the pre-charging voltage Vchg(i,j), which is the voltage of the pre-charging signal Vc(j) to be applied to the j-th pre-charging line VLj during the pre-charging period Tpc, using equation (6) above. When the pre-charging voltage Vchg(i,j) is calculated, the anode voltage VoC used in the calculation is used as the previous frame anode voltage VoB, and the anode voltage VoB in the anode voltage data storage unit 221 is rewritten.

[0078] In this modified example, the display control circuit 200 determines the pre-charging voltage Vchg(i,j) to be applied to each pixel circuit Pix(i,j) based on the calculation method described above, and outputs a charging data signal DVC consisting of the digital voltage value of the pre-charging signal Vc(j) from the drive control circuit 250 to the pre-charging driver 310 based on the said pre-charging voltage Vchg(i,j).

[0079] Figure 17 is a flowchart showing the procedure for pre-charging voltage processing that the control unit 210 of the display control circuit 200 should perform in order to output the charging data signal DVC to the pre-charging driver 310 in this manner. The control unit 210 operates as follows in this pre-charging voltage processing. However, before the execution of this pre-charging voltage processing, all previous frame anode voltages VoB(1,1) to VoB(n,m) to be stored in the anode voltage data storage unit 221 are initialized to a low-level charging voltage VcL, which is a predetermined voltage lower than the light emission threshold voltage Vth, and all pre-charging voltages Vchg(i,j) for the previous frame period to be stored in the pre-charging voltage data storage unit 222 are initialized to the light emission threshold voltage Vth.

[0080] In the pre-charging voltage processing in this modified example, first, the row variable i and column variable j that identify the pixel circuit Pix(i,j) are both initialized to "1" (steps S10, S12). Next, based on the characteristic parameters of the drive transistor T2 of the pixel circuit Pix(i,j), the drain current Id is determined for the pixel circuit Pix(i,j) from the voltage of the data signal D(j) corresponding to the data voltage Vdat(i,j) to be written (see equations (7) and (8) above), and this drain current Id is set as the OLED current IOL to be flowed through the organic EL element OL (step S14). Subsequently, based on the characteristic parameters of the organic EL element OL of the pixel circuit Pix(i,j), the anode voltage VoC(i,j) of the organic EL element OL when the OLED current IOL flows is determined (step S16).

[0081] When the anode voltage VoC(i,j) is determined, the previous frame anode voltage VoB(i,j) stored in the anode voltage data storage unit 221 is read out, and the pre-charging voltage Vchg(i,j) is determined according to the relationship between these anode voltages VoC(i,j) and VoB(i,j) and the emission threshold voltage Vth of the organic EL element OL, as follows: (C1) When VcB(i,j)≦Vth and VoC(i,j)>Vth (steps S18, S20, S26) Vchg(i,j)={(C2+Cp)・VoC-Cp・VoB} / C2. (C2) When VcB(i,j)≦Vth and VoC(i,j)≦Vth (steps S18, S20) Vchg(i,j) is not changed. (C3) When VcB(i,j) > Vth and VoC(i,j) ≤ Vth (steps S18, S22, S24), Vchg(i,j) = VcL. (C4) When VcB(i,j) > Vth and VoC(i,j) > Vth (steps S18, S22), Vchg(i,j) is not changed. Also, the pre-charging voltage Vchg(i,j) for the previous frame period stored in the pre-charging voltage data storage unit 222 is updated with the pre-charging voltage Vchg(i,j) determined as described above. Here, (C1) corresponds to the case when the pixel circuit Pix(i,j) switches from a dark state to a bright state (see equation (6) above), (C2) corresponds to the case when the pixel circuit Pix(i,j) maintains a dark state, (C3) corresponds to the case when the pixel circuit Pix(i,j) switches from a bright state to a dark state, and (C4) corresponds to the case when the pixel circuit Pix(i,j) maintains a bright state.

[0082] Once the pre-charging voltage Vchg(i,j) is determined as described above, the value of the pre-charging voltage Vchg(i,j) is used as the digital voltage value of the pre-charging signal Vc(j) for the current frame period, and this is output to the drive control circuit 250 as a component of the charging data signal DVC (step S28). Subsequently, the previous frame anode voltage VoB(i,j) stored in the anode voltage data storage unit 221 is updated using the anode voltage VoC(i,j) obtained in step S16 (step S30).

[0083] Next, it is determined whether the column variable j is less than or equal to m. If the result is that the column variable j is less than or equal to m, the value of the column variable j is increased by 1, and then the process returns to step S14. From there, steps S14 to S32 and S36 are repeatedly executed until the column variable j becomes equal to m, and once the column variable j becomes equal to m, the process proceeds to step S34.

[0084] In step S34, it is determined whether the row variable i is less than n. If the result is that the row variable i is less than n, the value of the row variable i is increased by 1, and then the process returns to step S12. Thereafter, steps S14 to S34 and S38 are repeatedly executed until the row variable i becomes equal to n, and then the process returns to step S10. Thereafter, steps S10 to S38 are repeatedly executed during the display operation.

[0085] <2.6.3 Effects> According to the above modified version, similar to the second embodiment, when the data voltage Vdat(i,j) is written to the pixel circuit Pix(i,j), depending on whether the pixel circuit Pix(i,j) switches from a bright state to a dark state or from a dark state to a bright state, the pre-charging voltage Vchg(i,j) for charging the auxiliary capacitor C2 is switched between a voltage higher than the light emission threshold voltage Vth and a predetermined voltage VcL lower than the light emission threshold voltage Vth during the pre-charging period Tpc immediately preceding the writing period Twr of the data voltage Vdat(i,j). Then, during the subsequent charge injection period Tci, the accumulated charge of the auxiliary capacitor C2 is injected into the organic EL element OL, and the parasitic capacitance Cp is charged. As a result, the same effects as the second embodiment are obtained.

[0086] In addition, according to this modified example, when the display switches from dark to bright due to the writing of the data voltage Vdat(i,j) to the pixel circuit Pix(i,j), the auxiliary capacitor C2 is charged during the pre-charging period Tpc by the voltage Vchg(i,j) shown in equation (6) above, and then during the subsequent charge injection period Tci, the stored charge of the auxiliary capacitor C2 is injected into the organic EL element OL, charging the parasitic capacitance Cp. As a result, charge injection is performed from the auxiliary capacitor C2 such that the anode voltage VNOL becomes the anode voltage VoC corresponding to the target brightness for the current frame period. Therefore, when the data voltage Vdat(i,j) is written to the pixel circuit Pix(i,j), the time until it emits light at the brightness corresponding to that data voltage Vdat(i,j) is shortened compared to the second embodiment.

[0087] In general, in organic EL elements as light-emitting elements, the emission threshold voltage Vth and the data voltage Vdat(i,j) corresponding to the same brightness differ depending on the emission color (R, G, B). However, in calculating the pre-charging voltage Vchg(i,j) shown in equation (6) above, the characteristic parameters such as the emission threshold voltage Vth used to determine the anode voltages VoB and VoC, and the data voltage Vdat(i,j) that determines the target brightness, are the parameters and voltage data given to each pixel circuit Pix(i,j). Therefore, when a new data voltage is written to each pixel circuit Pix(i,j), regardless of the emission color (R, G, B), the pixel circuit Pix(i,j) quickly enters a state where it emits light at the target brightness.

[0088] As described above, in this modified example, for each pixel circuit Pix(i,j), when the pixel circuit Pix(i,j) switches from a dark state to a bright state by writing a data voltage Vdat(i,j), the voltage of the pre-charge signal Vc(j) during the current frame period, which includes the writing period Twr in which the data voltage Vdat(i,j) should be written, or more specifically, the pre-charge voltage Vchg(i,j) to be applied to the pre-charge line VLj during the pre-charge period Tpc immediately preceding the writing period Twr, is determined based on the calculated value of the previous frame anode voltage VoB(i,j) and the calculated value of the anode voltage in the current frame Vob (see equation (6) above). Alternatively, the pre-charging voltage Vchg(i,j), which is the voltage of the pre-charging signal Vc(j) during the current frame period including the writing period Twr in which the data voltage Vdat(i,j) should be written, may be determined according to the data voltage Vdat(i,j), regardless of whether the pixel circuit switches from a dark state to a bright state by writing the data voltage Vdat(i,j). For example, if the data voltage Vdat(i,j) indicates a bright display (light-emitting state), the pre-charging voltage Vchg(i,j) may be a high-level charging voltage VcH, which is a constant voltage slightly higher than the light-emitting threshold voltage Vth, and if the data voltage Vdat(i,j) indicates a dark display (non-light-emitting state), the pre-charging voltage Vchg(i,j) may be a low-level charging voltage VcL, which is a constant voltage slightly lower than the light-emitting threshold voltage Vth, such that the pre-charging signals Vc(1) to Vc(m) are generated.

[0089] <3. Third Embodiment> Next, an organic EL display device in which a light emission control transistor for controlling the light emission and non-light emission of organic EL elements is provided in the pixel circuit will be described as a third embodiment. Matters not newly described below regarding the display device according to this embodiment are the same as those of the display device according to the first embodiment described above. <3.1 Configuration>

[0090] Figure 18 is a block diagram showing the overall configuration of the display device according to this embodiment. As shown in Figure 18, the display unit 100 in this embodiment is provided with n light emission control lines EM1 to EMn that intersect with the data signal lines DL1 to DLm, instead of the third scanning signal lines SC31 to SC3n. Correspondingly, in this embodiment, a light emission driver 440 is provided as a component of the scanning drive circuit instead of the third scanning driver 430, and the light emission driver 440 generates light emission control signals EM(1) to EM(n) and applies them to the light emission control lines EM1 to EMn, respectively.

[0091] Figure 19 is a circuit diagram showing the configuration of the pixel circuit 16 in this embodiment, and shows the configuration of the pixel circuit 16 corresponding to the i-th first scan signal line SC1i and the j-th data signal line DLj in this embodiment, i.e., the i-th row and j-th column pixel circuit Pix(i,j) (1≦i≦n, 1≦j≦m). As can be seen by comparing Figure 19 with Figure 7, the pixel circuit 16 in this embodiment differs from the pixel circuit 15 in the first embodiment in that the drain terminal of the drive transistor T2 is connected to the anode of the organic EL element OL via the light emission control transistor T5, which functions as a switching element. Also, in the i-th row and j-th column pixel circuit Pix(i,j) in this embodiment, as shown in Figure 19, the i-th light emission control line EMI is connected to the gate terminals of the light emission control transistor T5 and the charge injection control transistor T3.

[0092] <3.2 Operation> Figure 20 is a signal waveform diagram illustrating the operation of the pixel circuit Pix(i,j) in this embodiment. The operation of the pixel circuit Pix(i,j) in this embodiment will be explained below with reference to Figure 20 together with Figure 19.

[0093] As shown in Figure 20, in this embodiment, a non-emitting period Tnem is provided in each frame period, and a pre-charging period Tpc and a writing period Twr are provided sequentially within this non-emitting period Tnem, and a charge injection period is provided immediately after this non-emitting period Tnem.

[0094] During the non-emitting period Tnem, the light emission control signal EM(i) is at a high level, which keeps the light emission control transistor T5 in the off state. As a result, the current that should be supplied to the organic EL element OL is cut off (OLED current IOL = 0). Also, while the light emission control signal EM(i) is at a high level, the charge injection control transistor T3 is also in the off state, so the anode node NOL is electrically disconnected from the auxiliary capacitor node NC2.

[0095] The pre-charging period Tpc is included within this non-emitting period Tnem, and during this pre-charging period Tpc, the second scanning signal SC2(i) is at a low level, and the pre-charging control transistor T4 is in the ON state. As a result, the second pre-charging voltage Vc2 is applied to the second terminal of the auxiliary capacitor C2, to which the first pre-charging voltage Vc1 is supplied, thereby charging the auxiliary capacitor C2.

[0096] During the write period Twr following the pre-charging period Tpc, the first scan signal SC1(i) ​​is at a low level, which keeps the write control transistor T1 ON. As a result, the voltage of the data signal D(j) is written to the holding capacitor C1 via the write control transistor T1 as the data voltage Vdat(i,j). In the example shown in Figure 20, the data signal D(j) corresponds to a bright signal indicating a bright display, and when the data voltage Vdat(i,j) is written during the write period Twr, the pixel circuit Pix(i,j) switches from a dark state to a bright state when the light emission period Temp begins, as shown below.

[0097] After the write period Twr, the non-emitting period Tnem ends and the emitting period Tem begins. During this emitting period Tem, the light emission control signal EM(i) is at the L level, which turns on the light emission control transistor T5 and the charge injection control transistor T3. As a result, the drain current Id of the drive transistor T2, which corresponds to the voltage held in the holding capacitor C1, i.e., the drain current Id corresponding to the data voltage Vdat(i,j), is supplied to the organic EL element OL via the light emission control transistor T5, and the charge stored in the auxiliary capacitor C2 is injected into the organic EL element OL via the charge injection control transistor T3.

[0098] In the example shown in Figure 20, immediately before this charge injection, the anode voltage VNOL is near or below the emission threshold voltage Vth, while the auxiliary capacitor node VNC2 voltage VNC2 is equal to the second pre-charge voltage Vc2 and slightly higher than the emission threshold voltage Vth. Therefore, when the emission period Temp begins, charge injection from the auxiliary capacitor C2 to the organic EL element OL begins, and the drain current Id of the drive transistor T2 is supplied to the organic EL element OL. As shown in Figure 20, the parasitic capacitance Cp is charged, the anode voltage VNOL rises, and light emission begins a short time after the start of the emission period Temp. Subsequently, the OLED current IOL peaks and then settles to the drain current Id of the drive transistor T2 corresponding to the voltage held by the holding capacitor C1.

[0099] In this embodiment as well, when the pixel circuit Pix(i,j) switches from a dark state to a bright state due to the writing of the data voltage Vdat(i,j) to the pixel circuit Pix(i,j), the auxiliary capacitor C2 is charged by a second pre-charging voltage Vc2 that is slightly higher than the light emission threshold voltage Vth during the pre-charging period Tpc immediately preceding the writing period Twr of the data voltage Vdat(i,j), and then during the subsequent light emission period Temp, the accumulated charge of the auxiliary capacitor C2 is injected into the organic EL element OL, charging the parasitic capacitance Cp. This provides the same effects as in the first embodiment. Therefore, when the pixel circuit Pix(i,j) switches from a dark state to a bright state due to the writing of the data voltage Vdat(i,j) to the pixel circuit Pix(i,j), light emission at the target brightness starts quickly, thereby suppressing a decrease in brightness during the frame period immediately after the switch.

[0100] In the example shown in Figure 20, the pre-charging period Tpc and the writing period Twr are separated, but the writing period Twr may be provided within the pre-charging period Tpc. In this case, the end of the pre-charging period Tpc should be within the non-emitting period Tnem. In this embodiment, the first pre-charging voltage Vc1 is a constant voltage lower than the emission threshold voltage Vth of the organic EL element OL, as in the first embodiment (provided ELVSS = 0), but it may be a variable voltage whose level changes according to the average brightness of the entire screen, for example. The second pre-charging voltage Vc2 may also be a variable voltage having a level corresponding to the average brightness of the entire screen. Furthermore, in this embodiment, the second pre-charging voltage Vc2 for charging the auxiliary capacitor C2 is a constant voltage slightly higher than the light emission threshold voltage Vth. However, as in the second embodiment described above, the second pre-charging voltage Vc2 may be configured to switch between a predetermined voltage VcH higher than the light emission threshold voltage Vth and a predetermined voltage VcL lower than the light emission threshold voltage Vth, depending on whether the pixel circuit Pix(i,j) switches from a bright state to a dark state or from a dark state to a bright state due to the writing of a data voltage to the pixel circuit Pix(i,j) (see Figure 13). Moreover, when the pixel circuit Pix(i,j) switches from a dark state to a bright state due to the writing of a data voltage Vdat(i,j), one or both of the first pre-charging voltage Vc1 and the second pre-charging voltage Vc2 may be configured to change according to the data voltage Vdat(i,j) to be written.

[0101] <3.3 Effects> According to the embodiment described above, a pre-charging period Tpc and a writing period Twr are provided within the non-light-emitting period Tem, in which the light-emitting control transistor T5 is in the off state. When the pixel circuit Pix(i,j) switches from a dark state to a bright state due to the writing of a data voltage to the pixel circuit Pix(i,j), the second pre-charging voltage Vc2 for charging the auxiliary capacitor C2 in the pre-charging period Tpc immediately preceding the data voltage writing period Twr becomes a voltage slightly higher than the light emission threshold voltage Vth. Subsequently, when the light-emitting control transistor T5 turns on and the light-emitting period Temp begins, a drain current Id corresponding to the data voltage written in the writing period Twr is supplied from the drive transistor T2 to the organic EL element OL via the light-emitting control transistor T5, and the stored charge of the auxiliary capacitor C2 is injected into the organic EL element OL, so that the parasitic capacitance Cp is quickly charged. In this embodiment, the charge injection period during which charge is injected from the auxiliary capacitor C2 to the organic EL element is included in the light emission period Temm, which includes the start of the light emission period Temm, the point at which the organic EL element OL should begin to emit light. As a result, even in a configuration in which data voltage writing and other operations are performed in a non-light-emitting state, as in this embodiment, the same effects as in the first embodiment can be obtained. In this embodiment, unlike the first embodiment, the organic EL element OL is in a non-light-emitting state during the writing period Twr, so the data voltage writing operation does not affect the brightness of the pixel circuit Pix(i,j).

[0102] <4. Modifications> The present invention is not limited to the embodiments described above, and various modifications can be made without departing from the scope of the present invention.

[0103] For example, in each of the above embodiments, the transistors included in the pixel circuit Pix(i,j) are all P-channel type, but the system is not limited to this. Even if some or all of the transistors included in the pixel circuit Pix(i,j) are N-channel type, it is sufficient as long as the pre-charging circuit 152 that operates as described above is included in the pixel circuit Pix(i,j). In such a configuration, the auxiliary capacitor C2 is charged and charge is accumulated during the pre-charging period Tpc provided before the writing period Twr for writing the data voltage to the pixel circuit Pix(i,j). Charge injection from the auxiliary capacitor C2 to the organic EL element OL is started immediately before or at the start of the writing period Twr after the pre-charging period Tpc, so that when the pixel circuit Pix(i,j) switches from a dark state to a bright state due to the writing of the data voltage, light emission is started quickly. However, as in the third embodiment described above, the system may be configured such that a data voltage is written during the non-emitting period using the light emission control transistor T5, and charge injection from the auxiliary capacitor C2 to the organic EL element OL is started from the point in time (or near the point in time) when the system switches from the non-emitting period, which includes a pre-charging period Tpc and a writing period Twr, to the light-emitting period.

[0104] Furthermore, even if the pixel circuit Pix(i,j) is an internally compensated pixel circuit configured to compensate for variations and fluctuations in the threshold voltage of its drive transistor, if the pre-charging circuit 152 operating as described above is included in the pixel circuit Pix(i,j), the same effects as those in each of the above embodiments can be obtained.

[0105] Furthermore, while the above describes each embodiment and its modifications assuming that the "dark state" refers to a non-luminescent state, the same effect can be basically obtained even when the "dark state" includes a luminescent state with relatively low brightness compared to the "light state".

[0106] Furthermore, any combination of the first to third embodiments and their variations can be used, provided that it does not contradict the spirit of the present invention and is not technically inconsistent.

[0107] In the above, each embodiment and its modifications have been described using an organic EL display device as an example. However, the present invention is not limited to organic EL display devices, but can be applied to any display device using an internal compensation method with an electric current-driven light-emitting element. The light-emitting elements that can be used here are light-emitting elements whose brightness or transmittance is controlled by an electric current. For example, in addition to organic EL elements, i.e., organic light-emitting diodes (OLEDs), inorganic light-emitting diodes and quantum dot light-emitting diodes (QLEDs) can be used.

[0108] 15, 16... Pixel circuit 152... Pre-charging circuit 100... Display unit 200... Display control circuit 300... Data driver (data side drive circuit) 310... Pre-charging driver (pre-charging voltage supply circuit) 410... First scanning side driver (scanning side drive circuit) 420... Second scanning side driver (scanning side drive circuit) 430... Third scanning side driver (scanning side drive circuit) 440... Light emission driver (scanning side drive circuit) Pix(i, j)... Pixel circuit (i=1 to n, j=1 to m) OL... Organic EL element C1... Holding capacitor C2... Auxiliary capacitor Cp... Parasitic capacitance T1... Write control transistor (write control switching element) T2... Drive transistor T3... Charge injection control transistor (charge injection control switching element) T4... Pre-charging control transistor (pre-charging control switching element) T5... Light emission control transistor (light emission control switching element) DL1 to DLm...Data signal lines SC11 to SC1n...First scan signal lines SC21 to SC2n...Second scan signal lines SC31 to SC3n...Third scan signal lines EM1 to EMn...Light emission control lines VL1 to VLm...Pre-charge lines (individual pre-charge lines) VLC1...First pre-charge line (pre-charge reference voltage line) VLC2...Second pre-charge line (common pre-charge line) ELVDD...High-level power line (first power line), high-level power supply voltage ELVSS...Low-level power line (second power line), low-level power supply voltage Vc1...First pre-charge voltage Vc2...Second pre-charge voltage Tpc...Pre-charge period Tci...Charge injection period Twr...Write period

Claims

1. A display device having a display unit including a plurality of data signal lines and a plurality of first scan signal lines, wherein a pixel circuit is provided in the display unit so as to correspond to one of the plurality of data signal lines and one of the plurality of first scan signal lines, comprising: a current-driven light-emitting element having a parasitic capacitance and a light emission threshold voltage; a holding capacitor; a drive transistor that supplies an amount of current to the light-emitting element corresponding to the voltage held in the holding capacitor; a write control switching element having a control terminal connected to the one scan signal line and controlling whether or not to write the voltage of the one data signal line to the holding capacitor as a data voltage; and a pre-charging circuit for charging the parasitic capacitance of the light-emitting element, wherein the display unit further includes a common pre-charging line or a plurality of individual pre-charging lines, and the pre-charging circuit comprises: an auxiliary capacitor; and a pre-charging control switching element that controls whether or not to charge the auxiliary capacitor with the voltage of the common pre-charging line or the voltage of one of the plurality of individual pre-charging lines. A pixel circuit including a charge injection control switching element that controls whether or not to electrically connect the auxiliary capacitor to the light-emitting element so that charge can be injected from the auxiliary capacitor to the light-emitting element and the parasitic capacitance can be charged.

2. The pixel circuit according to claim 1, wherein the display unit further includes a plurality of second scanning signal lines, a plurality of third scanning signal lines, a pre-charge reference voltage line, a first power line, and a second power line; the light-emitting element has an anode connected to the first power line via the drive transistor and a cathode connected to the second power line; the pre-charge control switching element has a control terminal connected to one of the plurality of second scanning signal lines; the charge injection control switching element has a control terminal connected to one of the plurality of third scanning signal lines; and the auxiliary capacitor has a first terminal connected to the pre-charge reference voltage line and a second terminal connected to the common pre-charge line or one of the individual pre-charge lines via the pre-charge control switching element and connected to the anode via the charge injection control switching element.

3. The pixel circuit according to claim 1, further comprising a light-emitting control switching element connected in series with the light-emitting element and the drive transistor, wherein the display unit further includes a plurality of second scanning signal lines, a plurality of light-emitting control lines, a pre-charge reference voltage line, a first power line, and a second power line, the light-emitting element has an anode connected to the first power line via the light-emitting control switching element and the drive transistor, and a cathode connected to the second power line, the pre-charge control switching element has a control terminal connected to one of the plurality of second scanning signal lines, the charge injection control switching element has a control terminal connected to one of the plurality of light-emitting control lines, the light-emitting control switching element has a control terminal connected to the one light-emitting control line, and the auxiliary capacitor has a first terminal connected to the pre-charge reference voltage line, and a second terminal connected to the common pre-charge line or one of the individual pre-charge lines via the pre-charge control switching element and connected to the anode via the charge injection control switching element.

4. A display unit including a plurality of data signal lines, a plurality of first scan signal lines, a common auxiliary charging line or a plurality of individual auxiliary charging lines, and a plurality of pixel circuits, each corresponding to one of the plurality of data signal lines and one of the plurality of first scan signal lines; a drive circuit for driving the plurality of pixel circuits; and an auxiliary charging voltage supply circuit, wherein each of the plurality of pixel circuits includes a current-driven light-emitting element having a parasitic capacitance and an emission threshold voltage, a holding capacitor, a drive transistor that supplies an amount of current to the light-emitting element corresponding to the voltage held in the holding capacitor, a write control switching element having a control terminal connected to one of the first scan signal lines and controlling whether or not to write the voltage of one of the data signal lines to the holding capacitor as a data voltage, and an auxiliary charging circuit for charging the parasitic capacitance of the light-emitting element. The pre-charging circuit includes an auxiliary capacitor, a pre-charging control switching element that controls whether or not to charge the auxiliary capacitor by the voltage of the common pre-charging line or the voltage of one of the plurality of individual pre-charging lines, and a charge injection control switching element that controls whether or not to electrically connect the auxiliary capacitor to the light-emitting element so that charge can be injected from the auxiliary capacitor to the light-emitting element and the parasitic capacitance can be charged; the pre-charging voltage supply circuit supplies a voltage for charging the auxiliary capacitor to each of the plurality of pixel circuits as a pre-charging voltage via the common pre-charging line or the plurality of individual pre-charging lines; each of the plurality of pixel circuits is provided with a pre-charging period for charging the auxiliary capacitor and a writing period for writing the data voltage to the holding capacitor, and a charge injection period is provided after the pre-charging period for injecting charge from the auxiliary capacitor to the light-emitting element, which includes the time when the light-emitting element should start to emit light based on the writing of the data voltage to the holding capacitor.A display device, wherein the drive circuit drives the plurality of pixel circuits such that the pre-charge control switching element is ON and the charge injection control switching element is OFF during the pre-charge period, the write control switching element is ON during the write period, and the pre-charge control switching element is OFF and the charge injection control switching element is ON during the charge injection period.

5. The display device according to claim 4, wherein the display unit further includes a first power line and a second power line, the light-emitting element has an anode connected to the first power line via the drive transistor and a cathode connected to the second power line, and the pre-charge voltage supply circuit supplies to the pre-charge circuit, for each of the plurality of pixel circuits, a voltage higher than the light emission threshold voltage with respect to the voltage of the second power line as the pre-charge voltage when the light-emitting element starts to emit light based on the writing of the data voltage.

6. The display unit further includes a plurality of second scan signal lines, a plurality of third scan signal lines, and a pre-charge reference voltage line, the auxiliary capacitor has a first terminal connected to the pre-charge reference voltage line and a second terminal connected to the common pre-charge line or one individual pre-charge line via the pre-charge control switching element and connected to the anode via the charge injection control switching element, the drive circuit includes a data-side drive circuit that generates a plurality of data signals and applies them to the plurality of data signal lines, and a scan-side drive circuit that selectively drives the plurality of first scan signal lines, selectively drives the plurality of second scan signal lines, and selectively drives the plurality of third scan signal lines, the pre-charge control switching element has a control terminal connected to one of the plurality of second scan signal lines, the charge injection control switching element has a control terminal connected to one of the plurality of third scan signal lines. The display device according to claim 5, wherein the scanning drive circuit drives the plurality of first scanning signal lines, the plurality of second scanning signal lines, and the plurality of third scanning signal lines such that the pre-charging control switching element is ON and the charge injection control switching element is OFF during the pre-charging period, the write control switching element is ON during the write period, and the pre-charging control switching element is OFF and the charge injection control switching element is ON during the charge injection period.

7. The display unit further includes a plurality of second scanning signal lines, a plurality of light emission control lines, and a pre-charge reference voltage line, each of the plurality of pixel circuits further includes a light emission control switching element connected in series with the light-emitting element and the drive transistor, the auxiliary capacitor has a first terminal connected to the pre-charge reference voltage line and a second terminal connected to the common pre-charge line or one individual pre-charge line via the pre-charge control switching element and connected to the anode via the charge injection control switching element, the drive circuit includes a data-side drive circuit that generates a plurality of data signals and applies them to the plurality of data signal lines, and a scanning-side drive circuit that selectively drives the plurality of first scanning signal lines, selectively drives the plurality of second scanning signal lines, and selectively deactivates the plurality of light emission control lines, the pre-charge control switching element has a control terminal connected to one of the plurality of second scanning signal lines, the charge injection control switching element has a control terminal connected to one of the plurality of light emission control lines. The display device according to claim 5, wherein the light emission control switching element has a control terminal connected to one of the light emission control lines, and each of the plurality of pixel circuits is further provided with a non-light emission period including the pre-charging period and the writing period, and a light emission period including the charge injection period, and the scanning side drive circuit drives the plurality of first scan signal lines, the plurality of second scan signal lines, and the plurality of light emission control lines such that the pre-charging control switching element is ON and the charge injection control switching element is OFF during the pre-charging period, the writing control switching element is ON during the writing period, the light emission control switching element is OFF during the non-light emission period, and the charge injection control switching element and the light emission control switching element are ON and the pre-charging control switching element is OFF during the light emission period.

8. The display device according to claim 6 or 7, wherein the second terminal of the auxiliary capacitor is connected to the common auxiliary charging line via the auxiliary charging control switching element, and the auxiliary charging voltage supply circuit applies a voltage to the common auxiliary charging line that is higher than the light emission threshold voltage, with reference to the voltage of the second power line.

9. The display device according to claim 6 or 7, wherein the plurality of individual auxiliary charging lines correspond to the plurality of data signal lines, the second terminal of the auxiliary capacitor is connected to the individual auxiliary charging line corresponding to one of the data signal lines via the auxiliary charging control switching element, the auxiliary charging voltage supply circuit generates a plurality of auxiliary charging signals and applies them to the plurality of individual auxiliary charging lines, and changes the voltage of each of the plurality of auxiliary charging signals during the auxiliary charging period according to the voltage of the data signal line corresponding to the individual auxiliary charging line to which the auxiliary charging signal should be applied during the writing period.

10. The display device according to claim 9, wherein the pre-charge voltage supply circuit generates a plurality of pre-charge signals such that, for each of the plurality of pixel circuits, when the voltage of one data signal line is written to the pixel circuit as a data voltage during the writing period, causing the pixel circuit to switch from a dark state to a bright state, a constant voltage higher than the emission threshold voltage with respect to the voltage of the second power line is applied to the individual pre-charge line corresponding to one data signal line during the pre-charge period, and when the voltage of one data signal line is written to the pixel circuit as a data voltage during the writing period, causing the pixel circuit to switch from a bright state to a dark state, a constant voltage lower than the emission threshold voltage with respect to the voltage of the second power line is applied to the individual pre-charge line corresponding to one data signal line during the pre-charge period.

11. The display device according to claim 9, wherein the pre-charge voltage supply circuit generates a plurality of pre-charge signals for each of the plurality of pixel circuits, such that when the voltage of one data signal line is written to the pixel circuit as a data voltage during the writing period, causing the pixel circuit to switch from a dark state to a bright state, a voltage corresponding to the voltage of the anode of the organic EL element that emits light with a brightness corresponding to the voltage of one data signal line is applied to the individual pre-charge line corresponding to the one data signal line during the pre-charge period.

12. The display device according to any one of claims 8 to 11, wherein the pre-charging voltage supply circuit applies a predetermined fixed voltage to the pre-charging reference voltage line.

13. The display device according to any one of claims 8 to 11, wherein the pre-charging voltage supply circuit changes the voltage level of the pre-charging reference voltage line in accordance with the refresh rate by writing data voltage to the plurality of pixel circuits.

14. A method for driving a display device having a display unit including a plurality of data signal lines and a plurality of pixel circuits, comprising the step of driving the plurality of pixel circuits, each of the plurality of pixel circuits including a current-driven light-emitting element having a parasitic capacitance and a light emission threshold voltage, a holding capacitor, a drive transistor that supplies an amount of current to the light-emitting element corresponding to the voltage held in the holding capacitor, and a pre-charging circuit having an auxiliary capacitor for storing charge to charge the parasitic capacitance of the light-emitting element, each of the plurality of pixel circuits being provided with a pre-charging period and a writing period, the driving step comprising the step of charging the auxiliary capacitor during the pre-charging period, writing the voltage of one of the plurality of data signal lines to the holding capacitor as a data voltage during the writing period, and injecting charge from the auxiliary capacitor to the light-emitting element to charge the parasitic capacitance during a charge injection period provided after the pre-charging period as a period including the time when the light-emitting element should start to emit light based on the writing of the data voltage.

15. The driving method according to claim 14, wherein the display unit further includes a first power line and a second power line, the light-emitting element has an anode connected to the first power line via the drive transistor and a cathode connected to the second power line, and in the step of charging the auxiliary capacitor, when the light-emitting element starts to emit light based on the writing of the data voltage, the auxiliary capacitor is charged with a voltage higher than the light emission threshold voltage with reference to the voltage of the second power line.

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