Plasma processing device and etching method

Abstract

This plasma processing device comprises a chamber, a substrate support unit, a gas supply unit, a first radio-frequency power supply, a second radio-frequency power supply, and a control unit. The substrate support unit is disposed in the chamber, includes a lower electrode, and supports a substrate. The gas supply unit is configured to supply a processing gas into the chamber. The first radio-frequency power supply is configured to supply first radio-frequency power for generating plasma from the processing gas supplied into the chamber. The second radio-frequency power supply is configured to supply second radio-frequency power to the lower electrode. The control unit is configured to control the second radio-frequency power supply to convert the second radio-frequency power into pulses and supply the same.

Description

Plasma Processing Apparatus and Etching Method

[0001] The present disclosure relates to a plasma processing apparatus and an etching method.

[0002] Patent Document 1 below discloses "a plasma processing method including generating a first sequence of source power (SP) pulses, generating a second sequence of bias power (BP) pulses, combining the BP pulses of the second sequence with the SP pulses of the first sequence to form an alternating sequence of combined SP and BP pulses, generating a plasma containing ions using the combined sequence, and processing a substrate by discharging the ions onto a main surface of the substrate."

[0003] Japanese Patent Publication No. 2021-534544

[0004] The present disclosure provides a technique for reducing residues.

[0005] A plasma processing apparatus according to an aspect of the present disclosure includes a chamber, a substrate support, a gas supply unit, a first high-frequency power source, a second high-frequency power source, and a control unit. The substrate support is disposed in the chamber, includes a lower electrode, and supports a substrate. The gas supply unit is configured to supply a processing gas into the chamber. The first high-frequency power source is configured to supply first high-frequency power for plasmaizing the processing gas supplied into the chamber. The second high-frequency power source is configured to supply second high-frequency power to the lower electrode. The control unit is configured to control the second high-frequency power source to pulse and supply the second high-frequency power from the second high-frequency power source.

[0006] According to the present disclosure, residues can be reduced.

[0007] Figure 1 is a diagram illustrating an example configuration of an inductively coupled plasma processing apparatus. Figure 2A is a diagram illustrating an example of the supply period of the source RF signal and bias RF signal in the etching method according to the embodiment. Figure 2B is a diagram illustrating the supply period of the source RF signal and bias RF signal according to the embodiment. Figure 3 is a diagram illustrating an example of the change in substrate potential in the etching method according to the embodiment. Figure 4 is a diagram illustrating an example of the change in ion and radical flux in the etching method according to the embodiment. Figure 5A is a diagram illustrating an example of substrate etching according to the embodiment. Figure 5B is a diagram illustrating an example of substrate etching according to the embodiment. Figure 6A is a diagram illustrating an example of substrate etching according to the embodiment. Figure 6B is a diagram illustrating an example of substrate etching according to the embodiment. Figure 7 is a diagram illustrating an example of the supply period of the source RF signal and bias RF signal in the etching method of the reference example. Figure 8 is a diagram illustrating an example of the change in substrate potential in the etching method of the reference example. Figure 9 is a diagram illustrating an example of the change in ion and radical flux in the etching method of the reference example. Figure 10 is a diagram showing an example of the ion energy distribution in the etching method of the reference example. Figure 11 is a diagram illustrating an example of the residue remaining on the etched substrate according to the embodiment. Figure 12 is a diagram showing an example of the ion energy distribution in the etching method of the embodiment. Figure 13A is a diagram illustrating the processing conditions of the etching method of the reference example during the first verification. Figure 13B is a diagram illustrating the processing conditions of the etching method of the embodiment during the first verification. Figure 13C is a diagram illustrating the processing conditions of the etching method of the embodiment during the first verification. Figure 14A is a diagram showing an example of the ion energy distribution in the etching method of the embodiment. Figure 14B is a diagram showing an example of the ion energy distribution in the etching method of the embodiment. Figure 15 is a diagram illustrating the change in the peak on the low-energy side of the energy distribution in the etching method of the embodiment. Figure 16A is a diagram illustrating the processing conditions of the etching method of the reference example during the second verification. Figure 16B is a diagram illustrating the processing conditions of the etching method of the embodiment during the second verification. Figure 16C is a diagram illustrating the processing conditions of the etching method of the embodiment during the second verification.Figure 16D is a diagram illustrating the processing conditions of the etching method of the embodiment during the second verification. Figure 17 is a diagram illustrating the results of the second verification. Figure 18A is a diagram illustrating the processing conditions of the etching method of the reference example during the third verification. Figure 18B is a diagram illustrating the processing conditions of the etching method of the embodiment during the third verification. Figure 18C is a diagram illustrating the processing conditions of the etching method of the embodiment during the third verification. Figure 18D is a diagram illustrating the processing conditions of the etching method of the embodiment during the third verification. Figure 19A is a diagram schematically showing an example of two power levels of the bias RF signal in the etching method of the embodiment. Figure 19B is a diagram showing an example of the ion energy distribution in the etching method of the embodiment. Figure 20A is a diagram schematically showing an example of two power levels of the bias RF signal in the etching method of the embodiment. Figure 20B is a diagram showing an example of the ion energy distribution in the etching method of the embodiment. Figure 21A is a diagram illustrating the processing conditions of the etching method of the embodiment during the third verification. Figure 21B is a diagram illustrating the processing conditions of the etching method of the embodiment during the third verification. Figure 21C is a diagram illustrating the processing conditions of the etching method in the embodiment during the third verification. Figure 22 is a diagram illustrating the results of the third verification. Figure 23 is a flowchart showing an example of the processing sequence of the etching process according to the embodiment.

[0008] Hereinafter, embodiments of the plasma processing apparatus and etching method disclosed herein will be described in detail with reference to the drawings. However, these embodiments do not limit the disclosed plasma processing apparatus and etching method.

[0009] A plasma processing apparatus places a substrate on a substrate support unit located within a chamber, generates plasma within the chamber, and performs plasma processing such as etching. High vertical processing performance is required in the manufacturing of semiconductor devices. Therefore, an etching method is known in which a source RF signal is supplied to generate plasma in the chamber and a bias RF signal is supplied to the substrate support unit to etch the substrate. By supplying a bias RF signal to the substrate support unit when etching the substrate, the verticality of the ions can be improved, and high vertical processing performance can be obtained.

[0010] However, the improved verticality of ions can sometimes leave residue in the corners of the etched bottom. Therefore, techniques to reduce this residue are highly anticipated.

[0011] [Embodiment] [Apparatus Configuration] An example of the plasma processing apparatus of the present disclosure will be described below. In the embodiment described below, the plasma processing apparatus of the present disclosure will be described as a plasma processing system with a system configuration.

[0012] The following describes an example of a plasma processing system configuration. Figure 1 is a diagram illustrating an example of an inductively coupled plasma processing system configuration.

[0013] The plasma processing system includes an inductively coupled plasma processing apparatus 1 and a control unit 2. The inductively coupled plasma processing apparatus 1 includes a plasma processing chamber 10, a gas supply unit 20, a power supply system 30, and an exhaust system 40. The plasma processing chamber 10 corresponds to the chamber of this disclosure. The plasma processing chamber 10 includes a dielectric window 101. The plasma processing apparatus 1 also includes a substrate support unit 11, a gas introduction unit, and an antenna 14. The substrate support unit 11 is located inside the plasma processing chamber 10. The antenna 14 is located on or above the plasma processing chamber 10 (i.e., on or above the dielectric window 101). The plasma processing chamber 10 has a plasma processing space 10s defined by the dielectric window 101, the side wall 102 of the plasma processing chamber 10, and the substrate support unit 11. The plasma processing chamber 10 has at least one gas supply port for supplying at least one processing gas to the plasma processing space 10s, and at least one gas outlet for discharging gas from the plasma processing space. The plasma processing chamber 10 is grounded.

[0014] The substrate support portion 11 includes a main body portion 111 and a ring assembly 112. The main body portion 111 has a central region 111a for supporting the substrate W and an annular region 111b for supporting the ring assembly 112. A wafer is an example of a substrate W. The annular region 111b of the main body portion 111 surrounds the central region 111a of the main body portion 111 in a plan view. The substrate W is placed on the central region 111a of the main body portion 111, and the ring assembly 112 is placed on the annular region 111b of the main body portion 111 so as to surround the substrate W on the central region 111a of the main body portion 111. Therefore, the central region 111a is also called the substrate support surface for supporting the substrate W, and the annular region 111b is also called the ring support surface for supporting the ring assembly 112.

[0015] In one embodiment, the main body 111 includes a base 1110 and an electrostatic chuck 1111. The base 1110 includes a conductive member. The conductive member of the base 1110 can function as a bias electrode. The electrostatic chuck 1111 is placed on the base 1110. The electrostatic chuck 1111 includes a ceramic member 1111a and an electrostatic chuck electrode 1111b placed within the ceramic member 1111a. The electrostatic chuck electrode 1111b is also called a clamping electrode. In one embodiment, the electrostatic chuck electrode 1111b is electrically connected or coupled to a chuck power supply. The chuck power supply may be a DC power supply or an AC power supply. The ceramic member 1111a has a central region 111a. In one embodiment, the ceramic member 1111a also has an annular region 111b. Furthermore, other members surrounding the electrostatic chuck 1111, such as an annular electrostatic chuck or an annular insulating member, may have an annular region 111b. In this case, the ring assembly 112 may be placed on the annular electrostatic chuck or the annular insulating member, or on both the electrostatic chuck 1111 and the annular insulating member. Also, at least one bias electrode, electrically connected or coupled to the power supply 31 and / or power supply 32 described later, may be placed within the ceramic member 1111a. Furthermore, the conductive member of the base 1110 and the bias electrode in the ceramic member 1111a may function as multiple bias electrodes. Also, the electrostatic chuck electrode 1111b may function as a bias electrode. Therefore, the substrate support portion 11 includes at least one bias electrode. The bias electrode corresponds to the lower electrode of this disclosure.

[0016] The ring assembly 112 includes one or more annular members. In one embodiment, the one or more annular members include one or more edge rings and at least one covering ring. The edge rings are formed of a conductive or insulating material, and the covering rings are formed of an insulating material.

[0017] The substrate support section 11 may also include a temperature control module configured to adjust at least one of the electrostatic chuck 1111, the ring assembly 112, and the substrate W to a target temperature. The temperature control module may include a heater, a heat transfer medium, a flow path 1110a, or a combination thereof. A heat transfer fluid such as brine or gas flows through the flow path 1110a. In one embodiment, the flow path 1110a is formed within the base 1110, and one or more heaters are arranged within the ceramic member 1111a of the electrostatic chuck 1111. The substrate support section 11 may also include a heat transfer gas supply section configured to supply heat transfer gas to the gap between the back surface of the substrate W and the central region 111a.

[0018] The gas introduction section is configured to introduce at least one processing gas from the gas supply section 20 into the plasma processing space 10s. In one embodiment, the gas introduction section includes a central gas injector (CGI) 13. The central gas injector 13 is located above the substrate support section 11 and is attached to a central opening formed in the dielectric window 101. The central gas injector 13 has at least one gas supply port 13a, at least one gas flow path 13b, and at least one gas inlet 13c. The processing gas supplied to the gas supply port 13a passes through the gas flow path 13b and is introduced into the plasma processing space 10s from the gas inlet 13c. In addition to or instead of the central gas injector 13, the gas introduction section may also include one or more side gas injectors (SGIs) attached to one or more openings formed in the side wall 102.

[0019] The gas supply unit 20 may include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply unit 20 is configured to supply at least one processing gas to the gas inlet from a corresponding gas source 21 via a corresponding flow controller 22. Each flow controller 22 may include, for example, a mass flow controller or a pressure-controlled flow controller. Furthermore, the gas supply unit 20 may include one or more flow modulation devices that modulate or pulse the flow rate of at least one processing gas.

[0020] The power supply system 30 includes a power supply 31 that is electrically connected to or coupled to the plasma processing chamber 10. In one embodiment, the power supply 31 is electrically connected to or coupled to the plasma processing chamber 10 via at least one impedance matcher. The impedance matcher may be a mechanically controlled matcher or an electronically controlled matcher. The power supply 31 is configured to supply at least one RF (Radio Frequency) signal (RF power) to at least one bias electrode and antenna 14. This generates plasma from at least one processing gas supplied to the plasma processing space 10s. Therefore, the power supply 31 can function as at least part of a plasma generation unit configured to generate plasma from one or more processing gases in the plasma processing chamber 10. Furthermore, by supplying a bias RF signal to at least one bias electrode, a bias potential is generated on the substrate W, and ions in the formed plasma can be drawn into the substrate W.

[0021] The power supply 31 includes a first RF generation unit 31a and a second RF generation unit 31b. The first RF generation unit 31a is electrically connected to or coupled to the antenna 14 and is configured to generate a source RF signal (source RF power) to generate plasma in the plasma processing space 10s. In one embodiment, the first RF generation unit 31a is electrically connected to or coupled to the antenna 14 via at least one impedance matcher. In one embodiment, the source RF signal has a frequency in the range of 10 MHz to 150 MHz. In one embodiment, the first RF generation unit 31a may be configured to generate a plurality of source RF signals having different frequencies. The generated one or more source RF signals are supplied to the antenna 14. The first RF generation unit 31a corresponds to the first high-frequency power supply of the present disclosure. The source RF signal also corresponds to the first high-frequency power of the present disclosure.

[0022] The second RF generation unit 31b is electrically connected to or coupled to at least one bias electrode and is configured to generate a bias RF signal (bias RF power). In one embodiment, the second RF generation unit 31b is electrically connected to or coupled to at least one bias electrode via at least one impedance matcher. The frequency of the bias RF signal may be the same as or different from the frequency of the source RF signal. In one embodiment, the bias RF signal has a lower frequency than the frequency of the source RF signal. In one embodiment, the bias RF signal preferably has a frequency in the range of 1 MHz to 100 MHz, and more preferably in the range of 13 MHz to 60 MHz. In one embodiment, the second RF generation unit 31b may be configured to generate a plurality of bias RF signals having different frequencies. The generated one or more bias RF signals are supplied to at least one bias electrode. In various embodiments, at least one of the source RF signal and the bias RF signal may be pulsed. The second RF generation unit 31b corresponds to the second high-frequency power supply of this disclosure. The bias RF signal corresponds to the second high-frequency power of this disclosure.

[0023] The power supply system 30 may also include a power supply 32 that is electrically connected to or coupled to the plasma processing chamber 10. The power supply 32 includes a voltage generation unit 32a. In one embodiment, the voltage generation unit 32a is electrically connected to or coupled to at least one bias electrode and is configured to generate a voltage signal. The generated voltage signal is applied to at least one bias electrode.

[0024] In various embodiments, the voltage signal may be pulsed. In this case, the voltage generation unit 32a functions as a voltage pulse generation unit configured to generate a sequence of voltage pulses. Thus, the sequence of voltage pulses is applied to at least one bias electrode. In one embodiment, the sequence of voltage pulses has multiple cycles, each cycle including a burst of voltage pulses in a first period and a constant reference voltage in a second period. That is, the burst of voltage pulses is repeated in the sequence of voltage pulses. The absolute value of the voltage level of the voltage pulse is greater than the absolute value of the voltage level of the reference voltage. The voltage pulse may have an arbitrary waveform having a rectangular, trapezoidal, triangular, or a combination thereof, and the arbitrary waveform may change over time. The voltage pulse may have positive or negative polarity. Furthermore, the sequence of voltage pulses may include one or more positive voltage pulses and one or more negative voltage pulses within one cycle. Note that the voltage generation unit 32a may be provided in addition to the power supply 31, or it may be provided in place of the second RF generation unit 31b.

[0025] The antenna 14 includes one or more coils. In one embodiment, the antenna 14 may include an outer coil and an inner coil arranged coaxially. In this case, the power supply 31 may be connected to both the outer coil and the inner coil, or to either the outer coil or the inner coil. In the former case, the same RF generation unit may be connected to both the outer coil and the inner coil, or separate RF generation units may be connected to the outer coil and the inner coil separately.

[0026] During plasma processing, the plasma processing apparatus 1 supplies a source RF signal for plasma generation from the first RF generation unit 31a to the antenna 14. Furthermore, during plasma processing, the plasma processing apparatus 1 supplies a pulsed bias RF signal from the second RF generation unit 31b to the bias electrode of the base 1110.

[0027] The exhaust system 40 may be connected to, for example, a gas outlet 10e located at the bottom of the plasma processing chamber 10. The exhaust system 40 may include a pressure regulating valve and a vacuum pump. The pressure regulating valve regulates the pressure in the plasma processing space 10s. The vacuum pump may include a turbomolecular pump, a dry pump, or a combination thereof.

[0028] The control unit 2 processes computer-executable instructions that cause the plasma processing apparatus 1 to perform the various processes described herein. The control unit 2 may be configured to control the elements of the plasma processing apparatus 1 to perform the various processes described herein. In one embodiment, part or all of the control unit 2 may be included in the plasma processing apparatus 1. The control unit 2 is implemented, for example, by a computer 2a. The control unit 2 may include a processing unit 2a1, a storage unit 2a2, and a communication interface 2a3. The functions realized by the processing unit 2a1 described herein may be implemented in a circuit or processing circuit, including a general-purpose processor, an application-specific processor, integrated circuits, ASICs (Application Specific Integrated Circuits), a CPU (Central Processing Unit), a conventional circuit, and / or a combination thereof, programmed to realize the described functions. The processor is considered to be a circuit or processing circuit, including transistors and other circuits. The processor may be a programmed processor that executes a program stored in the storage unit 2a2. This program may be pre-stored in the storage unit 2a2 or retrieved via a medium when needed. The acquired program is stored in the storage unit 2a2 and read from the storage unit 2a2 and executed by the processing unit 2a1. The medium may be various storage media readable by the computer 2a, or it may be a communication line connected to the communication interface 2a3. The storage unit 2a2 may include RAM (Random Access Memory), ROM (Read Only Memory), HDD (Hard Disk Drive), SSD (Solid State Drive), or a combination thereof. The communication interface 2a3 may communicate with the plasma processing device 1 via a communication line such as a LAN (Local Area Network).In this disclosure, circuits, units, and means are hardware programmed to perform or configured to perform the functions described. Such hardware may be any hardware described in this disclosure, or any hardware known to be programmed to perform or execute the functions described. If such hardware is a processor that is considered to be a type of circuit, such circuit, means, or unit is a combination of hardware and software used to constitute such hardware and / or processor.

[0029] [Plasma Processing Flow] Next, the flow of performing plasma processing such as plasma etching on a substrate W using the plasma processing system according to the embodiment will be briefly explained. The substrate W is transported into the plasma processing chamber 10 via an inlet / outlet (not shown) by a transport mechanism such as a transport arm and placed on the central region 111a of the substrate support part 11. The exhaust system 40 exhausts the inside of the plasma processing chamber 10 to a predetermined vacuum level.

[0030] When etching the substrate W, the control unit 2 controls the gas supply unit 20 and supplies processing gas from the gas supply unit 20 into the plasma processing chamber 10. For example, the storage unit 2a2 stores a plasma processing recipe for the substrate W. The recipe registers the type of gas and flow rate to be used for etching. For example, the control unit 2 reads the recipe from the storage unit 2a2 and supplies the gas of the registered gas type and flow rate from the gas supply unit 20 into the plasma processing chamber 10.

[0031] The control unit 2 controls the first RF generation unit 31a and supplies a source RF signal from the first RF generation unit 31a to plasmaize the processing gas in the plasma processing chamber 10. For example, the power of the source RF signal is registered in the recipe. The control unit 2 supplies the source RF signal to the antenna 14 with the power registered in the recipe from the first RF generation unit 31a to generate a magnetic field in the plasma processing chamber 10, plasmaize the processing gas in the plasma processing chamber 10 and generate inductively coupled plasma. The control unit 2 may also control the first RF generation unit 31a to supply the source RF signal at a predetermined period. For example, the control unit 2 may control the first RF generation unit 31a to turn the supply of the source RF signal on and off at a frequency within the range of 1 Hz to 1 kHz.

[0032] The control unit 2 controls the second RF generation unit 31b and supplies a pulsed bias RF signal from the second RF generation unit 31b to the substrate support unit 11. For example, the power of the bias RF signal is registered in the recipe. For example, the control unit 2 reads the recipe from the storage unit 2a2 and supplies a pulsed bias RF signal from the second RF generation unit 31b with the power registered in the recipe. For example, the control unit 2 periodically turns the supply of the bias RF signal on and off and controls the supply of the bias RF signal from the second RF generation unit 31b in pulse-modulated form. The frequency for pulse-modulating the bias RF signal is preferably in the range of 500 Hz to 50 kHz, and more preferably in the range of 1 kHz to 20 kHz. When pulse modulation is on and off, the off period is preferably in the range of 25 μs to 500 μs, and more preferably in the range of 25 μs to 200 μs. Furthermore, when pulse modulation is performed at high and low levels, it is preferable that the low-level period is within the range of 25 μs to 500 μs, and more preferably within the range of 25 μs to 200 μs. When the control unit 2 pulses modulates the bias RF signal by turning it on and off, it may control the second RF generation unit 31b to pulse modulate the off period preferably within the range of 25 μs to 500 μs, more preferably within the range of 25 μs to 200 μs. The power of the bias RF signal is preferably 200 W or more. The bias RF signal may be pulse modulated at two power levels: a high-level power and a low-level power. When the control unit 2 pulses modulates the power of the bias RF signal at high and low levels, it may control the second RF generation unit 31b to pulse modulate the low-level period preferably within the range of 25 μs to 500 μs, more preferably within the range of 25 μs to 200 μs. The high-level power is preferably 200 W or more, and the low-level power is preferably 100 W or less. For example, the control unit 2 may control the second RF generation unit 31b to supply a pulse-modulated bias RF signal with two power levels: a high-level power of 200W or more and a low-level power of 100W or less. The low-level power is more preferably 10W or less.Furthermore, if the source RF signal is supplied at a predetermined period, the control unit 2 may control the second RF generation unit 31b to supply a bias RF signal in accordance with the supply of the source RF signal.

[0033] Figure 2A illustrates an example of the supply period for the source RF signal and bias RF signal in the etching method according to the embodiment. Figure 2A schematically shows the on period (supply period) T11 and off period (non-supply period) T12 in one cycle (1000 μs) when the supply of the source RF signal and bias RF signal is switched on / off at 100 Hz in the etching method according to the embodiment. The source RF signal is supplied continuously during the on period T11, and the supply is stopped during the off period T12. The bias RF signal is supplied in pulse-modulated form during the on period T11, and the supply is stopped during the off period T12. The substrate W is plasma-etched during the on period T11. By-products generated during etching are exhausted during the off period T12.

[0034] The control unit 2 may also control the first RF generation unit 31a and the second RF generation unit 31b to continuously supply the source RF signal and the bias RF signal.

[0035] Figure 2B is a diagram illustrating the supply period of the source RF signal and bias RF signal according to the embodiment. Figure 2B schematically shows the case in which the source RF signal and bias RF signal are supplied continuously in the etching method according to the embodiment. In Figure 2B, the supply period of the source RF signal and bias RF signal is schematically shown for a period of one cycle (1000 μs) similar to that in Figure 2A. The source RF signal is supplied continuously. The bias RF signal is supplied in a pulsed manner for one cycle. Plasma etching of the substrate W and exhaust of by-products are performed in parallel.

[0036] Figure 3 shows an example of the change in the potential of the substrate W in the etching method according to the embodiment. Figure 3 shows the change in the potential of the substrate W during the period when a bias RF signal is supplied in a pulsed manner in the etching method according to the embodiment. When a high-frequency bias RF signal is supplied to the bias electrode of the base 1110, the potential of the substrate W oscillates. In Figure 3, the range in which the potential of the substrate W oscillates is shown by a dot pattern. Because the bias RF signal is supplied in a pulsed manner, the amplitude of the potential of the substrate W changes significantly in accordance with the fluctuations of the bias RF signal. Figure 3 shows the change in the potential of the substrate W during the on period T21 and the off period T22 of the bias RF signal supplied in pulse modulation. The potential of the substrate W has a waveform that does not return to 0 even when the bias RF signal is off during the off period T22.

[0037] Ions in the plasma are attracted to the substrate W by the potential of the substrate W, and etch the substrate W.

[0038] Figure 4 shows an example of the change in ion and radical flux in the etching method according to the embodiment. Figure 4 schematically shows the change in radical and ion flux (Flux) during the period when a bias RF signal is supplied in a pulsed manner in the etching method according to the embodiment. The ion flux changes in accordance with the change in the potential of the substrate W due to the pulsed supply of the bias RF signal. On the other hand, the radical flux remains substantially constant even when the bias RF signal changes in a pulsed manner.

[0039] Here, an example of etching of the substrate W according to the embodiment will be described. Figures 5A, 5B, 6A, and 6B are diagrams showing an example of etching of the substrate W according to the embodiment. Figure 5A shows the planar shape of the substrate W viewed from above before etching. Figure 5B shows the cross-sectional shape of the substrate W at the dashed line L1 in Figure 5A before etching. Figure 6A shows the planar shape of the substrate W viewed from above after etching. Figure 6B shows the cross-sectional shape of the substrate W at the dashed line L1 in Figure 6A after etching.

[0040] On the substrate W before etching, an underlayer 50 is formed, and a fin structure 51 having a plurality of fins 51a is formed on the underlayer 50. And, on the substrate W before etching, a gate material 52 is deposited on the fin structure 51, and a mask 53 is formed on the gate material 52. Note that, since the fin structure 51 is buried in the gate material 52, it is not shown in FIGS. 5A and 5B. The underlayer 50 is a stop layer that suppresses etching to the lower layer, and is formed of an oxide (Ox) such as a silicon oxide film, for example. The underlayer 50 may be a metal film such as SiN, an organic film, or a tungsten film. The fin structure 51 is formed, for example, by covering the surface of a silicon layer with an oxide. The plurality of fins 51a of the fin structure 51 are formed in parallel in one direction. The gate material 52 is formed of, for example, polycrystalline silicon (polysilicon: Poly). The mask 53 is configured by laminating an oxide layer 53b (Ox) on a SiN layer 53a, for example. The mask 53 is formed with gaps provided in parallel in the intersecting direction with respect to one direction.

[0041] FIGS. 6A and 6B show the substrate W in which the gate material 52 is etched until reaching the underlayer 50 using the mask 53 as a mask. An example of the pressure conditions and the processing gas for etching the substrate W is shown below. In the following values, 1 sccm is about 1.69×10 -3 pa·m 3 / s, and 1 mTorr is about 0.133 Pa.

[0042] - Pressure conditions Pressure in the plasma processing chamber 10: 50 to 100 mTorr - Processing gas Cl2 gas: 100 to 210 sccm HBr gas: 70 to 150 sccm O2 gas: 30 to 60 sccm Ar gas: 50 to 300 sccm

[0043] As a result of the etching, as shown in FIGS. 6A and 6B, the gate material 52 is etched leaving the gate portion 52a directly under the mask 53. The remaining gate portion 52a functions as a gate. In the substrate W, each rectangular portion 55 surrounded by the mask 53 and the fin 51a reaches the underlayer 50.

[0044] Next, an etching method as a reference example will be described. Hereinafter, the differences from the etching method of the embodiment will be described.

[0045] In the etching method of the reference example, when etching the substrate W, a source RF signal is supplied from the first RF generation unit 31a to plasmaize the processing gas in the plasma processing chamber 10. Then, in the etching method of the reference example, a bias RF signal is continuously supplied to the bias electrode of the base 1110 from the second RF generation unit 31b without being pulsed.

[0046] FIG. 7 is a diagram for explaining an example of the supply periods of the source RF signal and the bias RF signal in the etching method of the reference example. FIG. 7 shows a case where, as the etching method of the reference example, the bias RF signal shown in FIG. 2A is continuously supplied without being pulsed. In the etching method of the reference example, the bias RF signal is continuously supplied to the bias electrode of the base 1110 without being pulsed.

[0047] FIG. 8 is a diagram showing an example of the change in the potential of the substrate W in the etching method of the reference example. FIG. 8 shows the change in the potential of the substrate W during the period when the bias RF signal is continuously supplied in the etching method of the reference example. When the high-frequency bias RF signal is supplied to the bias electrode of the base 1110, the potential of the substrate W vibrates. In FIG. 8, the range in which the potential of the substrate W vibrates is shown by a dot pattern. When the bias RF signal is continuously supplied, the potential of the substrate W continuously vibrates with a substantially constant amplitude.

[0048] FIG. 9 is a diagram showing an example of the change in the fluxes of ions and radicals in the etching method of the reference example. FIG. 9 schematically shows the change in the fluxes of radicals and ions during the period when the bias RF signal is continuously supplied in the etching method of the reference example. The flux of ions is substantially constant when the bias RF signal is continuously supplied.

[0049] Figure 10 shows an example of the ion energy distribution in the etching method of the reference example. Figure 10 schematically shows the ion energy distribution function (IEDF) of the etching method of the reference example. The horizontal axis shows the ion energy [eV], with higher energy to the right. The vertical axis shows the number of ions, with a larger number of ions at the top. Also in Figure 10, the threshold E is shown as the minimum ion energy required to etch the gate material 52. ｔｈ This is shown as such.

[0050] In the etching method of the reference example, the energy of the ions is distributed on the high-energy side. This improves the perpendicularity of the ions incident on the substrate W. As a result, the etching method of the reference example can achieve high vertical processing performance. For example, the etching method of the reference example can etch the gate portion 52a of the substrate W shown in Figures 5A, 5B, 6A, and 6B into a vertical shape.

[0051] However, in the etching method of the reference example, due to the improved vertical processing performance, residue of gate material 52 may remain in the corners of the etched bottom. Figure 11 shows an example of residue remaining on the etched substrate W according to the embodiment. Figure 11 shows the planar shape of the substrate W after etching, viewed from above. Residue 56 remains on the etched substrate W in each rectangular portion 55.

[0052] Therefore, in the etching method of this embodiment, when etching the substrate W, a bias RF signal is supplied to the bias electrode of the base 1110 in pulse form, as shown in Figures 2A and 2B.

[0053] Figure 12 shows an example of the ion energy distribution in the etching method of the embodiment. Figure 11 schematically shows the ion energy distribution function (IEDF) of the etching method of the embodiment. The horizontal axis shows the ion energy [eV], with higher energy to the right. The vertical axis shows the number of ions, with a larger number of ions at the top. Figure 12 also shows the threshold energy E of the ions required to etch the gate material 52. ｔｈ This indicates that.

[0054] The etching method of this embodiment generates peaks on both the high-energy and low-energy sides. The etching method of this embodiment achieves high vertical machining performance due to the peak on the high-energy side. Furthermore, the etching method of this embodiment also generates a peak on the low-energy side, and the low-energy peak is below threshold E. ｔｈ As a result, the residue 56 can be removed efficiently.

[0055] [Verification of Residue Amount] Next, we will explain an example of the verification results obtained by actually etching the substrate W and verifying the amount of residue 56.

[0056] In the verification, the substrate W was etched using the etching method of the embodiment and the etching method of the reference example, and the amount of residue 56 on the substrate W was compared. The common conditions for verification regarding the source RF signal, bias RF signal, and bias DC signal of the etching method of the embodiment and the etching method of the reference example are as follows.

[0057] (Common conditions) Source RF signal: Frequency 27 MHz, Power 300 W Bias RF signal: Frequency 13 MHz Bias DC signal: None applied (0V)

[0058] First, I will explain the results of the first verification. In the first verification, we compared the etching method of the embodiment with the etching method of the reference example when the power of the bias RF signal was changed.

[0059] Figure 13A is a diagram illustrating the processing conditions for the etching method of a reference example during the first verification. Figures 13B and 13C are diagrams illustrating the processing conditions for the etching method of an embodiment during the first verification. Figures 13A-13C show the on-period, off-period, and processing conditions for one cycle of switching the supply of the source RF signal and bias RF signal on and off. The vertical direction of the source RF signal and bias RF signal indicates the magnitude of the power supplied.

[0060] In the first verification, the processing conditions for the etching method of the reference example were set as follows, as shown in Figure 13A.

[0061] (Processing conditions for the etching method in the example) Source RF signal: Frequency 27 MHz, Power 300 W Bias RF signal: Frequency 13 MHz, Power 405 W Frequency of pulse modulation of the source RF signal: 100 Hz Duty cycle of the source RF signal: 20% The bias RF signal is applied in synchronization with the pulse modulation of the source RF signal.

[0062] The pulse modulation frequency of the source RF signal is the frequency at which the source RF signal is switched on and off. The duty cycle of the source RF signal is the ratio of the on-periods in one cycle of switching the source RF signal on and off. In the etching method shown in the example, the bias RF signal is continuously supplied during the on-periods of the source RF signal.

[0063] Furthermore, in the first verification, the processing conditions for the etching method of the embodiment were set as follows, as shown in Figures 13B and 13C.

[0064] (Processing conditions for etching method of the embodiment) Source RF signal: frequency 27 MHz, power 300 W, Bias RF signal: frequency 13 MHz, power 405 W, 810 W Frequency of pulse modulation of source RF signal: 100 Hz Duty cycle of source RF signal: 20% Frequency of pulse modulation of bias RF signal: 10 kHz Duty cycle of bias RF signal: 50% The bias RF signal is applied in synchronization with the pulse modulation of the source RF signal and is pulse modulated.

[0065] The pulse modulation frequency of the bias RF signal is the frequency at which the bias RF signal is switched on and off. The duty cycle of the bias RF signal is the ratio of the on-period in one cycle of switching the bias RF signal on and off.

[0066] Under the processing conditions in Figure 13B, a bias RF signal of 405W is supplied with a frequency of 10kHz and a duty cycle of 50% during the ON period of the source RF signal. Under the processing conditions in Figure 13C, an 810W bias RF signal is supplied with a frequency of 10kHz and a duty cycle of 50% during the ON period of the source RF signal.

[0067] In the first verification, the etching method of the reference example resulted in a residue 56 of 2.3 nm on the substrate W. Furthermore, in the etching method of the embodiment, when the bias RF signal power was 405 W, as shown in the processing conditions of Figure 13B, the residue 56 on the substrate W was 2.7 nm. Also, in the etching method of the embodiment, when the bias RF signal power was 810 W, as shown in the processing conditions of Figure 13C, the residue 56 on the substrate W was 1.4 nm. From this, it can be concluded that the etching method of the embodiment can reduce the amount of residue 56 compared to the etching method of the reference example when the bias RF signal power is 810 W.

[0068] In the etching method of this embodiment, the ion energy distribution changes when the power of the bias RF signal changes. Figures 14A and 14B show an example of the ion energy distribution in the etching method of this embodiment. Figures 14A and 14B schematically show the ion energy distribution function (IEDF) when the power of the bias RF signal is 25W, 50W, 100W, and 150W, indicated by line 21-L24. Figure 14B is an enlarged view of Figure 14A, showing the range of ion energy from 0 to 40 [eV]. The horizontal axis shows the ion energy [eV], with higher energy to the right. The vertical axis shows the number of ions, with more ions at the top. The peaks on the high-energy and low-energy sides of the ion energy distribution shift to the high-energy side as the power of the bias RF signal increases.

[0069] In the etching method of this embodiment, the energy of ions with peaks on the lower energy side of the ion energy distribution affects the removal of the residue 56. Figure 15 is a diagram illustrating the change in the peaks on the lower energy side of the energy distribution in the etching method of this embodiment. The horizontal axis represents the power [W] of the bias RF signal. The horizontal axis represents the energy of the ions [eV]. In Figure 15, the energy of ions at the position of the peaks on the lower energy side of the ion energy distribution is plotted for each power of the bias RF signal. As shown in Figure 15, the energy of ions at the peaks on the lower energy side increases as the power of the bias RF signal increases. There is a correlation between the energy of ions at the peaks on the lower energy side and the power of the bias RF signal. In Figure 15, the correlation is shown as a proportional relationship by line L3. By setting the power of the bias RF signal to 200W or more, the energy of ions at the position of the peaks on the lower energy side becomes 30 [eV] or more. For example, the threshold energy E of the ions required for etching the gate material 52 ｔｈ The threshold is 30 [eV]. In the etching method of the embodiment, by setting the power of the bias RF signal to 200W or more, the low-energy peak is also reduced to threshold E ｔｈ As described above, the residue 56 can be removed. Therefore, in the etching method of this embodiment, when etching the substrate W shown in Figures 5A, 5B, 6A, and 6B, a bias RF signal with a power of 200W or more is supplied in pulse-modulated form.

[0070] Next, the second verification will be explained. In the second verification, the etching method of the embodiment was compared with the etching method of the reference example when the frequency of pulse modulation of the bias RF signal was changed.

[0071] Figure 16A is a diagram illustrating the processing conditions for the etching method of a reference example during the second verification. Figures 16B-16D are diagrams illustrating the processing conditions for the etching method of an embodiment during the second verification.

[0072] In the second verification, the processing conditions for the etching method of the reference example were set as follows, as shown in Figure 16A.

[0073] (Processing conditions for the etching method in the example) Source RF signal: frequency 27 MHz, power 300 W, Bias RF signal: frequency 13 MHz, power 405 W Pulse modulation frequency of the source RF signal: 100 Hz Duty cycle of the source RF signal: 20% The bias RF signal is applied in synchronization with the pulse modulation of the source RF signal.

[0074] Furthermore, in the second verification, the processing conditions for the etching method of the embodiment were set as follows, as shown in Figures 16B-16D.

[0075] (Processing conditions for the etching method of the embodiment) Source RF signal: frequency 27 MHz, power 300 W, Bias RF signal: frequency 13 MHz, power 810 W Pulse modulation frequency of source RF signal: 100 Hz Duty cycle of source RF signal: 20% Pulse modulation frequency of bias RF signal: 1 kHz, 5 kHz, 10 kHz Duty cycle of bias RF signal: 50% The bias RF signal is applied in synchronization with the pulse modulation of the source RF signal and is pulse modulated.

[0076] Under the processing conditions in Figure 16B, a bias RF signal of 810W is supplied with a frequency of 1kHz and a duty cycle of 50% during the ON period of the source RF signal. Under the processing conditions in Figure 16C, a bias RF signal of 810W is supplied with a frequency of 5kHz and a duty cycle of 50% during the ON period of the source RF signal. Under the processing conditions in Figure 16D, a bias RF signal of 810W is supplied with a frequency of 10kHz and a duty cycle of 50% during the ON period of the source RF signal.

[0077] Figure 17 is a diagram illustrating the results of the second verification. "BSL" indicates the amount of residue 56 on the substrate W in the etching method of the reference example. "1 kHz" indicates the amount of residue 56 on the substrate W in the etching method of the embodiment when the frequency of pulse modulation of the bias RF signal is 1 kHz. "5 kHz" indicates the amount of residue 56 on the substrate W in the etching method of the embodiment when the frequency of pulse modulation of the bias RF signal is 5 kHz. "10 kHz" indicates the amount of residue 56 on the substrate W in the etching method of the embodiment when the frequency of pulse modulation of the bias RF signal is 10 kHz.

[0078] In the etching method of the reference example, the amount of residue 56 on the substrate W was 2.3 [nm]. In the etching method of the embodiment, when the pulse modulation frequency of the bias RF signal was 1 kHz, as shown in the processing conditions of Figure 16B, the amount of residue 56 on the substrate W was 2.1 [nm]. In the etching method of the embodiment, when the pulse modulation frequency of the bias RF signal was 5 kHz, as shown in the processing conditions of Figure 16C, the amount of residue 56 on the substrate W was 1.9 [nm]. In the etching method of the embodiment, when the pulse modulation frequency of the bias RF signal was 10 kHz, as shown in the processing conditions of Figure 16D, the amount of residue 56 on the substrate W was 1.7 [nm]. From this, it can be seen that the etching method of the embodiment can reduce the amount of residue 56 compared to the etching method of the reference example. Furthermore, in the etching method of the embodiment, the amount of residue 56 can be reduced as the pulse modulation frequency of the bias RF signal increases.

[0079] However, if the frequency used to pulse-modulate the bias RF signal is high, the off-period of the bias RF signal becomes shorter. In substrate W, if the off-period T22 shown in Figure 3 becomes shorter, the potential of substrate W will not decrease sufficiently. In this case, a peak will not occur on the lower energy side of the ion energy distribution.

[0080] Therefore, the frequency for pulse modulation of the bias RF signal is preferably within the range of 500 Hz to 50 kHz, and more preferably within the range of 1 kHz to 20 kHz. Also, when pulse modulation is on and off, the off period is preferably within the range of 25 μs to 500 μs, and more preferably within the range of 25 μs to 200 μs. Also, when pulse modulation is high level and low level, the low level period is preferably within the range of 25 μs to 500 μs, and more preferably within the range of 25 μs to 200 μs.

[0081] Next, the third verification will be explained. In the third verification, the etching method of the embodiment was compared with the etching method of the reference example when the bias RF signal was pulse-modulated at two power levels.

[0082] Figure 18A is a diagram illustrating the processing conditions for the etching method of a reference example during the third verification. Figures 18B-18D are diagrams illustrating the processing conditions for the etching method of an embodiment during the third verification.

[0083] In the third verification, the processing conditions for the etching method of the reference example were set as follows, as shown in Figure 18A.

[0084] (Processing conditions for the etching method in the example) Source RF signal: frequency 27 MHz, power 300 W, Bias RF signal: frequency 13 MHz, power 405 W Pulse modulation frequency of the source RF signal: 100 Hz Duty cycle of the source RF signal: 20% The bias RF signal is applied in synchronization with the pulse modulation of the source RF signal.

[0085] Furthermore, in the third verification, the processing conditions for the etching method of the embodiment were set as follows, as shown in Figures 18B-18D.

[0086] (Processing conditions for the etching method of the embodiment) Source RF signal: frequency 27 MHz, power 300 W, Bias RF signal: frequency 13 MHz, power 810 W - 0 W, 810 W - 100 W, 810 W - 300 W Frequency of pulse modulation of source RF signal: 100 Hz Duty cycle of source RF signal: 20% Frequency of pulse modulation of bias RF signal: 10 kHz Duty cycle of bias RF signal: 50% The bias RF signal is applied in synchronization with the pulse modulation of the source RF signal and is pulse modulated.

[0087] The duty cycle of a bias RF signal is the ratio of the supply period during which high-level power is supplied, when high-level and low-level power are supplied alternately in one cycle. For example, when a bias RF signal is pulse-modulated with two power levels, 810W and 100W, the duty cycle of the bias RF signal is the ratio of the supply period during which 810W is supplied.

[0088] Under the processing conditions in Figure 18B, during the ON period of the source RF signal, bias RF signals of 810W and 0W are supplied with a 50% duty cycle at a frequency of 10kHz. Under the processing conditions in Figure 18C, during the ON period of the source RF signal, bias RF signals of 810W and 100W are supplied alternately at a 50% duty cycle at a frequency of 10kHz. Under the processing conditions in Figure 18D, during the ON period of the source RF signal, bias RF signals of 810W and 300W are supplied alternately at a 50% duty cycle at a frequency of 10kHz.

[0089] In the reference example etching method, the amount of residue 56 on the substrate W was 2.3 [nm]. In the embodiment etching method, when the bias RF signal was pulse-modulated with two power levels, 810W and 0W, as shown in the processing conditions of Figure 18B, the amount of residue 56 on the substrate W was 1.7 [nm]. In the embodiment etching method, when the bias RF signal was pulse-modulated with two power levels, 810W and 100W, as shown in the processing conditions of Figure 18C, the amount of residue 56 on the substrate W was 2.2 [nm]. In the embodiment etching method, when the bias RF signal was pulse-modulated with two power levels, 810W and 300W, as shown in the processing conditions of Figure 18D, the amount of residue 56 on the substrate W was 2.3 [nm].

[0090] Therefore, in the etching method of this embodiment, when the bias RF signal is pulse-modulated with two power levels, the amount of residue 56 can be reduced compared to the etching method of the reference example by setting the low-level power to 100W or less.

[0091] As shown in Figure 12, the etching method of the embodiment generates peaks on both the high-energy and low-energy sides. When the bias RF signal is pulse-modulated at two power levels, the energy at which the low-energy peak occurs changes depending on the low-level power.

[0092] Figure 19A schematically shows an example of two power levels of the bias RF signal in the etching method of the embodiment. Figure 19A shows the case where the high-level power of the bias RF signal is 810W and the low-level power is 0W. Figure 19B shows an example of the ion energy distribution in the etching method of the embodiment. Figure 19B shows the ion energy distribution when the bias RF signal shown in Figure 19A is supplied. With the low-level power of the bias RF signal being 0W, the energy at which the low-energy peak occurs is around 100 eV.

[0093] Figure 20A schematically shows an example of two power levels of the bias RF signal in the etching method of the embodiment. Figure 20A shows the case where the high-level power of the bias RF signal is 810W and the low-level power is greater than 100W. Figure 20B shows an example of the ion energy distribution in the etching method of the embodiment. Figure 20B shows the ion energy distribution when the bias RF signal shown in Figure 20A is supplied. By increasing the low-level power of the bias RF signal to more than 100W, the energy at which the low-energy peak occurs becomes higher than 200 eV.

[0094] In the etching method of this embodiment, the performance of removing the residue 56 decreases when the energy at which the low-energy peak occurs increases.

[0095] In the third verification, the amount of residue 56 on the substrate W was further verified by changing the low-level power of the bias RF signal. Figures 21A and 21C illustrate the processing conditions of the etching method in the embodiment during the third verification.

[0096] Under the processing conditions in Figure 21A, during the ON period of the source RF signal, 810W and 10W bias RF signals are alternately supplied with a 50% duty cycle at a frequency of 10kHz. Under the processing conditions in Figure 21B, during the ON period of the source RF signal, 810W and 25W bias RF signals are alternately supplied with a 50% duty cycle at a frequency of 10kHz. Under the processing conditions in Figure 21C, during the ON period of the source RF signal, 810W and 50W bias RF signals are alternately supplied with a 50% duty cycle at a frequency of 10kHz.

[0097] Figure 22 illustrates the results of the third verification. "810wb" refers to the case where the bias RF signal is pulse-modulated with two power levels, 810W and 0W. In the etching method of the embodiment, when the bias RF signal is pulse-modulated with two power levels, 810W and 0W, as shown in the processing conditions of Figure 18B, the amount of residue 56 on the substrate W was 1.7 [nm]. "810-10wb" refers to the case where the bias RF signal is pulse-modulated with two power levels, 810W and 10W. In the etching method of the embodiment, when the bias RF signal is pulse-modulated with two power levels, 810W and 10W, as shown in the processing conditions of Figure 21A, the amount of residue 56 on the substrate W was 1.7 [nm]. "810-25wb" refers to the case where the bias RF signal is pulse-modulated with two power levels, 810W and 25W. In the etching method of the embodiment, when the bias RF signal was pulse-modulated at two power levels, 810W and 25W, as shown in the processing conditions of Figure 21B, the amount of residue 56 on the substrate W was 1.9 [nm]. "810-50wb" is the case when the bias RF signal was pulse-modulated at two power levels, 810W and 50W. In the etching method of the embodiment, when the bias RF signal was pulse-modulated at two power levels, 810W and 50W, as shown in the processing conditions of Figure 21C, the amount of residue 56 on the substrate W was 2.2 [nm].

[0098] As described above, the etching method in the reference example resulted in a residue 56 of 2.3 nm on the substrate W. The results of the third verification showed that, when the bias RF signal is pulse-modulated with two power levels, the etching method of the embodiment can reduce the amount of residue 56 compared to the etching method of the reference example by setting the low-level power to 100 W or less. Furthermore, the etching method of the embodiment can further reduce the amount of residue 56 by setting the low-level power to 10 W or less.

[0099] [Flowchart] The flow of the etching process, including the etching method shown in this document, will be explained. Figure 23 is a flowchart of an example of the processing sequence of the etching process according to the embodiment. The etching process in Figure 23 is performed when etching of the substrate W is started.

[0100] The control unit 2 controls the gas supply unit 20 and starts supplying processing gas from the gas supply unit 20, supplying the processing gas into the plasma processing chamber 10 (step S10). The control unit 2 controls the first RF generation unit 31a and starts supplying a source RF signal from the first RF generation unit 31a, thereby plasmaizing the processing gas in the plasma processing chamber 10 (step S11). The control unit 2 controls the second RF generation unit 31b and starts supplying a pulsed bias RF signal from the second RF generation unit 31b, supplying the pulsed bias RF signal to the substrate support unit 11 (step S12). Note that the order of steps S11 and S12 may be reversed. Also, some or all of steps S11 and S12 may be executed as a single step.

[0101] The control unit 2 determines whether etching is complete or not (step S13). For example, the control unit 2 determines that etching is complete if the predetermined conditions for terminating etching are met. If etching is not complete (step S13: No), the process proceeds back to step S14. If etching is complete (step S13: Yes), the control unit 2 controls the supply of processing gas, source RF signal, and bias RF signal to stop, respectively, and terminates the process.

[0102] As a result, the etching process according to the embodiment can achieve high vertical processing performance. Furthermore, the etching method of the embodiment can reduce the amount of residue 56.

[0103] The etching process shown in Figure 23 is just one example and is not limited thereto. The etching process may include other steps. Furthermore, the etching process may be performed as part of another process. For example, if etching involves sequentially executing multiple processes to etch the substrate W down to the stop layer, the control unit 2 may control the process to perform the etching process shown in Figure 23 as the etching process to reach the stop layer of the substrate W. For example, when etching the substrate W as shown in Figures 5A, 5B, 6A, and 6B, the control unit 2 may control the process to perform the etching process shown in Figure 23 when etching the bottom of the rectangular portion 55 that has reached the underlayer 50.

[0104] Furthermore, the above embodiments were described using the case of etching the substrate W shown in Figures 5A and 5B as an example. However, the invention is not limited to this. The substrate W only needs to have the target film to be etched formed on the underlying layer. The target film to be etched can be, for example, an oxide film such as a silicon oxide film, or a metal film such as a SiN film, an organic film, or a tungsten film. The underlying layer can be any material that has an etching selectivity ratio with the target film to be etched. The etching method of the embodiments can be applied to any process of etching holes in the target film of the substrate W that reach the underlying layer.

[0105] Furthermore, in the above embodiment, the case of removing the residue 56 remaining on the substrate W when the substrate W shown in Figures 5A and 5B is etched using the etching method of the embodiment was described as an example. The residue to be removed by the etching method of the embodiment is not limited to residue 56. The etching method of the embodiment can be used to remove various types of residue remaining on the substrate. For residue removal, it is preferable that the peak ion energy on the lower energy side of the energy distribution of ions incident on the substrate is in the range of 30 eV to 200 eV. When the bias RF signal is pulse-modulated with two power levels, a high level and a low level, the low level power should be set to a power level such that the peak ion energy on the lower energy side of the ion energy distribution is between 30 eV and 200 eV. For example, the control unit 2 controls the second RF generation unit 31b to supply a bias RF signal pulse-modulated with two power levels, a high level and a low level. The low level power is set to a power level such that the peak ion energy on the lower energy side of the energy distribution of ions incident on the substrate is between 30 eV and 200 eV. As a result, the etching method of this embodiment can remove the residue generated when etching the substrate.

[0106] (Effects) As described above, the plasma processing system (plasma processing apparatus) according to the above embodiment comprises a plasma processing chamber 10 (chamber), a substrate support section 11, a gas supply section 20, a first RF generation section 31a, a second RF generation section 31b, and a control section 2. The substrate support section 11 is located inside the plasma processing chamber 10, includes a bias electrode (lower electrode), and supports the substrate W. The gas supply section 20 is configured to supply processing gas into the plasma processing chamber 10. The first RF generation section 31a is configured to supply a source RF signal (first high-frequency power) that plasmaizes the processing gas supplied into the plasma processing chamber 10. The second RF generation section 31b is configured to supply a bias RF signal (second high-frequency power) to the bias electrode. The control section 2 is configured to control the second RF generation section 31b so that it pulses and supplies the bias RF signal from the second RF generation section 31b. As a result, the plasma processing system according to the embodiment can reduce residue.

[0107] Furthermore, the control unit 2 controls the second RF generation unit 31b to supply a bias RF signal pulse-modulated at 500 Hz to 50 kHz. As a result, the plasma processing system according to this embodiment can reduce residue.

[0108] Furthermore, the control unit 2 controls the second RF generation unit 31b to supply a bias RF signal pulse-modulated at 1 kHz to 20 kHz. As a result, the plasma processing system according to this embodiment can reduce residue.

[0109] Furthermore, when the control unit 2 pulse-modulates the bias RF signal by switching it on and off, it controls the second RF generation unit 31b to pulse-modulate the signal with the off period set to a range of 25 μs to 500 μs. As a result, the plasma processing system according to this embodiment can reduce residue.

[0110] Furthermore, when the control unit 2 pulse-modulates the bias RF signal by switching it on and off, it controls the second RF generation unit 31b to pulse-modulate the signal with the off period set to a range of 25 μs to 200 μs. As a result, the plasma processing system according to this embodiment can reduce residue.

[0111] Furthermore, when the control unit 2 pulses the power supplied by the second RF generation unit 31b as high-level and low-level signals, it controls the second RF generation unit 31b to pulse-modulate the low-level period within the range of 25 μs to 500 μs. As a result, the plasma processing system according to this embodiment can reduce residue.

[0112] Furthermore, when the control unit 2 pulse-modulates the power supplied by the second high-frequency power supply as high-level and low-level, it controls the second high-frequency power supply so that the low-level period is within the range of 25 μs to 200 μs. As a result, the plasma processing system according to this embodiment can reduce residue.

[0113] Furthermore, the control unit 2 controls the second RF generation unit 31b to supply a pulsed bias RF signal with a power of 200 W or more from the second RF generation unit 31b. As a result, the plasma processing system according to the embodiment can reduce residue.

[0114] Furthermore, the control unit 2 controls the second RF generation unit 31b to supply a pulse-modulated bias RF signal from the second RF generation unit 31b with two power levels: a high-level power of 200W or more and a low-level power of 100W or less. As a result, the plasma processing system according to this embodiment can reduce residue.

[0115] Furthermore, the low-level power consumption is 10W or less. This allows the plasma processing system according to this embodiment to produce less residue.

[0116] Furthermore, the low-level power is 0W. This allows the plasma processing system according to this embodiment to produce less residue.

[0117] Furthermore, the control unit 2 controls the second RF generation unit 31b to supply a pulse-modulated bias RF signal from the second RF generation unit 31b at two power levels: a high-level power and a low-level power. The low-level power is set to a power level such that the peak ion energy on the lower energy side of the energy distribution of ions incident on the substrate W is between 30 eV and 200 eV. As a result, the plasma processing system according to this embodiment can reduce residue.

[0118] Furthermore, the substrate W has a target film to be etched formed on the underlayer 50. The control unit 2 is configured to perform control when the bottom of a hole formed in the target film by etching reaches the underlayer 50. As a result, the plasma processing system according to this embodiment can reduce the amount of residue at the bottom of the holes.

[0119] Furthermore, the substrate W has, in order, a fin structure 51 having a plurality of fins 51a on the underlayer 50, a gate material 52 deposited on the fin structure 51, and a mask 53 on the gate material 52. The control unit 2 is configured to control the etching of the gate material 52 deposited between the plurality of fins 51a of the substrate W until the underlayer 50 is exposed. As a result, the plasma processing system according to this embodiment can reduce the residue 56 at the bottom of the hole (rectangular portion 55) where the underlayer 50 is exposed.

[0120] Furthermore, the gate material 52 is polycrystalline silicon. The underlayer 50 is a silicon oxide film. As a result, the plasma processing system according to this embodiment can reduce the amount of residue at the bottom of the hole where the silicon oxide film formed on the polycrystalline silicon is exposed.

[0121] While embodiments have been described above, it should be understood that the embodiments disclosed herein are illustrative and not restrictive in all respects. Indeed, the embodiments described above can be embodied in a variety of forms. Furthermore, the embodiments described above may be omitted, replaced, or modified in various ways without departing from the scope and spirit of the claims.

[0122] For example, in the above embodiment, the case in which a semiconductor wafer is subjected to plasma etching as the substrate W was described as an example, but it is not limited to this. The substrate W may be any other material.

[0123] It should be noted that the embodiments disclosed herein are illustrative and not restrictive in all respects. Indeed, the embodiments described above can be embodied in a variety of forms. Furthermore, the embodiments described above may be omitted, replaced, or modified in various ways without departing from the scope and spirit of the appended claims.

[0124] Furthermore, the following additional information is disclosed regarding the above embodiments.

[0125] (Note 1) A plasma processing apparatus comprising: a chamber; a substrate support portion disposed within the chamber and including a lower electrode for supporting a substrate; a gas supply portion configured to supply a processing gas into the chamber; a first high-frequency power supply configured to supply a first high-frequency power for plasmaizing the processing gas supplied into the chamber; a second high-frequency power supply configured to supply a second high-frequency power to the lower electrode; and a control unit configured to control the second high-frequency power supply so as to supply the second high-frequency power in pulse form.

[0126] (Note 2) The plasma processing apparatus according to Note 1, wherein the control unit controls the second high-frequency power supply to supply the second high-frequency power after pulse modulation at 500 Hz - 50 kHz.

[0127] (Note 3) The plasma processing apparatus according to Note 1 or 2, wherein the control unit controls the second high-frequency power supply to supply the second high-frequency power after pulse modulation at 1 kHz to 20 kHz.

[0128] (Note 4) The plasma processing apparatus according to any one of Notes 1-3, wherein the control unit controls the second high-frequency power supply to pulse modulate the second high-frequency power supply by turning it on and off, so that the off period is within the range of 25 μs to 500 μs.

[0129] (Note 5) The plasma processing apparatus according to any one of Notes 1-4, wherein the control unit controls the second high-frequency power supply to pulse modulate the second high-frequency power supply by turning it on and off, so that the off period is within the range of 25 μs to 200 μs.

[0130] (Note 6) The plasma processing apparatus according to any one of Notes 1-3, wherein the control unit controls the second high-frequency power supply to pulse modulate the power supplied by the second high-frequency power supply as high level and low level, so that the low-level period is within the range of 25 μs to 500 μs.

[0131] (Note 7) The plasma processing apparatus according to any one of Notes 1-3, wherein the control unit controls the second high-frequency power supply to pulse modulate the power supplied by the second high-frequency power supply as high level and low level, so that the low-level period is within the range of 25 μs to 200 μs.

[0132] (Note 8) The plasma processing apparatus according to Note 1-3, wherein the control unit controls the second high-frequency power supply to supply the second high-frequency power of 200 W or more in pulsed form.

[0133] (Note 9) The plasma processing apparatus according to any one of Notes 1-3, wherein the control unit controls the second high-frequency power supply to supply the second high-frequency power which is pulse-modulated with two power levels: a high-level power of 200 W or more and a low-level power of 100 W or less.

[0134] (Note 10) The plasma processing apparatus described in Note 9, wherein the low-level power is 10W or less.

[0135] (Note 11) The plasma processing apparatus according to Note 9 or 10, wherein the low-level power is 0W.

[0136] (Note 12) The plasma processing apparatus according to any one of Notes 1-3, 6, or 7, wherein the control unit controls the second high-frequency power supply to supply the second high-frequency power pulse-modulated from the second high-frequency power supply at two power levels, a high-level power and a low-level power, and the low-level power is set to a power such that the peak ion energy on the lower energy side of the energy distribution of ions incident on the substrate is between 30 eV and 200 eV.

[0137] (Note 13) The plasma processing apparatus according to any one of Notes 1-12, wherein the substrate has a target film to be etched formed on a base layer, and the control unit is configured to perform the control when the bottom of a hole formed in the target film by etching reaches the base layer.

[0138] (Note 14) The plasma processing apparatus according to any one of Notes 1-13, wherein the substrate has, in order, a fin structure having a plurality of fins, a gate material deposited on the fin structure, and a mask on the gate material, and the control unit is configured to perform the control when etching the gate material deposited between the plurality of fins of the substrate until the substrate is exposed.

[0139] (Note 15) The plasma processing apparatus according to Note 14, wherein the gate material is polycrystalline silicon.

[0140] (Note 16) The plasma processing apparatus according to any one of Notes 13-15, wherein the underlying layer is a silicon oxide film.

[0141] (Note 17) An etching method for a plasma processing apparatus comprising: a chamber; a substrate support portion disposed within the chamber and including a lower electrode for supporting a substrate; a gas supply portion configured to supply a processing gas into the chamber; a first high-frequency power supply configured to supply a first high-frequency power for plasmaizing the processing gas supplied into the chamber; and a second high-frequency power supply configured to supply a second high-frequency power to the lower electrode, the etching method comprising: a step of supplying the processing gas from the gas supply portion into the chamber when etching the substrate; a step of supplying a first high-frequency power from the first high-frequency power supply to plasmaize the processing gas in the chamber, and supplying a second high-frequency power from the second high-frequency power supply in pulse form.

[0142] 1 Plasma processing apparatus 2 Control unit 2a Computer 2a1 Processing unit 2a2 Memory unit 2a3 Communication interface 10 Plasma processing chamber 11 Substrate support unit 20 Gas supply unit 30 Power supply system 31, 32 Power supply 31a First RF generation unit 31b Second RF generation unit 32a Voltage generation unit 40 Exhaust system 50 Underlayer 51 Fin structure 51a Fin 52 Gate material 52a Gate unit 53 Mask 53a SiN layer 53b Oxide layer 55 Rectangular section 56 Residue 111 Main body 1110 Base 1111 Electrostatic chuck W Substrate

Claims

1. A plasma processing apparatus comprising: a chamber; a substrate support portion disposed within the chamber and including a lower electrode for supporting a substrate; a gas supply portion configured to supply a processing gas into the chamber; a first high-frequency power supply configured to supply a first high-frequency power for plasmaizing the processing gas supplied into the chamber; a second high-frequency power supply configured to supply a second high-frequency power to the lower electrode; and a control portion configured to control the second high-frequency power supply so as to supply the second high-frequency power in pulse form.

2. The plasma processing apparatus according to claim 1, wherein the control unit controls the second high-frequency power supply to supply the second high-frequency power after pulse modulation at 500 Hz - 50 kHz.

3. The plasma processing apparatus according to claim 1, wherein the control unit controls the second high-frequency power supply to supply the second high-frequency power after pulse modulation at 1 kHz to 20 kHz.

4. The plasma processing apparatus according to claim 1, wherein the control unit controls the second high-frequency power supply to pulse modulate the second high-frequency power supply by turning it on and off, so that the off period is within the range of 25 μs to 500 μs.

5. The plasma processing apparatus according to claim 1, wherein the control unit controls the second high-frequency power supply to pulse modulate the second high-frequency power supply by turning it on and off, so that the off period is within the range of 25 μs to 200 μs.

6. The plasma processing apparatus according to claim 1, wherein the control unit controls the second high-frequency power supply to pulse modulate the power supplied by the second high-frequency power supply as high-level and low-level, so that the low-level period is within the range of 25 μs to 500 μs.

7. The plasma processing apparatus according to claim 1, wherein the control unit controls the second high-frequency power supply to pulse modulate the power supplied by the second high-frequency power supply as high-level and low-level, so that the low-level period is within the range of 25 μs to 200 μs.

8. The plasma processing apparatus according to claim 1, wherein the control unit controls the second high-frequency power supply to supply pulsed second high-frequency power of 200 W or more from the second high-frequency power supply.

9. The plasma processing apparatus according to claim 1, wherein the control unit controls the second high-frequency power supply to supply the second high-frequency power, which is pulse-modulated with two power levels: a high-level power of 200 W or more and a low-level power of 100 W or less.

10. The plasma processing apparatus according to claim 9, wherein the low-level power is 10 W or less.

11. The plasma processing apparatus according to claim 9, wherein the low-level power is 0W.

12. The plasma processing apparatus according to claim 1, wherein the control unit controls the second high-frequency power supply to supply the second high-frequency power pulse-modulated from the second high-frequency power supply at two power levels, a high-level power and a low-level power, and the low-level power is set to a power such that the peak ion energy on the lower energy side of the energy distribution of ions incident on the substrate is between 30 eV and 200 eV.

13. The plasma processing apparatus according to claim 1, wherein the substrate has a target film to be etched formed on a base layer, and the control unit is configured to perform the control when the bottom of a hole formed in the target film by etching reaches the base layer.

14. The plasma processing apparatus according to claim 1, wherein the substrate has, in order, a fin structure having a plurality of fins, a gate material deposited on the fin structure, and a mask on the gate material, and the control unit is configured to perform the control when etching the gate material deposited between the plurality of fins of the substrate until the substrate is exposed.

15. The plasma processing apparatus according to claim 14, wherein the gate material is polycrystalline silicon.

16. The plasma processing apparatus according to claim 13, wherein the underlying layer is a silicon oxide film.

17. An etching method for a plasma processing apparatus comprising: a chamber; a substrate support portion disposed within the chamber and including a lower electrode for supporting a substrate; a gas supply portion configured to supply a processing gas into the chamber; a first high-frequency power supply configured to supply a first high-frequency power for plasmaizing the processing gas supplied into the chamber; and a second high-frequency power supply configured to supply a second high-frequency power to the lower electrode, the etching method comprising: a step of supplying the processing gas from the gas supply portion into the chamber when etching the substrate; a step of supplying a first high-frequency power from the first high-frequency power supply to plasmaize the processing gas in the chamber, and supplying a second high-frequency power from the second high-frequency power supply in pulse form.

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