Current limiter using power semiconductor and control method for said current limiter

Abstract

The present invention relates to a current limiter including semiconductor switches, the current limiter comprising: a current sensor that detects an input current; a first semiconductor switch of which a source terminal is connected to a power system; a second semiconductor switch of which a source terminal is connected to a drain terminal of the first semiconductor switch and a drain terminal is connected to a load; a first diode disposed in a direction opposite to a current flow of the first semiconductor switch; a second diode disposed in a direction opposite to a current flow of the second semiconductor switch; a first gate driver that applies a gate voltage to a gate terminal of the first semiconductor switch; a second gate driver that applies a gate voltage to a gate terminal of the second semiconductor switch; and a control unit that, if an overcurrent exceeding a reference current that has been previously set is detected as a result of measurement of the current sensor, limits the gate voltages applied to the respective gate terminals by controlling the first and second gate drivers such that a current limited to a predetermined size or less is output to the load until a cut-off condition is satisfied.

Description

Current limiter using power semiconductor and control method of the current limiter

[0001] The present invention relates to a current limiter made of a power semiconductor.

[0002] A current limiter is a device that protects the power system and loads by limiting fault currents that occur during accidents such as ground faults or short circuits in the power system. It can block the inflow of said overcurrent into the circuit by opening contacts when an overcurrent higher than a preset current value is input. In addition, a high operating speed is required for the current limiter to protect the power system and loads.

[0003] Meanwhile, conventional current limiters have a configuration that limits fault current by using a fuse that blows when a current exceeding a certain value is applied. While such fuse-type current limiters have the advantages of being inexpensive and simple to manufacture, there is a problem in that the current is permanently cut off when the fuse blows, making it impossible to use until the fuse is replaced.

[0004] As an alternative to solve the problems of such conventional current limiters, current limiters utilizing superconductors are currently emerging. These current limiters have a configuration in which current flows through the superconductor under normal conditions, but when a current exceeding a certain magnitude occurs, the resistance of the superconductor increases, thereby cutting off the current. In this case, current limiters utilizing superconductors have the advantage that when the input current returns to a normal level, the resistance of the superconductor decreases, allowing current to conduct again, and thus the current limiting state can be automatically restored when the overcurrent condition is resolved.

[0005] However, there is a problem in that the above-mentioned superconductor has superconducting properties with a resistance close to zero when cooled to a preset cooling temperature (e.g., absolute zero), but does not have such superconducting properties when not cooled. Therefore, the problem is that the superconductor current limiter must always maintain the superconductor in a state cooled to a preset cooling temperature so that the superconducting properties can be maintained. Consequently, the superconductor current limiter is very sensitive to the external environment, making maintenance very difficult, and thus making monitoring of the current limiter very difficult. In addition, there is a problem that manufacturing and maintenance costs are high because expensive superconductors are required for use and cooling.

[0006] Therefore, there is a need for a current limiter that not only has relatively low manufacturing and maintenance costs but is also easy to manage and maintain as it is not affected by external environmental factors, thereby facilitating easier monitoring.

[0007] In addition, current limiters typically require a high current limiting speed to protect the power system and loads from fault currents. However, when current limiting is performed at a high speed for fault currents in this manner, the upper system or management system may become confused due to the sudden current limiting. In other words, since the interruption occurs before the management system, etc., detects the fault current, there is a problem in that the management system, etc., must take action after the interruption.

[0008] Accordingly, there is a need for a current limiter that, in the event of a fault current, can protect the power system and load from the fault current while also being able to cut off the current according to the control of the aforementioned management system that detects the fault current.

[0009] The present invention aims to solve the aforementioned problems and other problems, and aims to provide a current limiter that has relatively low manufacturing and maintenance costs, is easy to manage and maintain, and allows for easier monitoring of internal conditions, etc.

[0010] Furthermore, the present invention aims to provide a current limiter and a control method for the current limiter, which, when a fault current occurs, protects the power system and load from the fault current while also being able to cut off the current according to the control of the management system, etc., after the management system, etc., detects the fault current.

[0011] According to one aspect of the present invention for achieving the above or other purposes, a current limiter disposed between a power system and a load according to an embodiment of the present invention comprises: a current sensor for detecting an input current input to the current limiter; a first semiconductor switch connected to a source terminal of the power system; a second semiconductor switch connected to a drain terminal of the first semiconductor switch and a drain terminal connected to the load; a first diode disposed opposite to the current flow of the first semiconductor switch; a second diode disposed opposite to the current flow of the second semiconductor switch; a first gate driver for applying a gate voltage to a gate terminal of the first semiconductor switch; a second gate driver for applying a gate voltage to a gate terminal of the second semiconductor switch; and a control unit that controls the first and second gate drivers to limit the gate voltage applied to each gate terminal so that, when an overcurrent exceeding a preset reference current is detected as a result of measurement by the current sensor, a current limited to a value less than or equal to a certain amount is output to the load until a preset cutoff condition is satisfied.

[0012] In one embodiment, the control unit is characterized by including a control unit that controls the first and second gate drivers so that different gate voltages are applied according to the magnitude of the detected overcurrent.

[0013] In one embodiment, the limited gate voltage is characterized as being a voltage lower than the normal state voltage applied in a normal operating state where the input current is less than or equal to a preset reference current, and is a voltage higher than the threshold voltage that allows current to be conducted in each semiconductor switch.

[0014] In one embodiment, the control unit is characterized by controlling the first and second gate drivers in a multi-level manner such that when the gate voltage is limited, the input current is remeasured, and the gate voltage applied to each gate terminal is reduced stepwise according to the magnitude of the remeasured input current, thereby limiting the gate voltage applied to each gate terminal.

[0015] In one embodiment, the control unit is characterized by controlling the first and second gate drivers such that as the gate voltage increases by a limited order, a lower gate voltage is applied to the gate terminal of each semiconductor switch.

[0016] In one embodiment, the control unit is characterized by lowering the reference current value for detecting overcurrent as the gate voltage increases in a limited order.

[0017] In one embodiment, the first semiconductor switch and the second semiconductor switch are characterized in that the resistance of the output terminal increases as the gate voltage decreases from a preset steady-state voltage.

[0018] In one embodiment, the control unit determines whether the cutoff condition is satisfied while the current limited by the gate voltage limit is supplied to the load, and controls the first and second gate drivers to block the applied gate voltage or to apply a gate voltage below a preset threshold voltage according to the determination result, wherein the cutoff condition is determined to be satisfied based on whether the time during which the gate voltage is maintained in a limited state has elapsed a preset time or whether a preset cutoff signal is received from a preset external device.

[0019] In one embodiment, the first semiconductor switch and the second semiconductor switch further include a voltage suppressor that prevents overvoltage from being formed at the source terminal and the drain terminal, respectively, and the voltage suppressor is characterized by being formed by including a snubber circuit, a freewheeling circuit, a TVS (Transient Voltage Suppressor) element, or a MOV (Metal Oxide Varistor) element.

[0020] According to one aspect of the present invention for achieving the above or other purposes, a control method for a current limiter having semiconductor switches according to an embodiment of the present invention comprises: a step of measuring a current flowing into the current limiter from a power system; a step of determining whether an overcurrent has occurred based on the result of the current measurement; a step of controlling the gate drivers of each of the semiconductor switches to apply a limited gate voltage to the gate terminals of each of the semiconductor switches when, as a result of the determination, the overcurrent has occurred; a step of checking whether a preset cutoff condition is satisfied; a step of disconnecting the current limiter from the power system when, as a result of the cutoff condition is satisfied; a step of remeasuring the current flowing into the power system when, as a result of the remeasuring, an overcurrent is detected, changing the limited gate voltage applied to each gate terminal according to the detected overcurrent and changing the overcurrent detection reference level, and repeating the step of checking whether the preset cutoff condition is satisfied up to the step of remeasuring the current; and, as a result of the remeasuring, the overcurrent In the event that it is not detected, the current is supplied normally to the load through the current limiter, the above

[0021] It is characterized by including a step of restoring the current conduction state of the current limiter.

[0022] In one embodiment, the gate voltage that is changed is a gate voltage lower than the gate voltage before the change, and the overcurrent detection reference level that is changed is a current level lower than the overcurrent detection reference level before the change.

[0023] In one embodiment, the limited gate voltage is characterized as being a voltage lower than the normal state voltage applied in a normal operating state where the input current is less than or equal to a preset reference current, and is a voltage higher than the threshold voltage that allows current to be conducted in each semiconductor switch.

[0024] According to one aspect of the present invention for achieving the above or other purposes, a current limiter disposed between a first system and a second system according to an embodiment of the present invention comprises: a current sensor for detecting an input current input to the current limiter; a first semiconductor switch having a source terminal connected to the first system; a second semiconductor switch having a source terminal connected to the second system and disposed in a mirror-symmetric arrangement with respect to the first semiconductor switch; a third semiconductor switch having a drain terminal connected to the second system and disposed in a left-right symmetric arrangement with respect to the second semiconductor switch; a fourth semiconductor switch having a drain terminal connected to the first system and disposed in a left-right symmetric arrangement with respect to the first semiconductor switch; first to fourth gate drivers for applying a gate voltage to the gate terminals of each of the first to fourth semiconductor switches; and, depending on the system among the first and second systems to which current is input, turning on one of the first semiconductor switch and the second semiconductor switch and turning off the other, and turning on one of the third and fourth semiconductor switches complementarily to the first and second semiconductor switches and turning off the other It is characterized by including a control unit that controls gate drivers to apply a gate voltage to the gate terminals of the first to fourth semiconductor switches that are turned on, so as to apply a limited gate voltage according to the detected overcurrent when an overcurrent exceeding a preset reference current is detected as a result of measuring the current sensor.

[0025] In one embodiment, the first semiconductor switch has a source terminal connected to the drain terminal of the first system and the fourth semiconductor switch, and a drain terminal connected to the source terminal of the fourth semiconductor switch, the drain terminal of the second semiconductor switch, and the source terminal of the third semiconductor switch; and between the connection point between the source terminal of the first semiconductor switch and the drain terminal of the fourth semiconductor switch and the connection point between the drain terminal of the first semiconductor switch and the source terminal of the fourth semiconductor switch, a voltage suppression part is provided to prevent overvoltage from being formed at both ends of the first semiconductor switch and the fourth semiconductor switch.

[0026] In one embodiment, the second semiconductor switch is characterized in that its source terminal is connected to the drain terminal of the second system and the third semiconductor switch, and its drain terminal is connected to the source terminal of the third semiconductor switch, the drain terminal of the first semiconductor switch, and the source terminal of the fourth semiconductor switch, and between the connection point between the source terminal of the second semiconductor switch and the drain terminal of the third semiconductor switch and the connection point between the drain terminal of the second semiconductor switch and the source terminal of the third semiconductor switch, a voltage suppression member is provided to prevent overvoltage from being formed at both ends of the second semiconductor switch and the third semiconductor switch.

[0027] In one embodiment, the control unit is characterized by turning on one semiconductor switch whose source terminal is connected to the system to which current is supplied among the first system and the second system, turning off semiconductor switches arranged in mirror symmetry or left-right symmetry with the turned-on semiconductor switch, and turning on one semiconductor switch that is not arranged in mirror symmetry or left-right symmetry with the turned-on semiconductor switch.

[0028] In one embodiment, the control unit is characterized by controlling gate drivers connected to the turned-on semiconductor switches such that when the overcurrent is detected, the gate voltage applied to each gate terminal of the turned-on semiconductor switches is limited differently from one another.

[0029] According to one aspect of the present invention to achieve the above or other purposes, according to an embodiment of the present invention, a current limiting system in which a plurality of current limiter blocks, each composed of semiconductor switches, form a matrix is ​​characterized by comprising: a current sensor that detects an input current input to the current limiter; a current limiter block matrix in which a plurality of current limiter blocks, each comprising a plurality of semiconductor switches in which the maximum magnitude of a current capable of conducting is determined according to a gate voltage applied to a gate terminal, are connected in series or in parallel; and a control unit that controls a plurality of gate drivers that apply a gate voltage to each of the plurality of semiconductor switches so that when an overcurrent is detected as a result of measurement by the current sensor, a limited gate voltage is applied to each of the gate terminals of the plurality of semiconductor switches included in the current limiter block matrix.

[0030] In one embodiment, the current limiter block comprises: a first semiconductor switch having a source terminal connected to a first current limiter block that supplies current to a power system or the current limiter block; a second semiconductor switch having a source terminal connected to a drain terminal of the first semiconductor switch and a drain terminal connected to a second current limiter block that receives current from a load or the current limiter block; a first diode positioned opposite to the current flow of the first semiconductor switch; a second diode positioned opposite to the current flow of the second semiconductor switch; a plurality of voltage suppressors that prevent overvoltage from being formed at the source terminal and drain terminal of each of the first semiconductor switch and the second semiconductor switch; and first and second gate drivers that apply a gate voltage according to the control of the control unit to the gate terminal of the first semiconductor switch and the gate terminal of the second semiconductor switch, respectively.

[0031] In one embodiment, the current limiter block comprises: a first semiconductor switch having a source terminal connected to a first current limiter block that supplies current to a power system or the current limiter block; a second semiconductor switch having a source terminal connected to a second current limiter block that receives current from a load or the current limiter block and is arranged to be mirror-symmetric with respect to the first semiconductor switch; a third semiconductor switch having a drain terminal connected to the load or the second current limiter block and is arranged to be left-right symmetric with respect to the second semiconductor switch; a fourth semiconductor switch having a drain terminal connected to the power system or the first current limiter block and is arranged to be left-right symmetric with respect to the first semiconductor switch; and first to fourth gate drivers that apply a gate voltage according to the control of the control unit to the gate terminals of each of the first to fourth semiconductor switches, wherein the control unit turns on one of the first semiconductor switch and the second semiconductor switch and turns off the other depending on the direction in which current is input to the current limiter block, and either of the third and fourth semiconductor switches is the first and It is characterized by turning on the second semiconductor switch complementarily and turning off the other one.

[0032] According to at least one embodiment of the present invention, the present invention enables the interruption of current supply by using a semiconductor switch formed of a power semiconductor instead of a superconductor. Accordingly, the present invention has the effect of lower manufacturing and maintenance costs compared to a superconductor current limiter, and easy management, maintenance, and monitoring because there is no need for cooling.

[0033] In addition, the current limiter according to an embodiment of the present invention can limit the amount of current flowing into a load or power system by adjusting the gate voltage applied to the gate terminal of the semiconductor switch according to the magnitude of the detected overcurrent when an overcurrent occurs, thereby limiting the amount of current that can be conducted in the semiconductor switch. Accordingly, there is an effect of protecting the power system and the load from the fault current without cutting off the supply of current to the load or power system until a management system, etc., recognizes the fault current.

[0034] FIG. 1 is a block diagram illustrating the configuration of a current limiter according to an embodiment of the present invention.

[0035] FIGS. 2a and FIGS. 2b are exemplary diagrams illustrating current flows capable of bidirectional conduction in a current limiter according to an embodiment of the present invention.

[0036] FIG. 3 is a flowchart illustrating the operation process of limiting and cutting off current when overcurrent is detected in a current limiter according to an embodiment of the present invention.

[0037] FIG. 4 is a flowchart illustrating the operation process of limiting the input current differently according to the magnitude of the overcurrent in a current limiter according to an embodiment of the present invention.

[0038] FIG. 5 is an illustrative diagram showing an example of limiting and blocking the input current when overcurrent is detected in a current limiter according to an embodiment of the present invention.

[0039] FIG. 6 is an illustrative diagram showing an example of limiting the input current stepwise according to the magnitude of the overcurrent in a current limiter according to an embodiment of the present invention.

[0040] FIG. 7 is a block diagram illustrating the configuration of a current limiter according to another embodiment of the present invention.

[0041] FIG. 8 is a block diagram illustrating the configuration of a current limiting system in which a plurality of current limiters are connected in series and / or parallel according to an embodiment of the present invention.

[0042] It should be noted that technical terms used in this specification are used merely to describe specific embodiments and are not intended to limit the invention. Additionally, singular expressions used in this specification include plural expressions unless the context clearly indicates otherwise. In this specification, terms such as "composed of" or "comprising" should not be interpreted as necessarily including all of the various components or steps described in the specification, and should be interpreted as meaning that some of the components or steps may be omitted, or that additional components or steps may be included.

[0043] In addition, when describing the technology disclosed in this specification, if it is determined that a detailed description of related prior art could obscure the essence of the technology disclosed in this specification, such detailed description is omitted.

[0044] Hereinafter, embodiments disclosed in this specification will be described in detail with reference to the attached drawings.

[0045] FIG. 1 is a block diagram illustrating the configuration of a current limiter (10) according to an embodiment of the present invention. FIG. 2a and FIG. 2b are exemplary diagrams illustrating current flows capable of bidirectional conduction in the current limiter (10) according to an embodiment of the present invention.

[0046] First, referring to FIG. 1, a current limiter (10) according to an embodiment of the present invention may be configured to include a first semiconductor switch unit and a second semiconductor switch unit connected in series between a system A and a system B, capable of turning on / turning off, a first current sensor (11) for detecting a current input from system A and a second current sensor (12) for detecting a current input from system B, a cutoff switch (15) for blocking a current flowing between system A and system B, and a control unit (100) connected to the first semiconductor switch unit and the second semiconductor switch unit, the first and second current sensors (11, 12) and the cutoff switch (15).

[0047] First, the first current sensor (11) and the second current sensor (12) can detect the magnitude of the current flowing into the current limiter (10). Then, information about the detected current can be transmitted to the control unit (100). The first current sensor (11) and the second current sensor (12) may be sensors that include a Hall element for measuring the magnitude of the current. In this case, the measured values ​​of the first current sensor (11) and the second current sensor (12) may be information about the magnitude of the current measured through the Hall element.

[0048] Meanwhile, as shown in FIG. 1, the first current sensor (11) can be placed between the first semiconductor switch (110) and the A system. And the second current sensor (12) can be placed between the second semiconductor switch (120) and the B system. In this case, the first current sensor (11) can detect the current input from the A system to the current limiter (10). Also, the second current sensor (12) can detect the current input from the B system to the current limiter (10).

[0049] However, as shown in FIG. 1, it is not limited to only one of the first current sensor (11) and the second current sensor (12). Alternatively, it is also possible to have additional current sensors in addition to the first current sensor (11) and the second current sensor (12). For example, a current sensor (third current sensor) may be additionally provided between the first semiconductor switch (110) and the second semiconductor switch (120). In this case, the third current sensor can detect the current value flowing between the first semiconductor switch (110) and the second semiconductor switch (120) and transmit it to the control unit (100).

[0050] Meanwhile, the first current sensor (11) and the second current sensor (12) may be GMR sensors utilizing a giant magnetoresistance (GMR) element. The GMR sensor is a sensor that utilizes the phenomenon in which a change in magnetoresistance of tens of percent occurs in a multilayer thin film structure composed of a ferromagnetic thin film and a non-magnetic metal thin film, and is smaller in size than a Hall sensor and can detect the current magnitude in a non-contact manner similar to a Hall sensor.

[0051] Meanwhile, the first semiconductor switch unit may be configured to include a first semiconductor switch (110), a first diode (112) positioned in the reverse direction to the current flow of the first semiconductor switch (110), and a first voltage suppression unit (113) to prevent overvoltage from being formed across the first semiconductor switch (110) due to residual current when the circuit is interrupted.

[0052] The first voltage suppression unit (113) may include a snubber circuit or an element for suppressing overvoltage, such as a TVS (Transient Voltage Suppressor) element or a MOV (Metal Oxide Varistor) element. Alternatively, the first voltage suppression unit (113) may be configured to include freewheeling circuits formed of at least one diode and a resistor, each connected to both ends of the first semiconductor switch (110).

[0053] In this case, the source terminal of the first semiconductor switch (110) is a terminal to which current is supplied to the first semiconductor switch (110) and can be connected to system A. Additionally, the drain terminal of the first semiconductor switch (110) is a terminal to which current is output from the first semiconductor switch (110) and can be connected to the second semiconductor switch unit.

[0054] Accordingly, a current flow from system A to the second semiconductor switch section can be formed in the first semiconductor switch (110), and the first diode (112) can be positioned so that its forward direction is opposite to the current flow of the first semiconductor switch (110).

[0055] Additionally, the second semiconductor switch unit may be configured to include a second semiconductor switch (120), a second diode (122) positioned in the reverse direction to the current flow of the second semiconductor switch (120), and a second voltage suppression unit (123) for preventing overvoltage from being formed across the second semiconductor switch (120) due to residual current when the circuit is interrupted. The second voltage suppression unit (123) may be configured to include a snubber circuit or a freewheeling circuit for suppressing overvoltage, or a TVS (Transient Voltage Suppressor) element for suppressing overvoltage.

[0056] In this case, the source terminal of the second semiconductor switch (120) can be connected to the B system as a terminal to which current is supplied to the second semiconductor switch (120). Additionally, the drain terminal of the second semiconductor switch (120) can be connected to the first semiconductor switch unit as a terminal to which current is output from the second semiconductor switch (120).

[0057] Accordingly, a current flow from the B system to the first semiconductor switch section can be formed in the second semiconductor switch (120), and the second diode (122) can be positioned so that its forward direction is opposite to the current flow of the second semiconductor switch (120).

[0058] Accordingly, the first semiconductor switch (111) and the second semiconductor switch (112) can be arranged in a complementary symmetrical form so that current flow is formed in opposite directions between them, as shown in FIG. 1.

[0059] FIGS. 2a and 2b are exemplary diagrams illustrating current flows capable of bidirectional conduction in a current limiter (10) according to an embodiment of the present invention. Here, either system A or system B may be a power system that supplies power, and the other may be a load that receives power from the power system. Alternatively, both system A and system B may be power systems. For example, system A and system B may be different microgrids.

[0060] First, looking at FIG. 2a, FIG. 2a assumes a case where the power system is System A and the load is System B. In this case, a current flow from System A to System B can be formed. That is, as shown in the current flow (201) in FIG. 2a, the current of System A can be input through the source terminal of the first semiconductor switch (110) connected to System A. And depending on the gate voltage applied to the gate terminal of the first semiconductor switch (110), at least a portion of the input current of System A can be output through the drain terminal of the first semiconductor switch (110).

[0061] Meanwhile, the current output through the drain terminal of the first semiconductor switch (110) can be input to the drain terminal of the second semiconductor switch (120). In this case, since the drain terminal of the second semiconductor switch (120) is the output terminal of the second semiconductor switch (120), current may not be supplied to the second semiconductor switch (120). Therefore, the current output through the drain terminal of the first semiconductor switch (110) can be applied to the positive terminal of the second diode (122) connected to the drain terminal of the second semiconductor switch (120). Then, the current applied to the second diode (122) can be output to the negative terminal of the second diode (122), and the current can be output to the source terminal of the second semiconductor switch (120) connected to the negative terminal of the second diode (122). In this case, since the B system is connected to the source terminal of the second semiconductor switch (120), the current input from the A system can be output to the B system through the first semiconductor switch (110) and the second diode (122), as shown in the current flow (201) in FIG. 2a.

[0062] Meanwhile, FIG. 2b assumes a case where the power system is system B and the load is system A. In this case, a current flow from system B to system A can be formed. That is, as shown in the current flow (202) in FIG. 2b, the current of system B can be input through the source terminal of the second semiconductor switch (120) connected to system B. And depending on the gate voltage applied to the gate terminal of the second semiconductor switch (120), at least a portion of the input current of system B can be output through the drain terminal of the second semiconductor switch (120).

[0063] Meanwhile, the current output through the drain terminal of the second semiconductor switch (120) can be input to the drain terminal of the first semiconductor switch (110). Then, the current output through the drain terminal of the second semiconductor switch (120) can be applied to the positive terminal of the first diode (112) connected to the drain terminal of the first semiconductor switch (110). Then, the current applied to the first diode (112) can be output to the negative terminal of the first diode (112), and the current can be output to the source terminal of the first semiconductor switch (110) connected to the negative terminal of the first diode (112). In this case, since system A is connected to the source terminal of the first semiconductor switch (110), the current input from system B can be output to system A through the second semiconductor switch (120) and the first diode (112), as shown in the current flow (202) in FIG. 2b.

[0064] Meanwhile, gate drivers that are connected to a control unit (100) and apply a gate voltage according to the control of the control unit (100) to each connected gate terminal of the first semiconductor switch (110) and the second semiconductor switch (120) may be connected. Among the gate drivers, the first gate driver (111) may be configured to apply a gate voltage to the gate terminal of the first semiconductor switch (110), and the second gate driver (121) may be configured to apply a gate voltage to the gate terminal of the second semiconductor switch (120).

[0065] In addition, the control unit (100) controls each connected component and can control the overall operation of the current limiter (10) according to an embodiment of the present invention. To this end, the control unit (100) can control the gate voltages that each gate driver (111, 121) applies to the gate terminal of the first semiconductor switch (111) and the gate terminal of the second semiconductor switch (112) based on the input current detected from the current sensor (11 or 12).

[0066] For example, when the input current detected by the current sensor (11 or 12) is normal, the control unit (100) can control each gate driver (111, 121) so that a gate voltage corresponding to a preset normal state voltage is applied to the gate terminal of each semiconductor switch (110, 120).

[0067] Here, the above steady-state voltage is a gate voltage applied to each gate terminal when the input current is normal, and may be a gate voltage such that the resistance of the semiconductor switch output terminal becomes sufficiently small. Accordingly, a current of a magnitude corresponding to the input current can be conducted through the semiconductor switch.

[0068] Meanwhile, if the input current detected by the current sensor (11 or 12) is an overcurrent exceeding a preset reference current value, the control unit (100) can control each gate driver (111, 121) so that a voltage lower than the normal state voltage is applied to the gate terminals of each semiconductor switch (110, 120).

[0069] Here, the magnitude of the voltage applied to the gate terminals is a voltage greater than or equal to a preset threshold voltage, and may be less than the steady-state voltage. Therefore, current conduction through the gate terminals is possible, but the resistance of the semiconductor switch output terminal is greater than when the steady-state voltage is applied to the gate terminals, so only a portion of the input current can be conducted through the semiconductor switch.

[0070] In this case, the resistance of each semiconductor switch output terminal may vary depending on the magnitude of the applied gate voltage. Also, depending on the resistance of the semiconductor switch output terminal, the magnitude of the drain current, that is, the magnitude of the current that can be conducted through the semiconductor switches, may be limited. Therefore, a current smaller than the input current magnitude may be output through the current limiter (10) according to the embodiment of the present invention. Thus, the current limiter (10) can protect the other system from the overcurrent when an overcurrent is supplied in any one of the systems supplying current.

[0071] Additionally, the control unit (100) can check whether a preset cutoff condition is satisfied when the overcurrent is detected. If the cutoff condition is satisfied, the cutoff switch (15) can be controlled to cut off the current limiter (10) from the power system. Here, the preset cutoff condition may include whether a cutoff signal is received, whether the current is in a limited state due to the occurrence of an overcurrent, and whether a certain amount of time has elapsed in the limited state.

[0072] For example, the control unit (100) may determine that the blocking condition is satisfied when a blocking signal is received from a pre-configured management system or a pre-configured terminal of a manager. Alternatively, the control unit (100) may determine that the blocking condition is satisfied when the current supplied from one system to another system is limited due to an overcurrent, and the time during which the current is limited exceeds a pre-configured time. Alternatively, the control unit (100) may determine that the blocking condition is satisfied in order to protect the components inside the current limiter (10) when the overcurrent input from one system exceeds a pre-configured threshold level.

[0073] And when it is determined that the above blocking condition is satisfied, the control unit (100) can turn off the blocking switch (15) to open the circuit. Then, the electrical connection between system A and system B is cut off, and current can no longer be supplied from one of the systems to the other through the current limiter (10).

[0074] In this way, when the current supplied from any one of the above systems is an overcurrent exceeding the reference current magnitude, the control unit (100) can limit the gate voltages applied to the gate terminals of each semiconductor switch (110, 120) to limit the amount of current that can be conducted through each semiconductor switch (110, 120).

[0075] Therefore, even when an overcurrent is detected, instead of immediately cutting off the current supply to the other system, the current limiter (10) according to an embodiment of the present invention can maintain a state in which current is supplied from one system to another system for a predetermined time. However, even when the current is supplied, the gate voltages applied to the gate terminals are limited to limit the amount of current that can be conducted through each semiconductor switch (110, 120), thereby protecting the other system from the overcurrent input from one system.

[0076] Accordingly, the current limiter (10) according to an embodiment of the present invention can provide time for a higher system or a management system, etc., to recognize the overcurrent situation and take action regarding the overcurrent situation. To this end, the current limiter (10) may further be equipped with a communication unit (not shown) capable of transmitting notification information to the higher system or a management system or an administrator terminal, etc., to notify the detected overcurrent, although not shown.

[0077] In addition, the control unit (100) can detect a change in the current input from any one of the systems through the current sensor (11 or 12) even after the amount of current that can be conducted through each semiconductor switch (110, 120) is limited and after the supply of current to the other system is cut off through the cut-off switch (15). And if the input current is restored to a size below a preset reference current, the cut-off switch (15) can be turned on to close the circuit again. In addition, the gate voltages applied to the gate terminals of each semiconductor switch (110, 120) can be restored to a normal voltage level (above the threshold voltage) to restore the amount of current that can be conducted through each semiconductor switch (110, 120). Therefore, when the size of the input current is restored, the supply of current from any one of the systems to the other system can be resumed, and the amount of current output through the current limiter (10) may not be limited.

[0078] Therefore, if the current input from any one of the above systems is a noise-type overcurrent that temporarily increases (overcurrent) and then returns to a normal level, the control unit (100) can limit the amount of current conducted through the semiconductor switches (110, 120) using the gate voltage before cutting off the current supply. Accordingly, a limited amount of current can be supplied to the other system, and thus, the devices of the other system can be protected from the overcurrent while maintaining the current supply to the other system.

[0079] Meanwhile, if the above overcurrent is a noise-type overcurrent whose magnitude is restored after a certain period of time has elapsed, and if the input current is restored to a current below the reference current while the amount of current conducted through the semiconductor switches (110, 120) is limited, the control unit (100) can restore the gate voltages applied to each gate terminal to a normal voltage level (above the threshold voltage) to restore the amount of current that can be conducted through each semiconductor switch (110, 120). Therefore, in the case of a noise-type overcurrent where the current temporarily increases, the supply of current to the load or another system may not be cut off, and when the current magnitude is restored, the amount of current conducted through the current limiter (10) can be automatically restored to a normal level. Accordingly, unnecessary circuit interruption can be prevented.

[0080] Meanwhile, the above semiconductor switches (110, 120) may be formed as MOSFET devices. However, it goes without saying that any power semiconductor switch device capable of turning on and off by an applied gate voltage, such as an IGBT, GTO, or IGCT, may also be used.

[0081] And the cutoff switch (15) can cut off the electrical connection from one system to the current limiter (10) and to another system. The cutoff switch (15) may be a mechanical switch and may be a fast switch (FS) having a switching speed greater than a preset speed. And the cutoff switch (15) can physically insulate the current limiter (10) to cut it off from the power system where the fault occurred.

[0082] The above-mentioned cutoff switch (15) can be positioned between the B system and the second semiconductor switch (120) as shown in FIG. 1. However, the position of the above-mentioned cutoff switch (15) is not limited to this, and it can be positioned at any other location. For example, it can be positioned between the A system and the first semiconductor switch (110).

[0083] FIG. 3 is a flowchart illustrating the operation process of limiting and cutting off current when an overcurrent is detected in a current limiter (10) according to an embodiment of the present invention. For convenience of explanation, the following description will assume that one of the systems to which current is supplied is a power system and the other system receiving current is a load.

[0084] Referring to FIG. 3, the control unit (100) of the current limiter (10) according to an embodiment of the present invention can control each gate driver (111, 121) so that a preset voltage is applied to the gate terminals of each semiconductor switch (110, 120) when the current limiter (10) is turned on. In this case, the preset voltage is a voltage greater than or equal to the threshold voltage at which current conduction is possible in each semiconductor switch, and may be a gate voltage such that the output terminal resistance of each semiconductor switch has a sufficiently low value so that the current supplied from the power system can be supplied normally. The gate voltage that enables the current input to the current limiter (10) to conduct without restriction by making the output terminal resistance of the semiconductor switch have a sufficiently low value is referred to as the normal state voltage.

[0085] In this manner, when the normal state voltage is applied as the gate voltage, the control unit (100) can measure the magnitude of the input current input to the current limiter (10) through either the first current sensor (11) or the second current sensor (12) (S300). Then, it can check whether the measured magnitude of the input current is an overcurrent that exceeds a preset reference value (S302).

[0086] If, as a result of the check in step S302 above, the magnitude of the measured input current is a normal current that is less than or equal to the reference value, the control unit (100) can maintain the state in which the current normal state voltage is applied as the gate voltage. Then, proceed to step S300 again to measure the magnitude of the input current input to the current limiter (10).

[0087] On the other hand, if, as a result of the check in step S302 above, the magnitude of the measured input current is an overcurrent exceeding the reference value, the control unit (100) can control each gate driver (111, 121) so that the gate voltage applied to the gate terminal of each semiconductor switch (110, 120) is limited according to the magnitude of the measured overcurrent (S304).

[0088] In the case of a semiconductor switch formed to conduct current according to the gate voltage applied to the gate terminal, current may not conduct when the gate voltage is below the threshold voltage. Furthermore, as the applied gate voltage increases above the threshold voltage, the resistance of the semiconductor switch output terminal may decrease. When the gate voltage reaches the steady-state voltage, the resistance of the semiconductor switch output terminal may become sufficiently small to be negligible. Therefore, when a gate voltage above the threshold voltage and below the steady-state voltage is applied, the resistance of the semiconductor switch output terminal may increase as the applied gate voltage decreases, and accordingly, the amount of current conducted through the semiconductor switch may be limited.

[0089] Meanwhile, in step S304 above, the control unit (100) can control each gate driver (111, 121) so that the resistance of each semiconductor switch output terminal increases in proportion to the magnitude of the measured overcurrent. Therefore, the larger the magnitude of the measured overcurrent, the lower the gate voltage can be applied, and the amount of allowable current that can be conducted through the semiconductor switch can be reduced. Accordingly, the gate voltage applied to the gate terminal of each semiconductor switch (110, 120) can vary depending on the magnitude of the measured overcurrent.

[0090] With reference to FIG. 4 below, we will examine in more detail the operation process of a current limiter (10) according to an embodiment of the present invention, which applies different gate voltages depending on the magnitude of the measured overcurrent.

[0091] Meanwhile, in step S304 above, if the gate voltage applied to the gate terminal of each semiconductor switch (110, 120) is limited by controlling each gate driver (111, 121) according to the magnitude of the measured overcurrent, the control unit (100) can determine whether a preset current cutoff condition is satisfied (S306).

[0092] For example, the control unit (100) may determine that the blocking condition is satisfied when, in step S306, a pre-set signal (hereinafter referred to as the blocking signal) is received from a pre-set management system or a pre-set terminal of a manager. Alternatively, the control unit (100) may determine that the blocking condition is satisfied when the time during which the amount of current conducted through the semiconductor switch (1110, 120) is limited through the gate voltage limiting exceeds a pre-set time. Alternatively, the control unit (100) may determine that the blocking condition is satisfied in order to protect the components inside the current limiter (10) when the magnitude of the overcurrent input from the power system exceeds a pre-set threshold level.

[0093] If, as a result of the judgment in step S306 above, it is determined that a preset current blocking condition is satisfied, the control unit (100) can control the gate drivers (111, 121) so that the gate voltages applied to the gate terminals of each semiconductor switch (110, 120) are blocked (S314). Then, as the gate voltage applied to each gate terminal becomes less than the preset threshold voltage, each semiconductor switch (110, 120) can be switched to an isolated state. Therefore, current may not be conducted through each semiconductor switch (110, 120).

[0094] Meanwhile, the control unit (100) can control the gate drivers (111, 121) to block the gate voltages in step S314, and at the same time, control the blocking switch (15) to turn off. In this case, even if simultaneous control is performed, since the operating speed of the semiconductor switches (110, 120) is significantly faster than that of the blocking switch (15), electrical blocking can be performed first by the semiconductor switches (110, 120), and physical blocking can be performed secondarily by the blocking switch (15). Then, the control unit (100) can measure the current input from the power system again while the current supplied to the load is blocked (S308).

[0095] Meanwhile, if it is determined that the preset current cutoff condition is not satisfied as a result of the judgment in step S306, the control unit (100) can proceed to step S308 while maintaining the state in which current is conducted through the semiconductor switches (110, 120) to measure the current input from the power system again. Then, as a result of the re-measurement of the input current in step S308, it can check whether the current input from the power system has been restored to below a preset reference value (S310).

[0096] And if, as a result of the check in step S310, the current input from the power system is restored to a preset reference value or lower, the control unit (100) can control the current conduction state of each semiconductor switch (110, 120) to be restored (S312).

[0097] In this case, if the current state of the current limiter (10) is such that the allowable current amount capable of conducting is limited due to the gate voltage limited in step S304, the control unit (100) can restore the voltage applied to each gate terminal in step S312 to a normal state voltage. Then, as the normal state voltage is applied to the gate terminal, the resistance of each semiconductor switch (110, 120) output terminal can be lowered sufficiently to be negligible. Thus, as the allowable current amount increases, the input current can be supplied to the load without limitation.

[0098] Accordingly, when the current input from the power system temporarily increases beyond a reference value, the control unit (100) can limit the amount of current supplied to the load by temporarily limiting the amount of current that can be conducted at each semiconductor switch (110, 120). Thus, the load can be protected from the overcurrent.

[0099] In addition, if the above overcurrent stabilizes again after a predetermined period of time, the control unit (100) can restore the amount of current that can be conducted in each semiconductor switch (110, 120) by restoring the gate voltage applied to each gate terminal to a normal state voltage. Therefore, an input current that is input at or below the reference current size can be supplied to the load without limitation.

[0100] Meanwhile, if the current limiter (10) is in a state where current conduction to the load is cut off, the control unit (100) can restore the voltage applied to each gate terminal to a normal state voltage and control the cutoff switch (15) to turn on again. Thus, as the input current stabilizes, the supply of current to the load can be automatically resumed.

[0101] When the current conduction state of the current limiter (10) is restored in step S312, the control unit (100) proceeds to step S300 to measure the current input from the power system again, and proceeds to step S302 to perform the following steps again according to the magnitude of the measured input current.

[0102] However, if, as a result of the check in step S310, the current input from the power system is not restored to a value below a preset reference value, the control unit (100) can check whether the current limiter (10) is in a state where the current is cut off or not, that is, whether the current is limited but the current is flowing (S316). And if, as a result of the check in step S316, the current limiter (10) is in a state where current flow is cut off, the process can proceed to step S308 to re-measure the magnitude of the input current. Thus, the magnitude of the input current can be measured again while the current flow state of the current limiter (10) is maintained.

[0103] On the other hand, if the result of the check in step S316 above indicates that current conduction is maintained through the current limiter (10), the control unit (100) can proceed again to step S304 and limit the gate voltage applied to the gate terminal again according to the magnitude of the input current re-measured in step S308.

[0104] For example, in the case of a fault current such as a direct current, its magnitude may have a tendency to continuously increase. In this case, the current limiter (10) can first detect an overcurrent in step S304 and secondarily limit the gate voltage according to the detected overcurrent, thereby limiting the amount of current conducted through the current limiter (10). Accordingly, the amount of current conducted through the current limiter (10) can be reduced.

[0105] However, as described above, if the magnitude of the overcurrent continues to increase, the amount of current detected through the current limiter (10) may increase again, even though it was initially limited by the gate voltage. In this case, the control unit (100) can further reduce the amount of current by lowering the gate voltage further.

[0106] That is, the control unit (100) controls the current limiter (10) in a multi-level manner by performing the S304 step multiple times in stages according to the change in overcurrent, thereby sequentially lowering the gate voltage applied to the gate terminal of each semiconductor switch, so that even when the input current is an overcurrent that continues to increase as described above, the amount of current conducted through the current limiter (10) is limited so that it does not exceed a preset size.

[0107] Meanwhile, if the gate voltage is limited again according to the magnitude of the input current measured through the above S304 step, the control unit (100) can proceed to the S306 step to determine whether the current cutoff condition is satisfied. Then, depending on the result of the determination, the current being conducted in the current limiter (10) can be cut off, or the current limiter (10) can proceed to the S308 step to measure the input current again while maintaining the state in which current is being conducted. Then, subsequent steps can be performed based on the result of the re-measurement of the input current and the current state of the current limiter (10).

[0108] Meanwhile, as described above, the present invention can control the current limiter (10) in a multi-level manner by sequentially lowering the gate voltage applied to the gate terminal of each semiconductor switch by performing the S304 step a plurality of times.

[0109] FIG. 4 is a flowchart illustrating the operation process in which, in step S304, a current limiter (10) according to an embodiment of the present invention limits the input current differently depending on the magnitude of the overcurrent.

[0110] Referring to FIG. 4, when the control unit (100) enters step S304 of FIG. 3 as the input current is an overcurrent exceeding a reference value, it can detect the gate voltage limit order to date (S400). For example, if the gate voltage has been limited once prior to that, the gate voltage limit order can be detected as the first order, and if it has been limited twice, as the second order. In this case, the gate voltage can be lowered as the gate voltage limit order increases. Therefore, the control unit (100) can detect the gate voltage limit order based on the current gate voltage limit ratio or the currently limited gate voltage.

[0111] When a gate voltage limit order is detected in step S400, the control unit (100) can change the overcurrent detection level and the limit level to limit the gate voltage according to the detected order (S402). More specifically, the control unit (100) can change the overcurrent detection level and the limit level to an overcurrent detection level and a limit level corresponding to the next order of the gate voltage limit order detected in step S400.

[0112] For example, if the gate voltage is not limited (limitation order 0) as a result of detecting the gate voltage limit order in step S400, the control unit (100) can determine a first overcurrent detection level and a first limit level corresponding to the first gate voltage limit order. On the other hand, if the gate voltage limit order detected in step S400 is first, the control unit can determine a second overcurrent detection level and a second limit level corresponding to the next order, the second gate voltage limit order.

[0113] In this case, the second overcurrent detection level may be a lower current level than the first overcurrent detection level. This is because, when the gate voltage is primarily limited, the amount of current conducted through the current limiter (10) is limited, and thus the amount of current may decrease. However, as described above, if the amount of current continuously increases due to overcurrent, the amount of current may increase again after the amount of current has decreased. In this case, in order to detect the case where the amount of current increases again after the allowable current has decreased as the gate voltage is limited, the current value corresponding to the second overcurrent detection level may have a value lower than the current value corresponding to the first overcurrent detection level while exceeding the normal current value.

[0114] Likewise, the third overcurrent detection level corresponding to the third gate voltage limit order may be a lower current level than the second overcurrent detection level. That is, as the gate voltage limit order increases, the overcurrent detection level can be changed to gradually decrease.

[0115] Meanwhile, the fact that the above S304 step is performed multiple times and the gate voltage limiting order is increased multiple times may mean that the input current input to the current limiter (10) becomes increasingly larger. Accordingly, as the gate voltage limiting order increases, the control unit (100) can further lower the gate voltage so that the resistance of the output terminals of the semiconductor switches (110, 120) becomes larger.

[0116] Therefore, the gate voltage that is primarily limited, i.e., the gate voltage that is limited according to the first limiting level, may have a lower value than the gate voltage that is primarily limited, i.e., the gate voltage that is limited according to the first limiting level. For example, if the gate voltage that is limited according to the first limiting level is a voltage at the level of 80% of the preset steady-state voltage, the gate voltage that is limited according to the second limiting level may be limited to a voltage at the level of 50% of the preset steady-state voltage.

[0117] We will examine in more detail an example where the gate voltage is limited in a multi-level form like this, referring to Figure 6 below.

[0118] Meanwhile, in step S402 above, if the overcurrent detection level and the limit level to limit the gate voltage are changed according to the currently detected gate voltage limit order, the control unit (100) can check whether the input current size of the current limiter (10) exceeds the current value according to the overcurrent detection level changed in step S402 (S404). And if, as a result of the check in step S404, the input current size of the current limiter (10) is less than or equal to the current value according to the currently set overcurrent detection level, the current gate voltage level state can be maintained as is. Then, the control unit (100) can proceed to step S306 of FIG. 3 to determine whether the current cutoff condition is satisfied.

[0119] In this case, since the gate voltage level state remains unchanged, the gate voltage level limit order may not increase. That is, if the gate voltage is not limited, the unlimited state can be maintained, and if the gate voltage is continuously limited to the nth order (n-th order gate voltage limit), the gate voltage limit order can be maintained at the nth order.

[0120] On the other hand, if, as a result of the check in step S404, the input current of the current limiter (10) exceeds the current value according to the currently set overcurrent detection level, the control unit (100) can limit the gate voltage according to the currently set limit level, that is, the limit level changed in step S402 (S406). In this case, the gate voltage can be limited so that the gate voltage becomes lower as the order increases. Therefore, even though the gate voltage has been lowered to 80% of the normal state voltage through the first limit level, if the measured input current exceeds the second overcurrent detection level, the control unit (100) can control each gate driver (111, 121) so that it is lowered to 50% of the normal state voltage corresponding to the second limit level. Then, the control unit (100) can proceed to step S306 of FIG. 3 to determine whether the current cutoff condition is satisfied.

[0121] Meanwhile, when the overcurrent detection level and limit level are changed according to the gate voltage limit order as described above, the gate voltage limit order may be initialized depending on whether the input current is restored to a normal level, that is, below a preset reference value. In this case, if the measured input current is restored to a normal level as a result of the check in step S310 of FIG. 3, which re-measures the input current magnitude, the control unit (100) may restore the current conduction state of the current limiter (10) to a normal state in step S312 of FIG. 3, and at the same time initialize the gate voltage limit order accumulated up to that point.

[0122] Meanwhile, FIG. 5 is an illustrative diagram showing an example of limiting and blocking the input current when an overcurrent is detected in a current limiter (10) according to an embodiment of the present invention.

[0123] Referring to FIG. 5, the current limiter (10) according to an embodiment of the present invention can control each gate driver (111, 121) such that when a normal level of current is input as shown in FIG. 5, a gate voltage corresponding to a preset normal state voltage is applied to the gate terminal of each semiconductor switch (110, 120). Accordingly, the input current can be supplied to the load without limitation (conduction section (500)).

[0124] However, if an overcurrent is detected, after a predetermined time (approximately 10 μs) required for overcurrent detection has elapsed, the control unit (100) can limit the gate voltage in response to the detected overcurrent through the operation process (step S304) illustrated in FIG. 3. In this case, as the gate voltage becomes lower than the normal state voltage, the resistance of the semiconductor switch output terminal increases, and the current output through the semiconductor switch can be limited (current limiting (510)).

[0125] In this way, since the current supplied to the load can be limited when an overcurrent flows in, the current limiter (10) according to the embodiment of the present invention can prevent an overcurrent exceeding a certain value from flowing into the load. That is, the load can be protected from and cut off from overcurrent through current limiting. In addition, since the current can be supplied without being cut off in the case of current limiting (510), a higher system or management system, etc., can secure sufficient time to detect the occurrence of overcurrent and take action.

[0126] Meanwhile, in a state where current limiting (510) is performed in this manner, if the overcurrent condition persists until a preset cutoff signal is received from the upper system or management system or until a preset time elapses, the control unit (100) can cut off the supply of current to the load upon receiving the cutoff signal or the elapsed of the preset time. Accordingly, the control unit (100) can cut off the gate voltage applied to the gate terminals of the semiconductor switches (110, 120) at the cutoff point (520) of FIG. 5, thereby switching the semiconductor switches (110, 120) to an insulated state. Therefore, after the cutoff point (520), the gate voltage decreases to below a preset threshold voltage, and the supply of current to the load can be cut off.

[0127] In this case, the current limiter (10) according to the embodiment of the present invention is a blocking device that blocks the gate voltage applied to the gate terminals of the semiconductor switches (110, 120), and may also be a blocking device that is performed in a state where the current value is lowered stepwise through the current limiting (510) section. Therefore, the capacity burden of the blocking current can be reduced, and blocking can be performed without the risk of arc generation.

[0128] Meanwhile, according to the above description, it has been mentioned that overcurrent can be limited stepwise according to the multi-level method. FIG. 6 is an example diagram illustrating an example in which the input current is limited stepwise according to the magnitude of the overcurrent in the current limiter (10) according to an embodiment of the present invention.

[0129] First, Figure 6(a) illustrates an example in which the gate voltage is limited according to a preset overcurrent detection level.

[0130] Referring to FIG. 6(a), even when the magnitude of the measured input current increases, the control unit (100) can maintain a state in which a gate voltage corresponding to a preset normal state voltage is applied as long as the magnitude of the input current does not exceed a preset overcurrent detection level. Accordingly, as shown in the current conduction section (611), a high gate voltage can be maintained before the magnitude of the input current reaches the overcurrent detection level.

[0131] In this state, if the magnitude of the measured input current exceeds a preset overcurrent detection level, the control unit (100) can control the gate drivers (111, 121) so that the gate voltage is limited. Then, the resistance of each semiconductor switch output terminal increases according to the limited gate voltage, and accordingly, the amount of current conducted through the current limiter can be reduced (current limit (612)). And when a preset cutoff condition is satisfied, that is, when a cutoff signal is received from the upper system or management system, or when a preset time elapses in the current limit state (612), the current supplied to the load can be cut off (610).

[0132] Figure 6(b) illustrates an example of limiting the amount of current output to the load by limiting the gate voltage in stages when an overcurrent occurs.

[0133] Referring to FIG. 6(b), even when the magnitude of the measured input current increases, the control unit (100) can maintain a state in which a gate voltage corresponding to a preset normal state voltage is applied as long as the magnitude of the input current does not exceed a preset overcurrent detection level. Accordingly, as shown in the current conduction section (661), a high gate voltage can be maintained before the magnitude of the input current reaches the overcurrent detection level.

[0134] In this state, if the magnitude of the measured input current exceeds a preset overcurrent detection level (primary overcurrent detection level, limit LV 1) (651), the control unit (100) can control the gate drivers (111, 121) to limit the gate voltage (primary gate voltage limit). Then, according to the limited gate voltage (primary limit level), the resistance of each semiconductor switch output terminal increases, and accordingly, the amount of current conducted through the current limiter can be reduced (current limiting stage 1 (662)).

[0135] In a state (662) in which the current is primarily limited in this manner, the control unit (100) can measure the magnitude of the input current again. Additionally, the overcurrent detection level can be changed to an overcurrent detection level (secondary overcurrent detection level, limit LV 2) corresponding to the secondary gate voltage limiting level, which is the level following the firstary gate voltage limiting level, that is, the level after the firstary gate voltage limiting level. In this case, the secondary overcurrent detection level may be a lower current level than the firstary overcurrent detection level.

[0136] And the control unit (100) can check whether the magnitude of the input current measured again, while the input current is reduced through the first gate voltage limit, exceeds the currently set overcurrent detection level, i.e., the second overcurrent detection level (limit LV 2). In this case, the increase in current is checked while the conduction of current is limited through the first gate voltage limit, and the current value corresponding to the second overcurrent detection level (limit LV 2) may be a smaller value than the current value corresponding to the first overcurrent detection level (limit LV 1).

[0137] Meanwhile, if the magnitude of the input current measured again exceeds the second overcurrent detection level (652) while the input current is reduced (first gate voltage limit), the control unit (100) can control each gate driver (111, 121) so that the gate voltage is limited again. In this case, the control unit (100) can control each gate driver (111, 121) so that the gate voltage is applied according to the limit level according to the second gate voltage limit, that is, the preset second limit level.

[0138] In this case, the gate voltage limited according to the second limit level may be a lower voltage than the gate voltage limited according to the first limit level. For example, the first limit level may be 80% of the preset normal state gate voltage, and the second limit level may be 50% of the preset normal state gate voltage. Accordingly, when the gate voltages applied to each gate terminal are limited according to the second limit level, the resistance of the output terminals of the semiconductor switches (110, 120) may increase, and accordingly, the allowable current amount may decrease, thereby further limiting the amount of current being conducted (current limiting stage 2 (663)). And when a preset cutoff condition is satisfied, that is, when a cutoff signal is received from the upper system or management system, or when a preset time elapses in the stage 2 current limit state (663), the current supplied to the load may be cut off (660).

[0139] Accordingly, the current limiter (10) according to the embodiment of the present invention can limit the incoming overcurrent when an overcurrent is introduced, thereby allowing the limited current to be supplied to the load (current limiting effect), and can reduce the amount of current that can be conducted in stages according to the change in the magnitude of the overcurrent. Therefore, the load of the current limiter (10) can be reduced when the current supply is cut off.

[0140] Meanwhile, in the case of the current limiter (10) illustrated in FIG. 1, one semiconductor switch must handle the load of blocking overcurrent for the current supplied from one direction. In this case, it goes without saying that the current limiter may be formed in a form having multiple semiconductor switches so that the load applied to one semiconductor switch can be distributed.

[0141] FIG. 7 is a block diagram illustrating the configuration of a current limiter (70) according to another embodiment of the present invention. Here, it is assumed that system A is a power system to which current is supplied, and system B is a load to which current is supplied.

[0142] Referring to FIG. 7, FIG. 7 may be configured to include a first semiconductor switch unit comprising a first semiconductor switch (710), a fourth semiconductor switch (740), and a first voltage suppression unit (750), and a second semiconductor switch unit comprising a second semiconductor switch (720), a third semiconductor switch (730), and a second voltage suppression unit (760). In this case, the first semiconductor switch unit may be connected to a system A, and a first current sensor (11) may be provided between the first semiconductor switch unit and the system A. Additionally, the second semiconductor switch unit may be connected to a system B, and a second current sensor (12) may be provided between the second semiconductor switch unit and the system B. Furthermore, a cutoff switch (15) may be provided between the first semiconductor switch unit and the system A, or between the second semiconductor switch unit and the system B, as shown in FIG. 7.

[0143] Additionally, each of the first semiconductor switch (710), the second semiconductor switch (720), the third semiconductor switch (730), and the fourth semiconductor switch (740) may be equipped with a first gate driver (711) to a fourth gate driver (714) that applies a gate voltage to each gate terminal, and each gate driver (711, 712, 713, 714) may be controlled to apply a gate voltage applied by the control unit (700) to the gate terminals of each semiconductor switch (710, 720, 730, 740).

[0144] In this case, the first semiconductor switch (710) and the second semiconductor switch (720) may be arranged in a mirror-symmetric manner, and the third semiconductor switch (730) and the fourth semiconductor switch (740) may be arranged in a mirror-symmetric manner. Additionally, the first semiconductor switch (710) and the fourth semiconductor switch (740) may be arranged in a left-right symmetric manner, and the second semiconductor switch (720) and the third semiconductor switch (730) may be arranged in a left-right symmetric manner.

[0145] In this case, the source terminal of the first semiconductor switch (710) and the drain terminal of the fourth semiconductor switch (740) may be connected to the above A system. And the source terminal of the second semiconductor switch (720) and the drain terminal of the third semiconductor switch (730) may be connected to the above B system. Additionally, the drain terminal of the first semiconductor switch (710) and the source terminal of the fourth semiconductor switch may be connected to each other, and the drain terminal of the second semiconductor switch (720) and the source terminal of the third semiconductor switch may be connected to each other. Furthermore, the drain terminal of the first semiconductor switch (710) and the source terminal of the fourth semiconductor switch, which are connected to each other, may be connected to the drain terminal of the second semiconductor switch (720) and the source terminal of the third semiconductor switch, which are connected to each other.

[0146] Additionally, the first overvoltage suppression unit (750) may be positioned between the connection point where the source terminal of the first semiconductor switch (710) and the drain terminal of the fourth semiconductor switch (740) are connected, and the connection point where the drain terminal of the first semiconductor switch (710) and the source terminal of the fourth semiconductor switch (740) are connected. That is, the first semiconductor switch (710) and the fourth semiconductor switch (740) included in the first semiconductor switch unit may share the first voltage suppression unit (750).

[0147] Additionally, the second overvoltage suppression unit (760) may be positioned between the connection point where the source terminal of the second semiconductor switch (720) and the drain terminal of the third semiconductor switch (730) are connected, and the connection point where the drain terminal of the second semiconductor switch (720) and the source terminal of the third semiconductor switch (730) are connected. That is, the second semiconductor switch (720) and the third semiconductor switch (730) included in the second semiconductor switch unit may share the second voltage suppression unit (760).

[0148] Meanwhile, when current is supplied from system A, the control unit (700) can turn on the first semiconductor switch (710) connected to the source terminal of system A. In this case, when the first semiconductor switch (710) is turned on, the fourth semiconductor switch (740) can be turned off. Also, the control unit (700) can turn on the third semiconductor switch (730) connected to the drain terminal and source terminal of the first semiconductor switch (710). In this case, when the third semiconductor switch (730) is turned on, the second semiconductor switch (720) can be turned off.

[0149] Here, turning on the semiconductor switch means that a voltage greater than or equal to a preset threshold voltage is applied to the gate terminal by a gate driver, resulting in a state where current can be conducted, and turning off the semiconductor switch means that a voltage less than a preset threshold voltage is applied to the gate terminal by a gate driver, or the voltage is cut off, resulting in a state where current cannot be conducted.

[0150] Therefore, when current is input from system A, the input current can be output to the drain terminal through the source terminal of the first semiconductor switch (710) that is turned on. And it can be output to the drain terminal through the source terminal of the third semiconductor switch (730) that is turned on. Accordingly, current can be output to system B connected to the drain terminal of the third semiconductor switch (730).

[0151] On the other hand, when current is supplied from the B system, the control unit (700) can turn on the second semiconductor switch (720) connected to the source terminal of the B system. In this case, when the second semiconductor switch (720) is turned on, the third semiconductor switch (730) can be turned off. And the control unit (700) can turn on the fourth semiconductor switch (740) connected to the drain terminal and source terminal of the second semiconductor switch (720). In this case, when the fourth semiconductor switch (740) is turned on, the first semiconductor switch (710) can be turned off.

[0152] Therefore, when current is input from system B, the input current can be output to the drain terminal through the source terminal of the turned-on second semiconductor switch (720). And it can be output to the drain terminal through the source terminal of the turned-on fourth semiconductor switch (740). Accordingly, current can be output to system A connected to the drain terminal of the fourth semiconductor switch (740).

[0153] When the current limiter (70) is configured as shown in FIG. 7, the first semiconductor switch (710) and the fourth semiconductor switch can operate complementarily to each other. Thus, when the first semiconductor switch (710) is turned on, the fourth semiconductor switch (740) is turned off, and when the first semiconductor switch (710) is turned off, the fourth semiconductor switch (740) can be turned on. Also, the second semiconductor switch (720) and the third semiconductor switch can operate complementarily to each other. Thus, when the second semiconductor switch (720) is turned on, the third semiconductor switch (730) is turned off, and when the second semiconductor switch (720) is turned off, the third semiconductor switch (730) can be turned on. That is, in each semiconductor switch section, semiconductor switches that share an overvoltage suppression section and are arranged symmetrically in the left-right and up-down directions can operate complementarily to each other.

[0154] Meanwhile, among the semiconductor switches provided in other semiconductor switch sections that do not share a voltage suppression section, the semiconductor switches in which the source terminal is connected to the drain terminal can be turned on together or turned off together. That is, in the case of the first semiconductor switch (710), the source terminal of the fourth semiconductor switch and the source terminal of the third semiconductor switch can be connected to the drain terminal of the first semiconductor switch (710). In this case, since the fourth semiconductor switch (740) is a semiconductor switch provided in one semiconductor switch section that shares a voltage suppression section (first voltage suppression section (750)) with the first semiconductor switch (710), it can operate complementarily with the first semiconductor switch (710). On the other hand, since the third semiconductor switch (730) is a semiconductor switch provided in another semiconductor switch section that does not share a voltage suppression section with the first semiconductor switch (710), it can be turned on together or turned off together with the first semiconductor switch (710). Likewise, the second semiconductor switch (720) and the fourth semiconductor switch (740) can be turned on together or turned off together.

[0155] Meanwhile, a semiconductor switch with a source terminal connected to a power system can be turned on. Therefore, if system A is a power system, a first semiconductor switch (710) with a source terminal connected to system A can be turned on. And when the first semiconductor switch (710) is turned on, a fourth semiconductor switch (740) that operates complementarily to it can be turned off. In addition, a third semiconductor switch (730) provided in a semiconductor switch unit different from the first semiconductor switch (710), with a source terminal connected to the drain terminal of the first semiconductor switch (710), can be turned on together with the first semiconductor switch (710).

[0156] On the other hand, if the B system is a power system, a second semiconductor switch (720) with a source terminal connected to the B system can be turned on. And when the second semiconductor switch (720) is turned on, a third semiconductor switch (730) that operates complementarily to it can be turned off. In addition, a fourth semiconductor switch (740) provided in a semiconductor switch unit different from the second semiconductor switch (720) and with a source terminal connected to the drain terminal of the second semiconductor switch (720) can be turned on together with the second semiconductor switch (720).

[0157] That is, when a power system is determined, the control unit (700) determines the semiconductor switches to be turned on and turned off according to the determined power system, and can control the gate drivers connected to the semiconductor switches to be turned on so that the gate voltage is applied only to the gate terminals of the semiconductor switches to be turned on.

[0158] As shown in FIG. 7, when a current limiter (70) is formed, if an overcurrent is input from system A, the current output to system B can be limited through the turned-on first semiconductor switch (710) and the third semiconductor switch (730). Also, if an overcurrent is input from system B, the current output to system A can be limited through the turned-on second semiconductor switch (720) and the fourth semiconductor switch (740). That is, the current output to the load can be limited through the two semiconductor switches, and accordingly, the burden of the allowable current limit can be distributed to the two semiconductor switches.

[0159] In this case, the control unit (700) may limit the gate voltage of each of the two semiconductor switches differently based on a limit level for controlling the gate voltage according to the magnitude of the detected overcurrent, thereby limiting the current output to the load. For example, the control unit (700) may control a gate driver connected to one of the turned-on semiconductor switches so that a gate voltage higher than the limit level is applied. It may also control a gate driver connected to one of the turned-on semiconductor switches so that a gate voltage higher than the limit level is applied to the gate terminal. In this case, one of the semiconductor switches may be a semiconductor switch placed closer to the grid, and may be the first semiconductor switch (710) when grid A is a power grid, and the second semiconductor switch (720) when grid B is a power grid. By varying the gate voltage applied to each gate terminal of the turned-on semiconductor switch in this way, the burden of the allowable current limit may be distributed more efficiently to the two semiconductor switches.

[0160] Meanwhile, when multiple current limiters (10, 70) as illustrated in FIG. 1 or FIG. 7 are connected, the internal voltage of the system can be increased or the current capacity can be increased depending on the direction in which the current limiters are connected.

[0161] FIG. 8 is a block diagram illustrating the configuration of a current limiting system (80) in which a plurality of current limiters according to an embodiment of the present invention are connected in series and / or parallel.

[0162] Referring to FIG. 8, the current limiting system according to an embodiment of the present invention may form a matrix (800) by connecting a plurality of current limiters (10, 70) according to the embodiment of the present invention in series and in parallel. In this case, the withstand voltage of the current system can be increased through the series configuration of multiple current limiters. Additionally, the current capacity can be increased through the parallel configuration of multiple current limiters.

[0163] The control unit (810) of the current limiting system (80) can control each current limiter block, and in this case, the control unit (100, or 700) of each current limiter block can control the gate drivers connected to each semiconductor switch so that the gate voltage applied to the gate terminal of each semiconductor switch is lowered when overcurrent is detected, according to the control unit (810) of the current limiting system (80).

[0164] Alternatively, each current limiter block may be configured to include only the first and second semiconductor switch sections. Here, each semiconductor switch section may include semiconductor switches, a voltage suppressor, a diode, and a gate driver (Fig. 1) or semiconductor switches, a voltage suppressor, and a gate driver (Fig. 7). In this case, the control section (810) of the current limiting system (80) may perform the role of the control section (100 or 700) of each current limiter block.

[0165] Meanwhile, when configuring a matrix as shown in Fig. 8, the number of current limiter blocks used can be determined according to the overcurrent capacity. For example, if the direction connecting system A and system B is called the row direction and the direction orthogonal to the row direction is called the column direction, the withstand voltage of the system can be determined according to the number of current limiter blocks connected in the row direction (series connection), and the current capacity can be determined according to the number of current limiter blocks connected in the column direction (parallel connection).

[0166] In this case, the control unit (810) of the current limiting system (80) can determine the number of current limiter blocks connected in a column direction according to the capacity of the detected overcurrent. That is, when the current limiter matrix (800) has 10 rows and 5 columns, if the overcurrent is less than or equal to a first magnitude, the control unit (810) can activate only one row of current limiter blocks connected in series with each other. However, if the detected overcurrent exceeds the first magnitude and is less than the second magnitude, the control unit (810) can activate two rows of current limiter blocks connected in series with each other. In this case, since one row is formed by five current limiter blocks connected in series, five additional current limiter blocks can be activated when two rows are used.

[0167] That is, the control unit (810) can determine the number of current limiters (current limiters connected in series) that are activated according to the magnitude of the detected overcurrent.

[0168] Meanwhile, although specific embodiments have been described in the above description of the present invention, various modifications may be made without departing from the scope of the present invention. In particular, in the above-described embodiment of the present invention, a first current sensor (11) and a second current sensor (12) are provided between system A and the first semiconductor switch unit and between system B and the second semiconductor switch unit, respectively, as an example; however, the current sensor (hereinafter referred to as the third current sensor, not shown) may be placed between the first semiconductor switch unit and the second semiconductor switch unit. Furthermore, the current limiter may be provided with all of the first current sensor (11) to the third current sensor, or at least one of them.

[0169] When the above current limiter is equipped with the first current sensor (11), the second current sensor (12), and the third current sensor, it can detect whether each semiconductor switch part is damaged or whether leakage current is flowing in based on the difference in the amount of current detected by each current sensor.

[0170] For example, the control unit can detect that the first semiconductor switch unit is damaged if the current measurement amount of the third current sensor is less than the current measurement amount of the first current sensor (11) by more than a preset level. Additionally, the control unit can detect that the second semiconductor switch unit is damaged if the current measurement amount of the third current sensor is less than the current measurement amount of the second current sensor (12) by more than a preset level.

[0171] Alternatively, the control unit may detect that leakage current is flowing into the first semiconductor switch unit when the current measurement amount of the third current sensor is greater than the current measurement amount of the first current sensor (11) by a level greater than a preset level. In addition, the control unit may detect that leakage current is flowing into the second semiconductor switch unit when the current measurement amount of the third current sensor is greater than the current measurement amount of the second current sensor (12) by a level greater than a preset level. That is, the control unit of the current limiter according to the embodiment of the present invention may determine whether there is damage to each semiconductor switch unit, as well as whether there is leakage current flowing into each semiconductor switch unit, based on the difference in the current amounts measured by the first current sensor (11) placed between system A and the first semiconductor switch unit, the second current sensor (12) placed between system B and the second semiconductor switch unit, and the third current sensor placed between the first semiconductor switch unit and the second semiconductor switch unit.

[0172] The present invention described above can be implemented as computer-readable code on a medium on which a program is recorded. A computer-readable medium includes all types of recording devices in which data that can be read by a computer system is stored. Examples of computer-readable media include HDD (Hard Disk Drive), SSD (Solid State Disk), SSD (Silicon Disk Drive), ROM, RAM, CD-ROM, magnetic tape, floppy disk, optical data storage device, etc., and also include implementation in the form of a carrier wave (e.g., transmission over the Internet).

[0173] Additionally, the computer may include a control unit (100, 700, or 810) of a current limiter (10 or 70) or a current limiting system (80). Accordingly, the above detailed description should not be interpreted restrictively in all respects and should be considered exemplary. The scope of the invention should be determined by a reasonable interpretation of the appended claims, and all modifications within the equivalent scope of the invention are included within the scope of the invention.

Claims

1. In a current limiter placed between a power system and a load, A current sensor that detects the input current input to the above current limiter; A first semiconductor switch having a source terminal connected to the power system, and a second semiconductor switch having a source terminal connected to the drain terminal of the first semiconductor switch and a drain terminal connected to the load; A first diode positioned in a direction opposite to the current flow of the first semiconductor switch, and a second diode positioned in a direction opposite to the current flow of the second semiconductor switch; A first gate driver that applies a gate voltage to the gate terminal of the first semiconductor switch, and a second gate driver that applies a gate voltage to the gate terminal of the second semiconductor switch; and, A current limiter characterized by including a control unit that limits the gate voltage applied to each gate terminal by controlling the first and second gate drivers so that, when an overcurrent exceeding a preset reference current is detected as a result of measurement by the current sensor, a current limited to a size below a certain threshold is output to the load until a preset cutoff condition is satisfied.

2. In paragraph 1, the control unit is, A current limiter characterized by including a control unit that controls the first and second gate drivers so that different gate voltages are applied according to the magnitude of the detected overcurrent.

3. In paragraph 1, the limited gate voltage is, A current limiter characterized in that the gate driver is a voltage lower than the normal state voltage applied in a normal operating state where the input current is less than or equal to a preset reference current, and is a voltage greater than the threshold voltage that allows current to conduct in each semiconductor switch.

4. In paragraph 1, the control unit is, A current limiter characterized by controlling the first and second gate drivers in a multi-level manner such that when the gate voltage is limited, the input current is re-measured, and the gate voltage applied to each gate terminal is gradually lowered according to the magnitude of the re-measured input current, thereby limiting the gate voltage applied to each gate terminal.

5. In paragraph 4, the control unit is, A current limiter characterized by controlling the first and second gate drivers such that as the order in which the gate voltage is limited increases, a lower gate voltage is applied to the gate terminal of each semiconductor switch.

6. In paragraph 4, the control unit is, A current limiter characterized by lowering the reference current value for detecting overcurrent as the order of the gate voltage limit increases.

7. In paragraph 1, the first semiconductor switch and the second semiconductor switch are, A current limiter characterized by the resistance of the output terminal increasing as the gate voltage decreases from a preset steady-state voltage.

8. In Paragraph 1, The above control unit is, In a state where the current limited by the gate voltage limit is supplied to the load, it is determined whether the cutoff condition is satisfied, and depending on the determination result, the first and second gate drivers are controlled to cut off the applied gate voltage or to apply a gate voltage below a preset threshold voltage. The above blocking conditions are, A current limiter characterized by determining whether the condition is satisfied based on whether the time during which the gate voltage is maintained in a limited state has elapsed a preset time or whether a preset blocking signal is received from a preset external device.

9. In Paragraph 1, The above-mentioned first semiconductor switch and second semiconductor switch are, It further includes a voltage suppressor that prevents overvoltage from forming at the source terminal and drain terminal, respectively, and The above voltage suppression unit is, A current limiter characterized by being formed by including a snubber circuit, a freewheeling circuit, a TVS (Transient Voltage Suppressor) element, or a MOV (Metal Oxide Varistor) element.

10. A method for controlling a current limiter equipped with semiconductor switches, A step of measuring the current flowing from the power system into the current limiter; A step of determining whether an overcurrent has occurred based on the above current measurement results; A step of controlling the gate drivers of each of the semiconductor switches to apply a limited gate voltage to the gate terminal of each of the semiconductor switches when, as a result of determination, the overcurrent occurs; A step to check whether the pre-set blocking conditions are satisfied; A step of disconnecting the current limiter from the power system when the above blocking condition is satisfied; If the above blocking condition is not satisfied, a step of re-measuring the current flowing in from the power system; and, If an overcurrent is detected as a result of the re-measurement above, the step of changing the limited gate voltage applied to each gate terminal according to the detected overcurrent, changing the overcurrent detection reference level, and repeating the step of checking whether the preset cutoff condition is satisfied up to the step of re-measuring the current; A method for controlling a current limiter, characterized by including a step of restoring the current conduction state of the current limiter so that current is normally supplied to the load through the current limiter when no overcurrent is detected as a result of the re-measurement above.

11. In Paragraph 10, The above-mentioned changing gate voltage is, It is a gate voltage lower than the gate voltage before the change, and The above-mentioned changed overcurrent detection reference level is, A control method for the current limiter characterized by a current level lower than the overcurrent detection reference level prior to change.

12. In paragraph 10, the above-mentioned limited gate voltage is, A control method for a current limiter characterized by the fact that the current flowing into the current limiter is a voltage lower than the normal state voltage applied by the gate driver in a normal operating state where the current is less than or equal to a preset reference current, and is a voltage greater than the threshold voltage that allows current to conduct in each semiconductor switch.

13. In a current limiter placed between the first system and the second system, A current sensor that detects the input current input to the above current limiter; A first semiconductor switch having a source terminal connected to the first system; A second semiconductor switch having a source terminal connected to the second system and arranged to be mirror-symmetric with respect to the first semiconductor switch; A third semiconductor switch having a drain terminal connected to the second system and positioned symmetrically with respect to the second semiconductor switch; A fourth semiconductor switch having a drain terminal connected to the first system and positioned symmetrically with respect to the first semiconductor switch; First to fourth gate drivers that apply a gate voltage to the gate terminals of each of the first to fourth semiconductor switches; and, A current limiter characterized by including a control unit that controls gate drivers to apply a gate voltage to the gate terminals of the turned-on semiconductor switches among the first to fourth semiconductor switches, such that when an overcurrent exceeding a preset reference current is detected as a measurement result of the current sensor, the gate voltage is applied according to the detected overcurrent.

14. In Paragraph 13, The above-mentioned first semiconductor switch is, A source terminal is connected to the drain terminal of the first system and the fourth semiconductor switch, and a drain terminal is connected to the source terminal of the fourth semiconductor switch, the drain terminal of the second semiconductor switch, and the source terminal of the third semiconductor switch. A current limiter characterized by having a voltage suppression portion provided between the connection point of the source terminal of the first semiconductor switch and the drain terminal of the fourth semiconductor switch, and the connection point of the drain terminal of the first semiconductor switch and the source terminal of the fourth semiconductor switch, to prevent overvoltage from being formed at both ends of the first semiconductor switch and the fourth semiconductor switch.

15. In Paragraph 13, The above second semiconductor switch is, A source terminal is connected to the drain terminal of the second system and the third semiconductor switch, and a drain terminal is connected to the source terminal of the third semiconductor switch, the drain terminal of the first semiconductor switch, and the source terminal of the fourth semiconductor switch. A current limiter characterized by having a voltage suppression portion provided between the connection point between the source terminal of the second semiconductor switch and the drain terminal of the third semiconductor switch, and the connection point between the drain terminal of the second semiconductor switch and the source terminal of the third semiconductor switch, to prevent overvoltage from being formed at both ends of the second semiconductor switch and the third semiconductor switch.

16. In Clause 13, the control unit above, A current limiter characterized by turning on one semiconductor switch whose source terminal is connected to the system to which current is supplied among the first system and the second system, turning off semiconductor switches arranged in mirror symmetry or left-right symmetry with the turned-on semiconductor switch, and turning on one semiconductor switch that is not arranged in mirror symmetry or left-right symmetry with the turned-on semiconductor switch.

17. In paragraph 13, the control unit above is, A current limiter characterized by controlling gate drivers connected to the turned-on semiconductor switches such that when the above overcurrent is detected, the gate voltage applied to each gate terminal of the turned-on semiconductor switches is limited differently from one another.

18. In a current limiting system in which a plurality of current limiter blocks, each composed of semiconductor switches, form a matrix, A current sensor that detects the input current input to the above current limiter; A current limiter block matrix comprising a plurality of current limiter blocks connected in series or parallel, each block including a plurality of semiconductor switches, wherein the maximum magnitude of a conductable current is determined according to a gate voltage applied to a gate terminal; and, A current limiting system characterized by including a control unit that controls a plurality of gate drivers to apply a gate voltage to each of the gate terminals of a plurality of semiconductor switches, such that when an overcurrent is detected as a result of measurement by the current sensor, a limited gate voltage is applied to each of the gate terminals of a plurality of semiconductor switches included in the current limiter block matrix.

19. In paragraph 18, the current limiter block is, A first semiconductor switch having a source terminal connected to a first current limiter block that supplies current to a power system or the current limiter block, and a second semiconductor switch having a source terminal connected to the drain terminal of the first semiconductor switch and a drain terminal connected to a second current limiter block that receives current from a load or the current limiter block; A first diode positioned in a direction opposite to the current flow of the first semiconductor switch, and a second diode positioned in a direction opposite to the current flow of the second semiconductor switch; A plurality of voltage suppression units that prevent overvoltage from being formed at the source terminal and drain terminal of each of the first semiconductor switch and the second semiconductor switch; and, A current limiting system characterized by including first and second gate drivers that apply a gate voltage according to the control of the control unit to the gate terminal of the first semiconductor switch and the gate terminal of the second semiconductor switch, respectively.

20. In paragraph 18, the current limiter block is, A first semiconductor switch having a source terminal connected to a first current limiter block that supplies current to a power system or the current limiter block; A second semiconductor switch having a source terminal connected to a second current limiter block that receives current from a load or the current limiter block, and positioned so as to be mirror-symmetric with respect to the first semiconductor switch; A third semiconductor switch having a drain terminal connected to the load or the second current limiter block and positioned symmetrically with respect to the second semiconductor switch; A fourth semiconductor switch having a drain terminal connected to the power system or the first current limiter block and positioned symmetrically with respect to the first semiconductor switch; It includes first to fourth gate drivers that apply a gate voltage according to the control of the control unit to each of the gate terminals of the first to fourth semiconductor switches, and The above control unit is, A current limiting system characterized by turning on one of the first semiconductor switch and the second semiconductor switch and turning off the other depending on the direction in which current is input to the current limiter block, and turning on one of the third and fourth semiconductor switches complementarily to the first and second semiconductor switches and turning off the other.

Images