Test socket for testing plurality of dies, and manufacturing method therefor

Abstract

A test socket for testing a plurality of dies, according to one embodiment of the present invention, comprises: a printed circuit board for generating or controlling a test signal; a plurality of base units disposed on the printed circuit board so as to correspond to positions at which the plurality of dies are to be disposed; and a plurality of probes having at least one end fixed to the base unit, and having the other end in contact with the die so as to transmit the test signal, wherein the base unit includes a glass substrate in which a via for transmitting the test signal is formed to penetrate in the thickness direction.

Description

Test socket for inspecting multiple dies and method for manufacturing the same

[0001] The present invention relates to a socket for inspecting a semiconductor die having a fine pitch.

[0002] Unless otherwise indicated in this specification, the contents described in this identification item are not prior art for the claims of this application, and are not recognized as prior art simply because they are described in this identification item.

[0003] As semiconductor technology advances rapidly, products with various packaging forms are emerging. In particular, high-end semiconductor products such as High Bandwidth Memory (HBM), which improve performance by vertically stacking substrates or devices formed on a wafer, are attracting attention. These products require fine pitch, high-speed signal processing, and high power stability; however, there are limitations in meeting these requirements when testing them using conventional simple vertical pin or rubber socket structures.

[0004] Specifically, in order to inspect individual chips (dies) at the die level, it is necessary to be able to exchange signals with a tester while making precise contact with pads or bumps formed on the die; however, conventional technology has limitations in handling fine pitches, high-speed signal processing, and ensuring power stability.

[0005] To address these issues, probe card-based structures are being adopted as an alternative. Depending on the pin type, probe cards can have cantilever or vertical probe structures, and to accommodate fine pitches, they utilize spatial conversion structures such as MLC (Multi-Layer Ceramic) or MLO (Multi-Layer Organic) to transmit electrical signals to printed circuit boards (PCBs).

[0006] However, spatial conversion structures of MLC or MLO have evolved for application in large-area wafer-level probe cards; not only are their structures complex and manufacturing costs high, but they also present difficulties in being applied to die-level test sockets that require fine pitch and high-speed signal transmission.

[0007] [Prior Art] (Patent Document 1) Republic of Korea Registered Patent No. 10-2357723 (Registered Jan. 26, 2022)

[0008] The present invention aims to solve the above-mentioned problems by providing a test socket configured to test a die having a fine pitch by forming vias with a high aspect ratio on a glass substrate.

[0009] In addition, the present invention provides a test socket that enables high-speed signal transmission and structural simplification due to the characteristics of the glass substrate, and can secure thermal expansion characteristics corresponding to the test target.

[0010] The problems that the present invention aims to solve are not limited to those mentioned above, and other unmentioned problems will be clearly understood by a person skilled in the art from the description below.

[0011] A test socket for inspecting a plurality of dies according to one embodiment of the present invention comprises: a printed circuit board configured to generate or control an inspection signal; a plurality of base units disposed on the printed circuit board to correspond to a position for placing the plurality of dies; and a plurality of probes formed such that at least one end is fixed to the base unit and the other end contacts the die to transmit the inspection signal, wherein the base unit comprises a glass substrate formed such that a via for transmitting the inspection signal penetrates in the thickness direction.

[0012] A method for manufacturing a test socket for inspecting a plurality of dies according to one embodiment of the present invention comprises the steps of: preparing a plurality of base units; preparing a printed circuit board configured to generate or control an inspection signal; fixing the plurality of base units on the printed circuit board so as to correspond to a position where the plurality of dies are to be placed; and fixing at least one end of a plurality of probes formed to contact the dies and transmit the inspection signal to the base units, wherein the step of preparing the base units includes the step of forming a via for transmitting the inspection signal to penetrate a glass substrate in the thickness direction.

[0013] According to the test socket of the present invention, by forming through glass vias having an aspect ratio of 10:1 or more on a glass substrate, it is possible to respond to testing of a semiconductor die having a fine pitch that is highly integrated.

[0014] In addition, the present invention enables high-speed signal transmission due to the low dielectric constant characteristics of the glass substrate and the ability to manufacture it with a thin thickness, thereby having the effect of stably and efficiently implementing die-level testing for HBM, etc.

[0015] Furthermore, the test socket according to the present invention can be directly mounted, allowing for structural simplification, and depending on the material composition of the glass substrate, it can secure thermal expansion characteristics corresponding to the test target, such as silicon-based packaging like HBM.

[0016] The effects of the present invention are not limited to those mentioned above, and other unmentioned effects will be clearly understood by a person skilled in the art from the description below.

[0017] FIG. 1 is a cross-sectional view of a test socket according to one embodiment of the present invention.

[0018] FIG. 2 is a cross-sectional view showing a base unit of a test socket according to one embodiment of the present invention.

[0019] FIG. 3 is a diagram showing the state of testing a plurality of dies using a test socket according to one embodiment of the present invention.

[0020] FIG. 4 is a cross-sectional view of a test socket according to another embodiment of the present invention.

[0021] FIG. 5 is a flowchart of a method for manufacturing a test socket according to one embodiment of the present invention.

[0022] FIG. 6 is a cross-sectional view showing the manufacturing process of a test socket according to one embodiment of the present invention.

[0023] FIGS. 7a to 7c are drawings comparing the high-speed signal transmission characteristics of a test socket according to one embodiment of the present invention.

[0024] FIGS. 8a and 8b are drawings comparing the power stability characteristics of a test socket according to one embodiment of the present invention.

[0025] Embodiments of the present invention are described below with reference to the attached drawings so that those skilled in the art can easily implement the invention. However, the present invention may be embodied in various different forms and is not limited to the embodiments described herein. Furthermore, in order to clearly explain the present invention in the drawings, parts unrelated to the explanation have been omitted, and similar parts throughout the specification are denoted by similar reference numerals.

[0026] Throughout the specification, when a part is described as "comprising" a certain component, this means that, unless specifically stated otherwise, it does not exclude other components but may include additional components. Furthermore, throughout the specification, when a part is described as "connected" to another part, this includes not only cases where they are directly connected, but also cases where they are connected with an intermediate component interposed, and cases where they are electrically connected with an intermediate element. Moreover, throughout the specification, when a component is described as being "on" another component, this includes not only cases where a component is in contact with another component, but also cases where another component exists between the two components. Additionally, expressions such as "first," "second," etc., used in this specification may modify various components regardless of order and / or importance; they are used merely to distinguish one component from another and do not limit those components, nor do they necessarily refer to different components. For example, "first direction" and "second direction" may refer to the same direction or different directions.

[0027] FIG. 1 is a cross-sectional view of a test socket according to an embodiment of the present invention. FIG. 2 is a cross-sectional view showing a base unit of a test socket according to an embodiment of the present invention. FIG. 3 is a drawing showing a state of testing a plurality of dies using a test socket according to an embodiment of the present invention.

[0028] A test socket according to one embodiment of the present invention is for testing at the semiconductor die level and can perform high-speed testing by forming physical contact and electrical connections with a plurality of dies, each having a terminal or contact point formed at a fine pitch (gap).

[0029] Referring to FIGS. 1 and 2, a test socket (100) according to one embodiment of the present invention includes a printed circuit board (PCB, 110), a base unit (120), and a probe (130).

[0030] The printed circuit board (110) is configured to generate and / or control inspection signals. The printed circuit board (110) can serve as a support board in which the base unit (120), described later, is arranged at predetermined intervals and arrangements.

[0031] The base unit (120) is configured to connect the printed circuit board (110) and the die to each other to transmit an inspection signal, and a plurality of base units may be configured to correspond to the positions on the printed circuit board (110) where a plurality of dies are to be placed. The die to be inspected may be an individual chip from which the dicing process has been completed from a wafer.

[0032] The probe (130) is formed such that at least one end is fixed to the base unit (120), the other end contacts the die, and transmits an inspection signal. Specifically, a plurality of pads and / or terminals, etc., may be formed for each die to be inspected, and each of the plurality of probes (130) may contact and conduct current to each of the plurality of terminals and / or pads for each base unit (120) of the test socket (100) according to the present embodiment. For testing, the probe (130) may have a bent or folded shape such that a predetermined elastic deformation occurs due to a force applied while the die and the base unit (120) are in contact at both ends, and may be formed of an elastically deformable material.

[0033] The base unit (120) according to the present embodiment may include a glass substrate (121). The glass substrate (121) may be made of a glass material including, for example, borosilicate glass or soda lime glass. According to the embodiment, it may also be made of at least one of sapphire (Al2O3), silicon carbide (SiC), and quartz.

[0034] The glass substrate (121) of the base unit (120) according to the present embodiment may be provided with a via (121a) penetrating the glass substrate (121) in the thickness direction as a configuration for transmitting an inspection signal. That is, a through glass via (TGV, Through Glass Via) may be formed in the glass substrate (121) according to the present embodiment. The via (121a) may be formed by a laser-based process or a chemical process.

[0035] In this embodiment, the glass substrate (121) may further have a buried wiring (121b) formed to extend in the thickness direction by being embedded in a via (121a). The buried wiring (121b) is formed by filling a metal material into the via (121a) and can serve to transmit an inspection signal, which is an electrical signal, in the thickness direction of the glass substrate (121).

[0036] A test socket (100) having a glass substrate (121) according to the present embodiment can implement vias (121a) with an aspect ratio of 10:1 or greater through TGV technology. For example, vias (121a) with a diameter of 50 μm or less can be formed on a glass substrate (121) with a thickness of 0.5 to 1.0 mm, and the spacing between vias (121a) can be narrowed, so that it can correspond to a die having an integrated fine pitch.

[0037] In addition, since the glass substrate (121) can be subjected to semiconductor wafer processes (MEMS and semiconductor processes), test sockets (100) can be manufactured quickly in large quantities. For example, various processes such as polymer thin film coating, metal sputtering, and plating can be used, and the space conversion layer (122) and passive element (123) described later can be easily formed.

[0038] Furthermore, the glass substrate (121) can be manufactured with an appropriate coefficient of thermal expansion (CTE) corresponding to the thermal expansion characteristics of the semiconductor die. Therefore, the reliability of the test can be increased even in high and low temperature environments during testing, and there is an advantage of enabling precise alignment and resistance to thermal deformation for silicon-based packaging, such as HBM, for example. For example, the glass substrate (121) can be 3 to 8 ppmK -1 It can be manufactured to correspond to the thermal expansion characteristics of a die made of silicon or a die packaged with a polymer within the range of the coefficient of thermal expansion of the same.

[0039] In addition, in this embodiment, the glass substrate (121) may further be provided with surface wiring (121c) formed on at least one surface of the glass substrate (121), which is formed to be connected to at least one end of the buried wiring (121b). Although surface wiring (121c) formed on one side (bottom surface) of the glass substrate (121) is shown in FIG. 2, surface wiring (121c) may be formed on another side (top surface), and surface wiring (121c) may be formed on both sides (top surface and bottom surface) of the glass substrate (121).

[0040] The process of forming wiring on the surface of the glass substrate (121) can easily apply a semiconductor process, and the wiring can be formed uniformly due to the smooth surface characteristics of the glass substrate (121). That is, the surface wiring (121c) on the glass substrate (121) of the present embodiment can be formed more efficiently and precisely than forming wiring on an MLC-based layer.

[0041] Meanwhile, the base unit (120) may further be provided with a spatial conversion layer (122, RDL, Redistribution Layer). The spatial conversion layer (122) may be provided with a redistribution wiring (122a) that electrically connects a buried wiring (121b) embedded in a via (121a) and a probe (130) on the base unit (120).

[0042] A spatial conversion layer (122) can be placed between a probe (130) and a glass substrate (121). The spatial conversion layer (122) can connect the embedded wiring (121b) and the probe (130) to each other when the via (121a) or the embedded wiring (121b) and the probe (130) are placed at different positions in the thickness direction. That is, a change in pitch or adjustment of the pad position can be achieved by the spatial conversion layer (122) having an adjustment wiring (122a).

[0043] The space conversion layer (122) may be made of a polymer material, for example, and the adjustment wiring (122a) may be made of a conductive material, for example, copper or aluminum, etc. The adjustment wiring (122a) may be formed to penetrate the space conversion layer (122) or formed on at least one surface of the space conversion layer (122).

[0044] In addition, various spatial transformations may be implemented stepwise by stacking a plurality of spatial transformation layers (122), each equipped with a control wiring (122a), between the probe (130) and the glass substrate (121) in the thickness direction.

[0045] The test socket (100) according to the present embodiment includes a spatial conversion layer (122) so that the path of the test signal is rearranged to correspond to fine pitch and effectively process spatial conversion.

[0046] In addition, by optimizing the path of the inspection signal using a glass substrate (121) having vias (121a) and a spatial conversion layer (122), signal loss can be significantly reduced compared to the existing substrate structure. In particular, the feature of securing structural strength with the low dielectric constant and thin thickness of the glass substrate (121) can significantly improve insertion loss and reflection loss in high-speed signal transmission. For example, the relative dielectric constant of the glass is 4-6, which has an advantage in high-speed signal transmission compared to 10 of HTCC MLC and 5-7 of LTCC MLC.

[0047] The base unit (120) may further include a passive element (123). The passive element (123) may be placed on a glass substrate (121) and / or on a space conversion layer (122) and may perform conversion or processing of an inspection signal. The passive element (123) may be electrically connected to at least one of the buried wiring (121b) of the via (121a), the surface wiring (121c) of the via (121a), and the adjustment wiring (122a) of the space conversion layer (122).

[0048] The base unit (120) according to the present embodiment can easily integrate passive components (123) because the glass substrate (121) can be manufactured in a wafer shape. Accordingly, in addition to high-speed signal transmission, passive components (123), such as capacitors and resistors, can be easily added, allowing for various circuit configurations. Therefore, the testing and power supply stability of highly integrated semiconductor chips can be improved.

[0049] For example, power supply noise can be eliminated by placing a decoupling capacitor near the probe (130) in the test socket (100), and a stable power supply is possible through voltage compensation. That is, the power and ground plane can be placed close to the surface of the substrate, thereby minimizing power loops and providing excellent power stability even at high frequencies.

[0050] Referring again to FIG. 1, the base unit (120) and the printed circuit board (110) according to the present embodiment can be joined to each other by means of a solder portion (140). For example, the base unit (120) can be directly mounted on the printed circuit board (110) by Surface Mount Technology (SMT).

[0051] In this embodiment, a solder portion (140) is interposed between the printed circuit board (110) and the base unit (120) to secure an electrical connection. A solder portion (140) is applied at a location on the printed circuit board (110) where an electrical connection is required, and the base unit (120) is placed on the solder portion (140). Then, as the solder portion (140) melts due to heat and / or pressure, the base unit (120) can be fixed onto the printed circuit board (110).

[0052] By utilizing the SMT process according to the present embodiment, the base unit (120) can be efficiently attached to the printed circuit board (110). This simplifies the manufacturing process and structure, and shortens the length of the path of the inspection signal.

[0053] In addition, according to the present embodiment, by implementing a structure that minimizes physical contacts from the printed circuit board (110) to the probe (130) and connects them with metal wiring and bonding, superior electrical connection reliability compared to conventional boards can be obtained.

[0054] According to the direct bonding of the glass substrate (121) and the solder portion (140) according to the present embodiment, the complex interposer and housing required in the existing MLC (Multi-Layer Ceramic) and MLO (Multi-Layer Organic) substrate structures can be eliminated. Through this, the structure and manufacturing process of the test socket (100) can be simplified, and the overall manufacturing cost can be significantly reduced.

[0055] * Referring further to FIG. 3, it can be seen that a plurality of dies (10) are arranged on a base unit (120) and that a test is performed by a test socket (100) according to the present embodiment. The test socket (100) according to the present embodiment may further include a support unit that covers the test socket (100) and on which a plurality of dies (10) are fixed. In addition, in the present embodiment, a support member (150) may be arranged between a plurality of base units (120) on the printed circuit board (110) side. The support member (150) may serve as a partition between the base units (120), structural reinforcement of the printed circuit board (110), and a limit setting (stopper) when moving or pressing the dies (10) in the thickness direction during testing.

[0056] FIG. 4 is a cross-sectional view of a test socket (100) according to another embodiment of the present invention. Instead of the base unit (120) being directly mounted on the printed circuit board (110) in the above embodiment, the test socket (100) of this embodiment may further include an interposer (240).

[0057] An interposer (240) can be placed between a base unit (120) and a printed circuit board (110). The interposer (240) can electrically connect the base unit (120) and the printed circuit board (110) by providing intermediate wiring that connects the pads / terminals of the base unit (120) and the pads / terminals of the printed circuit board (110) to each other.

[0058] FIG. 5 is a flowchart of a method for manufacturing a test socket according to an embodiment of the present invention. FIG. 6 is a cross-sectional view of the manufacturing process of a test socket (100) according to an embodiment of the present invention.

[0059] Referring to FIG. 5, a method for manufacturing a test socket according to the present embodiment includes the steps of preparing a plurality of base units (S110), preparing a printed circuit board (S120), fixing the base units on the printed circuit board (S130), and fixing a probe to the base units (S140).

[0060] Referring to FIGS. 5 and 6 (a), the step of preparing a base unit (S110) includes the step (S111) of forming a via (121a, via) for transmitting an inspection signal through a glass substrate (121) in the thickness direction.

[0061] Referring to (b) of FIGS. 5 and 6, the step of preparing a base unit (S110) may further include the step (S112) of forming a buried wiring (121b) formed to extend in the thickness direction in a via (121a).

[0062] Referring to (c) of FIGS. 5 and 6, the step (S110) of preparing a base unit may further include the step (S113) of forming a surface wiring (121c) connected to at least one end of a buried wiring (121b) on at least one surface of a glass substrate (121).

[0063] Additionally, the step of preparing the base unit (S110) may further include the step of forming a spatial conversion layer (S115). The spatial conversion layer (122) may be formed to be placed on a glass substrate (121). The spatial conversion layer (122) may have an adjustment wiring (122a) that electrically connects the buried wiring (121b) embedded in the via (121a) and the probe (130) to each other.

[0064] The step (S115) of forming a space conversion layer may be to form a control wiring (122a) that penetrates the space conversion layer (122) made of a polymer material, or to form a control wiring (122a) on at least one surface of the space conversion layer (122).

[0065] Furthermore, the step of preparing the base unit (S110) may further include the step of forming a passive element (123). The passive element (123) may be placed on a glass substrate (121) and connected to an embedded wiring (121b) to perform conversion or processing of an inspection signal.

[0066] In the step of preparing a printed circuit board (S120), a printed circuit board (110) configured to generate or control an inspection signal can be manufactured.

[0067] In the step (S130) of fixing base units on a printed circuit board, a plurality of base units (120) can be arranged and fixed to correspond to the positions on the printed circuit board (110) where a plurality of dies are to be placed.

[0068] As shown in one embodiment of the test socket (100) described above and (d) of FIG. 6, in the step (S130) of fixing a plurality of base units, the base unit (120) and the printed circuit board (110) can be joined together by means of a solder portion (140).

[0069] Alternatively, as in another embodiment of the test socket (100) described above in FIG. 4, in the step (S130) of fixing a plurality of base units, an interposer (240) that electrically connects the base unit (120) and the printed circuit board (110) can be placed between the base unit (120) and the printed circuit board (110).

[0070] As shown in FIG. 6(e), in the step (S140) of fixing the probe to the base unit, at least one end of a plurality of probes (130) formed to contact the die and transmit an inspection signal may be fixed to the base unit (120). For example, a path may be formed in which an inspection signal is directly transmitted from the probe (130) to the printed circuit board (110) through the adjustment wiring (122a) of the space conversion layer (122), the surface wiring (121c) and the buried wiring (121b) of the glass substrate (121).

[0071] FIGS. 7a to 7c are drawings comparing the high-speed signal transmission characteristics of a test socket according to one embodiment of the present invention.

[0072] Referring to FIGS. 7a to 7c, the improvement effect resulting from the low dielectric constant of the glass substrate and the shortened path length of the test signal in the test socket according to the present invention can be confirmed. Compared to the conventional MLC and interposer structure (HTCC: path length of 5 to 6 mm), it can be confirmed that the insertion loss and reflection loss are improved during high-speed signal transmission in this embodiment (Glass 0.7T: path length of 1.2 mm or less) by SMT coupling of the glass substrate.

[0073] FIGS. 8a and 8b are drawings comparing the power stability characteristics of a test socket according to one embodiment of the present invention.

[0074] Referring to FIGS. 8a and 8b, it can be seen that power stability is improved by minimizing the loop length by placing a decoupling capacitor as a passive component in the test socket according to the present invention close to the probe. In particular, it can be seen that power stability at high frequencies is significantly improved when using glass with a thickness of 0.7 mm (Glass 0.7T).

[0075] The foregoing description of the present invention is for illustrative purposes only, and those skilled in the art will understand that other specific forms can be easily modified without altering the technical spirit or essential features of the present invention. Therefore, the embodiments described above should be understood as illustrative in all respects and not restrictive. For example, each component described as a single unit may be implemented in a distributed manner, and components described as distributed may likewise be implemented in a combined form.

[0076] The scope of the present invention is defined by the claims set forth below rather than by the detailed description above, and all modifications or variations derived from the meaning and scope of the claims and equivalent concepts thereof should be interpreted as being included within the scope of the present invention.

[0077] [Explanation of Symbol] 10: die

[0078] 100: Test socket

[0079] 110: Printed circuit board

[0080] 120: Bass unit

[0081] 121: Glass substrate

[0082] 121a: via

[0083] 121b: Embedded wiring

[0084] 121c: Surface wiring

[0085] 122: Spatial Transformation Layer

[0086] 122a: Adjustment wiring

[0087] 123: Passive component

[0088] 130: Probe

[0089] 140: Solder part

[0090] 150: Support member

[0091] 240: Interposer

Claims

1. In a test socket for testing multiple dies, A printed circuit board configured to generate or control a test signal; A plurality of base units disposed on the printed circuit board above to correspond to positions for disposing of the plurality of dies; and It includes a plurality of probes, each having at least one end fixed to the base unit and the other end in contact with the die to transmit the inspection signal. The above base unit is a test socket comprising a glass substrate formed such that a via for transmitting the test signal penetrates in the thickness direction.

2. In Paragraph 1, The above base unit is, A test socket further comprising a spatial conversion layer disposed on the glass substrate and having a regulating wire that electrically connects the embedded wiring embedded in the via and the probe to each other.

3. In Paragraph 1 or 2, The above base unit is, A test socket further comprising a passive component disposed on the glass substrate and configured to perform conversion or processing of the test signal by being connected to an embedded wiring embedded in the via.

4. In Paragraph 1, The above glass substrate is, Embedded wiring formed to be embedded in the above via and extend in the thickness direction; and A test socket further comprising surface wiring formed to be connected to at least one end of the buried wiring and formed on at least one surface of the glass substrate.

5. In Paragraph 1, A test socket in which the base unit and the printed circuit board are joined together via a solder joint.

6. In Paragraph 1, A test socket further comprising an interposer disposed between the base unit and the printed circuit board and configured to electrically connect the base unit and the printed circuit board to each other.

7. In Paragraph 2, A test socket in which the above adjustment wiring is formed to penetrate the space conversion layer made of a polymer material or is formed on at least one surface of the space conversion layer.

8. A method for manufacturing a test socket for inspecting multiple dies, Step of preparing multiple base units; A step of preparing a printed circuit board configured to generate or control a test signal; A step of fixing the plurality of base units on the printed circuit board so as to correspond to the positions where the plurality of dies are to be placed; and The method includes the step of fixing at least one end of a plurality of probes formed to contact the die and transmit the inspection signal to the base unit, and A method for manufacturing a test socket, wherein the step of preparing the base unit includes the step of forming a via for transmitting the test signal to penetrate the glass substrate in the thickness direction.

9. In Paragraph 8, The step of preparing the above base unit is, A method for manufacturing a test socket, further comprising the step of forming a spatial conversion layer disposed on the glass substrate and having a fixing wire that electrically connects the buried wiring embedded in the via and the probe to each other.

10. In Paragraph 8 or 9, The step of preparing the above base unit is, A method for manufacturing a test socket, further comprising the step of forming a passive component disposed on the glass substrate and configured to perform conversion or processing of the test signal by being connected to a buried wiring embedded in the via.

11. In Paragraph 8, The step of preparing the above base unit is, A step of forming a buried wiring formed to extend in the thickness direction in the above via; and A method for manufacturing a test socket, further comprising the step of forming surface wiring connected to at least one end of the buried wiring on at least one surface of the glass substrate.

12. In Paragraph 8, A method for manufacturing a test socket, wherein the step of fixing the plurality of base units is to combine the base units and the printed circuit board with each other through a solder joint.

13. In Paragraph 8, A method for manufacturing a test socket, wherein the step of fixing the plurality of base units is to place an interposer between the base units and the printed circuit board to electrically connect the base units and the printed circuit board.

14. In Paragraph 9, A method for manufacturing a test socket, wherein the step of forming the space conversion layer is to form the adjustment wiring so as to penetrate the space conversion layer made of a polymer material, or to form the adjustment wiring on at least one surface of the space conversion layer.

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