Two-inhibitor scheme for selective fi LM deposition

Abstract

Implementations of the present disclosure generally relate to the selective deposition of barrier layers on dielectric materials. More particularly, implementations described herein provide a method to selectively deposit a barrier layer on an Al-containing dielectric material over a metal material. In at least one implementation, a process for selectively depositing a barrier layer is provided and includes selectively depositing a first inhibitor on a substrate comprising an Al-containing dielectric material, a Si-containing dielectric material, and a metal material, where the first inhibitor is selectively deposited on the Al-containing dielectric material of the substrate, depositing a second inhibitor on the metal material of the substrate, removing the first inhibitor to expose the Al-containing dielectric material, and depositing the barrier layer on the exposed Al-containing dielectric material and the Si-containing dielectric material.

Description

TWO-INHIBITOR SCHEME FOR SELECTIVE Fl LM DEPOSITION BACKGROUNDField

[0001] The present disclosure generally relates to manufacturing interconnect structures in the manufacture of microelectronic devices, and, more particularly, relates to the selective deposition of barrier layers on dielectric materials.Description of the Related Art

[0002] As the structure size of integrated circuit (IC) devices is scaled down to subquarter micron dimensions, electrical resistance and current densities have become an area for concern and improvement. Multilevel interconnect technology provides the conductive paths throughout an IC device, and are formed in high aspect ratio features, including contacts, plugs, vias, lines, wires, and other features. A typical process for forming an interconnect on a substrate includes depositing one or more layers, etching at least one of the layer(s) to form one or more features, depositing a barrier layer in the feature(s) and depositing one or more layers to fill the feature. Typically, a feature is formed within a dielectric material disposed between a lower conductive layer and an upper conductive layer. The interconnect is formed within the feature to link the upper and lower conductive layers. Reliable formation of these interconnect features is important to the production of the circuits and continued effort to increase circuit density and quality on individual substrates and die.

[0003] Copper is often a metal of choice for filling sub-micron high aspect ratio, interconnect features because copper and its alloys have lower resistivities than aluminum. However, copper diffuses more readily into surrounding materials and can alter the electronic device characteristics of the adjacent layers and, for example, form a conductive path between layers, thereby reducing the reliability of the overall circuit and may even result in device failure.

[0004] Barrier layers therefore, are deposited prior to copper metallization to prevent or impede the diffusion of copper atoms. Barrier layers typically contain a metal such as tungsten, titanium, tantalum, and nitrides thereof, which all have a greater resistivity than copper. To deposit a barrier layer within a feature, the barrier layer must be deposited on the bottom of the feature as well as the sidewalls thereof.Therefore, the additional amount of the barrier layer on the bottom of the feature not only increases the overall resistance of the feature, but also forms an obstruction between higher and lower metal interconnects of a multi-layered interconnect structure. It is desirable to form barrier layers that do not obstruct the higher and lower metal interconnects of a multi-layered interconnect structure so as to improve the electrical resistance of the formed structure.

[0005] There is a need, therefore, for an improved method for forming barrier layers in metal interconnect structures.SUMMARY

[0006] Implementations of the present disclosure generally relate to manufacturing interconnect structures in the manufacture of microelectronic devices, and, more particularly, relates to the selective deposition of barrier layers on dielectric materials.

[0007] In at least one implementation, a process for selectively depositing a barrier layer is provided and includes selectively depositing a first inhibitor on a substrate comprising an aluminum (Al)-containing dielectric material, a silicon (Si)-containing dielectric material, and a metal material, where the first inhibitor is selectively deposited on the Al-containing dielectric material of the substrate, depositing a second inhibitor on the metal material of the substrate, removing the first inhibitor to expose the Al-containing dielectric material, and depositing the barrier layer on the exposed Al-containing dielectric material and the Si-containing dielectric material.

[0008] In at least one implementation, a process for depositing a bottomless barrier layer is provided and includes providing a substrate comprising a via disposed through a Si-containing dielectric material and an Al-containing dielectric material, and a metal material disposed at a bottom of the via, selectively depositing a first inhibitor on the Al-containing dielectric material within the via of the substrate, depositing a second inhibitor on the metal material of the substrate, removing the first inhibitor to expose the Al-containing dielectric material, and depositing a barrier layer comprising tantalum nitride on the exposed Al-containing dielectric material and the Si-containing dielectric material.

[0009] In at least one implementation, a process for selectively depositing a barrier layer is provided and includes selectively depositing a first inhibitor on a substrateincluding an aluminum (Al)-containing dielectric material and a metal material, where the first inhibitor is selectively deposited on the Al-containing dielectric material of the substrate and the first inhibitor is a mid-chain alcohol having 3 to 6 carbons, depositing a second inhibitor on the metal material of the substrate, removing the first inhibitor to expose the Al-containing dielectric material, and depositing a barrier layer on the exposed Al-containing dielectric material.BRIEF DESCRIPTION OF THE DRAWINGS

[0010] So that the manner in which the above recited features of the disclosure can be understood in detail, a more particular description of the disclosure, briefly summarized above, may be had by reference to implementations, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only typical implementations of this disclosure and are therefore not to be considered limiting of scope, for the disclosure may admit to other equally effective implementations.

[0011] Figure 1 is a schematic block diagram of a deposition process, according to one or more implementations described herein.

[0012] Figure 2A is a portion of a substrate, according to one or more implementations described herein.

[0013] Figure 2B is a portion of a substrate after the deposition of a first inhibitor, according to one or more implementations described herein.

[0014] Figure 2C is a portion of a substrate after the deposition of a second inhibitor, according to one or more implementations described herein.

[0015] Figure 2D is a portion of a substrate after the removal of a first inhibitor, according to one or more implementations described herein.

[0016] Figure 2E is a portion of a substrate with a barrier layer, according to one or more implementations described herein.

[0017] To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the Figures. It iscontemplated that elements and features of one implementation may be beneficially incorporated in other implementations without further recitation.DETAILED DESCRIPTION

[0018] Implementations of the present disclosure generally relate to the selective deposition of barrier layers on dielectric materials. More particularly, implementations described herein provide a method to selectively deposit a barrier layer or liner on an aluminum (Al)-containing dielectric material over a metal material. It has been discovered that a barrier layer or liner may be deposited on an Al-containing dielectric material without deposition on a metal material using the two inhibitor method disclosed herein. In at least some implementations, the disclosed two inhibitor method is used to form a bottomless barrier layer or liner for metal interconnect structures. For example, in at least some implementations, a first inhibitor is selectively deposited on an Al-containing dielectric material and a second inhibitor is then deposited on an exposed metal material. The first inhibitor is then removed and a barrier layer or liner is deposited on the Al-containing dielectric material.

[0019] Bottomless barrier layers may be used in the via of metal interconnect structures to improve the connection between higher and lower metal interconnects, as there is no obstruction between the metal of the interconnects and the metal fill of the connecting via. A bottomless barrier layer may be deposited in a via by blocking the metal disposed within the via with an inhibitor. An inhibitor is a compound that can be used to form a blocking layer on a surface to suppress or prevent subsequent deposition on that surface. Numerus inhibitors exist for blocking barrier layer deposition on metals, however the available inhibitors often inhibit and block Al-containing dielectric materials used in etch stop layers as well as the metal, preventing barrier layer deposition on the Al-containing dielectric material, creating a failure point for the device. Implementations described herein provide a method that blocks a metal for the deposition of a bottomless barrier layer without blocking the Al-containing dielectric material of a stop layer. Advantageously, the inhibitors of the present disclosure are useful in selective barrier applications and / or selective liner applications.

[0020] Figure 1 is a schematic block diagram of a deposition process, in accordance with some implementations. In the process 100, a bottomless barrier layer214 is deposited on a substrate, such as the substrate 200 depicted in Figure 2A. In at least some implementations, the process 100 includes depositing a first inhibitor at operation 102, depositing a second inhibitor at operation 104, removing the first inhibitor at operation 106, and depositing a barrier layer at operation 108. In the discussion of the process 100, references will be made to the views of Figures 2A-2E.

[0021] Figure 2A depicts a portion of a substrate 200, in accordance with some implementations. The substrate 200 includes a metal material 202 separated from a silicon (Si)-containing dielectric material 206 by a liner 216. The metal material 202 can be any suitable material deposited by any suitable technique. In at least some implementations, the metal material 202 includes molybdenum (Mo), tungsten (W), copper (Cu), cobalt (Co), ruthenium (Ru), or any combination thereof.

[0022] A dielectric material 201 is disposed on the metal material 202. The dielectric material 201 includes a multilayer structure having a layer of a Si-containing dielectric material 206 disposed on a layer of an Al-containing dielectric material 208, that is disposed on the metal material 202. In at least some implementations, the Al-containing dielectric material 208 is an etch stop layer. The Al-containing dielectric material 208 may include aluminum nitride (AINx), aluminum oxide (AIOx), aluminum silicon oxide (AlxSiyOz), or any combination thereof. In at least some implementations, the Al-containing dielectric material 208 is AINx. The Si-containing dielectric material 206 may include silicon dioxide (SiC>2), silicon oxycarbide (SiOxCy), silicon nitride (SiNx), silicon nitride carbide (SiNxCy), silicon oxycarbide nitride (SiOxCyNz), silicon oxynitride (SiOxNy) or any combination thereof. In at least some implementations, the Si-containing dielectric material 206 is SiOxCy.

[0023] A via 204 is disposed through the dielectric material 201 , extending through the Si-containing dielectric material 206 and the Al-containing dielectric material 208 to the metal material 202. The via 204 exposes a top surface 203 of the metal material 202. The top surface 203 of the metal material 202 forms the bottom surface of the via. The via 204 is bounded by the sidewalls 205 of the Al-containing dielectric material 208 and the sidewall 207 of the Si-containing dielectric material 206. In at least some implementations, the via 204 connects metal lines.

[0024] At operation 102, a first inhibitor 210 is deposited on the substrate 200, as depicted in Figure 2B. The first inhibitor 210 is selectively deposited on the Al-containing dielectric material 208 of the substrate 200. As used in herein, the phrase "selectively", or similar, means that the subject material is deposited on the stated surface to a greater extent than on another surface. In some implementations, "selectively" means that the subject material forms on the selective surface at a rate greater than or equal to 10x, 15x, 20x, 25x, 30x, 35x, 40x, 45x or 50x the rate of formation on the non-selected surface. In at least some implementations, the first inhibitor may include an alcohol, an aldehyde, a ketone, an ether, a carboxylic acid, an ether, an aluminum alkoxide, or combinations thereof.

[0025] In at least some implementations, the first inhibitor 210 includes an alcohol having an R group represented by Formula (I):R-OH (I),where R of Formula (I) may be a linear C1-C18 alkyl group, a branched C1-C18 alkyl group, or an aryl group. For example, in at least some implementations, the first inhibitor 210 is isopropanol, 1 -propanol, 2-methyl-3-butenol, tert-butanol, butane-2-ol, or combinations thereof. In at least some implementations, R of Formula (I) may be a short-chain alkyl group having 1 to 2 carbons, a mid-chain alkyl group having 3 to 6 carbons, or a long-chain alkyl group having greater than 6 carbons.

[0026] In at least some implementations, the first inhibitor 210 includes an ether represented by Formula (II):R1-O-R2 (II),where each of R1 and R2 of Formula (II) may independently be a linear C1-C18 alkyl group, a branched C1-C18 alkyl group, or an aryl group.

[0027] In at least some implementations, the first inhibitor 210 includes an aldehyde or a ketone represented by Formula (III):R=O (III),where R of Formula (III) may be a linear C1-C18 alkyl group, a branched C1-C18 alkyl group, or an aryl group.

[0028] In at least some implementations, the first inhibitor 210 includes an aluminum alkoxide represented by Formula (IV):AI(OR)3 (IV),where each R of Formula (IV) may independently be a linear C1-C18 alkyl group, a branched C1-C18 alkyl group, or an aryl group.

[0029] In some implementations, the first inhibitor 210 is a tertiary amine. In such implementations, the first inhibitor 210 is deposited on both the metal material 202 and the Al-containing dielectric material 208, and is selectively removed over the metal before operation 104. The tertiary amine first inhibitor may be selectively removed over the metal due to the bonding difference between the metal and the Al-containing dielectric.

[0030] In at least some implementations, the first inhibitor 210 may be introduced into a processing volume while maintaining a pressure of about 0.1 Torr to about 100 Torr and a temperature of about 50 °C to about 400 °C. In at least some implementations, the processing volume may be maintained at a pressure of about 0.1 Torr to about 100 Torr, such as about 0.1 Torr to about 10 Torr, about 0.1 Torr to about 25 Torr, about 0.1 Torr to about 50 Torr, about 0.1 Torr to about 75 Torr, about 1 Torr to about 100 Torr, about 1 Torr to about 50 Torr, about 1 Torr to about 25 Torr, about 1 Torr to about 10 Torr, about 1 Torr to about 5 Torr, about 1 Torr to about 3 Torr, or about 50 Torr to about 100 Torr. In at least some implementations, the processing volume may be maintained at a temperature of about 100 °C to about 350 °C, such as about 100 °C to about 300 °C, about 100 °C to about 200 °C, about 100 °C to about 150 °C, about 150 °C to about 350 °C, about 150 °C to about 300 °C, or about 150 °C to about 200 °C. In at least some implementations, a temperature of about 150 °C to about 200 °C may be used to promote better adsorption of the first inhibitor 210 to the Al-containing dielectric material 208.

[0031] In at least some implementations, the substrate 200 may be exposed to the first inhibitor for about 1 second (s) to about 60 minutes (min), such as about 1 min toabout 60 min, about 5 min to about 50 min, about 10 min to about 50 min, about 10 min to about 40 min, about 10 min to about 30 min, about 1 min to about 20 min, about 1 s to about 10 min, about 1 s to about 5 min, or about 1 s to about 1 min. In at least some implementations, a carrier gas, such as argon (Ar), helium (He), nitrogen (N2), xenon (Xe), or combinations thereof may be supplied with the first inhibitor and / or following providing the first inhibitor. The carrier gas may be introduced into the processing volume at a flow rate of about 0 seem to about 2,000 seem, such as about 1 seem to about 2,000 seem, about 10 seem to about 2,000 seem, about 20 seem to about 2,000 seem, about 50 seem to about 2,000 seem, about 100 seem to about 2,000 seem, about 200 seem to about 2,000 seem, about 500 seem to about 2,000 seem, or about 1 ,000 seem to about 2,000 seem.

[0032] For example, in one or more implementations, the first inhibitor 210 is a midchain alcohol of Formula (I), and is provided into a processing volume to reach a pressure of about 1 Torr to about 3 Torr for a static soak. The substrate 200 is exposed to the first inhibitor 210 for about 1 s to about 1 min while the processing volume is maintained at a temperature of about 150 °C to about 350 °C.

[0033] At operation 104, a second inhibitor 212 is deposited on the substrate 200. The second inhibitor 212 is selectively deposited on the metal material 202, as depicted in figure 2C. In at least some implementations, the first inhibitor 210 blocks the deposition of the second inhibitor on the Al-containing dielectric material 208. The second inhibitor 212 is selective against the Si-containing dielectric material 206 (e.g. the second inhibitor 212 does not bind to the Si-containing dielectric material 206 due to inherent selectivity). Advantageously, the first inhibitor 210 blocking the Al-containing dielectric material 208, allows inhibitors that would otherwise bind to Al-containing dielectric materials to be used as the second inhibitor without sacrificing metal selectivity. In at least some implementations, the second inhibitor 212 may include long chain alkyl compounds having reactive groups that may selective react with metal materials, or metal containing materials.

[0034] In at least some implementations, the second inhibitor 212 may include a primary amine, a secondary amine, a tertiary amine, or combinations thereof having one to three R groups, where each of the one to three R groups may independently be hydrogen, a linear C1-C16 alkyl group, a branched C1-C16 alkyl group, an aryl group,or a cyclic group. For example, the second inhibitor 212 may include a nitrile / cyano, an isonitrile / isocyano, a pyrazole, a pyridine, a triazole, a pyrrolidine, a pyrrole, a piperidine, an N-heterocyclic carbene, or combinations thereof. In at least some implementations, the second inhibitor 212 may include a structure of any Formula (V) through Formula (XI).

[0035] In at least some implementations, the second inhibitor 212 may include an alkyne or an alkene having two to four R groups, where each of the one to four R groups may independently be hydrogen, a linear C1-C16 alkyl group, a branched C1-C16 alkyl group, an aryl group, or a cyclic group. For example, in at least some implementations, the second inhibitor 212 may include a structure of any Formula (XII) through Formula (XIX).

[0036] In at least some implementations, the second inhibitor 212 may include an alcohol, an aldehyde, a ketone, an ether, a carboxylic acid, an ester, or combinations thereof having one to two R groups, where each of the one two R groups may independently be hydrogen, a linear C1-C16 alkyl group, a branched C1-C16 alkyl group, an aryl group, or a cyclic group. In such implementations, the second inhibitor 212 is different than the first inhibitor 210, allowing the first inhibitor 210 to be selectively removed from the Al-containing dielectric material at operation 106 without exposing the metal material 202.

[0037] In at least some implementations, the second inhibitor 212 may be introduced into a processing volume while maintaining a pressure of about 0.1 Torr to about 100 Torr and a temperature of about 50 °C to about 400 °C. In at least some implementations, the processing volume may be maintained at a pressure of about 0.1 Torr to about 100 Torr, such as about 0.1 Torr to about 10 Torr, about 0.1 Torr to about 25 Torr, about 0.1 Torr to about 50 Torr, about 0.1 Torr to about 75 Torr, about 1 Torr to about 100 Torr, about 1 Torr to about 50 Torr, about 1 Torr to about 25 Torr, about 1 Torr to about 10 Torr, about 1 Torr to about 5 Torr, about 1 Torr to about 3 Torr, or about 50 Torr to about 100 Torr. In at least some implementations, the processing volume may be maintained at a temperature of about 50 °C to about 350 °C, such as about 50 °C to about 300 °C, about 50 °C to about 200 °C, about 50 °C to about 100 °C, about 100 °C to about 350 °C, about 100 °C to about 300 °C, about 150 °C to about 350 °C, or about 100 °C to about 200 °C.

[0038] In at least some implementations, the substrate 200 may be exposed to the second inhibitor 212 for about 1 second (s) to about 60 minutes (min), such as about 1 min to about 60 min, about 5 min to about 50 min, about 10 min to about 50 min, about 10 min to about 40 min, about 10 min to about 30 min, about 1 min to about 20 min, about 1 s to about 10 min, about 1 s to about 5 min, or about 1 s to about 1 min. In at least some implementations, a carrier gas, such as Ar, He, N2, Xe, or combinations thereof may be supplied with the second inhibitor 212 and / or following providing the second inhibitor 212. The carrier gas may be introduced into the processing volume at a flow rate of about 0 seem to about 2,000 seem, such as about 1 seem to about 2,000 seem, about 10 seem to about 2,000 seem, about 20 seem to about 2,000 seem, about 50 seem to about 2,000 seem, about 100 seem to about 2,000 seem, about 200 seem to about 2,000 seem, about 500 seem to about 2,000 seem, or about 1 ,000 seem to about 2,000 seem.

[0039] At operation 106, the first inhibitor 210 is removed, exposing the Al-containing dielectric material 208, as depicted in Figure 2D. In at least some implementations, the first inhibitor 210 is removed using a thermal treatment. In such implementations, the substrate 200 may be introduced into a processing volume while maintaining a pressure of about 0.1 Torr to about 100 Torr and a temperature of about 50 °C to about 400 °C. The substrate 200 may be heated for about 1 second (s) to about 60 minutes (min). An inert gas, such as Ar, He, N2, Xe, or combinations thereof, may be supplied while heating the substrate 200.

[0040] In at least some implementations, during the thermal treatment the processing volume may be maintained at a pressure of about 0.1 Torr to about 100 Torr, such as about 0.1 Torr to about 10 Torr, about 0.1 Torr to about 25 Torr, about 0.1 Torr to about 50 Torr, about 0.1 Torr to about 75 Torr, about 1 Torr to about 100 Torr, about 1 Torr to about 50 Torr, about 1 Torr to about 25 Torr, about 1 Torr to about 10 Torr, about 1 Torr to about 5 Torr, about 1 Torr to about 3 Torr, or about 50 Torr to about 100 Torr. In at least some implementations, the processing volume may be maintained at a temperature of about 50 °C to about 350 °C, such as about 50 °C to about 300 °C, about 50 °C to about 200 °C, about 50 °C to about 100 °C, about 100 °C to about 350 °C, about 100 °C to about 300 °C, or about 100 °C to about 200 °C. In at least some implementations, the substrate 200 may be heated for about 1 second(s) to about 60 minutes (min), such as about 1 min to about 60 min, about 5 min to about 50 min, about 10 min to about 50 min, about 10 min to about 40 min, about 10 min to about 30 min, about 1 min to about 20 min, about 1 s to about 10 min, about 1 s to about 5 min, or about 1 s to about 1 min. In at least some implementations, the inert gas may be introduced into the processing volume at a flow rate of about 0 seem to about 2,000 seem, such as about 1 seem to about 2,000 seem, about 10 seem to about 2,000 seem, about 20 seem to about 2,000 seem, about 50 seem to about 2,000 seem, about 100 seem to about 2,000 seem, about 200 seem to about 2,000 seem, about 500 seem to about 2,000 seem, or about 1 ,000 seem to about 2,000 seem.

[0041] In at least some implementations, the first inhibitor 210 is removed using a gas anneal and or soak. In such implementations, a soaking gas, such as ammonia (NH3), hydrogen (H2), nitrogen (N2), helium (He), argon (Ar), water, or combinations thereof, may be introduced into a processing volume while maintaining a pressure of about 0.1 Torr to about 100 Torr and a temperature of about 50 °C to about 400 °C. The substrate 200 may be exposed to the soaking gas for about 1 second (s) to about 60 minutes (min).

[0042] In at least some implementations, the soaking gas may be introduced into the processing volume at a flow rate of about 0 seem to about 2,000 seem, such as about 1 seem to about 2,000 seem, about 10 seem to about 2,000 seem, about 20 seem to about 2,000 seem, about 50 seem to about 2,000 seem, about 100 seem to about 2,000 seem, about 200 seem to about 2,000 seem, about 500 seem to about 2,000 seem, or about 1,000 seem to about 2,000 seem. In at least some implementations, the processing volume may be maintained at a pressure of about 0.1 Torr to about 100 Torr, such as about 0.1 Torr to about 10 Torr, about 0.1 Torr to about 25 Torr, about 0.1 Torr to about 50 Torr, about 0.1 Torr to about 75 Torr, about 1 Torr to about 100 Torr, about 1 Torr to about 50 Torr, about 1 Torr to about 25 Torr, about 1 Torr to about 10 Torr, about 1 Torr to about 5 Torr, about 1 Torr to about 3 Torr, or about 50 Torr to about 100 Torr. In at least some implementations, the processing volume may be maintained at a temperature of about 50 °C to about 350 °C, such as about 50 °C to about 300 °C, about 50 °C to about 200 °C, about 50 °C to about 100 °C, about 100 °C to about 350 °C, about 100 °C to about 300 °C, about 250 °C to about 350 °C, or about 100 °C to about 200 °C.

[0043] In at least some implementations, the substrate 200 may be exposed to the soaking gas for about 1 min to about 60 min, about 5 min to about 50 min, about 10 min to about 50 min, about 10 min to about 40 min, about 10 min to about 30 min, about 1 min to about 20 min, about 1 s to about 10 min, about 1 s to about 5 min, or about 1 s to about 1 min. In at least some implementations, a carrier gas, such as Ar, He, N2, Xe, or combinations thereof may be supplied with the soaking gas and / or following providing the soaking gas. The carrier gas may be introduced into the processing volume at a flow rate of about 0 seem to about 2,000 seem, such as about 1 seem to about 2,000 seem, about 10 seem to about 2,000 seem, about 20 seem to about 2,000 seem, about 50 seem to about 2,000 seem, about 100 seem to about 2,000 seem, about 200 seem to about 2,000 seem, about 500 seem to about 2,000 seem, or about 1 ,000 seem to about 2,000 seem.

[0044] For example, in one or more implementations, the first inhibitor 210 is a midchain alcohol of Formula (I), and is removed using an H2 and / or NH3 anneal. The H2 and / or NH3 anneal includes continuously flowing H2 (or NH3) into a processing volume while maintaining a pressure of about 1 Torr to about 3 Torr and a temperature of about 200 °C to about 350 °C for about 1 min to about 10 min. As a non-limiting example, in at least some implementations, when a mid-chain alcohol of Formula (I), such as 1 -propanol, is used as the first inhibitor 210, about 80% to about 90% of the first inhibitor 210 may be removed using a 5 min H2 anneal at a temperature of about 300 °C to about 350 °C and a pressure of about 1 Torr to about 3 Torr. In other implementations, about 70% to about 80% of the first inhibitor 210 may be removed using a 5 min NH3 anneal at a temperature of about 200 °C to about 250 °C and a pressure of about 1 Torr to about 3 Torr. In yet other implementations, about 90% or greater of the first inhibitor 210 may be removed using a 5 min NH3 anneal at a temperature of about 300 °C to about 350 °C and a pressure of about 1 Torr to about 3 Torr. Residual first inhibitor 210 does not affect the deposition of the barrier layer 214 in subsequent operations, as the first inhibitor 210 may be removed by reacting with the organometallic compounds used to deposit the barrier layer 214.

[0045] At operation 108, a barrier layer 214 is deposited on the dielectric material 201 on at least the inner sidewalls of the via 204, as depicted in Figure 2E. The barrier layer 214 is deposited on both the Si-containing dielectric material 206 and the Al-containing material 208 exposed at operation 106. The deposition process of operation 108 may include an Atomic Layer Deposition (ALD) or Chemical Vapor Deposition (CVD) deposition process in which a precursor gas (e.g., metal containing precursor gas) and carrier gas (e.g., He, H2, Ar, or N2) are provided to the surface of the substrate disposed in a processing chamber. In at least some implementations, the barrier layer 214 may be formed of tantalum nitride (TaN) or doped tantalum nitride (TaN), metal doped TaN, titanium nitride (TiN), tungsten nitride (WN), tungsten nitride carbide (WCN), or combinations thereof. The barrier layer 214 may have a thickness of about 10 A to about 20 A, such as about 15 A.

[0046] For example, in one or more implementations, the barrier layer 214 is deposited using a CVD process that includes providing a metal containing precursor gas, such as pentakis dimethylamino tantalum (PDMAT), into a processing volume to reach a pressure of about 1 Torr to about 3 Torr. The substrate 200 is exposed to the metal containing precursor gas for about 1 s to about 10 s while the processing volume is maintained at a temperature of about 150 °C to about 350 °C.

[0047] In at least some implementations, operation 106 and 108 are performed simultaneously. The first inhibitor 210 may react with organometallic compounds, such as the metal containing precursor gas, allowing the barrier layer 214 to be deposited on the Al-containing dielectric layer without an inhibitor removal process.

[0048] Over all, the present disclosure provides a method to selectively deposit a barrier layer or liner on an aluminum (Al)-containing dielectric material over a metal material. The processes generally include selectively depositing a first inhibitor is on an Al-containing dielectric material, then depositing a second inhibitor is on an exposed metal material, removing the first inhibitor, and depositing a barrier layer on the Al-containing dielectric material. The disclosed method provides a bottomless barrier layer for improving the connection between higher and lower metal interconnects of a multi-layered interconnect structure.

[0049] While the foregoing is directed to implementations of the present disclosure, other and further implementations of the disclosure may be devised without departing from the basic scope thereof. The present disclosure also contemplates that one or more aspects of the implementations described herein may be substituted in for oneor more of the other aspects described. The scope of the disclosure is determined by the claims that follow.

[0050] Certain implementations and features have been described using a set of numerical upper limits and a set of numerical lower limits. It should be appreciated that ranges including the combination of any two values, e.g., the combination of any lower value with any upper value, the combination of any two lower values, and / or the combination of any two upper values are contemplated unless otherwise indicated. Certain lower limits, upper limits and ranges appear in one or more claims below.

Claims

What is claimed is:

1. A process for selectively depositing a barrier layer, comprising:selectively depositing a first inhibitor on a substrate comprising an aluminum (Al)-containing dielectric material, a silicon (Si)-containing dielectric material, and a metal material, wherein the first inhibitor is selectively deposited on the Al-containing dielectric material of the substrate;depositing a second inhibitor on the metal material of the substrate; removing the first inhibitor to expose the Al-containing dielectric material; and depositing a barrier layer on the exposed Al-containing dielectric material and the Si-containing dielectric material.

2. The process of claim 1 , wherein the Si-containing dielectric material comprises silicon dioxide (SiC>2), silicon oxycarbide (SiOxCy), silicon nitride (SiNx), silicon nitride carbide (SiNxCy), silicon oxycarbide nitride (SiOxCyNz), silicon oxynitride (SiOxNy) or any combination thereof.

3. The process of claim 1 , wherein the Al-containing dielectric material comprises aluminum nitride (AINx), aluminum oxide (AIOx), aluminum silicon oxide (AlxSiyOz), or any combination thereof.

4. The process of claim 1 , wherein the metal material comprises Mo, W, Cu, Co, Ru, or any combination thereof.

5. The process of claim 1, wherein the first inhibitor comprises an alcohol, an aldehyde, a ketone, an ether, a carboxylic acid, an ester, an aluminum alkoxide, or any combinations thereof.

6. The process of claim 1, wherein the first inhibitor comprises an alcohol having an R group comprising a linear C1-C18 alkyl group, a branched C1-C18 alkyl group, or an aryl group.

7. The process of claim 1, wherein the first inhibitor comprises isopropanol, 1-propanol, 2-methyl-3-butenol, tert-butanol, butane-2-ol, or combinations thereof.

8. The process of claim 1, wherein the second inhibitor comprises a primary amine, a secondary amine, a tertiary amine, or combinations thereof having one to three R groups, wherein each of the one to three R groups independently comprises hydrogen, a linear C1-C16 alkyl group, a branched C1-C16 alkyl group, an aryl group, or a cyclic group.

9. The process of claim 1 , wherein the second inhibitor comprises a nitrile, an isonitrile, a pyrazole, a pyridine, a triazole, a pyrrolidine, a pyrrole, a piperidine, an N-Heterocyclic carbene, or any combinations thereof.

10. The process of claim 1 , wherein the second inhibitor comprises an alkyne or an alkene having one to four R groups, wherein each of the one to four R groups independently comprise hydrogen, a linear C1-C16 alkyl group, a branched C1-C16 alkyl group, an aryl group, or a cyclic group.

11. The process of claim 1 , wherein the second inhibitor is different from the first inhibitor and the second inhibitor comprises an alcohol, an aldehyde, a ketone, an ether, a carboxylic acid, an ester, or combinations thereof.

12. The process of claim 1 , wherein removing the first inhibitor comprises a thermal treatment.

13. The process of claim 1, wherein removing the first inhibitor comprises a gas anneal with a soaking gas comprising ammonia (NH3), hydrogen (H2), nitrogen (N2), helium (He), argon (Ar), water, or combinations thereof.

14. The process of claim 1 , wherein removing the first inhibitor and depositing the barrier layer occur simultaneously.

15. The process of claim 1, wherein the barrier layer is deposited using Atomic Layer Deposition (ALD), Chemical Vapor Deposition (CVD), or a combination thereof.

16. The process of claim 1 , wherein the barrier layer has a thickness of about 10 A to about 20 A.

17. A process for depositing a bottomless barrier layer, comprising:Providing a substrate comprising a via disposed through a silicon (Si)-containing dielectric material and an aluminum (Al)-containing dielectric material, and a metal material disposed at a bottom of the via;selectively depositing a first inhibitor on the Al-containing dielectric material within the via of the substrate;depositing a second inhibitor on the metal material of the substrate; removing the first inhibitor to expose the Al-containing dielectric material; and depositing a barrier layer comprising tantalum nitride on the exposed Al-containing dielectric material and the Si-containing dielectric material.

18. The process of claim 17, wherein the first inhibitor is selective to the Al-containing dielectric material and does not react with the Si-containing dielectric material or the metal material.

19. The process of claim 17, wherein the first inhibitor comprises an alcohol having an R group comprising a linear C1-C18 alkyl group, a branched C1-C18 alkyl group, or an aryl group.

20. A process for selectively depositing a barrier layer, comprising:selectively depositing a first inhibitor on a substrate comprising an aluminum (Al)-containing dielectric material and a metal material, wherein the first inhibitor is selectively deposited on the Al-containing dielectric material of the substrate and the first inhibitor is a mid-chain alcohol having 3 to 6 carbons;depositing a second inhibitor on the metal material of the substrate; removing the first inhibitor to expose the Al-containing dielectric material; and depositing a barrier layer on the exposed Al-containing dielectric material.

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