Array substrate and display device

Abstract

An array substrate, comprising a display area (AA), a fan-out area (FO), and a binding area (BD) arranged in sequence. The array substrate (10) comprises: at least one fan-out line group (11A). Each fan-out line group (11A) comprises a plurality of fan-out lines (11). The fan-out lines (11) extend from the side of the fan-out area (FO) close to the display area (AA) to the binding area (BD) via the fan-out area (FO). Each fan-out line (11) comprises: at least two winding portions (110). In a same fan-out line group (11A), in a direction from one side of the fan-out line group (11A) in a second direction (Y) to the center of the fan-out line group (11A), the dimensions of the winding portions (110) of the plurality of fan-out lines (11) in a first direction (X) gradually increase. The first direction (X) intersects the second direction (Y).

Description

Array substrate and display device Technical Field

[0001] This disclosure relates to the field of display technology, and in particular to an array substrate and a display device. Background Technology

[0002] Currently, display devices have become indispensable electronic products in people's lives. Various display devices, such as medical display equipment, mobile phones, tablets, and laptops, have greatly increased the convenience of people's lives. Summary of the Invention

[0003] On one hand, an array substrate is provided, comprising a display area, a fan-out area, and a bonding area arranged sequentially. The array substrate includes at least one fan-out line group. Each fan-out line group includes multiple fan-out lines. The fan-out lines extend from the fan-out area near the display area through the fan-out area to the bonding area. Each fan-out line includes at least two winding portions. Within the same fan-out line group, in a direction from one side of the fan-out line group along a first direction towards the center of the fan-out line group, the dimensions occupied by the winding portions of the multiple fan-out lines in a second direction gradually increase. The first direction intersects the second direction.

[0004] In some embodiments, the winding portion includes at least two first sub-wires and at least one second sub-wire. Adjacent first sub-wires and second sub-wires are arranged alternately and connected to each other in sequence. The first sub-wires extend along a first direction, and the second sub-wires extend along a second direction.

[0005] In some embodiments, the at least two winding portions include a first winding portion and a second winding portion. In the same fan-out wire group, the area occupied by the plurality of first winding portions of the plurality of fan-out wires has a triangular shape, and the area occupied by the plurality of second winding portions of the plurality of fan-out wires also has a triangular shape.

[0006] In some embodiments, the fan-out line further includes a first segment portion. The first segment portion connects the first winding portion and the second winding portion.

[0007] In some embodiments, the first winding portion and the second winding portion are connected and are an integral structure. In the same fan-out line group, the shape of the area occupied by the multiple first winding portions and multiple second winding portions of the multiple fan-out lines includes quadrilaterals.

[0008] In some embodiments, the fan-out line includes: a second segment portion, a first winding portion, a second winding portion, and a third winding portion. The second segment portion connects the first winding portion and the second winding portion. The second winding portion is connected to the third winding portion and is an integral structure. In the same fan-out line group, the area occupied by the first winding portions of the multiple fan-out lines has a triangular shape, and the area occupied by the second and third winding portions of the multiple fan-out lines has a quadrilateral shape.

[0009] In some embodiments, within the same fan-out line, the first winding portion is closer to the display area than the second winding portion. The length of the first sub-wire in the first winding portion is greater than the length of the first sub-wire in the second winding portion, and the length of the first sub-wire in the second winding portion is equal to or approximately equal to the length of the first sub-wire in the third winding portion.

[0010] In some embodiments, the ratio of the length of the first sub-wire in the first winding portion to the length of the first sub-wire in the second winding portion ranges from 2.5 to 6:1.

[0011] In some embodiments, the array substrate further includes: an electrostatic discharge (ESD) protection circuit, connecting leads, and data lines. The ESD protection circuit is located between the display area and the fan-out area. The data lines are located in the display area. The extending direction of the connecting leads intersects with the first direction, and the connecting leads are connected to the data lines and the ESD protection circuit respectively. The end of the first winding portion near the display area is connected to the ESD protection circuit.

[0012] In some embodiments, there are multiple data lines, which extend along the second direction, and the spacing between two adjacent data lines is equal to or approximately equal to the length of the first sub-line in the first winding portion.

[0013] In some embodiments, the array substrate includes: an adjacent first fan-out line group and a second fan-out line group. The first fan-out line group includes at least one first fan-out line adjacent to the second fan-out line group. The second fan-out line group includes at least one second fan-out line adjacent to the first fan-out line group. The first fan-out line further includes: a zigzag portion connected to the winding portion. The zigzag portion includes at least a connected third sub-line and a fourth sub-line. The third sub-line is closer to the display area than the fourth sub-line. The second fan-out line further includes: a third segment portion connected to the winding portion. Along the second direction, the zigzag portion and the third segment portion are at least partially opposite each other. The extension direction of the third sub-line is parallel or substantially parallel to the extension direction of the third segment portion. The angle between the extension direction of the fourth sub-line and the second direction, and the angle between the extension direction of the third segment portion and the second direction, are complementary or substantially complementary.

[0014] In some embodiments, the broken line portion further includes a fifth sub-line. The two ends of the fifth sub-line are respectively connected to the third sub-line and the fourth sub-line.

[0015] In some embodiments, the angle between the fifth sub-line and the third sub-line is greater than or equal to 90°, and the angle between the fifth sub-line and the fourth sub-line is greater than or equal to 90°.

[0016] In some embodiments, the spacing between adjacent fifth sub-lines and third segment portions is greater than or equal to the spacing between two adjacent fifth sub-lines.

[0017] In some embodiments, the at least two winding portions include a first winding portion and a second winding portion. The first winding portion and the second winding portion are connected and are an integral structure. Along the direction from the display area to the binding area, the third sub-line, the fourth sub-line, the first winding portion, and the second winding portion in the same first fan-out line are arranged sequentially and connected in sequence.

[0018] In some embodiments, the fan-out line further includes a first segment portion. The at least two winding portions include a first winding portion and a second winding portion. The first segment portion connects the first winding portion and the second winding portion. The first segment portion in the first fan-out line is the zigzag portion. Along the direction from the display area to the binding area, in the same first fan-out line, the first winding portion, the third sub-line, the fourth sub-line, and the second winding portion are arranged sequentially and connected in sequence.

[0019] In some embodiments, the fan-out line includes a second segment portion. The at least two winding portions include a first winding portion, a second winding portion, and a third winding portion. The second segment portion in the first fan-out line is the zigzag portion. Along the direction from the display area to the binding area, in the same first fan-out line, the first winding portion, the third sub-line, the fourth sub-line, the second winding portion, and the third winding portion are arranged sequentially and connected in sequence.

[0020] In some embodiments, the array substrate further includes a redundant line group disposed between the first fan-out line group and the second fan-out line group. The redundant line group is also located on one side of a third sub-line of the first fan-out line group. The redundant line group includes at least one redundant line.

[0021] In some embodiments, the extension direction of the redundant line is parallel or substantially parallel to the extension direction of the third sub-line. And / or, the spacing between the redundant line and an adjacent third sub-line is greater than or equal to the spacing between two adjacent third sub-lines. And / or, the width of the redundant line is equal to or substantially equal to the width of the third sub-line.

[0022] On the other hand, a display device is also provided, comprising: an array substrate as described in any of the above embodiments, and at least one driver chip. The driver chip is located on the side of the bonding area away from the display area, and the driver chip is connected to a fan-out line group of the array substrate. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in this disclosure, the accompanying drawings used in some embodiments of this disclosure will be briefly described below. Obviously, the drawings described below are merely drawings of some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings. Furthermore, the drawings described below can be considered as schematic diagrams and are not intended to limit the actual dimensions, etc., of the products involved in the embodiments of this disclosure.

[0024] Figure 1 is a structural diagram of a display device according to some embodiments of the present disclosure;

[0025] Figure 2 is a structural diagram of another display device according to some embodiments of the present disclosure;

[0026] Figure 3 is a structural diagram of another display device according to some embodiments of the present disclosure;

[0027] Figure 4 is a structural diagram of another display device according to some embodiments of the present disclosure;

[0028] Figure 5 is a structural diagram of a sub-fanout region according to some embodiments of the present disclosure;

[0029] Figure 6 is a structural diagram of another seed fan-out region according to some embodiments of the present disclosure;

[0030] Figure 7 is a structural diagram of another sub-fan-out region according to some embodiments of the present disclosure;

[0031] Figure 8 is a structural diagram of another sub-fan-out region according to some embodiments of the present disclosure;

[0032] Figure 9 is a structural diagram of a fan-out region according to some embodiments of the present disclosure;

[0033] Figure 10 is an enlarged structural diagram of the fan-out region in Figure 9;

[0034] Figure 11 is an enlarged structural diagram of a local region EV11 in the fan-out area of ​​Figure 10;

[0035] Figure 12 is an enlarged structural diagram of a local region EV111 in the fan-out area of ​​Figure 11;

[0036] Figure 13 is an enlarged structural diagram of a local area EV12 in the fan-out region of Figure 10;

[0037] Figure 14 is an enlarged structural diagram of a local area EV121 in the fan-out region of Figure 13;

[0038] Figure 15 is an enlarged structural diagram of a local area EV13 in the fan-out region of Figure 10;

[0039] Figure 16 is an enlarged structural diagram of a local region EV131 in the fan-out area of ​​Figure 15;

[0040] Figure 17 is a structural diagram of another fan-out region according to some embodiments of the present disclosure;

[0041] Figure 18 is an enlarged structural diagram of the fan-out region in Figure 17;

[0042] Figure 19 is an enlarged structural diagram of a local region EV21 in the fan-out area of ​​Figure 18;

[0043] Figure 20 is an enlarged structural diagram of a local region EV211 in the fan-out area of ​​Figure 19;

[0044] Figure 21 is an enlarged structural diagram of a local region EV22 in the fan-out area of ​​Figure 18;

[0045] Figure 22 is an enlarged structural diagram of a local region EV221 in the fan-out area of ​​Figure 21;

[0046] Figure 23 is an enlarged structural diagram of a local region EV23 in the fan-out area of ​​Figure 18;

[0047] Figure 24 is an enlarged structural diagram of a local region EV231 in the fan-out area of ​​Figure 23;

[0048] Figure 25 is a structural diagram of another fan-out region according to some embodiments of the present disclosure;

[0049] Figure 26 is an enlarged structural diagram of the fan-out region in Figure 25;

[0050] Figure 27 is an enlarged structural diagram of a local area EV31 in the fan-out region of Figure 26;

[0051] Figure 28 is an enlarged structural diagram of a local area EV311 in the fan-out region of Figure 27;

[0052] Figure 29 is an enlarged structural diagram of a local area EV32 in the fan-out region of Figure 26;

[0053] Figure 30 is an enlarged structural diagram of a local region EV321 in the fan-out area of ​​Figure 29;

[0054] Figure 31 is an enlarged structural diagram of a local region EV33 in the fan-out area of ​​Figure 26;

[0055] Figure 32 is an enlarged structural diagram of a local region EV331 in the fan-out area of ​​Figure 31;

[0056] Figure 33 is a structural diagram of another fan-out region according to some embodiments of the present disclosure;

[0057] Figure 34 is an enlarged structural diagram of the fan-out region in Figure 33;

[0058] Figure 35 is an enlarged structural diagram of a local area EV41 in the fan-out region of Figure 34;

[0059] Figure 36 is an enlarged structural diagram of a local region EV411 in the fan-out area of ​​Figure 35;

[0060] Figure 37 is an enlarged structural diagram of a local area EV42 in the fan-out region of Figure 34;

[0061] Figure 38 is an enlarged structural diagram of a local region EV421 in the fan-out area of ​​Figure 37;

[0062] Figure 39 is an enlarged structural diagram of a local region EV43 in the fan-out area of ​​Figure 34;

[0063] Figure 40 is an enlarged structural diagram of a local region EV431 in the fan-out area of ​​Figure 39;

[0064] Figure 41 is a structural diagram of an array substrate according to some embodiments of the present disclosure;

[0065] Figure 42 is an enlarged structural diagram of a local region EV51 in the array substrate in Figure 41;

[0066] Figure 43 is an enlarged structural diagram of a local region EV52 in the array substrate in Figure 41;

[0067] Figure 44 is an enlarged structural diagram of a local region EV53 in the array substrate in Figure 41;

[0068] Figure 45 is an enlarged structural diagram of a local region EV54 in the array substrate in Figure 41;

[0069] Figure 46 is an enlarged structural diagram of a local region EV55 in the array substrate in Figure 41;

[0070] Figure 47 is a partial structural diagram of a fan-out region according to one implementation method;

[0071] Figure 48 is a partial structural diagram of a fan-out region according to another implementation method;

[0072] Figure 49 is a partial structural diagram of another fan-out region according to some embodiments of the present disclosure;

[0073] Figures 50 to 52 are structural diagrams of the fan-out lines in the fan-out region of Figure 49 during different preparation processes. Detailed Implementation

[0074] The technical solutions in some embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments provided in this disclosure are within the scope of protection of this disclosure.

[0075] Unless the context otherwise requires, throughout the specification and claims, the term "comprise" and its other forms, such as the third-person singular "comprises" and the present participle "comprising," are interpreted as open-ended and encompassing, meaning "including, but not limited to." In the description of the specification, terms such as "one embodiment," "some embodiments," "exemplary embodiments," "example," "specific example," or "some examples," etc., are intended to indicate that a particular feature, structure, material, or characteristic associated with that embodiment or example is included in at least one embodiment or example of this disclosure. The illustrative representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics mentioned may be included in any suitable manner in any one or more embodiments or examples.

[0076] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of embodiments of this disclosure, unless otherwise stated, "a plurality of" means two or more.

[0077] "A and / or B" includes the following three combinations: A only, B only, and a combination of A and B.

[0078] The use of “applies to” or “configured to” in this article implies an open and inclusive language that does not preclude applicability to or configuration to devices that perform additional tasks or steps.

[0079] As used herein, “about,” “approximately,” or “approximately” includes the stated value and the average value within an acceptable range of deviation from the given value, wherein the acceptable range of deviation is determined by a person skilled in the art taking into account the measurement under discussion and the error associated with the measurement of the given quantity (i.e., the limitations of the measurement system).

[0080] In describing some embodiments, the term "connection" and its derivative expressions may be used. The term "connection" should be interpreted broadly; for example, "connection" can be a fixed connection, a detachable connection, or an integral part; it can be a direct connection or an indirect connection through an intermediate medium.

[0081] As used herein, "perpendicular" and "equal" include the described situation and situations that are similar to the described situation, within an acceptable deviation range, which is determined by those skilled in the art taking into account the measurement under discussion and the error associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, "perpendicular" includes absolute perpendicularity and approximate perpendicularity, where the acceptable deviation range for approximate perpendicularity could be, for example, a deviation within 5°. "Equal" includes absolute equality and approximate equality, where the acceptable deviation range for approximate equality could be, for example, a difference between the two equalities less than or equal to 5% of either one.

[0082] It should be understood that when a layer or element is referred to as being on another layer or substrate, it can mean that the layer or element is directly on the other layer or substrate, or that there is an intermediate layer between the layer or element and the other layer or substrate.

[0083] This document describes exemplary embodiments with reference to cross-sectional views and / or plan views, which are idealized exemplary drawings. In the drawings, the thickness of layers and the area of ​​regions are enlarged for clarity. Therefore, variations in shape relative to the drawings are contemplated due to, for example, manufacturing techniques and / or tolerances. Thus, exemplary embodiments should not be construed as being limited to the shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing processes. For example, etched areas shown as rectangular would typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to show the actual shapes of the areas of the device, nor are they intended to limit the scope of the exemplary embodiments.

[0084] Some embodiments of this disclosure provide a display device 1. This display device 1 can be any display device 1 that displays either moving (e.g., video) or stationary (e.g., still images), and whether it is text or images. More specifically, the display device 1 of the described embodiments is contemplated for implementation in or associated with a variety of electronic devices, such as (but not limited to) mobile phones, wireless devices, personal data assistants (PDAs), handheld or portable computers, GPS receivers / navigators, cameras, MP4 video players, camcorders, game consoles, watches, clocks, calculators, television monitors, flat panel displays, computer monitors, automotive displays (e.g., odometer displays, etc.), navigators, cockpit controllers and / or displays, displays of camera views (e.g., displays of rearview cameras in vehicles), electronic photographs, electronic billboards or signs, projectors, architectural structures, packaging and aesthetic structures (e.g., displays of images of an item), etc.

[0085] For example, as shown in FIG1, the display device 1 includes a display panel 2.

[0086] In some examples, the aforementioned display panel 2 can be an OLED (Organic Light Emitting Diode) display panel.

[0087] The display panel 2 includes an array substrate 10 and a light-emitting device located on one side of the array substrate 10.

[0088] The array substrate 10 includes multiple pixel driving circuits. Multiple light-emitting devices can be electrically connected to the multiple pixel driving circuits in a one-to-one correspondence. The light-emitting devices emit light under the action of the control signals transmitted by the pixel driving circuits.

[0089] In other examples, as shown in Figure 2, the display panel 2 can be a liquid crystal display (LCD). The liquid crystal display panel includes an array substrate 10, a liquid crystal layer 40, and a color filter substrate 50.

[0090] The array substrate 10 may include multiple pixel electrodes and multiple pixel driving circuits. The multiple pixel electrodes are electrically connected to the corresponding pixel driving circuits, and the pixel driving circuits provide pixel voltages to the respective pixel electrodes.

[0091] The array substrate 10 also includes multiple data lines and multiple gate lines. For example, the data lines are connected to the pixel driving circuit to transmit data signals to the pixel driving circuit. The gate lines are connected to the pixel driving circuit and transmit scan signals.

[0092] For example, the array substrate 10 can be an array substrate with a dual-gate driving design, where multiple pixel driving circuits in a row of pixel driving circuits are connected to two gate lines, and a data line is connected to two adjacent columns of pixel driving circuits. This reduces the number of data lines by half, thereby reducing the number of driving chips that provide data signals to the data lines and thus lowering the cost of the array substrate 10.

[0093] For example, display panel 2 also includes a common electrode. The location of the common electrode is related to the display type of the display panel.

[0094] The display panel 2 described above can be of various display types, such as ADS (Advanced Super Dimension Switch), IPS (In-Plane Switching), VA (Vertical Alignment), FFS (Fringe Field Switching), and TN (Twisted Nematic). Therefore, the common electrode can be positioned in various ways in the embodiments of this disclosure.

[0095] For example, when the display panel 2 is an IPS display type, the common electrode can be disposed on the array substrate 10 and disposed on the same layer as the pixel electrode. Thus, the common electrode and the pixel electrode can be formed simultaneously in one patterning process, thereby simplifying the manufacturing process of the display panel 2.

[0096] For example, when the display panel 2 is an FFS or ADS display type, the common electrode can be disposed on the array substrate 10 and located on a different layer from the pixel electrode. This avoids interference between the pixel voltage signal on the pixel electrode and the common voltage on the common electrode, improving the signal accuracy of both the pixel voltage signal and the common voltage.

[0097] For example, if the display panel 2 is a TN or VA display type, the common electrode can be disposed on the color filter substrate 50.

[0098] The liquid crystal layer 40 comprises multiple liquid crystal molecules. An electric field can be formed between the pixel electrode and the common electrode, and the liquid crystal molecules located between the pixel electrode and the common electrode can be deflected under the action of this electric field.

[0099] The color filter substrate 50 includes various color filters. For example, when the light incident on the color filters is white light, the color filters may include a red filter, a green filter, and a blue filter. For example, a red filter allows only red light in the incident light to pass through, a green filter allows only green light in the incident light to pass through, and a blue filter allows only blue light in the incident light to pass through.

[0100] The color filter substrate 50 also includes a black matrix. The black matrix can be used to prevent light mixing.

[0101] In this embodiment, as shown in FIG2, the display device 1 further includes a backlight module 3. The backlight module 3 is located on one side of the display panel. The backlight module 3 provides backlight to the display panel.

[0102] Understandably, the backlight provided by the backlight module 3 can pass through the array substrate 10 and be incident on the liquid crystal molecules in the liquid crystal layer 40. Under the influence of the electric field formed between the pixel electrode and the common electrode, the liquid crystal molecules undergo a certain degree of flipping, thereby changing the polarization direction of the light passing through the liquid crystal molecules. The light then passes through the color filter substrate 50 and exits. This exited light includes various colors of light, such as red light, green light, and blue light. The various colors of light work together to enable the display device 1 to achieve color display.

[0103] The aforementioned pixel electrodes, liquid crystal molecules, common electrodes, and color filters constitute sub-pixels.

[0104] In some examples, as shown in Figure 3, the display device 1 also includes a driver chip 20.

[0105] There are various electrical connection relationships between the driver chip 20 and the display panel 2, and the embodiments disclosed herein are not limited to any particular type. For example, the driver chip 20 can be directly bonded to the display panel 2. As shown in FIG3, the display device 1 also includes a flexible circuit board 4. Optionally, the driver chip 20 can be bonded to the flexible circuit board 4, and the flexible circuit board 4 is electrically connected to the display panel 2.

[0106] The array substrate 10 includes a display area AA, a fan-out area FO, and a bonding area BD arranged sequentially.

[0107] For example, the display area AA, the fan-out area FO, and the bonding area BD are arranged sequentially along the second direction Y. The fan-out area FO is located between the display area AA and the bonding area BD. The pixel driving circuit described above is located in the display area AA. The driving chip 20 described above can be located on the side of the bonding area BD away from the display area AA, or the bonding area BD is used for electrical connection to the flexible circuit board, and the driving chip 20 is bonded to the flexible circuit board.

[0108] The array substrate 10 includes multiple fan-out lines 11, which extend from the fan-out area FO near the display area AA through the fan-out area FO to the bonding area BD. The fan-out lines 11 are connected to the driver chip 20. The fan-out lines 11 are also connected to data lines in the array substrate 10.

[0109] The number of driver chips 20 can be one or more.

[0110] For example, the display device 1 includes a plurality of driver chips 20. The driver chips 20 are arranged at intervals along a first direction X.

[0111] For example, in a plurality of driver chips 20, the spacing between any two adjacent driver chips 20 is equal. Alternatively, in a plurality of driver chips 20, the spacing between any two adjacent driver chips 20 is not equal.

[0112] In one possible implementation, the unequal lengths of the multiple fan-out lines electrically connected to the driver chip result in unequal resistance values. Consequently, when the same data signal is transmitted from the driver chip to the display area via these unequal-length fan-out lines, the voltage loss is unequal. This leads to significant differences in the charging saturation of the multiple pixel driving circuits connected to these data lines, resulting in substantial differences in the brightness of the light emitted by the sub-pixels corresponding to these pixel driving circuits, thus affecting the image display quality of the display panel. Furthermore, when the display device includes multiple driver chips, the unequal lengths of the fan-out lines electrically connected to these driver chips, especially when there is a large difference in length between two adjacent fan-out lines connected to adjacent driver chips, will cause significant differences in the brightness of the sub-pixels corresponding to the adjacent pixel driving circuits. This will result in vertical block lines appearing on the displayed screen, negatively impacting the user's viewing experience.

[0113] Based on this, as shown in Figures 3 and 4, an embodiment of this disclosure provides an array substrate 10, which is applied to the aforementioned display panel 2 and display device 1. The array substrate 10 includes at least one fan-out line group 11A.

[0114] Fan-out line group 11A includes multiple fan-out lines 11. The multiple fan-out lines 11 in the same fan-out line group 11A are arranged adjacent to each other in sequence. A fan-out line group 11A is electrically connected to a driver chip 20. The number of fan-out lines 11 included in each fan-out line group 11A may be equal or unequal.

[0115] For example, the aforementioned fan-out area FO includes multiple sub-fan-out areas FO1. The area occupied by a fan-out line group 11A is a sub-fan-out area FO1.

[0116] For example, the shape of a sub-fanout area FO1 can be trapezoidal or similar. As shown in Figure 4, the trapezoid can be non-isosceles trapezoid, and the shape of the sub-fanout area FO1 is non-axisymmetric. As shown in Figure 3, the trapezoid can also be isosceles trapezoid, and the shape of the sub-fanout area FO1 is axisymmetric, with the axis of symmetry extending along the direction of the display area data lines.

[0117] In some examples, as shown in Figures 9 to 16, the fan-out line 11 includes at least one winding portion 110. For example, the winding portion 110 is relatively long, and the orthographic projection shape of the winding portion 110 onto the plane of the array substrate is a non-linear shape.

[0118] Therefore, the winding portion 110 can compensate for the length of the shorter fan-out lines 11, making the lengths of multiple fan-out lines 11 connected to the same driver chip 20 equal or nearly equal. This results in equal or nearly equal resistance values ​​for the multiple fan-out lines 11, leading to equal or minimal loss of the data signal provided by the driver chip 20 across these multiple fan-out lines 11. Consequently, the accuracy of the data signal transmitted to the multi-column pixel driving circuit via the data lines is equal or minimally different, ensuring that the luminous brightness of the sub-pixels corresponding to the multi-column pixel driving circuit is similar to or minimally different from the preset brightness, thereby improving the display quality of the display panel. When the same data signal is provided by the driver chip 20, transmission to the corresponding pixel driving circuit via multiple fan-out lines 11 of equal or nearly equal length ensures that the luminous brightness of the sub-pixels corresponding to the multi-column pixel driving circuit is equal or nearly equal, thus improving the appearance of vertical split lines on the displayed screen.

[0119] Figures 5-8 are structural diagrams of any one of the sub-fan-out regions FO1 in Figure 3. For an enlarged view of the local area EV01 in the lower left corner of sub-fan-out region FO1 in Figure 5, refer to the structural diagram shown in Figure 12. In Figure 5, within sub-fan-out region FO1, each of the multiple fan-out lines includes a winding portion 110. The multiple fan-out lines are symmetrically or approximately symmetrically distributed about the axis of symmetry DZ of sub-fan-out region FO1, or mirror-distributed about the axis of symmetry DZ.

[0120] The enlarged view of the local area EV02 in the lower left corner of the sub-fan-out region FO1 in Figure 6 can be referenced from the structural diagram shown in Figure 20. In Figure 6, in the sub-fan-out region FO1, each of the multiple fan-out lines includes two winding portions 110. The multiple fan-out lines are symmetrically or approximately symmetrically distributed about the axis of symmetry DZ of the sub-fan-out region FO1, or mirror-distributed about the axis of symmetry DZ.

[0121] A magnified view of the local area EV03 in the lower left corner of the sub-fan-out region FO1 in Figure 7 can be found in the structural diagram shown in Figure 28. In Figure 7, within the sub-fan-out region FO1, each of the multiple fan-out lines includes two winding portions 110. The multiple fan-out lines are symmetrically or approximately symmetrically distributed about the axis of symmetry DZ of the sub-fan-out region FO1, or they are mirror-distributed about the axis of symmetry DZ.

[0122] The enlarged view of the local region EV04 in the lower left corner of the sub-fan-out region FO1 in Figure 8 can be referenced to the structural diagram shown in Figure 36. In Figure 8, among the multiple fan-out lines in the sub-fan-out region FO1, each fan-out line includes three winding portions 110. The multiple fan-out lines are symmetrically or approximately symmetrically distributed about the axis of symmetry DZ of the sub-fan-out region FO1, or mirror-distributed about the axis of symmetry DZ. The enlarged view of the local region EV05 on the lower side of Figure 8 can be referenced to the structural diagram shown in Figure 42; the enlarged view of the local region EV06 slightly to the left in the middle of Figure 8 can be referenced to the structural diagram shown in Figure 43; the enlarged view of the local region EV07 on the upper side of Figure 8 can be referenced to the structural diagram shown in Figure 44; the enlarged view of the local region EV08 on the lower middle side of Figure 8 can be referenced to the structural diagram shown in Figure 45; and the enlarged view of the local region EV09 slightly to the upper middle side of Figure 8 can be referenced to the structural diagram shown in Figure 46.

[0123] It is understandable that the structure of the fan-out line is different in different regions of the fan-out area. Figures 10 to 16 are enlarged structural diagrams of different local regions in the fan-out area of ​​Figure 9.

[0124] In Figure 10, the different shaded areas represent fan-out lines with different structures. Figure 11 is an enlarged view of the fan-out lines with different structures in the lower left corner of the fan-out area EV11 in Figure 10. Figure 12 is an enlarged view of the fan-out lines with different structures in the lower left corner of the fan-out area EV111 in Figure 11. As shown in Figure 12, in the local area EV111, the leftmost fan-out line does not have a winding portion. Along the first direction X to the right, the size of the winding portions 110 of the multiple fan-out lines 11 increases from small to large in the second direction Y, and the length of the winding portions 110 of the multiple fan-out lines 11 increases from small to large, thus compensating for the length of the fan-out lines.

[0125] Figure 13 is an enlarged view of fan-out lines with different structures in a local area EV12 near the center of the fan-out region in Figure 10. Figure 14 is an enlarged view of fan-out lines with different structures in a local area EV121 near the center of the fan-out region in Figure 13. As can be seen from Figure 14, in the local area EV121, the part of the fan-out line 11 on the left that connects to the winding part 110 has a different shape than the part of the fan-out line 11 on the right that connects to the winding part 110. That is, the fan-out lines of a sub-fan-out region are asymmetrically designed, meaning that the multiple fan-out lines in the fan-out region are not symmetrically designed about the axis of symmetry extending in the second direction. The part of the fan-out line 11 on the right that connects to the winding part 110 is relatively longer, thus compensating for the length of the fan-out line. Furthermore, along the first direction X to the right, the size of the winding portion 110 of the multiple fan-out lines 11 on the left side increases from small to large in the second direction Y, the length of the winding portion 110 of the multiple fan-out lines 11 on the left side increases from small to large, and the length of the winding portion 110 of the multiple fan-out lines 11 on the right side decreases from large to small.

[0126] Figure 15 is an enlarged view of fan-out lines with different structures in a local area EV13 near the right side of the fan-out region in Figure 10. Figure 16 is an enlarged view of fan-out lines with different structures in a local area EV131 near the right side of the fan-out region in Figure 15. As shown in Figure 16, in the local area EV131, there is a broken section (i.e., broken section 150 mentioned below) of the fan-out line of the first fan-out line group 111A, and a partially straight structure of the fan-out line in the adjacent second fan-out line group 112A. Therefore, referring to Figures 9 to 16, it can be seen that when the fan-out line 11 includes a winding portion 110, the structure and shape of each fan-out line in a sub-fan-out area FO1 along the first direction X are as follows: Specifically, from left to right, the fan-out line on the left side only includes two adjacent straight-line shaped conductors connected in sequence; the fan-out line near the middle left side includes a straight-line shaped portion and a connected winding portion; the fan-out line near the middle right side includes a broken-line portion and a connected winding portion; and the fan-out line on the right side is adjacent to the fan-out line of another fan-out line group.

[0127] In other examples, as shown in Figures 6 to 8 and Figures 17 to 38, the fan-out line 11 includes at least two winding portions 110.

[0128] For example, as shown in Figures 6 and 17, in the same fan-out line group 11A, from one side of the fan-out line group 11A along the first direction X towards the center of the fan-out line group 11A, the size occupied by the winding portion 110 of the plurality of fan-out lines 11 in the second direction Y increases from small to large. The first direction X intersects the second direction Y.

[0129] For example, the angle between the first direction X and the second direction Y is 80°, 85°, 90°, 95° or 110°.

[0130] For example, as shown in Figure 20, the larger the dimension occupied by the winding portion 110 in the second direction Y, the larger the actual length of the winding portion 110.

[0131] For example, as shown in Figures 6 and 17, in the same fan-out line group 11A, from one side of the fan-out line group 11A along the first direction X towards the center of the fan-out line group 11A, the size occupied by the winding portion 110 of multiple fan-out lines 11 in the second direction Y gradually increases from small to large, or increases from small to large in a step-like manner.

[0132] Therefore, in the fan-out line 11 near the center of the fan-out line group 11A, the winding portion 110 has a larger size in the second direction Y, which provides greater compensation for the length of the fan-out line 11. This allows for effective compensation of the length of the fan-out line 11, making the lengths of multiple fan-out lines 11 tend to be equal, which is beneficial to improving the display quality of the display panel.

[0133] Furthermore, the fan-out line 11 includes at least two winding portions 110, which can be used to compensate for the length of the fan-out line 11, making the lengths of multiple fan-out lines 11 tend to be equal or equal, and the resistance values ​​of multiple fan-out lines 11 tend to be equal or equal. In this way, when the driver chip 20 provides the same data signal, during the transmission of the data signal to multiple data lines through fan-out lines 11 of similar length, the voltage loss of the data signal on the fan-out line 11 tends to be equal, making the difference in charging saturation of the multiple pixel driving circuits connected to the multiple data lines smaller, thereby making the difference in brightness of the light emitted by the sub-pixels corresponding to the multiple pixel driving circuits smaller, and thus improving the split-screen line phenomenon on the display panel.

[0134] In addition, at least two winding portions 110 can be set to be located at different positions in the fan-out area FO. For example, one winding portion 110 is located in the area of ​​the fan-out area FO near the display area AA, and the other winding portion 110 is located in the area of ​​the fan-out area FO near the bonding area BD. This can optimize the arrangement space of the signal lines in the fan-out area FO and avoid the winding portion 110 occupying a large size, which would affect the arrangement of other signal lines in the fan-out area FO.

[0135] It is understood that there are various structures for the winding portion 110, which can be selected and configured according to actual needs, and the embodiments disclosed herein do not limit this.

[0136] In some examples, the orthographic projection shape of the winding portion 110 on the plane of the array substrate can be a curved shape. For example, the winding portion 110 includes multiple repeating portions, each repeating portion is "S" shaped, and the multiple repeating portions are connected end to end in sequence to form the winding portion 110.

[0137] In other examples, as shown in FIG20, the multiple repeating portions of the winding portion 110 can be in a "bow" shape. The winding portion 110 includes at least two first sub-wires 111 and at least one second sub-wire 112. Adjacent first sub-wires 111 and second sub-wires 112 are arranged alternately and connected to each other in sequence. The first sub-wires 111 extend along a first direction X, and the second sub-wires 112 extend along a second direction Y.

[0138] For example, the length of the first sub-line 111 is greater than or equal to the length of the second sub-line 112.

[0139] Therefore, the winding portion 110 occupies a smaller size in the second direction Y, and the fan-out area FO is reduced in the second direction Y, which is beneficial to reducing the overall size of the display panel.

[0140] In some embodiments, as shown in FIG17, FIG21 and FIG22, the above-mentioned at least two winding portions 110 include a first winding portion 1103 and a second winding portion 1104.

[0141] It is understandable that, for the convenience of drawing, the structure of the first winding part 1103 in Figure 21 has been simplified. The structure of the first winding part 1103 in Figure 21 can be the same as the structure of the second winding part 1104 in Figure 22.

[0142] As shown in Figures 17 and 25, in the same fan-out line group 11A, the shape of the area occupied by the multiple first winding portions 1103 of the multiple fan-out lines 11 includes a triangle or a similar triangle, and the shape of the area occupied by the multiple second winding portions 1104 of the multiple fan-out lines 11 includes a triangle or a similar triangle. It should be noted that the triangles described in the embodiments of this disclosure all include similar triangle designs.

[0143] Therefore, it is convenient to plan and design the first winding part 1103 and the second winding part 1104 of different fan-out lines 11, which helps to reduce the design difficulty of the fan-out lines 11.

[0144] The relative positional relationship between the first winding portion 1103 and the second winding portion 1104 can be varied and can be set according to actual needs. The embodiments disclosed herein do not limit this.

[0145] In some examples, as shown in Figures 20-22, the fan-out line 11 further includes a first segment portion 120. The first segment portion 120 is located between the first winding portion 1103 and the second winding portion 1104, and connects the first winding portion 1103 and the second winding portion 1104.

[0146] For example, referring to Figures 17 and 20, in the same fan-out line group 11A, the triangle formed by the multiple first winding portions 1103 of the multiple fan-out lines 11 and the triangle formed by the multiple second winding portions 1104 of the multiple fan-out lines 11 can be connected by the first line segment portion 120.

[0147] Therefore, corresponding first winding section 1103 and second winding section 1104 can be set in different areas of the fan-out region FO, which is beneficial to optimize the signal line layout design of the fan-out region FO.

[0148] In other examples, as shown in Figures 7 and 25, the first winding portion 1103 and the second winding portion 1104 are connected and are an integral structure. In the same fan-out line group 11A, the shape of the area occupied by the multiple first winding portions 1103 and multiple second winding portions 1104 of the multiple fan-out lines 11 includes quadrilaterals or similar quadrilaterals.

[0149] Therefore, the first winding section 1103 and the second winding section 1104 can be set in adjacent areas in the fan-out area FO, which helps to simplify the design difficulty of multiple fan-out lines 11.

[0150] It is understandable that Figures 18 to 24 are magnified structural diagrams of different local areas in the fan-out region of Figure 17, Figures 26 to 32 are magnified structural diagrams of different local areas in the fan-out region of Figure 25, and Figures 34 to 40 are magnified structural diagrams of different local areas in the fan-out region of Figure 33.

[0151] In Figure 18, different shaded areas represent fan-out lines with different structures. Figure 19 is an enlarged view of the fan-out lines with different structures in the lower left corner of the fan-out area EV21 in Figure 18. Figure 20 is an enlarged view of the fan-out lines with different structures in the lower left corner of the fan-out area EV211 in Figure 19. As shown in Figure 20, in the local area EV211, the leftmost fan-out line does not have a winding portion. Along the first direction X to the right, the size of the winding portion 110 of the multiple fan-out lines 11 increases from small to large in the second direction Y, and the length of the winding portion 110 of the multiple fan-out lines 11 increases from small to large, thus compensating for the length of the fan-out lines.

[0152] Figure 21 is an enlarged view of fan-out lines with different structures in a local area EV22 near the center of the fan-out region in Figure 18. Figure 22 is an enlarged view of fan-out lines with different structures in a local area EV221 near the center of the fan-out region in Figure 21. As shown in Figure 21, a first winding section 1103 is provided in the upper part of the local area EV22. As shown in Figure 22, in the local area EV221, the first line segment 120 connecting the fan-out line 11 on the left to the winding section 110 has a different shape than the broken line section 150 connecting the fan-out line 11 on the right to the winding section 110. The broken line section 150 in the fan-out line 11 on the right is relatively longer, thus compensating for the length of the fan-out line. Furthermore, along the first direction X to the right, the size of the winding portion 110 of the multiple fan-out lines 11 on the left side increases from small to large in the second direction Y, the length of the winding portion 110 of the multiple fan-out lines 11 on the left side increases from small to large, and the length of the winding portion 110 of the multiple fan-out lines 11 on the right side decreases from large to small.

[0153] Figure 23 is an enlarged view of fan-out lines with different structures in a local area EV23 near the right side of the fan-out region in Figure 18. Figure 24 is an enlarged view of fan-out lines with different structures in a local area EV231 near the right side of the fan-out region in Figure 23. As shown in Figure 24, in the local area EV231, there is a broken line portion 150 of the fan-out line of the first fan-out line group 111A, and a redundant line group 160. Therefore, referring to Figures 17 to 24, it can be seen that when the fan-out line 11 includes two winding portions 110, the structure and shape of each fan-out line in a sub-fan-out area FO1 along the first direction X are as follows: Specifically, from left to right, the fan-out line on the left side only includes two adjacent straight-line shaped wires connected in sequence; the fan-out line near the middle left side includes a first winding portion 1103, a first line segment portion 120, and a second winding portion 1104 connected in sequence; the fan-out line near the middle right side includes a first winding portion 1103, a broken line portion 150, and a second winding portion 1104 connected in sequence; and the fan-out line on the right side is adjacent to the redundant line group 160.

[0154] The different shaded areas in Figure 26 represent fan-out lines with different structures. Figure 27 is an enlarged view of the fan-out lines with different structures in the lower left corner of the fan-out area EV31 in Figure 26. Figure 28 is an enlarged view of the fan-out lines with different structures in the lower left corner of the fan-out area EV311 in Figure 27. As shown in Figure 28, in the local area EV311, the leftmost fan-out line does not have a winding portion. Along the first direction X to the right, the size of the winding portion 110 of the multiple fan-out lines 11 increases from small to large in the second direction Y, and the length of the winding portion 110 of the multiple fan-out lines 11 increases from small to large, thus compensating for the length of the fan-out lines.

[0155] Figure 29 is an enlarged view of fan-out lines with different structures in a local area EV32 near the center of the fan-out region in Figure 26. Figure 30 is an enlarged view of fan-out lines with different structures in a local area EV321 near the center of the fan-out region in Figure 29. As shown in Figure 30, in the local area EV321, the first line segment 120 connecting the fan-out line 11 on the left to the winding portion 110 has a different shape than the broken line portion 150 connecting the fan-out line 11 on the right to the winding portion 110. The broken line portion 150 in the fan-out line 11 on the right is relatively longer, thus compensating for the length of the fan-out line. Furthermore, along the first direction X to the right, the size of the winding portion 110 of the multiple fan-out lines 11 on the left increases from small to large in the second direction Y, and the length of the winding portion 110 of the multiple fan-out lines 11 on the left increases from small to large, while the length of the winding portion 110 of the multiple fan-out lines 11 on the right decreases from large to small.

[0156] Figure 31 is an enlarged view of fan-out lines with different structures in a local area EV33 near the right side of the fan-out region in Figure 26. Figure 32 is an enlarged view of fan-out lines with different structures in a local area EV331 near the right side of the fan-out region in Figure 31. As shown in Figure 32, in the local area EV331, there is a broken line portion 150 of the fan-out line of the first fan-out line group 111A and a second fan-out line group 112A. Therefore, referring to Figures 25 to 32, it can be seen that when the fan-out line 11 includes two winding portions 110, the structure and shape of each fan-out line in a sub-fan-out area FO1 along the first direction X are as follows: Specifically, from left to right, the fan-out line on the left side only includes three adjacent straight-line shaped wires connected in sequence; the fan-out line near the middle left side includes a first line segment portion 120, a first winding portion 1103, and a second winding portion 1104 connected in sequence; the fan-out line near the middle right side includes a broken line portion 150, a first winding portion 1103, and a second winding portion 1104 connected in sequence; and the fan-out line on the right side is adjacent to the second fan-out line group 112A.

[0157] In some other examples, as shown in Figures 8, 33 and 38, the fan-out line 11 includes: a second line segment 130, a first winding section 1103, a second winding section 1104 and a third winding section 1105.

[0158] The second winding section 130 is located between the first winding section 1103 and the second winding section 1104, and connects the first winding section 1103 and the second winding section 1104. The second winding section 1104 is connected to the third winding section 1105 and is an integral structure.

[0159] As shown in Figure 33, in the same fan-out line group 11A, the shape of the area occupied by the first winding portion 1103 of multiple fan-out lines 11 includes a triangle, and the shape of the area occupied by the second winding portion 1104 and the third winding portion 1105 of multiple fan-out lines 11 includes a quadrilateral.

[0160] Therefore, the length of the fan-out line 11 can be compensated by the first winding part 1103, the second winding part 1104 and the third winding part 1105 respectively, so that the design of multiple fan-out lines 11 having equal lengths can be easily achieved, thereby making the resistance of multiple fan-out lines 11 tend to be equal and improving the display quality of the display panel.

[0161] For example, as shown in Figures 33 and 41-46, in the same fan-out line 11, the first winding section 1103 is closer to the display area AA than the second winding section 1104. The length L1 of the first sub-line 111 in the first winding section 1103 is greater than the length L2 of the first sub-line 111 in the second winding section 1104, and the length of the first sub-line 111 in the second winding section 1104 is equal to or approximately equal to the length L3 of the first sub-line 111 in the third winding section 1105. Therefore, along the direction from the display area AA to the binding area BD, the size occupied by the fan-out line 11 in the first direction X can be reduced from large to small. This allows the reduction of the size of the area occupied by multiple fan-out lines 11 in a fan-out line group 11 in the first direction X to be divided into two different stages (refer to Figure 33), thereby facilitating the optimization of the fan-out area FO design.

[0162] For example, as shown in Figures 43 and 44, the ratio of the length L1 of the first sub-wire 111 in the first winding section 1103 to the length L2 of the first sub-wire 111 in the second winding section 1104 is in the range of 2.5 to 6:1.

[0163] For example, the ratio of the length L1 of the first sub-wire 111 in the first winding section 1103 to the length L2 of the first sub-wire 111 in the second winding section 1104 can be in the range of 2.5:1, 3.5:1, 3.8:1, 3.9:1, 4:1, 4.2:1, 4.5:1, 5:1 or 6:1.

[0164] Therefore, the length L1 of the first sub-wire 111 in the first winding portion 1103 can be larger, and the length L2 of the first sub-wire 111 in the second winding portion 1104 can be smaller. This makes the area occupied by the first winding portion 1103 near the display area AA in the fan-out line 11 larger in the first direction X, and the area occupied by the second winding portion 1104 near the bonding area BD in the fan-out line 11 smaller in the first direction X. This makes the size of the fan-out area FO where the fan-out line 11 is located gradually smaller in the first direction X, which is beneficial to reducing the area of ​​the fan-out area FO. After bending the fan-out area FO to the non-light-emitting side of the display panel, it is beneficial to achieve a thinner and lighter design for the display panel and display device.

[0165] In some examples, as shown in Figure 44, the array substrate 10 further includes an electrostatic discharge (ESD) protection circuit 60, connecting leads 70, and the aforementioned data line 80. The ESD protection circuit 60 is located between the display area AA and the fan-out area FO. The data line 80 is located in the display area AA.

[0166] The extension direction of the connecting lead 70 intersects the first direction X. For example, the angle between the extension direction of the connecting lead 70 and the first direction X can be an acute angle. The shape of the orthographic projection of the connecting lead 70 onto the plane of the array substrate can be a straight line.

[0167] The connecting lead 70 is connected to the data line 80 and the electrostatic protection circuit 60 respectively, and the end of the first winding part 1103 near the display area AA is connected to the electrostatic protection circuit 60.

[0168] Therefore, during the process of high-current static electricity being transmitted from the driver chip to the data line, it first passes through the fan-out line 11 and the electrostatic discharge protection circuit 60, and then is transmitted to the data line 80. The electrostatic discharge protection circuit 60 can release the aforementioned high-current static electricity, preventing the transient high current from damaging the connection between the fan-out line 11 and the data line 80, and preventing the data line 80 from being broken, thereby avoiding the undesirable phenomenon of vertical dark lines appearing on the display panel.

[0169] In some examples, as shown in Figure 44, there are multiple data lines 80. The data lines 80 extend along the second direction Y. The spacing L4 between two adjacent data lines 80 is equal to or approximately equal to the length L1 of the first sub-line 111 in the first winding portion 1103.

[0170] Optionally, approximate equality here could be, for example, equality where the difference between the two is less than or equal to 5% of either one.

[0171] For example, if the difference between the above-mentioned spacing L4 and the length L1 of the first sub-line 111 is less than or equal to 10 μm, it can be considered that the spacing L4 between two adjacent data lines 80 is approximately equal to the length L1 of the first sub-line 111 in the first winding portion 1103.

[0172] Therefore, the length L1 of the first sub-line 111 can be designed based on the distance L4 between the two data lines 80, which makes it easier to plan and design the area of ​​the fan-out region FO and its size in the first direction X, and helps to reduce the difficulty of fabricating the fan-out region.

[0173] As exemplarily shown in FIG44, the array substrate 10 further includes a common voltage line 91. The common voltage line 91 is located in the display area AA, extends along the second direction Y, and is electrically connected to the common electrode, for transmitting a common voltage signal to the common electrode.

[0174] As shown in Figure 44, the common voltage line 91 is located between two adjacent data lines 80. As can be seen from the above, the array substrate in this disclosure can be an array substrate with a dual gate drive design, and two gate lines 92 are provided between two adjacent rows of sub-pixels.

[0175] Referring to Figures 3, 4, and 45, the array substrate 10 also includes a pad 93. The pad 93 is connected to the end of the fan-out line 11 away from the display area AA, and the pad 93 is used to bond the array substrate 10 to the flexible circuit board 4.

[0176] Figures 34 to 40 are enlarged structural diagrams of different local regions in the fan-out area of ​​Figure 33.

[0177] The different shaded areas in Figure 34 represent fan-out lines with different structures. Figure 35 is an enlarged view of the fan-out lines with different structures in the lower left corner of the fan-out area EV41 in Figure 34. Figure 36 is an enlarged view of the fan-out lines with different structures in the lower left corner of the fan-out area EV411 in Figure 35. As shown in Figure 36, in the local area EV411, the leftmost fan-out line does not have a winding portion. Along the first direction X to the right, the size of the winding portion 110 of the multiple fan-out lines 11 increases from small to large in the second direction Y, and the length of the winding portion 110 of the multiple fan-out lines 11 increases from small to large, thus compensating for the length of the fan-out lines.

[0178] Figure 37 is an enlarged view of fan-out lines with different structures in a local area EV42 near the center of the fan-out region in Figure 34. Figure 38 is an enlarged view of fan-out lines with different structures in a local area EV421 near the center of the fan-out region in Figure 37. As shown in Figure 37, a first winding section 1103 is provided in the upper part of the local area EV42. As shown in Figure 38, in the local area EV421, the second line segment 130 connected to the winding section 110 in the fan-out line 11 on the left side has a different shape than the broken line section 150 connected to the winding section 110 in the fan-out line 11 on the right side. The broken line section 150 in the fan-out line 11 on the right side is relatively longer, thus compensating for the length of the fan-out line. Furthermore, along the first direction X to the right, the size of the winding portion 110 of the multiple fan-out lines 11 on the left side increases from small to large in the second direction Y, the length of the winding portion 110 of the multiple fan-out lines 11 on the left side increases from small to large, and the length of the winding portion 110 of the multiple fan-out lines 11 on the right side decreases from large to small.

[0179] Figure 39 is an enlarged view of fan-out lines with different structures in a local area EV43 near the right side of the fan-out region in Figure 34. Figure 40 is an enlarged view of fan-out lines with different structures in a local area EV431 near the right side of the fan-out region in Figure 39. As shown in Figure 40, in the local area EV431, there is a broken line portion 150 of the fan-out line of the first fan-out line group 111A, and a redundant line group 160. Therefore, referring to Figures 33 to 40, it can be seen that when the fan-out line 11 includes three winding sections 110, the structure and shape of each fan-out line in a sub-fan-out area FO1 along the first direction X are as follows: Specifically, from left to right, the fan-out line on the left side only includes three adjacent straight-line shaped wires connected in sequence; the fan-out line near the middle left side includes the first winding section 1103, the second line segment section 130, the second winding section 1104, and the third winding section 1105 connected in sequence; the fan-out line near the middle right side includes the first winding section 1103, the broken line section 150, the second winding section 1104, and the third winding section 1105 connected in sequence; and the fan-out line on the right side is adjacent to the redundant line group 160.

[0180] Figures 42 to 46 are magnified structural diagrams of different local regions in the array substrate in Figure 41.

[0181] Figures 42-44 are enlarged structural diagrams of a fan-out line on the left side of the array substrate in Figure 41 and its connected data lines. Figure 42 is an enlarged structural diagram of a local area EV51 near the bonding area in the array substrate. As shown in Figure 42, the portion of the fan-out line near the bonding area consists of two connected straight-line shaped wires, which are connected to the third winding portion 1105. Figure 43 is an enlarged structural diagram of a local area EV52 in the fan-out area of ​​the array substrate. As shown in Figure 43, the portion of the fan-out line in the fan-out area consists of a second winding portion 1104 and connected straight-line shaped wires. The second winding portion 1104 is connected to the third winding portion 1105 in Figure 42. Figure 44 is an enlarged structural diagram of a local area EV53 in the fan-out area and display area of ​​the array substrate. As shown in Figure 44, the portion of the fan-out line in the fan-out area consists of a first winding portion 1103 and connected straight-line shaped wires, which are connected to the straight-line shaped wires in Figure 43. The first winding section 1103 is also connected to the electrostatic protection circuit 60.

[0182] Figures 45 and 46 are enlarged structural views of a fan-out line near the center of the array substrate in Figure 41 and the data lines connected to it. Figure 45 is an enlarged structural view of a local area EV54 near the bonding region in the array substrate. As shown in Figure 45, the near part of the fan-out line consists of two connected straight-line shaped wires, which are connected to the third winding portion 1105. Figure 46 is an enlarged structural view of a local area EV55 located in the bonding region of the array substrate. As shown in Figure 46, the second winding portion 1104 of the fan-out line is connected to the third winding portion 1105 in Figure 45. The second winding portion 1104 is also connected to the first winding portion 1103 through a zigzag-shaped wire.

[0183] In another possible implementation, the two adjacent sub-fan-out areas in the display panel are not completely symmetrically arranged. For example, the two adjacent sub-fan-out areas are both trapezoidal in shape, and the lengths of the two adjacent waists of the two trapezoids are not equal. In this way, the lengths of the two fan-out lines set near the waists of unequal lengths are not equal, which makes the corresponding sub-pixel display in the display panel show obvious vertical split lines, thereby affecting the display quality of the display panel.

[0184] Specifically, the two fan-out lines 11 mentioned above can be a first fan-out line 1101 and a second fan-out line 1102, with the length of the first fan-out line 1101 being shorter than the length of the second fan-out line 1102. To compensate for the length of the first fan-out line 1101, in another implementation, as shown in Figure 47, the first fan-out line 1101 includes a first sub-fan-out line 1107, and the second fan-out line 1102 includes a second sub-fan-out line 1108. The first sub-fan-out line 1107 and the second sub-fan-out line 1108 are directly opposite each other in the first direction X. The angle θ2 between the first sub-fan-out line 1107 and the first direction is greater than the angle θ1 between the second sub-fan-out line 1108 and the first direction. However, this implementation provides limited compensation for the length of the first fan-out line 1101, as its length remains shorter than the length of the second fan-out line 1102. In another implementation, as shown in Figure 48, the first sub-fan output line 1107 and the second sub-fan output line 1108 are positioned directly opposite each other in the first direction X. The angle θ2 between the first sub-fan output line 1107 and the first direction is equal to the angle θ1 between the second sub-fan output line 1108 and the first direction. The dimension of the first sub-line 111 in the second direction is smaller than that of the second sub-line 112 in the second direction. However, in this method, the length compensation for the first fan output line 1101 is still limited, and the length of the first fan output line 1101 is still smaller than that of the second fan output line 1102.

[0185] Based on this, as shown in FIG49, the array substrate 10 in the embodiment of the present disclosure includes: a first fan-out line group 111A and a second fan-out line group 112A adjacent along the first direction X.

[0186] The first outgoing line group 111A includes at least one first outgoing line 1101 adjacent to the second outgoing line group 112A. The second outgoing line group 112A includes at least one second outgoing line 1102 adjacent to the first outgoing line group 111A.

[0187] For example, the number of first outgoing lines 1101 in the first outgoing line group 111A can be one or more. The number of second outgoing lines 1102 in the second outgoing line group 112A can be one or more.

[0188] The first lead-out section 1101 includes a zigzag section 150 connected to the winding section 110. The zigzag section 150 includes at least a third sub-line 151 and a fourth sub-line 152 connected to each other. The third sub-line 151 and the fourth sub-line 152 extend in different directions, and the third sub-line 151 is closer to the display area AA than the fourth sub-line 152.

[0189] For example, the third sub-line 151 and the fourth sub-line 152 can be directly connected or indirectly connected.

[0190] For example, the orthographic projection of the third sub-line 151 onto the plane of the array substrate is a straight line or approximately a straight line. The extension direction of the third sub-line 151 forms an angle with the first direction X, which can be an acute angle. The orthographic projection of the fourth sub-line 152 onto the display panel is a straight line or approximately a straight line. The extension direction of the fourth sub-line 152 forms an angle θ2 with the first direction, which can be an acute angle.

[0191] The second fan-out line 1102 includes a third line segment 140 connected to the winding portion 110. The orthographic projection shape of the third line segment 140 in the fan-out region FO is a straight line or approximately a straight line. The extending direction of the third line segment 140 forms an angle with the first direction.

[0192] As shown in Figure 49, along the second direction Y, the broken line portion 150 is at least partially aligned with the third line segment portion 140. For example, "at least partially aligned" here means that the orthographic projection of the broken line portion 150 onto the second direction Y at least partially coincides with the orthographic projection of the third line segment portion 140 onto the second direction Y.

[0193] The extension direction of the third sub-line 151 is parallel or substantially parallel to the extension direction of the third segment portion 140. The angle between the extension direction of the fourth sub-line 152 and the first direction, and the angle between the extension direction of the third segment portion 140 and the first direction X, are complementary or substantially complementary. For example, the angle between the extension direction of the third sub-line 151 and the first direction X, and the angle between the extension direction of the third segment portion 140 and the first direction X, are equal or substantially equal.

[0194] For example, the sum of the angle θ2 between the extension direction of the fourth sub-line 152 and the first direction, and the angle θ3 between the extension direction of the third segment portion 140 and the first direction, is 180° or close to 180°. The fourth sub-line 152 and a portion of the third segment portion 140 are mirror images of each other.

[0195] Therefore, the length of the bend 150 of the first fan-out line 1101 can be equal to or approximately equal to the length of the third segment 140 of the second fan-out line 1102. This makes the lengths of the first fan-out line 1101 and the second fan-out line 1102 equal to or approximately equal, and the resistance values ​​of the first fan-out line 1101 and the second fan-out line 1102 equal to or approximately equal. Consequently, the data signal loss on the first fan-out line 1101 in the first fan-out line group 111A and the second fan-out line 1102 in the second fan-out line group 112A is equal to or substantially equal, thereby improving the vertical screen splitting phenomenon on the display panel. Furthermore, the aforementioned bend 150 does not require additional manufacturing processes and will not affect the production efficiency and cost of the array substrate.

[0196] In some examples, as shown in Figure 49, the aforementioned broken line portion 150 further includes a fifth sub-line 153. The two ends of the fifth sub-line 153 are connected to the third sub-line 151 and the fourth sub-line 152, respectively.

[0197] For example, the fifth sub-line 153 extends along the second direction Y.

[0198] The fabrication process of the zigzag portion 150 generally includes forming a solid metal layer, and then etching the metal layer to form the zigzag portion 150. For example, as shown in Figure 50, the third sub-line 151 is first etched to form, as shown in Figure 51, then the fourth sub-line 152 is etched to form, as shown in Figure 52, and finally the fifth sub-line 153 is etched to form.

[0199] The above settings can reduce the risk of the third sub-line 151 and the fourth sub-line 152 in the broken line portion 150 being disconnected, avoid making the outline of the broken line portion 150 too sharp, avoid making the connection between the third sub-line 151 and the fourth sub-line 152 present a small acute angle, reduce the risk of etching away the connection between the third sub-line 151 and the fourth sub-line 152 during the etching process, and thus help reduce the manufacturing difficulty of the broken line portion 150.

[0200] For example, the spacing between two adjacent broken line portions 150 is equal, and the width of two adjacent broken line portions 150 is equal.

[0201] In some examples, as shown in Figure 49, the angle between the fifth sub-line 153 and the third sub-line 151 is greater than or equal to 90°, and the angle between the fifth sub-line 153 and the fourth sub-line 152 is greater than or equal to 90°.

[0202] This allows for a larger angle between the fifth sub-line 153 and the third sub-line 151, and a larger angle between the fifth sub-line 153 and the fourth sub-line 152. This reduces the risk of etching away the connection between the third sub-line 151 and the fifth sub-line 153 during the etching process, as well as the risk of etching away the connection between the fourth sub-line 152 and the fifth sub-line 153 during the etching process. This, in turn, helps to reduce the difficulty of fabricating the folded section 150.

[0203] In some examples, as shown in Figure 49, the spacing between adjacent third sub-line 151 and third segment 140 is greater than or equal to the spacing between two adjacent third segment 140.

[0204] This makes it easier to design the spacing between adjacent fifth sub-line 153 and third segment 140, which helps to simplify the preparation process of fan-out lines.

[0205] In some examples, as shown in FIG25, at least two winding portions 110 include a first winding portion 1103 and a second winding portion 1104. The first winding portion 1103 and the second winding portion 1104 are connected and are an integral structure.

[0206] As shown in Figure 30, along the direction from the display area AA to the binding area BD, the third sub-line 151, the fourth sub-line 152, the first winding part 1103, and the second winding part 1104 in the same first fan-out line 1101 are arranged in sequence and connected in order.

[0207] When the folded section 150 of the first fan-out line 1101 includes the fifth sub-line 153, the third sub-line 151, the fifth sub-line 153, the fourth sub-line 152, the first winding section 1103, and the second winding section 1104 in the same first fan-out line 1101 are arranged in sequence and connected sequentially along the direction from the display area AA to the binding area BD.

[0208] Therefore, the length of the fan-out line can be compensated by using at least two winding sections and folded sections, so that the resistance value of the first fan-out line 1101 is equal or approximately equal to the resistance value of the second fan-out line 1102, so that the loss of the data signal on the first fan-out line 1101 and the second fan-out line 1102 is equal or approximately equal, thereby improving the vertical split screen phenomenon on the display panel.

[0209] In some examples, as shown in FIG22, the fan-out line 11 further includes a first segment portion 120. At least two winding portions 110 include a first winding portion 1103 and a second winding portion 1104. The first segment portion 120 connects the first winding portion 1103 and the second winding portion 1104.

[0210] The first segment 120 of the first fan-outlet 1101 is a broken line 150.

[0211] Along the direction from the display area AA to the binding area BD, in the same first fan-out line 1101, the first winding part 1103, the third sub-line 151, the fourth sub-line 152, and the second winding part 1104 in the folded line part 150 are arranged in sequence and connected in order.

[0212] When the folded section 150 of the first fan-out line 1101 includes the fifth sub-line 153, along the direction from the display area AA to the binding area BD, the first winding section 1103, the third sub-line 151, the fifth sub-line 153, the fourth sub-line 152, and the second winding section 1104 in the same first fan-out line 1101 are arranged in sequence and connected sequentially.

[0213] As a result, the smaller second winding portion 1104 (where smaller means that the second winding portion 1104 occupies a smaller size in the first direction) can be farther away from the display area AA, while the larger first winding portion 1103 can be closer to the display area AA. This makes the size of the fan-out area FO gradually narrow along the direction from the display area AA to the bonding area BD, which is beneficial for realizing the miniaturization design of the display panel and the display device.

[0214] In some examples, as shown in Figure 38, the fan-out line 11 includes a second segment portion 130. At least two winding portions 110 include a first winding portion 110, a second winding portion 110, and a third winding portion 110.

[0215] The second segment 130 in the first fan-outlet 1101 is a broken line segment 150.

[0216] Along the direction from the display area AA to the binding area BD, in the same first fan-out line 1101, the third sub-line 151, the fourth sub-line 152, the second winding section 1104, and the third winding section 1105 in the first winding section 1103 and the broken line section 150 are arranged in sequence and connected in order.

[0217] When the folded section 150 of the first fan-out line 1101 includes the fifth sub-line 153, along the direction from the display area AA to the binding area BD, in the same first fan-out line 1101, the first winding section 1103, the third sub-line 151, the fourth sub-line 152, the fifth sub-line 153 in the folded section 150, the second winding section 1104, and the third winding section 1105 are arranged in sequence and connected sequentially.

[0218] As a result, the smaller second winding portion 1104 (smaller size here means that the second winding portion 1104 occupies a smaller size in the first direction) and the third winding portion 1105 are farther away from the display area AA, while the larger first winding portion 1103 is closer to the display area AA. This makes the size of the fan-out area FO gradually narrow along the direction from the display area AA to the bonding area BD, which is beneficial for realizing the miniaturization design of the display panel and the display device.

[0219] In some examples, as shown in Figures 23, 24, 39, and 40, the array substrate 10 further includes a redundant line group 160 disposed between the first fan-out line group 111A and the second fan-out line group 112A. The redundant line group 160 is also located on one side of the third sub-line 151 of the first fan-out line group 111A.

[0220] The redundant line group 160 includes at least one redundant line 161.

[0221] For example, redundant line 161 is in a floating state and is not connected to an electrical signal.

[0222] Therefore, redundant line group 160 can be used to route the space between the first fan-out line group 11 and the second fan-out line group 112A, making the distribution of multiple wiring patterns composed of multiple third sub-lines 151, multiple redundant lines 161, and multiple second fan-out lines 1102 more uniform, improving the uniformity of etching and reducing the difficulty of fabricating the fan-out lines 11. It also ensures that each first fan-out line 1101 (or first sub-line 151) is subject to essentially the same coupling capacitance from the wiring patterns on its opposite sides (which can be another first fan-out line 1101 and a redundant line 161, or two first fan-out lines 1101). Similarly, it ensures that each second fan-out line 1102 is subject to essentially the same coupling capacitance from the wiring patterns on its opposite sides (which can be a redundant line 161 and another second fan-out line 1102, or two second fan-out lines 1102), thereby improving the accuracy of the data signals transmitted by the fan-out lines and enhancing the display quality of the display panel.

[0223] In some examples, as shown in Figure 40, the extension direction of the redundant line 161 is parallel or approximately parallel to the extension direction of the third sub-line 151.

[0224] This reduces the design complexity of redundant line 161.

[0225] For example, redundant line 161 and third sub-line 151 are in the same layer and made of the same material. Therefore, redundant line 161 and third sub-line 151 can be formed simultaneously in one fabrication process, without adding extra fabrication process steps, which helps to simplify the fabrication process.

[0226] For example, as shown in Figure 40, the spacing between the redundant line 161 and the adjacent third sub-line 151 is greater than or equal to the spacing between two adjacent third sub-lines 151.

[0227] Therefore, multiple wiring patterns composed of multiple third sub-lines 151 and multiple redundant lines 161 can be evenly distributed, making the spacing between two adjacent wiring patterns equal, thereby improving the uniformity of etching and reducing the difficulty of fabrication.

[0228] For example, as shown in Figure 40, the width of the redundant line 161 is equal to or approximately equal to the width of the third sub-line 151.

[0229] This reduces the design complexity of redundant line 161.

[0230] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. An array substrate, comprising a display area, a fan-out area, and a bonding area arranged sequentially; The array substrate includes: At least one fan-out line group; The fan-out line group includes multiple fan-out lines; The fan-out line extends from the side of the fan-out area closest to the display area through the fan-out area to the bonding area; The fan-out line includes at least two winding sections; In the same fan-out line group, from one side of the fan-out line group along the first direction toward the center of the fan-out line group, the size occupied by the winding portion of multiple fan-out lines in the second direction increases from small to large; the first direction intersects the second direction.

2. The array substrate according to claim 1, wherein, The winding section includes: at least two first sub-wires and at least one second sub-wire; adjacent first sub-wires and second sub-wires are arranged alternately and connected to each other in sequence; the first sub-wires extend along the first direction and the second sub-wires extend along the second direction.

3. The array substrate according to claim 1 or 2, wherein, The at least two winding portions include a first winding portion and a second winding portion; In the same fan-out line group, the area occupied by the multiple first winding portions of the multiple fan-out lines has a triangular shape, and the area occupied by the multiple second winding portions of the multiple fan-out lines also has a triangular shape.

4. The array substrate according to claim 3, wherein, The fan-out line also includes a first line segment; the first line segment connects the first winding section and the second winding section.

5. The array substrate according to claim 3, wherein, The first winding portion is connected to the second winding portion and is an integral structure; in the same fan-out line group, the shape of the area occupied by the multiple first winding portions and multiple second winding portions of the multiple fan-out lines includes quadrilaterals.

6. The array substrate according to any one of claims 2 to 5, wherein, The fan-out line includes: a second segment, a first winding section, a second winding section, and a third winding section; The second winding section connects the first winding section and the second winding section; the second winding section is connected to the third winding section and is an integral structure. In the same fan-out line group, the area occupied by the first winding portion of the multiple fan-out lines has a triangular shape, and the area occupied by the second winding portion and the third winding portion of the multiple fan-out lines has a quadrilateral shape.

7. The array substrate according to claim 6, wherein, Within the same fan-out line, the first winding section is closer to the display area than the second winding section; The length of the first sub-wire in the first winding section is greater than the length of the first sub-wire in the second winding section, and the length of the first sub-wire in the second winding section is equal to or approximately equal to the length of the first sub-wire in the third winding section.

8. The array substrate according to claim 7, wherein, The ratio of the length of the first sub-wire in the first winding section to the length of the first sub-wire in the second winding section ranges from 2.5 to 6:

1.

9. The array substrate according to any one of claims 6 to 8, wherein, The array substrate further includes: an electrostatic discharge (ESD) protection circuit, connecting leads, and data lines; the ESD protection circuit is located between the display area and the fan-out area; the data lines are located in the display area; The extension direction of the connecting lead intersects with the first direction. The connecting lead is connected to the data line and the electrostatic protection circuit respectively. The end of the first winding portion near the display area is connected to the electrostatic protection circuit.

10. The array substrate according to claim 9, wherein, The number of data lines is multiple, the data lines extend along the second direction, and the spacing between two adjacent data lines is equal to or approximately equal to the length of the first sub-line in the first winding portion.

11. The array substrate according to any one of claims 1 to 10, wherein, The array substrate includes: an adjacent first fan-out line group and a second fan-out line group; the first fan-out line group includes at least one first fan-out line adjacent to the second fan-out line group; the second fan-out line group includes at least one second fan-out line adjacent to the first fan-out line group. The first fan-out line further includes: a zigzag section connected to the winding section; the zigzag section includes at least a third sub-line and a fourth sub-line connected to each other; the third sub-line is closer to the display area than the fourth sub-line; the second fan-out line further includes: a third line segment section connected to the winding section; Along the second direction, the broken line portion is at least partially opposite to the third line segment portion; The extension direction of the third sub-line is parallel or approximately parallel to the extension direction of the third segment; the angle between the extension direction of the fourth sub-line and the second direction and the angle between the extension direction of the third segment and the second direction are complementary or approximately complementary.

12. The array substrate according to claim 11, wherein, The broken line section further includes: a fifth sub-line; the two ends of the fifth sub-line are respectively connected to the third sub-line and the fourth sub-line.

13. The array substrate according to claim 12, wherein, The angle between the fifth sub-line and the third sub-line is greater than or equal to 90°, and the angle between the fifth sub-line and the fourth sub-line is greater than or equal to 90°.

14. The array substrate according to any one of claims 11 to 13, wherein, The distance between adjacent fifth sub-lines and third sub-lines is greater than or equal to the distance between two adjacent fifth sub-lines.

15. The array substrate according to any one of claims 11 to 14, wherein, The at least two winding portions include a first winding portion and a second winding portion; the first winding portion and the second winding portion are connected and are an integral structure; Along the direction from the display area to the binding area, the third sub-line, the fourth sub-line, the first winding portion, and the second winding portion of the same first fan-out line are arranged in sequence and connected sequentially.

16. The array substrate according to any one of claims 11 to 14, wherein, The fan-out line further includes a first line segment; the at least two winding sections include a first winding section and a second winding section; the first line segment connects the first winding section and the second winding section; The first line segment in the first fan-out line is the broken line portion; Along the direction from the display area to the binding area, in the same first fan-out line, the first winding part, the third sub-line, the fourth sub-line, and the second winding part are arranged in sequence and connected sequentially.

17. The array substrate according to any one of claims 11 to 14, wherein, The fan-out line includes: a second line segment; the at least two winding sections include a first winding section, a second winding section, and a third winding section; The second line segment in the first fan-out line is the broken line portion; Along the direction from the display area to the binding area, in the same first fan-out line, the first winding part, the third sub-line, the fourth sub-line, the second winding part, and the third winding part are arranged in sequence and connected sequentially.

18. The array substrate according to claim 16 or 17, wherein, The array substrate further includes: a redundant line group disposed between the first fan-out line group and the second fan-out line group; the redundant line group is also located on one side of the third sub-line of the first fan-out line group. The redundant line group includes at least one redundant line.

19. The array substrate according to claim 18, wherein, The extension direction of the redundant line is parallel or substantially parallel to the extension direction of the third sub-line; and / or, The spacing between the redundant line and the adjacent third sub-line is greater than or equal to the spacing between two adjacent third sub-lines; and / or, The width of the redundant line is equal to or approximately equal to the width of the third sub-line.

20. A display device, comprising: The array substrate as described in any one of claims 1 to 19.

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