Vertical-cavity surface-emitting laser and preparation method therefor

Abstract

The present disclosure relates to a vertical-cavity surface-emitting laser and a preparation method therefor. The method comprises: providing a substrate (10); forming a first electrode (17) on the substrate (10) in an electrode region (b); forming a first passivation layer (18) covering the substrate (10) and the first electrode (17); forming a first conductive layer (19) on the side of the first passivation layer (18) facing away from the substrate, an orthographic projection of the first conductive layer (19) on the substrate (10) overlapping a portion of the first electrode (17) and extending from the overlapping portion in a projection direction away from a light emitting region (a); on the basis of a preset mask (20) having a first opening (22), etching the first passivation layer (18) to form a through hole (21), an orthographic projection of the first opening (22) on the substrate (10) covering the through hole (21) and extending into the projection of the first conductive layer (19); and forming a second conductive layer (23) filling the through hole (21) and covering the first conductive layer (19).

Description

Vertical-cavity surface-mount laser and its fabrication method

[0001] Cross-references to related applications

[0002] This disclosure claims priority to Chinese Patent Application No. 2025102177945, filed on February 26, 2025, entitled "Vertical Cavity Surface Laser and Method for Fabrication Thereof", the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to the field of semiconductor technology, and in particular to a vertical cavity surface laser and its fabrication method. Background Technology

[0004] A vertical-cavity surface-emitting laser (VCSEL) is a semiconductor laser that emits laser light perpendicularly to the emitting surface.

[0005] In high-power vertical-cavity surface-mount lasers (VCSELs), with a fixed emitting area, a smaller spacing between adjacent emitting regions results in a larger optical aperture. This leads to a larger effective emitting area within the same emitting area, allowing for greater luminous power at the same current density. However, due to manufacturing process limitations, the effective emitting area of ​​traditional VCSELs is restricted within a fixed emitting area. Summary of the Invention

[0006] According to various embodiments of this disclosure, a vertical cavity surface laser and a method for fabricating the same are provided.

[0007] According to various embodiments of the present disclosure, a method for fabricating a vertical-cavity surface-mount laser is provided. The vertical-cavity surface-mount laser has at least one device region, the device region including an electrode region and a light-emitting region, the electrode region being located on one side of the light-emitting region. The method includes:

[0008] Provide a base;

[0009] A first electrode is formed on the substrate of the electrode region;

[0010] A first passivation layer is formed covering the substrate and the first electrode;

[0011] A first conductive layer is formed on the side of the first passivation layer away from the substrate. The orthographic projection of the first conductive layer on the substrate overlaps with the orthographic projection of the first electrode on the substrate, and extends from the overlapping portion in a direction away from the orthographic projection of the light-emitting area on the substrate.

[0012] Based on a preset mask, the first passivation layer is etched to form a via. The preset mask has a first opening. The orthographic projection of the first opening on the substrate covers the orthographic projection of the via on the substrate and extends into the orthographic projection of the first conductive layer on the substrate.

[0013] A second conductive layer is formed to fill the via and cover the first conductive layer.

[0014] In some embodiments, before forming the second conductive layer that fills the via and covers the first conductive layer, the following steps are included:

[0015] A second passivation layer is formed that at least covers the first passivation layer located in the light-emitting region.

[0016] In some embodiments, the second passivation layer at least covers the first passivation layer on the surface of the light-emitting region.

[0017] In some embodiments, the second passivation layer is disposed between a portion of the first conductive layer and the second conductive layer, and between a portion of the substrate and the second conductive layer.

[0018] In some embodiments, in a direction parallel to the substrate and pointing from the light-emitting region to the electrode region, the orthographic projection width of the first opening on the substrate is x1, and the sum of the orthographic projection width of the first electrode on the substrate and the orthographic projection width of the first conductive layer on the substrate is x2, wherein x1 < x2.

[0019] In some embodiments, the device region further includes a slotted region located on the side of the electrode region away from the light-emitting region, and the process prior to forming the first passivation layer covering the substrate and the first electrode includes:

[0020] An oxidation confinement groove is formed within the substrate located in the grooved area.

[0021] In some embodiments, the substrate includes a substrate and a first DBR layer, a quantum well layer, a confinement layer and a second DBR layer sequentially stacked on one side of the substrate, wherein the oxide confinement trench exposes at least the first DBR layer.

[0022] In some embodiments, the orthogonal projection of the oxidation confinement groove onto the substrate surrounds the electrode region.

[0023] In some embodiments, forming a first conductive layer on the side of the first passivation layer opposite to the substrate includes:

[0024] A first conductive layer is formed extending from above the first electrode into the oxidation confinement trench.

[0025] In some embodiments, after forming a second conductive layer that fills the via and covers the first conductive layer, the method further includes forming a second electrode on the side of the substrate opposite to the first electrode.

[0026] According to various embodiments of this disclosure, a vertical-cavity surface-mount laser (VCSEL) is also provided. The VCSEL has at least one device region, which includes an electrode region and a light-emitting region. The electrode region is located on one side of the light-emitting region. The VCSEL includes:

[0027] Base;

[0028] A first electrode is located on the substrate of the electrode region;

[0029] A first passivation layer covers the substrate and the first electrode, and has a through-hole exposing the first electrode;

[0030] The first conductive layer is located on the side of the first passivation layer away from the substrate. The orthographic projection of the first conductive layer on the substrate overlaps with the orthographic projection of the first electrode on the substrate, and extends from the overlapping portion in a direction away from the orthographic projection of the light-emitting area on the substrate.

[0031] A second conductive layer fills the via and covers the first conductive layer.

[0032] In some embodiments, the device region further includes a slotted region located on the side of the electrode region away from the light-emitting region, and the vertical-cavity surface laser further includes:

[0033] An oxidation limiting tank is located within the substrate of the grooved area.

[0034] In some embodiments, the first conductive layer extends in a direction parallel to the substrate and from the light-emitting region to the electrode region, the orthographic projection width of the first conductive layer on the substrate is x3, and the distance between the orthographic projection of the via on the substrate and the orthographic projection of the oxide confinement trench on the substrate is x4, wherein x3 ≥ x4.

[0035] In some embodiments, the first conductive layer extends at least from above the first electrode to the oxidation confinement trench.

[0036] In some embodiments, the vertical cavity surface laser further includes:

[0037] The second passivation layer includes a first passivation portion and a second passivation portion;

[0038] The first passivation portion is located on the surface of the substrate in the light-emitting region;

[0039] The second passivation portion is located between a portion of the first conductive layer and the second conductive layer, and between a portion of the substrate and the second conductive layer. The orthographic projection of the second passivation portion on the substrate does not overlap with the orthographic projection of the via on the substrate and the orthographic projection of a portion of the first conductive layer on the substrate.

[0040] Details of one or more embodiments of this disclosure are set forth in the following drawings and description. Other features, objects, and advantages of this disclosure will become apparent from the specification, drawings, and claims. Attached Figure Description

[0041] To more clearly illustrate the technical solutions in the embodiments or conventional technologies of this disclosure, the accompanying drawings used in the description of the embodiments or conventional technologies will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0042] Figure 1 is a schematic cross-sectional structure of a conventional vertical cavity surface laser.

[0043] Figure 2 is a top view of a conventional vertical cavity surface laser.

[0044] Figure 3 is a schematic flowchart of a method for fabricating a vertical cavity surface laser according to an embodiment;

[0045] Figures 4-6 are schematic cross-sectional views of a vertical cavity surface laser provided in one embodiment;

[0046] Figure 7 is a schematic cross-sectional structure of another vertical cavity surface laser provided in one embodiment;

[0047] Figure 8 is a top view of a vertical cavity surface laser according to an embodiment;

[0048] Figure 9 is a top view of one of the device regions in Figure 8.

[0049] To better describe and illustrate embodiments and / or examples of the inventions disclosed herein, reference may be made to one or more accompanying drawings. Additional details or examples used to describe the drawings should not be considered as limiting the scope of any of the disclosed inventions, the currently described embodiments and / or examples, or the best mode of these inventions as currently understood. Detailed Implementation

[0050] To facilitate understanding of this disclosure, a more complete description will now be given with reference to the accompanying drawings, in which preferred embodiments of the present disclosure are shown. However, this disclosure may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

[0051] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of this disclosure.

[0052] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, parts, regions, layers, doping types, and / or portions, these elements, parts, regions, layers, doping types, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, part, region, layer, doping type, or portion from another element, part, region, layer, doping type, or portion. Therefore, without departing from the teachings of this disclosure, the first element, part, region, layer, doping type, or portion discussed below may be referred to as a second element, part, region, layer, or portion.

[0053] Spatial relation terms such as “below,” “under,” “below,” “under,” “above,” “above,” etc., are used herein to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, the element or feature described as “below,” “under,” or “below” will be oriented “above” the other element or feature. Therefore, the exemplary terms “below” and “under” can include both above and below orientations. Furthermore, the device may also include other orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptive terms used herein will be interpreted accordingly.

[0054] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that when the terms “comprise” and / or “comprising” are used in this specification, the presence of the stated feature, integer, step, operation, element, and / or part is established, but the presence or addition of one or more other features, integers, steps, operations, elements, parts, and / or groups is not excluded. Meanwhile, when used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0055] The related structures of the embodiments of this disclosure should not be limited to the specific shapes of the structures shown in the accompanying drawings, but should include shape deviations due to, for example, manufacturing techniques.

[0056] Based on the background information, referring to Figure 1, which is a cross-sectional view of a conventional vertical-cavity surface-mount laser (VCSEL), and referring to Figure 2, which is a top view of a conventional VCSEL, the conventional VCSEL, after forming a passivation layer 03 on the electrode 02 and the substrate 01, etches the passivation layer 03 on the electrode 02 using a mask. The etched hole 04 exposes the electrode 02, and a conductive layer 05 leads the electrode to the pad 07. To ensure the reliability of the VCSEL, the width of the opening on the mask needs to be smaller than the width of the electrode 02; that is, the etched hole 04 can only expose the electrode and not the substrate 01. Due to the width of the electrode 02 and the process limitations of the etched hole 04, the emission port 06 of the VCSEL is limited under a fixed emission area, thus limiting the effective emission area. As shown in Figure 2, when the emission area is 127.6 × 98.74 μm... 2 At that time, 16 emission areas were set, the area of ​​the light emission port was 12um, and the overall effective light emission area was 14.36%.

[0057] Based on this, this application provides a vertical-cavity surface-mount laser (VCSEL) and its fabrication method. The VCSEL has at least one device region, which includes an electrode region and a light-emitting region. First, a substrate is provided. A first electrode is formed on the substrate of the electrode region. Then, a first passivation layer is formed on the substrate and the first electrode. On the side of the first passivation layer facing away from the substrate, a first conductive layer is formed. This first conductive layer at least covers a portion of the first passivation layer above the first electrode and extends in a direction away from the orthogonal projection of the light-emitting region onto the substrate. When the first passivation layer is etched based on a preset mask, since the first conductive layer can protect the first passivation layer from etching, the orthogonal projection of the first opening of the preset mask onto the substrate can cover the orthogonal projection of the via onto the substrate and extend into the orthogonal projection of the first conductive layer onto the substrate. At this time, the size of the first opening is not limited by the first electrode, so the width of the first electrode can be set narrower, thereby freeing up space for the light-emitting region. Thus, with a fixed emitting area, the effective emitting area of ​​the light-emitting region of each device region is increased, improving the overall luminous efficiency of the VCSEL.

[0058] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, this application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0059] Please refer to Figure 3, which is a flowchart illustrating a method for fabricating a vertical-cavity surface-mount laser according to an embodiment of this application. Also refer to Figures 4-6, which are cross-sectional structural diagrams of a vertical-cavity surface-mount laser according to an embodiment of this application. The vertical-cavity surface-mount laser has at least one device region A, which includes an electrode region b and a light-emitting region a. The electrode region b is located on one side of the light-emitting region a. The method includes the following steps:

[0060] Step S101: Provide substrate 10 (as shown in Figure 4).

[0061] In this step, the substrate 10 includes a substrate 11, and a first distributed Bragg reflector (DBR) layer 12, a quantum well layer 13, a confinement layer 14, and a second DBR layer 15 sequentially stacked on one side of the substrate 11. The first DBR layer 12 can be an N-type DBR layer, and the second DBR layer 15 can be a P-type DBR layer; no specific limitation is made.

[0062] With a fixed emitting area, the device regions A of a vertical-cavity surface-mount laser (VCSEL) can be arrayed on the substrate 10 to improve the uniformity of laser emission. Each device region A includes an electrode region b and an emission region a, with the electrode region b surrounding the emission region a.

[0063] Step S102: Form a first electrode 17 on the substrate 10 of electrode region b (as shown in Figure 4).

[0064] In this step, a first electrode 17 is formed on the substrate 10 of electrode region b by deposition. The first electrode 17 can be a P-type electrode for forming an ohmic contact with the second DBR layer 15.

[0065] Step S103: Form a first passivation layer 18 covering the substrate 10 and the first electrode 17 (as shown in Figures 5 and 6).

[0066] In this step, the first passivation layer 18 can be used to protect the substrate 10, adjust the electric field distribution, and reduce the generation of parasitic capacitance. It can also be used to adjust light reflection and improve the light output quality of the device.

[0067] Step S104: A first conductive layer 19 is formed on the side of the first passivation layer 18 facing away from the substrate 10 (as shown in Figures 5 and 6).

[0068] The orthographic projection of the first conductive layer 19 on the substrate 10 overlaps with the orthographic projection of the first electrode 17 on the substrate 10, and extends from the overlapping portion toward the orthographic projection of the light-emitting region a on the substrate 10.

[0069] In this step, the first conductive layer 19 is formed by deposition or electroplating. A portion of the first conductive layer 19 is disposed on the surface of the first passivation layer 18 on the first electrode 17, and another portion extends to the surface of the first passivation layer 18 on the substrate 10. It can serve as an etching barrier layer to prepare for subsequent fabrication.

[0070] Step S105: Based on the preset mask 20, the first passivation layer 18 is etched to form a via 21. The preset mask 20 has a first opening 22. The orthographic projection of the first opening 22 on the substrate 10 covers the orthographic projection of the via 21 on the substrate 10 and extends into the orthographic projection of the first conductive layer 19 on the substrate 10 (as shown in Figure 5).

[0071] In this step, a preset mask 20 is provided on the side of the first conductive layer 19 facing away from the substrate 10 to form a through hole 21 exposing the first electrode 17. At this time, the first passivation layer 18 is etched based on the preset mask 20. Due to the selective etching, the first conductive layer 19 is not etched, but only the portion of the first passivation layer 18 located above the first electrode 17 is etched, exposing the first electrode 17 so that the electrode can be led out.

[0072] Since the first conductive layer 19 is pre-set in step S104, the first opening 22 of the preset mask 20 can be larger than the width of the first electrode 17. For example, the orthographic projection of the first opening 22 on the substrate 10 covers the orthographic projection of the via 21 on the substrate 10 and extends into the orthographic projection of the first conductive layer 19 on the substrate 10. Compared with the conventional first opening 22, whose width is limited by the width of the first electrode 17 and the process limitation of the first opening 22, this application can increase the width of the first opening 22 and reduce the width of the first electrode 17. The reduced width of the first electrode 17 is used to give way to the light-emitting area a, which can increase the effective light-emitting area of ​​the device region A.

[0073] After forming the through-hole 21, the preset mask 20 is removed to facilitate the formation of subsequent film layers.

[0074] Step S106: Form a second conductive layer 23 that fills the through-hole 21 and covers the first conductive layer 19 (as shown in Figure 6).

[0075] In this step, the second conductive layer 23 is formed by deposition or electroplating.

[0076] The second conductive layer 23 fills the through hole 21 and covers the first conductive layer 19. The first electrode 17 can be led out from the through hole 21 and connected to the first conductive layer 19, which enables the current to be injected into the quantum well layer 13 more effectively, thereby improving the device's light emission power.

[0077] In this embodiment, when the first passivation layer 18 is etched based on the preset mask 20, since the first conductive layer 19 can protect the first passivation layer 18 from being etched, the orthogonal projection of the first opening 22 on the substrate 10 can cover the orthogonal projection of the via 21 on the substrate 10 and extend into the orthogonal projection of the first conductive layer 19 on the substrate 10. At this time, the size of the first opening 22 is not limited by the first electrode 17, so the width of the first electrode 17 can be set narrower, thereby freeing up some space for the light-emitting area a. At this time, under a fixed emission area, the effective area of ​​the light-emitting area a of each device region A is increased, improving the luminous efficiency of the entire vertical cavity surface laser.

[0078] In another embodiment of this application, as shown in FIG5, in a direction parallel to the substrate 10 and pointing from the light-emitting region a to the electrode region b, the orthographic projection width of the first opening 22 on the substrate 10 is x1, and the sum of the orthographic projection width of the first electrode 17 on the substrate 10 and the orthographic projection width of the first conductive layer 19 on the substrate 10 is x2, wherein x1 < x2.

[0079] Specifically, the first passivation layer 18 serves to protect the substrate 10. Etching away the first passivation layer 18 located on the surface of the substrate 10 will affect the performance of the device. The first conductive layer 19 can serve as a protective layer for the first passivation layer 18 located between the first conductive layer 19 and the substrate 10. In order to increase the width of the first opening 22 without affecting the performance of the device, the width x1 of the first opening 22 can be set to be less than the sum of the orthogonal projection width of the first electrode 17 on the substrate 10 and the orthogonal projection width of the first conductive layer 19 on the substrate 10, x2, under the condition of being larger than the minimum process technology.

[0080] In this embodiment, by setting the width of the first opening 22, the overall performance of the device can be guaranteed while reducing the width of the first electrode 17 and increasing the effective light-emitting area.

[0081] In another embodiment of this application, as shown in FIG4, device region A further includes a slotted region c, which is located on the side of electrode region b away from light-emitting region a, and includes the following before S103:

[0082] Step S1031: An oxidation confinement groove 24 is formed in the substrate 10 located in the grooved area c.

[0083] Specifically, the oxidation confinement groove 24 can be formed by etching. The width of the oxidation confinement groove 24 can be the narrowest possible etching process dimension.

[0084] As shown in Figure 6, the oxide confinement groove 24 exposes at least the first DBR layer 12 to facilitate the oxidation of the confinement layer 14 to form an oxide hole 25. The width of the oxide hole 25 can be d, and the orthographic projection of the oxide hole 25 on the substrate 10 has a distance from the orthographic projection of the first electrode 17 on the substrate 10, that is, d is less than a. It should be noted that since the width of the first electrode 17 can be reduced, giving more space to the light-emitting area a, the width of the oxide hole 25 can be adjusted to be larger, increasing the optical aperture, that is, increasing the effective light-emitting area.

[0085] The orthogonal projection of the oxide confinement trench 24 onto the substrate 10 surrounds the electrode region b. Water vapor passes through the sidewall of the oxide confinement trench 24 in a wet process, causing the high-alumina AlGaAs material layer to be oxidized to form the confinement layer 14 and the unoxidized oxide hole 25. The confinement layer 14 has a high resistance and a low refractive index, which can effectively confine the electric field and optical field near the quantum well layer 13, increase the current density of the quantum well layer 13 under the oxide hole 25, and cause the charge carriers to recombine in the quantum well layer 13 to generate more photons. The photons are reflected back and forth in the device through the first DBR layer 12 and the second DBR layer 15, which helps to reduce the threshold current of the laser and improve its luminous efficiency.

[0086] In another embodiment of this application, as shown in FIG5, step S1031 includes:

[0087] A first conductive layer 19 is formed extending from above the first electrode 17 into the oxide confinement trench 24.

[0088] Specifically, the first conductive layer 19 extends to both sides from the oxide confinement trench 24 so that the orthographic projection of the first conductive layer 19 on the substrate 10 overlaps with the orthographic projection of the first electrode 17 on the substrate 10.

[0089] The first conductive layer 19 can be filled using a deposition process. The first conductive layer 19 can be made of a metallic material.

[0090] In this embodiment, the first conductive layer 19 extends from above the first electrode 17 into the oxide confinement trench 24, which can increase the width of the first opening 22 and facilitate the subsequent deposition of the second conductive layer 23 or the second passivation layer, thereby improving the product quality and process tolerance.

[0091] In another embodiment of this application, referring to FIG7, FIG7 is a schematic cross-sectional structure diagram of another vertical cavity surface laser provided in an embodiment of this application; before step S106, the following is included:

[0092] Step S1061: Form a second passivation layer 26 that at least covers the first passivation layer 18 located in the light-emitting region a.

[0093] Specifically, the second passivation layer 26 at least covers the first passivation layer 18 on the surface of the light region a.

[0094] In this embodiment, two passivation layers are provided on the substrate 10, which can further protect the various layers on the substrate 10 and improve the reliability and consistency of the device.

[0095] Furthermore, on the side parallel to the substrate 10 and away from the light-emitting region a in the oxide confinement trench 24, a second passivation layer 26 may also be disposed between a portion of the first conductive layer 19 and the second conductive layer 23, and between a portion of the substrate 10 and the second conductive layer 23. Leakage may occur between the first conductive layer 19 and the second conductive layer 23, and between the substrate 10 and the second conductive layer 23. The second passivation layer 26 can act as an insulator, thereby reducing some current leakage and allowing current to be injected more effectively into the quantum well layer 13, thus improving the device's luminous power.

[0096] After forming the above structure, a second electrode 16 is formed on the side of the substrate 10 opposite to the first electrode 17 to enable the vertical cavity surface laser to emit laser light. The second electrode 16 can be an N-type electrode.

[0097] Based on the above-described fabrication method of a vertical-cavity surface-mount laser, as shown in Figure 6, this application also provides a vertical-cavity surface-mount laser. The vertical-cavity surface-mount laser has at least one device region A, which includes an electrode region b and a light-emitting region a. The electrode region b is located on one side of the light-emitting region a. The vertical-cavity surface-mount laser includes:

[0098] Base 10;

[0099] The first electrode 17 is located on the substrate 10 of the electrode region b;

[0100] A first passivation layer 18 covers the substrate 10 and the first electrode 17, and has a through-hole 21 exposing the first electrode 17;

[0101] The first conductive layer 19 is located on the side of the first passivation layer 18 away from the substrate 10. The orthographic projection of the first conductive layer 19 on the substrate 10 overlaps with the orthographic projection of the first electrode 17 on the substrate 10, and extends from the overlapping portion in a direction away from the orthographic projection of the light-emitting region a on the substrate 10.

[0102] The second conductive layer 23 fills the through-hole 21 and covers the first conductive layer 19.

[0103] Specifically, the substrate 10 includes a substrate 11, and a first DBR layer 12, a quantum well layer 13, a confinement layer 14, and a second DBR layer 15 sequentially stacked on one side of the substrate 11. The first DBR layer 12 can be an N-type DBR layer, and the second DBR layer 15 can be a P-type DBR layer, without any specific limitation.

[0104] With a fixed emitting area, at least one device region A may be included, which can be arrayed on the substrate 10 to improve the laser emission uniformity of the vertical cavity surface laser. In each device region A, the electrode region b surrounds the emitting region a.

[0105] The first electrode 17 is made of metallic material and forms an ohmic contact with the substrate 10.

[0106] The first passivation layer 18 can be made of a transparent material to facilitate the emission of laser light from the light outlet.

[0107] The first conductive layer 19 can serve as an etching barrier layer. When forming the via 21, the process of forming the via 21 is no longer limited by the width of the first electrode 17 due to the presence of the first conductive layer 19. At this time, the width of the first electrode 17 can be designed to be narrower, leaving more space for the light outlet, thereby increasing the effective light output area of ​​the light outlet.

[0108] The second conductive layer 23 may be made of the same material as the first conductive layer 19, or they may be different. The second conductive layer 23 leads the first electrode 17 from the through-hole 21 to the pad 27 (as shown in Figure 8). The pad 27 may be located on the side of the first passivation layer 18 away from the substrate 10 and connected to an external circuit. The second electrode 16 is located on the side of the substrate 10 away from the first electrode 17.

[0109] In this embodiment, since the first conductive layer 19 can protect the first passivation layer 18 from etching, the width of the first electrode 17 can be made narrower, thereby freeing up some space for the light-emitting region a. At this time, with a fixed emitting area, the effective area of ​​the light-emitting region a in each device region A is increased, improving the overall luminous efficiency of the vertical cavity laser.

[0110] In another embodiment of this application, as shown in FIG4, device region A further includes a slotted region c, which is located on the side of electrode region b away from light-emitting region a. The vertical cavity surface laser further includes:

[0111] The oxidation confinement tank 24 is located within the base 10 of the grouted area c.

[0112] Specifically, the oxide confinement groove 24 can restrict the path of current injection, allowing the current to flow uniformly to the oxide hole 25, reducing the threshold current and improving the luminous efficiency of the vertical cavity surface laser.

[0113] In another embodiment of this application, as shown in FIG7, the first conductive layer 19 extends in a direction parallel to the substrate 10 and from the light-emitting region a to the electrode region b. The orthographic projection width of the first conductive layer 19 on the substrate 10 is x3, and the distance between the orthographic projection of the via 21 on the substrate 10 and the orthographic projection of the oxide confinement trench 24 on the substrate 10 is x4, wherein x3≥x4.

[0114] Specifically, the width x3 of the first conductive layer 19 can be set to a minimum of x4, which is the distance between the orthographic projection of the via 21 on the substrate 10 and the orthographic projection of the oxide confinement trench 24 on the substrate 10. For example, the first conductive layer 19 can extend to fill part of the oxide confinement trench 24, or the first conductive layer 19 can extend to fill the oxide confinement trench 24, or the first conductive layer 19 can fill the oxide confinement trench 24 and then continue to extend to cover the oxide confinement trench 24. No specific limitation is made in this regard.

[0115] In this embodiment, the width of the first conductive layer 19 is set to be relatively long, which allows for fewer process restrictions when forming the via 21 and ensures that the width of the first electrode 17 is set to be relatively narrow, thereby making room for the light outlet and increasing the effective light output area of ​​the vertical cavity surface laser.

[0116] In another embodiment of this application, as shown in Figures 6 and 7, the first conductive layer 19 extends at least from above the first electrode 17 to the oxide confinement trench 24.

[0117] Specifically, in this embodiment, the first conductive layer 19 can fill part of the oxide confinement trench 24 or completely fill the oxide confinement trench 24, which can increase the width of the first opening 22 and facilitate the subsequent deposition of the second conductive layer 23 or the passivation layer, thereby improving the product quality and process tolerance.

[0118] In another embodiment of this application, as shown in FIG7, the vertical cavity surface laser further includes:

[0119] The second passivation layer 26 includes a first passivation portion 26a and a second passivation portion 26b.

[0120] The first passivation section 26a is located on the surface of the substrate 10 in the light-emitting region a;

[0121] The second passivation portion 26b is located between a portion of the first conductive layer 19 and the second conductive layer 23, and between a portion of the substrate 10 and the second conductive layer 23. The orthographic projection of the second passivation portion 26b on the substrate 10 does not overlap with the orthographic projection of the via 21 on the substrate 10 and the orthographic projection of a portion of the first conductive layer 19 on the substrate 10.

[0122] Specifically, the first passivation portion 26a covers the first passivation layer 18 on the surface of the light-emitting region a. The first passivation portion 26a can reduce the reflection loss of light at the light-emitting port. When light is emitted from the quantum well layer 13, the first passivation portion 26a can enable the light to be effectively output from the light-emitting port, thereby improving the light extraction efficiency of the device and enhancing the light-emitting power of the device.

[0123] Parallel to the substrate 10 and on the side of the oxide confinement trench 24 furthest from the light-emitting region a, the second passivation portion 26b may also be disposed between a portion of the first conductive layer 19 and the second conductive layer 23, and between a portion of the substrate 10 and the second conductive layer 23. Leakage may occur between the first conductive layer 19 and the second conductive layer 23, and between the substrate 10 and the second conductive layer 23. The second passivation layer 26b can act as an insulator, thereby reducing some current leakage and allowing current to be injected more effectively into the quantum well layer 13, thus improving the device's luminous power.

[0124] Referring to Figure 8, which is a top view of a vertical-cavity surface-mount laser (VCSEL) according to an embodiment of this application; referring to Figure 9, which is a top view of one of the device regions in Figure 8; this application also provides a VCSEL formed in the above manner, with the same emitting area as the conventional one. For example, when the emitting area is 127.6 × 98.74 μm 2When 16 emission regions are set, the area of ​​the light-emitting region a can be 15.6 μm, and the overall effective light-emitting area is 24.26%. Compared with the traditional type, the effective light-emitting area of ​​the vertical cavity surface laser in this application is significantly larger.

[0125] In the description of this specification, references to terms such as "some embodiments," "other embodiments," "ideal embodiments," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this disclosure. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.

[0126] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features of the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0127] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A method for fabricating a vertical-cavity surface-mount laser (VCSEL), wherein the VCSEL has at least one device region, the device region including an electrode region and a light-emitting region, the electrode region being located on one side of the light-emitting region, the method comprising: Provide a base; A first electrode is formed on the substrate of the electrode region; A first passivation layer is formed covering the substrate and the first electrode; A first conductive layer is formed on the side of the first passivation layer away from the substrate. The orthographic projection of the first conductive layer on the substrate overlaps with the orthographic projection of the first electrode on the substrate, and extends from the overlapping portion in a direction away from the orthographic projection of the light-emitting area on the substrate. Based on a preset mask, the first passivation layer is etched to form a via. The preset mask has a first opening. The orthographic projection of the first opening on the substrate covers the orthographic projection of the via on the substrate and extends into the orthographic projection of the first conductive layer on the substrate. A second conductive layer is formed to fill the via and cover the first conductive layer.

2. The method for fabricating a vertical-cavity surface-mount laser according to claim 1, wherein, Before forming the second conductive layer that fills the via and covers the first conductive layer, the process includes: A second passivation layer is formed that at least covers the first passivation layer located in the light-emitting region.

3. The method for fabricating a vertical-cavity surface-mount laser according to claim 2, wherein, The second passivation layer at least covers the first passivation layer on the surface of the light-emitting region.

4. The method for fabricating a vertical-cavity surface-mount laser according to claim 2, wherein, The second passivation layer is disposed between a portion of the first conductive layer and the second conductive layer, and between a portion of the substrate and the second conductive layer.

5. The method for fabricating a vertical-cavity surface-mount laser according to claim 1, wherein, In a direction parallel to the substrate and pointing from the light-emitting area to the electrode area, the orthographic projection width of the first opening on the substrate is x1, and the sum of the orthographic projection width of the first electrode on the substrate and the orthographic projection width of the first conductive layer on the substrate is x2, where x1 < x2.

6. The method for fabricating a vertical-cavity surface-mount laser according to claim 1, wherein, The device region further includes a slotted area located on the side of the electrode region away from the light-emitting area. Before forming the first passivation layer covering the substrate and the first electrode, the process includes: An oxidation confinement groove is formed within the substrate located in the grooved area.

7. The method for fabricating a vertical-cavity surface-mount laser according to claim 6, wherein, The substrate includes a substrate, and a first DBR layer, a quantum well layer, a confinement layer and a second DBR layer sequentially stacked on one side of the substrate, wherein the oxide confinement trench exposes at least the first DBR layer.

8. The method for fabricating a vertical-cavity surface-mount laser according to claim 6, characterized in that, The orthogonal projection of the oxidation confinement groove onto the substrate surrounds the electrode region.

9. The method for fabricating a vertical-cavity surface-mount laser according to claim 6, wherein, The formation of a first conductive layer on the side of the first passivation layer opposite to the substrate includes: A first conductive layer is formed extending from above the first electrode into the oxidation confinement trench.

10. The method for fabricating a vertical-cavity surface-mount laser according to claim 1, characterized in that, After forming the second conductive layer that fills the through-hole and covers the first conductive layer, the method further includes forming a second electrode on the side of the substrate opposite to the first electrode.

11. A vertical-cavity surface-mount laser, the vertical-cavity surface-mount laser having at least one device region, the device region including an electrode region and a light-emitting region, the electrode region being located on one side of the light-emitting region, the vertical-cavity surface-mount laser comprising: Base; A first electrode is located on the substrate of the electrode region; A first passivation layer covers the substrate and the first electrode, and has a through-hole exposing the first electrode; The first conductive layer is located on the side of the first passivation layer away from the substrate. The orthographic projection of the first conductive layer on the substrate overlaps with the orthographic projection of the first electrode on the substrate, and extends from the overlapping portion in a direction away from the orthographic projection of the light-emitting area on the substrate. A second conductive layer fills the via and covers the first conductive layer.

12. The vertical-cavity surface mount laser according to claim 11, wherein, The device region further includes a slotted region located on the side of the electrode region away from the light-emitting region. The vertical-cavity surface laser also includes: An oxidation limiting tank is located within the substrate of the grooved area.

13. The vertical-cavity surface mount laser according to claim 12, wherein, The first conductive layer extends in a direction parallel to the substrate and from the light-emitting area to the electrode area. The orthographic projection width of the first conductive layer on the substrate is x3, and the distance between the orthographic projection of the via on the substrate and the orthographic projection of the oxide confinement trench on the substrate is x4, wherein x3 ≥ x4.

14. The vertical-cavity surface mount laser according to claim 13, wherein, The first conductive layer extends at least from above the first electrode to the oxidation confinement trench.

15. The vertical-cavity surface-mount laser according to claim 14, wherein, The vertical cavity surface laser also includes: The second passivation layer includes a first passivation portion and a second passivation portion; The first passivation portion is located on the surface of the substrate in the light-emitting region; The second passivation portion is located between a portion of the first conductive layer and the second conductive layer, and between a portion of the substrate and the second conductive layer. The orthographic projection of the second passivation portion on the substrate does not overlap with the orthographic projection of the via on the substrate and the orthographic projection of a portion of the first conductive layer on the substrate.

Images