Display substrate and manufacturing method therefor, and display apparatus

Abstract

Provided is a display substrate, comprising: a base substrate; a drive circuit layer located on one side of the base substrate, wherein the drive circuit layer comprises a first via hole and a first connecting portion, and at least part of the first connecting portion is located in the first via hole; and an electrically conductive reflective layer located on the side of the drive circuit layer away from the base substrate, wherein the electrically conductive reflective layer is electrically connected to the drive circuit layer by means of the first connecting portion; the electrically conductive reflective layer comprises a first electrically conductive portion and a second electrically conductive portion; the conductivity of the material of the first electrically conductive portion is lower than the conductivity of the material of the second electrically conductive portion; the first electrically conductive portion and the second electrically conductive portion are arranged adjacent to each other in a first direction; the second electrically conductive portion comprises two side walls arranged opposite each other in the first direction; the first electrically conductive portion at least covers the two side walls of the second electrically conductive portion; the orthographic projection of the first connecting portion on the base substrate is located within the orthographic projection of the electrically conductive reflective layer on the base substrate; the first connecting portion comprises an exposed surface exposed outside the first via hole; and at least part of the exposed surface is spaced apart from the first electrically conductive portion.

Description

Display substrate and its preparation method, display device Technical Field

[0001] This disclosure relates to the field of display technology, and in particular to display substrates and their preparation methods, and display devices. Background Technology

[0002] Organic light-emitting diodes (OLEDs) are microdisplays that have emerged in recent years. Using mature silicon-based semiconductor processes, high-PPI (pixel density) and high-refresh-rate OLED displays can be fabricated for applications in VR (Virtual Reality) and AR (Augmented Reality) fields. In related technologies, the reflective metal layer is covered by a protective metal layer, which also covers the tungsten vias in the driving circuit layer. The high impedance of the protective metal leads to poor conductivity from the tungsten vias to the anode, affecting the display effect of the display substrate.

[0003] The information disclosed in this section is only for understanding the background of the inventive concept of this disclosure, and therefore may include information that does not constitute prior art. Summary of the Invention

[0004] To address at least one aspect of the above-mentioned problems, embodiments of this disclosure provide a display substrate, a method for preparing the same, and a display device.

[0005] One aspect of the embodiments of this disclosure provides a display substrate, comprising:

[0006] Substrate;

[0007] A driving circuit layer, located on one side of the substrate, includes a first via and a first connection portion, at least a portion of the first connection portion being located in the first via; and

[0008] A conductive reflective layer is located on the side of the driving circuit layer away from the substrate. The conductive reflective layer is electrically connected to the driving circuit layer through the first connecting portion.

[0009] The conductive reflective layer includes a first conductive portion and a second conductive portion. The conductivity of the material of the first conductive portion is lower than that of the material of the second conductive portion. The first conductive portion and the second conductive portion are disposed adjacent to each other along a first direction. The second conductive portion includes two sidewalls disposed opposite to each other along the first direction. The first conductive portion at least covers the two sidewalls of the second conductive portion.

[0010] The orthographic projection of the first connection portion on the substrate is located within the orthographic projection of the conductive reflective layer on the substrate. The first connection portion includes an exposed surface exposed outside the first via, and at least a portion of the exposed surface is spaced apart from the first conductive portion.

[0011] According to some exemplary embodiments, at least a portion of the exposed surface is in contact with the second conductive portion.

[0012] According to some exemplary embodiments, the first conductive portion includes a first sub-conductive portion and a second sub-conductive portion, the first sub-conductive portion covering the sidewall of the second conductive portion, and the second sub-conductive portion extending from the first sub-conductive portion toward the second conductive portion in a first direction.

[0013] According to some exemplary embodiments, the exposed surface includes a first sub-surface, which is the surface of the first connection portion away from the substrate, the first sub-surface is parallel to a first direction, and each of the first sub-conductive portion and the second sub-conductive portion is spaced apart from the first sub-surface.

[0014] According to some exemplary embodiments, the first sub-surface is covered by the second conductive portion.

[0015] According to some exemplary embodiments, the first connecting portion includes a first connecting sub-port and a second connecting sub-port, the first connecting sub-port protruding from the first through hole, and the second connecting sub-port located in the first through hole;

[0016] The exposed surface further includes a second sub-surface, the second sub-surface being a side surface of the first connecting sub-part, and the second sub-surface being adjacent to the first sub-surface; and

[0017] At least a portion of the second sub-surface is spaced apart from the first conductive portion.

[0018] According to some exemplary embodiments, at least a portion of the first sub-surface is covered by the first conductive portion; and at least a portion of the second sub-surface is covered by the second conductive portion.

[0019] According to some exemplary embodiments, the cross-section of the first connecting sub-part in the light-emitting direction of the display substrate is an inverted trapezoid.

[0020] According to some exemplary embodiments, the display substrate further includes:

[0021] An interlayer insulating layer is located on the side of the driving circuit layer away from the substrate. The interlayer insulating layer includes a groove, and the first conductive portion and the second conductive portion are located in the groove.

[0022] According to some exemplary embodiments, the interlayer insulating layer includes a first insulating portion and a second insulating portion, wherein the second insulating portion is located on the side of the first insulating portion away from the substrate.

[0023] The orthographic projection of the second insulating portion on the substrate does not overlap with the orthographic projection of the conductive reflective layer on the substrate;

[0024] The first insulating portion includes a second via, and the first connecting portion extends through the second via to be electrically connected to the conductive reflective layer.

[0025] According to some exemplary embodiments, the display substrate further includes a plurality of pixels, which are arranged in an array along a first direction and a second direction, and the plurality of pixels include a first pixel, a second pixel and a third pixel;

[0026] The conductive reflective layers of the first pixel, the second pixel, and the third pixel are arranged alternately along at least one of the first direction and the second direction, and an interlayer insulating layer is disposed between two adjacent conductive reflective layers.

[0027] According to some exemplary embodiments, the thickness of the second conductive portion in the first pixel, the second pixel, and the third pixel is equal to that of each other.

[0028] According to some exemplary embodiments, the display substrate further includes: an isolation layer located on the side of the conductive reflective layer away from the substrate;

[0029] The isolation layer includes a first isolation portion, a second isolation portion, and a third isolation portion, wherein the first isolation portion is located in the first pixel, the second isolation portion is located in the second pixel, and the third isolation portion is located in the third pixel;

[0030] The thickness of the first isolation portion is greater than the thickness of the second isolation portion, and the thickness of the second isolation portion is greater than the thickness of the third isolation portion.

[0031] According to some exemplary embodiments, the display substrate further includes: a first electrode layer located on the side of the isolation layer away from the substrate;

[0032] The first electrode layer includes a first sub-electrode, a second sub-electrode, and a third sub-electrode, wherein the first sub-electrode is located in the first pixel, the second sub-electrode is located in the second pixel, and the third sub-electrode is located in the third pixel;

[0033] The isolation layer includes a third via, through which the first sub-electrode, the second sub-electrode, and the third sub-electrode are electrically connected to the second conductive part.

[0034] According to some exemplary embodiments, a protective film is provided in the third via, the protective film covering at least a portion of the first sub-electrode, the second sub-electrode and the third sub-electrode located in the third via.

[0035] According to some exemplary embodiments, the display substrate further includes: a light-emitting functional layer located on the side of the first electrode layer away from the substrate; and a color filter layer located on the side of the light-emitting functional layer away from the substrate.

[0036] The color filter layer includes a first filter, a second filter, and a third filter. The first filter is located in the first pixel, the second filter is located in the second pixel, and the third filter is located in the third pixel.

[0037] The first filter is used to allow light of a first wavelength to pass through, the second filter is used to allow light of a second wavelength to pass through, and the third filter is used to allow light of a third wavelength to pass through; the first wavelength is greater than the second wavelength, and the second wavelength is greater than the third wavelength.

[0038] According to some exemplary embodiments, the material of the first conductive part includes one of Ti and Ta, and the material of the second conductive part includes one of Al, Ag, and Mg;

[0039] The material of the first connecting part includes W.

[0040] In another aspect of the embodiments of this disclosure, a display device is provided, the display device comprising a display substrate according to any of the preceding claims.

[0041] Another aspect of the embodiments of this disclosure provides a method for fabricating a display substrate, the method comprising the following steps:

[0042] A driving circuit layer is formed on a substrate, the driving circuit layer including a first via and a first connection portion, at least a portion of the first connection portion being located in the first via;

[0043] A conductive reflective layer is formed on the side of the driving circuit layer away from the substrate, and the conductive reflective layer is electrically connected to the driving circuit layer through the first connection portion;

[0044] The conductive reflective layer includes a first conductive portion and a second conductive portion. The conductivity of the material of the first conductive portion is lower than that of the material of the second conductive portion. The first conductive portion and the second conductive portion are disposed adjacent to each other along a first direction. The second conductive portion includes two sidewalls disposed opposite to each other in the first direction. The first conductive portion at least covers the two sidewalls of the second conductive portion. The orthographic projection of the first connecting portion on the substrate is located within the orthographic projection of the conductive reflective layer on the substrate. The first connecting portion includes an exposed surface exposed outside the first via. At least a portion of the exposed surface is spaced apart from the first conductive portion. Attached Figure Description

[0045] Other objects and advantages of this disclosure will become apparent from the following description of the disclosure with reference to the accompanying drawings, and will help to provide a comprehensive understanding of the disclosure.

[0046] Figure 1 schematically shows a cross-sectional view of a display substrate in the related art;

[0047] Figure 2A schematically illustrates a planar structure diagram of a display substrate according to some exemplary embodiments of the present disclosure;

[0048] Figure 2B schematically shows a cross-sectional view of a display substrate according to some exemplary embodiments of the present disclosure;

[0049] Figure 2C schematically shows a partial cross-sectional view of a display substrate according to some exemplary embodiments of the present disclosure;

[0050] Figure 2D schematically shows a partial cross-sectional view of a display substrate according to some exemplary embodiments of the present disclosure;

[0051] Figure 3A schematically illustrates a driving circuit principle diagram of a display substrate according to some exemplary embodiments of the present disclosure;

[0052] Figure 3B schematically illustrates a partial circuit diagram of a display substrate according to some exemplary embodiments of the present disclosure;

[0053] Figure 4A schematically shows a cross-sectional view of a display substrate according to some other exemplary embodiments of the present disclosure;

[0054] Figure 4B schematically shows a partial cross-sectional view of a display substrate according to some other exemplary embodiments of the present disclosure;

[0055] Figures 4C-4D schematically illustrate partial cross-sectional views of a display substrate according to some other exemplary embodiments of the present disclosure;

[0056] Figures 5A-5C schematically illustrate cross-sectional views of the relative positions of the first electrode layer and the conductive reflective layer according to some exemplary embodiments of the present disclosure;

[0057] Figure 6 schematically illustrates a structural diagram of a display device according to an embodiment of the present disclosure;

[0058] Figure 7 schematically illustrates a flowchart of a method for fabricating a display substrate according to an embodiment of the present disclosure.

[0059] It should be noted that, for clarity, the dimensions of layers, structures, or regions in the accompanying drawings used to describe embodiments of this disclosure may be enlarged or reduced; that is, these drawings are not drawn to actual scale. Detailed Implementation

[0060] The technical solutions of this disclosure will be further described in detail below through embodiments and in conjunction with the accompanying drawings. In this specification, the same or similar reference numerals indicate the same or similar components. The following description of the embodiments of this disclosure with reference to the accompanying drawings is intended to explain the overall inventive concept of this disclosure and should not be construed as a limitation thereof.

[0061] Furthermore, in the following detailed description, numerous specific details are set forth for ease of explanation to provide a thorough understanding of the embodiments disclosed herein. However, it will be apparent that one or more embodiments may be practiced without these specific details.

[0062] It should be understood that although the terms first, second, etc., may be used herein to describe different elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of the exemplary embodiments, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0063] It should be understood that when an element or layer is referred to as being "formed on" another element or layer, that element or layer may be formed directly or indirectly on the other element or layer. That is, for example, intermediate elements or intermediate layers may exist. Conversely, when an element or layer is referred to as being "directly formed on" another element or layer, there are no intermediate elements or intermediate layers. Other terms used to describe relationships between elements or layers (e.g., "between" and "directly between," "adjacent" and "directly adjacent," etc.) should be interpreted in a similar manner. Furthermore, the X-axis, Y-axis, and Z-axis are not limited to the three axes of a Cartesian coordinate system and can be interpreted in a broader sense. For example, the X-axis, Y-axis, and Z-axis may be perpendicular to each other or may represent different directions that are not perpendicular to each other. For the purposes of this disclosure, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" can be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z such as XYZ, XY, XZ, and YZ.

[0064] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments. As used herein, the singular forms are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that when the terms “comprising” and / or “including” are used herein, it indicates the presence of the stated features, integrals, steps, operations, elements, and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or combinations thereof.

[0065] In this document, unless otherwise expressly specified and limited, the term “connection” should be interpreted broadly. For example, “connection” can be a fixed connection, a detachable connection, or an integral part; it can be a direct connection or an indirect connection through an intermediate medium.

[0066] It should be noted that in this paper, "same layer" refers to a layer structure formed by using the same film deposition process to form a film layer for a specific pattern, and then using the same mask to pattern that film layer in a single patterning process. Depending on the specific pattern, a single patterning process may include multiple exposure, development, or etching processes, and the specific pattern in the formed layer structure can be continuous or discontinuous. That is, multiple elements, components, structures, and / or portions located in the "same layer" are made of the same or different materials and are formed by the same single patterning process. Typically, multiple elements, components, structures, and / or portions located in the "same layer" have approximately the same thickness.

[0067] Those skilled in the art will understand that, unless otherwise stated herein, the terms “height” or “thickness” refer to the dimensions along the surface of each film layer disposed perpendicular to the display substrate, i.e., the dimensions along the light-emitting direction of the display substrate, or the dimensions along the normal direction of the display device.

[0068] In this document, the term "transistor" can refer to a bipolar junction transistor (BJT), a thin-film transistor (TFT), a field-effect transistor (FET), or other devices with similar characteristics. In the embodiments of this disclosure, to distinguish the two terminals of a transistor other than the control terminal, one terminal is referred to as the first terminal, and the other as the second terminal. In actual operation, when the transistor is a TFT or a FET, the first terminal can be the drain, and the second terminal can be the source; alternatively, the first terminal can be the source, and the second terminal can be the drain.

[0069] Figure 1 schematically shows a cross-sectional view of a display substrate in the related art.

[0070] Referring to Figure 1, the display substrate 100 includes a driving circuit layer 012, a reflective metal layer 015, an insulating layer 016, an anode 017, a light-emitting layer 018, and a cathode 019. The bottom surface and sidewalls of the reflective metal layer 015 are covered by a protective metal portion 014 to ensure that the reflective metal layer 015 is not affected by subsequent process corrosion. Simultaneously, the protective metal portion 014 covers the tungsten via 013 connecting the driving circuit layer 012 and the reflective metal layer 015. Due to the high impedance of the protective metal portion 014, the conductivity from the tungsten via 013 to the anode 017 deteriorates, affecting the display substrate's brightness and other display effects.

[0071] To address at least one of the above problems, embodiments of this disclosure provide a display substrate, a method for preparing the same, and a display device.

[0072] Figure 2A schematically illustrates a planar structural diagram of a display substrate according to some exemplary embodiments of the present disclosure. Figure 2B schematically illustrates a cross-sectional view of a display substrate according to some exemplary embodiments of the present disclosure; for example, Figure 2B may be a cross-sectional view of the display substrate taken along line AA' in Figure 2A. Figure 2C schematically illustrates a partial cross-sectional view of a display substrate according to some exemplary embodiments of the present disclosure. Figure 2D schematically illustrates a partial cross-sectional view of a display substrate according to some exemplary embodiments of the present disclosure.

[0073] Exemplary, in some embodiments of this disclosure, referring to FIG2A, the display substrate 200 includes a display area AA and a plurality of pixel units PX located within the display area AA. Each pixel unit PX includes a plurality of pixels SP. The plurality of pixels SP are arranged in an array along a first direction X and a second direction Y. For example, the plurality of pixels include a first pixel SP1, a second pixel SP2, and a third pixel SP3 that are adjacent in the first direction X. The display substrate 200 also includes a pixel defining layer 16 having a plurality of pixel openings 201 that define a plurality of pixels SP. The pixel openings may be opening regions that include light-emitting areas.

[0074] Exemplary examples, in some embodiments of this disclosure, referring to Figures 2A and 2B, show that the display substrate 200 includes a substrate 11 and a first electrode layer 15 disposed on the substrate 11. The substrate 11 is, for example, a silicon-based substrate. Silicon-based substrates have mature fabrication processes and stable performance, making them suitable for fabricating highly integrated micro-display devices. For example, the display device is a silicon-based micro-organic light-emitting diode display device. The first electrode layer 15 includes a plurality of first electrodes 151, which are arranged in an array in a first direction X and a second direction Y. The orthographic projections of the plurality of pixel openings 201 on the substrate 11 fall within the orthographic projections of the plurality of first electrodes 151 on the substrate 11. That is, the plurality of first electrodes 151 correspond one-to-one with the positions of the plurality of pixels SP, and the area of ​​the first electrode is larger than the light-emitting area of ​​the pixel.

[0075] In some embodiments of this disclosure, referring to Figures 2B and 2C, the display substrate 200 includes a driving circuit layer 12 located on the substrate 11. The driving circuit layer 12 includes a driving circuit, which includes a voltage control circuit and a pixel circuit.

[0076] Figure 3A schematically illustrates a driving circuit diagram of a display substrate according to some exemplary embodiments of the present disclosure. Figure 3B schematically illustrates a partial circuit diagram of a display substrate according to some exemplary embodiments of the present disclosure.

[0077] For example, as shown in Figure 3A, in the display area AA, each pixel SP includes a light-emitting element L and a pixel circuit 122 coupled to the light-emitting element L. As shown in Figure 3B, each pixel circuit 122 includes a driving transistor T1. The light-emitting element L includes, for example, an OLED. The positive terminal of the OLED is electrically connected to the second terminal D of the driving transistor T1, and the negative terminal of the OLED is electrically connected to the second power supply terminal VSS. The voltage of the second power supply terminal VSS is generally a negative voltage or ground voltage VGND (e.g., 0V). The driving transistor T1 can be an N-type transistor. When current flows from its first terminal S to its second terminal D, the first terminal S can be used as its source, and the second terminal D as its drain. When current flows from its second terminal D to its first terminal S, the second terminal D can be used as its source, and the first terminal S as its drain.

[0078] In some embodiments of this disclosure, the peripheral area of ​​the display device further includes a voltage control circuit. For example, as shown in Figures 3A and 3B, the display device may further include a plurality of voltage control circuits 121 located in the peripheral area of ​​the display substrate 200, and the first terminal of the driving transistor T1 in the pixel circuit 122 is coupled to a common voltage control circuit 121. The voltage control circuit is configured to output an initialization signal Vinit to the first terminal of the driving transistor T1 in response to a reset control signal RE, thereby controlling the corresponding light-emitting element L to reset; and to output a first power supply signal VDD to the first terminal of the driving transistor in response to a light-emitting control signal EM, thereby driving the light-emitting element L to emit light.

[0079] For example, as shown in Figures 2B and 2C, the driving transistor T1 in each pixel includes a source S, a drain D, and a semiconductor layer (located between the source S and the drain D). One of the source S and the drain D is electrically connected to the conductive reflective layer 14. The semiconductor layer is located in the substrate 11, and this semiconductor layer is, for example, a channel region formed between the source S and the drain D. For example, as shown in Figure 2B, the driving transistor T1 includes a gate G, a source S, and a drain D. The three electrodes correspond to three electrode connection portions. For example, the gate G is electrically connected to the gate connection portion 102g, the source S is electrically connected to the source connection portion 102s, and the drain D is electrically connected to the drain connection portion 102d. The drain D of the driving transistor T1 is electrically connected to the conductive reflective layer 14 through the drain connection portion 102d. When the driving transistor T1 is in the on state, the electrical signal VDD provided by the power line can be transmitted to the first electrode layer 15 through the drain D of the driving transistor T1, the drain connection portion 102d, and the conductive reflective layer 14. Because a voltage difference is formed between the second electrode layer 18 and the first electrode layer 15, an electric field is formed between them, and the organic light-emitting functional layer 17 emits light under the action of this electric field.

[0080] In at least some embodiments, each pixel also includes a storage capacitor located on a substrate. For example, as shown in FIG3B, each pixel SP also includes a storage capacitor Cst located on a substrate 11, configured to store data signals. A first terminal of the storage capacitor Cst is coupled to the gate G of the driving transistor T1, and a second terminal of the storage capacitor Cst is coupled to the ground terminal GND. In this way, the gate G of the driving transistor T1 can store high grayscale or low grayscale data signals through the storage capacitor Cst.

[0081] In some embodiments of this disclosure, referring back to Figures 2C-2D, the display substrate 200 includes a first via VH1 and a first connection portion 13, at least a portion of the first connection portion 13 being located in the first via VH1; and a conductive reflective layer 14 located on the side of the driving circuit layer 12 away from the substrate, the conductive reflective layer 14 being electrically connected to the driving circuit layer 12 through the first connection portion 13. The conductive reflective layer 14 includes a first conductive portion 141 and a second conductive portion 142, the conductivity of the material of the first conductive portion 141 being lower than the conductivity of the material of the second conductive portion 142. The first conductive portion 141 and the second conductive portion 142 are disposed adjacent to each other along a first direction X. The second conductive portion 142 includes two sidewalls 1421 and 1422 disposed opposite each other in the first direction, the first conductive portion 141 at least covering the two sidewalls 1421 and 1422 of the second conductive portion 142. The orthographic projection of the first connecting portion 13 on the substrate 11 lies within the orthographic projection of the conductive reflective layer 14 on the substrate 11. The first connecting portion 13 includes exposed surfaces 1311 and 1312 that are exposed outside the first via VH1. At least a portion of the exposed surfaces 1311 and 1312 are spaced apart from the first conductive portion 141. It should be noted that the spaced-apart arrangement here includes spaced-apart arrangements in the first direction X or the third direction Z.

[0082] For example, as shown in FIG2C, at least a portion of the first connection portion 13 is located in the first via VH1. The first connection portion 13 is made of a metallic material, such as tungsten metal. A via filled with tungsten metal is also called a tungsten via (W-via). The manufacturing process of tungsten vias is mature, and forming tungsten vias can ensure the stability of the conductive path, which is beneficial to reducing the contact resistance between the conductive reflective layer 14 and the driving circuit layer 12. It is understood that tungsten vias are not only suitable for the electrical connection between the conductive reflective layer 14 and the driving circuit layer 12, but also for the electrical connection between the conductive reflective layer 14 and the first electrode layer 15, as well as the electrical connection between other wiring layers.

[0083] For example, as shown in Figures 2C-2D, the conductive reflective layer 14 includes a first conductive portion 141 and a second conductive portion 142. The material of the first conductive portion 141 is typically one of Ti or Ta metals, and the material of the second conductive portion 142 is typically one of Al, Ag, or Mg metals. Because the second conductive portion 142 has low resistance and high reflectivity, it is beneficial to improve the light emission brightness and light emission efficiency of the display substrate. For example, the thickness of the first conductive portion 141 is... The thickness of the second conductive part 142 is If the thickness of the conductive reflective layer 14 is too low, the reflection effect will be insignificant; if the thickness is too high, the overall thickness of the display substrate will be too large. The first conductive portion 141 is used to protect the second conductive portion 142 from the effects of subsequent process corrosion. For example, the first conductive portion 141 is deposited using a damascus process. Since the impedance of the first conductive portion 141 is relatively high, if the entire bottom surface of the second conductive portion 142 is covered, the exposed surfaces 1311 and 1312 of the first connecting portion 13 will also be covered, resulting in poor conductivity from the first connecting portion 13 to the first electrode 151. In the embodiments of this disclosure, removing or patterning part of the material of the exposed surfaces 1311 and 1312 of the first connecting portion 13 and the nearby first conductive portion 141, or retaining only the metal material on both sides and its protruding portions, helps to reduce impedance, improve conductivity from the first connecting portion 13 to the first electrode 151, thereby improving the brightness of the display substrate 200, while ensuring that the sidewalls 1421 and 1422 of the second conductive portion are covered and protected.

[0084] After removing part of the material from the first conductive part 141, the second conductive part 142 is deposited in the groove of the interlayer insulating layer GI1. The second conductive part 142 covers the exposed surfaces 1311 and 1312 of the first connecting part 13. The first connecting part 13 only forms an electrical connection with the second conductive part 142 and does not contact the first conductive part 141, thereby improving the conductivity from the tungsten via to the first electrode 151.

[0085] In some embodiments of this disclosure, the first conductive portion 141 includes a first sub-conductive portion 1411 and a second sub-conductive portion 1412. The first sub-conductive portion 1411 covers the sidewall of the second conductive portion 142, and the second sub-conductive portion 1412 extends from the first sub-conductive portion 1411 toward the second conductive portion 142 along a first direction X.

[0086] The first sub-conductive portion 1411 is the portion of the first conductive portion 141 perpendicular to the surface of the substrate 11 facing the driving circuit layer 12, and the second sub-conductive portion 1412 is the portion of the first conductive portion 141 parallel to the surface of the substrate 11 facing the driving circuit layer 12. The first sub-conductive portion 1411 covers the sidewalls 1421 and 1422 of the second conductive portion 142, and the second sub-conductive portion 1412 covers a portion of the surface of the second conductive portion 142 near the substrate 11.

[0087] In some embodiments of this disclosure, the exposed surface includes a first sub-surface 1311, which is the surface of the first connection portion 13 away from the substrate 11. The first sub-surface 1311 is parallel to a first direction X. Each of the first sub-conductive portion 1411 and the second sub-conductive portion 1412 is spaced apart from the first sub-surface 1311 in the first direction X. The first sub-surface 1311 is covered by a second conductive portion 142.

[0088] Referring to Figures 2C-2D, the first sub-surface 1311 is located between the two first conductive portions 141 in a pixel. The first sub-surface 1311 is perpendicular to the main body of the first conductive portion 1411 and parallel to the main body of the second conductive portion 1412. The first sub-surface 1311 and the second conductive portion 1412 are arranged at intervals.

[0089] The first connecting portion 13 includes a first connecting sub-portion 131 and a second connecting sub-portion 132. The first connecting sub-portion 131 protrudes from the first via VH1, and the second connecting sub-portion 132 is located within the first via VH1. The exposed surface also includes a second sub-surface 1312, which is a side surface of the first connecting sub-portion 131 and is adjacent to the first sub-surface 1311. The first sub-surface 1311 is electrically connected to the second conductive portion 142, and the second surface 1312 is also electrically connected to the second conductive portion 142.

[0090] Figure 4A schematically illustrates a cross-sectional view of a display substrate according to some other exemplary embodiments of the present disclosure. For example, Figure 4A may be a cross-sectional view of the display substrate taken along line AA' in Figure 2A. Figure 4B schematically illustrates a partial cross-sectional view of a display substrate according to some other exemplary embodiments of the present disclosure; Figures 4C-4D schematically illustrate partial cross-sectional views of a display substrate according to some other exemplary embodiments of the present disclosure. Some structures of the display substrates shown in Figures 4A-4C can be referred to the above description with reference to Figures 2A-2D, and the same or similar components or structures are indicated by the same reference numerals.

[0091] In some embodiments of this disclosure, at least a portion of the second sub-surface 1312 is spaced apart from the first conductive portion 141. At least a portion of the first sub-surface 1311 is covered by the first conductive portion 141; at least a portion of the second sub-surface 1312 is covered by the second conductive portion 142.

[0092] Referring to Figures 4A-4C, the main difference between Figure 4A and Figure 2B is that in Figure 4A, the first conductive part 141 is in partial contact with the first connecting part 13, and the second sub-surface 1312 is spaced apart from the first conductive part 141 in the third direction Z. This structure has a simple manufacturing process and reduces the coverage of the first conductive part 141 on the first connecting part 13. In Figure 2B, the first conductive part 141 is not in contact with the first connecting part 13, and the first sub-surface 1311 is spaced apart from the first conductive part 141 in the first direction X. This structure further reduces the coverage area of ​​the first conductive part 141 on the first connecting part 13 and further reduces the contact resistance between the conductive reflective layer 14 and the driving circuit layer 12.

[0093] Specifically, referring to Figures 4A-4C, the first conductive portion 141 includes a first sub-conductive portion 1411, a second sub-conductive portion 1412, and a third sub-conductive portion 1413. The first sub-conductive portion 1411 is the portion of the first conductive portion 141 perpendicular to the substrate 11 and facing the surface of the driving circuit layer 12. The second sub-conductive portion 1412 and the third sub-conductive portion 1413 are the portions of the first conductive portion 141 parallel to the substrate 11 and facing the surface of the driving circuit layer 12. The first conductive portion 141 is formed by a deposition process. Since the cross-section of the first connecting sub-portion 131 in the light-emitting direction of the display substrate 11 is an inverted trapezoid, when the material of the first conductive portion 141 is deposited on the first connecting sub-portion 131, due to... The sidewall 1312 of the first connecting sub-part 131 is inclined inward, and the material of the first conductive part 141 cannot be completely deposited on the sidewall 1312 of the first connecting sub-part 131. As a result, the sidewall 1312 of the first connecting sub-part 131 is broken, forming a second sub-conductive part 1412 covering the surface of the second conductive part 142 near the substrate 11 and a third sub-conductive part 1413 covering the first sub-surface 1311. Therefore, the sidewall 1312 of the first connecting sub-part 131 is not covered by the first conductive part 141, thereby reducing the contact area with the first conductive part 141. This is beneficial to improving the conductivity from the first connecting part 13 to the first electrode 151 and further improving the brightness of the display substrate.

[0094] The first sub-surface 1311 of the first connecting sub-part 131 is covered by the third sub-conductive part 1413. At least a portion of the second sub-surface 1312 of the first connecting sub-part 131 is not covered by the first conductive part 141, and the portion of the second sub-surface 1312 not covered by the first conductive part 141 is covered by the second conductive part 142. The first connecting sub-part 131 is electrically connected to both the first conductive part 141 and the second conductive part 142. This structure saves etching steps, and by utilizing the structure of the first connecting sub-part 131, the contact area between the first connecting sub-part 131 and the first conductive part 141 can be reduced, simplifying the process flow.

[0095] In some embodiments of this disclosure, the display substrate 200 or 300 further includes: an interlayer insulating layer GI1 located on the side of the driving circuit layer 12 away from the substrate 11; the interlayer insulating layer GI1 includes a groove GI13, and a first conductive portion 141 and a second conductive portion 142 are located in the groove GI13. The interlayer insulating layer GI1 includes a first insulating portion GI11 and a second insulating portion GI12, the second insulating portion GI12 being located on the side of the first insulating portion GI11 away from the substrate 11; the orthographic projection of the second insulating portion GI12 on the substrate 11 does not overlap with the orthographic projection of the conductive reflective layer 14 on the substrate 11; the first insulating portion GI11 includes a second via VH2, and a first connecting portion 13 extends through the second via VH2 and is electrically connected to the conductive reflective layer 14.

[0096] For example, referring to Figures 2B-2C and 4A-4B, the interlayer insulating layer GI1 is used to isolate the driving circuit layer 12 from the conductive reflective layer 14. During the etching process to form the groove GI13, the first insulating portion GI11 acts as an etching barrier layer to control the depth of the groove GI13. Simultaneously, the first insulating portion GI11 also provides a conductive path for electrically connecting the driving circuit layer 12 and the conductive reflective layer 14. For example, the first insulating portion GI11 may include a second via VH2 filled with metal, through which the conductive reflective layer 14 is electrically connected to the driving circuit layer 12. Thus, by forming a conductive channel between the conductive reflective layer 14 and the driving circuit layer 12 in the first insulating portion GI11, it is beneficial for the signals provided by the pixel circuit in the display substrate to be transmitted to the first electrode layer 15 through the conductive reflective layer 14. This not only facilitates the control of the light-emitting element by the pixel circuit but also makes the structure of the display substrate more compact, which is beneficial for device miniaturization.

[0097] In some embodiments of this disclosure, the conductive reflective layers 14 of the first pixel SP1, the second pixel SP2, and the third pixel SP3 are arranged alternately along at least one of the first direction X and the second direction Y, and an interlayer insulating layer GI1 is provided between two adjacent conductive reflective layers 14.

[0098] For example, referring to Figures 2A-2C and 4A-4B, the first reflective part R is located in the first pixel SP1, the second reflective part G is located in the second pixel SP2, and the third reflective part B is located in the third pixel SP3. Adjacent reflective parts are separated by an interlayer insulating layer GI1. By setting a separate reflective part in each pixel, light mixing can be effectively avoided and the display effect can be improved.

[0099] In some embodiments of this disclosure, the thickness of the second conductive portion 142 in the first pixel SP1, the second pixel SP2, and the third pixel SP3 is equal to that of each other.

[0100] For example, referring to Figures 2B-2C and 4A-4B, the thicknesses of the first reflective portion R, the second reflective portion G, and the third reflective portion B are equal. After depositing the second conductive portion 142, a planarization process is used to obtain an overall flat upper surface, which is beneficial for achieving a uniform reflection effect.

[0101] In some embodiments of this disclosure, the display substrate 200 or 300 further includes: an isolation layer GI2 located on the side of the conductive reflective layer 14 away from the substrate 11; the isolation layer GI2 includes a first isolation portion GI21, a second isolation portion GI22, and a third isolation portion GI23, wherein the first isolation portion GI21 is located in a first pixel SP1, the second isolation portion GI22 is located in a second pixel SP2, and the third isolation portion GI23 is located in a third pixel SP3. The thickness of the first isolation portion GI21 is greater than the thickness of the second isolation portion GI22, and the thickness of the second isolation portion GI22 is greater than the thickness of the third isolation portion GI23.

[0102] For example, referring to Figures 4A and 4D, the isolation layer GI2 is a light-transmitting material, allowing light emitted from the light-emitting functional layer 17 to pass through and reach the conductive reflective layer 14 for reflection. For instance, the isolation layer GI2 can have high light transmittance, allowing light reflected by the conductive reflective layer 14 to escape with almost no loss, thus ensuring high brightness and high light extraction efficiency of the display substrate. Furthermore, by using isolation layers GI2 of different thicknesses in the first pixel SP1, second pixel SP2, and third pixel SP3, microcavities of different lengths can be realized to achieve the effect of superimposed light and improved display brightness.

[0103] In forming the isolation layer GI2 on the conductive reflective layer 14, the manufacturing method includes: forming the third isolation layer GI23 on the third reflective layer B through a first patterning process, forming the second isolation layer GI22 on the second reflective layer G through a second patterning process, and forming the first isolation layer GI21 on the first reflective layer R through a second patterning process.

[0104] Figures 5A-5C schematically illustrate cross-sectional views of the relative positions of the first electrode layer and the conductive reflective layer according to some exemplary embodiments of the present disclosure.

[0105] In some embodiments of this disclosure, the display substrate 200 or 300 further includes: a first electrode layer 15 located on the side of the isolation layer GI2 away from the substrate 11; the first electrode layer 15 includes a first sub-electrode 1511, a second sub-electrode 1512, and a third sub-electrode 1513, the first sub-electrode 1511 being located in a first pixel SP1, the second sub-electrode 1512 being located in a second pixel SP2, and the third sub-electrode 1513 being located in a third pixel SP3; the isolation layer GI2 includes a third via VH3, and the first sub-electrode 1511, the second sub-electrode 1512, and the third sub-electrode 1513 are electrically connected to the second conductive portion 142 through the third via VH3.

[0106] For example, referring to Figures 5A-5C, the relative positional relationship between the first electrode layer 15 and the conductive reflective layer 14 can be determined according to actual needs. For example, as shown in Figure 5A, the orthographic projection of the first electrode layer 15 on the substrate 11 lies within the orthographic projection of the conductive reflective layer 14 on the substrate 11. That is, the area of ​​the orthographic projection of the first electrode layer 15 is smaller than the area of ​​the orthographic projection of the conductive reflective layer 14. In this way, almost all the light passing through the first electrode layer 15 is incident on the conductive reflective layer 14 and reflected, thereby improving the light extraction efficiency and brightness of the display substrate. It is understood that the arrangement of the first electrode layer and the first reflective electrode is not limited to the case shown in Figure 5A, and vice versa. For example, as shown in Figure 5B, the orthographic projection of the conductive reflective layer 14 on the substrate 11 lies within the orthographic projection of the first electrode layer 15 on the substrate 11. As another example, as shown in Figure 5C, the orthographic projection of the conductive reflective layer 14 on the substrate 11 partially overlaps with the orthographic projection of the first electrode layer 15 on the substrate 11. In the embodiments of this disclosure, the positional projection relationship between the first electrode layer 15 and the conductive reflective layer 14 can be compatible with various implementation methods, and the position of the conductive reflective layer 14 can be flexibly set. In this case, the conductive reflective layer 14 can be fabricated without changing the electrical connection relationship between the wiring layers and driving transistors in the existing display substrate, simplifying the fabrication process of the conductive reflective layer 14.

[0107] In at least some embodiments, the conductive reflective layer 14 can have various regular shapes, such as rectangles, circles, ellipses, parallelograms, regular polygons, trapezoids, etc. Alternatively, the conductive reflective layer 14 can also have irregular shapes, such as zigzag, curved, honeycomb, etc. In a plane parallel to the substrate 11, the shape of the conductive reflective layer 14 can be the same as or different from the shape of the first electrode layer 15. For example, in a plane parallel to the substrate 11, the shape of the conductive reflective layer 14 is the same as the shape of the first electrode layer 15. In this way, the reflection by the conductive reflective layer 14 ensures more uniform brightness of the emitted light. For another example, the first electrode layer 15 is circular, and the conductive reflective layer 14 is rectangular. Further, in this case, the orthographic projection of the circular first electrode layer 15 onto the plane of the substrate 11 lies within the orthographic projection of the rectangular conductive reflective layer 14 onto the plane of the substrate 11. In this way, almost all the light passing through the circular first electrode layer 15 is incident on the rectangular conductive reflective layer 14 and reflected, thereby improving the light extraction efficiency and brightness of the display substrate.

[0108] In at least some embodiments, a protective film 150 is provided in the third via VH3, and the protective film 150 covers at least a portion of the first sub-electrode 1511, the second sub-electrode 1512 and the third sub-electrode 1513 located in the third via VH3.

[0109] For example, referring to FIG4D, before depositing the material of the first electrode layer 15, a TiN material is first deposited on the sidewall of the third via VH3 as a protective film 150 to prevent the material of the second conductive part 142 from diffusing.

[0110] In some embodiments of this disclosure, the display substrate 200 or 300 further includes a pixel defining layer 16, located on the side of the first electrode layer 15 away from the substrate 11. The pixel defining layer 16 includes a pixel defining portion PL1 located between the first pixel opening 2011 and the second pixel opening 2012. The pixel defining portion PL1 has an undercut structure UDC on both the side facing the first pixel opening 2011 and the side facing the second pixel opening 2012. The display substrate 200 or 300 also includes a light-emitting functional layer 17 disposed on the side of the pixel defining layer 16 away from the substrate 11. The light-emitting functional layer 17 includes a charge-generating layer 171. The charge-generating layer 171 is interrupted at the undercut structure UDC.

[0111] For example, referring to FIG4D, in a stacked OLED device, due to the high conductivity of the charge generation layer 171, lateral crosstalk between pixels is easily caused when the charge generation layers between adjacent pixels are not separated. By designing undercut structures at both ends of the pixel defining portion, the charge generation layers between adjacent pixels can be disconnected at the undercut structures, thereby reducing lateral crosstalk between pixels and improving the display effect of the display substrate.

[0112] The materials of the multiple pixel-defining sublayers can be the same or different. For example, referring to FIG5A, the undercut structure UDC includes a first portion UDC1, a second portion UDC2, and a third portion UDC3. The third portion UDC3 is located on the side of the second portion UDC2 away from the substrate 2, and the second portion UDC2 is recessed by a first distance d1 relative to the third portion UDC3 in a direction away from the pixel opening. The first portion UDC1 protrudes by a second distance d2 relative to the third portion UDC3 in a direction toward the pixel opening. The material of the first pixel-defining sublayer PDL1 may include SiO2. x ; and / or, the material of the second pixel-defined sublayer PDL2 may include SiN x ; and / or, the material of the third pixel-defined sublayer PDL3 includes SiO2. x Multiple pixel-defining sublayers can have different etching rates under the same etching process conditions. For example, the etching rate of the second pixel-defining sublayer can be higher than that of the third pixel-defining sublayer. This allows the formation of a recessed structure in the etching process where the second part UDC2 is recessed relative to the third part UDC3 in a direction away from the pixel opening. This creates a pixel-defining portion with an undercut structure, which can effectively isolate the charge generation layer, reduce lateral crosstalk between pixels, lower the leakage rate, improve the transfer rate of the display substrate, and enhance the display effect of the display substrate.

[0113] In some embodiments of this disclosure, referring back to FIG4D, the display substrate 200 or 300 further includes: a light-emitting functional layer 17 located on the side of the first electrode layer 15 away from the substrate 11; a color filter layer 19 located on the side of the light-emitting functional layer 17 away from the substrate 11; the color filter layer 19 includes a first filter portion R, a second filter portion G, and a third filter portion B, the first filter portion R being located in a first pixel SP1, the second filter portion G being located in a second pixel SP2, and the third filter portion B being located in a third pixel SP3; light emitted from the light-emitting functional layer 17 emits light of a first wavelength after passing through the first filter portion R, light emitted from the light-emitting functional layer 17 emits light of a second wavelength after passing through the second filter portion G, and light emitted from the light-emitting functional layer 17 emits light of a third wavelength after passing through the third filter portion B. For example, the first wavelength is greater than the second wavelength, and the second wavelength is greater than the third wavelength.

[0114] Exemplary examples, in some embodiments of this disclosure, the display substrate may include a silicon-based OLED display substrate. The silicon-based OLED can achieve color display using a white light + three-color filter approach. A white OLED typically includes multiple stacked light-emitting layers, with different layers producing different colors of light. White light is formed by mixing different colors of light, and further, this mixed white light is combined with a filter structure to achieve a color display effect. For example, different light-emitting layers may include a yellow light-emitting layer and a blue light-emitting layer, or a red-green mixed light-emitting layer and a blue light-emitting layer. White light emission can be achieved through a yellow and blue light mixing design, or a red-green mixed light and blue light mixing design.

[0115] In some embodiments of this disclosure, the display substrate 200 or 300 further includes: a second electrode layer 18 and an encapsulation layer TFE located on the side of the light-emitting functional layer 17 away from the substrate 11; a first planarization layer PLN1 and a second planarization layer PLN2 located on the side of the color filter layer 19 close to the substrate 11 and away from the substrate 11; and a lens 21 located on the side of the second planarization layer PLN2 away from the substrate 11.

[0116] In at least some embodiments, the first electrode layer 15 is a transparent electrode layer. For example, the first electrode layer 15 may be made of a light-transmitting material or a semi-light-transmitting material. Similarly, the second electrode layer 18 may also be a transparent electrode layer, for example, made of a light-transmitting material or a semi-light-transmitting material. Light-transmitting materials are, for example, transparent conductive oxides, including but not limited to indium tin oxide (ITO), indium zinc oxide (IZO), cadmium tin oxide (CTO), stannum dioxide (SnO2), and zinc oxide (ZnO). For example, the first electrode layer 15 is made of ITO. Because ITO has a higher work function than ordinary molybdenum and titanium metals, it is suitable as an OLED anode material. Furthermore, because ITO has high transmittance, light emitted from the organic light-emitting functional layer can pass through the first electrode layer with almost no loss, further improving the light extraction efficiency and brightness of the display device. In a silicon-based micro-OLED display device, one of the first electrode layer 15 and the second electrode layer 18 serves as the anode, and the other serves as the cathode. Lens 21 also includes a protective layer 211 on the surface of lens 21. The material of lens 21 can be photoresist; the shape of the lens can be hemispherical, or other shapes that can focus light. Lens 21 acts as a light-focusing element, improving light efficiency while reducing the viewing angle, bringing large-angle viewing angles into the positive viewing angle range and reducing stray light from large viewing angles.

[0117] Embodiments of this disclosure also provide a display device, which may be an electroluminescent display device. When the display device is an electroluminescent display device, it may be an organic light-emitting diode (OLED) or a quantum dot light-emitting diode (QLED).

[0118] Figure 6 is a schematic diagram of the structure of a display device 1000 provided in an embodiment of the present disclosure. The display device 1000 includes a device body 400 and a display substrate 200 or 300 disposed on the device body 400. The device body 400 includes a housing and components such as a processor, power supply, and camera disposed within the housing. The display device 1000 may use the display substrate 200 or 300 provided in the above embodiment.

[0119] Display device 1000 may include any device or product with display functionality. For example, display device 1000 may be a smartphone, mobile phone, e-book reader, desktop computer (PC), laptop PC, netbook PC, personal digital assistant (PDA), portable multimedia player (PMP), digital audio player, mobile medical device, camera, wearable device (such as head-mounted device, electronic clothing, electronic bracelet, electronic necklace, electronic accessory, electronic tattoo, or smartwatch), television set, etc.

[0120] It should be understood that the display device 1000 according to some exemplary embodiments of the present disclosure has all the features and advantages of the display substrate 200 or 300 described above, which can be referred to in the above description of the display substrate 200 or 300, and will not be repeated here.

[0121] Figure 7 schematically illustrates a flowchart of a method for fabricating a display substrate according to an embodiment of the present disclosure.

[0122] According to some exemplary embodiments, referring to Figures 2B-2D and 7, the method for preparing the display substrate 200 includes the following steps S710 to S720.

[0123] In step S710, a driving circuit layer 12 is formed on the substrate 11. The driving circuit layer 12 includes a first via VH1 and a first connection portion 13, at least a portion of the first connection portion 13 being located in the first via VH1.

[0124] In step S720, a conductive reflective layer 14 is formed on the side of the driving circuit layer 12 away from the substrate 11. The conductive reflective layer 14 is electrically connected to the driving circuit layer 12 through a first connecting portion 13. The conductive reflective layer 14 includes a first conductive portion 141 and a second conductive portion 142. The conductivity of the material of the first conductive portion 141 is lower than that of the material of the second conductive portion 142. The first conductive portion 141 and the second conductive portion 142 are arranged adjacent to each other along a first direction. The second conductive portion 142 includes two sidewalls 1421 and 1422 arranged opposite to each other in the first direction. The first conductive portion 141 at least covers the two sidewalls of the second conductive portion 142. The orthographic projection of the first connecting portion 13 on the substrate 11 is located within the orthographic projection of the conductive reflective layer 14 on the substrate 11. The first connecting portion 13 includes exposed surfaces 1311 and 1312 exposed outside the first via VH1. At least a portion of the exposed surfaces 1311 and 1312 are spaced apart from the first conductive portion 141. Specifically, step S710 includes: forming a driving circuit layer 12 and a first connection portion 13.

[0125] Step S720 includes:

[0126] Step S721: Fabrication of conductive reflective layer 14. A composite film is deposited by chemical vapor deposition on the incoming wafer, a layer of photoresist is applied and exposed, and then patterned using non-metallic and metallic full etching processes. The conductive reflective layer 14 is then fabricated using methods including but not limited to magnetron sputtering, electron beam evaporation, and thermal evaporation. The material of the conductive reflective layer 14 is Ti(Ta) / Al, with Ti(Ta) serving as the first conductive part 141 and Al serving as the second conductive part 142. This step includes two methods. The first method involves fabricating an embedded Ta / Ti substrate using a damascus process, removing or patterning the metal around the first connection portion 13, but retaining the protruding metal on the sidewalls and substrate, and then depositing an Al film. The second method involves retaining a protrusion at the position of the first connection portion 13 of the substrate to form a discontinuity, reducing the contact area between the top and sidewalls of the first connection portion 13 and the Ta / Ti, thereby reducing impedance.

[0127] Step S722: Prepare isolation layers GI2 of different thicknesses. Isolation layer GI2 is made of SiO material. First, CVD deposit the third isolation layer GI23, coat it with a layer of photoresist and expose it, then etch to obtain the third isolation layer GI23 corresponding to the B pixel (to ensure that there is no residue above the metal corresponding to the R / G pixel, the space between each pixel will be slightly reduced due to slight over-etching); CVD deposit the second isolation layer GI22, coat it with a layer of photoresist and expose it, then etch to obtain the second isolation layer GI22 corresponding to the R pixel (to ensure that there is no residue above the metal corresponding to the G pixel, the space between each pixel will be slightly reduced due to slight over-etching); CVD deposit the first isolation layer GI21 to form different pixel gaps.

[0128] Step S723: Prepare the second via VH2. At the corresponding position of the second via VH2, the second via VH2 (tilt angle of 70-80°) is obtained through exposure and etching processes.

[0129] Step S724: Prepare the protective film 150 and the first electrode layer 15. Deposit a TiN layer on the above film layer, and then etch to obtain a TiN protective film 150 covering the Al / Ag surface through the second via VH2. First, deposit an ITO material layer by magnetron sputtering, coat a layer of photoresist and expose it, and then etch to obtain the patterned first electrode layer 15 above the BRG (ITO etching needs to be over-etched to ensure that the ITO between each pixel is disconnected).

[0130] Step S725: Prepare pixel confinement layer 16. First, deposit SiO-1 / SiN / SiO-2 by chemical vapor deposition, then expose and etch to obtain the undercut structure.

[0131] Step S726: Fabrication of the light-emitting functional layer 17, the encapsulation layer TFE, and the planarization layer PLN1: Evaporate each film layer in the light-emitting functional layer 17 above the first electrode layer 15 to ensure that each pixel has the ability to emit white light; Fabricate an inorganic encapsulation layer TFE above the light-emitting functional layer 17 to protect the material of the light-emitting functional layer 17 from water and oxygen intrusion to ensure the performance of the light-emitting functional layer 17; Coat a planarization layer PLN1 above the encapsulation layer TFE to improve the flatness of the upper surface of the wafer.

[0132] Step S727: Fabricate color filter layer 19, planarization layer PLN2, and lens 21. Sequentially fabricate third filter section B, second filter section G, and first filter section R on the inorganic optical antireflection film to form the three primary colors R / G / B; coat the planarization layer PLN2 above the third filter section B, second filter section G, and first filter section R to improve the flatness of the upper surface of the wafer; fabricate lens 21 on the planarization layer PLN2 to converge stray light and enhance light efficiency.

[0133] As used herein, the terms “substantially,” “approximately,” “about,” and other similar terms are used as terms of approximation rather than as terms of degree, and they are intended to account for inherent deviations in measured or calculated values ​​that would be recognized by one of ordinary skill in the art. Taking into account factors such as process variations, measurement problems, and errors associated with the measurement of a particular quantity (i.e., limitations of the measurement system), “approximately” or “about” as used herein includes the stated value and indicates that the particular value is within an acceptable range of deviation for one of ordinary skill in the art. For example, “approximately” may mean within one or more standard deviations, or within ±10% or ±5% of the stated value.

[0134] While some embodiments based on the general inventive concept of this disclosure have been illustrated and described, those skilled in the art will understand that changes may be made to these embodiments without departing from the principles and spirit of the general inventive concept of this disclosure, the scope of which is defined by the claims and their equivalents.

Claims

1. A display substrate, comprising: Substrate; A driving circuit layer is located on one side of the substrate. The driving circuit layer includes a first via and a first connection portion, and at least a portion of the first connection portion is located in the first via. as well as A conductive reflective layer is located on the side of the driving circuit layer away from the substrate. The conductive reflective layer is electrically connected to the driving circuit layer through the first connecting portion. The conductive reflective layer includes a first conductive portion and a second conductive portion. The conductivity of the material of the first conductive portion is lower than that of the material of the second conductive portion. The first conductive portion and the second conductive portion are disposed adjacent to each other along a first direction. The second conductive portion includes two sidewalls disposed opposite to each other along the first direction. The first conductive portion at least covers the two sidewalls of the second conductive portion. The orthographic projection of the first connection portion on the substrate is located within the orthographic projection of the conductive reflective layer on the substrate. The first connection portion includes an exposed surface exposed outside the first via, and at least a portion of the exposed surface is spaced apart from the first conductive portion.

2. The display substrate according to claim 1, wherein, At least a portion of the exposed surface is in contact with the second conductive part.

3. The display substrate according to claim 1, wherein, The first conductive portion includes a first sub-conductive portion and a second sub-conductive portion. The first sub-conductive portion covers the sidewall of the second conductive portion, and the second sub-conductive portion extends from the first sub-conductive portion toward the second conductive portion along a first direction.

4. The display substrate according to claim 3, wherein, The exposed surface includes a first sub-surface, which is the surface of the first connection portion away from the substrate. The first sub-surface is parallel to a first direction, and each of the first sub-conductive portion and the second sub-conductive portion is spaced apart from the first sub-surface.

5. The display substrate according to claim 4, wherein, The first sub-surface is covered by the second conductive part.

6. The display substrate according to claim 4, wherein, The first connecting portion includes a first connecting sub-port and a second connecting sub-port, the first connecting sub-port protruding from the first through hole, and the second connecting sub-port located in the first through hole; The exposed surface further includes a second sub-surface, the second sub-surface being a side surface of the first connecting sub-part, and the second sub-surface being adjacent to the first sub-surface; and At least a portion of the second sub-surface is spaced apart from the first conductive portion.

7. The display substrate according to claim 6, wherein, At least a portion of the first sub-surface is covered by the first conductive portion; at least a portion of the second sub-surface is covered by the second conductive portion.

8. The display substrate according to claim 6, wherein, The first connecting sub-part has an inverted trapezoidal cross-section in the light-emitting direction of the display substrate.

9. The display substrate according to claim 1, wherein, The display substrate further includes: An interlayer insulating layer is located on the side of the driving circuit layer away from the substrate. The interlayer insulating layer includes a groove, and the first conductive portion and the second conductive portion are located in the groove.

10. The display substrate according to claim 9, wherein, The interlayer insulating layer includes a first insulating portion and a second insulating portion, wherein the second insulating portion is located on the side of the first insulating portion away from the substrate. The orthographic projection of the second insulating portion on the substrate does not overlap with the orthographic projection of the conductive reflective layer on the substrate; The first insulating portion includes a second via, and the first connecting portion extends through the second via to be electrically connected to the conductive reflective layer.

11. The display substrate according to claim 1, wherein, The display substrate further includes a plurality of pixels, which are arranged in an array along a first direction and a second direction, and the plurality of pixels include a first pixel, a second pixel and a third pixel; The conductive reflective layers of the first pixel, the second pixel, and the third pixel are arranged alternately along at least one of the first direction and the second direction, and an interlayer insulating layer is disposed between two adjacent conductive reflective layers.

12. The display substrate according to claim 11, wherein, The thickness of the second conductive portion in the first pixel, the second pixel, and the third pixel is equal to that of each other.

13. The display substrate according to claim 11, wherein, The display substrate further includes an isolation layer located on the side of the conductive reflective layer away from the substrate. The isolation layer includes a first isolation portion, a second isolation portion, and a third isolation portion, wherein the first isolation portion is located in the first pixel, the second isolation portion is located in the second pixel, and the third isolation portion is located in the third pixel; The thickness of the first isolation portion is greater than the thickness of the second isolation portion, and the thickness of the second isolation portion is greater than the thickness of the third isolation portion.

14. The display substrate according to claim 13, wherein, The display substrate further includes: a first electrode layer located on the side of the isolation layer away from the substrate; The first electrode layer includes a first sub-electrode, a second sub-electrode, and a third sub-electrode, wherein the first sub-electrode is located in the first pixel, the second sub-electrode is located in the second pixel, and the third sub-electrode is located in the third pixel; The isolation layer includes a third via, through which the first sub-electrode, the second sub-electrode, and the third sub-electrode are electrically connected to the second conductive part.

15. The display substrate according to claim 14, wherein, A protective film is provided in the third via, and the protective film covers at least a portion of the first sub-electrode, the second sub-electrode, and the third sub-electrode located in the third via.

16. The display substrate according to claim 14, wherein, The display substrate further includes: a light-emitting functional layer located on the side of the first electrode layer away from the substrate; and a color filter layer located on the side of the light-emitting functional layer away from the substrate. The color filter layer includes a first filter, a second filter, and a third filter. The first filter is located in the first pixel, the second filter is located in the second pixel, and the third filter is located in the third pixel. The first filter is used to allow light of a first wavelength to pass through, the second filter is used to allow light of a second wavelength to pass through, and the third filter is used to allow light of a third wavelength to pass through; the first wavelength is greater than the second wavelength, and the second wavelength is greater than the third wavelength.

17. The display substrate according to claim 1, wherein, The material of the first conductive part includes one of Ti and Ta, and the material of the second conductive part includes one of Al, Ag and Mg; The material of the first connecting part includes W.

18. A display device, characterized in that, The display device includes a display substrate according to any one of claims 1 to 17.

19. A method for preparing a display substrate, the method comprising the following steps: A driving circuit layer is formed on a substrate, the driving circuit layer including a first via and a first connection portion, at least a portion of the first connection portion being located in the first via; A conductive reflective layer is formed on the side of the driving circuit layer away from the substrate, and the conductive reflective layer is electrically connected to the driving circuit layer through the first connection portion; in, The conductive reflective layer includes a first conductive portion and a second conductive portion. The conductivity of the material of the first conductive portion is lower than that of the material of the second conductive portion. The first conductive portion and the second conductive portion are disposed adjacent to each other along a first direction. The second conductive portion includes two sidewalls disposed opposite to each other in the first direction. The first conductive portion at least covers the two sidewalls of the second conductive portion. The orthographic projection of the first connecting portion on the substrate is located within the orthographic projection of the conductive reflective layer on the substrate. The first connecting portion includes an exposed surface exposed outside the first via. At least a portion of the exposed surface is spaced apart from the first conductive portion.

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