Electrostatic clamp with weakly conductive dielectric layer

Abstract

An electrostatic clamp includes a top dielectric layer comprising a first resistivity and a bottom dielectric layer comprising a second resistivity. An electrode is disposed between the top dielectric layer and the bottom dielectric layer. The second resistivity is larger than the first resistivity. The top dielectric layer forms an outer surface of the electrostatic clamp.

Description

ELECTROSTATIC CLAMP WITH WEAKLY CONDUCTIVE DIELECTRIC LAYERCROSS REFERENCE TO RELATED APPLICATION

[0001] This application claims priority to U.S. Application No. 63 / 762,968, filed February 25, 2025, and which is incorporated herein in its entirety by reference.FIELD

[0002] The present application relates to systems and methods for electrostatic clamping, for example, electrostatic clamping of reticles and substrates in lithography apparatuses and systems.BACKGROUND

[0003] A lithographic apparatus is a machine that applies a desired pattern onto a substrate, usually onto a target portion of the substrate. A lithographic apparatus can be used, for example, in the manufacture of integrated circuits (ICs). In that instance, a patterning device, which can be a mask or a reticle, can be used to generate a circuit pattern to be formed on an individual layer of the IC. This pattern can be transferred onto a target portion (e.g., comprising part of, one, or several dies) on a substrate (e.g., a silicon wafer). Transfer of the pattern is typically via imaging onto a layer of radiationsensitive material (photoresist or simply “resist”) provided on the substrate. In general, a single substrate will contain a network of adjacent target portions that are successively patterned. Known lithographic apparatuses include so-called steppers, in which each target portion is irradiated by exposing an entire pattern onto the target portion at one time, and so-called scanners, in which each target portion is irradiated by scanning the pattern through a radiation beam in a given direction (the “scanning”-direction) while synchronously scanning the target portions parallel or anti-parallel to this scanning direction. It is also possible to transfer the pattern from the patterning device to the substrate by imprinting the pattern onto the substrate.

[0004] During patterning, a reticle and / or substrate must be held at a precise location. This can be accomplished through use of an electrostatic clamp. An electrostatic clamp can generate a Coulomb force that attracts and affixes an object in place. However, current electrostatic clamps that use this coulombic approach of clamping face challenges with local charge accumulation due to the use of dielectrics with high resistivity and high electric field concentration at electrode edges, which can cause electrical breakdown of dielectric material within the clamp. The residual charge may lead to physical phenomena such as cyclic induced charging (increase of charge accumulation with each potential cycling), defectivity related local charging (charge accumulation on particle locations), and buried barrier leakage. At system level, these issues contribute to wafer / reticle stickiness, load and unloading related impact, and overlay degradation. These challenges can worsen with increased voltages required for higher clamping forces.SUMMARY

[0005] Accordingly, it is desirable to reduce charge accumulation on a top surface of an electrostatic clamp. This can be accomplished, for example, by altering the conductivity of dielectric materials within the electrostatic clamp.

[0006] In some aspects, a lithography system includes an electrostatic clamp. The electrostatic clamp can include a top dielectric layer, a bottom dielectric layer, and an electrode. The top dielectric layer and the bottom dielectric layer can have different resistivities and the resistivity of the top dielectric layer can be less than or equal to the resistivity of the bottom dielectric layer. The conductivity of the top dielectric layer can be configured such that charge dissipates from a top surface of the top dielectric layer.

[0007] In some aspects, a method for clamping and exchanging substrates in a lithography apparatus includes applying a voltage to the electrode in the electrostatic clamp. The method can further include ceasing the application of voltage to the electrode in the electrostatic clamp. These steps are repeated several times while exchanging reticles and / or substrates in a lithography system. The pressure of the electrostatic clamp can drop from above about 70,000 Pa to below about 50 Pa in less than about 1.3 seconds during the ceasing.

[0008] Further features of various aspects of the present disclosure are described in detail below with reference to the accompanying drawings. It is noted that the present disclosure is not limited to the specific aspects described herein. Such aspects are presented herein for illustrative purposes only. Additional aspects will be apparent to those skilled in the relevant art(s) based on the teachings contained herein.BRIEF DESCRIPTION OF THE DRAWINGS / FIGURES

[0009] The accompanying drawings, which are incorporated herein and form part of the specification, illustrate the present disclosure and, together with the description, further serve to explain the principles of the present disclosure and to enable those skilled in the relevant art(s) to make and use aspects described herein.

[0010] FIG. 1 A shows a reflective lithographic apparatus, according to some aspects.

[0011] FIG. IB shows a transmissive lithographic apparatus, according to some aspects.

[0012] FIGS. 2A and 2B show more details of a reflective lithographic apparatus, according to some aspects.

[0013] FIG. 3 shows an example lithographic cell, according to some aspects.

[0014] FIGS. 4 A and 4B show a side view of an electrostatic clamp, according to some aspects.

[0015] FIG. 5 shows an example circuit, according to some aspects.

[0016] FIG. 6 shows a plot of electrostatic pressure as a function of time, according to some aspects.

[0017] FIG. 7 shows a method, according to some aspects.

[0018] The features of the present disclosure will become more apparent from the detailed description set forth below when taken in conjunction with the drawings, in which like reference characters identify corresponding elements throughout. In the drawings, like reference numbers generally indicate identical, functionally similar, and / or structurally similar elements. Additionally, generally, the leftmost digit(s) of a reference number identifies the drawing in which the reference number first appears. Unless otherwise indicated, the drawings provided throughout the disclosure should not be interpreted as to-scale drawings.DETAILED DESCRIPTION

[0019] The aspects described herein, and references in the specification to “one aspect,” “an aspect,” “an exemplary aspect,” “an example aspect,” etc., indicate that the aspects described can include a particular feature, structure, or characteristic, but every aspect may not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same aspect. Further, when a particular feature, structure, or characteristic is described in connection with an aspect, it is understood that it is within the knowledge of those skilled in the art to effect such feature, structure, or characteristic in connection with other aspects whether or not explicitly described.

[0020] Spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “on,” “upper” and the like, can be used herein for ease of description to describe one element or feature’s relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus can be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein can likewise be interpreted accordingly.

[0021] The terms “about,” “approximately,” or the like can be used herein indicates the value of a given quantity that can vary based on a particular technology. Based on the particular technology, the terms “about,” “approximately,” or the like can indicate a value of a given quantity that varies within, for example, 10-30% of the value (e.g., ±10%, ±20%, or ±30% of the value).

[0022] Aspects of the present disclosure can be implemented in hardware, firmware, software, or any combination thereof. Aspects of the disclosure can also be implemented as instructions stored on a computer-readable medium, which can be read and executed by one or more processors. A machine-readable medium can include any mechanism for storing or transmitting information in a form readable by a machine (e.g., a computing device). For example, a machine-readable medium can comprise read only memory (ROM); random access memory (RAM); magnetic disk storage media; optical storage media; flash memory devices; electrical, optical, acoustical or other forms of propagated signals (e.g., carrier waves, infrared signals, digital signals, etc.), and others. Furthermore, firmware, software, routines, and / or instructions can be described herein as performing certain actions. However, it should be appreciated that such descriptions are merely for convenience and that such actions result from computing devices, processors, controllers, or other devices executing the firmware, software, routines,instructions, etc. The term “machine -readable medium” can be interchangeable with similar terms, for example, “computer program product,” “computer-readable medium,” “non-transitory computer-readable medium,” or the like. The term “non-transitory” can be used herein to characterize one or more forms of computer readable media except for a transitory, propagating signal.

[0023] Before describing such aspects in more detail, however, it is instructive to present an example environment in which aspects of the present disclosure can be implemented.

[0024] Example Lithographic Systems

[0025] FIGS. 1A and IB show schematic illustrations of a lithographic apparatus 100 and a lithographic apparatus 100’, respectively, in which aspects of the present disclosure can be implemented. Lithographic apparatus 100 and lithographic apparatus 100’ can each include the following: an illumination system (illuminator) IL configured to condition a radiation beam B (for example, deep ultra violet or extreme ultra violet radiation); a support structure (for example, a mask table) MT configured to support a patterning device (for example, a mask, a reticle, or a dynamic patterning device) MA and connected to a first positioner PM configured to accurately position patterning device MA; and, a substrate table (for example, a wafer table) WT configured to hold a substrate (for example, a resist coated wafer) W and connected to a second positioner PW configured to accurately position substrate W. Lithographic apparatus 100 and 100’ also comprises a projection system PS configured to project a pattern imparted to radiation beam B by patterning device MA onto a target portion (for example, comprising one or more dies) C of substrate W. In lithographic apparatus 100, patterning device MA and the projection system PS are reflective. In lithographic apparatus 100’, the patterning device MA and projection system PS are transmissive.

[0026] Illumination system IL can comprise various types of optical components, such as refractive, reflective, catadioptric, magnetic, electromagnetic, electrostatic, or other types of optical components, or any combination thereof, for directing, shaping, or controlling the radiation beam B. Illumination system IL can also comprise a sensor ES that provides a measurement of, for example, one or more of energy per pulse, photon energy, intensity, average power, and the like. Illumination system IL can comprise a measurement sensor MS for measuring a movement of radiation beam B and a uniformity compensator UC that allow an illumination slit uniformity to be controlled. Measurement sensor MS can also be disposed at other locations. For example, measurement sensor MS can be on or near substrate table WT.

[0027] The support structure MT can support patterning device MA in a manner that depends on the orientation of the patterning device MA with respect to a reference frame, the design of at least one of the lithographic apparatus 100 and 100’, and other conditions, such as whether or not the patterning device MA is held in a vacuum environment. The support structure MT can implement mechanical, vacuum, electrostatic, or other clamping techniques to hold the patterning device MA. Support structure MT can be a frame or a table. Support structure MT can be fixed or movable. By using sensors, supportstructure MT can ensure that patterning device MA is at a desired position, for example, with respect to the projection system PS.

[0028] The term “patterning device” can be broadly interpreted as referring to any device that can be used to impart a radiation beam B with a pattern in its cross-section, such as to create a pattern in target portion C of substrate W. The pattern imparted to radiation beam B can correspond to a particular functional layer in a device being created in target portion C to form an integrated circuit.

[0029] Patterning device MA can be reflective (as in lithographic apparatus 100 of FIG. 1A), or transmissive (as in lithographic apparatus 100’ of FIG. IB). Examples of patterning devices MA include reticles, masks, programmable mirror arrays, or programmable LCD panels. Masks can include different mask types, such as binary, alternating phase shift, or attenuated phase shift, as well as various hybrid mask types. An example of a programmable mirror array employs a matrix arrangement of small mirrors, each of which can be individually tilted so as to reflect an incoming radiation beam in different directions. The tilted mirrors can impart a pattern in radiation beam B, which is reflected by a matrix of small mirrors.

[0030] The terms “inspection apparatus,” “metrology system,” or the like may be used herein to refer to, e.g., a device or system used for measuring a property of a structure (e.g., overlay error, critical dimension parameters) or used in a lithographic apparatus to inspect an alignment of a wafer (e.g., alignment apparatus).

[0031] The term “projection system” can be used herein to refer to any type of projection system, including refractive, reflective, catadioptric, magnetic, electromagnetic and electrostatic optical systems, or any combination thereof, as appropriate for the exposure radiation being used, or for other factors, such as the use of an immersion liquid on the substrate W or the use of a vacuum. Atmospheric gas can absorb EUV or electrons used for exposing a substrate. Therefore, a vacuum environment can be used for EUV or electron beam radiation. A vacuum environment can be provided to the whole beam path with the aid of a vacuum wall and vacuum pumps.

[0032] Lithographic apparatus 100 and / or lithographic apparatus 100’ can be of a type having two (dual stage) or more substrate tables WT (and / or two or more mask tables). In such “multiple stage” machines, additional substrate tables WT can be used in parallel, or preparatory steps can be carried out on one or more tables while one or more other substrate tables WT are being used for exposure. In some situations, the additional table may be different from substrate table WT.

[0033] The lithographic apparatus can also be of a type in which at least a portion of the substrate can be covered by a liquid having a relatively high refractive index, e.g., water, so as to fill a space between the projection system and the substrate. An immersion liquid can also be applied to other spaces in the lithographic apparatus, for example, between the mask and the projection system. Immersion techniques can increase the numerical aperture of projection systems. The term “immersion” as used herein does not mean that a structure, such as a substrate, must be submerged in liquid. For example, a liquid can be located between the projection system and the substrate during exposure.

[0034] Referring to FIGS. 1A and IB, illuminator IL can receive a radiation beam from a radiation source SO. Source SO and lithographic apparatus 100 or 100’ can be separate physical entities, for example, in arrangements where the source SO is an excimer laser. In such cases, source SO is not considered to be part of lithographic apparatus 100 or 100’ and radiation beam B can pass from source SO to illuminator IL with the aid of a beam delivery system BD (in FIG. IB), which can include, for example, suitable directing mirrors and / or a beam expander. In other cases, source SO can be an integral part of the lithographic apparatus 100 or 100’, for example, in arrangements where the source SO is a mercury lamp. The source SO and the illuminator IL, together with the beam delivery system BD, if required, may be referred to as a radiation system.

[0035] The illuminator IL may include an adjuster AD (in FIG. IB) for adjusting the angular intensity distribution of the radiation beam. Generally, at least the outer and / or inner radial extent (commonly referred to as “o-outcr” and “o-inner,” respectively) of the intensity distribution in a pupil plane of the illuminator may be adjusted. In addition, the illuminator IL may comprise various other components (in FIG. IB), such as an integrator IN and a condenser CO. The illuminator IL may be used to condition the radiation beam B to have a desired uniformity and intensity distribution in its cross section.

[0036] Referring to FIG. 1A, the radiation beam B is incident on the patterning device (for example, mask) MA, which is held on the support structure (for example, mask table) MT, and is patterned by the patterning device MA. In lithographic apparatus 100, the radiation beam B is reflected from the patterning device (for example, mask) MA. After being reflected from the patterning device (for example, mask) MA, the radiation beam B passes through the projection system PS, which focuses the radiation beam B onto a target portion C of the substrate W. With the aid of the second positioner PW and position sensor IF2 (for example, an interferometric device, linear encoder, or capacitive sensor), the substrate table WT may be moved accurately (for example, so as to position different target portions C in the path of the radiation beam B). Similarly, the first positioner PM and another position sensor IF1 may be used to accurately position the patterning device (for example, mask) MA with respect to the path of the radiation beam B. Patterning device (for example, mask) MA and substrate W may be aligned using mask alignment marks Ml, M2 and substrate alignment marks Pl, P2.

[0037] Referring to FIG. IB, the radiation beam B is incident on the patterning device (for example, mask MA), which is held on the support structure (for example, mask table MT), and is patterned by the patterning device. Having traversed the mask MA, the radiation beam B passes through the projection system PS, which focuses the beam onto a target portion C of the substrate W. The projection system has a pupil conjugate PPU to an illumination system pupil IPU. Portions of radiation emanate from the intensity distribution at the illumination system pupil IPU and traverse a mask pattern without being affected by diffraction at the mask pattern and create an image of the intensity distribution at the illumination system pupil IPU.

[0038] The projection system PS projects an image of the mask pattern MP, where the image is formed by diffracted beams produced from the mark pattern MP by radiation from the intensity distribution,onto a photoresist layer coated on the substrate W. For example, the mask pattern MP may include an array of lines and spaces. A diffraction of radiation at the array and different from zeroth order diffraction generates diverted diffracted beams with a change of direction in a direction perpendicular to the lines. Undiffracted beams (i.e., so-called zeroth order diffracted beams) traverse the pattern without any change in propagation direction. The zeroth order diffracted beams traverse an upper lens or upper lens group of the projection system PS, upstream of the pupil conjugate PPU of the projection system PS, to reach the pupil conjugate PPU. The portion of the intensity distribution in the plane of the pupil conjugate PPU and associated with the zeroth order diffracted beams is an image of the intensity distribution in the illumination system pupil IPU of the illumination system IL. The aperture device PD, for example, is disposed at or substantially at a plane that includes the pupil conjugate PPU of the projection system PS.

[0039] The projection system PS is arranged to capture, by means of a lens or lens group L, not only the zeroth order diffracted beams, but also first-order or first- and higher-order diffracted beams (not shown). In some embodiments, dipole illumination for imaging line patterns extending in a direction perpendicular to a line may be used to utilize the resolution enhancement effect of dipole illumination. For example, first-order diffracted beams interfere with corresponding zeroth-order diffracted beams at the level of the wafer W to create an image of the line pattern MP at highest possible resolution and process window (i.e., usable depth of focus in combination with tolerable exposure dose deviations). In some embodiments, astigmatism aberration may be reduced by providing radiation poles (not shown) in opposite quadrants of the illumination system pupil IPU. Further, in some embodiments, astigmatism aberration may be reduced by blocking the zeroth order beams in the pupil conjugate PPU of the projection system associated with radiation poles in opposite quadrants. This is described in more detail in US 7,511,799 B2, issued Mar. 31, 2009, which is incorporated by reference herein in its entirety.

[0040] With the aid of the second positioner PW and position sensor IFD (for example, an interferometric device, linear encoder, or capacitive sensor), the substrate table WT may be moved accurately (for example, so as to position different target portions C in the path of the radiation beam B). Similarly, the first positioner PM and another position sensor (not shown in FIG. IB) may be used to accurately position the mask MA with respect to the path of the radiation beam B (for example, after mechanical retrieval from a mask library or during a scan).

[0041] In general, movement of the mask table MT may be realized with the aid of a long-stroke module (coarse positioning) and a short-stroke module (fine positioning), which form part of the first positioner PM. Similarly, movement of the substrate table WT may be realized using a long-stroke module and a short-stroke module, which form part of the second positioner PW. In the case of a stepper (as opposed to a scanner), the mask table MT may be connected to a short-stroke actuator only or may be fixed. Mask MA and substrate W may be aligned using mask alignment marks Ml, M2, and substrate alignment marks Pl, P2. Although the substrate alignment marks (as illustrated) occupy dedicated target portions, they may be located in spaces between target portions (known as scribe-lane alignment marks).Similarly, in situations in which more than one die is provided on the mask MA, the mask alignment marks may be located between the dies.

[0042] Mask table MT and patterning device MA may be in a vacuum chamber V, where an in-vacuum robot IVR may be used to move patterning devices such as a mask in and out of vacuum chamber. Alternatively, in arrangements where mask table MT and patterning device MA are outside of the vacuum chamber, an out-of-vacuum robot may be used for various transportation operations, similar to the in-vacuum robot IVR. Both the in-vacuum and out-of-vacuum robots need to be calibrated for a smooth transfer of any payload (e.g., mask) to a fixed kinematic mount of a transfer station.

[0043] The lithographic apparatus 100 and 100’ can be used in at least one of the following modes:

[0044] 1. In step mode, support structure MT and substrate table WT can be kept essentially stationary, while an entire pattern imparted to radiation beam B is projected onto a target portion C at one time (e.g., a single static exposure). Substrate table WT can then be shifted in the X and / or Y direction so that a different target portion C can be exposed.

[0045] 2. In scan mode, support structure MT and substrate table WT can be scanned synchronously while a pattern imparted to radiation beam B is projected onto a target portion C (e.g., a single dynamic exposure). The velocity and direction of substrate table WT relative to support structure MT can be determined by (de-)magnification and image reversal characteristics of projection system PS.

[0046] 3. In another mode, support structure MT can be kept substantially stationary holding a programmable patterning device, and substrate table WT can be moved or scanned while a pattern imparted to radiation beam B is projected onto a target portion C. A pulsed radiation source SO can be employed and the programmable patterning device is updated after each movement of substrate table WT or in between successive radiation pulses during a scan. This mode of operation can be readily applied to maskless lithography that utilizes a programmable patterning device, such as a programmable mirror array.

[0047] Combinations and / or variations on the described modes of use or entirely different modes of use can also be employed.

[0048] In a further embodiment, lithographic apparatus 100 includes an extreme ultraviolet (EUV) source, which is configured to generate a beam of EUV radiation for EUV lithography. In general, the EUV source is configured in a radiation system, and a corresponding illumination system is configured to condition the EUV radiation beam of the EUV source.

[0049] FIG. 2A shows different view of lithographic apparatus 100, including source SO (e.g., source collector apparatus), illumination system IL, and projection system PS, according to some aspects. Source SO is constructed and arranged such that a vacuum environment can be maintained in an enclosing structure 220 of source SO. An EUV radiation emitting plasma 210 can be formed by a discharge-generated plasma source. In some aspects, a plasma of excited tin (Sn) (e.g., excited via a laser) is used to produce EUV radiation.

[0050] The radiation emitted by the EUV radiation emitting plasma 210 can be passed from a source chamber 211 into a collector chamber 212 via an optional gas barrier or contaminant trap 230 (in some cases also referred to as contaminant barrier or foil trap), which is positioned in or behind an opening in source chamber 211. Contaminant trap 230 can comprise a channel structure. Contamination trap 230 can also comprise a gas barrier and / or a channel structure.

[0051] In some aspects, collector chamber 212 can comprise a radiation collector CO. Radiation collector CO can be a so-called grazing incidence collector. Radiation collector CO can comprise an upstream radiation collector side 251 and a downstream radiation collector side 252. Radiation that traverses radiation collector CO can be reflected off a grating spectral filter 240 to be focused in a virtual source point INTF. Virtual source point INTF can be referred to as the intermediate focus. Source collector apparatus can be arranged such that the intermediate focus INTF is located at or near an opening 219 of enclosing structure 220. The virtual source point INTF can be an image of the EUV radiation emitting plasma 210. Grating spectral filter 240 can be used for suppressing infrared (IR) radiation.

[0052] Subsequently, the radiation traverses the illumination system IE. Illumination system IL can include a faceted field mirror device 222 and a faceted pupil mirror device 224 arranged to provide a desired angular distribution of radiation beam 221, at patterning device MA, as well as a desired uniformity of radiation intensity at patterning device MA. Upon reflection of beam of radiation 221 at patterning device MA, held by support structure MT, a patterned beam 226 is formed and the patterned beam 226 is imaged by projection system PS via reflective elements 228, 229 onto substrate W held by the wafer stage or substrate table WT. In some aspects, other configurations of mirrors and / or optical devices can be used to direct radiation beam 221 to patterning device MA.

[0053] More elements than shown can generally be present in illumination system IL and projection system PS. Grating spectral filter 240 can optionally be present, depending upon the type of lithographic apparatus. Further, there can be more mirrors present than those shown in the FIG. 2A, for example there can be one to six additional reflective elements present in the projection system PS than shown in FIG. 2A.

[0054] In some aspects, uniformity compensator UC, sensor ES, and / or measurement sensor MS shown in FIGS. 2A and 2B can be as described above in reference to FIG. 1A.

[0055] Collector CO, as illustrated in FIG. 2A, is depicted as an example of a nested collector with grazing incidence reflectors 253, 254, and 255 (or collector mirror). Grazing incidence reflectors 253, 254, and 255 can be disposed axially symmetric around an optical axis O. A collector optic of this type can be used in combination with a discharge-generated plasma source, often called a DPP source.

[0056] FIG. 2B shows a portion of lithographic apparatus 100 (e.g., FIG. 1A), but with alternative collection optics in source SO, according to some aspects. It should be appreciated that structures shown in FIG. 2A that do not appear in FIG. 2B (for drawing clarity) can still be included in aspects referring to FIG. 2B. Elements in FIG. 2B having the same reference numbers as those in FIG. 2A have the sameor substantially similar structures and functions as described in reference to FIG. 2A. In some aspects, the lithographic apparatus 100 can be used, for example, to expose a substrate W such as a resist-coated wafer with a patterned beam of EUV illumination. In FIG. 2B, illumination system IL and projection system PS are represented combined as an exposure device 256 (e.g., an integrated circuit lithography tool such as a stepper, scanner, step and scan system, direct write system, device using a contact and / or proximity mask, etc.) that uses EUV light from source SO. Lithographic apparatus 100 can also comprise collector 258 that reflects EUV light from the EUV radiation emitting plasma 210 along a path into the exposure device 256 to irradiate substrate W. Collector 258 can comprise a near-normal incidence collector mirror having a reflective surface in the form of a prolate spheroid (e.g., an ellipse rotated about its major axis). The prolate spheroid structure can have a graded multi-layer coating with alternating layers of Molybdenum and Silicon, and in some cases, one or more high temperature diffusion barrier layers, smoothing layers, capping layers and / or etch stop layers.

[0057] Example Lithographic Cell

[0058] FIG. 3 shows a lithographic cell 300, also sometimes referred to a lithocell or cluster, according to some aspects. Lithographic apparatus 100 or 100’ (FIGS. 1A and IB) can form part of lithographic cell 300. Lithographic cell 300 can also comprise one or more apparatuses to perform pre-exposure and post-exposure processes on a substrate. These can include spin coaters SC to deposit resist layers, developers DE to develop exposed resist, chill plates CH, and bake plates BK. A substrate handler, or robot, RO picks up substrates from input / output ports I / O I , I / O2, moves them between the different process apparatuses and delivers them to the loading bay LB of lithographic apparatus 100 or 100’. These devices, which are often collectively referred to as the track, are under the control of a track control unit TCU, which is itself controlled by a supervisory control system SCS, which also controls the lithographic apparatus via lithography control unit LACU. Thus, the different apparatuses can be operated to maximize throughput and processing efficiency.

[0059] Example Electrostatic Clamp

[0060] During scanning and patterning operations, a lithography system may leverage mechanical, vacuum, electrostatic or other suitable clamping techniques to hold a substrate (e.g., a reticle, a wafer, etc.) in place. For example, one or more clamps can be integrated into wafer table WT and / or mask table MT of lithographic apparatus 100 or 100’.

[0061] Electrostatic clamps are particularly useful in extreme ultraviolet (EUV) lithography systems, where a vacuum environment prevents the use of vacuum clamps. An electrostatic clamp operates by generating an electrostatic force that leverages attraction between opposing electric charges to grip an object. The electrostatic force is commonly generated by applying a voltage to an electrode underneath a dielectric layer. This clamp configuration, however, can lead to several technical challenges. For example, current electrostatic clamps can rely on electric field strengths of about 108V / m (volt / meter). Charge accumulation on sharp edges of the clamp or particles on the dielectric can bring the electric field strength up to about 109V / m, which causes conductive regions of the clamp to leak electrons thatassemble on a top surface of a dielectric layer of the clamp. These charges remain on the top surface of the dielectric layer and generate a sticking force that causes load and unloading related problems. The high electric field strength can also lead to electric breakdown of the dielectric layers. These technical challenges worsen as the electric filed strength is increased to generate higher electrostatic clamping pressures.

[0062] The aspects described herein address these technical challenges through implementation of a “weakly conductive” dielectric layer. As described herein, a weakly conductive material, can refer to a material with a conductivity between the common conductivities of insulators and metals. For example, a weakly conductive material may have a conductivity in the range of about IO-10to 10'5S / m (siemens / meter). These conductivities are much lower than the conductivities of typical conductors, such as metals. As described in more detail below, when integrated into an electrostatic clamp, weakly conductive materials can exhibit some of the advantages of conductors, such as charge dissipation, while exhibiting fewer disadvantages, such as electrical discharge. In some aspects, weakly conductive dielectric layers may be chosen for use in an electrostatic clamp based on their relaxation time during operation of the electrostatic clamp (see FIG. 5). For example, a desired relaxation time may be less than about 1-2 seconds.

[0063] FIGS. 4 A and 4B show side views of an example electrostatic clamp 400, according to some aspects. Electrostatic clamp 400 can include an electrostatic sheet 402 and a base 404. In some aspects, electrostatic sheet 402 and base 404 are modular components that are attached to each other via an adhesive 405.

[0064] In some aspects, electrostatic sheet 402 can include a top dielectric layer 406, an electrode 408, and a bottom dielectric layer 410. Electrode 408 is disposed on an inner surface of either top dielectric layer 406 or bottom dielectric layer 410. An adhesive 411 can bond top dielectric layer 406 and bottom dielectric layer 410 together such that electrode 408 is sandwiched between the two layers. Adhesive 411 can include a dielectric polymer such as benzocyclobutene (BCB) or the like. Top dielectric layer 406 and bottom dielectric layer 410 can include materials such as glass, ceramic, or the like. In some aspects, top dielectric layer 406 and bottom dielectric layer 410 have different resistivities. For example, top dielectric layer 406 can have a lower resistivity (i.e., higher conductivity) than bottom dielectric layer 410, which allows more electric charge to flow through top dielectric layer 406 than bottom dielectric layer 410. Dopants can be added to top dielectric material 406 to increase its conductivity. Alternatively, top dielectric layer 406 and bottom dielectric layer 410 can have the same resistivity (e.g., both layers can be weakly conductive).

[0065] In some aspects, base 404 can include a plurality of burls 412. The plurality of burls 412 can extend through a plurality of openings in electrostatic sheet 402 and past a top surface 414 of electrostatic sheet 402. Consequently, a gap 416 is formed between a substrate 418 and the top surface 414 during operation of electrostatic clamp 400.

[0066] During operation, electrostatic clamp 400 can alternate through several sequential ON / OFF cycles. When electrostatic clamp 400 is turned ON, a power supply (not shown) applies voltage to electrode 408. This creates a Coulomb force between the electrode and substrate 418 that attracts and affixes substrate 418 in place on top of the plurality of burls 412. When electrostatic clamp 400 is turned OFF, the power supply ceases to apply voltage to electrode 408. Accordingly, the Coulomb force drops and substrate 418 is released from electrostatic clamp 400.

[0067] In some aspects, charge can accumulate on the top surface 414 of electrostatic sheet 402. This creates a “sticking force” between electrostatic clamp 400 and substrate 418 when the clamp is turned OFF. To address this issue, top dielectric layer 406 can be made weakly conductive. For example, top dielectric layer 406 can have a conductivity in a range of about 10'8-10-5S / m. These conductivities may allow the top dielectric layer 406 to retain the majority of its dielectric properties (which aid the generation of the Coulomb force) while allowing small amounts of electric charge to dissipate through the material. An ideal conductivity for top dielectric layer 410 may depend on the layer’s permittivity, as described in more detail below in reference to FIG. 5. In one non-limiting example, top dielectric layer 410 can have a relative permittivity of about 5.3 and a conductivity of about 10'8to 10'7S / m.

[0068] A weakly conductive top dielectric layer 406 can provide additional benefits. For example, when top dielectric layer 406 is weakly conductive, current can flow through top dielectric layer 406 when electrostatic clamp 400 is turned ON. This current allows charge to reach top surface 414 and thus increases the effective area of electrode 408. Consequently, electrostatic clamp 400 can generate a higher clamping pressure using a smaller input voltage. For example, when top dielectric layer 406 is not weakly conductive (e.g., an insulator), an input voltage of about 3 kilovolts (kV) is typically used to generate a clamping pressure of about 50 kilopascals (kPa). Alternatively, when top dielectric layer 406 is weakly conductive, an input voltage of only about 1.5 kV is typically used to generate a clamping pressure of about 100 kPa.

[0069] In some aspects, electrostatic pressure generated by electrostatic clamp 400 is affected by the configuration of edges of electrostatic sheet 402 in a region 420 of electrostatic sheet 400, as illustrated in FIG. 4B. Region 420 of electrostatic sheet 400 can include the edges of electrostatic sheet 402 that are located closest to the plurality of burls 412. As described above, electrostatic sheet 402 can include a plurality of openings through which the plurality of burls 412 extend to support substrate 418. The plurality of openings in electrostatic sheet 402 can be sized such that there are a plurality of gaps 422 between inner surfaces 424 of electrostatic sheet 402 and the plurality of burls 412. Dissipation can occur along an adhesive 411 in regions 426 between the edges of electrode 408 and inner surfaces 424.

[0070] In some aspects, inner surfaces 424 are grounded. Grounding can aid in charge dissipation, which helps control heat generation at inner surfaces 424 and reduce degradation of electrostatic sheet 402. However, when top dielectric sheet 406 is weakly conductive, grounding can lead to short circuits and less uniform pressure in gap 416. In an alternative aspect, inner surfaces 424 are not grounded.Removing the ground from inner surface 424 reduces dissipation within regions 426, but generates a more uniform pressure in gap 416 and reduces the risk of short circuits.

[0071] The electrostatic clamp described in FIG. 4 is non-limiting. Other clamp geometries that utilize a weakly conductive top dielectric layer can be envisaged based on the knowledge of a person of ordinary skill in the art.

[0072] FIG. 5 shows an example circuit 500, according to some aspects. Circuit 500 can model a portion of electrostatic clamp 400. Circuit 500 shall be described below with reference to FIG. 4. However, circuit 500 is not limited to this example aspect.

[0073] In some aspects, circuit 500 models the electrical response of electrode 408, top dielectric layer 406, gap 416, and substrate as an RC circuit. For example, in circuit 500 a first capacitor 502 can model the capacitance of gap 416, a second capacitor 504 can model the capacitance of top dielectric layer 406, a resistor 506 can model the resistance of top dielectric layer 406, and power supply 508 can model the voltage applied to electrode 408.

[0074] When electrostatic clamp 400 is turned ON, voltage supply 508 applies voltage to circuit 500, which charges first capacitor 502 and second capacitor 504. When electrostatic clamp 400 is turned off, voltage supply 508 ceases to apply voltage to circuit 500 and first capacitor 502 and second capacitor 504 discharge. The relaxation time for charge dissipation in circuit 500 can be defined as Here, p is the resistivity ofthe top dielectric layer 406, d is the thickness of the top dielectric layer, A is the area of each “plate” of the “capacitor” (i.e., the area of the top dielectric layer 406, substrate 418 and electrode 408), g is length of gap 416 (i.e., the distance between top surface 414 and substrate 418), £ris the permittivity of the top dielectric layer 406, and E0is the permittivity of free space.

[0075] The relaxation time, as described above, can affect the performance of electrostatic clamp 400. For example, when the electrostatic clamp switches from OFF to ON, the relaxation time can affect how quickly charges distribute to the surface of top dielectric layer 406, which affects the speed at which the clamping pressure increases. When the electrostatic clamp switches from ON to OFF, the relaxation time can affect how quickly charges dissipate, which affects the speed at which the electrostatic pressure decreases. To increase throughput in a lithographic apparatus, it is advantageous to decrease electrostatic pressure to a value below 50 Pa in about 2 seconds or less, about 1.5 seconds or less, about 1 second or less, about 0.5 seconds or less, or about 0.1 seconds or less. In some aspects, a relaxation time between 3-10 milliseconds is desirable. As shown in the equation for relaxation time, the material properties (e.g., conductivity, permittivity, etc.) of top dielectric layer 406 and the geometry of the clamp can be tuned to provide a desired relaxation time. It will be understood by a person of ordinary skill in the art that relaxation time estimated herein can also be measured experimentally.

[0076] FIG. 6 shows a plot 600 of simulated pressure generated between an electrostatic clamp and a substrate for several different conductivities of a top dielectric layer, according to some aspects. Axis602 shows time in unit seconds. Axis 604 shows pressure in unit Pascal (Pa). Data 606 (dark grey diamonds), 608 (black squares), 610 (grey triangles), 612 (light grey diamonds), and 614 (grey squares) show the pressure response achieved for different conductivities of the top dielectric layer. In the simulations shown in FIG. 6, the top dielectric layer is assumed to have a permittivity value of about 5.3. In plot 600, the electrostatic clamp undergoes three ON / OFF cycles. The electrostatic clamp is turned ON between 0.2-0.4 seconds, 0.6-0.8 seconds, and 1-1.2 seconds. The electrostatic clamp is turned OFF between 0-0.2 seconds, 0.4-0.6 seconds, 0.8-1 second, and 1.2- 1.4 seconds.

[0077] Data 606 and 608 show pressure responses observed when the top dielectric layer has low conductivity values. For example, data 606 and data 608 can show the pressure response when the conductivity of the top dielectric layer less than about 10'10S / m. Here, the pressure generated by the electrostatic clamp is small (less than 30000 Pa).

[0078] Data 610 shows a pressure response observed when the top dielectric layer has an intermediate conductivity value. For example, data 610 can show the pressure response when the top dielectric layer has a conductivity of about 10'9S / m. Data 610 shows a higher clamping pressure than data 606 and data 608, but has a long dissipation time, as evidenced in regions where the clamp is turned off. A long dissipation time can cause sticking between an electrostatic clamp and a substrate (e.g., wafer), and is thus undesirable.

[0079] Data 612 and 614 show pressure responses observed when the top dielectric layer has higher conductivity values. For example, data 612 and 614 can show the pressure response when the conductivity of the top dielectric layer is about 10'8- 10'7S / m. At these conductivities, the electrostatic clamp can generate higher pressures and shows faster dissipation than data 610.

[0080] As shown in plot 600, performance of an electrostatic clamp is enhanced when a top dielectric layer has a conductivity of about 10'8to 10'7S / m. Specifically, pressure generated by the electrostatic clamp can reach higher pressures of about 70,000-100,000 Pa when the electrostatic clamp is turned ON. When the electrostatic clamp is turned OFF, the pressure can dissipate to a value of less than 50 Pa in less than about 1.3 seconds. Quick pressure dissipation is advantageous during processes involving rapid exchange of substrates, such as reticle and wafer exchanges in a lithographic system.

[0081] FIG. 7 shows a flowchart of a process 700, according to some aspects. Process 700 can describe a wafer loading and unloading process in a lithography system using an electrostatic clamp. It is to be appreciated that not all steps may be needed to perform the disclosure provided herein. Further, some of the steps may be performed simultaneously, or in a different order than described for FIG. 7, as will be understood by a person of ordinary skill in the art. Process 700 shall be described with reference to FIGS. 1-6. However, process 700 is not limited to those example aspects.

[0082] In step 702, a power supply can apply voltage to an electrode in an electrostatic clamp. The electrode can be sandwiched between a top dielectric layer and a bottom dielectric layer, wherein the top dielectric layer has a lower resistivity (i.e., higher conductivity) than the bottom dielectric layer. For example, the top dielectric layer can be weakly conductive, having, for example, a conductivity of aboutIO-10to 10'5S / m. When the top dielectric layer has a conductivity in this range, clamping pressure can increase due to the migration of charges towards a top surface of the top dielectric layer. The conductivity of the top dielectric layer is also tuned to reduce the relaxation time of the electrostatic clamp.

[0083] When voltage is applied to the electrode, charges in the top dielectric layer can polarize to create a columbic force that attracts and affixes a substrate to the electrostatic clamp. The applied voltage can generate an electrostatic clamping pressure of at least 70,000 Pa. In some aspects, as illustrated in FIG. 6, the electrostatic clamping pressure can reach about 100,000 Pa. These electrostatic clamping pressures can be reached in about 100-200 milliseconds.

[0084] In step 704, the power supply ceases to apply voltage to the electrode of the electrostatic clamp. When the voltage is removed a Coulomb force is no longer generated and the electrostatic clamping pressure dissipates. Due to the tuned conductivity of the top dielectric layer, charges may swiftly dissipate from a top surface of the electrostatic clamp, which leads to a swift drop in pressure and a reduction in residual sticking forces. For example, the electrostatic clamping pressure may drop to a value of less than 50 Pa, in less than two seconds.

[0085] In some aspects, steps 702 and 704 are repeated sequentially for several substrates during wafer exchange and / or reticle exchange in a lithographic system or apparatus.

[0086] Various embodiments of the present systems and methods are disclosed in the subsequent list of numbered clauses:1. An electrostatic clamp comprising:a top dielectric layer comprising a first resistivity;a bottom dielectric layer comprising a second resistivity; andan electrode disposed between the top dielectric layer and the bottom dielectric layer; wherein the second resistivity is larger than the first resistivity, andwherein the top dielectric layer forms an outer surface of the electrostatic clamp.2. The electrostatic clamp of clause 1, wherein the conductivity of the top dielectric layer is between 10'10and 10'5S / m.3. The electrostatic clamp of clause 1, wherein the top dielectric layer comprises a glass or ceramic material.4. The electrostatic clamp of clause 1 , further comprising a plurality of burls, wherein the plurality of burls extend through an electrostatic sheet formed from the top dielectric layer, the bottom dielectric layer and the electrode, and wherein an inner side of the electrostatic sheet adjacent to a burl in the plurality of burls is coupled to ground.5. The electrostatic clamp of clause 1 , further comprising a plurality of burls, wherein the plurality of burls extend through an electrostatic sheet formed from the top dielectric layer, the bottom dielectric layer, and the electrode, and wherein an inner side of the electrostatic sheet adjacent to a burl in the plurality of burls is not coupled to ground.6. The electrostatic clamp of clause 1, wherein a relaxation time of the electrostatic clamp is less than about 1.3 seconds.7. The electrostatic clamp of clause 1, wherein the electrostatic clamp applies a clamping pressure greater than about 70,000 Pa to a substrate.8. The electrostatic clamp of clause 1, wherein the top dielectric layer is not grounded during operation of the electrostatic clamp.9. The electrostatic clamp of clause 1, wherein current flows through the top dielectric layer when voltage is applied to the electrode and thereby increases an effective area of the electrode.10. A lithographic system, comprising:electrostatic clamp comprising:a top dielectric layer comprising a first resistivity;a bottom dielectric layer comprising a second resistivity; andan electrode disposed between the top dielectric layer and the bottom dielectric layer;wherein the second resistivity is larger than the first resistivity.11. The lithographic system of clause 10, wherein the conductivity of the top dielectric layer is between 10'10and 10'5S / m.12. The lithographic system of clause 10, wherein the top dielectric layer comprises a glass material.13. The lithographic system of clause 10, wherein the electrostatic clamp further comprises a plurality of burls, wherein the plurality of burls extend through an electrostatic sheet formed from the top dielectric layer, the bottom dielectric layer, and the electrode, and wherein an inner side of the electrostatic sheet adjacent to a burl in the plurality of burls is coupled to ground.14. The lithographic system of clause 10, wherein the electrostatic clamp further comprises a plurality of burls, wherein the plurality of burls extend through an electrostatic sheet formed from the top dielectric layer, the bottom dielectric layer and the electrode, and wherein an inner side of the electrostatic sheet adjacent to a burl in the plurality of burls is not coupled to ground.15. The lithographic system of clause 10, wherein a relaxation time of the electrostatic clamp is less than about 1.3 seconds.16. The lithographic system of clause 10, wherein the electrostatic clamp applied a clamping pressure greater than about 70,000 Pa to a substrate.17. The lithographic system of clause 10, wherein the top dielectric layer is not grounded during operation of the electrostatic clamp.18. The lithographic system of clause 10, wherein current flows through the top dielectric layer when voltage is applied to the electrode and thereby increases an effective area of the electrode. 19. A method, comprising:applying a voltage to an electrode in an electrostatic clamp, wherein the electrode is disposed between a top dielectric layer comprising a first resistivity and a bottom dielectric layer comprising a second resistivity, wherein the second resistivity is greater than the first resistivity; andceasing the application of voltage to the electrode in the electrostatic clamp,wherein the pressure of the electrostatic clamp drops from above about 70,000 Pa to below about 50 Pa in less than about 1.3 seconds during the ceasing.20. The method of clause 19, wherein the applying creates a pressure greater than about 70,000 Pa.21. The method of clause 19, wherein the applying generates a current in the top dielectric layer that increases the effective area of the electrode.

[0087] It is to be understood that the phraseology or terminology herein is for the purpose of description and not of limitation, such that the terminology or phraseology of the present specification is to be interpreted by those skilled in relevant art(s) in light of the teachings herein.

[0088] The present disclosure has been described above with the aid of functional building blocks illustrating the implementation of specified functions and relationships thereof. The boundaries of these functional building blocks have been arbitrarily defined herein for the convenience of the description. Alternate boundaries can be defined so long as the specified functions and relationships thereof are appropriately performed. The foregoing description of specific aspects will so fully reveal the general nature of the present disclosure that others can, by applying knowledge within the skill of the art, readily modify and / or adapt for various applications such specific aspects, without undue experimentation and without departing from the general concept of the present disclosure. Therefore, such adaptations and modifications are intended to be within the meaning and range of equivalents of the disclosed aspects, based on the teaching and guidance presented herein.

[0089] It is to be understood that the Detailed Description section, and not the Summary and Abstract sections, is intended to be used to interpret the claims. The Summary and Abstract sections can set forth one or more, but not necessarily all, aspects of the present disclosure as contemplated by the inventor(s), and thus, are not intended to limit the present disclosure and the appended claims in any way. The breadth and scope of the protected subject matter should not be limited by any of the above-described aspects, but should be defined in accordance with the following claims and their equivalents.

Claims

CLAIMS1. An electrostatic clamp comprising:a top dielectric layer comprising a first resistivity;a bottom dielectric layer comprising a second resistivity; andan electrode disposed between the top dielectric layer and the bottom dielectric layer; wherein the second resistivity is larger than the first resistivity, andwherein the top dielectric layer forms an outer surface of the electrostatic clamp.

2. The electrostatic clamp of claim 1, wherein:the conductivity of the top dielectric layer is between IO-10and 10'5S / m; andthe top dielectric layer comprises a glass or ceramic material.

3. The electrostatic clamp of claim 1, further comprising a plurality of burls, wherein the plurality of burls extend through an electrostatic sheet formed from the top dielectric layer, the bottom dielectric layer and the electrode, and wherein an inner side of the electrostatic sheet adjacent to a burl in the plurality of burls is coupled to ground or is not coupled to the ground. .

4. The electrostatic clamp of claim 1, wherein a relaxation time of the electrostatic clamp is less than about 1.3 seconds.

5. The electrostatic clamp of claim 1, wherein the electrostatic clamp applies a clamping pressure greater than about 70,000 Pa to a substrate.

6. The electrostatic clamp of claim 1, wherein the top dielectric layer is not grounded during operation of the electrostatic clamp.

7. The electrostatic clamp of claim 1, wherein current flows through the top dielectric layer when voltage is applied to the electrode and thereby increases an effective area of the electrode.

8. A lithographic system, comprising:electrostatic clamp comprising:a top dielectric layer comprising a first resistivity;a bottom dielectric layer comprising a second resistivity; andan electrode disposed between the top dielectric layer and the bottom dielectric layer;wherein the second resistivity is larger than the first resistivity.

9. The lithographic system of claim 8, wherein:the conductivity of the top dielectric layer is between IO-10and 10'5S / m; andthe top dielectric layer comprises a glass material.

10. The lithographic system of claim 8, wherein the electrostatic clamp further comprises a plurality of burls, wherein the plurality of burls extend through an electrostatic sheet formed from the top dielectric layer, the bottom dielectric layer, and the electrode, and wherein an inner side of the electrostatic sheet adjacent to a burl in the plurality of burls is coupled to ground or is not coupled to ground. .

11. The lithographic system of claim 8, wherein:a relaxation time of the electrostatic clamp is less than about 1.3 seconds;the electrostatic clamp applied a clamping pressure greater than about 70,000 Pa to a substrate; andthe top dielectric layer is not grounded during operation of the electrostatic clamp.

12. The lithographic system of claim 8, wherein current flows through the top dielectric layer when voltage is applied to the electrode and thereby increases an effective area of the electrode.

13. A method, comprising:applying a voltage to an electrode in an electrostatic clamp, wherein the electrode is disposed between a top dielectric layer comprising a first resistivity and a bottom dielectric layer comprising a second resistivity, wherein the second resistivity is greater than the first resistivity; andceasing the application of voltage to the electrode in the electrostatic clamp,wherein the pressure of the electrostatic clamp drops from above about 70,000 Pa to below about 50 Pa in less than about 1.3 seconds during the ceasing.

14. The method of claim 13, wherein the applying creates a pressure greater than about 70,000 Pa.

15. The method of claim 13, wherein the applying generates a current in the top dielectric layer that increases the effective area of the electrode.

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