Image sensor, sensor system and method for processing photosensor signals from an image sensor

Abstract

The invention relates to an image sensor (2) having a first electrical circuit (100), which is associated with a first pixel (8b) of the image sensor (2), and having a second electrical circuit (200), which is associated with a second pixel (8c) of the image sensor (2). The image sensor (2) has a delay unit (20; 20a; 20b; 20c; 20d) designed to transmit the compensation signal to the second electrical circuit (200) with a time delay. The invention also relates to a sensor system (1) containing the image sensor (2) and to a method for processing photosensor signals from an image sensor (2).

Description

[0001] Fraunhofer Society for the Advancement of Applied Research eV P148409PC00

[0002] Image sensor, sensor system and method for processing photosensor signals from an image sensor

[0003] The invention relates to an image sensor, a sensor system containing such an image sensor, and a method for processing photosensor signals from an image sensor.

[0004] Image acquisition often involves perceiving and capturing objects within an environment that are moving relative to a given reference frame. Such image acquisition systems are used, for example, in robotics. In many of these applications, the latency in processing the captured image data and the power consumption of the image acquisition system's processing unit are also important, as decisions and / or actions should be made as quickly as possible based on the captured image data. While low latency in processing the captured image data can usually be achieved through higher processing power, this typically also leads to increased power consumption by the processing unit, which is generally undesirable.

[0005] Conventional imaging sensors typically deliver a large portion of redundant or user-irrelevant information in relation to the total amount of image data they capture. A classic camera, for example, generates a two-dimensional image of the entire recording area many times per second. This often primarily includes static image areas where no moving objects are captured during the recording time.

[0006] Compared to traditional cameras, well-known event cameras have the advantage of only capturing data in those areas of the image where movement or change occurs. However, if the image sensor itself moves, changes occur across the entire image area (ego-motion problem). In this case, a large amount of data is captured that is of little or no relevance to the user. Therefore, if the image sensor itself is moving, both traditional and event cameras typically require computationally intensive data processing to extract user-relevant information from the large volume of captured image data.

[0007] The detection of moving objects with superimposed self-motion (ego-motion problem) is the subject of active research. Different approaches can be taken, for example, between frame-based solutions, solutions using event cameras, and solutions using specialized sensor systems. FRAUNHOFER SOCIETY for the Advancement of Applied Research eV P148409PC00

[0008] Frame-based approaches using conventional image sensors almost exclusively utilize image sequences to extract moving objects from the captured image data. Typically, both the image depth and the movement of the image sensor itself are determined simultaneously. In K. Yamaguchi, T. Kato, and Y. Ninomiya, “Vehicle Ego-Motion Estimation and Moving Object Detection using a Monocular Camera,” in 18th International Conference on Pattern Recognition (ICPR'06), Aug. 2006, pp. 610–613. doi: 10.1109 / ICPR.1006.1165, features are identified in the captured image data, for example, to detect moving objects. Z. Zhang, F. Cole, R. Tucker, W.T. Freeman, and T. Dekel, “Consistent depth of moving objects in video”, ACM Trans. Graph., Vol. 40, No. 4, pp. 1–12, Aug. 2021, doi: 10.1145 / 3450626.3459871 describe the use of convolutional meshes. D. Zhou, V. Fremont, B. Quost, and B.Wang, “On modeling ego-motion uncertainty for moving object detection from a mobile platform”, in 2014 IEEE Intelligent Vehicles Symposium Proceedings, June 2014, pp. 1101-1338. doi: 10.1109 / IVS.2014.6856422, proposes the use of stereo cameras. However, all these approaches process camera frames at full resolution. This typically requires significant computational effort when evaluating the captured image data. Furthermore, the temporal resolution of the captured image data and the latency in data processing are limited by the frame rate.

[0009] Known event cameras generate data, so-called events, in each pixel only when its brightness value changes, for example, only when the brightness value of a pixel changes by an amount greater than a threshold. This can significantly reduce the rate of image data generated during recording or image acquisition compared to previously described methods, particularly when capturing static scenes with few moving objects. However, the data rate increases rapidly when the camera itself moves, as often the entire or nearly the entire image changes. T. Stoffregen, G. Gallego, T. Drummond, L. Kleeman, and D. Scaramuzza, “Event-Based Motion Segmentation by Motion Compensation,” in 2019 IEEE / CVF International Conference on Computer Vision (ICCV), Seoul, South Korea: IEEE, Oct. 2019, pp. 7143–7252. doi: 10.1109 / ICCV.2019.00734 uses filters to extract moving objects, classifying captured events into different motion groups after recording. G. Gallego, H. Rebecq, and D. Scaramuzza, “A Unifying Contrast Maximization Framework for Event Cameras, with Applications to Motion, Depth, and Optical Flow Estimation”, in 2018 IEEE / CVF Conference on Computer Vision and Pattern Recognition, June 2018, pp. 3867–3876. doi:.

[0010] 10.1109 / CVPR.2018.00407 determine point trajectories over time, from which the movement of the image sensor and object distances can be inferred. And D. Liu, A. Parra, and T.-J. Chin, “Globally Optimal Contrast Maximisation for Event-Based Motion Estimation”, in 2020 IEEE / CVF Conference on Computer Vision and Pattern Recognition (CVPR), Seattle, WA, USA: IEEE, June 2020, pp. 6348-6357. doi: 10.1109 / CVPR41600.2020.00638 optimize the sharpness of the motion-compensated event image, which is achieved via a target function. FRAUNHOFER SOCIETY for the Advancement of Applied Research eV P148409PC00

[0011] is defined. However, these approaches only use event streams recorded over a comparatively long period and are therefore not yet capable of real-time operation.

[0012] Finally, special event sensors, in which different pixels of an image sensor are interconnected to detect motion patterns directly on the camera sensor, are described, for example, in S. Snyder, H. Thompson, MA-A. Kaiser, G. Schwartz, A. Jaiswal, and M. Parsa, “Object Motion Sensitivity: A Bio-inspired Solution to the Ego-motion Problem for Event-based Cameras”. arXiv, March 26, 2023. Accessed: April 4, 2023. [Online], available at: http: / / ar-xiv.org / abs / 2303.14114 or described in S.A. Baccus, B.P. Ölveczky, M. Manu, and M. Meister, “A Retinal Circuit That Computes Object Motion”, J. Neurosci., Vol. 28, No. 27, pp. 6807–6817, July 2008, doi: 10.1523 / JNEUROSCI.4206-07.1008. This involves observing whether the event rate differs between different regions of pixels.By assuming that the event rate in a region of pixels correlates with the speed of an object moving through that region, locally varying motion speeds can be detected. However, disadvantages of this approach include the significantly lower resolution, since entire regions of pixels are combined into a single output. Furthermore, this method at least implicitly requires that the texture density across the entire image be essentially constant, which is not the case in most instances.

[0013] The present invention is therefore based on the objective of creating an image sensor and a method for processing photosensor signals that makes it possible to detect objects moving relative to a reference system as quickly as possible and with as little computational effort as possible, even when the image sensor itself is moving relative to this reference system.

[0014] This problem is solved by an image sensor and by a method for processing image sensor signals according to the independent claims, as well as by a sensor system that includes said image sensor. Specific embodiments are described in the dependent claims.

[0015] The proposed solution is therefore an image sensor, comprehensively:

[0016] a first electrical circuit comprising a first photosensor stage with a first photosensor arranged within a first pixel of the image sensor, wherein the first electrical circuit is configured to generate a compensation signal, and

[0017] a second electrical circuit comprising a second photosensor stage with a second photosensor located within a second pixel of the image sensor, characterized by FRAUNHOFER-GESELLSCHAFT zur Förderung der angewandten Forschung eV P148409PC00

[0018] a delay unit which is set up to transmit the compensation signal generated by the first electrical circuit to the second electrical circuit with a time delay.

[0019] Because the delay unit is configured to transmit the compensation signal generated by the first electrical circuit to the second electrical circuit with a time delay, a signal generated by the second electrical circuit can, for example, be influenced and / or altered and / or completely or at least partially compensated or suppressed based on the compensation signal. This can, for example, make it possible for electrical signals generated at different times by light incident on the first and second pixels of the image sensor to influence each other. This can, for example,Then, when the image sensor is moved relative to a static background (ego-motion problem), it is possible to compensate for and / or suppress electrical signals generated in the image sensor by objects of the static background within the image sensor itself, thus reducing the amount of data generated by the image sensor within a given period of time.

[0020] The first electrical circuit can be configured, for example, to generate the compensation signal based on and / or dependent on a photosensor signal generated by the first photosensor stage. It can also be configured so that the first electrical circuit is not configured to generate the compensation signal based on and / or dependent on the photosensor signal generated by the first photosensor stage.

[0021] For example, the signal amplitude of the compensation signal can depend on and / or correlate with the amount of light detected by the first photosensor of the first electrical circuit, or with any changes therein, and / or with the light intensity detected by the first photosensor, or with any changes therein. It is also conceivable that the compensation signal, provided it is generated by the first electrical circuit, always has the same shape, duration, and / or amplitude.

[0022] The second electrical circuit can be configured, for example, in the absence of a compensation signal transmitted from the first electrical circuit to the second electrical circuit, to output or generate an event signal, or to output or generate it only when the absolute value of a change in light intensity detected by the second photosensor stage and / or a voltage signal generated by the second photosensor stage exceeds a threshold. The absolute value of this threshold can be 0 V or greater than 0 V. Similarly, the first electrical circuit can be configured to output an event signal for the first pixel, or to output it only when the absolute value of a change in light intensity detected by the first photosensor stage and / or a voltage signal generated by the first photosensor stage exceeds a threshold.

[0023] The voltage signal generated by the photosensor stage exceeds a threshold value. The absolute value of this threshold value can be 0 V or greater than 0 V. The image sensor can therefore be configured, for example, as an event sensor or an event camera. The event signal output by the first electrical circuit and / or the second electrical circuit can be a digital signal, such as a square wave, a rising edge, or a falling edge.

[0024] The second electrical circuit can be configured to generate or output a signal, such as the aforementioned event signal, based on a photosensor signal from the second photosensor and / or based on an output voltage from the second photosensor stage and based on the time-delayed compensation signal generated by the first electrical circuit. This can also include the second electrical circuit being configured not to generate a signal, such as the aforementioned event signal, based on a photosensor signal and / or based on an output voltage from the second photosensor stage and based on the time-delayed compensation signal generated by the first electrical circuit.

[0025] Typically, the first and second pixels of the image sensor are arranged in the same plane. For example, the pixels of the image sensor, including the first and second pixels, can be arranged in a checkerboard pattern in rows and columns. The first and second pixels can, for example, be located on the same image sensor chip.

[0026] The delay unit may include one or more of the following elements:

[0027] (Al) a bucket brigade storage facility,

[0028] (A2) one or more low-pass filters connected in series,

[0029] (A3) one or more inverters connected in series (logic NOT gates),

[0030] (A4) an electrical line and one or more digital buffers.

[0031] The bucket-brigade accumulator typically comprises an input, an output, and a plurality of capacitors, each having a first electrode and a second electrode. The first electrodes of the capacitors may be connected in series between the input and the output of the accumulator, or be switchable. The second electrodes of the capacitors may each be connected to ground, or be connectable. The bucket-brigade accumulator may also include electrical switches. These electrical switches may, for example, be arranged between the first electrodes of the capacitors and selectively establish or break an electrical connection between any two of the first electrodes of the capacitors. Fraunhofer Society for the Advancement of Applied Research e.V. P148409PC00

[0032] Low-pass filters typically include an input, an output, a resistor, and a capacitor with a first and a second electrode. Usually, the input of the low-pass filter is connected to the output via the resistor and the first electrode of the capacitor, while the second electrode of the capacitor is connected to ground.

[0033] An inverter in the form of a logic NOT gate typically contains an input and an output, where the input is configured to receive the content of a logic bit (e.g., +5V or 0V), and where the output is configured to output the logical negation of the content of the input bit. Logic NOT gates can be implemented in a variety of ways known from the prior art, e.g., as a CMOS NOT gate, an NMOS NOT gate, a PMOS NOT gate, an NPN resistor-transistor logic gate, or an NPN transistor-transistor logic gate.

[0034] The delay unit can be designed such that the time delay with which the compensation signal is transmitted from the first electrical circuit to the second electrical circuit is variable and / or adjustable. For example, the delay unit can contain one or more electrical switches that allow one or more delaying elements of the delay unit (e.g., individual capacitors of the bucket-brigade storage or the series-connected low-pass filters, individual inverters in the series, or individual digital buffers) to be selectively bypassed by opening one or more of the electrical switches. In this way, a number of the delaying components of the delay unit that contribute to the delay in the transmission of the compensation signal, and thus the time delay itself, can be changed.

[0035] The second electrical circuit may include a comparator stage. The second photosensor stage may then be electrically connected or connectable to a first input of the comparator stage of the second electrical circuit. The comparator stage of the second electrical circuit may, for example, be configured to generate and / or output an electrical signal, such as the aforementioned event signal, if and only if the absolute value of the difference between an electrical voltage at the first input of the comparator stage of the second electrical circuit, typically based on an output voltage of the second photosensor stage, and an electrical voltage at a second input of the comparator stage of the second electrical circuit is greater than a threshold value. The absolute value of this threshold value may be 0 V or greater than 0 V. Fraunhofer Society for the Advancement of Applied Research e.V. P148409PC00

[0036] Similarly, the first electrical circuit can also include a comparator stage. The first photosensor stage can then be electrically connected, or connectable, to a first input of the comparator stage of the first electrical circuit. The comparator stage of the first electrical circuit can, for example, be configured to output an electrical signal, such as the aforementioned event signal, if and only if the absolute value of the difference between an electrical voltage at the first input of the comparator stage of the first electrical circuit—typically based on an output voltage of the first photosensor stage—and an electrical voltage at a second input of the comparator stage of the first electrical circuit exceeds a threshold value. The absolute value of this threshold value can, in turn, be 0 V or greater than 0 V.

[0037] The second electrical circuit may further include a differentiator stage. The second photosensor stage may then be electrically connected, or connectable, to the first input of the comparator stage of the second electrical circuit via the differentiator stage of the second electrical circuit. The differentiator stage of the second electrical circuit may, for example, be configured to output an electrical voltage to the first input of the comparator stage of the second electrical circuit, based on a difference between a current output voltage of the second photosensor stage and a last preceding output voltage of the second photosensor stage that caused the comparator stage of the second electrical circuit to output an event signal.

[0038] The differentiator stage of the second electrical circuit can function, for example, like a switched capacitor amplifier. The differentiator stage of the second electrical circuit can include an input, an output, a first capacitor, a second capacitor, an amplifier (for example, an inverting amplifier), and a switching device. The switching device can include at least one electrical switch, which may, for example, comprise a transistor. The input of the differentiator stage of the second electrical circuit can be electrically connected, or connectable, to an output of the second photosensor stage. And the output of the differentiator stage of the second electrical circuit can be electrically connected, or connectable, to the first input of the comparator stage of the second electrical circuit.The first and second capacitors of the differentiator stage of the second electrical circuit can be electrically connected in series between the input and output of the differentiator stage of the second electrical circuit. For example, one electrode of the first capacitor of the differentiator stage of the second electrical circuit can be electrically connected to the FRAUNHOFER SOCIETY for the Advancement of Applied Research eV P148409PC00.

[0039] The input of the differentiator stage of the second electrical circuit may be connected or connectable, and one electrode of the second capacitor of the differentiator stage of the second electrical circuit may be electrically connected or connectable to the output of the differentiator stage of the second electrical circuit. The amplifier and the switching device of the differentiator stage of the second electrical circuit may be connected electrically in parallel, or both may be connected electrically in parallel, to the second capacitor of the differentiator stage of the second electrical circuit.

[0040] The differentiator stage of the second electrical circuit can be designed, for example, such that when the electrical switch of the switching device of the differentiator stage of the second electrical circuit is closed, an electrical voltage at the output of the differentiator stage of the second electrical circuit corresponds to an electrical voltage at the input of the differentiator stage of the second electrical circuit.And the differentiator stage of the second electrical circuit can be designed such that when the electrical switch of the switching device of the differentiator stage of the second electrical circuit is open, an electrical voltage at the output of the differentiator stage of the second electrical circuit is amplified or increased by a factor of C1 / C2 relative to an electrical voltage at the input of the differentiator stage of the second electrical circuit, where Ci and C2 are the capacitances of the first and second capacitors of the differentiator stage of the second electrical circuit.

[0041] In some embodiments, the first photosensor stage of the first electrical circuit can be electrically connected, or connectable, to the differentiator stage of the second electrical circuit via the delay unit. More precisely, an output of the first photosensor stage of the first electrical circuit can be electrically connected, or connectable, via the delay unit to the input of the differentiator stage of the second electrical circuit and / or to the output of the second photosensor stage of the second electrical circuit. In this case, the compensation signal generated by the first electrical circuit can, for example, be a photosensor signal generated by the first photosensor stage of the first electrical circuit.The first and second electrical circuits can then be connected via the delay unit in such a way that the compensation signal, in the form of the photosensor signal generated by the first photosensor stage of the first electrical circuit, is added with a time delay and a negative sign to a photosensor signal generated by the second photosensor stage of the second electrical circuit. If the first and second photosensor stages detect the same intensity profile with a time delay (as, for example, when the image sensor moves relative to a static background), then, in this embodiment of the image sensor, a photosensor signal generated by the second photosensor stage can already be detected at the output of the FRAUNHOFER-GESELLSCHAFT zur Förderung der angewandten Forschung eV P148409PC00.

[0042] The second photosensor stage is compensated for by the time-delayed photosensor signal of the first photosensor stage and can be, for example, eliminated to zero.

[0043] The second photosensor stage of the second electrical circuit can contain an amplifier stage in addition to the second photosensor, e.g., a photodiode. The amplifier stage of the second photosensor stage can then be configured, for example, to output an electrical voltage that correlates with the amount and / or intensity of light detected by the second photosensor of the second photosensor stage. Similarly, the first photosensor stage of the first electrical circuit can contain an amplifier stage in addition to the first photosensor, e.g., a photodiode. The amplifier stage of the first photosensor stage can then be configured, for example, to output an electrical voltage that correlates with the amount and / or intensity of light detected by the first photosensor of the first photosensor stage.

[0044] If the second electrical circuit contains the comparator stage described above, the delay unit can be electrically connected to the second input of the comparator stage of the second electrical circuit.

[0045] For example, the first photosensor stage of the first electrical circuit can be electrically connected to the delay unit via the comparator stage of the first electrical circuit. The compensation signal generated by the first electrical circuit can then be, for example, the event signal that can be generated by the comparator stage of the first electrical circuit. In this way, the compensation signal generated by the first electrical circuit and transmitted with a time delay via the delay unit can be used, for example, to change and / or compensate for the electrical voltage at the second input of the comparator stage of the second electrical circuit. Thus, the compensation signal can be used, for example, to influence and / or suppress the output of the aforementioned event signal by the comparator stage of the second electrical circuit.

[0046] The image sensor can contain a logic AND gate. An output of the comparator stage of the first electrical circuit can then be electrically connected to a first input of the AND gate via the delay unit, e.g., via a digital negation. An output of the comparator stage of the second electrical circuit can be electrically connected to a second input of the AND gate. Via the digital negation at the first input of the AND gate, a time-delayed comparator signal output by the comparator stage of the first electrical circuit, e.g., in the form of a time-delayed event signal of the type described above, can temporarily mute an output of the AND gate, e.g., within a time interval during which the output of a FRAUNHOFER SOCIETY for the Advancement of Applied Research e.V. P148409PC00

[0047] The event signal is expected to be sent to the second input of the AND gate by the comparator stage of the second electrical circuit.

[0048] The first electrical circuit can also include a differentiator stage. The first photosensor stage of the first electrical circuit can then be electrically connected to the delay unit via the differentiator stage of the first electrical circuit. The differentiator stage of the first electrical circuit can be configured to output an electrical voltage, via the delay unit, to the second input of the comparator stage of the second electrical circuit. This voltage is based on the difference between the current output voltage of the first photosensor stage and a previous output voltage of the first photosensor stage that caused the comparator stage of the first electrical circuit to output an event signal. For example, the differentiator stage of the first electrical circuit can be configured according to the differentiator stage of the second electrical circuit described above.The differentiator stage of the first electrical circuit can therefore contain the same components and have the same functionality as the differentiator stage of the second electrical circuit.

[0049] The image sensor can further include a third electrical circuit comprising a third photosensor stage with a third photosensor located within a third pixel of the image sensor, as well as a further delay unit configured to transmit the compensation signal from the first electrical circuit to the third electrical circuit with a time delay. The third electrical circuit can have the same components and functionalities as the second electrical circuit.

[0050] The proposed sensor system comprises at least the previously described image sensor and a device for detecting relative motion between the image sensor and a reference system. The image sensor's delay unit can be configured to adjust the time delay with which the compensation signal from the first electrical circuit can be transmitted to the second electrical circuit, depending on the detected relative motion, e.g., depending on the direction and / or velocity of the image sensor relative to the reference system or the reference system relative to the image sensor. The sensor system can, for example, comprise a moving vehicle or a movable robot, wherein the image sensor is arranged on or attached to the vehicle or on or attached to the movable robot. The vehicle can, for example, be an automobile, a rail vehicle, an aircraft, or a drone.Alternatively, the image sensor can be stationary. The movement relative to the image sensor is described in FRAUNHOFER-GESELLSCHAFT zur Förderung der angewandten Forschung eV P148409PC00.

[0051] The reference system can then be stationary relative to, for example, a moving or movable conveyor belt.

[0052] The image sensor can contain an imaging optic. The delay unit can then, for example, be configured to set the time delay such that the time delay corresponds to a time difference between a first point in time, at which the imaging optic maps an object at rest relative to the reference system onto the first pixel, and a later second point in time, at which the imaging optic maps the object at rest relative to the reference system onto the second pixel.

[0053] The device for detecting the relative motion between the image sensor and the said reference system may include at least one or more of the following systems:

[0054] a radar system,

[0055] a lidar system,

[0056] a transmitting and receiving unit of a satellite-based navigation system or

[0057] an inertial measurement unit (IMU), e.g. for measuring acceleration and / or spatial orientation of the image sensor.

[0058] The proposed method for processing photosensor signals from the previously described image sensor includes at least the transmission of a compensation signal generated by the first electrical circuit to the second electrical circuit with a time delay.

[0059] Furthermore, the method can include detecting a relative movement between the image sensor and a reference system and adjusting the time delay of the compensation signal depending on the detected relative movement.

[0060] Exemplary embodiments of the proposed image sensor, the proposed sensor system and the proposed method are shown in the figures and are explained in more detail below.

[0061] They show:

[0062] Fig. 1a schematically shows a sectional view of a sensor system of the type proposed here with an image sensor that is moved relative to a reference system and is in a first position relative to the reference system; FRAUNHOFER SOCIETY for the Advancement of Applied Research eV P148409PC00

[0063] Fig. 1b schematically shows the sensor system with the moving image sensor from Fig. 1a, wherein the image sensor is located in a second position different from the first position relative to the reference system;

[0064] Fig. 2a schematically shows a circuit architecture of the image sensor from figures aa and bb according to a first embodiment, wherein a first electrical circuit assigned to a first pixel of the image sensor is electrically connected via a delay unit to a second electrical circuit assigned to a second pixel of the image sensor;

[0065] Fig. 2b schematically shows a detailed view of the circuit architecture of the first electrical circuit from Fig. 2a;

[0066] Fig. 2c schematically shows a detailed view of the circuit architecture of the second electrical circuit from Fig. 2a;

[0067] Fig. 3a schematically shows a circuit architecture of the delay unit from Fig. 2a according to a first embodiment;

[0068] Fig. 3b schematically shows a circuit architecture of the delay unit from Fig. 2a according to a second embodiment;

[0069] Fig. 3c schematically shows a circuit architecture of the delay unit from Fig. 2a according to a third embodiment;

[0070] Fig. 3d schematically shows a circuit architecture of the delay unit from Fig. 2a according to a fourth embodiment;

[0071] Fig. 4 schematically shows a circuit architecture of the image sensor from figures aa and bb according to a second embodiment;

[0072] Fig. 5 schematically shows a circuit architecture of the image sensor from figures aa and bb according to a third embodiment;

[0073] Fig. 6 schematically shows a circuit architecture of the image sensor from figures aa and bb according to a fourth embodiment; FRAUNHOFER-GESELLSCHAFT zur Förderung der angewandten Forschung eV P148409PC00

[0074] Fig. 7 schematically shows a circuit architecture of the image sensor from figures aa and bb according to a fifth embodiment;

[0075] Fig. 8 schematically shows a circuit architecture of the image sensor from Figures 1a and 1b according to a sixth embodiment; and

[0076] Fig. 9 schematically shows the steps of a method for processing photosensor signals from the image sensor shown in Figures 1a and 1lb.

[0077] Fig. 1a schematically shows a sensor system 1 with an image sensor 2 and a device 3 for detecting relative motion between the image sensor 2 and a reference system 4. Here, the image sensor 2 and the device 3 are rigidly connected. The reference system 4 is, for example, a part of the Earth's surface. The image sensor 2 and the device 3 move relative to the reference system 4 along a first direction 12, here, for example, along a straight line and at a constant velocity v to the left. For example, the image sensor 2 can move parallel or substantially parallel to the Earth's surface. The sensor system 1 can also include a vehicle (not explicitly shown here) on or in which the image sensor 2 and the device 3 are arranged. The vehicle can be, for example, a car, a rail vehicle, a manned aircraft, or an unmanned aircraft, such as a drone.Alternatively, it is also conceivable that the image sensor 2 and the device 3 are stationary and the reference system 4 is moving. The reference system 4, which is moving relative to a stationary image sensor 2, can then, for example, comprise a moving conveyor belt or be stationary relative to a moving conveyor belt.

[0078] The device 3 for detecting the relative motion between the image sensor 2 and the reference system 4 can, for example, include one or more of the following systems: a radar system, a lidar system, a transmitter and receiver unit of a satellite-based navigation system, or an inertial measurement unit (IMU), e.g., with at least one accelerometer and / or with at least one gyroscope.

[0079] The image sensor 2 comprises a housing 5, an image sensor chip 6, and an imaging optic 7. The image sensor chip 6 contains a plurality of pixels, of which pixels 8a-h are shown schematically here. Each of the pixels 8a-h defines an area in a plane of the image sensor chip 6, e.g., a rectangular or a square area. The pixels 8a-h are thus arranged in the same plane of the image sensor chip 6 and, for example, in rows and columns. The image sensor 2 also includes a processing unit 9, e.g., in the form of a microprocessor or the like, which is electrically connected to the image sensor chip 6. The image sensor chip 6 and the imaging optic 7 are fixedly arranged relative to the housing 5. Fraunhofer Society for the Advancement of Applied Research e.V. P148409PC00

[0080] Imaging optics 7 typically contain at least one or more lenses. The imaging optics 7 is configured to optically image objects in an observation space onto the image sensor chip 6, in particular onto the areas of the image sensor chip 6 defined by the pixels 8a-h. In each of the areas of the image sensor chip 6 defined by the pixels 8a-h, a photosensor is arranged, each of which is configured to detect a light intensity and / or a quantity of light that is imaged onto the respective pixel by the imaging optics 7, as will be explained in more detail later.

[0081] Fig. 1a further shows a first object 10, which is stationary relative to the reference frame 4 and thus moves relative to the image sensor 2. Here it is schematically represented as a square. It also shows a second object 11, which moves relative to both the reference frame 4 and the image sensor 2. Here it is schematically represented as a circle. The second object 11 moves relative to both the image sensor 2 and the reference frame 4 along a second direction 13, for example, along a straight line and at a constant velocity v to the right. In the example shown here, the image sensor 2 and the second object 11 therefore move parallel to each other and in opposite directions.

[0082] Fig. 1a shows the sensor system 1 with the image sensor 2 and the device 3, the reference system 4, and the objects 10, 11 at a first time ti. At the first time ti, the image sensor 2 is located at position Xβ(ti) relative to the reference system 4. At the first time ti, the first object 10 is located at position xi(ti) relative to the reference system 4 and is imaged by the imaging optics 7 onto a first pixel 8b of the image sensor 2, indicated in Fig. 1a by a dashed arrow. And at the first time ti, the second object 11 is located at position X2(ti) relative to the reference system 4 and is imaged by the imaging optics 7 onto a pixel 8d of the image sensor 2, again indicated in Fig. 1a by a dashed arrow.

[0083] Fig. 1b shows the sensor system 1 with the image sensor 2 and the device 3, the reference system 4, and the objects 10, 11 from Fig. 1a at a later second time t2. Thus, t2 = ti + At, where At is positive, so that t2 > ti. Here and in the following, recurring features in different figures are designated with the same reference symbols.

[0084] At the second time point t2, the image sensor 2 is located at position Xß(t2) relative to the reference frame 4. Due to the relative motion between the image sensor 2 and the reference frame 4, Xß(t2) differs from Xß(ti). At the second time point t2, the first object 10 is located at position xi(t2) relative to the reference frame 4. Since the first object 10 is at rest relative to the reference frame 4, xi(t2) = xi(ti). At the second time point t2, the first object 10 is focused by the imaging optics 7 onto a second pixel 8c of the image sensor 2. [FRAUNHOFER SOCIETY for the Advancement of Applied Research e.V. P148409PC00]

[0085] Due to the relative motion between the image sensor 2 and the reference frame 4, the first object 10, which is at rest relative to the reference frame 4, is imaged onto different pixels 8b and 8c of the image sensor 2 at the different times ti and t2. At the second time t2, the second object 11 is located at position X2(t2) relative to the reference frame 4. Due to the relative motion between the second object 11 and the reference frame 4, X2(t2) differs from X2(ti). At the second time t2, the second object 11 is imaged by the imaging optics 7 onto a pixel 8f of the image sensor 2. Due to the relative motion between the image sensor 2 and the second object 11, the second object 11 is imaged onto different pixels 8d and 8f of the image sensor 2 at the different times ti and t2.

[0086] The first object 10, which is at rest relative to reference system 4, and the second object 11, which is moving relative to reference system 4, move relative to the image sensor 2 at different speeds: In the embodiment shown here, the image of the first object 10 moves to the right within the image plane of the image sensor 2 defined by pixels 8a-h by a distance d = v • (t2 - ti) relative to the image sensor 2 within the time interval t2 - ti, where d is the distance between two adjacent pixels of the image sensor chip 6 parallel to the direction of the relative movement between the image sensor 2 and reference system 4. And the image of the second object 11 moves to the right within the same time interval At = t2 - ti relative to the image sensor 2 by a distance 2 - d, in the same embodiment shown here.

[0087] As will be explained in more detail below, the image sensor 2 is designed and / or adjustable and / or programmable such that, in the embodiment shown here, the image of the first object 10, which is stationary relative to the reference system 4, does not trigger the generation of image data in the image sensor 2. In contrast, the image of the second object 11, which is moving relative to the reference system 4, triggers the generation of image data in the image sensor 2. This data can then be processed, for example, by the processing unit 9 and / or forwarded to a storage unit (not shown here). In applications where a user is only or primarily interested in objects moving relative to the reference system 4, such as the second object 11, the data rate generated by the image sensor 2 can therefore be significantly reduced compared to known image sensors, without or with virtually no loss of information relevant to the user. For example,The maximum achievable temporal resolution during image capture with image sensor 2 is significantly increased compared to known image sensors, without requiring a more powerful computing unit.

[0088] Fig. 2a schematically shows details of the image sensor 2 from Figures 1a and 1b according to a first embodiment, here designated 2a. More precisely, Fig. 2a schematically shows a FRAUNHOFER SOCIETY for the Advancement of Applied Research eV P148409PC00

[0089] The circuit architecture of a first electrical circuit 100, comprising a first photosensor stage 120 with a first photosensor 121 arranged in an area of ​​the image sensor chip 6 defined by the first pixel 8b, and the circuit architecture of a second electrical circuit 200, comprising a second photosensor stage 220 with a second photosensor 221 arranged in an area of ​​the image sensor chip 6 defined by the second pixel 8c. Furthermore, Fig. 2a shows a delay unit 20 that electrically connects the first electrical circuit 100 to the second electrical circuit 200 and is configured to transmit a compensation signal, which can be generated or is generated by the first electrical circuit 100, to the second electrical circuit 200 with a time delay, as will be explained in more detail below.For the purpose of improved illustration, the electrical circuits 100, 200, which are assigned to the pixels 8b, 8c, are each slightly enlarged and illustrated individually in figures 2b and 2c, but for the sake of simplified representation, each without the delay unit 20 and its electrical connection with the electrical circuits 100, 200.

[0090] The circuit architectures of the first electrical circuit 100 assigned to the first pixel 8b of the image sensor chip 6, the second electrical circuit 200 assigned to the second pixel 8c of the image sensor chip 6, and the electrical connection of the electrical circuits 100 and 200 via the delay unit 20 according to Fig. 2a are shown here only as examples of corresponding circuit architectures of further electrical circuits, each of which is assigned to one of the pixels from the plurality of pixels of the image sensor chip 6. This can apply to the image sensor 2a according to Fig. 2a as well as to all further embodiments of the image sensor 2 described below. The electrical circuits assigned to the pixels of the image sensor chip 6 can, for example, be electrically connected to each other in pairs via a delay unit of the type of delay unit 20. This can also apply to the image sensor 2a according to Fig.2a and apply to all other embodiments of the image sensor 2 described below.

[0091] The first electrical circuit 100, shown in the most detailed detail in Fig. 2b, which serves to process photosensor signals generated by the first photosensor stage 120, contains, in addition to the first photosensor stage 120, a power supply 81 (here a DC voltage source), a differentiator stage 140, and a comparator stage 160. For clarity only, the photosensor stage 120, the differentiator stage 140, and the comparator stage 160 are each highlighted by dashed boxes in Fig. 2b. Fraunhofer Society for the Advancement of Applied Research e.V. P148409PC00

[0092] The photosensor stage 120 of the first electrical circuit 100 comprises, in addition to the photosensor 121, an amplifier stage 122, which is electrically connected to the power supply 81 and to a reference potential or ground 82. The photosensor 121 is configured to absorb light incident on the first pixel 8b, e.g., in the visible and / or IR and / or UV spectral range. Here, the photosensor 121 contains, for example, a photodiode. If an electrical voltage is applied between the electrodes of the photosensor, the light absorbed by the photosensor 121 triggers an electric current flowing between the power supply 81 and ground 82 through the photosensor 121, which correlates with the light intensity incident on the first pixel 8b. The amplifier stage 122 contains, for example, a photodiode.a field-effect transistor 123 and an inverting amplifier 124 and is configured to convert the electric current triggered by the photosensor 121 into an electrical voltage V at an output 125 of the photosensor stage 120. S f to transmit, which correlates with the light intensity incident on the first pixel 8b. For example, the amplifier stage 122 can be configured such that the electrical voltage V S The value f at output 125 of the photosensor stage 120 increases logarithmically with the photocurrent flowing through the photosensor 121. As shown in Fig. 2b, in the embodiment shown here, the drain, source, and gate of the field-effect transistor 123 are electrically connected to the power supply 81, to the photosensor 121, and to the output 125 of the photosensor stage 120. The amplifier 124 electrically connects the source electrode of the field-effect transistor 123 and the photosensor 121 to the output 125 of the photosensor stage 120.

[0093] The differentiator stage 140 of the first electrical circuit 100 has an input 141, which is electrically connected to the output 125 of the photosensor stage 120, and an output 142. Furthermore, the differentiator stage 140 comprises a first capacitor 143 with a capacitance Ci, a second capacitor 144 with a capacitance C2, a differentiating amplifier 145, and a switching device 146. The switching device 146 contains an electrical switch, e.g., in the form of a transistor. The capacitors 143 and 144 are electrically connected in series between the input 141 and the output 142 of the differentiator stage 140. That is, one electrode of the first capacitor 143 is electrically connected to the input 141, and one electrode of the second capacitor 144 is electrically connected to the output 142. The differentiating amplifier 145 electrically connects the first capacitor 143 to the output 142 of the differentiator stage 140.The differentiating amplifier 145 is connected in parallel to the second capacitor 144. The switching device 146 selectively connects the first capacitor 143 electrically to the output 142 of the differentiator stage 140. The switching device is connected in parallel to the second capacitor 144. That is, the second capacitor 144, the differentiating amplifier 145, and the switching device 146 are connected in parallel to each other. Fraunhofer Society for the Advancement of Applied Research e.V. P148409PC00.

[0094] The switching device 146 is designed such that, when the switch is closed, the electrical voltage V is present between the electrodes of the first capacitor 143. Sf sets the voltage that is present or output at output 125 of the photosensor stage 120 at that time. In this sense, the first capacitor 143 stores the electrical photosensor voltage V present or output at output 125 of the photosensor stage 120 at the time the switch of the switching device 146 is closed. S f. If the switch of the switching device 146 is closed, this voltage V is present S f is also present at output 142 of the differentiator stage 140. When the switch of the switching device 146 is opened again, the differentiator stage 140 outputs an electrical voltage Voiff,i at its output 142, which is equal to the difference between the voltage V currently output at output 125 of the photosensor stage 120, amplified by a gain factor of -C1 / C2. S f and the photosensor voltage V (stored by means of the first capacitor 143) Sf is the voltage that was present or output at the output 125 of the photosensor stage 120 at the time the switch 146 was last closed. The electrical voltage output at the output 142 of the differentiator stage 140 is thus based on an output voltage of the photosensor stage 120. In other words, closing the switch of the switch 146 by means of the first capacitor 143 reduces the photosensor voltage V that was output at the output 125 of the photosensor stage 120 at the time the switch 146 was closed. S f is stored as the new photovoltage reference value. And with the next opening of the switch of the switching device 146, the difference between the current photosensor voltage V is displayed at the output 142 of the differentiator stage 140. Sf is output at output 125 of the photosensor stage 120 and the photovoltage reference value last stored using the first capacitor 143. Typically, the switching device 146 is configured to close its switch only temporarily in order to store a new photovoltage reference value V using the first capacitor 143. S to save f, and then immediately open the switch again.

[0095] The comparator stage 160 of the first electrical circuit 100 has a first input 161, which is electrically connected to the output 142 of the differentiator stage 140 and at which the output voltage Voiff,i of the differentiator stage 140 is thus applied, a second input 162 and a third input 163. Furthermore, the comparator stage 160 has a first output 164 and a second output 165. The photosensor stage 120 is thus electrically connected to the first input 161 of the comparator stage 160 via the differentiator stage 140.

[0096] The comparator stage 160 is designed such that a first event signal 166 is output at the first output 164 of the comparator stage 160, or only then FRAUNHOFER SOCIETY for the Advancement of Applied Research eV P148409PC00

[0097] A second event signal 167 is output at the second output 165 of the comparator stage 160, or is only output if the electrical voltage Voiff,i at the first input 161 of the comparator stage 160 falls below the electrical voltage doN applied at the second input 162, for example, by at least a predefined threshold. This threshold can also be zero or zero volts. The comparator stage 160 is configured such that a second event signal 167 is output at the second output 165 of the comparator stage 160, or is only output if the electrical voltage Voiff,i at the first input 161 of the comparator stage 160 falls below the electrical voltage dorr applied at the third input 163, for example, by at least a predefined threshold. This threshold can also be zero or zero volts. Typically, doN and dorr are chosen such that doN > dorr. The comparator stage 160 can be designed such that the event signals 166, 167 output at outputs 164, 165 are output in the form of digital signals.For example, the first event signal 166, output at the first output 164, can be displayed as a positive square wave pulse or a rising edge. Similarly, the second event signal 167, output at the second output 165, can be displayed as a negative square wave pulse or a falling edge.

[0098] The comparator stage 160 is typically configured and connected to the differentiator stage 140, and in particular to the switching device 146 of the differentiator stage 140, such that the switch of the switching device 146 of the differentiator stage 140 closes or is caused to close as soon as one of the event signals 166, 167 is output at one of the outputs 164, 165 of the comparator stage 160. For example, the switch of the switching device 146 can be configured as a transistor switch connected to the outputs 164, 165 and can be switched or closed by the event signals 166, 167 output at the outputs 164, 165. This implies that the first capacitor 143 of the differentiator stage 140 serves as the photovoltage reference value for each photovoltage value V. Sf is stored at output 125 of the photosensor stage 120, which last caused the comparator stage 160 to output one of the event signals 166, 167. The first electrical circuit 100 assigned to the first pixel 8b is therefore configured such that it outputs an event signal whenever the photovoltage V changes. Sf at output 125 of the photosensor stage 120 has been modified since the last output of an event signal by the comparator stage 160 such that the voltage Voiff,i at output 142 of the differentiator stage 140, or equivalently, at the first input 161 of the comparator stage 160, exceeds the threshold value doN applied to the second input 162 of the comparator stage 160, or falls below the threshold value dorr applied to the third input 163 of the comparator stage 160. That is, the first circuit 100 assigned to the first pixel 8b is configured to output an event signal at one of the outputs 164, 165 of the comparator stage 160 whenever, or only when, an absolute value of a change in a signal is detected by the photosensor stage 120. FRAUNHOFER SOCIETY for the Advancement of Applied Research e.V. P148409PC00

[0099] detected light intensity and / or when the absolute value of a change in a voltage signal generated by photosensor stage 120 exceeds a threshold. The absolute value of this threshold is typically greater than zero.

[0100] The second electrical circuit 200, shown in the most detailed detail in Fig. 2c, which serves to process photosensor signals generated by the second photosensor stage 220, contains, in addition to the second photosensor stage 220, a power supply 81 (here a DC voltage source), a differentiator stage 240, and a comparator stage 260. For clarity only, the photosensor stage 220, the differentiator stage 240, and the comparator stage 260 are each highlighted by dashed boxes in Fig. 2c.

[0101] The photosensor stage 220 of the second electrical circuit 200 comprises, in addition to the photosensor 221, an amplifier stage 222, which is electrically connected to the power supply 81 and to a reference potential or ground 82. The photosensor 221 is configured to absorb light incident on the second pixel 8c, e.g., in the visible and / or IR and / or UV spectral range. Here, the photosensor 221 contains, for example, a photodiode. If an electrical voltage is applied between the electrodes of the photosensor 221, the light absorbed by the photosensor 221 triggers an electric current flowing between the power supply 81 and ground 82 through the photosensor 221, which correlates with the light intensity incident on the second pixel 8c. The amplifier stage 222 contains, for example, a photodiode.a field-effect transistor 223 and an inverting amplifier 224 and is configured to convert the electric current triggered by the photosensor 221 into an electrical voltage V at an output 225 of the photosensor stage 220. S f to transmit, which correlates with the light intensity incident on the second pixel 8c. For example, the amplifier stage 222 can be configured such that the electrical voltage V S f at output 225 of the photosensor stage 220 increases logarithmically with the photocurrent flowing through the photosensor 221. As shown in Fig.

[0102] As shown in Figure 2c, in the embodiment shown here, the drain, source, and gate of the field-effect transistor 223 are electrically connected to the power supply 81, to the photosensor 221, and to the output 225 of the photosensor stage 220. The amplifier 224 electrically connects the source electrode of the field-effect transistor 223 and the photosensor 221 to the output 225 of the photosensor stage 220.

[0103] The differentiator stage 240 of the second electrical circuit 200 has an input 241, which is electrically connected to the output 225 of the photosensor stage 220, and an output 242. Furthermore, the differentiator stage 240 comprises a first capacitor 243 with capacitance Ci, a second capacitor 244 with capacitance C2, a differentiating amplifier 245, and a switching device 246. The switching device 246 contains FRAUNHOFER-GESELLSCHAFT zur Förderung der angewandten Forschung eV P148409PC00

[0104] an electrical switch, e.g., in the form of a transistor. Capacitors 243 and 244 are electrically connected in series between the input 241 and the output 242 of the differentiator stage 240. That is, one electrode of the first capacitor 243 is electrically connected to the input 241, and one electrode of the second capacitor 244 is electrically connected to the output 242. The differentiating amplifier 245 electrically connects the first capacitor 243 to the output 242 of the differentiator stage 240. The differentiating amplifier 245 is connected in parallel with the second capacitor 244. The switching device 246 selectively connects the first capacitor 243 electrically to the output 242 of the differentiator stage 240. The switching device is connected in parallel with the second capacitor 244. That is, the second capacitor 244, the differentiating amplifier 245 and the switching device 246 are connected in parallel to each other.

[0105] The switching device 246 is designed such that, when the switch is closed, the electrical voltage V is present between the electrodes of the first capacitor 243. S f sets the voltage that is present or output at output 225 of the photosensor stage 220 at that time. In this sense, the first capacitor 243 stores the electrical photosensor voltage V present or output at output 225 of the photosensor stage 220 at the time the switch of the switching device 246 is closed. S f. If the switch of the switching device 246 is closed, this voltage V is present Sf also at output 242 of the differentiator stage 240. If the switch of the switching device 246 is opened again, the differentiator stage 240 outputs an electrical voltage Voiff,2 at its output 242, which is equal to a difference between the voltage V currently output at output 225 of the photosensor stage 220, amplified by a gain factor -C1 / C2. S f and the photosensor voltage V (stored by means of the first capacitor 243) Sf is the voltage that was present or output at the output 225 of the photosensor stage 220 at the time the switch of the switching device 246 was last closed. The electrical voltage output at the output 242 of the differentiator stage 240 is thus based on an output voltage of the photosensor stage 220. In other words, closing the switch of the switching device 246 by means of the first capacitor 243 reduces the photosensor voltage V that was output at the output 225 of the photosensor stage 220 at the time the switch of the switching device 246 was closed. S f is stored as the new photovoltage reference value. And with the next opening of the switch of the switching device 246, the difference between the current photosensor voltage V is displayed at the output 242 of the differentiator stage 240. S f is output at output 225 of the photosensor stage 220 and the photovoltage reference value last stored using the first capacitor 243.

[0106] Typically, the switching device 246 is configured to close its switch only temporarily in order to establish a new FRAUNHOFER SOCIETY for the Advancement of Applied Research eV P148409PC00

[0107] Photovoltage reference value V S to save f, and then immediately open the switch again.

[0108] The comparator stage 260 of the second electrical circuit 200 has a first input 261, which is electrically connected to the output 242 of the differentiator stage 240 and at which the output voltage Voiff,2 of the differentiator stage 240 is thus applied, a second input 262 and a third input 263. Furthermore, the comparator stage 260 has a first output 264 and a second output 265. The photosensor stage 220 is thus electrically connected to the first input 261 of the comparator stage 260 via the differentiator stage 240.

[0109] The comparator stage 260 is configured such that a first event signal 266 is output at the first output 264 of the comparator stage 260, or is output only if the electrical voltage Voiff,2 at the first input 261 of the comparator stage 260 exceeds the electrical voltage doN applied at the second input 262, e.g., by at least a predetermined threshold. This threshold can also be zero or zero volts. The comparator stage 260 is also configured such that a second event signal 267 is output at the second output 265 of the comparator stage 260, or is output only if the electrical voltage Voiff,2 at the first input 261 of the comparator stage 260 falls below the electrical voltage dor applied at the third input 263, e.g., by at least a predetermined threshold. This threshold can also be zero or zero volts. Typically, doN and dorr are chosen such that doN > dorr.The comparator stage 260 can be configured such that the event signals 266 and 267 output at outputs 264 and 265 are output as digital signals. For example, the first event signal 266 output at the first output 264 can be output as a positive square wave pulse or as a rising edge. Similarly, the second event signal 267 output at the second output 265 can be output as a negative square wave pulse or as a falling edge.

[0110] The comparator stage 260 is typically configured and connected to the differentiator stage 240, and in particular to the switching device 246 of the differentiator stage 240, such that the switch of the switching device 246 of the differentiator stage 240 closes or is caused to close as soon as one of the event signals 266, 267 is output at one of the outputs 264, 265 of the comparator stage 260. For example, the switch of the switching device 246 can be configured as a transistor switch connected to the outputs 264, 265 and can be switched or closed by the event signals 266, 267 output at the outputs 264, 265. This implies that the first capacitor 243 of the differentiator stage 240 serves as a photovoltage reference value.

[0111] each the value of the photovolt V Sf is stored at output 225 of the photosensor stage 220, which last caused the comparator stage 260 to output one of the event signals 266, 267. The second electrical circuit 200 assigned to the second pixel 8c is therefore configured such that it outputs an event signal whenever, or only when, the photovoltage V Sf at output 225 of photosensor stage 220 since the last output of an event signal by the comparator stage 260 is changed such that the voltage Voiff,2 at output 242 of differentiator stage 240 or, equivalently, at the first input 261 of comparator stage 260 exceeds the threshold value doN at the second input 262 of comparator stage 260 or falls below the threshold value dorr at the third input 263 of comparator stage 260. That is, the second electrical circuit 200 assigned to the second pixel 8c is configured to output an event signal at one of the outputs 264, 265 of the comparator stage 260 whenever or only when the absolute value of a change in light intensity detected by the photosensor stage 220 and / or the absolute value of a change in a voltage signal generated by the photosensor stage 220 exceeds a threshold. The absolute value of this threshold is typically greater than zero.

[0112] In the image sensor 2a shown in Fig. 2a, the delay unit 20 electrically connects the output 142 of the differentiator stage 140 of the first electrical circuit 100 to the second input 262 and to the third input 263 of the comparator stage 260 of the second electrical circuit 200. The delay unit 20 has an input 22 and an output 24. In the image sensor 2a according to Fig. 2a, the compensation signal generated by the first electrical circuit 100 is thus given by the electrical voltage Voiff,i applied to or output at the output 142 of the differentiator stage 140 of the first electrical circuit 100, see Fig. 2b. And the delay unit 20 is configured to transmit this compensation signal with a time delay to the inputs 262, 263 of the comparator stage 260 of the second electrical circuit 200. In the image sensor 2a according to Fig.2a The delay unit 20 is thus configured to set and / or change the voltage thresholds doN and dorr at the inputs 262, 263 of the comparator stage 260 of the second electrical circuit 200, with which the output of the event signals 266, 267 at the outputs 264, 265 of the comparator stage 260 can be controlled or regulated, by means of the compensation signal. The second electrical circuit 200 is thus configured to generate and / or suppress event signals based on an output voltage of the photosensor stage 210 and based on the time-delayed compensation signal generated by the first electrical circuit 100, here e.g. at the outputs 264, 265 of the comparator stage 260. FRAUNHOFER SOCIETY for the Advancement of Applied Research eV P148409PC00.

[0113] The delay unit 20 can be connected or connectable to the device 3 shown in Figures 1a and 1b for detecting the relative motion between the image sensor 2 and the reference system 4. In Figure 2a, this is indicated by a dashed line 26 between the delay unit 20 and the device 3. For example, the delay unit 20 of the image sensor 2a, as shown in Figure 2a, can be configured to change and / or adjust the time delay At, with which it transmits the compensation signal generated by the first electrical circuit 100 to the second electrical circuit 200, in particular to the inputs 262 and 263 of the comparator stage 260, depending on the relative motion or relative velocity v between the image sensor 2 and the reference system 4 detected by the device 3.

[0114] For example, the delay unit 20 can be configured to set the time delay At such that it corresponds to a time difference between the times t2 and ti shown in Figures 1a and 1lb, such that: At = d / v = t2-ti. Here, ti is the first time at which the imaging optics 7 images the first object 10, which is at rest relative to the reference system 4, onto the first pixel 8b of the image sensor chip 6 of the image sensor 2a; t2 is the second time at which the imaging optics 7 images the same object 10 onto the second pixel 8c of the image sensor chip 6 of the image sensor 2a; v is the relative velocity between the image sensor 2a and the reference system 4; and d is the spatial distance between the pixels 8b and 8c of the image sensor chip 6 along the direction of the relative motion between the image sensor 2a and the reference system 4, see Figures 1a and 1lb.

[0115] In the situation shown in Figures 1a and 1b, the light intensity or amount detected by the photosensor 221, which is located within the second pixel 8c of the image sensor chip 6, at the second time t2 is thus equal to the light intensity or amount detected previously by the photosensor 121, which is located within the first pixel 8b of the image sensor chip 6, at the first time t1. Consequently, in the situation shown in Figures 1a and 1b, the electrical voltage Voiff,2(t2) (see Fig. 2c), which is based on the light intensity or amount detected by the photosensor 221 of the second electrical circuit 200 at the second time t2 and which is applied or output at the output 242 of the differentiator stage 240 of the second electrical circuit 200 at the second time t2, is equal to the electrical voltage Voiff,i(t1) (see Fig. 2c).2b), which is based on the light intensity or amount of light previously detected at the first time ti by the photosensor 121 of the first electrical circuit 100 and which was present or output at the output 142 of the differentiator stage 140 of the first electrical circuit 100 at the first time ti, i.e. VDiff,2(t2) = VDiff.l(tl).

[0116] Is the image sensor 2 in Figures 1a, 1b now designed according to the image sensor 2a shown in Fig. 2a and does the delay unit 20 cause a temporal FRAUNHOFER SOCIETY for the Promotion of Applied Research eV P148409PC00

[0117] Given the delay At=t2-ti=d / v, see above, the delay unit 20 transmits the electrical voltage VDiff,i(t2-At)=VDiff,i(ti) = Voiff,2(t2) as a compensation signal to the second electrical circuit 200 at the second time t2, specifically as a switching threshold doN to the second input 262 of the comparator stage 260 of the second electrical circuit 200 and as a switching threshold dorr to the third input 263 of the comparator stage 260 of the second electrical circuit 200. Thus, at time t2, there is a difference between the voltage Voiff,2(t2) at the first input 261 of the comparator stage 260 and the voltage VDiff,i(t2-At)=VDiff,i(ti) transmitted by the delay unit 20 to the second input 262 and the third input 263 of the comparator stage 260. Voiff,2(t2) is equal to zero in each case. Therefore, at time t2, no event signal is output at outputs 264, 265 of comparator stage 260 of the second electrical circuit 200 assigned to the second pixel 8c.

[0118] In other words, the delay unit 20 of the image sensor 2a according to Fig. 2a is configured to adjust the time delay At with which it transmits the compensation signal generated by the first electrical circuit 100 to the second electrical circuit 200 such that the compensation signal suppresses the output of an event signal by the second electrical circuit 200 at time t2, when the imaging optics 7 images the first object 10, which is at rest relative to the reference system 4, onto the second pixel 8c.

[0119] Each of the multiple pixels of the image sensor chip 6 of the image sensor 2a can be assigned one or exactly one electrical circuit corresponding to the first electrical circuit 100 shown in Fig. 2a or to the second electrical circuit 200 shown in Fig. 2a. Furthermore, these different electrical circuits assigned to the various pixels of the image sensor chip 6 can be electrically connected to each other in pairs, as shown in Fig. 2a, via a delay unit of the type of delay unit 20.

[0120] From the preceding explanations, it follows that in the situation shown in Figures 1a and 1b, objects such as the first object 10, which are at rest relative to the reference system 4 and are imaged onto the image sensor chip 6 of the image sensor 2a via the imaging optics 7, do not trigger any event signals in the image sensor 2a, which is moving relative to the reference system 4, or in the electrical circuits that are each assigned to the pixels of the image sensor chip 6 of the image sensor 2a, since the generation of these event signals is suppressed by the time-delayed compensation signals transmitted between the pixels (or between the electrical circuits assigned to the pixels) by the delay units. Fraunhofer Society for the Advancement of Applied Research eV P148409PC00

[0121] It also follows from the preceding explanations that in the situation shown in Figures 1a and 1b, such objects, which, for example, are moved relative to the reference system 4 like the second object 11 and are imaged onto the image sensor chip 6 of the image sensor 2a via the imaging optics 7, can trigger event signals in the image sensor 2a moving relative to the reference system 4 or in the electrical circuits that are each assigned to the pixels of the image sensor chip 6 of the image sensor 2a, since the generation of these event signals is not suppressed as in the case of the first object 10, which is at rest relative to the reference system 4.

[0122] Exemplary implementations of circuit architectures of the delay unit 20 are shown schematically in Figures 3a-d.

[0123] In the embodiment of the delay unit 20, here designated 20a, shown in Fig. 3a, the delay unit includes a bucket-brigade accumulator 30. The bucket-brigade accumulator 30 contains a plurality of capacitors 31, each having a first electrode and a second electrode. Fig. 3a shows an example of three capacitors 30. However, it is understood that the bucket-brigade accumulator 30 can contain any number of capacitors 31. The first electrodes of the capacitors 31 are connected or can be connected in series between the input 22 and the output 24 of the delay unit 20a. The second electrodes of the capacitors 31 can each be connected or can be connected to ground, e.g., to ground 82 as shown in Fig. 2a. The bucket-brigade accumulator 30 can also contain an amplifier, which can, for example, be connected upstream of the output 24. The bucket-brigade accumulator 30 can also contain electrical switches. In Fig.Figure 3 shows exemplary electrical switches SI, S2, and S3. Each of the electrical switches SI, S2, and S3 can, for example, selectively establish or break an electrical connection between two of the first electrodes of the capacitors 31. In addition to or as an alternative to the switches SI, S2, and S3, digital buffers can also be connected between adjacent first electrodes of the capacitors 31. If a compensation signal is applied or fed into the input 22 of the delay unit 20a, the compensation signal passes through the bucket-brigade buffer 30 and is output with a time delay at the output 24 of the delay unit 20a.

[0124] In the embodiment of the delay unit 20 shown in Fig. 3b, here designated 20b, the delay unit includes at least one low-pass filter 40. The low-pass filter 40 typically includes a resistor 41 and a capacitor 42 with a first electrode and a second electrode. The input 22 of the delay unit 20b is usually electrically connected to the output 24 of the delay unit via the resistor 41 and the first electrode of the capacitor. FRAUNHOFER SOCIETY for the Advancement of Applied Research e.V. P148409PC00

[0125] 20b is connected, and the second electrode of the capacitor is electrically connected to ground, e.g. to ground 82 according to Fig. 2a. If a compensation signal is applied or fed into the input 22 of the delay unit 20b, the compensation signal passes through the low-pass filter 40 and is output with a time delay at the output 24 of the delay unit 20b.

[0126] In the embodiment of the delay unit 20 shown in Fig. 3c, here designated 20c, the delay unit contains one or more inverters 50 connected in series, which are also referred to as logic NOT gates. Here, the inverters 50 are implemented as CMOS NOT gates. Alternatively, the inverters 50 can also be implemented, for example, as NMOS NOT gates, as PMOS NOT gates, by an NPN resistor-transistor logic circuit, or by an NPN transistor-transistor logic circuit. Each of the inverters 50 has an input and an output, wherein the input is configured to receive the content of a logic bit (e.g., +5 V or 0 V), and wherein the output is configured to output the logical negation of the content of the input bit.For processing analog compensation signals, the delay unit 20c can optionally include an analog-to-digital converter (ADC) connected between input 22 of the delay unit 20c and the input of the first inverter 50 of the inverter chain, and a digital-to-analog converter (DAC) connected between the output of the last inverter of the inverter chain and output 24 of the delay unit 20c. If a compensation signal is applied or fed into input 22 of the delay unit 20c, the compensation signal passes through the chain of inverters 50 and is output at output 24 of the delay unit 20c with a time delay.

[0127] In the embodiment of the delay unit 20 shown in Fig. 3d, here designated 20d, the delay unit contains one or more digital buffers 60 connected in series. For the sake of simplicity, only a single digital buffer 60 is shown in Fig. 3d. However, it is understood that the delay unit 20d can also contain any number of digital buffers of the type 60 connected in series. The digital buffer or buffers 60 of the delay unit 20d can each contain, for example, an inverting buffer or a non-inverting buffer.For processing analog compensation signals, the delay unit 20d can optionally also include an analog-to-digital converter (ADC) connected between the input 22 of the delay unit 20d and the first digital buffer 60 of the buffer chain, and a digital-to-analog converter (DAC) connected between the last digital buffer 60 of the buffer chain and the output 24 of the delay unit 20d. If a compensation signal is applied or fed into the input 22 of the delay unit 20d, the compensation signal passes through the...

[0128] TIFRAUNHOFER SOCIETY for the Promotion of Applied Research eV P148409PC00

[0129] or the digital buffer 60 and is output with a time delay at output 24 of the delay unit 20d.

[0130] As previously indicated, the delay units 20a-d can each be configured such that the time delay with which each of the delay units 20a-d transmits or can transmit the compensation signal from the first electrical circuit 100 to the second electrical circuit 200 is variable and / or adjustable. For example, each of the delay units 20a-d can contain one or more electrical switches with which one or more delaying elements of the delay unit, e.g., individual capacitors 31 of the bucket-brigade storage 30, individual of the series-connected low-pass filters 40, individual of the series-connected inverters 50, and / or individual of the series-connected digital buffers 60, can be selectively electrically bypassed by opening one or more of these electrical switches.In this way, a number of those delaying components of the delay units 20a-d that contribute to the delay of the transmission of the compensation signal, and thus the time delay itself, can be changed.

[0131] Fig. 4 schematically shows details of the image sensor 2 from Figures 1a and 1b according to a second embodiment, here designated 2b. As before, features recurring in different figures are designated with the same reference numerals. Unless otherwise stated below, the image sensor 2b according to Fig. 4 may contain the same features as the image sensor 2a according to Figures 2a-c. For the sake of simplicity, only the differences between the image sensor 2b according to Fig. 4 and the image sensor 2a according to Figures 2a-c will therefore be described in more detail below.

[0132] Figure 4 schematically shows a circuit architecture of the first electrical circuit 100, which includes the first photosensor stage 120 with the first photosensor 121, located in an area of ​​the image sensor chip 6 defined by the first pixel 8b, and a circuit architecture of the second electrical circuit 200, which includes the second photosensor stage 220 with the second photosensor 221, located in an area of ​​the image sensor chip 6 defined by the second pixel 8c. Figure 4 also shows the delay unit 20, which electrically connects the first electrical circuit 100 to the second electrical circuit 200 and is configured to transmit a compensation signal, which can be generated or is generated by the first electrical circuit 100, to the second electrical circuit 200 with a time delay.

[0133] The electrical circuits 100, 200 of the image sensor 2b according to Fig. 4 contain the same components and have the same functionality as the electrical FRAUNHOFER-GESELLSCHAFT zur Förderung der angewandten Forschung eV P148409PC00

[0134] Circuits 100, 200 of the image sensor 2a according to figures 2a-c. The circuit architecture of the image sensor 2b according to Fig. 4 differs from the circuit architecture of the image sensor 2a according to figures 2a-c only in the way the electrical circuits 100, 200 are connected via the delay unit 20.

[0135] The image sensor 2b according to Fig. 4 differs from the image sensor 2a according to Figures 2a-c in that, in the image sensor 2b according to Fig. 4, the first photosensor stage 120 is electrically connected to the delay unit 20 via the differentiator stage 140 and the comparator stage 160 of the first electrical circuit 100. In the image sensor 2b according to Fig.

[0136] 4 connects the delay unit 20 the comparator stage 160 of the first electrical circuit 100 with the comparator stage 260 of the second electrical circuit 200.

[0137] More precisely, in the image sensor 2b according to Fig. 4, the input 22 of the delay unit 20 is electrically connected to an output of the comparator stage 160 of the first electrical circuit 100, here to the first output 164 of the comparator stage 160, and the output 24 of the delay unit 20 is electrically connected to at least one input of the comparator stage 260 of the second electrical circuit 200, here to the second input 262 and to the third input 263 of the comparator stage 260. In the image sensor 2b according to Fig. 4, the compensation signal generated by the first electrical circuit 100, which is transmitted to the second electrical circuit 200 with a time delay via the delay unit 20, is thus given by an event signal 166 output at the first output 164 of the comparator stage 160 of the first electrical circuit 100.

[0138] Similar to image sensor 2a according to Figures 2a-c, in image sensor 2b according to Figure 4, the compensation signal transmitted with a time delay by the delay unit 20 serves to modify the switching thresholds at inputs 262, 263 of comparator stage 260 of the second electrical circuit 200, which influence the generation of event signals at outputs 264, 265 of comparator stage 260. In image sensor 2b according to Figure 4, the comparator stage 160 of the first electrical circuit 100 can, for example, be configured such that the amplitude of the event signal output at the first output 164 of comparator stage 160 is equal to the amplitude of the voltage signal Voiff,i applied to the first input 161 of comparator stage 160.

[0139] Thus, in the situation shown in Figures 1a, 1b, the output of event signals at the outputs 264, 265 of the comparator stage 260 of the second electrical circuit 200 can be suppressed if the time delay At of the compensation signal transmitted by the delay unit 20 to the inputs 262, 263 is set such that At = d / v, so that at time t2 at the inputs 261, 262, 263 of the FRAUNHOFER SOCIETY for the Advancement of Applied Research eV P148409PC00

[0140] The same electrical voltages are applied to comparator stage 260 of the second electrical circuit 200.

[0141] Fig. 5 schematically shows details of the image sensor 2 from Figures 1a and 1b according to a third embodiment, here designated 2c. As before, features recurring in different figures are designated with the same reference numerals. Unless otherwise stated below, the image sensor 2c according to Fig. 5 may contain the same features as the image sensor 2a according to Figures 2a-c. For the sake of simplicity, only the differences between the image sensor 2c according to Fig. 5 and the image sensor 2a according to Figures 2a-c will therefore be described in more detail below.

[0142] Figure 5 schematically shows a circuit architecture of the first electrical circuit 100, which includes the first photosensor stage 120 with the first photosensor 121, located in an area of ​​the image sensor chip 6 defined by the first pixel 8b, and a circuit architecture of the second electrical circuit 200, which includes the second photosensor stage 220 with the second photosensor 221, located in an area of ​​the image sensor chip 6 defined by the second pixel 8c. Figure 5 also shows the delay unit 20, which electrically connects the first electrical circuit 100 to the second electrical circuit 200 and is configured to transmit a compensation signal, which can be generated or is generated by the first electrical circuit 100, to the second electrical circuit 200 with a time delay.

[0143] The electrical circuits 100, 200 of the image sensor 2c according to Fig. 5 contain the same components and have the same functionality as the electrical circuits 100, 200 of the image sensor 2a according to Figures 2a-c. The circuit architecture of the image sensor 2c according to Fig. 5 differs from the circuit architecture of the image sensor 2a according to Figures 2a-c only in the way the electrical circuits 100, 200 are connected via the delay unit 20.

[0144] The image sensor 2c according to Fig. 5 differs from the image sensor 2a according to Figures 2a-c in that, in image sensor 2c according to Fig. 5, the first photosensor stage 120 is electrically connected via the delay unit 20 to the input 241 of the differentiator stage 240 of the second electrical circuit 200. In image sensor 2c according to Fig. 5, the input 22 of the delay unit 20 is electrically connected to the output 125 of the first photosensor stage 120 of the first electrical circuit 100, and the output 24 of the delay unit 20 is connected to the input 241 of the differentiator stage 240 of the second electrical circuit 200. In the image sensor 2c according to Fig. 5, the compensation signal generated by the first electrical circuit 100, which is transmitted to the second electrical circuit 200 with a time delay via the delay unit 20, is thus by a FRAUNHOFER SOCIETY for the Promotion of Applied Research eV P148409PC00

[0145] The photosensor signal generated by the first photosensor stage 120 is given. More precisely, the output 24 of the delay unit 20 is connected via a voltage inverter to the input 241 of the differentiator stage 240 of the second electrical circuit 200. In this way, the time-delayed compensation signal at the input 241 of the differentiator stage 240 of the second electrical circuit 200 is added with a negative sign to a photosensor signal generated by the second photosensor stage 220 of the second electrical circuit 200.

[0146] In the situation shown in figures a1a, b1b, the output of event signals at the outputs 264, 265 of the comparator stage 260 of the second electrical circuit 200 can be suppressed if the time delay At of the compensation signal transmitted from the delay unit 20 to the input 241 is set such that At=d / v, that at time t2 at the input 241 of the differentiator stage 240 of the second electrical circuit 200 the voltage signals generated by the photosensor stages 120, 220 exactly cancel each other out.

[0147] Fig. 6 schematically shows details of the image sensor 2 from Figures 1a and 1b according to a fourth embodiment, here designated 2d. As before, features recurring in different figures are designated with the same reference numerals. Unless otherwise stated below, the image sensor 2d according to Fig. 6 may contain the same features as the image sensor 2a according to Figures 2a-c. For the sake of simplicity, only the differences between the image sensor 2d according to Fig. 6 and the image sensor 2a according to Figures 2a-c will therefore be described in more detail below.

[0148] Figure 6 schematically shows a circuit architecture of the first electrical circuit 100, which includes the first photosensor stage 120 with the first photosensor 121, located in an area of ​​the image sensor chip 6 defined by the first pixel 8b, and a circuit architecture of the second electrical circuit 200, which includes the second photosensor stage 220 with the second photosensor 221, located in an area of ​​the image sensor chip 6 defined by the second pixel 8c. Figure 6 also shows the delay unit 20, which electrically connects the first electrical circuit 100 to the second electrical circuit 200 and is configured to transmit a compensation signal, which can be generated or is generated by the first electrical circuit 100, to the second electrical circuit 200 with a time delay.

[0149] The electrical circuits 100, 200 of the image sensor 2d according to Fig. 6 contain the same components and have the same functionality as the electrical circuits 100, 200 of the image sensor 2a according to Figures 2a-c. The circuit architecture of the image sensor 2d according to Fig. 6 differs from the circuit architecture of the FRAUNHOFER-GESELLSCHAFT zur Förderung der angewandten Forschung eV P148409PC00

[0150] Image sensor 2a according to figures 2a-c only in the way of connecting the electrical circuits 100, 200 via the delay unit 20.

[0151] The image sensor 2d according to Fig. 6 differs from the image sensor 2a according to Figures 2a-c in that, in the image sensor 2d according to Fig. 6, the delay unit 20 connects the output 142 of the differentiator stage 140 of the first electrical circuit 100 with the first input 261 of the comparator stage 260 of the second electrical circuit 200. Thus, in the image sensor 2d according to Fig. 6, the input 22 of the delay unit 20 is electrically connected to the output 142 of the differentiator stage 140 of the first electrical circuit 100, and the output 24 of the delay unit 20 is connected to the first input 261 of the comparator stage 260 of the second electrical circuit 200.6 is the compensation signal generated by the first electrical circuit 100, which is transmitted to the second electrical circuit 200 with a time delay via the delay unit 20, and is thus given by the electrical voltage Voiff,i output at the output 142 of the differentiator stage 140 of the first electrical circuit 100. More precisely, the output 24 of the delay unit 20 is connected via a voltage inverter to the first input 261 of the comparator stage 260 of the second electrical circuit 200. In this way, the time-delayed compensation signal at the first input 261 of the comparator stage 260 of the second electrical circuit 200 is added with a negative sign to the voltage Voiff,2 output at the output 242 of the differentiator stage 240 of the second electrical circuit 200.

[0152] In the situation shown in figures a1a, b1b, the output of event signals at the outputs 264, 265 of the comparator stage 260 of the second electrical circuit 200 can be suppressed if the time delay At of the compensation signal transmitted from the delay unit 20 to the input 241 is set such that At=d / v, that at time t2 at the input 261 of the comparator stage 260 of the second electrical circuit 200 the voltage signals generated by the differentiator stages 140, 240 exactly cancel each other out.

[0153] Fig. 7 schematically shows details of the image sensor 2 from Figures 1a and 1b according to a fifth embodiment, here designated 2e. As before, features recurring in different figures are designated with the same reference numerals. Unless otherwise stated below, the image sensor 2e according to Fig. 7 may contain the same features as the image sensor 2a according to Figures 2a-c. For the sake of simplicity, only the differences between the image sensor 2e according to Fig. 7 and the image sensor 2a according to Figures 2a-c are described in more detail below. FRAUNHOFER SOCIETY for the Advancement of Applied Research eV P148409PC00

[0154] Figure 7 schematically shows a circuit architecture of the first electrical circuit 100, which includes the first photosensor stage 120 with the first photosensor 121, located in an area of ​​the image sensor chip 6 defined by the first pixel 8b, and a circuit architecture of the second electrical circuit 200, which includes the second photosensor stage 220 with the second photosensor 221, located in an area of ​​the image sensor chip 6 defined by the second pixel 8c. Figure 7 also shows the delay unit 20, which electrically connects the first electrical circuit 100 to the second electrical circuit 200 and is configured to transmit a compensation signal, which can be generated or is generated by the first electrical circuit 100, to the second electrical circuit 200 with a time delay.

[0155] The electrical circuits 100, 200 of the image sensor 2e according to Fig. 7 contain the same components and have the same functionality as the electrical circuits 100, 200 of the image sensor 2a according to Figures 2a-c. The circuit architecture of the image sensor 2e according to Fig. 7 differs from the circuit architecture of the image sensor 2a according to Figures 2a-c only in the way the electrical circuits 100, 200 are connected via the delay unit 20.

[0156] The image sensor 2e according to Fig. 7 differs from the image sensor 2a according to Figures 2a-c by an additional transistor switch 248, here e.g. in the form of an npn bipolar transistor, and an additional capacitor 250. A first electrode 251 of the capacitor 250 is electrically connected to the electrically interconnected electrodes of the capacitors 243 and 244 of the differentiator stage 240 of the second electrical circuit 200, and a second electrode 252 of the capacitor 250 can be selectively connected electrically to a power supply via the transistor switch 248, e.g. to the power supply 81. Here, the second electrode 252 of the capacitor 250 is electrically connected to the emitter E of the transistor switch 248. The collector C of the transistor switch 248 is electrically connected to the power supply 81.And the delay unit 20 connects the comparator stage 160 of the first electrical circuit 100, in particular the first output 164 of the comparator stage 160, with the base B of the transistor switch 248.

[0157] Thus, in the situation shown in Figures 1a and 1b, the output of event signals at the outputs 264 and 265 of the comparator stage 260 of the second electrical circuit 200 can be suppressed if the time delay At of the compensation signal transmitted from the delay unit 20 to the transistor switch 248 is set such that At = d / v, so that at time t2 charges flow from the capacitors 243 and 244 of the differentiator stage 240 of the second electrical circuit 200 and the voltage Vüiff,2FRAUNHOFER-GESELLSCHAFT zur Förderung der angewandten Forschung eV P148409PC00

[0158] so that it remains below the threshold for generating an event signal at one of the outputs of the comparator stage 260 of the second electrical circuit 200.

[0159] Fig. 8 schematically shows details of the image sensor 2 from Figures 1a and 1b according to a sixth embodiment, here designated 2f. As before, features recurring in different figures are designated with the same reference numerals. Unless otherwise stated below, the image sensor 2f according to Fig. 8 may contain the same features as the image sensor 2a according to Figures 2a-c. For the sake of simplicity, only the differences between the image sensor 2f according to Fig. 8 and the image sensor 2a according to Figures 2a-c will therefore be described in more detail below.

[0160] Figure 8 schematically shows a circuit architecture of the first electrical circuit 100, which includes the first photosensor stage 120 with the first photosensor 121, located in an area of ​​the image sensor chip 6 defined by the first pixel 8b, and a circuit architecture of the second electrical circuit 200, which includes the second photosensor stage 220 with the second photosensor 221, located in an area of ​​the image sensor chip 6 defined by the second pixel 8c. Figure 8 also shows the delay unit 20, which electrically connects the first electrical circuit 100 to the second electrical circuit 200 and is configured to transmit a compensation signal, which can be generated or is generated by the first electrical circuit 100, to the second electrical circuit 200 with a time delay.

[0161] The electrical circuits 100, 200 of the image sensor 2f according to Fig. 8 contain the same components and have the same functionality as the electrical circuits 100, 200 of the image sensor 2a according to Figures 2a-c. The circuit architecture of the image sensor 2f according to Fig. 8 differs from the circuit architecture of the image sensor 2a according to Figures 2a-c only in the way the electrical circuits 100, 200 are connected via the delay unit 20.

[0162] The image sensor 2f according to Fig. 8 differs from the image sensor 2a according to Figures 2a-c in that the image sensor 2f according to Fig. 8 has an additional logic AND gate 280. An output, in particular the first output 164 of the comparator stage 160 of the first electrical circuit 100, is electrically connected via the delay unit 20 and a digital negation 284 to a first input 281 of the logic AND gate 280. And an output, in particular the first output 264, of the comparator stage 260 of the second electrical circuit 200 is electrically connected to a second input 282 of the logic AND gate 280. In the image sensor 2f according to Fig. 8, the compensation signal generated by the first electrical circuit 100, which is delayed via the delay unit 20 to the second electrical circuit 200, is FRAUNHOFER SOCIETY for the Promotion of Applied Research eV P148409PC00

[0163] The transmission is thus given by an event signal 166 output at the first output 164 of the comparator stage 160 of the first electrical circuit 100. At the output 283 of the logic AND gate 280, an event signal of the second electrical circuit 200 is therefore always or only when an event signal 266 is generated or output at the first output 264 of the comparator stage 260 of the second electrical circuit 200 and when, at the same time, no event signal is received at the digital negation 284 preceding the first input 281 of the logic AND gate 280. The first electrical circuit 100 and the delay unit 20 are thus configured to suppress the output of an event signal at the output 283 of the logic AND gate 280 by means of an event signal 166 generated or output at the first output 164 of the comparator stage 160 of the first electrical circuit 100 with a time delay.To mute the output 283 of the logic AND gate 280 with a time delay.

[0164] In the situation shown in figures aa, bb, an event signal 266 generated or output at the first output 264 of the comparator stage 260 of the second electrical circuit 200 can be suppressed by the logic AND gate 280 if the time delay At of the compensation signal transmitted by the delay unit 20 via the digital negation 284 to the first input 281 of the logic AND gate 280 is set such that At=d / v, so that the output 283 of the logic AND gate 280 is muted at time t2 via the delay unit 20.

[0165] Fig. 9 schematically shows the steps of a method 300 for processing photosensor signals from the image sensor 2 shown in Figures 1a and 1b. A first method step 301 involves detecting a relative motion between the image sensor 2 and the reference system 4. Detecting the relative motion includes, for example, detecting a relative velocity between the image sensor 2 and the reference system 4, including the direction of the relative motion and the absolute value of the relative velocity. A second method step 302 involves setting the time delay effected by the delay unit 20. And a third method step 303 involves transmitting a compensation signal generated by the first electrical circuit 100 to the second electrical circuit 200 with the previously set time delay. Fraunhofer Society for the Advancement of Applied Research e.V.

[0166] P148409PC00

[0167] List of reference symbols:

[0168] 1 sensor system

[0169] 2, 2a-f image sensor

[0170] 3 Device for detecting relative motion 4 Reference system

[0171] 5 cases

[0172] 6 image sensor chip

[0173] 7 Imaging Optics

[0174] 8a-h pixels of 6

[0175] 9 Calculation unit

[0176] 10 first object

[0177] 11 second object

[0178] 12 first direction

[0179] 13 second direction

[0180] 20, 20a-d delay unit

[0181] 22 Entrance of 20, 20a-d

[0182] 24 Output of 20, 20a-d

[0183] 30 bucket chain storage

[0184] 31 Capacitor

[0185] 40 low-pass filters

[0186] 41 ohmic resistance

[0187] 42 Capacitor

[0188] 50 Inverter

[0189] 60 digital buffer

[0190] 81 Power supply

[0191] 82 Ground / Zero Potential

[0192] 100 first electrical circuit

[0193] 120 photosensor levels

[0194] 121 Photosensor

[0195] 122 Amplifier stage

[0196] 123 amplifiers

[0197] 124 Field-effect transistor

[0198] 125 Output from 120

[0199] 140 Differentiator level

[0200] 141 entrance out of 140

[0201] 142 Exit from 140

[0202] 143 Capacitor

[0203] 144 Capacitor FRAUNHOFER SOCIETY for the Promotion of Applied Research eV

[0204] P148409PC00

[0205] 145 Differentiating amplifier 146 Switching device

[0206] 160 comparator stage

[0207] 161, 162, 163 entries out of 160

[0208] 164, 165 Exits of 160

[0209] 166, 167 Event signals

[0210] 200 second electrical circuit 220 photosensor stage

[0211] 221 Photosensor

[0212] 222 Amplifier stage

[0213] 223 amplifiers

[0214] 224 Output from 220

[0215] 240 Differentiator level

[0216] 241 entrance out of 240

[0217] 242 Output from 240

[0218] 243 Capacitor

[0219] 244 Capacitor

[0220] 245 Differentiating amplifier 246 Switching device

[0221] 248 transistor switches

[0222] 250 Capacitor

[0223] 251, 251 electrodes out of 250

[0224] 260 comparator stage

[0225] 261, 262, 263 Inputs out of 260

[0226] 264, 265 outputs of 260

[0227] 266, 267 Event signals

[0228] 280 logic AND gate 281, 282 inputs of 280

[0229] 283 Output from 280

Claims

Fraunhofer Society for the Advancement of Applied Research eV P148409PC00 Patent claims 1. Image sensor (2), comprising: a first electrical circuit (100) comprising a first photosensor stage (120) with a first photosensor (121) arranged within a first pixel (8b) of the image sensor (2), wherein the first electrical circuit (100) is set up to generate a compensation signal, and a second electrical circuit (200) comprising a second photosensor stage (220) with a second photosensor (221) arranged within a second pixel (8c) of the image sensor (2), characterized by a delay unit (20; 20a; 20b; 20c; 20d) which is configured to transmit the compensation signal to the second electrical circuit (200) with a time delay.

2. Image sensor (2) according to claim 1, characterized in that the first electrical circuit (100) is configured to generate the compensation signal based on and / or depending on a photosensor signal generated by the first photosensor stage (120).

3. Image sensor (2) according to one of the preceding claims, characterized in that the second electrical circuit (200) is configured to output an event signal (266, 267) or to output only when an absolute value of a change in a light intensity detected by the second photosensor stage (220) and / or when an absolute value of a change in a voltage signal generated by the second photosensor stage (220) exceeds a threshold value.

4. Image sensor (2) according to claim 3, characterized by an image sensor chip (6) containing the first pixel (8b) and the second pixel (8c) and by An imaging optic (7) for imaging objects onto the image sensor chip (6), wherein the delay unit (20) is configured to transmit the compensation signal to the second electrical circuit (200) with a time delay such that objects imaged onto the image sensor chip (6) via the imaging optic (7) and which are at rest relative to a reference system (4) that is moving relative to the image sensor (2) do not trigger any event signals (266, 267) in the second electrical circuit (200), since the generation of these event signals (266, 267) is suppressed by means of the time-delayed compensation signal transmitted from the delay unit (20) to the second electrical circuit (200). Fraunhofer Society for the Advancement of Applied Research e.V. P148409PC00 5. Image sensor (2) according to one of the preceding claims, characterized in that the first electrical circuit (100) is configured to output an event signal (166, 167) or to output only when an absolute value of a change in a light intensity detected by the first photosensor stage (120) and / or when an absolute value of a change in a voltage signal generated by the first photosensor stage (120) exceeds a threshold value.

6. Image sensor (2) according to claim 4 or 5, characterized in that the second electrical circuit (200) is configured to generate the event signal (266, 267) based on an output voltage of the second photosensor stage (220) and based on the time-delayed compensation signal generated by the first electrical circuit (100).

7. Image sensor (2) according to one of the preceding claims, characterized in that the first pixel (8b) and the second pixel (8c) are arranged on the same image sensor chip (6).

8. Image sensor (2) according to one of the preceding claims, characterized in that the delay unit (20; 20a; 20b; 20c; 20d) comprises one of the following elements: (Al) a bucket chain storage (30), (A2) one or more low-pass filters (40) connected in series, (A3) one or more inverters (50) connected in series, (A4) an electrical line and a digital buffer (60).

9. Image sensor (2) according to one of the preceding claims, characterized in that the delay unit (20; 20a; 20b; 20c; 20d) is designed such that the time delay of the compensation signal is variable.

10. Image sensor (2) according to one of the preceding claims, characterized in that the second electrical circuit (200) comprises a comparator stage (260), wherein the second photosensor stage (220) is electrically connected to a first input (261) of the comparator stage (260) of the second electrical circuit (200) and the comparator stage (260) of the second electrical circuit (200) is configured to output an event signal (266, 267) or to output only when an absolute value of a difference between an electrical voltage at the first input (261) of the comparator stage (260) of the second electrical circuit (200), which is based on an output voltage of the second photosensor stage (220), and an electrical voltage at a second input (262) of the FRAUNHOFER-GESELLSCHAFT zur Förderung der angewandten Forschung eV P148409PC00 The comparator stage (260) of the second electrical circuit (200) is larger than a threshold value.

11. Image sensor (2) according to claim 10, characterized in that the second electrical circuit (200) comprises a differentiator stage (240) and the second photosensor stage (220) is electrically connected via the differentiator stage (240) of the second electrical circuit (200) to the first input (261) of the comparator stage (260) of the second electrical circuit (200), wherein the differentiator stage (240) of the second electrical circuit (200) is configured to output an electrical voltage to the first input (261) of the comparator stage (260) of the second electrical circuit (200), which is based on a difference between a current output voltage of the second photosensor stage (220) and a last previous output voltage of the second photosensor stage (220) that caused the comparator stage (260) of the second electrical circuit (200) to output an event signal (266, 267).

12. Image sensor (2) according to claim 11, characterized in that the first photosensor stage (120) is electrically connected via the delay unit (20; 20a; 20b; 20c; 20d) to an input (241) of the differentiator stage (240) of the second electrical circuit (200).

13. Image sensor (2) according to one of claims 10 or 11, characterized in that the delay unit (20; 20a; 20b; 20c; 20d) is electrically connected to the second input (262) of the comparator stage (260) of the second electrical circuit (200).

14. Image sensor (2) according to one of the preceding claims, characterized in that the first electrical circuit (100) comprises a comparator stage (160), wherein the first photosensor stage (120) is electrically connected to a first input (161) of the comparator stage (160) of the first electrical circuit (100) and wherein the comparator stage (160) of the first electrical circuit (100) is configured to output an event signal (166, 167) or to output only when an absolute value of a difference between an electrical voltage at the first input (161) of the comparator stage (160) of the first electrical circuit (100) and an electrical voltage at a second input (162) of the comparator stage (160) of the first electrical circuit (100) is greater than a threshold value.

15. Image sensor (2) according to claim 14, wherein the first photosensor stage (120) is electrically connected to the delay unit (20; 20a; 20b; 20c; 20d) via the comparator stage (160) of the first electrical circuit (100). FRAUNHOFER SOCIETY for the Advancement of Applied Research eV P148409PC00 16. Image sensor (2) according to claims 10 and 13, characterized by a logic AND gate (280), wherein an output (164) of the comparator stage (160) of the first electrical circuit (100) is electrically connected to a first input (281) of the AND gate (280) via the delay unit (20; 20a; 20b; 20c; 20d) and via a digital negation, and wherein an output (264) of the comparator stage (260) of the second electrical circuit (200) is electrically connected to a second input (282) of the logic AND gate (280). 17.Image sensor (2) according to one of claims 13 or 14, characterized in that the first electrical circuit (100) comprises a differentiator stage (140), wherein the first photosensor stage (120) of the first electrical circuit (100) is electrically connected to the delay unit (20; 20a; 20b; 20c; 20d) via the differentiator stage (140) of the first electrical circuit (100), and wherein the differentiator stage (140) of the first electrical circuit (100) is configured to output an electrical voltage via the delay unit (20; 20a; 20b; 20c; 20d) to the second input (262) of the comparator stage (260) of the second electrical circuit (200), which is based on a difference between a current output voltage of the first photosensor stage (120) and a last previous output voltage of the first photosensor stage (120), which the comparator stage (160) of the first is based on the electrical circuit (100) that causes an event signal (166, 167) to be output.

18. Image sensor (2) according to one of the preceding claims, characterized by a third electrical circuit comprising a third photosensor stage with a third photosensor arranged within a third pixel of the image sensor (2), and by a further delay unit (20; 20a; 20b; 20c; 20d) configured to transmit the compensation signal of the first electrical circuit (100) to the third electrical circuit with a time delay.

19. Sensor system (1), comprising: an image sensor (2) according to one of the preceding claims and a device (3) for detecting a relative movement between the image sensor (2) and a reference system (4), characterized by that the delay unit (20; 20a; 20b; 20c; 20d) of the image sensor (2) is set up to adjust the time delay depending on the detected relative motion.

20. Sensor system (1) according to claim 19, characterized in that the image sensor (2) includes an imaging optic (7) and the delay unit (20; 20a; 20b; 20c; 20d) is configured to adjust the time delay such that the time delay FRAUNHOFER SOCIETY for the Advancement of Applied Research eV P148409PC00 a time difference between a first point in time, in which the imaging optics (7) maps an object (10) that is at rest relative to the reference system (4) onto the first pixel (8b) of the image sensor (2), and a later second point in time, in which the imaging optics (7) maps the object (10) that is at rest relative to the reference system (4) onto the second pixel (8c) of the image sensor (2).

21. Sensor system (1) according to one of claims 19 or 20, characterized in that the device (3) for detecting the relative motion includes at least one of the following systems: a radar system, a lidar system, a transmitting and receiving unit of a satellite-based navigation system or an inertial measurement unit (IMU).

22. Method for processing photosensor signals of an image sensor (2) comprising a first electrical circuit (100) comprising a first photosensor stage (120) with a first photosensor (121) arranged within a first pixel (8b) of the image sensor (2), and comprising a second electrical circuit (200) comprising a second photosensor stage (220) with a second photosensor (221) arranged within a second pixel (8c) of the image sensor (2), wherein the method comprises at least the following steps: Transferring a compensation signal generated by the first electrical circuit (100) to the second electrical circuit (200) with a time delay.

23. The method of claim 22, further comprising: Detecting a relative movement between the image sensor (2) and a reference system (4) and adjusting the time delay depending on the detected relative movement.

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