Switching drivers

Abstract

This application relates to methods and apparatus for controlling a switching driver (100, 101b, 1100) to drive a load (101a, 101b) with a drive signal based on an input signal. A controller (105) is configured to control the switching driver to operate in at least a first mode of operation in which the first and second output nodes of the switching driver are selectively modulated between first and second switching voltages with respective controlled duty-cycles. The controller controls the duty-cycle so as to controllably vary a common-mode voltage applied to the output nodes in operation in the first mode. The controller comprises a first control loop for controlling the common-mode voltage and a second control loop for controlling a differential component of the drive signal.

Description

[0001] SWITCHING DRIVERS

[0002] The field of representative embodiments of this disclosure relates to methods, apparatus and / or implementations concerning or relating to switching drivers, such as class-D amplifiers or the like or switch drivers for motors etc.

[0003] Switching drivers, also called switched-mode drivers, are used in a variety of applications for driving load transducers. For instance, switching drivers, such as class-D amplifiers and the like, may be used in audio and related applications to drive output transducers such as speakers or similar (e.g. haptic output transducers), and can have advantages in terms of power efficiency compared to linear amplifiers. Switching drivers typically comprise an output stage for modulating at least one output node between defined switching voltages with a duty-cycle such that the average voltage, over the course of one or more switching cycles, has the desired level.

[0004] For audio applications, switching drivers such as class-D amplifiers may often be implemented to drive the load transducer in a bridge-tied-load (BTL) configuration, and thus the load may be connected between first and second output nodes, each of which is modulated between defined switching voltages to generate the desired differential driving voltage across the load (on average across the switching cycle).

[0005] In some examples, each of the first and second output nodes may be modulated between two defined switching voltages that do not substantially vary in use, e.g. between a high-side voltage VH and a low-side voltage VL defining an input voltage Vin = VH - VL. In this case, by appropriate control of the duty cycle of modulation on both sides of the load, a differential drive signal in the range of +Vin to -Vin may be developed across the load. In some applications, however, e.g. for relatively high-power applications, the magnitude of the input voltage Vin, i.e. the voltage difference between the high-side voltage and the low-side voltage, may need to be relatively high to be able to achieve the desired output range for the differential drive signal. Continually switching each output node between two switching voltages with a relatively large voltage difference between them can lead to issues with EMI (electromagnetic interference) and also power losses.In at least some applications, in particular for relatively high-power applications and / or in audio applications where there may be a relatively long output path between the output stage and the load, such as automotive or home theatre applications, there may be an output filter for filtering applying filtering to the output of the amplifier so as to provide the drive signal for the load. Such an output filter may typically be implemented by an inductance-capacitance (LC) filter, with a series inductance in the output path and a shunt capacitance to a defined voltage, such as ground. Switching the output nodes between switching voltages with a relatively large voltage difference between them can lead to a relatively large ripple current in the inductor and inductor core losses may be significant.

[0006] To mitigate this problem, multi-level switching drivers have been proposed, in which the switching voltages used for modulating the output nodes may be dynamically varied in use based on the amplitude of differential output signal. For instance, as well the high-side and low-side voltages VH and VL there may be at least one intermediate voltage VM which is a voltage between the high-side voltage VH and the low-side voltage VL. For example, the high-side voltage VH could be a supply voltage VDD, the low-side voltage could be ground and the intermediate voltage VM could be between the high-side and low-side voltages, say VDD / 2 for example, although other values for the intermediate voltage could be used. In this case, when the required differential drive signal has a relatively high amplitude, e.g. with an amplitude from about VDD / 2 to VDD, the switching amplifier may modulate the output nodes between the high-side and low-side voltages, e.g. between VDD and ground. However, if the differential drive signal is in a low amplitude range, e.g. with an amplitude lower than VDD / 2, the relevant differential drive signal can be generated by modulating each of the output nodes between the intermediate voltage and the low-side voltage, i.e. between VDD / 2 and ground. This reduces the voltage difference of the modulation of the output nodes, with consequent advantages for EMI and power loss.

[0007] Similar issues can arise for switching drivers used for motor control. For a 3-phase motor, the switching driver would typically have three output nodes that are each modulated between the voltages VH and VL to generate the desired 3-phase driver signal. Again, however, using a multilevel converter that can modulate the output nodesto at least one intermediate voltage may offer advantages of power saving and reduced EMI.

[0008] Such a multi-level switching driver can thus be seen as operating in different modes, where the switching voltages used for modulating the output nodes are different in the different modes. Dynamically varying the mode of operation in use can provide benefits in reduced EMI and / or power consumption. However, in at least some applications, changing the mode of operation can lead to unwanted current / voltage transients and / or could result in artefacts in the output signal.

[0009] Embodiments of the present disclosure relate to methods and apparatus for multi-level switching drivers that at least mitigate at least some of above-mentioned issues.

[0010] According to an aspect of the disclosure there is provided a controller for controlling a switching driver to modulate voltages at at least first and second output nodes so as to drive a load connected to said at least first and second output nodes with a drive signal based on an input signal. The controller is configured to control the switching driver to operate in at least a first mode of operation in which the at least first and second output nodes of the switching amplifier are selectively modulated between first and second switching voltages with respective controlled duty-cycles. The controller is configured to control the duty-cycles so as to controllably vary a common-mode voltage applied to the at least first and second output nodes in operation in the first mode. The controller comprises a first control loop for controlling the common-mode voltage and a second control loop for controlling a differential component of the drive signal.

[0011] In some implementations, the second control loop may be implemented as a higher performance control loop than the first control loop. In some implementations, the second control loop may have at least one of: a higher signal-to-noise ratio; and a lower total harmonic distortion than the first control loop. In some implementations, the first control loop may be implemented as a lower power control loop than the second control loop.

[0012] In some implementations, the controller may comprise a converter for generating a common-mode signal and a differential signal component based on the input signal andan indication of a desired common-mode value, and outputting the common-mode signal to the second control loop and the differential signal component to the first control loop. The first control loop may comprise a first combiner for combining the differential signal component with a first feedback signal indicative of a differential output of the switching driver to generate a first combined signal and a first loop filter for filtering the first combined signal and the second control loop may comprise a second combiner for combining the common-mode signal with a feedback signal indicative of the commonmode output of the switching driver to generate a second combined signal and a second loop filter for filtering the first combined signal. The controller may be configured to add the first and second combined signals to generate a first drive signal component and for subtracting the first combined signal from the second combined signal to generate a second drive signal component and the controller may comprise first and second quantizers configured to receive the first and second drive signal components respectively to generate first and second switch PWM signals for controlling the dutycycles of the first and second output nodes respectively.

[0013] In some implementations, the controller may be configured to control the switching driver to also selective operate in at least a second mode of operation in which the at least first and second output nodes of the switching amplifier are selectively modulated between two switching voltages with a controlled duty-cycle, wherein at least of the switching voltages in the second mode is different to the first mode.

[0014] In some examples, the two switching voltages in the second mode may be the first switching voltage and a third switching voltage, which is an intermediate voltage with a voltage level between the first and second switching voltages. In some examples, in the second mode, at least one of the at least first and second output nodes may be modulated between the first and second voltages and at least another of the at least first and second output nodes is modulated between the second switching voltage and third switch voltage, wherein the third switch voltage is a voltage which is higher than the first and second voltages.

[0015] The controller may be configured to control the switching driver to selectively operate in the first mode or the second mode based on the amplitude of the input signal. The controller may be configured, prior to a change in mode from the first mode to the secondmode or following a change in mode from the second mode to the first mode, control the common-mode voltage applied to the first and second output nodes to ramp from a first value towards a second value or vice versa, wherein the first value is a value for the common-mode voltage applied to the first and second output nodes in steady-state operation in the first mode and the second value is a value for the common-mode voltage applied to the first and second output nodes in steady-state operation in the second mode.

[0016] In some implementations, the first and second control loops may each comprise a respective amplifier. The amplifiers for the first and second control loops may be arranged as part of a feedback system.

[0017] In some implementations, the switching driver may be a switching amplifier configured to modulate voltages at said first and second output nodes so as to generate said drive signal as a differential drive signal for driving said load connected between said first and second output nodes.

[0018] In some implementations, the switching driver may be a motor driver and the at least first and second output nodes may comprise first, second and third output nodes for outputting said drive signal as a three-phase motor drive signal. In this case, the input signal may comprise a voltage vector.

[0019] Aspects also relates to a switching driver circuit comprising the controller of any of the embodiments described herein and an output stage.

[0020] In a further aspect, there is provided a controller for controlling a switching driver to modulate voltages at at least first and second output nodes so as to drive a load connected to said at least first and second output nodes with a drive signal based on an input signal. The controller is configured to control the switching driver to selectively operate in at least a first mode or a second mode based on the input signal such that the switching amplifier can dynamically swap between the first and second modes. In each of the first and second modes, the at least first and second output nodes are modulated between switching voltages with a controlled duty-cycle and at least one of the switching voltages is different in the first and second modes. The controller is configured toselectively increase an output resistance of the switching amplifier during a damping period which, at least partly, follows a change in mode.

[0021] In a further aspect, there is provided a controller for controlling an output stage of switching driver to modulate voltages at first and second output nodes so as to drive a load connected between said first and second output nodes with a differential drive signal based on an input signal. The controller is configured to control the switching driver to selectively operate in at least a first mode or a second mode based on the input signal such that the switching amplifier can dynamically swap between the first and second modes. In the first mode, each of the first and second output nodes is modulated between first and second switching voltages with a controlled duty-cycle by controlling respective first and second switches and in the second mode, each the first and second output nodes is modulated between said first switching voltage and a third switching voltage with a controlled duty-cycle by controlling said first switch and a third switch respectively, where the third switch voltage is an intermediate voltage between the first and second switching voltages; wherein the second switch has a lower on-resistance that the third switch and wherein the first switch is operable in first and second on-states, where the first on-state has a lower on-resistance than the second on state. The controller is configured to operate the first switch in the first on-state during operation in the first mode and to operate the first switch in the second on-state in the second mode.

[0022] In a further aspect, there is provided a controller for controlling a switching driver to modulate voltages at at least first and second output nodes so as to drive a load connected to said first and second output nodes with a drive signal based on an input signal, wherein: the controller is configured to control the switching driver to selectively operate in at least a first mode or a second mode, wherein in each of the first and second modes, the at least first and second output nodes are modulated between switching voltages with a controlled duty-cycle and at least one of the switching voltages is different in the first and second modes; the controller is configured to control the mode based on the amplitude of the input signal such that the switching amplifier can dynamically change between the first and second modes; the controller is configured such that in operation in the first mode a common-mode voltage applied to the at least first and second output nodes has a first steady-state value and in operation in the second mode a commonmode voltage applied to the at least first and second output nodes has a second steady-state value, different to the first steady-state value; and for a change in mode between the first and second modes, the controller is configured to operate in a transitional period before and / or after the change in mode wherein, during the transitional period, the common-mode voltage applied to the at least first and second output nodes is ramped over time so that any step change in common-mode voltage on the change in mode is less than the difference between the first and second steady-state values.

[0023] In a further aspect, there is provided a controller for controlling a switching driver to modulate voltages at at least first and second output nodes so as to drive a load connected to said first and second output nodes with a drive signal based on an input signal, wherein: the controller is configured to control the switching driver to selectively operate in at least a first mode or a second mode, wherein in each of the first and second modes, the at least first and second output nodes are modulated between switching voltages with a controlled duty-cycle and at least one of the switching voltages is different in the first mode compared to the second mode; the controller is configured to control the mode of operation based on the input signal such that the switching driver can dynamically swap between the first and second modes; the controller is configured such that, in steady-state operation in the first mode a common-mode voltage applied to the at least first and second output nodes has a first value and in steady-state operation in the second mode a common-mode voltage applied to the at least first and second output nodes has a second value, different to the first value; wherein at least one of first values and the second values is not equal to a voltage which is halfway between the switching voltages used in that mode.

[0024] In a further aspect, there is provided a switching driver for driving a load comprising: at least first and second amplifier signal paths for modulating at least respective first and second output nodes between switching voltages so as to generate a drive signal for driving a load connected to the at least first and second output nodes by at least respective first and second output paths; wherein the switching amplifier is operable such that a common-mode voltage applied to the at least first and second output nodes may be controllably varied in use; wherein the switching amplifier further comprises at least one compensator configured to apply compensation to at least one of the at least first and second amplifier signal paths to compensate for any mismatch in transfer function of the at least first and second output paths.It should be noted that, unless expressly indicated to the contrary herein or otherwise clearly incompatible, then any feature described herein may be implemented in combination with any one or more other described features.For a better understanding of examples of the present disclosure, and to show more clearly how the examples may be carried into effect, reference will now be made, by way of example only, to the following drawings in which:

[0025] Figure 1a illustrates one example of a multilevel switching driver for driving a load in a BTL configuration and figure 1b illustrates one example of a multilevel switching driver for driving a multiphase load such as a motor;

[0026] Figures 2a and 2b illustrates example switching waveforms in different modes of operation of the switching driver of figure 1a;

[0027] Figure 3 illustrates voltage waveforms illustrating the issue of ringing following a change in common-mode voltage;

[0028] Figure 4 illustrates the equivalent common-mode circuit for the switching driver of figure 1a;

[0029] Figures 5a and 5b illustrate two examples of switching arrangements for applying a variable resistance, and figure 5c illustrates one example of T-bridge using variable resistance switches;

[0030] Figure 6 illustrates voltage waveforms illustrating the extend of any ringing with, and without, damping applied;

[0031] Figure 7 illustrates a switching driver with separate integrated circuits providing the output bridge;

[0032] Figure 8 illustrates waveforms showing a gradual change in common-mode voltage;

[0033] Figure 9a illustrates one example of a signal path for a switching driver with look-ahead for changes in signal amplitude and Figure 9b illustrates another example of a signal path for a switching driver for implementing a gradual change in common-mode voltage;Figure 10 illustrates voltage waveforms illustrating the extend of any ringing with, and without, a gradual change of common-mode voltage during a transitional period;

[0034] Figure 11 illustrates another example of a multilevel switching driver for driving a load in BTL configuration;

[0035] Figure 12 illustrates one example of a modulator arrangement for driving a switching driver such as illustrated in figure 1a or figure 11;

[0036] Figure 13 illustrates another example of a modulator arrangement for driving a switching driver such as illustrated in figure 1a or figure 11;

[0037] Figure 14 illustrates different transfer functions on different sides of the load and a resultant common-mode to differential transfer function due to mismatch in the filter arrangements on either side of the load for a switching driver such as illustrated in figure 1a;

[0038] Figure 15 illustrates on example of system identification of the transfer function for the filter arrangement on one side of the load;

[0039] Figure 16 illustrates one example of applying compensation for mismatch in the filter arrangements on either side of the load; and

[0040] Figure 17a and 17b illustrate two examples of switch arrangements for a T-bridge.

[0041] The description below sets forth example embodiments according to this disclosure. Further example embodiments and implementations will be apparent to those having ordinary skill in the art. Further, those having ordinary skill in the art will recognize that various equivalent techniques may be applied in lieu of, or in conjunction with, the embodiments discussed below, and all such equivalents should be deemed as being encompassed by the present disclosure.Embodiments of the disclosure relate to multi-level switching drivers, i.e. switching drivers in which driver output nodes may be modulated between switching voltages to generate a desired output voltage, on average over the course of one or more switching cycles, and where the switching voltages used for modulating the output nodes may be dynamically varied in use.

[0042] Figure 1a illustrates one example of a multi-level switching driver 100a for driving a load 101. The switching driver 100 in the example of figure 1a is configured to drive the load 101, which, in this example, is an audio transducer (but which in other examples could be another type of transducer), in a bridge-tied-load (BTL) configuration and thus, in use, the load 101 is connected between first and second output nodes 102-1 and 102-2 of an output stage 103 of the switching driver 100.

[0043] In at least some implementations, there may be an output filter arrangement 104 for applying filtering in the output path from each output node 102-1 and 102-2 to the load. As will be understood by one skilled in the art, for some applications, some filtering in the output path may be important, for instance for relatively high-power applications, e.g. for driving an output power of 10W or greater, and / or where the output path between the output nodes 102-1 and 102-2 of the switching driver 100 and the load 101 may be relatively long, e.g. of the order of tens of centimetres or greater. For example, audio systems in automotive applications and home theatre and the like may typically be required to output relatively high output powers and may have output paths of the order of tens of centimetres to meters between the switching driver and the loudspeaker being driven and, in such applications, filtering of the output path may be important. Typically, the output filter may comprise an LC (inductance-capacitance) filter arrangement which is separate to the load 101. Figure 1 illustrates one example of a basic filter arrangement 104 with a series inductance Lfil in the output path and capacitance Cfil between the output path and a defined reference voltage, such as ground, on each side of the load. Other LC filter arrangements may be implemented, however, as would be understood be one skilled in the art. Where the output stage 103 of the switching driver 100 is implemented as an integrated circuit, the filter arrangement 104 may be implemented, at least partly by external components, i.e. components which are off chip and not part of the integrated circuit.The output stage 103 is operable such that the first and second output nodes 102-1 and 102-2 can be selectively connected to a high-side voltage VH, e.g. a supply voltage, and to a low-side voltage, which in this example is ground. In the example of figure 1a these connections are provided by switches SH and SL respectively. In addition, each of the first and second output nodes 102-1 and 102-2 can be selectively connected to an intermediate voltage VM, where the intermediate voltage is a voltage at a level which is between the high-side voltage and low-side voltage. In the example of figure 1a the connection between the relevant output node 102-1 or 102-2 and the intermediate voltage VM is via a respective switch SM.

[0044] This switching arrangement, where an output node can be selectively connected to three different voltages by respective switching paths is often referred to as a T-bridge or a Y-bridge and shall be referred to herein as a T-bridge, although it should be understood that this isjust a convenient label and nothing should be implied about the physical layout of the switching paths by use of the term T-bridge. The output stage 103 of the example of figure 1a thus comprises first and second T-bridges for modulating the first and second output nodes 102-1 and 102-2 respectively.

[0045] In use, a switch controller 105 controls the switching of the T-bridges of the output stage 103 based on an input signal Sin, so as to modulate the voltages of the output nodes in a switching cycle that generates the desired differential voltage across the load, on average over the course of the switching cycle. In the example of figure 1a, the switch controller 105 may be operable in two different modes.

[0046] In a first mode, which may be seen as a high-level mode, the switch controller 105 modulates each of the output nodes 102-1 and 102-2 to generate a differential output voltage with a magnitude up to Vin (=VH - VL). In a second mode, which may be seen as a low-level mode, the switch controller 105 modulates each of the output nodes 102-1 and 102-2 to generate a differential output voltage with a magnitude up to (VM - VL).

[0047] In the second, low-level mode, each of the output nodes 102-1 and 102-2 can be modulated between the intermediate voltage VM and the low-side voltage, i.e. ground in this example. In some implementations, the output nodes 102-1 and 102-2 may be switched in antiphase, i.e. so that the first output node 102-1 is connected to theintermediate voltage VM when the second output node 102-2 is connected to the low-side voltage VL and vice-versa. This corresponds to a convention AD the modulation as would understood by one skilled in the art - although it will be understood that the output nodes could instead be modulated using a BD type modulation if desired.

[0048] There are different ways in which high-level mode could be implemented. In a first variant of the high-level mode, each of the first and second output nodes 102-1 and 102-2 may be modulated between the high-side voltage VH and the low-side voltage VL. In this case, the output nodes 102-1 and 102-2 are modulated between the same switching voltages in each mode, i.e. the output nodes 102-1 and 102-2 are each modulated between VM and VL in the first, low-level, mode and are each modulated between VH and VL in the second, high-level, mode. The modulation of the output nodes 102-1 and 102-2 in the first, high-level mode, could again be controlled in antiphase in an AD type modulation.

[0049] For applications where the high-side voltage VH is a positive supply voltage, e.g. VDD, and the low-side voltage VL is ground, this first variant may be considered as return-to-zero (RZ) operation, as (other than for a 100% duty-cycle) each output node returns to ground for part of the switching cycle.

[0050] In a second, alternative, variant of the high-level mode, the switching voltages used for modulating one of the output nodes 102-1 and 102-2 may differ from the switching voltages used for modulating the other of the output nodes 102-1 and 102-2. For example, depending on the required polarity of the output voltage, one of the output nodes 102-1 and 102-2 may be modulated between the high-side voltage VH and the intermediate voltage VM, whilst the other output node is modulated between the intermediate voltage VM and the low-side voltage VL. In this way, the average voltage at one output node is controlled to be in the range VM to VH and the average voltage at the other output node is controlled to be in the range VL to VM, leading a differential voltage with a magnitude up to VH - VL.

[0051] For applications where the high-side voltage VH is a positive supply voltage, e.g. VDD, and the low-side voltage VL is ground, this second variant may be considered as non-return-to-zero (NRZ) operation, as one output node is modulated between VH and VM and doesn’t return to the ground in a switching cycle.

[0052] In general, the switching controller 105 may be configured to always operate in a selected one of either the first variant or the second variant of the first mode, e.g. with RZ or NRZ operation, although some implementations the switching controller 105 may be capable of operating in either variant.

[0053] The switching controller 105 may selectively operate in the first mode (in the relevant variant) or in the second mode depending on the amplitude of the desired differential drive voltage. For instance, for a differential drive signals with an amplitude greater than the intermediate voltage VM (or greater than | (VM - VL)| if VL is not ground), the switching driver 100 may operate in the first, high-level, mode, but for amplitudes lower than a defined threshold, which is equal to or lower than VM (or | (VM — VL) | ), the switching driver 100 may operate in the second, low-level, mode. The mode of operation may be determined by comparing the amplitude or peak value of the input signal Sin, e.g. an envelope value derived from the input signal, with at least one threshold, possibly with some hysteresis applied to prevent frequent changes in mode for signal amplitudes near the threshold. Operating in the second mode for an input signal Sin with an amplitude below the defined threshold can reduce EMI and power consumption compared to operating in the first mode, but the ability to operate in the first mode for amplitudes above the defined threshold allows the switching driver to deliver a desired output range for the differential drive signal.

[0054] It will be understood that operating in the first variant of the first, high-level, mode does involve the output nodes output nodes 102-1 and 102-2 being modulated directly between the high-side and low-side voltages VH and VL, with the issues of EMI and ripple current discussed. However, in at least some applications, such a high-magnitude output may only be required occasionally, and the rest of the time the switching driver 100 can operate in the second low-level mode. For the second variant of the first, high-level, mode, one output node is modulated between VM and VL, whilst the other output node is modulated between VM and VL. For the example where the high-side voltage is a supply voltage VDD, the low-side voltage is ground and the intermediate voltage is halfway between VH and VL, i.e. equal to VDD / 2, this means that the voltage at eachoutput node only varies by VDD / 2 over the course of the switching cycle. This can further reduce the EMI and ripple current in the high-level mode. Operating in the second NRZ variant of the first high-level mode can, therefore, offer advantage in terms of power efficiency and reduced EMI compared to operating in the RZ first variant. However, operating in the second variant may, in some cases, either not be possible or may involve additional complexity with regard to the supply of the intermediate voltage VM.

[0055] In RZ operation, both the first and second modes draw power unidirectionally from the supplies. Energy flows from either the VH or VM supply to the load, and all switching transitions are referenced to ground. The supplies for these voltages are not required to absorb energy, which is compatible with conventional power-supply designs that are optimized for sourcing current only. However, the NRZ operation in the first mode transitions between the supply for VH and the supply for VM and introduces bidirectional power flow at the supply for the intermediate voltage VM. Depending on the instantaneous load current and switching state, energy can be returned to this supply. Consequently, the supply for the intermediate voltage VM must be capable of both sourcing and sinking current, introducing the risk of power-supply pumping and rail overvoltage if not properly managed.

[0056] Figure 2a illustrates example idealised switching voltage waveforms for the switching driver 100 of figure 1a illustrating these two modes, for the first (RZ) variant of the high-level mode. Figure 2a illustrate how the voltages V102-1 and V102-2 at the output nodes 102-1 and 102-1 respectively are modulated over time in a number of switching cycles having a period P. Figure 2a also illustrates the resulting instantaneous differential voltage Vdiff between the output nodes (where a positive differential voltage corresponds to the voltage at output node 102-1 being more positive than the voltage at output node 102-1) over the switching cycles and also an indication of the resulting drive voltage Vdrv, i.e. the average differential voltage between the output nodes over the course of the switching cycle.

[0057] Figure 2a illustrates that initially the switching driver is operating in the second mode in which each of the output nodes 102-1 and 102-2 is modulated between the intermediate voltage VM and ground. The switching driver 100 is operated in this second mode whenthe amplitude of the differential drive signal is lower than a first threshold, which may, in this example, be equal to or lower than the intermediate voltage VM.

[0058] Figure 2a illustrates that the switching driver 100 is operated with AD modulation and thus the voltages at the output nodes 102-1 and 102-2 are modulated in antiphase such that the instantaneous differential voltage Vdiff is modulated between +VM and -VM.

[0059] In the example of figure 2a, at a time t1 the switching driver changes to the (first RZ variant of the) first mode in which the output nodes 102-1 and 102-2 are modulated between the high-side voltage VH and ground, with an appropriate change in duty-cycle to maintain the correct average differential output voltage. The switching driver 100 may be configured to change the mode of operation from the second mode to the first mode when it is determined that the amplitude of the differential drive signal will exceed the threshold, i.e. the peak signal excursion will reach close to or exceed a limit for the drive signal to be correctly generated in the second mode of operation.

[0060] Figure 2b illustrates example idealised switching voltage waveforms for the switching driver 100 of figure 1 illustrating the first and second modes, for the second (NRZ) variant of the high-level mode. In the example of figure 2b, the switching driver is again initially operating in the second, low-level, mode and then, at time t1 , changes to the first, high-level, mode, but in this case operates in the second variant of the high-level mode. In this example, for a positive drive voltage Vdr, the first output node 102-1 is thus modulated between VH and VM whilst the second output node 102-2 is modulated between VM and VL. In this example, the output node 102-1 is switched to VH when the output node is 102-2 switched to VL and then both output nodes are each modulated to VM at the same time as each other. It will be understood, however, that other modulation schemes could be implemented. The switching driver 100 may , in this example, (in a similar manner as discussed with reference to figure 2a) be configured to change the mode of operation from the second mode to the first mode when it is determined that the amplitude of the differential drive signal will exceed the threshold, i.e. the peak signal excursion will reach close to or exceed a limit for the drive signal to be correctly generated in the second mode of operation.It can thus be seen that the switching driver 100 can swap between these two modes of operation with a change in switching voltages used for modulation and a corresponding change in duty-cycle to maintain the same average differential output voltage. Changing the switching voltages used for modulation in this way does, however, result in a change in the common-mode voltage Vcmout applied to the output nodes 102-1 and 102-2. When operating in the second mode the common-mode voltage Vcmout applied to the output nodes is, for the AD modulation described, equal to half the intermediate voltage, i.e. VM / 2, whereas when operating in the first variant of the first mode the common-mode voltage Vcmout applied to the output nodes is half the high-side voltage, i.e. VH2. The common-mode voltage Vcmout when operating in the second variant of the first mode is, in the example illustrated, also half the high-side voltage, i.e. VH / 2.

[0061] This step change in the common-mode voltage Vcmout applied to the output nodes 102-1 and 102-2 can lead to unwanted transients in the output path. In particular, this sudden change or jump in common-mode voltage applied to Vcmout applied to the output nodes can lead to ringing in the output path, in particular within the filter arrangement 104 in the output path. Sudden changes in the level of the common-mode voltage also have significant high frequency content. As the output filter arrangements 104 on either side of the load 101 typically may exhibit some mismatch, particularly at high frequencies (in this case, approximately 1k-20kHz), this can lead to distortion as the common-mode component may be converted to differential mode. This limits driver performance.

[0062] Figure 3 illustrates this issue. A switching driver 100 such as illustrated in figure 1a was implemented with, in this example, a high-side voltage VH of 48V and an intermediate voltage VM of 16V. The left-hand plot of figure 3 illustrates the voltages VC1 and VC2 on the capacitors Cfil of the filter arrangement 104 and the right-hand plot shows the common-mode Vcmfil of these two voltages, i.e. Vcmfil = (VC1+VC2) / 2.

[0063] In this example, the switching driver was initially driven with a sinusoidal input signal with an amplitude corresponding to a drive signal amplitude of 16V and was operated in the second (low-level) mode of operation. It can be seen that during this period the voltages VC1 and VC2 the capacitors Cfil of the filter arrangement 104 follow the differential drivesignal and the common-mode voltage Vcmfil of these capacitor voltages is substantially constant (at 8V in this example).

[0064] At a certain point in time, illustrated as 0.01s in these plots, the amplitude of the input signal increased to an amplitude corresponding to a drive signal amplitude of 48V and the switching driver 100 changed to operating in the first (high-level) mode of operation, in this case the first variant of the first mode. This results in a change to the commonmode voltage Vcmout applied to the output nodes. It can be seen that directly after the change in the mode, the capacitor voltages VC1 and VC2 exhibit a large oscillation about the desired differential drive signal and the common-mode voltage Vcmfil of the capacitor voltages exhibits a large oscillation about the new common-mode level of 24V.

[0065] This occurs because of ringing in the common-mode circuit formed by the switching driver 100, together with the filter arrangement 104 and load 101. The common-mode circuit is substantially undamped and thus the response to the common-mode circuit to the step change in common-mode of the output signal results in significant ringing or oscillation, which can persist for a relatively long-time, e.g. of the order of tens of milliseconds as illustrated in figure 3. This effect is more pronounced at higher power levels, where the voltages are larger and the switch resistances (i.e. the main component damping the circuit) are lower. This ringing can lead to an increase in EMI and / or increased power losses, e.g. in inductor core losses, and thus is undesirable.

[0066] A further issue that can arise on a change of mode in this way, is that, as noted above, any mismatch in the output stage 103 or filter arrangement 104 on either side of the load, e.g. a mismatch in switch resistance or inductance value, can, on a sudden change in common-mode component, result in common-mode to differential conversion and thus lead to an unwanted artefact in the differential drive signal.

[0067] One way to avoid this issue would be to avoid a change in common-mode voltage on a change in mode, which could be achieved by changing both the switching voltages used for modulating the output nodes in the different modes (instead of changing just one of the voltages used). For instance, a switching driver could be implemented with a first high-level mode in which the output nodes 102-1 and 102-2 are modulated between the high-side voltage VH and the low-side voltage VL and a variant of the second mode inwhich the output nodes 102-1 and 102-2 are modulated between two different intermediate voltages VM1 and VM2. If the intermediate voltages VM1 and VM2 were configured such that (VM1+VM2) / 2 = (VH+VL) / 2, then swapping between the two modes could avoid any significant change in the common-mode voltage. However, this does require a second intermediate voltage to be available, which would typically require additional circuitry for generating the second intermediate voltage, which would add to the circuit area and cost and also the power consumption in use, and, in any case, there would need to be additional switching connections for connecting the second intermediate voltage to the output nodes which again would increase the circuit area. Additionally, in implementations where four or more different voltages are available for use as switching voltage, i.e. there may be at least two different intermediate voltages, it may be desired to operate in different modes of operation that result in different values of common-mode voltage in continuous operation in a given mode.

[0068] The discussion above has focussed on applications for driving a load in a BTL configuration with a differential drive signal, e.g. for audio. Similar issues can arise with switching drivers in other applications, which may have other topologies for the output stage, e.g. the output stage may comprise a multiphase switching driver for output of three or more phases. In some such applications the switching driver may operate like a multiphase inverter.

[0069] For example, a three-phase switching driver may be used as a motor driver as illustrated in figure 1b. Figure 1b illustrates a switching driver 100b for driving a load 101b, which in this example is a 3-phase motor. The motor 101b could be any suitable type of motor, such as a permanent magnet synchronous motor (PMSM), brushless DC (BLDC) motor or induction motor (IM). The switching driver 100b has an output stage 103 that comprises three output nodes 101-1, 101-2 and101-3, each of which may be modulated between selected switching voltages with a controlled duty-cycle to generate a desired 3-phase driving waveform. Whilst conventionally for motor drive applications, the switching driver may be a two-level driver with each output node always being modulated between a high-side voltage VH and a low-side voltage VL, again there may be benefits in terms of reduced EMI and power efficiency by operating in a low-level mode when possible and modulating the output node between an intermediate voltage VM and VL. Thus, the output stage 103 of the example of figure 1b comprises a respective T-bridgefor each of the output nodes 101-1, 101-2 and101-3 so that each of the output nodes 101-1, 101-2 and101-3 can be selectively connected to the highs-ide voltage VH, the intermediate voltage VM or the low-side voltage VL (which is ground int his example). A switching controller 105 controls switching of each T-bridge so as to generate the desired 3-phase driving waveform, based on a motor demand signal Sdem. The form of the motor demand signal Sdem may depend on the application but in some cases may give a demand of speed and / or torque for the motor 101b. This demand signal may be processed by a processing module 106 to generate a voltage demand signal Svdem which is then used by the switching controller 105 to generate the appropriate switching waveforms. The voltage demand signal Svdem may thus be the input signal Sin for the switching controller 105.

[0070] There are various ways in which the voltage demand signal Svdem may be generated. In some examples, the processing module 106 may be implemented to use field oriented control (FOC). As will be understood by one skilled in the art, FOC is a known motor control technique that allows precise control of torque and flux of the motor. In FOC, measured phase currents are transformed from the three-phase stationary domain into a rotating reference frame aligned with the rotor magnetic field. This transformation separates the motor current into orthogonal components: a direct component d associated with flux production and a quadrature component q associated with torque production. The demand signal, e.g. the speed and torque demand are converted to reference values for these orthogonal components and the measured currents compared with the reference values to derive the voltage commands Vd and Vq required. These voltage demands Vd and Vq describe a desired voltage vector Vdq in the reference frame. This Vdq vector can then be transformed back to the stationary reference frame, to provide corresponding stationary frame voltage demand components Va and VB, which collectively define a voltage demand vector VaB. This voltage demand vector VaB can be used as the voltage demand signal Svdem. The switching controller 105 may, in this case, use a modulation scheme such as space-vector PWM to generate the appropriate switching control signals for each output node.

[0071] Depending on the voltage demand, the output nodes 101-1, 101-2 and101-3 may be switched in a high-level mode, which may involve the output nodes being modulated between the high-level voltage VH and the low-level voltage VL (or the high-level voltageat the intermediate voltage VM), or, when possible, the output nodes may be switched in a low-level mode in which the output nodes are switched between the intermediate voltage VM and the low-side voltage VL. This provides the same benefits of power efficiency and reduced EMI as discussed above - and in motor control applications this may also reduce the ripple current within the coils of the motor that may sometimes vary at audio frequencies and cause an audible hum. However, swapping between the different modes will vary a common-mode component of the drive signals at each of the three output nodes, i.e. the average voltage of the 3-phase drive signal applied to the motor, also known as the zero-sequence voltage in motor control. A motor load will typically have some significant inductance, e.g. the motor windings, and a change in common-mode voltage of the 3-phase driving signal, i.e. a change in the zero-sequence voltage, can result in similar unwanted resonance effects. In addition, for motor applications there may typically be EMI suppression components connected to the output path, which can add the resonance and the cabling connecting the motor may also have some capacitance associated therewith that can add to the resonance.

[0072] Embodiments of the present disclosure thus relate to switching drivers which are operable in different modes in which the switching voltages used for modulating the output nodes differ in the different modes and where a change in mode can result in a change in the common-mode voltage of the output signal and to methods and apparatus for operation of such switching drivers. Embodiments of the present disclosure mitigate for at least some adverse effects that can arise on a change in common-mode voltage of the output of the switching driver.

[0073] Embodiments of the present disclosure may mitigate for the effects of a change in common-mode voltage in one or more of a number of different ways.

[0074] Dynamic damping control

[0075] In some applications the effects of a change in the common-mode of the output voltage may be suppressed by dynamically applying damping on a mode transition, e.g. applying damping for a period of time following a mode transition when ringing might otherwise be expected.As noted above, the common-mode circuit for the switching driver 100 together with the filter arrangement 103 and load 101 may, in at least some implementations, not have much significant damping. Figure 4 illustrates the equivalent common mode circuit 400 for the switching driver arrangement illustrated in figure 1a, where RS-1 and RS-2 represent the output resistance of the output stage 103 on either side of the load and RL represents the load resistance of the load 101. The impact of the load resistance RL on the common-mode response is generally minimal and thus can be ignored.

[0076] It will be understood by one skilled in the art that in the circuit 400 illustrated in the figure 4, the common-mode response is principally damped by the resistances RS-1 and RS-2 of the output stage 103, which are largely governed by the on-resistances of the relevant ones of the switches SH, SM and SL of the T-bridge being switched in the relevant mode. Typically, these switch on-resistances are relatively low, so as to avoid unwanted resistive losses during operation, and this means that the common-mode response may be largely undamped.

[0077] Adding some permanent series resistance to provide damping would be undesirable in terms of increasing losses and thermal dissipation, when operating continuously in a given mode. In embodiments of the present disclosure, some additional damping may be dynamically applied during a damping period following (and possibly for a short period before) a change in mode, and the additional damping may then be disabled or removed at the end of the damping period for continued operation in the new mode.

[0078] There are various ways some damping could be selectively applied for a damping period. For example, the output impedance of the switching driver 100 may be temporarily increased.

[0079] Figures 5a and 5b illustrates two examples of switching arrangements that could be used to increase the output impedance.

[0080] Figure 5a illustrates a first switch arrangement 501 that can be used to selectively connect a series resistance 502 into the output path of the T-bridge to selectively increase the damping applied when desired. The first switch arrangement 501 comprises a first switch 501 a in a first circuit branch and a second switch 501 b connectedin a second circuit branch with the series resistance 502. The first and second circuit branches are connected in parallel so that the first switch arrangement 501 can be operated with the first switch 501a on and the second switch 501b off so as to provide a low-resistance conductive path via the first circuit branch and can be operated with the second switch 501b on and the first switch 501a off so as to provide a high-resistance conductive path via the second circuit branch.

[0081] At least one switch arrangement 501 could be arranged as part of each T-bridge and could, for example, be connected between the relevant switches of the T-bridge and the relevant output node 102-1, 102-2 (or 102-3 if present). In general, to provide an increased output resistance, the additional series resistance should be connected in series between the output node and the relevant voltage supply for the relevant mode of operation, i.e. between the high-side voltage VH and the output node when operating in the first mode, and between the intermediate voltage VM and the output node when operating in the second mode. The switch arrangement 501 could, for instance, be connected in a common part of an output path for both switches, i.e. the switches SH and SM could each connect to a first common node, which is connected to the relevant output node, e.g. 102-1, via the switch arrangement 501. At least for implementations where the low-side voltage is ground, it may not be necessary for the series resistance to be connected between the low-side voltage VL and the load for the relevant part of the switching cycle, and thus low-side switch SL could be connected to the output node via a path that bypass the switch arrangement 501, but in some arrangements it may be simpler to also have the low-side switch connect to the first common node.

[0082] In continuous or steady-state operation in a given mode of operation, the first switch 501a may be on to enable the low-resistance path, with the second switch 501b off. However, during the damping period in which increased damping is to be applied, the second switch 501b may be turned on and the first switch 501a may be turned off, so that the high-resistance path via the series resistance 502 is enabled. In this way the output resistance of the output stage can be selectively increased to provide increased damping during the damping period.

[0083] Alternatively, to avoid additional switches in the output path, the first switch arrangement 501 could be used to implement each of the switches SH and SM as switches with avariable on-resistance, e.g. one switch arrangement 501 may be used as the high-side switch SH and another switch arrangement 501 used as the switch SM. In this case, each of the parallel switches 501a and 501b of the switch arrangement should be a suitable switch to act as the relevant switch and, in particular, if the switch arrangement 501 is used for the switch SM, each of the parallel switches 501a and 501b may comprise at least two back-to-back transistors such as FETs. It will be understood by one skilled in the art that switches SH, SM and SL may generally be formed by transistors in an integrated circuit and that standard transistors, such as FETs, have an associated body diode. In use, when the high-side switch SH is off, the voltage at the output node 102 should always be lower than VH and thus the switch SH could be implemented by a single transistor whose body diode is reversed biased by VH when the high-side switch is off. Likewise, in use when the low-side switch SL is off, the voltage at the output node 102 should never be lower than VH, and thus the switch SH could be implemented by a single transistor whose body diode is reversed biased by the voltage at the output node when the low-side switch SL is off. However, when the switch SM is off, the voltage at the output node could be driven to VH when switch SH is on or to VL when switch SL is on. If the switch SM were implemented by just one individual transistor, i.e. by a single FET, then there could be unwanted conduction via the body diode of the transistor. In general, therefore, the switch SM may be implemented by at least two transistors connected in series and oriented so their body diodes are in opposite orientations. In this case, when the switch SM is off, one of these diodes is reverse biased when the output node is at VH and the other body diode is reverse biased when the output node is at VL. The back-to-back transistors may generally be configured in a common-source arrangement and driven by the same gate driver, as to act as single switch element. However, in some embodiments there may be some advantages in implementing the back-to-back transistors with independent drivers and possibly in a common-drain configuration, as will be discussed in more detail below.

[0084] Optionally, the low-side switch SL could also be implemented by a switch arrangement 501, which may be advantageous in balancing the switch resistance of the low-side switch with the resistance of the relevant one of the switches SH or SM dependent on the mode of operation, as will be discussed in more detail below. The first switch arrangement 501 may be controlled to be in an off-state, i.e. non-conducting, by controlling both the first and second switches 501a and 501b to be off. The switcharrangement 501 may also be controlled to be in either of two different on-states, i.e. states allowing conduction, by turning either the first switch 501a on, to provide a low-resistance on- state, or by turning the second switch 501b on, to provide a high-resistance on-state.

[0085] Figure 5b illustrates a second switch arrangement 503 that could be used to implement the switches SH and SM, and optionally switch SL, to provide switches with a variable on-resistance.

[0086] The second switch arrangement 503 comprises first and second switch elements 503a and 503b in parallel and which may, for example, be implemented as part of a split-switch arrangement as would be understood by one skilled in the art. The second switch arrangement 503 may also be controlled to be in an off-state and also in at least a low-resistance on-state or a high-resistance on-state. In some examples, to provide the low-resistance on-state, the whole of the switch arrangement 503 may be turned on, i.e. both the first and second switch elements 503a and 503b are turned on and conducting, and the on-resistance of the second switch arrangement 503 is governed by the on-resistances of the first and second switch elements 503a and 503b in parallel. In the high-resistance on-state, only a proportion of switch arrangement is turned on, i.e. only one of the first and second switch elements 503a and 503b is turned on and conducting, and the other of the first and second switch elements 503a and 503b is off and nonconducting. In this high-resistance on-state, the on-resistance of the switch arrangement is governed by the on-resistance of whichever of the first and second switch elements 503a and 503b is turned on. The first and second switch elements 503a and 503b may be arranged to provide different on-resistances to one another, for instance if the first and second switch elements 503a and 503b are implemented by MOSFETs for example, at least one dimension of the channel, e.g. channel width, of the first and second switch elements 503a and 503b may be different. In this way a desired on-resistance for the high-resistance on state can be achieved, whilst also allowing a desired low on-resistance for the whole switch arrangement 503 in the low-resistance on state.

[0087] It will be noted that the first and second switch elements 503a and 503b may each be fully turned on or off as required, i.e. operated with a minimum on-resistance for that switch element when on, and the resistance is controlled by varying the proportion of theswitch arrangement 503 which is turned on. This is not the same as operating the switching element 503a or 503b in the linear regime so as to controllably vary the effective resistance of the switching element 503a and 503b itself.

[0088] First or second switch arrangements 501 or 503 such as illustrated in figure 5a and 5b could be used to implement the switches SH and SM of each of the T-bridges of the output stage 103 as illustrated in figures 1a or 1b, to allow the relevant switch to be selectively operated in the low-resistance on-state or the high-resistance on-state, during the relevant part of the switching cycle when it is turned on. As noted above, when used to implement the switch SM, each switch element 503a and 503b may comprise a back-to-back series pair of transistors. During continuous or steady-state operation of the switching driver 100 in a given mode, the relevant switch may be operated in the low-resistance on-state so as to reduce switching losses. However, on a change of mode, the relevant switch may be operated in the high-resistance on-state during a damping period, so as to provide an increased output resistance for the switch driver 100 and thus provide an increase in damping for the common-mode circuit.

[0089] Thus, for example, consider that the switching driver 100 of figure 1a is operating in the second mode with the first and second output nodes 102-1 and 102-2 being modulated between the intermediate voltage VM and the low-side voltage, e.g. ground. In this mode of operation, it is the switches SM and SL that are being duty-cycled in a complementary manner for each of the T-bridges and switch SM can be turned on in the low-resistance on state for the relevant part of the switching cycle. On a change in mode to the first mode of operation, in the first variant where the output nodes are modulated between VH and VL, it is switches SH and SL of each T-bridge that are duty-cycled in a complementary manner (and switch SM is maintained in an off-state). On the change in mode, and for a period of time thereafter (corresponding to the damping period), the SH switch can be turned on, when required in the switching cycle, in the high-resistance on-state so as increase the output resistance of the switching driver 100 and provide damping of any ringing in response to the change in common-mode voltage. The damping period in which the switches SH of the T-bridges are operated in the high-resistance on-state may be defined based on the time-constant of the common-mode circuit so that the damping is applied during a period over which ringing would be expected. After the damping period, the switches SH of the T-bridges may be operatedso as to be turned on, when required in the switching cycle, in the low-resistance on-state for continued operation in the first mode.

[0090] For the opposite change of mode, i.e. a change in mode from the first mode to the second mode, it would the switches SM of the T-bridges that would be operated in the high-resistance on-state during the damping period following the change to operation in the second mode.

[0091] It will be understand that implementing the high-side switch SH as a switch with a variable on-resistance in this way allows for selective damping to be applied in the first mode of operation and implementing the intermediate switch SM as a switch with a variable on-resistance allows for selective damping to be applied in the second mode of operation, but if it were desired to apply selective damping in only one mode of operation, it would be sufficient for just the relevant one of the SH or SM switches to be implemented as a switch with a variable on-resistance.

[0092] For example, figure 5c illustrates an example of a T-bridge in which the high-side switch SH is implemented as a switch with a variable on-resistance, but the switch SM is not.

[0093] It is generally preferable for the high-side switch SH to be operable with a relatively low on-resistance during continuous operation in the first, high-level, mode of operation as a relatively high load current may be drawn through the high-side switch SM in operation in this mode and the on-resistance can be important in terms of resistive losses. In the example of figure 5c, the high-side switch SH is therefore be implemented to have a variable resistance and, in this example, comprises a switch arrangement such as described with reference to figure 5b, with first and second switching elements 503aH and 503bH. The switch arrangement may be configured so as to be operable in a low-resistance on-state, e.g. with both switch elements 503aH and 503bH turned on, to provide a low on-resistance in continuous operation in the first mode, but to be operable in a high-resistance on-state, e.g. with just one of the switch elements 503aH or 503bH turned on, to apply damping during a damping period following transition to operation in the first mode.However, for the switch SM, which is only used in second, low-level, mode of operation, the load current in use in this mode may be significantly lower than in the first mode, and resistive losses may be less of a concern. Instead, switching losses associated with turning the switch SM on and off may be more of a concern and it may, therefore, be advantageous to implement switch SM using a switch which result in lower switching losses during continuous operation in the second mode. Such a switch may, for example, be implemented as by a MOSFET switch which is smaller than the switch arrangement used for the high-side switch SH (in the low on-resistance state) and which thus has a smaller gate capacitance but higher on-resistance. In some implementations the on-resistance for the switch SM which is acceptable for continuous use in operation in the second mode may be sufficiently high to provide sufficient damping of any ringing induced by a change in common-mode voltage on a transition to the second mode of operation. In which case, it may not be necessary to implement the switch SM as a switch with a variable resistance as the fixed nominal resistance of the switch SM used in continuous operation in the second mode may provide sufficient damping without the needed to use a higher resistance during a damping period. Thus, as illustrated in figure 5c, the switch SM may be implemented by a switching element, such as a back-to-back transistor pair, without any parallel component, to provide a nominally fixed on-resistance (for a given set of operating conditions such as temperature etc.).

[0094] Figure 5c also illustrates that, advantageously, the low-side switch SL is implemented as a switch with a variable resistance and, in this example, is also implemented by a switch arrangement such as illustrated in figure 5b with switch elements 503aL and 503bL in parallel. The low-side switch SL may be configured to be operable in with a low-resistance on-state, e.g. with both switch elements 503aL and 503bL turned on, in which the on-resistance may be substantially matched to the on-resistance of the high-side switch SH in its low-resistance on-state. This can allow the on-resistance of the low-side switch SL to be matched to the on-resistance of the high-side switch SH when in continuous operation in the first mode, which means that these switches present a balanced impedance, which can reduce distortion compared to operation with switches having different impedances.

[0095] However, when operating in the second mode (whether immediately following a mode transition or in continuous operation), the low-side switch SL may be operated in a high-resistance on-state, e.g. by turning on only one of the switch elements 503aL or 503bL. Turning on only part of the switch arrangement of the low-side switch SL will result in a higher on-resistance, but will reduce switching losses compared to turning on all of the switch arrangement. Advantageously the on-resistance of the low-side switch SL in the high-resistance on-state may be matched to the on-resistance of the switch SM, so as to provide balanced resistances when operating continuously in the second mode.

[0096] For the example of figure 5c, on a transition from the second, low-level, mode to the first, high-power mode, each of the switches SL and SM will be operating with a relatively high on-resistance in continuous operation in the second mode (as the switch SM inherently has a relatively high on-resistance and the switch SL is operated in its high-resistance on-state) and thus there may be no need for any additional resistance to be applied for additional damping prior to the mode transition. On transition to the first mode, the high-side and low-side switches may be initially operated in their high-resistance on-state during a damping period and then swap to operation in the low-resistance on-state at the end of the damping period for continued operation in the first mode. On the reverse transition, from the first mode to the second mode, the high-side and low-side switches SH and SL may each initially be operating in the low-resistance on-state and, in some implementations, may swap to operation in the high-resistance on-state immediately before the change in mode to provide some initial damping. On the change in mode, the switches SM and SL will operate continuously with a relatively high on-resistance and the variable resistance switch SL will be operated continuously in its high-resistance on-state which can therefore provide damping of any ringing due to a change in the common-mode voltage applied.

[0097] It should be noted that the examples of figures 5a, 5b and 5c illustrate switch arrangements that comprise two switches or two switch elements in parallel and discuss operation to enable a suitable high-resistance on-state and a low-resistance on-state. In some examples, there could be more than two different on-states, which each provide different resistance. For instance, for the example of figure 5b, if the switch elements 503a and 503b have different on-resistances to one another, then three different on-states with different resistances could be enables by switching just switch element 503a on, just switch element 503b on or switching both switch elements 503a and 503b on together. Additionally or alternatively, more different on states with different on-resistances could be implemented by using more than two switches or switch elements in parallel. This may allow the on resistance which is applied during the damping period to be selectively varied, which could be useful where the expected amount of resonance may vary in use, as will be discussed below.

[0098] It should be noted that the use of a switch for the high-side switch which can provide a relatively low on-resistance during continuous operation in the first, high-level mode of operation and a switch for the intermediate voltage switch which can be switched with lower switching losses than the high-side switch, for use in continuous operation in the second, low-power mode, together with a variable switch arrangement for the low-side switch which can be selectively operated to provide a low on-resistance in continuous operation in the first, high-level mode of operation and lower switching losses in the continuous operation in the second, low-level mode of operation represents a novel aspect of this disclosure. It will be noted that this benefit of reducing the switching losses of the switch SM and SL used in the second, low-level, mode of operation, whilst providing suitable low on-resistances for the switch SH and SL used in the first, high-level, mode of operation would apply even if neither of the switches SM or SH were implemented as variable switch resistance to provide damping, e.g. the switch SH illustrated in figure 5c could, in some implementations, be implemented by a single switch element which provides a relatively low on-resistance.

[0099] However, as discussed above, implementing one or both of the switches SH and SM as variable resistance switches can allow for damping to be selectively applied to mitigate the issues of ringing following a step-change in common-mode voltage.

[0100] Figure 6 illustrates waveforms of the common-mode voltage Vcmfil of the capacitor voltages for a switching driver 100 such as illustrated in figure 1a following a change in mode with and without damping resistance applied. The parameters of operation were the same as discussed for figure 3, and the waveforms illustrate the voltages commonmode voltage Vcmfil following a change in mode from the second mode to the first mode. The top plot shows the common-mode voltage Vcmfil of the capacitor voltages without any additional damping being applied and illustrates significant ringing as discussed with reference to figure 3. The middle plot illustrates the common-mode voltage Vcmfil of the capacitor voltages where the output resistance of the switching driver 100 was increasedto provide what will be referred to as a medium level of damping, which in this example provided an output resistance of the order of an ohm, for a damping period of following the change in mode. It can be seen that the amount of ringing is significantly decreased. The lower plot illustrates the common-mode voltage Vcmfil of the capacitor voltages where the output resistance of the switching driver 100 was increased to provide what will be referred to as a high level of damping, in this example to provide an output resistance of the order of several ohms for the same damping period. It can be seen that ringing of the common-mode voltage Vcmfil is substantially suppressed.

[0101] It will be understood that changing the output resistance of the switching driver 100 in this way will impact the overall transfer function of the switching driver and could result in some distortion in the output drive signal. However, the switching driver 100 may typically be implemented to operate in a closed-loop manner, where some feedback (not illustrated) from the output of the switching driver is fed back to the switch controller 105 to be taken into account in setting the relevant duty-cycles so as to minimize any error between the input signal and the output signal and in at least some implementations the feedback loop will be sufficient to maintain any distortion arising from the change in output resistance within acceptable limits. Additionally or alternatively the modulator control within the switching controller could be updated to take account in the expected change in transfer function.

[0102] A switch controller of the switching driver may thus be configured to control switching of the relevant switches SH, SM and SL of the T-bridges of the switching driver to implement the different modes of operation and to control the duty-cycle of the relevant switches to generate the desired output drive signal and, additionally, may control the relevant switch to operate in a high-resistance on state, and / or control connection of some additional series resistance into the output path, during a damping period following a change in mode.

[0103] Optionally, the high-resistance on-state may also be used for a short period of time immediately before the change in mode occurs, as in some implementations this can help with the damping response. For example, considering the change in mode from the second mode to the first mode, the switching driver 100 will, as discussed above be dutycycling the switches SM and SL in operation in the second mode and the switches SMmay be operated in the low-resistance on-state. For a short period before the change in mode, e.g. for a few switching cycles before the change in mode occurs, the switches SM may be operated in the high-resistance on-state. This does require some advance knowledge that the mode is going to be changed, i.e. some degree of look ahead for the change in mode, which could be provided by some propagation delay between determining that a change in mode is required and the implementation of the change in mode, as will be discussed in more detail below.

[0104] It will be understood that the mode of operation will be changed because it is determined that the amplitude of the output drive signal is changing to a level appropriate for the new mode of operation, e.g. is crossing a relevant threshold for operation in the relevant mode. For a change from the first, high-level, mode of operation to the second, low-level mode of operation, this will be because the amplitude of the output drive signal has decreased sufficient to allow operation in the second, low-level, mode. The damping period will thus be applied at a time when the output signal amplitude is low and the load current will, consequently, be expected to be relatively low throughout the damping period. For a change from the second, low-level, mode of operation to the first, high-level mode of operation, this will be because the amplitude of the output drive signal is increasing. In this case, the amplitude of the output drive signal could increase to a high level during the damping period following the change in mode. This could result in a relatively high load current being drawn, for example during any signal peaks, during the damping period when the output resistance of the switching driver is relatively high, which may lead to relatively high switching losses.

[0105] If there is some degree of look ahead of when the change in mode is required, then the mode change from the second, low-level, mode to the first, high-level mode, could be made ahead of when the increase in signal amplitude occurs. This could allow for at least part of the damping period to be implemented when the signal amplitude is still relatively low and thus the load current is expected to be relatively low, so as to reduce or avoid increased losses due to a high-load current being drawn when the output stage of the switching driver is operating in a high-resistance state. Advantageously the change in mode may be made so that the damping period ends, and the output stage of the switching driver 100 returns to low-resistance operation, just before any significant load current is drawn.For some applications, such as an audio driver as illustrated in figure 1a, the properties of the resonance network may not dynamically vary much in use for a given implementation and thus, the amount of resonance that would be expected for an undamped system in the event of a mode change can be determined and would not be expected to change much in use. That is, for a design of output stage, output filters and load, the amount of resonance that should be damped can be determined and thus the amount of damping applied can be set to an appropriate level, e.g. to provide a desired trade-off in terms of amount of suppression of resonance and increased / power losses or artefacts arising from a change in transfer function.

[0106] In some applications, however, the amount of resonance that would occur, for an undamped system, could vary significant in use. For instance, where the load is a motor, at least some components of the motor may operate at relatively high temperatures in use, and the inductance and / or capacitance of the various components may change relatively significantly with temperature. Also, the state of the motor, i.e. the degree of magnetization, can also affect what resonance may occur on a change in the commonvoltage or zero-sequence voltage. In such applications, the damping may be set to provide a desired trade-off of sufficient damping for when the resonance would be high but without unduly disturbing operation or adding unwanted losses when the resonance would be relatively low. In some implementations, the amount of damping applied could be dynamically varied based on some parameters indicative of the likely amount of resonance that could otherwise occur. The damping applied could be varied so as to selectively vary the increase in output impedance applied during the damping period and / or the duration of the damping period, e.g. by selecting an appropriate on-state to be used during the damping period as discussed above. The parameters could, for example for a switching driver for driving a motor, comprise one or operating parameters such as at least one of temperature, motor speed, load and modulation index.

[0107] In some embodiments, at least some of the switches of the switching driver 100 may be implemented as part of a separate integrated circuit (IC) to that comprising the switch controller. This can allow each integrated circuit to be more optimised for its purpose and, in particular, can allow for different material systems to the be for the different integrated circuits. For instance, for high power applications it can be advantageous toimplement at least some of the switches in a compound semiconductor material system such as a Gallium Nitride based IC, whereas it may be more convenient to implement the switch controller, and any other signal processing or driver control circuitry, in a conventional silicon-based IC. Using (at least) two different integrated circuits can allow each circuit to be optimized for its intended use in this way. In some examples, there may therefore be (at least) a first IC which implements the output bridge and a second IC for controlling the output bridge. However, to implement an output stage with a T-bridge for each side of the load, where the T-bridges comprise switch arrangements such as illustrated in figure 5 to provide a variable on-resistance for damping purposes would require a custom IC design for the first IC.

[0108] Figure 7 illustrates one example of switching driver 700 which first and second ICs 701 and 702 to collectively provide a T-bridge output stage with a variable output resistance. Note that figure 7 shows, for clarity, the connections for only one side of the load 101, and the first and second ICs 701 and 702 may also have similar connections for the other side of the load. Figure 7 illustrates that an output node 102a of the first IC 701 is connected, in use, to the load 101 via filter arrangement 104. The first IC 701 comprises a high side switch Sha and a low-side switch Sla for connecting the output node 102a to the high-side voltage VH or the low-side voltage VL respectively. These switches Sha and Sla may be the switches that will be used in continuous operation in in the first, high-level, mode of operation, as it is the switches that are used in the high-level mode of operation that may benefit most from being implemented in a material system such as GaN. The on-resistance of these switches may thus be configured to be relatively low and may not be controllably variable in use. A second IC 702, which may be implemented in a different material system to the first IC, e.g. in silicon, comprises a T-bridge arrangement connected to an output node 102b of the second IC, the T-bridge arrangement comprising a high-side switch SHb, low side switch SLb and a switch arrangement 503 such as illustrated in figure 5 arranged to provide an intermediate switch SM to an intermediate voltage VM. Again, it will be understood that each of the parallel switches shown for the intermediate switch SM may comprise a back-to-back series pair of transistors, such as FETs. The second IC 702 also comprises a switch controller 105 for controlling operation of the switches of the T-bridge of the second IC 702 as well as the switches of the first IC 701.In use, in continuous operation in the first mode of operation, the switch controller 105 can control switching of the switches SHa and SHb of the first IC (on both side of the load) with an appropriate duty-cycle to generate the desired drive voltage across the load. To provide operation in the first mode of operation, but with an increased output resistance so as to provide damping on a change to the first mode of operation, the switches SHb and SLb of the second IC 702 may be used instead of the corresponding switches of the first IC 701. The switches SHb and SLb of the first IB may be configured to provide a suitable on-resistance to provide damping. To provide operation in the second mode of operation, in this example the switch arrangement 503 of the second IC can be operated as the switch SM to the intermediate voltage VM, with the switch arrangement 503 being operated in the high-resistance on-state during a damping period following change to the second mode of operation and being operated in the low-resistance on-state thereafter for continued operation in the second mode.

[0109] The example of figure 7 thus allows for a conventional commercially available output bridge circuit to be used as the first IC 701, with the second IC providing the functionality of swapping between different modes of operation with a damping period.

[0110] Gradual movement of the common-mode voltage

[0111] Another way of reducing the problem of ringing in the common-mode response on a change of mode, which may be applied in addition to or instead of applying increased damping, is to vary the common-mode (or zero-sequence voltage) in a more gradual fashion, e.g. to ramp the common-mode value over time.

[0112] The ringing response illustrated in figure 3 is in response to a relatively large step change in the common-mode voltage Vcmout applied to the output nodes 102-1 and 102-2, such as illustrated in figure 2a. One way to reduce the ringing would be to vary this commonmode voltage Vcmout in a more gradual manner, i.e. in a relatively continuous manner over a period of time or via a series of smaller jumps in the common-mode voltage Vcmout. The general approach may be to control the common-mode voltage so as to reduce or remove any high-frequency component in the common-mode voltage.The discussion in relation to figure 2a assumes that, in continuous operation in the first and second modes of operation (where the first, high-level, mode is the RZ variant), the quiescent signal level corresponds to a duty-cycle of 50% on each side of the load (i.e. the proportion of the switching cycle spent at high-side voltage VH or intermediate voltage as appropriate, with the rest of the switch cycle being spent at the low-side voltage VL) and that any variation in signal level results in equal and opposite changes in duty-cycle on each side of the load. This means that the quiescent signal level corresponds to each of the first and second output nodes 102-1 and 102-2 being driven to a voltage equal to VH / 2 or VM / 2 depending on the mode, and the differential signal is generated by varying the voltage at each of the first and second output nodes 102-2 and 102-2 by an equal and opposite amount. Put another way, the voltages at the first and second output nodes are respectively controlled to be, on average over the course of the switching cycle, equal to Vcmout+Vdrv / 2 and Vcmout-Vdrv / 2 respectively, where Vcmout is the common-mode voltage and Vdrv is the desired differential output voltage.

[0113] This operation is beneficial in that the common-mode voltage Vcmout applied to the output nodes 102-1 and 102-2 does not vary on a cycle- by- cycle basis in a given mode of operation, i.e. the steady-state value of common-mode voltage in continuous operation in that mode is constant. The common-mode voltage Vcmout is generally controlled in the first mode to be half-way between the relevant switching voltages used in that mode, i.e. halfway between VH and VL, so that the full output range of differential output signal can be generated.

[0114] However, at the time that the amplitude of the input signal is low enough that the mode of operation can be changed from the first, high-level, mode to the second, low-level, mode, the full output range in the first mode of operation is not required. In this case, it would be possible to operate in the first mode with a value for the common-mode voltage Vcmout which is different to VH / 2 and still be able to generate the full signal excursion.

[0115] Consider the example discussed above where VH is 48V, VM is 16V and VL is ground. In continuous operation in the (first variant of the) first mode, the common-mode voltage Vcmout may be set as 24V so as to allow a differential drive signal Vdrv to be generated in the range of +48V to -48V. In continuous operation in the second mode the commonmode voltage Vcmout may be set as 8V. If the mode of operation were changed fromthe first mode of operation with a steady-state common-mode voltage of 24V to the second mode of operation with a steady-state common-mode mode voltage of 8V, this sudden jump in common-mode voltage could result in ringing, as discussed with reference to figure 3.

[0116] However, given the amplitude of the differential drive signal Vdrv would be lower than 16V in order for the change to the second mode of operation to occur, and this amplitude range can be achieved by operating in the second mode of operation with a commonmode voltage of 8V, it is noted that a differential drive signal Vdrv of this amplitude could also be achieved by operating in the (first variant of the) first mode with a common-mode voltage Vcmout of 8V, i.e. the same common-mode voltage as used in the second mode.

[0117] In this case, rather than swap directly from operation in the first mode of operation with a steady-state common-mode voltage of 24V (i.e. VH / 2) to operation in the second mode of operation with a i.e. the steady-state value of common-mode voltage in continuous operation in that mode is constant common-mode voltage of 8V (i.e. VM / 2), the change in mode may involve a transitional period which involves operating in the first mode with a gradual reduction, over time, in the common-mode voltage Vcmout from, in this example, 24V to 8V, and only then changing to operate in the second mode. The rate of change of the common-mode voltage during the transitional period may be selected with respect to the time constant of the common mode circuit so as to excite no, or only a limited amount of, ringing. In this example, there would thus be no substantial change in common-mode voltage on the change in mode at the end of the transitional period and thus the change in mode would be excite no significant ringing. Note damping, such as described above could be applied to supress any ringing that does occur but moving the common-mode voltage during a transition period in this way may reduce the amount of damping required. An increased output resistance may also be applied during the transitional period to reduce power consumption.

[0118] Figure 8 illustrates a plot of the common-mode voltage Vcmfil of the capacitor voltages for an example where a switching driver 100 for driving a BTL load with output filters such as illustrated in figure 1a was operated in the first mode switching between a high-side voltage VH and a low-side voltage VL, which is this plot are normalised to voltage values of 1 and 0 respectively. Initially the switching driver is operating in the first modewith a common-mode voltage Vcmout equal to 0.5, i.e. is modulating each of the output nodes 102-1 and 102-2 between VH and VL such that the quiescent signal level corresponds to a duty-cycle of 50% for each output node. During a transitional period, centred around 0.01s in this example, the switching driver 100 continued to operate in the first mode but the common-mode voltage Vcmout applied to the output nodes 102-1 and 102-2 was gradually changed over a period of time, in this example to a commonmode voltage Vcmout of about 0.25. Essentially this can be seen as applying an equal, signal independent, offset to the duty-cycle for each of the output nodes 102-1 and 102-1 so as to maintain the correct average differential drive voltage Vdr over the course of the switching cycle but to vary the common-mode voltage Vcmout, with the offset being gradually increased over time. Figure 8 shows that the common-voltage Vcmfil of the capacitors Cfil of the filter arrangement changes over time during this transitional period but there is no significant ringing, due to the gradual change in the common-mode voltage Vcmout.

[0119] For a change in mode from the second, low-level, mode to the first, high-level mode, a similar process could be followed but in reverse. That is, the switching driver 100 may be operated in the second mode and may be operated with a common-mode voltage Vcmout equal to VM / 2. When a change in mode to the first mode is required, the switching driver may change to operating in the (first variant of the) first mode and may operate in a transitional period immediately following the change in mode. At the start of the transitional period the switching driver 100 may be operated in the first mode, but with substantially the same value for the common-mode voltage Vcmout as was used in the second mode. During the transitional period, following the change of mode, the common-mode voltage Vcmout may be gradually increased to the desired value for continuous operation in the first mode, e.g. to VH / 2 (where VL is ground).

[0120] For example, for the examples discussed above, where VH is 48V, VM is 16V and VL is ground, the steady-state common-mode voltage which is used in the second mode of operation may be VM / 2 = 8V. At the time of the change to operation in the first mode, the switching driver may thus operate in the first mode with a common-mode voltage of 8V so there is no substantial change in the common-mode voltage Vcmout. During a transitional period, the switching driver may be operated in the first mode, but the common-mode voltage Vcmout may be gradually increased to a common-voltage of 24V.At the end of the transitional period the switching driver may continue to operate in the first mode with a steady-state common-mode voltage Vcmout, which allows for the full desired output range of differential drive signal Vdrv to be generated.

[0121] This transition from the second mode to the first mode, with a transitional period of operation in the first mode to move the common-mode voltage Vcmout to the desired level, e.g. VH / 2, to be able to generate the desired full range of differential drive signal Vdrv does require sufficient time to complete the transition without clipping of the output signal. This either requires any changes in output signal amplitude to be gradual enough that the transition can occur as the output signal increases in magnitude without clipping, or requires some look-ahead or notice of an increase in the required signal amplitude which is sufficient to allow the mode to the be changed and the transitional period to be completed before the increase in signal needs to be output by the switching driver 100. The duration of the transitional period, and thus the rate at which the common-mode voltage Vcmout is changed during the transitional period and / or the amount of change in common-mode voltage which is achievable in the transitional period, may thus depend on the amount of look ahead which is available and the maximum expected rate of change of the required output signal.

[0122] There are various ways in which some look-ahead may be implemented. For instance, in many switching driver designs there may be some inherent processing delay in a signal path of the driver that can be used to provide some look ahead.

[0123] Figure 9a illustrates one example of selected components of one example of a switching controller 105 that could be implemented to control switching of a switching driver 100 for an audio application such as illustrated in figure 1a and illustrates how some look ahead could be implemented in such an application.

[0124] Figure 9a illustrates that the switching controller 105 may comprise a digital signal processor (DSP) 901 configured to receive the input signal Sin and apply some signal conditioning, for example to implement some protection and / or control functionality. The output of the DSP 902 may be interpolated by an interpolator 902 to increase the sample rate and some digital gain may be applied by a gain element 903. The resulting signal may be supplied to a modulator 904, which may, for example, comprise at least onePWM modulator configured to generate suitable switching control signals Scon for controlling the duty-cycles of the relevant switches of the T-bridges to generate the desired differential drive signal in the desired mode. The interpolation by the interpolator 902 may result in some propagation delay in this signal path. Figure 9 thus illustrates that a signal could be tapped from the signal path upstream of the interpolation and used to provide some look-ahead for any required modes changes. The example of figure 9 illustrates that an envelope detector 905 may be arranged to receive the signal which is output from the DSP 901 and determine an envelope value for this signal, which may be supplied to a mode controller 906 which determines when a change in mode is required, and which may control the modulator 904 accordingly, although other arrangements such as peak detector or absolute value unit could be used in other examples. The mode controller 906 may also take account of any gain applied downstream of the interpolator 902.

[0125] Figure 9a illustrates that the envelope detector 905 receives the signal output from the DSP 901, but in some cases the input signal to the DSP 901 could be used instead, which may provide further look-ahead, in which case the envelope detector 905 or mode controller 906 may also receive an indication of any gain applied by the DSP 901.

[0126] The amount of look-ahead may determine the possible duration of the transitional period, at least on a transition from the second, low-level, mode to the first, high-level mode. Ideally the amount of look-ahead may be sufficient to provide a duration for the transitional period that allows the common-mode voltage Vcmout to be moved by the desired amount (e.g. between VH / 2 and VM / 2 or vice versa) at a rate which is below the time constant of the common-mode circuit, and thus which excites no substantial ringing. However, this may not be the case for some implementations and in some applications the amount of look-ahead may not provide sufficient time to move the common-mode voltage by the whole desired amount with a sufficiently low rate of change. In some applications, the amount of look ahead could be increased by deliberately including some additional delay in the processing path, but in at least some applications this may be undesirable for latency reasons. In this case, moving the common-mode voltage as slowly as possible given the amount of look-ahead may still reduce the amount of ringing and / or moving the common-mode voltage over as much of the desired range as possibleto minimise the amount of step-change in the common-mode voltage at the point of the change in mode may also reduce the amount of ringing.

[0127] Figure 10 illustrates waveforms of the common-mode voltage Vcmfil of the capacitor voltages for a switching driver 100 such as illustrated in figure 1 following a change in mode with and without a transitional period in which the common-mode voltage Vcmout is varied. The parameters of operation were the same as discussed for figure 3, and the waveforms illustrate the common-mode voltage Vcmfil following a change in mode from the second mode to the first mode. The top plot shows the common-mode voltage Vcmfil of the capacitor voltages without any transitional period being applied and the commonmode voltage Vcmout thus changing from 8V to 24V in a step change. Again, significant ringing as discussed with reference to figure 3 can be seen. The middle plot illustrates the common-mode voltage Vcmfil of the capacitor voltages where a transitional period of 20ps was applied following the change to the first mode and where the common-mode voltage Vcmout is increased from 8V to 24V over that transitional period. It can be seen that this still excites some ringing, but the amount of ringing is significantly reduced compared to the case with no transitional period. The lower plot illustrates the commonmode voltage Vcmfil of the capacitor voltages where the duration of the transitional period was instead 60ps. It can be seen that ringing of the common-mode voltage Vcmfil is further reduced.

[0128] Whilst, in some applications, the duration of the transitional period may be defined by the amount of look-ahead which is available, in some applications a longer transitional period may be implemented by limiting the amount of any change in signal amplitude which is allowed before the transitional period ends.

[0129] For example, consider that a look-ahead of 20ps is available, but is desired to allow for a transitional period with a duration of 40ps on a change in mode from the second, low-level, mode to the first, high-level, mode. In this case, the switching driver 100 may be configured to switch from the second mode to the first mode as soon as it is detected that a change in mode is required. The change in mode may occur with no substantial change in common-mode voltage Vcmout as discussed above and the common-mode voltage Vcmout may then be increased during a transitional period. In this case the duration of the transitional period may be set to be 40ps. As the amount of look-aheadwas only 20|JS, the change in signal amplitude that triggered the change in mode would ordinarily occur halfway through the transitional period. However, the switching driver may be configured to limit the amplitude of the differential drive signal until the end of the transitional period. Such limiting could be applied, for instance, by applying compression to the input signal Sin to limit the maximum amplitude when operating in the second mode, and only removing the compression at an appropriate time to correspond with the end of the transitional period. For a change in user or system-controlled gain, e.g. a change in volume that results in the need for a change in mode, the change in gain could be delayed until the end of the transitional period (or until the common-mode Vcmout has reached a level where the required signal amplitude can be generated). Referring back to figure 9a, the mode controller 906 may therefore be configured to control some compression applied in the signal path, e.g. by DSP 901 and / or some gain applied, e.g. the gain applied by gain element 903.

[0130] Note that the discussion above has assumed that in the transitional period prior to a change in mode from the first mode to the second mode the common-mode voltage Vcmout is ramped from a first steady-state value, equal to that used in continuous operation in the first mode, say 24V to a second steady-state value which is equal to that used in continuous operation in the first mode, say 8V. This may be the preferred operation as it avoids any significant jump in common-mode voltage at the time of the change in mode, however in some cases it may be sufficient to ramp from the commonmode voltage Vcmout from the first steady-state value to a value which is closer to the second steady-state value (but need not be equal to the second steady-state value). Likewise, for a transitional period following a change in mode from the second to the first mode, the starting value of the common-mode voltage may not be exactly equal to the second steady-state value, and instead there could be some jump in common-mode at the time of the change in mode to an intermediate value, with ramping up to the first steady-state value over the transitional period.

[0131] For applications such as motor control, the processing path will generally be a bit different and typically wouldn’t include any interpolation or the like. In motor control applications, however, the nature of the motor means that there generally isn’t an instantaneous response to any demand for an increase in speed and the motor control loop will inherently take some time to respond. This will provide some time in which agradual transition could be implemented. Figure 9b illustrates one example of selected components of one example of a switching controller 105 that could be implemented to control switching of a switching driver 100 for a motor drive application such as illustrated in figure 1b, in which similar components as discussed with reference to figure 9a are identified by the same reference numerals.

[0132] In this case the input signal Sin for the switching controller 105 may, as discussed above, be an indication of voltage demand, e.g. an indication of a voltage vector VaB as determined by some upstream processing module. The voltage vector Vali may be supplied to the mode controller 906 which determines the required mode and controls the modulator 904 accordingly. As noted above, there may be some inherent lag in the control loop for the motor to respond to any change in demand and thus there may be time to implement a gradual transition in mode when required. In some applications, some degree of look-ahead could be provided by using a predictor 907 to make a prediction of what the required voltage demand, e.g. what the magnitude of the Vali vector may be. The predictor 907 may receive the input voltage demand and / or an indication of the upstream demand signal Sdem to make a prediction of when the voltage demand may increase sufficient to require the high-level mode of operation and to start a transition with a gradual change in the common-mode / zero-sequence voltage. Again, if needed some compression could be applied by controlling some applied gain 903 to limit the voltage demand until the transition is complete, if necessary.

[0133] As noted above, for motor control, the amount of resonance expected may vary depending on one or more operating parameters. An acceptable rate of change in common-mode / zero-sequence voltage during the transition may thus vary in use. Thus, at least one of the mode controller 906 and modulator 904 may receive an indication of one or more relevant parameters, e.g. temperature, motor speed, load, modulation index etc. and control the transition accordingly. It will be understood that the switching could also apply a desired amount of damping by varying the output impedance as discussed above.

[0134] In general, therefore, the switching driver may be controlled such that, for a change in mode of operation from a present mode to a new mode, in which a desired steady-state common-mode voltage for continuous operation in the present mode has a first valuewhich is different to a second value of the desired steady-state common-mode voltage for continuous operation in the new mode, the driver is controlled such that commonmode voltage is controllably moved overtime so that any step-change in common-mode at the point of the change in mode is less than the difference between the first and second values, and preferably as close to zero, or some acceptable change in common-mode voltage, as possible. This may involve moving the common-mode voltage in the present mode from the first value towards the second value and / or transitioning to the new mode with common-mode voltage closer to the first value. The common-mode voltage should preferably be moved at a rate that does not result in significant ringing, but which allows the required differential output signal to be generated without clipping in the relevant mode. However, in the event that the value of the common-mode voltage is not sufficient to allow the required differential output signal to be generated without clipping, compression may be applied to the input signal until such time as the common-mode voltage has varied enough.

[0135] Setting the common-mode voltage in continuous operation

[0136] The discussion above refers to the common-mode voltage Vcmout in continuous operation in the first mode being equal to (VH - VL) / 2 and the common-mode voltage Vcmout in continuous operation in the first mode being equal to (VM - VL) / 2. As discussed, setting the common-mode voltage Vcmout used in a given mode of operation as being midway between the two switching voltages used in the mode can be beneficial in terms of allowing the full range for differential drive signal when operating in a given mode.

[0137] However, in some applications it may not be necessary to implement the full output range in a given mode of operation. In which case it may, in some cases, be advantageous to set the common-mode voltage Vcmout which is used in continuous operation in that mode to some other value.

[0138] For example, for the examples discussed above, where VH is 48V, VM is 16V and VL is ground, the second mode may, as discussed, be used for generating a differential drive signal Vdrv with an amplitude up to 16V, and in this case the common-mode voltage Vcmout which is used in continuous operation in the second mode may be set to be 8V.However, if the second mode of operation were instead only used to generate a differential drive signal with an amplitude up to 8V, say, then the common-mode voltage Vcmout used in continuous operation in the second mode could actually be set anywhere in the range of 4V to 12V. In some applications, there may be advantages in setting the common-mode voltage which is used in continuous operation in the second mode to the value other than 8V, i.e. other than (VM - VL) / 2.

[0139] For instance, setting the common-mode voltage Vcmout which is used in continuous operation in the second mode to a relatively high value may minimise the difference between the common-mode voltage used in continuous operation in the first and second modes respectively. For the examples discussed above, if the common-mode voltage Vcmout used in continuous operation in the first mode is 24V and the common-mode voltage Vcmout used in continuous operation in the first mode is 12V, this can reduce the change in common-mode voltage that occurs on a change in mode. This may reduce the amount of ringing if the mode is changed without a transitional period, and hence may reduce the amount of damping required and / or may reduce the amount by which the common-mode voltage Vcmout needs to be changed during a transitional period, which may allow for a slower rate of change for a given duration of transitional period.

[0140] Thus setting the common-mode voltage Vcmout which is used in continuous operation in the second mode to be greater than (VM - VL) / 2, and ideally to be as high as possible may reduce the change in common-mode required on a change in mode which may reduce the amount of ringing even in the absence of any mitigation for the ringing, and may result in any mitigation applied, such as damping and / or use of a transitional period, having better performance.

[0141] The same principles would also apply to the common-mode voltage Vcmout which is used in continuous operation in the first mode. For instance, if the desired output range for the differential drive signal Vdrv was lower than +(VH-VL) to -(VH-VL) then it is the case that the common-mode voltage Vcmout used in continuous operation in the first mode could be lower than (VH-VL) / 2 and using a lower common-voltage for continuous operation in the first mode could additionally or alternatively reduce the change in common-mode voltage required on a change in mode.When the low-side voltage is ground there can additionally or alternatively be an advantage in terms of power supply noise in using a common-mode voltage than is lower than VH / 2 or VM / 2 depending on the mode of operation. The closer the common-mode voltage Vcmout is to ground, the greater the proportion of time that each output node spends connected to ground during the switching cycle, and the ground supply may suffer from less power supply noise.

[0142] For motor control applications, the common-mode / zero-sequence voltage may be set as a function of at least one of torque and speed of the motor.

[0143] Setting the common-mode voltage Vcmout which is used in continuous operation in a given mode of operation to a value which not halfway between the relevant switching voltages in that mode of operation represents one aspect of the present invention in particular for a switching driver with a T-bridge on either side of the load, i.e. a switching driver where each of first and second output nodes may be selectively connected to any of three different switching voltages, a high-side voltage, a low-side voltage and an intermediate voltage.

[0144] Additional modes and / or voltage levels

[0145] The discussion above has focussed on the switching driver 100 being operable in two different modes, a first mode, in which (in a first variant) the output nodes 102-1 and 102-2 (and 103-3 if present) are each modulated between the high-side voltage VH and the low-side voltage VL, and a second mode, in which the first and second output nodes 102-1 and 102-2 are each modulated between the intermediate voltage VM and the low-side voltage VL. It will be understood that there is a possible third mode of operation which could be used, in which each of the first and second output nodes 102-1 and 102-2 is modulated between the high-side voltage VH and the intermediate voltage VM. This third mode of operation could generate a differential signal with a magnitude of up to | (VH - VM)| . This third mode of operation could, in some embodiments, be used in addition to or instead of the second mode of operation to provide an alternative or addition lower-level mode, particular if the intermediate voltage VM was not halfway between the high-side and low-side voltages VH and VL. For instance, for the example voltage values discussed previously, where VH = 48V, VL is ground and VM is 16V,operating in the third mode could allow a differential signal to be generated in the range of +32V to -32V. The third mode could, therefore, be used as an intermediate-level mode in addition to the first and second modes.

[0146] It will be understood that it the third mode were used, and it was desired to allow a full range of differential signals to be produced in the range of 32V to -32V, the commonmode voltage Vcmout in continuous operation in the third mode may be set to be equal to 32V, i.e. to a value which is (VH - VM) / 2 above VM. This is different to (and higher than) the common-mode voltage Vcmout used in continuous operation in either of the first and second modes and thus transitioning between continuous operation in the third mode to continuous operation in one of the first or second modes would also involve a change in the common-mode voltage Vcmout.

[0147] One or more of the techniques described above could be used to minimise any ringing as a result of the change in common-mode voltage on such a change in mode, e.g. some additional resistance could be applied to provide some damping, the common-mode voltages used in operation in the different modes may be set to be as close to one another as possible (if a full scale output in one or more of the modes is not required) and / or the common-mode voltage may be moved, during a transitional period before and / or after the change in mode, to reduce the amount of any step-change in commonmode at the point of the change in mode. However, in the case of moving the commonmode voltage in a transitional period, it will be understood that it would not be possible to swap directly from the third mode of operation to the second mode of operation in the presence of some differential signal content without some step-change in the commonmode voltage Vcmout. The lowest value of common-mode voltage Vcmout that could be achieved when operating in the third mode would be equal to VM, but this would correspond to each of the first and second output nodes 102-1 and 102-2 being switched to VM for the whole of the switching cycle, which doesn’t allow for any differential signal content. Likewise, the highest value of common-mode voltage Vcmout that could be achieved when operating in the second mode would be VM, which again would correspond to each of the first and second output node 102-1 and 102-2 being switched to VM for the whole of the switching cycle, which again wouldn’t allow for any differential signal content.In some embodiments, therefore, it may be preferable to swap between the third mode and second mode via a transitional period of operation in the first mode. For example, if the switching driver 100 were operating in the third mode, with a common-mode voltage Vcmout value suitable for continuous operation in the third mode, say equal to VM + (VH - VM) / 2, and the amplitude of the input signal reduced to a level suitable for use in the second mode, the switching driver may initially swap from the third mode to the first mode, with the initial common-mode voltage value being controlled to provide no substantial step-change. The switching driver may then operate in the first mode for a transitional period in which the common-mode voltage Vcmout is changed to a level that corresponds to the desired common-mode voltage value for operation in the second mode, at which point the switching driver may swap to operating in the second mode. For the reverse transition, from the second mode to the third mode, there may likewise be a transitional period of operation in the first mode in which the common-mode value is changed from a value suitable use in the second mode to a value suitable for use in the third mode, before swapping to the third mode.

[0148] It should also be understood that a multi-level switching driver which is operable with more than three different switching voltages may also be operable in two or more different modes which may require different values of common-mode voltage (in continuous use in the relevant modes) and the principles of the present disclosure may be applied to mitigate the effect of any ringing that would be caused by a step-change in common-mode on a change in mode for drivers that are operable with more than three switching voltages.

[0149] For example, figure 11 illustrates one example of a switching driver 1100 (where similar components as discussed with reference to figure 1a are identified by the same reference numerals) for driving a load in a BTL configuration where each the first and second output nodes 102-1 and 102-2 may be selectively connected to any of four different switching voltages, a high-side voltage VH via switch SH, a low-side voltage VL via switch SL or any of two different intermediate voltages VM1 and VM2, which are different to one another and are at voltage levels between VH and VL, via respective switches SM1 and SM2. It will be understood, however, that figure 11 illustrates just one possible switch arrangement for the switching driver 1100, and other arrangements may be implemented. In general, there is a respective switching path, which may compriseone or more switches, for connecting the output node 102-1 and 102-2 to each switching voltage, and at least some parts of the switching paths for different switching voltages could be shared.

[0150] It will be noted that figure 11 also illustrates each of the switches as a single switch element for clarity, but it will be understood that one or more of these switches could be implemented by switch arrangements such as described with reference to figures 5a and 5b, and / or there could be parallel switching paths, e.g. to provide different resistances. Likewise, for the switches to the intermediate voltages VM1 and VM2 may be implemented by a back-to-back pair of transistors, such as FETs.

[0151] The switching driver 1100 may be operated such each of the first and second output nodes may be selectively modulated between any selected pair of these four different switching voltages. If the same pair of switching voltages are used for modulating both the first and second output nodes 102-1 and 102-1 in a given mode of operation, this means that there are six different possible modes of operation, i.e. where the pairs of voltages used as the switching voltages are: VH&VM1; VH&VM2, VH&VL; VM1&VM2; VM1&VL; and VM2&VL.

[0152] As an example, consider that VH = 48V, VM1 = 16V, VM2 = 12V and VL = 0V (ground). Table 1 below sets out the six different possible modes of operation that could possibly be used, based on the high and low switching voltage of each pair of switching voltages, and also illustrates the maximum magnitude of differential output voltage that could be generated by operating in the relevant mode. The table also illustrated the value of the common-mode voltage Vcmout that would be used to enable the full output range in that Mode.

[0153]

[0154] Table 1

[0155] It can be seen that the common-mode value Vcmout is different in each of the modes of operation. In use, the switching driver 1100 may be controlled to swap between at least some of these modes of operation based on the amplitude of the input signal in a similar manner as discussed above. Again, any one or more of the techniques described above could be used to minimise any ringing as a result of the change in common-mode voltage on such a change in mode.

[0156] It will also be understood that the extent to which the common-mode voltage Vcmout can be moved during a transitional period is limited by what the high and low switching voltages are, and the need to allow sufficient headroom above or below the commonmode voltage to reproduce the differential signal content without clipping. As discussed above in relation to the third possible mode of the switching driver 100 of figure 1, in some cases if the common-mode is to be moved in a transitional period, to reduce the amount of any step-change in common-mode voltage on a change of mode, in some cases it may be beneficial to swap from a present mode of operation to a new mode of operation via a differential transitional mode of operation, where the mode used in the transitional period has a sufficient range to be able to move the common-mode voltage without clipping.

[0157] For instance, in a transition (in either direction) between Mode 6 and Mode 5 as listed in table 1, it may not be practical to move the common-mode voltage in either of these modes to a value that could result in no step-change on a direct transfer between thesemodes, as this would require the common-mode voltage value to be 12V in both modes, which not allow for any differential signal content. However, the switching driver could, for example, operate in Mode 4 (or Mode 1 if necessary) for a transitional period to move the common-mode voltage value from 14V to 6V or vice-versa. Likewise, a transition (in either direction) between Mode 4 and Mode 3 may involve a transitional period of operation in Mode 1. However, some transitions between modes may not require use of a transitional mode and instead a transitional period of operation in the present mode or the new mode may allow for the common-mode voltage to be moved appropriately, for instance a transition between Mode 2 and Mode 3, or any transition to or from Mode 1. For a transition between any two selected modes (which need not be adjacent modes in table 1), it can be whether operation in a transitional mode would be beneficial or not.

[0158] Figure 11 illustrates an example of a switching driver 110 for driving a load in a BTL configuration, such as may be used in audio application, but it will be understood that the same principles could be applied to a motor driver such as illustrated in figure 1b.

[0159] Embodiments thus apply generally to BTL multilevel switching drivers operable in different modes with different switching voltages, in which a transition from continuous operation in one mode to a continuous operation in a different mode may result in a change in value of the common-mode of the output voltage.

[0160] Modulator design

[0161] Controllably varying the common-mode voltage Vcmout used in a given mode of operation, either on a temporary basis during a transitional period or to control the common-mode voltage value used in continuous operation, does mean that the conventional AD modulation control described with reference to figure 2a, i.e. where the output nodes 102-1 and 102-2 are modulated in antiphase with one another, may no longer be appropriate for the switching driver. In particular, for conventional AD modulation, as the modulation of the output nodes 102-1 and 102-2 is in antiphase, a single modulator may be used for generating suitable PWM control signals for controlling the modulation on both sides of the load, with the switching control signals used for controlling switching on one side of the load being inverted to control the switching on the other side of the load. However, where the common-mode voltage is controlled asdescribed above, the switching of the two output nodes 102-1 and 102-1 are no longer in antiphase and separate modulator control signals may be beneficial for controlling modulation on each side of the load.

[0162] Figure 12 illustrates one example of a possible modulator arrangement that could be used to drive switching on either side of the load for a switching driver for driving a BTL load such as illustrated in figure 1a or figure 11. Figure 12 illustrates that the input signal Sin may be input to a converter 1201 which converts the input signal Sin into two signal components S1 and S2, where S1 has a value that corresponds to Vcmout + Vdrv / 2 and S2 has a value that corresponds to Vcmout -Vdrv / 2, where Vdrv is the desired differential drive signal value based on the input signal Sin. The signal components S1 and S2 are each provided to respective PWM modulators 1202-1 and 1202-2 for generating the switch control signals for controlling the relevant switches of the output stage 103 connected to the relevant output node 102-1 or 102-2.

[0163] Optionally, the signals S1 and S2 may be interpolated by respective interpolators 1203-1 and 1203-2 and a delay 1204 applied to one of the signals, so as to provide a half cycle delay between the two signals. This may be advantageous in providing balancing of the PWM control signals.

[0164] The converter 1201 illustrated in figure 12 may thus control the value of the commonmode voltage Vcmout used in the different modes of operation and / or any variation of the common-mode voltage Vcmout applied during a transitional period. The converter 1201 may thus provide at least some of the functionality of the mode controller 905 discussed with reference to figure 9a, and / or may be responsive to such a mode controller.

[0165] The modulator arrangement discussed with reference to figure 12 could also be applied for motor control applications, but with three signals for the different phases. The signals for each phase would have a value to Vcmout + Vph where Vcmout is the common-mode or zero-sequence voltage component and Vph is the voltage difference from this zerosequence voltage for the phase output.Figure 13 illustrates an alternative modulator arrangement that may implemented to control the output stage 103 of the switching driver 100 illustrated in figure 1a or 1100 illustrated in figure 11. In the example of figure 13 a converter 1301 again receives the input signal Sin and divides it into two signal components, but in this example the two signal components are a differential component Sdiff and a common-mode component Scm. A feedback signal indicative of the differential output is subtracted from this differential signal component Vdiff to provide an error signal indicative of any error in the differential output signal. In the example of figure 12, this feedback signal is derived from the differential voltage between the output nodes 102-1 and 102-2, but other feedback arrangements could be used. The differential error signal is filter by a loop filter 1302-1.

[0166] Similarly, a feedback signal of the sum of the output voltages, in this example derived from the output nodes 102-1 and 102-2, is subtracted from this common-mode signal component Vcm to provide an error signal indicative of any error between the desired and actual common-mode output signal, which is filtered by a loop filter 1302-2. The differential error signal is subtracted from the common-mode signal in one signal path, whilst the common mode signal is separately added to the differential signal in the other signal path to provide first and second signal components S1 and S2 related to Vcmout + Vdrd / 2 and Vcmout - Vdrv / 2, which are then quantized by respective quantizers 1303-1 and 1303 to drive the respective T-bridges of the output stage 103 on each side of the load.

[0167] In the arrangement of figure 13, the control loop for the differential signal component is thus separate to the control loop for the common-mode signal component. The control loop for the differential signal components, which is the signal content of interest, may be implemented as a relatively high-performance loop, e.g. a loop with a relatively high SNR (signal-to-noise ratio) and / or a relatively low level of distortion, e.g. a relatively low THD (total harmonic distortion). However, the common-mode control loop may be implemented as a relatively lower performance control loop, e.g. with a lower SNR and / or THD. Implementing the common-mode control loop as a lower-performance control loop can allow for savings in circuit area, cost and / or power consumption in use compared to an arrangement such as illustrated in figure 12 which may require both the PWM modulators 1203 to be implemented as part of a high-quality control loop to provide a desired performance, as in the example of figure 2 there is signal content of interest ineach of the separate signal components S1 and S2. Preferably, the common-mode control loop and control loop for the differential signal components will be configured to have substantially the same latency and will preferably be switched at the same switching frequency as one another.

[0168] Correcting for mismatch

[0169] As noted above, one problem that can arise with a change in common-mode voltage Vcmout is common-mode to differential conversion in the output path. For instance, for audio applications such mismatched may arise due to the output filter arrangement 104. Ensuring the components, such as the capacitors and / or inductors, used for the filter arrangements 104 are accurately matched to one may require the use of relatively expensive components. In practical implementations it may therefore be expected that there is some mismatch between the filter arrangements on either side of the load, e.g. the capacitance values and / or inductance values may differ between the filter arrangements on each side of the load. Thus, referring back to figure 1a, the filter arrangement 104 connected between the first output node 102-1 and the load may have a first transfer characteristic T1 and the filter arrangement 104 connected between the second output node 102-2 and the load may have a second transfer characteristic T2, where the first transfer characteristic T1 is different to the second transfer characteristic T2.

[0170] Figure 14 illustrates this issues. The top plot of figure 14 illustrates an example of a switching driver 100 such as illustrated in figure 1 a and illustrates one example of transfer characteristics T 1 and T2 for the filter arrangements 104 on each side of the load which differ from one another. The lower plot illustrates the resultant common-mode to differential transfer function.

[0171] For conventional AD modulation with a substantial fixed common-mode voltage Vcmout, this difference in transfer function would not be a significant issue for the common-mode voltage component and may lead to some offset that could be readily compensated for. However, if the common-mode voltage is varied in use, for instance by swapping between the first and second modes of operation or, in particular, by varying thecommon-mode voltage Vcmout over a period of time in a transitional mode, this could result in common-mode to differential conversion which could degrade performance.

[0172] Similar issues can arise for motor drive applications, differences in the windings for each phase, or differences in EMI components and / or the cabling connecting to the motor can similarly lead to mismatch in the path for each phase which can lead to some common-mode / zero-sequence voltage appearing as some unwanted differential component for the relevant phase.

[0173] In some embodiments therefore some compensation for the common-mode to differential conversion may be applied.

[0174] To determine the compensation to be applied, the transfer function of each output path may be determined, e.g. the transfer characteristic of any filter arrangement and / or other components of the relevant output path and any characteristics of the load relevant for just that output path (e.g. specific phase windings). For some implementations, the transfer characteristic for each output path could, for example, be determined during system identification. As will be understood by one skilled in the art, system identification is a process that may be performed to characterize or model a particular system. System identification may be initially performed as part of a testing and evaluation stage of device fabrication and may involve operating at least part of the device under test with defined stimuli and / or system identification can applied within a device in use, for instance as part of calibration process performed on start-up and / or periodically in use. Performing system identification in operation of the device may allow for any changes due to operating conditions such as temperature and any aging of the components to be taken into account.

[0175] Figure 15 illustrates one example how the relevant transfer function of a filter arrangement 104 could be determined during system identification in audio applications. A test signal Sx is input to the filter arrangement 104, e.g. via digital-to-analog converter 1501 and driver 1502. The test signal is also applied to an adaptive filter 1403 with a transfer function T* intended to match the transfer function of the filter arrangement 104 under test. The actual output from the filter arrangement is compared to the output from the adaptive filter 1501 and the filter coefficients are adjusted to try to minimise the error,at least across the signal frequency band of interest. The system adaptation will typically be done via a LMS (least means squares) approach or perhaps a few cycles of RLS (recursive least squares) and hence the output from the filter may be digitised by ADC 1504. This ADC 1503 need only have bandwidth over the audio band and has no latency requirements since the relevant signal will only be used for system identification rather than fed back in a linear sense.

[0176] Once the transfer functions T1* and T2* for each filter arrangement has been determined, suitable compensation can be determined. In some embodiments, the inverse of the relevant transfer function may be determined and used as the compensation for the appropriate output path. In this case the compensation should be the inverse of the determined transfer function for the path to which the compensation is applied, at least over the signal frequency band of interest, the compensation functions do not need to be the inverse of the transfer functions out-of-band.

[0177] In some embodiments for driving a BTL load, the transfer function for the output path on one side of the load is used as the compensation applied to the output path on the other side of the load. Figure 16 illustrates this approach and illustrates that the filter arrangement 104 on a first side of the load has a transfer characteristic T 1 and the filter arrangement 104 on the second side of the load has a transfer characteristic T2. Compensation is applied by applying the determined transfer function T2* to the first side of the load and applying the determined transfer function T1* to the second side of the load. This avoids needing to invert the transfer function and also avoids unbalancing the delay on either side of the load.

[0178] Correction for mismatch could also be applied in other driver arrangements, such as for the motor driver application such as discussed with respect to figure 1b. Again, the transfer function for each output path could be determined and used to determine a suitable compensation. In this case, as discussed above, the properties of the output path, e.g. inductance of the windings, capacitance of the cable etc. may vary with operating parameters of the motor, e.g. with temperature or magnetization state, and the mismatch may also vary depending on such operating parameters. For motor applications the compensation applied may therefore be dynamically varied in use. In some implementations, determining the transfer function may thus comprise determiningthe transfer function and how it varies with the operating parameters. In use, the relevant compensation may thus be varied in use based on an indication of operating parameters, using feedback of measured or monitored parameters, e.g. based on measured phase currents and / or feedforward of the control state of the motor. In some applications, the required compensation could be continually adapted or periodically relearned. The relearning could occur at regular intervals or be triggered by feedback, e.g. of a significant change in temperature, and / or feedforward, e.g. a feedforward indication of a large change in speed / torque demand.

[0179] In any case, the compensation can be applied by any suitable filter arrangement in the respective signal path of the switching driver, for instance an adaptive filter of the like. Applying compensation in this way can substantially avoid any issues of common-mode to differential conversion.

[0180] T-Bridge Switching Control for Power Saving

[0181] Most of the embodiments discussed above have a T-switch arrangement for each output node, with a high-side switch SH for connecting the output node to a high-side voltage, a low-side switch SL for connecting the output node to a low-side voltage and (at least one) intermediate switch for connecting the output node to an intermediate voltage.

[0182] As noted previously, the high-side switch SH and low-side switch SL could be implemented by a single transistor device, such as a FET, although in some cases at least the high-side switch could be implemented as a split switch or with multiple transistors in parallel to provide a variable output impedance as discussed above.

[0183] As also noted previously, the intermediate switch SM will generally be implemented by a back-to-back pair of transistors, such as FETs, with their body-diodes oriented oppositely to one another, so that this switch can block unwanted conduction in the off state when the output node is driven to the high-side voltage VH or to the low-side voltage VL.Figure 17a illustrates one example of how such a T-bridge could be implemented. Figure 17 illustrates that the high-side switch SH comprise a first FET 1701 and the low-side switch comprises a second FET 1702.

[0184] Note that as used herein, the term FET (field effect transistor) shall be taken to include FETs implemented in CMOS, e.g. MOSFETs as may be implemented in a single-element silicon material system as would be understood be understood by one skilled in the art, and shall also include HEMTs (high-electron mobility transistors), e.g. HEMTS such as may typically be implemented in a compound semiconductor material such as GaN (Gallium Nitride), as would also be understood by one skilled in the art.

[0185] The intermediate switch SM is implemented by a back-to-back pair of FETs 1703a and 1703b. Figure 17a illustrates a common-source arrangement for the back-to-back pair of FETs 1703a and 1703b. Such an arrangement may be commonly used as it means a single gate driver can be used to drive the gates of both the FETs 1703a and 1703b to apply the same gate-source voltage and hence drive these FETs on and off together.

[0186] Whilst this arrangement is convenient in that only one gate driver is needed for the intermediate switch SM, it does mean that in the second, low-level, mode, where the output node is modulated between VM and VL, both of these FETs 1703a and 1703b need to be driven on and off in each switch cycle, so there are associated switching losses for two FETs for the intermediate switch.

[0187] In addition, when both of the FETs 1703a and 1703b are off, there is no conduction path to the VM supply as if one of the body diodes is forward biased, the other body diode will be reverse biased. This can lead to additional losses in some cases during a transition in switch state. It will be understood by one skilled in the art that during a switch state transition, e.g. a transition from the state where the low-side switch SL is on and the intermediate switch SM is off to the state where the low-side switch SL is off and the intermediate switch SM is on, generally involves one switch being turned off before the other switch is turned on, with a small dead-time where both switches are effectively off, to avoid current shoot-through. For applications such as described, where there is some significant inductance associated with the output path, the load current may continue to flow throughout the switch transition and thus throughout the dead-time and the loadcurrent could be in either direction. During the dead-time, the load current is thus sourced through the body-diode of one of the switches.

[0188] For the example of figure 17a, no load current can flow via the intermediate switch SM in the off state, as one-body diode will always be reverse biased. Thus, any load current during the dead-time must flow via either the body diode of the low-side switch SL or the high-side switch SH, depending on the current direction. This can lead to the situation where, when the low-side switch SL turns off, the voltage at the output node can go high to a diode voltage above VH during the dead-time to allow the load current to flow. When the intermediate switch SM then turns on, the voltage must be brought back down to the intermediate voltage VM, which involves additional power loss.

[0189] In some embodiments of the disclosure, in the second low-level mode, where the output node is modulated between VM and VL, an appropriate one of the FETs of the intermediate switch may be kept on throughout the whole switching cycle and the other FET is duty-cycled on and off. The FET which is duty cycled is the FET whose body diode will be reversed biased when it is off and the output node is at VL.

[0190] Thus, for the example of figure 17a, FET 1703b may be kept on continually in the second, low-level mode. In this case FET 1703a is duty-cycled, in anti-phase with the low-side switch SL (including appropriate dead-time). In this case, only the FET 1703a of the intermediate switch SM is turned on and off in the switching cycle and FET 1703b is maintained on and thus does not have any cycle- by- cycle switching losses. This thus reduces the switching losses.

[0191] When the FET 1703a is off and the low-side switch SL is on, the body diode of FET 1703a is reverse biased and thus unwanted conduction from VM is prevented. However, during the switch state transition when SL turns off, before SM turns on, in this case conduction via the body diode of FET 1703a can occur when the output node is at a diode voltage above VM. This limits the amount of voltage swing at the output node and thus also saves power.

[0192] Switching the two FETs of the intermediate switch SM independent in this way does require a separate gate driver for each of the FETs 1703a and 1703b, but, in someimplementations, the power saving may outweigh the additional cost and area of an extra gate driver.

[0193] Figure 17a illustrates a common-source arrangement for the FETs 1703a and 1703b. However, when the FETs are switched independently in the manner discussed, it may be preferable to implement a common-drain arrangement as illustrated in Figure 17b.

[0194] As will be understood by one skilled in the art, a gate driver for a FET often makes use of a bootstrap arrangement with a capacitance connected to the source node of the FET. Thus, each of the FETs 1703 and 1703b may have some associated capacitance connected to its source node. In the low-level mode, the FET 1703b is kept continually on and thus this capacitance can be seen as some unwanted capacitive loading. In the common-source configuration this capacitive loading is part of the output voltage path that will be pulled up and down in use and thus this additional capacitive load must also be moved up and down. In the common-drain configuration, the source of FET 1703b is tied to the intermediate voltage and thus the associated capacitance doesn’t load the output voltage path.

[0195] It should be noted that if the output stage were operable in the second variant of the first mode, where the output node is modulated between VH and VM in a switching cycle, a similar approach could be employed but it would be FET 1703b that would duty-cycled and FET 1703a which would be maintained on throughout the switching cycle.

[0196] General embodiments

[0197] Embodiments of the present disclosure thus relate to switching driver operable in different modes wherein at least switching voltage is different in the modes of operation and the common-mode voltage may be different in continuous operation in the different modes. Embodiments relate to methods and apparatus for mitigating from the effects of a change in common-mode voltage on a change in mode.

[0198] Embodiments may be implemented in a host device, especially a portable and / or battery powered host device such as a mobile computing device for example a laptop, notebook or tablet computer, or a mobile communication device such as a mobile telephone, forexample a smartphone. The device could be a wearable device such as a smartwatch. The host device could be a games console, a remote-control device, a home automation controller or a domestic appliance, a toy, a machine such as a robot, an audio player, a video player. It will be understood that embodiments may be implemented as part of a system provided in a home appliance or in a vehicle or interactive display. There is further provided a host device incorporating the above-described embodiments.

[0199] Embodiments have been described in the context of switching driver for driving a load, which may be a load transducer such as an audio output transducer or a motor or some other transducer. Switching drivers of the type described may also be used in power conversion applications, e.g. for converting AC to DC or vice versa and the principles described herein may be applied to power converters and embodiments may include switching power converters.

[0200] It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design many alternative embodiments without departing from the scope of the appended claims. The word “comprising” does not exclude the presence of elements or steps other than those listed in a claim, “a” or “an” does not exclude a plurality, and a single feature or other unit may fulfil the functions of several units recited in the claims. Any reference numerals or labels in the claims shall not be construed so as to limit their scope.

Claims

CLAIMS1. A controller for controlling a switching driver to modulate voltages at at least first and second output nodes so as to drive a load connected to said at least first and second output nodes with a drive signal based on an input signal, wherein: the controller is configured to control the switching driver to operate in at least a first mode of operation in which the at least first and second output nodes of the switching driver are selectively modulated between first and second switching voltages with respective controlled duty-cycles; and the controller is configured to control said duty-cycles so as to controllably vary a common-mode voltage applied to the at least first and second output nodes in operation in the first mode;wherein the controller comprises a first control loop for controlling the commonmode voltage and a second control loop for controlling a differential component of the drive signal.

2. The controller of claim 1 wherein the second control loop is implemented as a higher performance control loop than the first control loop.

3. The controller of claim 1 or claim 2 wherein the second control loop has at least one of: a higher signal-to-noise ratio; and a lower total harmonic distortion than the first control loop.

4. The controller of any of claims 1 to 3 wherein the first control loop is implemented as a lower power control loop than the second control loop.

5. The controller of any of claims 1 to 4 wherein the controller comprising a converter for generating a common-mode signal and a differential signal component based on the input signal and an indication of a desired commonmode value, and outputting the common-mode signal to the second control loop and the differential signal component to the first control loop.

6. The controller of claim 5 wherein the first control loop comprises a first combiner for combining the differential signal component with a first feedback signalindicative of a differential output of the switching driver to generate a first combined signal and a first loop filter for filtering the first combined signal and the second control loop comprises a second combiner for combining the commonmode signal with a feedback signal indicative of a common-mode output of the switching driver to generate a second combined signal and a second loop filter for filtering the first combined signal.

7. The controller of claim 6 wherein the controller is configured to add the first and second combined signals to generate a first drive signal component and for subtracting the first combined signal from the second combined signal to generate a second drive signal component and the controller comprise first and second quantizers configured to receive the first and second drive signal components respectively to generate first and second switch PWM signals for controlling the duty-cycles of the first and second output nodes respectively.

8. The controller of any of claims 1 to 7 wherein the controller is configured to control the switching driver to also selective operate in at least a second mode of operation in which the at least first and second output nodes of the switching amplifier are selectively modulated between two switching voltages with a controlled duty-cycle, wherein at least one of the switching voltages in the second mode is different to the first mode.

9. The controller of claim 8 wherein the two switching voltages in the second mode are said first switching voltage and a third switching voltage, which is an intermediate voltage with a voltage level between the first and second switching voltages.

10. The controller of claim 8 wherein, in the second mode, at least one of the at least first and second output nodes is modulated between the first and second voltages and at least another of the at least first and second output nodes is modulated between the second switching voltage and third switch voltage, wherein the third switch voltage is a voltage which is higher than the first and second voltages.11 The controller of any of claims 8 to 10 wherein the controller is configured to control the switching amplifier to selectively operate in the first mode or the second mode based on the amplitude of the input signal.

12. The controller of claim 11 wherein the controller is configured, prior to a change in mode from the first mode to the second mode or following a change in mode from the second mode to the first mode, control the common-mode voltage applied to the first and second output nodes to ramp from a first value towards a second value or vice versa, wherein the first value is a value for the commonmode voltage applied to the first and second output nodes in steady-state operation in the first mode and the second value is a value for the common-mode voltage applied to the first and second output nodes in steady-state operation in the second mode.

13. The controller of any of claims 1 to 12 wherein the first and second control loops each comprise a respective amplifier.

14. The controller of claim 13 wherein the amplifiers for the first and second control loops are arranged as part of a feedback system.

15. The controller of any of claims 1 to 14 wherein the switching driver is a switching amplifier configured to modulate voltages at said first and second output nodes so as to generate said drive signal as a differential drive signal for driving said load connected between said first and second output nodes.

16. The controller of any of claims 1 to 15 wherein the switching driver is a motor driver and said at least first and second output nodes comprise first, second and third output nodes for outputting said drive signal as a three-phase motor drive signal.

17. The controller of claim 16 wherein the input signal comprises a voltage vector.

18. A switching driver circuit comprising the controller of claim 1 and an output stage.

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