Field-effect transistor

Abstract

Provided is a FET in which FET operation in the THz region can be evaluated. A field-effect transistor according to the present disclosure comprises: a semiconductor film that electrically connects a source and a drain; an insulating film that insulates a gate and the source, the gate and the drain, and the gate and the semiconductor film; a generation photoconductive switch that is electrically connected to the input side of the gate; a first detection photoconductive switch that is electrically connected to the output side of the drain; a detection electrode that detects a pulse incident on the generation photoconductive switch 107; and a second detection photoconductive switch that is electrically connected to the detection electrode.

Description

Field-effect transistor

[0001] This disclosure relates to a field-effect transistor.

[0002] In recent years, there has been a growing demand for increased bandwidth in communication systems and sensor applications. To meet these demands, there is a need for the practical application of field-effect transistors (FETs) that can achieve high-speed operation in the THz range.

[0003] In particular, FETs using two-dimensional materials such as graphene are expected to operate at high speeds in the THz range (see, for example, Non-Patent Document 1). However, FETs capable of high-speed operation in the THz range have not yet been realized. One reason for this is the difficulty in directly measuring FET operation in the THz range.

[0004] To date, a cutoff frequency of 427 GHz has been reported for graphene-based FETs (see, for example, Non-Patent Document 2). However, in such reports, the actually measured cutoff frequency was limited to 30 GHz, and the determination of the 427 GHz cutoff frequency was merely obtained by extrapolating the signal in the GHz region. In other words, the cutoff frequency in the THz region was not directly measured in such reports.

[0005] Furthermore, there have been reports of successful measurement of FET operation up to 152 GHz using an E-O probe (see, for example, Non-Patent Document 3). However, such reports do not involve the application to FETs using two-dimensional materials, and the device structure remains unknown.

[0006] Thus, no direct measurements of FET operation in the THz region have been reported to date. For this reason, a method for evaluating FET operation in the THz region has not been established, and high-speed operation in the THz region for FETs has not yet been achieved.

[0007] S. Singh, K. Thakar, N. Kaushik, B. Muralidharan, and S. Lodha, “Performance Projections for Two-dimensional Materials in Radio-Frequency Applications”, Phys. Rev. Appl. 10, 014022, 1-11 (2018).R. Cheng, J. Bai, L. Liao, H. Zhou, Y. Chen, L. Liu, YC Lin, S. N. Sahri and T. Nagatsuma, “Application of 1.55-μm Photonic Technology to Practical Millimeter-Wave Network Analysis”, IEICE Trans. Electron. E82-C, 7, 1307-1311 (1999).

[0008] This disclosure has been made in view of the above-mentioned problems, and its purpose is to provide an FET capable of evaluating FET operation in the THz region.

[0009] To address the above-mentioned problems, this disclosure provides a field-effect transistor comprising: a semiconductor film electrically connecting a source and a drain; an insulating film insulating the gate and the source, the gate and the drain, and the gate and the semiconductor film; a generating photoconductive switch electrically connected to the input side of the gate; a first detection photoconductive switch electrically connected to the output side of the drain; a detection electrode for detecting pulses incident on the generating photoconductive switch 107; and a second detection photoconductive switch electrically connected to the detection electrode.

[0010] This figure shows the schematic structure of the FET 100 according to the first embodiment of the present disclosure, where (a) is a top view and (b) is a cross-sectional view along the Ib-Ib cross-sectional line. A voltage pulse V is incident on the gate 104. ｉｎ (t) and V detected from drain 103 ｏｕｔ V obtained by Fourier transforming each of (t) ｉｎ (ω), V ｏｕｔ This figure shows the spectrum of (ω) against frequency. This figure shows the schematic structure of FET 300 according to the second embodiment of the present disclosure, where (a) is a top view and (b) is a cross-sectional view along the IIIb-IIIb section. This figure shows the schematic structure of FET 400 according to the third embodiment of the present disclosure, where (a) is a top view and (b) is a cross-sectional view along the IVb-IVb section.

[0011] Various embodiments of this disclosure are described below in detail with reference to the drawings. Identical or similar reference numerals indicate identical or similar elements, and redundant descriptions may be omitted. Materials and numerical values ​​are illustrative and are not intended to limit the technical scope of this disclosure. The following description is illustrative and some configurations may be omitted or modified, or implemented with additional configurations, without departing from the gist of one embodiment of this disclosure.

[0012] (First Embodiment) Figure 1 is a diagram showing the schematic structure of an FET 100 according to the first embodiment of the present disclosure, where (a) is a top view and (b) is a cross-sectional view along the Ib-Ib cross-sectional line. As shown in Figure 1, the FET 100 includes a source 102, a drain 103, and a gate 104 formed on a substrate 101, a semiconductor film 105 that electrically connects the source 102 and the drain 103, an insulating film 106 that insulates the gate 104 from the source 102, the drain 103, and the semiconductor film 105, a generating photoconductive switch 107 electrically connected to the input side of the gate 104, a first detection photoconductive switch 108 electrically connected to the output side of the drain 103, a detection electrode 111 that detects incident pulses incident on the generating photoconductive switch 107, and a second detection photoconductive switch 112 electrically connected to the detection electrode 111.

[0013] As shown in Figure 1, the FET 100 may further include a gate electrode 109 electrically connected to a generating photoconductive switch 107, and a drain electrode 110 electrically connected to a first detection photoconductive switch 108.

[0014] The source 102, drain 103, and gate 104 are made of a conductive material. For example, the source 102, drain 103, and gate 104 may be made of gold (Au). On the other hand, the insulating film 106 is made of a material with high electrical resistance. For example, the insulating film 106 may be made of alumina (Al ２ O ３ ), or silica (SiO ２ ) can be composed of.

[0015] As shown in Figure 1, the FET 100 is configured such that the width of the gate 104 (i.e., the distance in the direction parallel to the main surface of the substrate 101 and perpendicular to the signal propagation direction) is constant. For example, the width of the gate 104 may be 10 μm. However, as will be described later, in other embodiments, the width of the gate 104 may be configured to change continuously (smoothly) with respect to the signal propagation direction.

[0016] The semiconductor film 105 is composed of a semiconductor material that performs FET operation in the THz range. From the viewpoint of high-speed operation, as mentioned above, it is desirable that the semiconductor film 105 be composed of a two-dimensional material. For example, the semiconductor film 105 may be composed of graphene.

[0017] In the FET 100 having such a configuration, the charge density of the semiconductor film 105 (for example, graphene) can be controlled by forming a top gate on the semiconductor film 105 using an insulating film 106 and a gate 104. Furthermore, in the FET 100, by irradiating the generating photoconductive switch 107 and the first detection photoconductive switch 108 with femtosecond laser pulses, it becomes possible to generate and detect pulse voltages in a bandwidth of up to 2 THz, as will be described later.

[0018] Furthermore, in order to detect pulse voltage and evaluate FET operation through irradiation with such femtosecond laser pulses, it is necessary to compare the pulse incident on the generating photoconductive switch 107 and the pulse incident on the first detecting photoconductive switch 108. For this reason, the FET 100 further includes a detection electrode 111 and a second detecting photoconductive switch 112 for detecting the pulse incident on the generating photoconductive switch 107. The detection electrode 111 and the second detecting photoconductive switch 112 may be disposed at any position, as long as the position does not affect the pulse waveform of the pulse incident on the generating photoconductive switch 107.

[0019] FIG. 2 is a voltage pulse V incident on the gate 104 ｉｎ (t) and V detected from the drain 103 ｏｕｔ (t) each Fourier-transformed to obtain V ｉｎ (ω), V ｏｕｔ (ω) is a diagram showing spectra with respect to frequency. As shown in FIG. 2, for both V ｉｎ (ω) and V ｏｕｔ (ω), it can be observed that noise increases in a region where the frequency is higher than 0.5 THz (500 GHz), whereas a low-noise spectrum is obtained in the region of 0.007 to 0.5 THz, which confirms that response measurement in the THz region is possible.

[0020] Note that the spectral data shown in FIG. 2 is obtained using an ultrashort optical pulse with a pulse width of 1 ps, but by using a shorter pulse, it is possible to measure FET operation in a region up to a maximum of 2 THz.

[0021] Furthermore, as indicated by the broken line in FIG. 2, V ｏｕｔ (ω) is V ｉｎ (ω), that is, the cutoff frequency was confirmed to be about 0.033 THz (33 GHz). This cutoff frequency value is close to about 30 GHz, which is the theoretical cutoff frequency expected from the gate length of 3 μm of the measured device, which suggests the correctness of the FET operation measurement in the FET 100.

[0022] Thus, with FET 100, it is possible to directly evaluate the FET operation in the THz region, which was previously considered difficult.

[0023] (Second Embodiment) Figure 3 shows a schematic structure of the FET 300 according to the second embodiment of the present disclosure, where (a) is a top view and (b) is a cross-sectional view along the IIIb-IIIb cross-sectional line. Unlike the FET 100 described in the first embodiment, the FET 300 includes a gate 304 as a replacement for the gate 104, configured such that its width decreases continuously with respect to the signal propagation direction. The other configurations are the same as those of the FET 100.

[0024] In the gate 304, a smaller width is desirable for the portion connected to the insulating film 106, from the perspective of operation in the THz region. On the other hand, a larger width is desirable for signal propagation efficiency. Therefore, the FET 300 is equipped with a gate 304 configured such that its width decreases towards the portion connected to the insulating film 106.

[0025] It is desirable that the width of such a gate 304 be configured to change continuously with respect to the direction of signal propagation. This is because there is a concern that a step will occur in the region where the width changes discontinuously, and that the signal may be reflected at that step.

[0026] Even with an FET 300 having such a configuration, it is possible to directly evaluate the FET operation in the THz region, which was previously considered difficult, just like with FET 100.

[0027] (Third Embodiment) Figure 4 is a diagram showing the schematic structure of the FET 400 according to the third embodiment of the present disclosure, where (a) is a top view and (b) is a cross-sectional view along the IVb-IVb cross-sectional line. As shown in Figure 4, the FET 400 includes a gate 404 having a bifurcated tip structure at the connection point with the insulating film 106, sources 402a and 402b arranged on the substrate 401 and on both sides of the gate 404, a drain 403 formed between them, semiconductor films 405a and 405b that electrically connect source 402a and drain 403 and source 402b and drain 403, an insulating film 406 that insulates the gate 404 from sources 402a and 402b, the drain 403 and the semiconductor films 405a and 405b, a generating photoconductive switch 407 electrically connected to the gate 404, a first detection photoconductive switch 408 electrically connected to the drain 403, a detection electrode 411 configured to detect pulses incident on the generating photoconductive switch 407, and a second detection photoconductive switch 412 electrically connected to the detection electrode 411.

[0028] As shown in Figure 4, the FET 400 may further include a gate electrode 409 electrically connected to a generating photoconductive switch 407, and a drain electrode 410 electrically connected to a detection photoconductive switch 408.

[0029] Such an FET 400 can be described as an FET 100 arranged in a so-called dual configuration. With such a configuration, the width of the gate 404 at the connection point with the insulating film 406 can be made smaller than that of the FET 100.

[0030] As described above, the FETs disclosed in this disclosure make it possible to directly evaluate FET operation in the THz range, which was difficult with conventional technology. Such FETs are expected to be applied to communication systems and sensor applications where there is a growing demand for increased bandwidth.

Claims

1. A field-effect transistor comprising: a semiconductor film electrically connecting a source and a drain; an insulating film insulating the gate from the source, the gate from the drain, and the gate from the semiconductor film; a generating photoconductive switch electrically connected to the input side of the gate; a first detection photoconductive switch electrically connected to the output side of the drain; a detection electrode for detecting pulses incident on the generating photoconductive switch 107; and a second detection photoconductive switch electrically connected to the detection electrode.

2. The field-effect transistor according to claim 1, wherein the semiconductor film is composed of a semiconductor material that is a two-dimensional material.

3. The field-effect transistor according to claim 2, wherein the semiconductor material is graphene.

4. The field-effect transistor according to claim 1, wherein the gate is parallel to the main surface of the substrate and is configured such that the distance in a direction perpendicular to the signal propagation direction changes continuously and small with respect to the propagation direction.

5. The field-effect transistor according to claim 1, wherein the gate has a bifurcated tip structure at the connection portion with the insulating film, the source is arranged on both sides of the gate, and the drain is arranged between the sources.

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