Solid-state imaging device, method for manufacturing solid-state imaging device, and electronic device

Abstract

[Problem] To provide a solid-state imaging device, a method for manufacturing a solid-state imaging device, and an electronic device, with which it is possible to suitably suppress generation of dark current. [Solution] A solid-state imaging device according to the present disclosure comprises: a semiconductor substrate having a photoelectric conversion unit for each pixel; pixel separation grooves provided in the semiconductor substrate; and a fixed charge film provided continuously from the light-receiving surface side of the photoelectric conversion units to the wall surface side and the bottom surface side of the pixel separation grooves. The fixed charge film includes: a first insulating film provided continuously from the light-receiving surface side to the wall surface side and the bottom surface side of the pixel separation grooves; a second insulating film provided partially on at least the light-receiving surface side on the first insulating film; a third insulating film provided partially on at least the light-receiving surface side on the second insulating film; and a fourth insulating film provided continuously from the light-receiving surface side on the third insulating film to the wall surface side and the bottom surface side of the pixel separation grooves.

Description

Solid-state imaging device, method for manufacturing a solid-state imaging device, and electronic device.

[0001] Embodiments of the present invention relate to a solid-state imaging device, a method for manufacturing a solid-state imaging device, and electronic equipment.

[0002] In CMOS (Complementary Metal Oxide Semiconductor) image sensors with pixel isolation grooves such as RDTI (Reverse Deep Trench Isolation) and FFTI (Front Full Trench Isolation), a fixed charge film containing multiple insulating films is formed on the light-receiving surface of the semiconductor substrate in which the photoelectric conversion unit is embedded. These insulating films are used, for example, to suppress dark current due to backside pinning and to prevent reflection.

[0003] Japanese Patent Publication No. 2015-70070

[0004] However, depending on the combination of insulating films that make up the fixed charge film, the interface levels may deteriorate, and dark current may not be properly suppressed.

[0005] Therefore, in view of these problems, this disclosure provides a solid-state imaging device, a method for manufacturing a solid-state imaging device, and electronic equipment that can appropriately suppress the generation of dark current.

[0006] A solid-state imaging device according to the first aspect of this disclosure comprises a semiconductor substrate having a photoelectric conversion unit for each pixel, a pixel separation groove provided on the semiconductor substrate, and a fixed charge film continuously provided from the light-receiving surface side of the photoelectric conversion unit to the wall and bottom sides of the pixel separation groove, wherein the fixed charge film includes a first insulating film continuously provided from the light-receiving surface side to the wall and bottom sides of the pixel separation groove, a second insulating film partially provided on at least the light-receiving surface side of the first insulating film, a third insulating film partially provided on at least the light-receiving surface side of the second insulating film, and a fourth insulating film continuously provided from the light-receiving surface side of the third insulating film to the wall and bottom sides of the pixel separation groove. This makes it possible, for example, to block the movement of oxygen from the semiconductor substrate and the interfacial oxide film and to appropriately suppress the generation of dark current.

[0007] Furthermore, in the first aspect, the enthalpy required for oxidizing the second insulating film is smaller than the enthalpy required for oxidizing the first insulating film. This makes it possible, for example, to block the movement of oxygen from the semiconductor substrate and the interface oxide film, and appropriately suppress the generation of dark current.

[0008] Furthermore, in the first aspect, the enthalpy required for oxidizing the second insulating film is smaller than the enthalpy required for oxidizing the third insulating film. This makes it possible, for example, to block the movement of oxygen from the semiconductor substrate and the interface oxide film, and appropriately suppress the generation of dark current.

[0009] Furthermore, in the first aspect, the first insulating film, the third insulating film, and the fourth insulating film are each formed of hafnium oxide (HfO ２ ), zirconium oxide (ZrO ２ ), aluminum oxide (Al ２ O ３ ) and tantalum oxide (Ta ２ O ５ ). This enables easy film formation, for example, because film formation methods for these oxides have already been established.

[0010] Furthermore, in the first aspect, the second insulating film is formed of titanium oxide (TiO ２ ), tantalum oxide (Ta ２ O ５ ), niobium pentoxide (Nb ２ O ５ ), vanadium trioxide (V ２ O ３ ), chromium oxide (Cr ２ O ３ ), tungsten oxide (WO ３ ) and molybdenum oxide (MoO ２ ). This enables easy film formation, for example, because film formation methods for these oxides have already been established.

[0011] Furthermore, in this first aspect, the first insulating film and the fourth insulating film are formed using the same material. This simplifies, for example, the manufacturing process of the solid-state imaging device.

[0012] Furthermore, in this first aspect, the film thicknesses of the first insulating film, the second insulating film, and the fourth insulating film are, each, 1 nm or more and 25 nm or less. This makes it possible to improve the pinning performance of the semiconductor substrate on the wall and bottom surfaces of the pixel separation groove, for example.

[0013] Furthermore, in this first aspect, the total thickness of the first insulating film, the second insulating film, and the fourth insulating film is 3 nm or more and 100 nm or less. This makes it possible to improve the pinning performance of the semiconductor substrate 21 on the wall and bottom surfaces of the pixel separation groove 21A, for example.

[0014] Furthermore, in this first aspect, the thickness of the third insulating film is 10 nm or more and 80 nm or less. This makes it possible to improve the pinning performance of the semiconductor substrate 21 on the wall and bottom surfaces of the pixel separation groove 21A, for example.

[0015] Furthermore, in this first aspect, an interfacial oxide film is further included between the semiconductor substrate and the first insulating film. This makes it possible to reduce, for example, the interfacial states of the semiconductor substrate.

[0016] Furthermore, in this first aspect, the thickness of the interfacial oxide film is greater than 0 nm and less than or equal to 2 nm. This makes it possible to reduce the interfacial states of the semiconductor substrate, for example.

[0017] A method for manufacturing a solid-state imaging device according to a second aspect of this disclosure includes a step of forming a fixed charge film on the light-receiving surface of a semiconductor substrate having a photoelectric conversion unit for each pixel and a pixel separation groove, wherein the manufacturing step of the fixed charge film includes a step of forming a first insulating film continuous from the light-receiving surface side of the semiconductor substrate to the wall and bottom sides of the pixel separation groove, a second insulating film partially formed on at least the light-receiving surface side of the first insulating film, a third insulating film partially formed on at least the light-receiving surface side of the second insulating film, and a fourth insulating film continuous from the light-receiving surface side of the third insulating film to the wall and bottom sides of the pixel separation groove. This makes it possible, for example, to block the movement of oxygen from the semiconductor substrate and the interfacial oxide film and appropriately suppress the generation of dark current.

[0018] Furthermore, in this second aspect, the enthalpy required for the oxidation of the second insulating film is smaller than the enthalpy required for the oxidation of the first insulating film. This makes it possible, for example, to block the movement of oxygen from the semiconductor substrate and the interfacial oxide film, thereby appropriately suppressing the generation of dark current.

[0019] Furthermore, in this second aspect, the enthalpy required for the oxidation of the second insulating film is smaller than the enthalpy required for the oxidation of the third insulating film. This makes it possible, for example, to block the movement of oxygen from the semiconductor substrate and the interfacial oxide film, thereby effectively suppressing the generation of dark current.

[0020] Furthermore, in this second aspect, the first insulating film and the fourth insulating film are formed by atomic layer deposition (ALD) or metal-organic vapor deposition (MOCVD). This prevents damage to the entire back surface of the semiconductor substrate, including the grooves, and avoids deterioration of the interface properties, compared to, for example, forming a fixed charge film by PVD, which has a high deposition rate.

[0021] Furthermore, on this second side, the second insulating film is formed by the MOCVD method. This prevents damage to the entire back surface, including the grooves of the semiconductor substrate, and avoids deterioration of the interface properties, compared to, for example, forming a fixed charge film by the PVD method, which has a high film deposition rate.

[0022] Furthermore, in this second aspect, the third insulating film is formed by physical vapor deposition. This prevents damage to the entire back surface of the semiconductor substrate, including the grooves, and avoids deterioration of the interface properties, compared to, for example, forming a fixed charge film by PVD, which has a high deposition rate.

[0023] Furthermore, in this second aspect, the first insulating film, the third insulating film, and the fourth insulating film are each made of HfO ２ , ZrO ２ Al ２ O ３ and Ta ２ O ５ It is formed using one of the following. For example, these oxides can be easily formed into films because film formation methods have been established.

[0024] Furthermore, in this second aspect, the second insulating film is made of TiO ２ Ta ２ O ５ Nb ２ O ５ , V ２ O ３ , Cr ２ O ３ WO ３ and MoO ２ It is formed using one of the following. For example, these oxides can be easily formed into films because film formation methods have been established.

[0025] The electronic device of the second aspect of this disclosure is an electronic device comprising a solid-state imaging device, the solid-state imaging device comprising a semiconductor substrate having a photoelectric conversion unit for each pixel, a pixel separation groove provided on the semiconductor substrate, and a fixed charge film continuously provided from the light-receiving surface side of the photoelectric conversion unit to the wall and bottom sides of the pixel separation groove, wherein the fixed charge film comprises a first insulating film continuously provided from the light-receiving surface side to the wall and bottom sides of the pixel separation groove, a second insulating film partially provided on at least the light-receiving surface side of the first insulating film, a third insulating film partially provided on at least the light-receiving surface side of the second insulating film, and a fourth insulating film continuously provided on the third insulating film from the light-receiving surface side to the wall and bottom sides of the pixel separation groove. This makes it possible, for example, to block the movement of oxygen from the semiconductor substrate and the interfacial oxide film and to appropriately suppress the generation of dark current.

[0026] This is a block diagram showing an example configuration of the imaging device in this embodiment. This is a block diagram showing a schematic configuration of the solid-state imaging device in this embodiment. This is an example of the cross-sectional configuration of a pixel in this embodiment. This is an example of the cross-sectional configuration of a fixed charge film in this embodiment. This is a diagram illustrating the types of insulating films that make up the fixed charge film in this embodiment. This is an example of the cross-sectional configuration of a fixed charge film in a comparative example. This is a diagram illustrating oxygen movement by taking up the configuration of the fixed charge film in this embodiment and the configuration of the fixed charge film in a comparative example. This is example 1 of a cross-sectional diagram illustrating the method of forming the fixed charge film in this embodiment. This is example 2 of a cross-sectional diagram illustrating the method of forming the fixed charge film in this embodiment.

[0027] Embodiments of this disclosure will be described in detail below with reference to the drawings. In this specification and the drawings, components having substantially the same functional configuration will be denoted by the same reference numerals, and their descriptions will be omitted as appropriate. The drawings are simplified, and any other components necessary for implementation will be appropriately provided in addition to those shown in the drawings. Furthermore, when terms such as "first," "second," etc. are used in this specification or claims, unless otherwise specified, they do not indicate any order or importance, but are used to distinguish one configuration from another.

[0028] Furthermore, in this disclosure, the terms "greater than or equal to" and "less than or equal to" may be interpreted as "greater than" and "less than," respectively.

[0029] Furthermore, the X, Y, and Z axes shown in the diagram below represent axes perpendicular to each other. The X and Y directions correspond to the horizontal direction, and the Z direction corresponds to the vertical direction. The +Z direction corresponds to the upward direction, and the -Z direction corresponds to the downward direction. Note that the -Z direction may or may not strictly coincide with the direction of gravity.

[0030] Figure 1 is a block diagram showing one example configuration of the imaging device 100 in this embodiment.

[0031] This imaging device 100 is a device that captures an image of an object to be imaged, and comprises an imaging lens 210, a solid-state imaging device 10, a recording unit 220, and an imaging control unit 230. Examples of the imaging device 100 include a digital camera such as an IoT camera or an electronic device with imaging capabilities (such as a smartphone or personal computer).

[0032] The solid-state imaging device 10 captures an image according to the control of the imaging control unit 230. The solid-state imaging device 10 supplies the image to the recording unit 220 via the signal line 209.

[0033] The imaging lens 210 focuses light and directs it to the solid-state imaging device 10. The imaging control unit 230 controls the solid-state imaging device 10 to capture an image. The imaging control unit 230 supplies an imaging control signal, including a vertical synchronization signal VSYNC, to the solid-state imaging device 10 via, for example, the signal line 139. The recording unit 220 records the image.

[0034] Here, the vertical synchronization signal VSYNC is a signal that indicates the timing of imaging, and a periodic signal with a constant frequency (such as 60 Hz) is used as the vertical synchronization signal VSYNC.

[0035] In this embodiment, the imaging device 100 records the captured image in the recording unit 220, but the image may also be transmitted to an external device. In this case, an external interface for transmitting the image to the imaging device 100 is further provided. The imaging device 100 may also display the captured image. In this case, a display unit is further provided to the imaging device 100.

[0036] Figure 2 is a block diagram showing the schematic configuration of the solid-state imaging device 10 in this embodiment.

[0037] The solid-state imaging device 10 shown in Figure 2 is configured to have a pixel array section 19 in which multiple pixels are arranged in a matrix, and a peripheral circuit section around it. The peripheral circuit section includes a vertical drive section 12, an AD conversion section 13, a horizontal drive section 14, a control section 15, a signal processing section 16, a data storage section 17, and an input / output section 18, etc.

[0038] In this embodiment, the pixel array 19 is arranged with pixels that are equipped with color filters such as red (R), green (G), blue (B), or white (W).

[0039] Each pixel, arranged in two dimensions within the pixel array 19, is composed of a photodiode as a photoelectric conversion element and a plurality of pixel transistors. The plurality of pixel transistors are, for example, MOS transistors such as transfer transistors, reset transistors, amplification transistors, and selection transistors.

[0040] The vertical drive unit 12 is configured, for example, by a shift register, and drives pixels row by row by supplying drive pulses to each pixel of the pixel array unit 19 via pixel drive wiring (not shown). That is, the vertical drive unit 12 sequentially selects and scans each pixel of the pixel array unit 19 vertically row by row, and outputs a pixel signal based on the signal charge generated in the photodiode of each pixel according to the amount of incident light to the signal processing unit 16 through a vertical signal line commonly provided for each column.

[0041] The AD converter (ADC) 13 performs CDS (Correlated Double Sampling) processing to remove pixel-specific fixed pattern noise and AD conversion on the pixel signals output from the pixel array unit 19.

[0042] The horizontal drive unit 14 is configured, for example, by a shift register, and sequentially outputs horizontal scanning pulses, causing the AD-converted (digital) pixel signals of each pixel in a predetermined row held in the AD conversion unit 13 to be sequentially output to the signal processing unit 16.

[0043] The control unit 15 receives a clock signal input from an external source and data that commands the operating mode, etc., and controls the operation of the entire solid-state imaging device 10. For example, the control unit 15 generates a vertical synchronization signal, a horizontal synchronization signal, etc., based on the input clock signal, and supplies them to the vertical drive unit 12, the AD conversion unit 13, the horizontal drive unit 14, etc.

[0044] The signal processing unit 16 performs various digital signal processing operations, such as black level adjustment, column variation correction, and demosaicing, on the pixel signals supplied from the AD conversion unit 13 as needed, and supplies them to the input / output unit 18. Depending on the operating mode, the signal processing unit 16 may also output only the buffered pixel signals. The data storage unit 17 stores data such as parameters necessary for the signal processing performed by the signal processing unit 16. The data storage unit 17 also includes a frame memory for storing pixel signals in processing such as demosaicing. The signal processing unit 16 can store parameters and other data input from an external image processing device via the input / output unit 18 in the data storage unit 17, and can appropriately select and execute signal processing based on instructions from an external image processing device.

[0045] The signal processing unit 16 can store parameters and the like input from an external image processing device via the input / output unit 18 in the data storage unit 17, and can appropriately select and execute signal processing based on instructions from the external image processing device.

[0046] The input / output unit 18 outputs pixel signals sequentially input from the signal processing unit 16 to an external image processing device, such as a subsequent ISP (Image Signal Processor). The input / output unit 18 also supplies signals and parameters input from the external image processing device to the signal processing unit 16 and the control unit 15.

[0047] The solid-state imaging device 10 is configured as described above and is a CMOS image sensor called a column AD method, which performs CDS processing and AD conversion processing for each pixel row.

[0048] Figure 3 shows an example of the cross-sectional configuration of pixel P in this embodiment.

[0049] Figure 3 describes the configuration of one pixel P among a plurality of pixels P arranged in the pixel array section 19 of a back-illuminated solid-state imaging device 10. In this example, one pixel P comprises a light-collecting section 40, a light-receiving section 20, and a wiring layer 30. In the back-illuminated solid-state imaging device 10, the light-collecting section 40 is provided on the light-incident surface side of the light-receiving section 20, which includes a photoelectric conversion section 22. In addition, the wiring layer 30 is provided on the side opposite to the light-incident surface side of the back-illuminated solid-state imaging device 10. The light-receiving section 20 comprises a semiconductor substrate 21 with grooves (pixel separation grooves 21A) between pixels P on the light-incident surface (light-receiving surface S1) side, a fixed charge film 23 and a protective film 24 provided on the entire surface of the light-incident surface side of the semiconductor substrate 21. In this embodiment, the pixel P has a stacked structure in which the fixed charge film 23 includes four types of insulating films (first insulating film 23A1, second insulating film 23A3, third insulating film 23B, and fourth insulating film 23A2) with different formation regions. The detailed configuration of the fixed charge film 23 will be described later.

[0050] The configuration of the pixel P will be described below in the order of light receiving section 20, wiring layer 30, and light collecting section 40.

[0051] The light-receiving unit 20 comprises a semiconductor substrate 21 in which a photoelectric conversion unit 22 such as a photodiode (PD) is embedded, and a fixed charge film 23 provided on the back surface (light-receiving surface S1 side) of the semiconductor substrate 21.

[0052] The semiconductor substrate 21 is made of, for example, p-type silicon (Si), and as described above, a pixel separation groove 21A extending in the thickness direction (upward direction) of the semiconductor substrate 21 is provided between each pixel P on the light-receiving surface S1 side. The depth (height (h)) of this pixel separation groove 21A is sufficient to suppress crosstalk, for example, 0.25 μm or more and 5 μm or less. The width (W) is sufficient to suppress crosstalk, for example, 100 nm or more and 1000 nm or less.

[0053] A transfer transistor is positioned near the surface (plane S2) of the semiconductor substrate 21 to transfer the signal charge generated by the photoelectric conversion unit 22 to, for example, a vertical signal line. The gate electrode of the transfer transistor is provided, for example, on the wiring layer 30. The signal charge may be either electrons or holes generated by photoelectric conversion, but here we will explain using the case where electrons are read out as the signal charge as an example.

[0054] Near the surface S2 of the semiconductor substrate 21, along with the transfer transistor, are provided, for example, a reset transistor, an amplification transistor, and a selection transistor. These transistors are, for example, MOSEFTs (Metal Oxide Semiconductor Field Effect Transistors) and are provided for each pixel P. Each circuit may be a three-transistor configuration including, for example, a transfer transistor, a reset transistor, and an amplification transistor, or a four-transistor configuration with the addition of a selection transistor. Transistors other than the transfer transistor may be shared between pixels.

[0055] The photoelectric conversion unit 22 is a pn junction type photodiode, which is formed in the thickness direction (upward direction) of the semiconductor substrate 21 for each pixel P, and is, for example, an n-type semiconductor region, and a p-type semiconductor region provided near the front and back surfaces of the semiconductor substrate 21. In addition, the semiconductor substrate 21 also has p-type semiconductor regions formed between pixels P and adjacent pixels P, and the pixel separation groove 21A described above is formed in this p-type semiconductor region.

[0056] A protective film 24 is provided on the fixed charge film 23, and by embedding this protective film 24 in the pixel separation groove 21A, the back surface of the light-receiving section 20 is flattened. The protective film 24 is made of, for example, silicon nitride (Si2N ３ ), silicon oxide (SiO ２ It is composed of a single layer film of ) and silicon oxynitride (SiON) or a multilayer film of these.

[0057] The wiring layer 30 is provided in contact with the surface (surface S2) of the semiconductor substrate 21. The wiring layer 30 includes a plurality of wirings 32 (for example, wirings 32A, 32B, 32C) via an interlayer insulating film 31. The wiring layer 30 is bonded to a support substrate 11 made of, for example, Si, and the wiring layer 30 is positioned between the support substrate 11 and the semiconductor substrate 21.

[0058] The light-collecting unit 40 is provided on the light-receiving surface S1 side of the light-receiving unit 20 and includes an on-chip lens 41 positioned opposite each photoelectric conversion unit 22 of each pixel P as an optical functional layer on the light-incident side. Between the light-receiving unit 20 (specifically, the protective film 24) and the on-chip lens 41, a planarization film 43 and a color filter 44 are stacked in order from the light-receiving unit 20 side. In addition, a light-shielding film 42 is provided on the protective film 24 between each pixel P.

[0059] The on-chip lens 41 has the function of focusing light toward the light-receiving unit 20 (specifically, the photoelectric conversion unit 22 of the light-receiving unit 20). The lens diameter of this on-chip lens 41 is set to a value corresponding to the size of the pixel P, for example, the lens diameter is 0.9 μm or more and 8 μm or less. The refractive index of the on-chip lens 41 is, for example, 1.5 or more and 1.9 or less. As the lens material, for example, organic material or silicon oxide film (SiO ２ ) and others are used.

[0060] The light-shielding film 42 is provided between pixels P of the protective film 24, for example, at a position corresponding to the pixel separation groove 21A. The light-shielding film 42 suppresses color mixing due to crosstalk of obliquely incident light between adjacent pixels. The material of the light-shielding film 42 is, for example, tungsten (W), aluminum (Al), or an alloy of Al and copper (Cu), and its film thickness is, for example, 20 nm to 5000 nm.

[0061] The planarized film 43 is, for example, silicon nitride (Si ２ N ３ ), silicon oxide (SiO ２ It is composed of a single layer film of ) and silicon oxynitride (SiON) or a multilayer film of these.

[0062] The color filter 44 is provided at each pixel, for example, with one of the following filters: a red filter, a green filter, a blue filter, and a white filter. These color filters 44 are arranged in a regular color sequence (e.g., a Bayer sequence). By providing such color filters 44, pixel P obtains light reception data in a color corresponding to its color sequence. Filters other than those described above may also be used as color filters 44.

[0063] In such a pixel P, a signal charge (electrons in this case) is acquired in the following manner. When light L is incident on the pixel P via the on-chip lens 41, the light L passes through the color filter 44, etc., and is detected by the photoelectric conversion unit 22, where red, green, or blue colored light is photoelectrically converted. Of the electron-hole pairs generated in the photoelectric conversion unit 22, the electrons move to the semiconductor substrate 21 (for example, an n-type semiconductor region) and are accumulated, while the holes move to the p-type region and are discharged.

[0064] Figure 4 shows an example of the cross-sectional configuration of the stationary charge film 23 in this embodiment.

[0065] Figure 4A shows an example of the cross-sectional configuration of the stationary charge film 23 including the pixel separation groove 21A in this embodiment, and Figure 4B shows an enlarged view of the dashed line portion.

[0066] The fixed charge film 23 has a negative charge. As shown in Figure 4A, the fixed charge film 23 includes a configuration in which the first insulating film 23A1, the second insulating film 23A3, the third insulating film 23B, and the fourth insulating film 23A2 are laminated over the entire surface or partially from the light-receiving surface S1 to the pixel separation groove 21A. In Figure 4A, the second insulating film 23A3 and the third insulating film 23B are shown as examples in which they are formed in part in the region from the light-receiving surface S1 to the pixel separation groove 21A. Furthermore, on the surface of the semiconductor substrate 21, that is, between the semiconductor substrate 21 and the first insulating film 23A1, a silicon oxide (SiO₂) film thickness is set to be greater than 0 nm and 2 nm or less, preferably about 1 nm, in order to reduce interface states. ２ An interfacial oxide film 23C such as the following may be provided.

[0067] As shown in Figure 4A, the first insulating film 23A1 and the fourth insulating film 23A2 are provided continuously across the entire back surface of the semiconductor substrate 21, that is, from the light-receiving surface S1 side of the semiconductor substrate 21 to the wall side and bottom side of the pixel separation groove 21A. The second insulating film 23A3 is provided in the region on the light-receiving surface S1 side of the semiconductor substrate 21, excluding the inner wall (wall surface and bottom surface) of the pixel separation groove 21A. The third insulating film 23B is provided in the region on the light-receiving surface S1 side and in a part of the wall surface of the pixel separation groove 21A.

[0068] As shown in Figure 4B, when the light-receiving surface S1 is magnified, the insulating films are formed in the following order from the semiconductor substrate 21 side: first insulating film 23A1, second insulating film 23A3, third insulating film 23B, and fourth insulating film 23A2. In other words, the second insulating film 23A3 is formed on the light-receiving surface S1 side above the first insulating film 23A1, the third insulating film 23B is formed on the light-receiving surface S1 side above the second insulating film 23A3, and the fourth insulating film 23A2 is formed on the light-receiving surface S1 side above the third insulating film 23B.

[0069] The second insulating film 23A3 may be formed on a portion of the wall side of the pixel separation groove 21A, similar to the third insulating film 23B. Alternatively, the second insulating film 23A3 may be formed continuously from the wall side to the bottom side of the pixel separation groove 21A, similar to the first insulating film 23A1.

[0070] Furthermore, although the third insulating film 23B is formed continuously over a portion of the wall surface of the pixel separation groove 21A, the third insulating film 23B may be formed continuously from the wall surface to the bottom surface.

[0071] The first insulating film 23A1 and the fourth insulating film 23A2 are formed, for example, by atomic layer deposition (ALD) or metal-organic vapor deposition (MOCVD). The second insulating film 23A3 is formed, for example, by MOCVD. The third insulating film 23B is formed, for example, by physical vapor deposition. In this embodiment, the insulating films are stacked in the order of the first insulating film 23A1, the second insulating film 23A3, the third insulating film 23B, and the fourth insulating film 23A2.

[0072] Figure 5 is a diagram illustrating the types of insulating films and other components that make up the fixed charge film 23 in this embodiment.

[0073] The film thicknesses of the first insulating film 23A1, the second insulating film 23A3, and the fourth insulating film 23A2 are preferably, for example, 1 nm to 25 nm, and the total thickness of the first insulating film 23A1, the second insulating film 23A3, and the fourth insulating film 23A2 is preferably 3 nm to 100 nm. This improves the pinning performance of the semiconductor substrate 21 on the walls and bottom surfaces of the pixel separation groove 21A. The film thickness of the third insulating film 23B is preferably, for example, 10 nm to 80 nm.

[0074] It is preferable to use a high dielectric material with a fixed charge as the material for the first insulating film 23A1, the third insulating film 23B, and the fourth insulating film 23A2, specifically hafnium oxide (HfO ２ ), zirconium oxide (ZrO ２ ), aluminum oxide (Al ２ O ３ ) and tantalum oxide (Ta ２ O ５Examples include these. These oxides have a proven track record of being used as gate insulating films in insulated-gate field-effect transistors, and since film deposition methods are established, they can be easily deposited. In addition, HfO, which has a relatively high refractive index, is also an option. ２ By using a refractive index of 2.05 or the like, an anti-reflective effect is added to the fixed charge film 23.

[0075] Similarly, it is preferable to use a high dielectric material having a fixed charge as the material for the second insulating film 23A3, such as titanium oxide (TiO2). ２ ), tantalum oxide (Ta ２ O ５ ), niobium pentoxide (Nb ２ O ５ ), vanadium trioxide (V ２ O ３ ), chromium oxide (Cr ２ O ３ ), tungsten oxide (WO ３ ) and molybdenum oxide (MoO ２ Examples include the following. In this embodiment, an insulating film that is relatively less susceptible to oxidation than the first insulating film 23A1 is used as the material for the second insulating film 23A3. Therefore, as the material for the second insulating film 23A3, Al ２ O ３ or HfO ２ It is preferable to use materials other than those that are easily oxidized, such as those mentioned above.

[0076] Other materials for the first insulating film 23A1, the second insulating film 23A3, and the fourth insulating film 23A2 include, for example, oxides of rare earth elements. Specifically, these include oxides of lanthanum (La), praseodymium (Pr), cerium (Ce), neodymium (Nd), promethium (Pm), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), lutetium (Lu), and yttrium (Y). Silicon (Si) may also be added to the oxides to the extent that it does not impair the insulating properties. In addition to oxides, nitrides or oxynitrides such as hafnium nitride, aluminum nitride, hafnium oxynitride, and aluminum oxynitride may also be used. By adding Si or Ni to the fixed charge film 23, the heat resistance and the ability to prevent ion implantation into the Si interface and Si substrate during the process are improved.

[0077] The thickness of the third insulating film 23B is preferably, for example, 10 nm or more and 80 nm or less. As the material for the third insulating film 23B, it is preferable to use a high dielectric material having a fixed charge, similar to the first insulating film 23A1, the second insulating film 23A3, and the fourth insulating film 23A2, specifically HfO ２ , ZrO ２ Al ２ O ３ , TiO ２ and Ta ２ O ５ These are some examples.

[0078] By using a material with a high refractive index for the third insulating film 23B, which is formed to be thicker than the first insulating film 23A1, the second insulating film 23A3, and the fourth insulating film 23A2, it is possible to efficiently obtain an anti-reflective effect and also increase the amount of light incident on the photoelectric conversion unit 22, thereby improving the sensitivity of the pixel P.

[0079] The first insulating film 23A1 and the fourth insulating film 23A2 may be made of the same material. By using the same material for the first insulating film 23A1 and the fourth insulating film 23A2, the manufacturing process can be simplified.

[0080] Furthermore, different materials may be used for the first insulating film 23A1 and the fourth insulating film 23A2. However, when oxides are used as insulating films for the first insulating film 23A1 and the fourth insulating film 23A2, if there is an insulating film that is easily oxidized on the upper layer side away from the semiconductor substrate 21, the oxide on the upper layer side acts as a reducing agent. In this case, oxygen is removed from the semiconductor substrate 21 and the interfacial oxide film 23C to the upper oxide film, causing crystal defects or dangling bonds to occur in the semiconductor substrate 21 and the interfacial oxide film 23C, and the interface state deteriorates. In other words, such crystal defects or dangling bonds act as step stones in the forbidden band, increasing the probability of electron transitions and causing the generation of dark current. For example, if the enthalpy required for oxidation of the materials of the first insulating film 23A1, the third insulating film 23B, and the fourth insulating film 23A2 (hereinafter also called enthalpy of oxidation) increases in this order, the interface state of the semiconductor substrate 21 deteriorates.

[0081] In this embodiment, the fixed charge film 23 is provided with a second insulating film 23A3, and the second insulating film 23A3 is an insulating film that is relatively less susceptible to oxidation than the first insulating film 23A1, that is, has a smaller enthalpy required for oxidation. Even if materials are used such that the enthalpies required for oxidation of the insulating films constituting the first insulating film 23A1, the third insulating film 23B, and the fourth insulating film 23A2 increase in that order, the enthalpy required for oxidation of the second insulating film 23A3 is smaller than the enthalpy required for oxidation of the first insulating film 23A1. Therefore, the movement of oxygen from the semiconductor substrate 21 and the interfacial oxide film 23C is blocked, and the generation of dark current can be suppressed.

[0082] When selecting and using materials from the above-mentioned materials for the first insulating film 23A1, the third insulating film 23B, and the fourth insulating film 23A2, if there is an insulating film that is easily oxidized on the upper layer side away from the semiconductor substrate 21, the oxide on the upper layer side may act as a reducing agent, potentially degrading the interface state of the semiconductor substrate 21.

[0083] For example, the magnitude of the enthalpy required for oxidation is Al ２ O ３ > HfO ２ >ZrO ２ >TiO ２ >SiO ２> Ta ２ O ５ >Nb ２ O ５ >V ２ O ３ >Cr ２ O ３ >WO ３ >MoO ２ The order is as follows: materials with a higher enthalpy required for oxidation are more likely to remove oxygen. Materials with a higher enthalpy required for oxidation also act as reducing agents.

[0084] For example, SiO ２ Using this, Al is used as the material for the fourth insulating film 23A2. ２ O ３ When using this method, the insulating film used as the fourth insulating film 23A2 has a higher enthalpy required for oxidation than the insulating film used as the first insulating film 23A1. However, by using a material that is less susceptible to oxidation for the second insulating film 23A3, the movement of oxygen can be blocked.

[0085] The combination of materials for these insulating films is a design consideration, and various materials may be selected from the standpoint of ease of manufacturing and cost. For example, as described above, the material for the second insulating film 23A3 may be a material with a lower enthalpy required for oxidation than the material for the first insulating film 23A1, and the material for the second insulating film 23A3 may be a material with a lower enthalpy required for oxidation than the material for the third insulating film 23B. On the other hand, for example, as described above, the material for the second insulating film 23A3 may be a material with a lower enthalpy required for oxidation than the material for the first insulating film 23A1, and the material for the second insulating film 23A3 may be a material with a higher enthalpy required for oxidation than the material for the third insulating film 23B.

[0086] Figure 6 shows an example of the cross-sectional configuration of the fixed charge film 23' in the comparative example.

[0087] Figure 6A shows an example of the cross-sectional configuration of the fixed charge film 23' including the pixel separation groove 21A in a comparative example, and Figure 6B shows an enlarged view of the dashed line portion.

[0088] For the sake of description, the fixed charge film 23 in the comparative example is denoted as fixed charge film 23'. As shown in FIG. 6A, in the comparative example, the second insulating film 23A3 is not provided on the fixed charge film 23'. The fixed charge film 23' has a laminated structure including three types of insulating films (a first insulating film 23A1, a third insulating film 23B, and a fourth insulating film 23A2) respectively formed in different formation regions.

[0089] As shown in FIG. 6A, the first insulating film 23A1 and the fourth insulating film 23A2 are continuously provided over the entire back surface of the semiconductor substrate 21, that is, from the light-receiving surface S1 of the semiconductor substrate 21 and the wall surface of the pixel isolation trench 21A to the bottom surface thereof. The third insulating film 23B is continuously formed extending to a part of the wall surface of the pixel isolation trench 21A.

[0090] As shown in FIG. 6B, when the light-receiving surface S1 side is enlarged, insulating films are formed in the order of the first insulating film 23A1, the third insulating film 23B, and the fourth insulating film 23A2 from the semiconductor substrate 21 side.

[0091] In the case of the configuration of the fixed charge film 23' of the comparative example, the second insulating film 23A3 is not included. If there is an easily oxidizable insulating film on the upper layer side away from the semiconductor substrate 21, oxygen moves from the semiconductor substrate 21 and the interface oxide film 23C and is taken away to the upper layer side, which causes a phenomenon that the interface state of the semiconductor substrate 21 deteriorates. Dark current may occur in the pixel P as the interface state of the semiconductor substrate 21 deteriorates.

[0092] FIG. 7 is a diagram illustrating the movement of oxygen by taking up the configuration of the fixed charge film 23 in the present embodiment and the configuration of the fixed charge film 23' in the comparative example.

[0093] FIG. 7A is a diagram illustrating the movement of oxygen by taking up the configuration of the fixed charge film 23 in the present embodiment, and FIG. 7B is a diagram illustrating the movement of oxygen by taking up the fixed charge film 23' in the comparative example.

[0094] Further, the materials of the first insulating film 23A1, the second insulating film 23A3, the third insulating film 23B, and the fourth insulating film 23A2 are respectively SiO ２ , Ta ２ O ５ , TiO ２ and Al ２O ３ The explanation assumes that the following is being used. In other words, the enthalpy required for the oxidation of the oxides used in the first insulating film 23A1, the third insulating film 23B, and the fourth insulating film 23A2 is greatest in the order of fourth insulating film 23A2, third insulating film 23B, and first insulating film 23A1. Also, the enthalpy required for the oxidation of the oxide used in the second insulating film 23A3 is smaller than that of the first insulating film 23A1 and also smaller than that of the third insulating film 23B.

[0095] As shown in Figure 7A, the fixed charge film 23 in this embodiment includes a second insulating film 23A3 between the first insulating film 23A1 and the third insulating film 23B. Since the enthalpy required for oxidation of the oxide film used for the third insulating film 23B is greater than that of the first insulating film 23A1, oxygen would normally move from the semiconductor substrate 21 and the interfacial oxide film 23C to the third insulating film 23B via the first insulating film 23A1. However, by interposing the second insulating film 23A3, which is less susceptible to oxidation, the movement of oxygen to the upper layer is blocked. Because the movement of oxygen is blocked, deterioration of the interface state of the semiconductor substrate 21 can be prevented.

[0096] Furthermore, in order to block the movement of oxygen between insulating films, in two adjacent insulating films among the first insulating film 23A1, the second insulating film 23A3, the third insulating film 23B, and the fourth insulating film 23A2, the upper insulating film may be made of a material that is less susceptible to oxidation than the lower insulating film.

[0097] On the other hand, as shown in Figure 7B, the fixed charge film 23' in the comparative example does not include a second insulating film 23A3 between the first insulating film 23A1 and the third insulating film 23B. Because the enthalpy required for oxidation of the oxide film used for the third insulating film 23B is greater than that of the first insulating film 23A1, oxygen moves from the semiconductor substrate 21 and the interfacial oxide film 23C to the first insulating film 23A1 and the third insulating film 23B. Also, because the enthalpy required under the umbrella of the oxide film used for the fourth insulating film 23A2 is greater than that of the third insulating film 23B, oxygen moves from the third insulating film 23B to the fourth insulating film 23A2. When oxygen is removed from the interfacial oxide film 23C to the fourth insulating film 23A2, the interfacial state of the semiconductor substrate 21 deteriorates, and dark current may be generated.

[0098] Figures 8 and 9 are examples of cross-sectional views illustrating the method for forming the fixed charge film 23 in this embodiment.

[0099] Figure 8A is a cross-sectional view illustrating the method for forming the first insulating film 23A1 of the stationary charge film 23 in this embodiment, and Figure 8B is a cross-sectional view illustrating the method for forming the second insulating film 23A3 of the stationary charge film 23 in this embodiment. Figure 9A is a cross-sectional view illustrating the method for forming the third insulating film 23B of the stationary charge film 23 in this embodiment, and Figure 9B is a cross-sectional view illustrating the method for forming the fourth insulating film 23A2 of the stationary charge film 23 in this embodiment. In the following, the method for manufacturing the pixel P will be explained, mainly focusing on the method for forming the stationary charge film 23, using these figures.

[0100] First, the method for forming the semiconductor substrate 21 and the pixel separation grooves 21A provided on the semiconductor substrate 21 will be described. First, a semiconductor substrate 21 equipped with various transistors and peripheral circuits is formed. For example, a Si substrate is used for the semiconductor substrate 21, and transistors such as transfer transistors and peripheral circuits such as logic circuits are provided near the surface (surface S2) of the semiconductor substrate 21. Next, impurity semiconductor regions are formed in the semiconductor substrate 21 by ion implantation. Specifically, n-type semiconductor regions (photoelectric conversion sections 22) are formed at positions corresponding to each pixel P, and p-type semiconductor regions are formed between each pixel. Subsequently, pixel separation grooves 21A are formed, for example, by dry etching, at predetermined positions on the light-receiving surface S1 of the semiconductor substrate 21, specifically in the p-type semiconductor regions provided between each pixel P, with a depth (h) of 1 nm. After the pixel separation grooves 21A are formed, a fixed charge film 23 is formed on the light-receiving surface S1 side of the semiconductor substrate 21.

[0101] Next, we will describe an example in which the insulating films are composed in the following order: first insulating film 23A1, second insulating film 23A3, third insulating film 23B, and fourth insulating film 23A2.

[0102] The first insulating film 23A1 is formed, for example, using the ALD method or the MOCVD method. As shown in Figure 8A, the first insulating film 23A1 is formed on the light-receiving surface S1 side of the semiconductor substrate 21, extending from the wall side to the bottom side of the pixel separation groove 21A. When the first insulating film 23A1 is deposited using the ALD method, for example, for each condition, the substrate temperature is set to 200 to 500°C, the precursor flow rate to 10 to 500 sccm, the precursor irradiation time to 1 to 15 seconds, and ozone (O) is used. ３ The flow rate of the solvent may be set to 5 to 50 sccm. When the first insulating film 23A1 is deposited by the ALD method, an interfacial oxide film 23C is simultaneously formed on the surface of the semiconductor substrate 21 with a thickness of about 1 nm. When the first insulating film 23A1 is deposited using the MOCVD method, for example, the first insulating film 23A1 may be formed at a substrate temperature of 100 to 600°C.

[0103] The second insulating film 23A3 is formed, for example, using the MOCVD method. Figure 8B shows an example in which the second insulating film 23A3 is formed only on the light-receiving surface S1, but the second insulating film 23A3 may also be formed to be continuous with a part of the wall side of the pixel separation groove 21A that is continuous with the light-receiving surface S1, or to extend from the wall side to the bottom side of the pixel separation groove 21A that is continuous with the light-receiving surface S1.

[0104] The third insulating film 23B is formed, for example, by the PVD method. As shown in Figure 9A, the third insulating film 23B is formed on the second insulating film 23A3. For example, for each condition, the pressure is 0.01 to 50 Pa, the power is 500 to 2000 W, the Ar flow rate is 5 to 50 sccm, and oxygen (O) is used. ２ The flow rate of the PVD method may be set to 5 to 50 sccm. The third insulating film 23B formed by the PVD method is formed only on a portion of the wall surface on the light-receiving surface S1 side of the semiconductor substrate 21 and on the pixel separation groove 21A side continuous with the light-receiving surface S1 due to the shadowing effect, and is not formed inside the pixel separation groove 21A (most of the wall surface and the bottom surface).

[0105] The fourth insulating film 23A2 is formed using, for example, an ALD method or a MOCVD method. As shown in FIG. 9B, the fourth insulating film 23A2 is formed on the third insulating film 23B and the first insulating film 23A1 that covers the wall surface and the bottom surface of the pixel isolation trench 21A. The respective conditions in the ALD method and the MOCVD method may be the same as those described above.

[0106] In this way, each insulating film is formed on the entire back surface of the semiconductor substrate 21 using an ALD method or the like. Accordingly, even if there is an easily oxidizable insulating film on the upper layer side away from the semiconductor substrate 21, the movement of oxygen from the semiconductor substrate 21 and the interfacial oxide film 23C is blocked, making it possible to form the fixed charge film 23 that suppresses dark current.

[0107] Furthermore, after the formation of the fixed charge film 23, for example, SiO is used as the protective film 24 ２ A film is formed on the fixed charge film 23 of the light-receiving surface S1 using, for example, an ALD method or a CVD method, and is embedded in the pixel isolation trench 21A. Subsequently, after a W film, for example, is formed on the protective film 24 using a sputtering method or a CVD method, a light-shielding film 42 is formed by patterning such as photolithography. Next, a planarization film 43 is formed on the protective film 24 and the light-shielding film 42, and a Bayer-arranged color filter 44 and an on-chip lens 41, for example, are sequentially formed on the planarization film 43. Thus, the pixel P is formed.

[0108] According to the present embodiment, in the solid-state imaging device 10, the fixed charge film 23 constituting the pixel P includes four different types of insulating films. Furthermore, a material that is relatively less likely to be oxidized than the first insulating film 23A1 is used for the second insulating film 23A3. This makes it possible to block the movement of oxygen from the semiconductor substrate 21 and the interfacial oxide film 23C, and appropriately suppress the generation of dark current.

[0109] Furthermore, according to the present embodiment, in the solid-state imaging device 10, since the fixed charge film 23 constituting the pixel P includes the first insulating film 23A1 and the fourth insulating film 23A2, the interface state of the semiconductor substrate 21 is improved.

[0110] Furthermore, according to this embodiment, the solid-state imaging device 10 includes a third insulating film 23B in the fixed charge film 23 that constitutes the pixel P, thereby providing an anti-reflective effect to the fixed charge film 23.

[0111] Furthermore, according to this embodiment, the first insulating film 23A1 and the fourth insulating film are formed by a different method than the third insulating film 23B. This prevents damage to the entire back surface of the semiconductor substrate 21, including the grooves, and avoids deterioration of the interface properties, compared to the case where all the fixed charge films 23 are formed by a PVD method with a high deposition rate.

[0112] The present disclosure has been described above with reference to embodiments, their modifications, application examples, and application examples. However, the present disclosure is not limited to the above embodiments, and various modifications are possible. The effects described herein are merely illustrative. The effects of the present disclosure are not limited to those described herein. The present disclosure may have effects other than those described herein.

[0113] Furthermore, for example, this disclosure can take the following form.

[0114] (1) A solid-state imaging device comprising: a semiconductor substrate having a photoelectric conversion unit for each pixel; a pixel separation groove provided on the semiconductor substrate; and a fixed charge film continuously provided from the light-receiving surface side of the photoelectric conversion unit to the wall and bottom sides of the pixel separation groove, wherein the fixed charge film includes: a first insulating film continuously provided from the light-receiving surface side to the wall and bottom sides of the pixel separation groove; a second insulating film partially provided on at least the light-receiving surface side of the first insulating film; a third insulating film partially provided on at least the light-receiving surface side of the second insulating film; and a fourth insulating film continuously provided on the third insulating film from the light-receiving surface side to the wall and bottom sides of the pixel separation groove.

[0115] (2) The solid-state imaging apparatus according to item (1), wherein the enthalpy required for the oxidation of the second insulating film is smaller than the enthalpy required for the oxidation of the first insulating film.

[0116] (3) The solid-state imaging apparatus described in item (1), wherein the enthalpy required for the oxidation of the second insulating film is smaller than the enthalpy required for the oxidation of the third insulating film.

[0117] (4) The first insulating film, the third insulating film, and the fourth insulating film are each made of hafnium oxide (HfO ２ ), zirconium oxide (ZrO ２ ), aluminum oxide (Al ２ O ３ ) and tantalum oxide (Ta ２ O ５ A solid-state imaging device as described in item (1), formed using any of the following:

[0118] (5) The second insulating film is titanium oxide (TiO ２ ), tantalum oxide (Ta ２ O ５ ), niobium pentoxide (Nb ２ O ５ ), vanadium trioxide (V ２ O ３ ), chromium oxide (Cr ２ O ３ ), tungsten oxide (WO ３ ) and molybdenum oxide (MoO ２ A solid-state imaging device as described in item (1), formed using any of the following:

[0119] (6) The solid-state imaging apparatus according to item (1), wherein the first insulating film and the fourth insulating film are formed using the same material.

[0120] (7) The solid-state imaging apparatus according to item (1), wherein the film thicknesses of the first insulating film, the second insulating film, and the fourth insulating film are each 1 nm or more and 25 nm or less.

[0121] (8) The solid-state imaging apparatus according to item (7), wherein the total thickness of the first insulating film, the second insulating film, and the fourth insulating film is 3 nm or more and 100 nm or less.

[0122] (9) The solid-state imaging apparatus according to item (1), wherein the thickness of the third insulating film is 10 nm or more and 80 nm or less.

[0123] (10) The solid-state imaging apparatus according to item (1), further comprising an interfacial oxide film between the semiconductor substrate and the first insulating film.

[0124] (11) The solid-state imaging apparatus according to item (10), wherein the thickness of the interfacial oxide film is greater than 0 nm and less than or equal to 2 nm.

[0125] (12) A method for manufacturing a solid-state imaging device, comprising the steps of forming a fixed charge film on the light-receiving surface of a semiconductor substrate having a photoelectric conversion unit for each pixel and a pixel separation groove, wherein the manufacturing step of the fixed charge film includes forming a first insulating film continuous from the light-receiving surface side of the semiconductor substrate to the wall and bottom sides of the pixel separation groove, partially forming a second insulating film on at least the light-receiving surface side of the first insulating film, partially forming a third insulating film on at least the light-receiving surface side of the second insulating film, and forming a fourth insulating film continuous from the light-receiving surface side of the third insulating film to the wall and bottom sides of the pixel separation groove.

[0126] (13) The method for manufacturing a solid-state imaging apparatus according to item (12), wherein the enthalpy required for the oxidation of the second insulating film is smaller than the enthalpy required for the oxidation of the first insulating film.

[0127] (14) The method for manufacturing a solid-state imaging apparatus according to item (12), wherein the enthalpy required for the oxidation of the second insulating film is smaller than the enthalpy required for the oxidation of the third insulating film.

[0128] (15) A method for manufacturing a solid-state imaging apparatus according to item (12), wherein the first insulating film and the fourth insulating film are formed by atomic layer deposition (ALD) or metal-organic vapor deposition (MOCVD).

[0129] (16) The method for manufacturing a solid-state imaging apparatus according to item (12), wherein the second insulating film is formed by the MOCVD method.

[0130] (17) A method for manufacturing a solid-state imaging apparatus according to item (12), wherein the third insulating film is formed by physical vapor deposition.

[0131] (18) The first insulating film, the third insulating film and the fourth insulating film are each made of HfO ２ , ZrO ２ Al ２ O ３ and Ta ２ O ５ A method for manufacturing a solid-state imaging device as described in item (12), wherein the device is formed using one of the following.

[0132] (19) The second insulating film is made of TiO ２ Ta ２ O ５ Nb ２ O ５ , V ２ O ３ , Cr ２ O ３ WO ３ and MoO ２ A method for manufacturing a solid-state imaging device as described in item (12), wherein the device is formed using one of the following.

[0133] (20) Electronic device comprising a solid-state imaging device, wherein the solid-state imaging device comprises: a semiconductor substrate having a photoelectric conversion unit for each pixel; a pixel separation groove provided on the semiconductor substrate; and a fixed charge film continuously provided from the light-receiving surface side of the photoelectric conversion unit to the wall and bottom sides of the pixel separation groove, wherein the fixed charge film comprises: a first insulating film continuously provided from the light-receiving surface side to the wall and bottom sides of the pixel separation groove; a second insulating film partially provided on at least the light-receiving surface side of the first insulating film; a third insulating film partially provided on at least the light-receiving surface side of the second insulating film; and a fourth insulating film continuously provided on the third insulating film from the light-receiving surface side to the wall and bottom sides of the pixel separation groove.

[0134] 10: Solid-state imaging device, 11: Support substrate, 12: Vertical drive unit, 13: AD conversion unit, 14: Horizontal drive unit, 15: Control unit, 16: Signal processing unit, 17: Data storage unit, 18: Input / output unit, 19: Pixel array unit, 20: Light receiving unit, 21: Semiconductor substrate, 21A: Pixel separation groove, 22: Photoelectric conversion unit, 23: Fixed charge film, 23': Fixed charge film, 23A1: First insulating film, 23A2: Fourth insulating film, 23A3: Second insulating film, 23B: Third insulating film, 24: Protective film, 30: Wiring layer, 31: Interlayer insulating film, 32: Wiring, 32A: Wiring, 32B: Wiring, 32C: Wiring, 40: Light collecting unit, 41: On-chip lens, 42: Light-shielding film, 43: Planarization film, 44: Color filter, 100: Imaging device, 139: Signal line, 209: Signal line, 210: Imaging lens, 220: Recording unit, 230: Imaging control unit

Claims

1. A solid-state imaging device comprising: a semiconductor substrate having a photoelectric conversion unit for each pixel; a pixel separation groove provided on the semiconductor substrate; and a fixed charge film continuously provided from the light-receiving surface side of the photoelectric conversion unit to the wall and bottom sides of the pixel separation groove, wherein the fixed charge film includes: a first insulating film continuously provided from the light-receiving surface side to the wall and bottom sides of the pixel separation groove; a second insulating film partially provided on at least the light-receiving surface side of the first insulating film; a third insulating film partially provided on at least the light-receiving surface side of the second insulating film; and a fourth insulating film continuously provided on the third insulating film from the light-receiving surface side to the wall and bottom sides of the pixel separation groove.

2. The solid-state imaging apparatus according to claim 1, wherein the enthalpy required for the oxidation of the second insulating film is smaller than the enthalpy required for the oxidation of the first insulating film.

3. The solid-state imaging apparatus according to claim 1, wherein the enthalpy required for the oxidation of the second insulating film is smaller than the enthalpy required for the oxidation of the third insulating film.

4. The first insulating film, the third insulating film, and the fourth insulating film are each made of hafnium oxide (HfO ２ ), zirconium oxide (ZrO ２ ), aluminum oxide (Al ２ O ３ ) and tantalum oxide (Ta ２ O ５ A solid-state imaging apparatus according to claim 1, formed using any of the following:

5. The second insulating film is made of titanium oxide (TiO ２ ), tantalum oxide (Ta ２ O ５ ), niobium pentoxide (Nb ２ O ５ ), vanadium trioxide (V ２ O ３ ), chromium oxide (Cr ２ O ３ ), tungsten oxide (WO ３ ) and molybdenum oxide (MoO ２ ), wherein the solid-state imaging device according to claim 1 is formed using any one of the above materials.

6. The solid-state imaging apparatus according to claim 1, wherein the first insulating film and the fourth insulating film are formed using the same material.

7. The solid-state imaging apparatus according to claim 1, wherein the film thicknesses of the first insulating film, the second insulating film, and the fourth insulating film are each 1 nm or more and 25 nm or less.

8. The solid-state imaging apparatus according to claim 7, wherein the total thickness of the first insulating film, the second insulating film, and the fourth insulating film is 3 nm or more and 100 nm or less.

9. The solid-state imaging apparatus according to claim 1, wherein the thickness of the third insulating film is 10 nm or more and 80 nm or less.

10. The solid-state imaging apparatus according to claim 1, further comprising an interfacial oxide film between the semiconductor substrate and the first insulating film.

11. The solid-state imaging apparatus according to claim 10, wherein the thickness of the interfacial oxide film is greater than 0 nm and less than or equal to 2 nm.

12. A method for manufacturing a solid-state imaging device, comprising the step of forming a fixed charge film on the light-receiving surface of a semiconductor substrate having a photoelectric conversion unit for each pixel and a pixel separation groove, wherein the manufacturing step of the fixed charge film includes forming a first insulating film continuous from the light-receiving surface side of the semiconductor substrate to the wall and bottom sides of the pixel separation groove, partially forming a second insulating film on at least the light-receiving surface side of the first insulating film, partially forming a third insulating film on at least the light-receiving surface side of the second insulating film, and forming a fourth insulating film continuous from the light-receiving surface side of the third insulating film to the wall and bottom sides of the pixel separation groove.

13. The method for manufacturing a solid-state imaging apparatus according to claim 12, wherein the enthalpy required for the oxidation of the second insulating film is smaller than the enthalpy required for the oxidation of the first insulating film.

14. The method for manufacturing a solid-state imaging apparatus according to claim 12, wherein the enthalpy required for the oxidation of the second insulating film is smaller than the enthalpy required for the oxidation of the third insulating film.

15. The method for manufacturing a solid-state imaging apparatus according to claim 12, wherein the first insulating film and the fourth insulating film are formed by atomic layer deposition (ALD) or metal-organic vapor deposition (MOCVD).

16. The method for manufacturing a solid-state imaging apparatus according to claim 12, wherein the second insulating film is formed by the MOCVD method.

17. The method for manufacturing a solid-state imaging apparatus according to claim 12, wherein the third insulating film is formed by physical vapor deposition.

18. The first insulating film, the third insulating film, and the fourth insulating film are each made of HfO ２ , ZrO ２ Al ２ O ３ and Ta ２ O ５ A method for manufacturing a solid-state imaging device according to claim 12, wherein the device is formed using any of the following.

19. The second insulating film is made of TiO ２ Ta ２ O ５ , Nb ２ O ５ , V ２ O ３ , Cr ２ O ３ WO ３ and MoO ２ A method for manufacturing a solid-state imaging device according to claim 12, wherein the device is formed using any of the following.

20. Electronic device comprising a solid-state imaging device, wherein the solid-state imaging device includes a semiconductor substrate having a photoelectric conversion unit for each pixel, a pixel separation groove provided on the semiconductor substrate, and a fixed charge film continuously provided from the light-receiving surface side of the photoelectric conversion unit to the wall and bottom sides of the pixel separation groove, wherein the fixed charge film includes a first insulating film continuously provided from the light-receiving surface side to the wall and bottom sides of the pixel separation groove, a second insulating film partially provided on at least the light-receiving surface side of the first insulating film, a third insulating film partially provided on at least the light-receiving surface side of the second insulating film, and a fourth insulating film continuously provided on the third insulating film from the light-receiving surface side to the wall and bottom sides of the pixel separation groove.

Images