Recording device

Abstract

This recording device comprises a first IC and a second IC. The first IC outputs: a first signal including a command, an address, and discharge data; and a communication signal including a clock signal. The second IC is communicably connected to the first IC, and outputs, to a discharge unit and on the basis of the communication signal, a drive signal for driving the discharge unit. When the command is either at a high level or at a low level, the second IC stores the discharge data in a storage location corresponding to the address. When the command is at the other of the high level or the low level, the second IC transmits, to the first IC, a second signal including the data stored in the storage location corresponding to the address.

Description

Recording apparatus

[0001] The present disclosure relates to a recording apparatus.

[0002] Conventionally, there has been known a recording apparatus that records images, characters, and the like by ejecting liquid from a liquid ejection head toward a recording medium (see, for example, Patent Document 1). Patent Document 1 is configured to include a master control unit and a slave control unit that control image formation, and a serial communication line that connects the master control unit and the slave control unit to perform serial communication. In Patent Document 1, the configuration is further such that a plurality of notification signal lines for notifying a state between the master control unit and the slave control unit are provided, so that the master control unit identifies the cause of an abnormality that has occurred in serial communication.

[0003] Japanese Unexamined Patent Publication No. 2017-045154

[0004] A recording apparatus according to one aspect of the present disclosure includes a first IC and a second IC. The first IC outputs a first signal including a command, an address, and ejection data, and a communication signal including a clock signal. The second IC is communicably connected to the first IC, and outputs a drive signal for driving an ejection unit to the ejection unit based on the communication signal. When the command is at one of a high level and a low level, the second IC stores the ejection data in a storage location corresponding to the address. When the command is at the other of the high level and the low level, the second IC transmits a second signal including data stored in a storage location corresponding to the address to the first IC.

[0005] Figure 1 is a schematic side view showing a printer according to an embodiment. Figure 2 is a schematic top view showing a printer according to an embodiment. Figure 3 is a block diagram showing an example of the configuration of a liquid ejection head. Figure 4 is a schematic top view showing a liquid ejection head. Figure 5 is a schematic side view showing a liquid ejection head. Figure 6A is a schematic diagram showing an example of mounting a control IC on a substrate. Figure 6B is a schematic diagram showing another example of mounting a control IC on a substrate. Figure 7A is a diagram for explaining register settings. Figure 7B is a diagram for explaining register settings. Figure 8 is a diagram for explaining communication signals transmitted from the control IC to multiple drive ICs. Figure 9 is a diagram for explaining abnormality detection signals transmitted from multiple drive ICs to the control IC. Figure 10A is a diagram showing a specific example of abnormality detection. Figure 10B is a diagram showing a specific example of abnormality detection. Figure 10C is a diagram showing a specific example of abnormality detection. Figure 10D is a diagram showing a specific example of abnormality detection. Figure 11A is a diagram showing a specific example of abnormality detection. Figure 11B is a diagram showing a specific example of abnormality detection. Figure 11C shows a specific example of anomaly detection. Figure 12 is a diagram summarizing specific examples of anomalies that a control IC can detect.

[0006] The embodiments for implementing the recording device according to this disclosure (hereinafter referred to as "Embodiments") will be described in detail below with reference to the drawings. However, this disclosure is not limited by these embodiments. Furthermore, each embodiment can be combined as appropriate, provided that the processing content is not inconsistent. Also, the same parts are denoted by the same reference numerals in each of the following embodiments, and redundant descriptions are omitted.

[0007] Conventionally, recording devices are known that record images, characters, etc., by discharging liquid from a liquid discharging head toward a recording medium (see, for example, Patent Document 1 above). Patent Document 1 is configured to include a master control unit and a slave control unit that control the formation of images, and a serial communication line that connects the master control unit and the slave control unit for serial communication. Patent Document 1 is further configured to include a plurality of notification signal lines that notify the status between the master control unit and the slave control unit, so that the master control unit can identify the cause of an abnormality that occurred in the serial communication.

[0008] Incidentally, the recording device includes, for example, a first IC and a second IC, and the second IC is configured to drive the dispensing section of the liquid dispensing head based on a communication signal from the first IC. Furthermore, in the recording device, for example at startup, register settings are performed to pre-set, using serial communication, what kind of drive signal to use to control the dispensing section.

[0009] However, in the conventional technology, the second IC did not have a so-called read function to transmit a signal to the first IC during register setting communication. Therefore, in the conventional technology, if an abnormality occurred in the communication signal transmitted to the second IC during register setting, the first IC could not identify the cause of such an abnormality, leaving room for improvement.

[0010] Therefore, there is a need for a recording device that can solve the above problems and identify the cause of anomalies that occur during register setting.

[0011] <About the Printer Configuration> First, an overview of the printer 100, which is an example of a recording device according to the embodiment, will be described with reference to Figures 1 and 2. Figure 1 is a schematic side view showing the printer 100 according to the embodiment. Figure 2 is a schematic top view showing the printer 100 according to the embodiment. The printer 100 according to the embodiment is, for example, a color inkjet printer. For the sake of clarity, Figure 1 shows a three-dimensional Cartesian coordinate system including the X-axis, where the right direction of the paper is the positive direction, and the Y-axis, where the back direction of the paper is the positive direction. Such a Cartesian coordinate system is also shown in other drawings used in the explanation below.

[0012] Furthermore, in the following explanation, for convenience, the positive Z-axis direction may be referred to as "up." The X-axis direction is the direction in which the printing paper P is transported. Also, a plan view refers to looking from the positive Z-axis side towards the negative Z-axis direction.

[0013] As shown in Figure 1, the printer 100 includes a head module M, a paper feed roller 101, guide rollers 102A to 102C, a plurality of transport rollers 103, a recovery roller 104, a dryer 105, and a coating machine 106. Furthermore, the printer 100 includes a sensor unit 107 and a control unit 200. The head module M includes a plurality (for example, four) of liquid discharge heads 1 and a fixing plate 109.

[0014] The control unit 200 controls the operation of the multiple liquid discharge heads 1, paper feed roller 101, guide rollers 102A to 102C, multiple transport rollers 103, recovery roller 104, dryer 105, coating machine 106, and sensor unit 107 in the head module M.

[0015] The printer 100 records images or characters on the printing paper P by depositing droplets of liquid onto the paper P. The printing paper P is an example of a recording medium. Before use, the printing paper P is wound around the paper feed roller 101. The printer 100 then transports the printing paper P from the paper feed roller 101 to the coating machine 106 via the guide roller 102A.

[0016] The coating machine 106 uniformly applies the coating agent to the printing paper P. This allows the printing paper P to undergo surface treatment, thereby improving the print quality of the printer 100.

[0017] The printer 100 transports the coated printing paper P to the lower part of the head module M using transport rollers 103. The fixing plate 109 of the head module M is a rectangular flat plate and is located close to the upper part of the printing paper P being transported by the transport rollers 103.

[0018] The liquid discharge head 1 of the head module M is formed in an elongated shape such that the Y-axis direction is the longitudinal direction. Multiple liquid discharge heads 1 are fixed to a fixing plate 109. The liquid discharge heads 1 are fixed to the fixing plate 109 at both ends in the longitudinal direction, for example. The multiple liquid discharge heads 1 are positioned on the fixing plate 109 so as to be aligned along the transport direction (X-axis direction) of the printing paper P. Also, the liquid discharge heads 1 are positioned so that their longitudinal direction is perpendicular to the transport direction of the printing paper P. The distance between the liquid discharge head 1 and the printing paper P is, for example, about 0.5 to 20 mm. The configuration of the liquid discharge head 1 will be described later with reference to Figures 3 to 5.

[0019] The control unit 200 controls the liquid ejection head 1 based on image or text data (hereinafter sometimes referred to as "image data") and ejects droplets toward the printing paper P. More specifically, the liquid ejection head 1 includes a head control unit 10 (see Figure 3). The head control unit 10 controls the operation of the liquid ejection head 1 based on the image data input from the control unit 200, which will be described later.

[0020] As described above, the printer 100 according to this embodiment is a so-called line printer in which the liquid ejection head 1 is fixed inside the printer 100. However, the printer 100 according to this embodiment is not limited to a line printer, and may be a so-called serial printer. A serial printer is a printer that alternately performs the operation of recording while moving the liquid ejection head 1 in a direction intersecting the transport direction of the printing paper P, for example, in a nearly perpendicular direction, and transporting the printing paper P.

[0021] Each liquid ejection head 1 is supplied with liquid of the same color, and four liquid ejection heads 1 can print four different colors of liquid. The ink colors ejected from each liquid ejection head 1 are, for example, magenta (M), yellow (Y), cyan (C), and black (K). By depositing these liquids onto the printing paper P, the printer 100 can print a color image. The types and number of liquid colors can be changed as appropriate. For example, if the color to be printed on the printing paper P is a single color and the printing is limited to the area that can be printed by one liquid ejection head 1, then the printer 100 may only have one liquid ejection head 1. Alternatively, one liquid ejection head 1 may be supplied with several different colors of liquid, allowing one liquid ejection head 1 to print several different colors of liquid.

[0022] Furthermore, in addition to printing colored liquids, the printer 100 may also print a liquid such as a coating agent uniformly or in a pattern using the liquid ejection head 1 to treat the surface of the printing paper P. Alternatively, the printer 100 may apply the coating agent from a coating machine (not shown) instead of the liquid ejection head 1.

[0023] The printing paper P processed by the liquid discharge head 1 is transported by the transport roller 103 and guide roller 102B and passes through the inside of the dryer 105. The dryer 105 dries the printing paper P. The printing paper P dried in the dryer 105 is transported by the guide roller 102C and collected by the recovery roller 104. By drying in the dryer 105 in this way, it is possible to suppress the adhesion of overlapping printed paper sheets P to each other and friction of undried liquid at the recovery roller 104.

[0024] The sensor unit 107 is composed of a position sensor, a speed sensor, or a temperature sensor, etc. Based on the information from the sensor unit 107, the control unit 200 can determine the state of each part of the printer 100 and control each part of the printer 100.

[0025] The printer 100 may include a cleaning unit for cleaning the liquid ejection head 1. The cleaning unit cleans the liquid ejection head 1, for example, by wiping or capping.

[0026] The recording medium may be other than printing paper P, such as rolled cloth. The printer 100 may also transport the recording medium on a conveyor belt. In this way, the printer 100 can use sheets of paper, cut cloth, wood, or tiles as recording media. Furthermore, the printer 100 may print wiring patterns for electronic devices by ejecting a liquid containing conductive particles from the liquid ejection head 1. In addition, the printer 100 may produce chemical compounds by ejecting a predetermined amount of liquid chemical agent or a liquid containing a chemical agent from the liquid ejection head 1 towards a reaction vessel and allowing it to react.

[0027] <Regarding the configuration of the liquid dispensing head> Next, an example of the configuration of the liquid dispensing head 1 according to the embodiment will be described with reference to Figure 3. Figure 3 is a block diagram showing an example of the configuration of the liquid dispensing head 1.

[0028] As shown in Figure 3, the liquid discharge head 1 comprises a head control unit 10 and a plurality (for example, eight) discharge units 1A. Each discharge unit 1A is a discharge member that discharges liquid. Specifically, the liquid discharge head 1 is supplied with liquid, for example, ink, from a liquid tank (not shown), and discharges liquid (droplets). More specifically, each discharge unit 1A includes a liquid supply path, nozzles, piezoelectric elements, etc. (not shown). Liquid is supplied from the liquid tank to the liquid supply path. The piezoelectric element is, for example, a piezoelectric element (piezo element). The piezoelectric element deforms when a voltage is applied. As the piezoelectric element deforms, the discharge unit 1A discharges the liquid from the liquid supply path through the nozzles onto the printing paper P (see Figures 1 and 2).

[0029] The head control unit 10 controls the liquid discharge head 1. The head control unit 10 includes a control IC 11 and a drive IC 12.

[0030] The control IC 11 can communicate with the control unit 200 wirelessly or via a wired connection. The control IC 11 operates in accordance with various operation instructions input from the control unit 200. The control IC 11 is implemented by an integrated circuit such as an FPGA (Field Programmable Gate Array). Note that the control IC 11 is an example of the first IC.

[0031] Multiple drive ICs (for example, eight) are provided. More specifically, the number of drive ICs 12 is the same as the number of dispensing units 1A. Each of the multiple drive ICs 12 drives the corresponding dispensing unit 1A. Note that drive IC 12 is an example of a second IC.

[0032] The driver IC 12 includes a register 13. The register 13 is a memory device capable of storing various types of data. While volatile memory can be used as the register 13, it is not limited to this; for example, non-volatile memory may also be used. The register 13 is provided with multiple storage locations for storing data. Each of the multiple storage locations is assigned an address to identify that location.

[0033] The control IC 11 transmits various control signals to the drive IC 12, and the drive IC 12 operates based on the transmitted control signals.

[0034] Specifically, the control IC 11 uses serial communication to set registers for the drive IC 12. Register setting is a process that, for example, when the printer 100 is started up, pre-sets, using serial communication, what kind of drive signal will be used to control the ejection unit 1A. More specifically, there are multiple sizes of droplets ejected from the ejection unit 1A. Therefore, before the actual printing process, ejection data (specifically, data indicating the shape of the voltage waveform applied to the piezoelectric element) that can be ejected for each of the multiple sizes of droplets is pre-set in the register 13. After register setting, the control IC 11 generates a control signal based on image data input from the control unit 200 (see Figure 1) and outputs the generated control signal to the drive IC 12. The control signal includes information indicating the size of the droplets. When the drive IC 12 receives a control signal from the control IC 11, it reads the ejection data corresponding to the input control signal from the register 13 and outputs a drive signal corresponding to the ejection data to the ejection unit 1A. As a result, droplets of a size corresponding to the control signal are ejected from the ejection unit 1A. Further details regarding the process of setting the registers described above will be explained later.

[0035] Here, a specific configuration example of the liquid discharge head 1 according to this embodiment will be described with reference to Figures 4 and 5. Figure 4 is a schematic plan view showing the liquid discharge head 1 according to this embodiment. Figure 5 is a schematic side view showing the liquid discharge head 1 according to this embodiment. Note that Figure 5 is a view of the liquid discharge head 1 shown in Figure 4 from the direction of arrow A.

[0036] As shown in Figures 4 and 5, the liquid discharge head 1 comprises a discharge section 1A, a base member 2, a head substrate 3, a flexible substrate 4, a control IC 11, and a drive IC 12. The base member 2 is formed in an elongated shape such that the Y-axis direction is the longitudinal direction. The base member 2 is a flat plate-shaped member.

[0037] The discharge unit 1A is attached and fixed to the lower surface of the base member 2. Specifically, as shown in Figure 4, four discharge units 1A are positioned in a staggered pattern in front of the printing paper P in the transport direction (positive X-axis direction), and four are positioned behind it. The discharge units 1A are positioned such that the centers of each liquid discharge head 1 do not overlap in the transport direction of the printing paper P.

[0038] The head board 3 is attached to and fixed to the base member 2. For example, the head board 3 is flat and formed in an elongated shape. The head board 3 is positioned relative to the base member 2 such that its longitudinal direction is along the Y-axis and is erected and fixed so as to extend in the positive Z-axis direction. Furthermore, the head board 3 is positioned on the base member 2 so as to be near the center in the X-axis direction.

[0039] The control IC 11 is mounted on the head board 3. For example, the control IC 11 is positioned near the center in the longitudinal direction (Y-axis direction) on the head board 3. The control IC 11 is also located on the upper side (positive Z-axis direction) of the head board 3. Although not shown in the diagram, the head board 3 also mounts other electronic components for controlling the liquid discharge head 1 in addition to the control IC 11.

[0040] The flexible substrates 4 are electrically connected to the head substrate 3 via connectors (not shown). For example, a COF substrate (Chip on Film) can be used as the flexible substrate 4. There are multiple flexible substrates 4 (for example, eight). Each of the multiple flexible substrates 4 is mounted on a drive IC 12. Of the multiple flexible substrates 4, four are connected to one side 3a of the head substrate 3, and the other four are connected to the other side 3b of the head substrate 3. Specifically, the drive ICs 12 mounted on the flexible substrates 4 drive the ejection unit 1A, as described above. Therefore, the flexible substrates 4 are positioned in a manner corresponding to the ejection unit 1A. Specifically, as shown in Figure 4, four flexible substrates 4 are positioned in a staggered pattern in front of the printing paper P in the transport direction (positive X-axis direction), and four are positioned behind it.

[0041] Next, an example of mounting the substrate of the control IC 11 will be described with reference to FIG. 6A. FIG. 6A is a diagram schematically showing an example of mounting the substrate of the control IC 11.

[0042] As shown in FIG. 6A, the control IC 11 is mounted on the head substrate 3. The control IC 11 mounted on the head substrate 3 outputs a control signal generated from image data to the drive IC 12. As described above, the drive IC 12 is mounted on the flexible substrate 4 (see FIGS. 4 and 5). The drive IC 12 outputs a drive signal corresponding to the control signal to the piezoelectric body of the ejection unit 1A via the flexible substrate.

[0043] It should be noted that although an example in which the control IC 11 is mounted on the head substrate 3 has been described above, the present invention is not limited thereto. FIG. 6B is a diagram schematically showing another example of mounting the substrate of the control IC 11. As shown in FIG. 6B, the control IC 11 may be mounted on another substrate 3x different from the head substrate 3 (for example, a video substrate). Note that the mounting example shown in FIG. 6A is used for a line printer, and the mounting example shown in FIG. 6B is used for a serial printer, but the present invention is not limited thereto.

[0044] <Regarding Communication Processing> Next, communication processing performed between the control IC 11 and the drive IC 12 will be described in detail. The communication processing includes the above-described communication processing related to register setting and communication processing when actually performing printing on the printing paper P, and here, the communication processing related to register setting will be described.

[0045] FIGS. 7A and 7B are diagrams for explaining register setting. Note that FIG. 7A shows a case where communication is normally performed in register setting, and FIG. 7B shows a case where an abnormality occurs in register setting.

[0046] Here, the printer 100 according to the present embodiment has a "Write function" in which the drive IC 12 writes data to the register 13 in accordance with an instruction from the control IC 11. FIGS. 7A and 7B show communication states during writing in register setting. Note that the printer 100 according to the present embodiment has, in addition to the write function, a so-called "Read function" for transmitting data read by the drive IC 12 to the control IC 11 in accordance with an instruction from the control IC 11, which will be described later.

[0047] As shown in FIG. 7A, register setting is performed using a CS signal (chip select signal), a CLK signal (clock signal), a SIN signal (serial input signal) and an abnormality detection signal. In register setting, communication signals output from the control IC 11 to the drive IC 12 include the CS signal, the CLK signal and the SIN signal. Note that the SIN signal is an example of a first signal.

[0048] The CS signal is a signal that designates the drive IC 12 to be a communication target (here, a target for register setting). That is, since there are a plurality of drive ICs 12, the CS signal is a signal that designates (selects) a drive IC 12 as a communication destination from among the plurality of drive ICs 12. The CS signal outputs a high (H) level or a low (L) level. In the example of FIG. 7A, the H level of the CS signal indicates that the drive IC is designated as a communication target (a target for register setting), and the L level indicates that the drive IC is not designated as a communication target. Therefore, when an H-level CS signal is input, the drive IC 12 detects that it is the communication target. On the other hand, when an L-level CS signal is input, the drive IC 12 detects that it is not the communication target. Further, when the CS signal switches from the L level to the H level, the drive IC 12 can detect that communication with itself is started. Furthermore, when the CS signal switches from the H level to the L level, the drive IC 12 can detect that communication with itself is ended.

[0049] The CLK signal is a reference signal that serves as the reference for the SIN signal. The CLK signal outputs either a high (H) level or a low (L) level. The driver IC 12 receives the SIN signal in synchronization with the CLK signal. Specifically, the driver IC 12 receives the SIN signal when the CLK signal rises from the L level to the H level.

[0050] The SIN signal is a signal transmitted to the drive IC 12 and is a signal related to register settings. The SIN signal is a signal that uses serial communication. The SIN signal includes the command, address, output data, and checksum signals.

[0051] A command is a signal that indicates the operation instruction for the drive IC 12. The operation instruction includes a "write" instruction to write data to register 13 and a "read" instruction to read data written to register 13. A command outputs either a high (H) level or a low (L) level. Here, an H level command is a write instruction, and an L level command is a read instruction. Note that the operation instructions corresponding to the H level and L level of the command described above are merely examples and are not limited to these. For example, an L level command may be a write instruction, and an H level command may be a read instruction.

[0052] An address is a signal that indicates the location where data is stored. More specifically, an address is a signal that identifies the storage location where data should be stored from among multiple storage locations in register 13. The address is indicated by a high (H) level or a low (L) level, and the storage location is identified by the behavior of the H and L levels.

[0053] Discharge data refers to data related to the discharge of liquid by the discharge unit 1A. Discharge data includes, for example, data related to the size of the discharged droplets, and specifically, data such as the shape of the voltage waveform applied to the piezoelectric element. Discharge data is indicated by high (H) level or low (L) level, and the behavior of the H level and L level indicates data related to discharge.

[0054] A checksum is verification information used to verify whether register settings have been performed correctly. In other words, a checksum is information used to detect abnormalities in the communication signal during register settings. The checksum is a value calculated, for example, from the data to be transmitted using a pre-set calculation method, and the control IC 11 transmits this calculated value as a checksum to the drive IC 12. The drive IC 12 also calculates a checksum from the transmitted data using a similar calculation method, and compares the calculated checksum with the checksum received from the control IC 11. If they match, it determines that there is no abnormality in the communication signal. On the other hand, if the calculated checksum and the checksum received from the control IC 11 do not match, the drive IC 12 determines that there is an abnormality in the communication signal. The checksum is indicated by a high (H) level or a low (L) level, and the behavior of the H level and L level indicates the checksum.

[0055] Furthermore, in this embodiment, in addition to the checksum-based anomaly detection described above, anomaly detection is also performed using the CLK count. Specifically, the number of behaviors of the CLK signal (for example, the number of times it reaches the H level) is predetermined. Therefore, the drive IC 12 counts the number of behaviors of the CLK signal and determines that there is no abnormality in the communication signal if the CLK count matches a predetermined value. On the other hand, the drive IC 12 determines that there is an abnormality in the communication signal if the CLK count does not match a predetermined value. Although the above example shows both checksum-based and CLK count-based anomaly detection, it is not limited to this, and a configuration that performs only one of them is also possible.

[0056] The drive IC 12 receives communication signals including the CS signal, CLK signal, and SIN signal described above, and if the command is at a high level, it performs a write operation to store the output data in a storage location corresponding to the address, i.e., it performs register setting.

[0057] The anomaly detection signal is a signal that indicates whether or not an anomaly has been detected in the communication signal of the register setting. The anomaly detection signal outputs a high (H) level or a low (L) level, indicating the presence or absence of an anomaly. To explain the behavior of the anomaly detection signal in detail, as shown in Figure 7A, when the CS signal switches from a low level to a high level during writing, the driver IC 12 transitions the anomaly detection signal from a high level to a low level. Note that the anomaly detection signal is set to a high level by default, but is not limited to this.

[0058] When the CS signal switches from high level to low level and communication ends, the driver IC 12 determines whether an abnormality has been detected based on the checksum and CLK count. If no abnormality is detected, the driver IC 12 transitions the abnormality detection signal from low level to high level, as shown by the dashed closed curve A in Figure 7A. On the other hand, if an abnormality (see symbol X in Figure 7B) is detected, the driver IC 12 keeps the abnormality detection signal at low level, i.e., maintains the low level, as shown by the dashed closed curve B in Figure 7B.

[0059] As described above, the abnormality detection signal, which is at an H level or L level, is transmitted from the drive IC 12 to the control IC 11. Based on the transmitted abnormality detection signal, the control IC 11 can determine whether or not the register settings, etc., have been performed correctly, or in other words, it can detect the occurrence of an abnormality. If the control IC 11 detects, based on the abnormality detection signal, that the register settings where an abnormality occurred have not been performed correctly, it may, but is not limited to, resending a communication signal for register settings to the drive IC 12.

[0060] In this way, the drive IC 12 transmits the abnormality detection signal with different behaviors for the H and L levels depending on whether there is an abnormality in the communication signal or not when storing the output data. Specifically, the drive IC 12 does not switch the H and L levels of the abnormality detection signal when there is an abnormality in the communication signal, and switches the H and L levels of the abnormality detection signal when there is no abnormality. However, it is not limited to the above, and for example, the drive IC 12 may switch the H and L levels of the abnormality detection signal when there is an abnormality in the communication signal, and not switch the H and L levels of the abnormality detection signal when there is no abnormality.

[0061] In this embodiment, if an abnormality occurs during register setting, debugging can be performed to identify the cause of the abnormality. Specifically, the printer 100 according to this embodiment has a read function, and by using this read function, the cause of the abnormality can be identified.

[0062] More specifically, when debugging, the control IC 11 sends a SIN signal with the command set to L level to the drive IC 12. That is, the control IC 11 sends a SIN signal to the drive IC 12 that includes a "read" instruction to read the data written to register 13. Upon receiving the read instruction, the drive IC 12 reads the data (for example, output data) stored in the storage location corresponding to the address. Then, the drive IC 12 sends an SO signal containing the read data to the control IC 11.

[0063] The control IC 11 identifies the cause of the anomaly by analyzing the transmitted SO signal. For example, by comparing the output data transmitted to the drive IC 12 during register setting with the output data included in the SO signal (i.e., the output data written to register 13), the control IC 11 can identify the location and cause of the anomaly.

[0064] Although not shown in the diagram, when a command is instructed to read at an L level, if the CS signal switches from an H level to an L level and communication ends, the drive IC 12 keeps the abnormal detection signal at an L level, i.e., maintains an L level.

[0065] This allows for the detection of abnormalities, such as when noise is superimposed on the command itself, causing the H level to become L level. In other words, as described above, when a light is instructed with a H level command and the communication signal is normal, the abnormality detection signal is at an H level. However, even though the control IC 11 outputs a light instruction with a H level command, there are cases where noise is superimposed on the command, causing it to become L level. In such cases, if the drive IC 12 sets the abnormality detection signal to H level at the end of communication, the control IC 11 cannot detect the abnormality in the command from the abnormality detection signal. Therefore, in this embodiment, when the command is at an L level, the drive IC 12 transmits the abnormality detection signal to the control IC 11 at an L level, regardless of whether there is an abnormality in the communication signal, behaving in the same way as when there is an abnormality in the communication signal. This allows the control IC 11 to detect the occurrence of an abnormality, including abnormalities caused by noise superimposed on the command, when it receives an L level abnormality detection signal during a light operation with an H level command.

[0066] Next, the communication signals transmitted from the control IC 11 to the multiple drive ICs 12 will be explained with reference to Figure 8. Figure 8 is a diagram illustrating the communication signals transmitted from the control IC 11 to the multiple drive ICs 12. As mentioned above, there are eight drive ICs 12, but for ease of understanding, we will explain them as if there were four drive ICs 12. In addition, the four drive ICs 12 may be referred to as "first drive IC 12a," "second drive IC 12b," "third drive IC 12c," and "fourth drive IC 12d."

[0067] As shown in Figure 8, the control IC 11 individually transmits CS signals to each drive IC 12. In Figure 8, "CS1" is the CS signal for the first drive IC 12a. Similarly, "CS2," "CS3," and "CS4" are the CS signals for the second to fourth drive ICs 12b to 12d, respectively. The control IC 11 also transmits the CLK signal and SIN signal, which are part of the communication signals, to the first to fourth drive ICs 12a to 12d. Therefore, for example, if CS1 is at a high level and CS2 to CS4 are at low levels, the first drive IC 12a detects that the communication is directed to it and sets its registers based on the CLK signal and SIN signal. The second to fourth drive ICs 12b to 12d do not set their registers even if they receive the CLK signal and SIN signal because the communication is not directed to them.

[0068] Next, the abnormality detection signals transmitted from the multiple drive ICs 12 to the control IC 11 will be explained with reference to Figure 9. Figure 9 is a diagram illustrating the abnormality detection signals transmitted from the multiple drive ICs 12 to the control IC 11. In Figure 9, "abnormality detection signal 1" is the abnormality detection signal output by the first drive IC 12a. Similarly, "abnormality detection signal 2," "abnormality detection signal 3," and "abnormality detection signal 4" are the abnormality detection signals output by the second to fourth drive ICs 12b to 12d, respectively.

[0069] As shown in Figure 9, in this embodiment, an abnormality detection signal is transmitted from multiple drive ICs 12 to the control IC 11 using AND circuits 31 and OR circuits 32.

[0070] The AND circuit 31 is a circuit that takes the logical AND of the abnormality detection signals output from each of the multiple drive ICs 12. Specifically, the AND circuit 31 outputs an H level if all of the abnormality detection signals output from the multiple drive ICs 12 are at an H level, and outputs an L level if not all of the abnormality detection signals are at an H level.

[0071] The OR circuit 32 is a circuit that takes the OR of the abnormality detection signals output from each of the multiple drive ICs 12. Specifically, the OR circuit 32 outputs an H level if at least one of the abnormality detection signals output from the multiple drive ICs 12 is at an H level, and outputs an L level if at least one of the abnormality detection signals is not at an H level (if all are at an L level).

[0072] Therefore, the control IC 11 is connected to a signal line that transmits the output of the AND circuit 31 and a signal line that transmits the output of the OR circuit 32. This reduces the number of signal lines for the abnormality detection signal. In other words, if the AND circuit 31 and OR circuit 32 are not used, the number of signal lines required will be equal to the number of drive ICs 12 that output the abnormality detection signal. In contrast, in this embodiment, by using the AND circuit 31 and OR circuit 32, the number of signal lines can be reduced to two: a signal line that transmits the output of the AND circuit 31 and a signal line that transmits the output of the OR circuit 32, thereby enabling miniaturization of the device and cost reduction. Furthermore, for example, in cases where the control IC 11 is mounted on a different board 3x than the head board 3, as shown in Figure 6B, the number of signal lines connected to the other board can be reduced, thereby enabling miniaturization of the device and cost reduction.

[0073] <About Anomaly Detection> Next, specific examples of anomaly detection in the printer 100 configured as described above will be explained with reference to Figures 10A to 11C. Figures 10A to 11C are diagrams showing specific examples of anomaly detection. Figures 10A to 10D show the case where the register settings of multiple drive ICs 12 (here, the first to fourth drive ICs 12a to 12d) are set simultaneously. Figures 11A to 11C show the case where the register settings of one of the multiple drive ICs 12 (here, the first drive IC 12a) are set individually.

[0074] Figure 10A shows the case where communication is performed normally during register setting. Specifically, at time T10, when CS1 to CS4 change from L level to H level, the first to fourth drive ICs 12a to 12d each transition the abnormal detection signal from H level to L level. At time T11, since abnormal detection signal 1 has become L level, the output of the AND circuit 31 transitions from H level to L level. Also, at time T12, abnormal detection signal 4 has become L level, and since all abnormal detection signals 1 to 4 have become L level, the output of the OR circuit 32 transitions from H level to L level.

[0075] Next, when CS1 to CS4 change from high to low and the register setting communication is completed, the first to fourth drive ICs 12a to 12d each transition the abnormal detection signal from low to high. At time T13, abnormal detection signal 1 becomes high, so the output of the OR circuit 32 transitions from low to high. Also, at time T14, abnormal detection signal 4 becomes high, and since all abnormal detection signals 1 to 4 are now high, the output of the AND circuit 31 transitions from low to high.

[0076] Thus, the control IC 11 can detect that communication was successful during register setting if the AND circuit 31 and OR circuit 32 output a low level during register setting, and the AND circuit 31 and OR circuit 32 output a high level after communication is complete.

[0077] Figure 10B shows the case where an abnormality occurs in which the signal line communicating CS3 is disconnected. When the CS3 signal line is disconnected, as shown by the dashed line in Figure 10B, CS3 is not input to the third drive IC 12c; in other words, CS3 remains at the low level and does not transition to the high level.

[0078] Therefore, as shown by the dashed closed curve C1 in Figure 10B, the abnormality detection signal 3 output by the third drive IC 12c remains at the H level. Consequently, the output of the OR circuit 32 also remains at the H level and does not transition to the L level (see closed curve C2). As a result, the control IC 11 can detect that an abnormality such as a signal line disconnection has occurred because the OR circuit 32 does not output an L level when the register is set.

[0079] Figure 10C shows the case where an abnormality is detected by the checksum in the third drive IC 12c. When an abnormality is detected by the checksum in the third drive IC 12c, the abnormality detection signal 3 output by the third drive IC 12c after the communication ends remains at the L level, as shown by the dashed closed curve D1 in Figure 10C. Therefore, the output of the AND circuit 31 also remains at the L level and does not transition to the H level (see closed curve D2). As a result, the control IC 11 can detect that an abnormality has occurred in the register setting because the AND circuit 31 does not output an H level after the register setting communication ends.

[0080] Figure 10D shows the case where an anomaly occurs when the signal line communicating CS1 is disconnected, and the anomaly is detected by the checksum in the third drive IC 12c. When the CS1 signal line is disconnected, as shown by the dashed line in Figure 10D, CS1 is not input to the first drive IC 12a; in other words, CS1 remains at the L level and does not transition to the H level. Therefore, as shown by the dashed closed curve E1 in Figure 10D, the anomaly detection signal 1 output by the first drive IC 12a remains at the H level. Consequently, the output of the OR circuit 32 also remains at the H level and does not transition to the L level (see closed curve E4). As a result, the control IC 11 can detect that an anomaly such as a disconnected signal line has occurred because the OR circuit 32 does not output an L level when setting the register.

[0081] Furthermore, if an abnormality is detected by the checksum in the third drive IC 12c, the abnormality detection signal 3 output by the third drive IC 12c after the communication ends will remain at the L level, as shown by the dashed closed curve E2 in Figure 10D. Consequently, the output of the AND circuit 31 will also remain at the L level and will not transition to the H level (see closed curve E3). As a result, the control IC 11 can detect that an abnormality has occurred in the register setting because the AND circuit 31 does not output an H level after the register setting communication ends.

[0082] Figure 11A shows the case where communication is performed normally during register setting, which is performed only on the first drive IC 12a. Specifically, at time T20, when CS1 changes from L level to H level, the first drive IC 12a transitions the abnormality detection signal 1 from H level to L level. At time T21, since the abnormality detection signal 1 has become L level, the output of the AND circuit 31 transitions from H level to L level. Note that since the abnormality detection signals 2 to 4 output from the second to fourth drive ICs 12b to 12d are all H level, the output of the OR circuit 32 remains at H level.

[0083] Next, when CS1 changes from high to low and the register setting communication is completed, the first drive IC 12a transitions the abnormality detection signal 1 from low to high. At time T22, since the abnormality detection signal 1 is high, the output of the OR circuit 32 transitions from low to high.

[0084] Thus, the control IC 11 can detect that communication was successful in setting the register of the first drive IC 12a when the AND circuit 31 outputs a low level during register setting and a high level after communication is completed.

[0085] Figure 11B shows the case where an anomaly occurs in which the signal line communicating CS1 is disconnected. When the CS1 signal line is disconnected, as shown by the dashed line in Figure 11B, CS1 is not input to the first drive IC 12a; in other words, CS1 remains at the L level and does not transition to the H level.

[0086] Therefore, as shown by the dashed closed curve F1 in Figure 11B, the abnormality detection signal 1 output by the first drive IC 12a remains at the H level. Consequently, the output of the OR circuit 32 also remains at the H level and does not transition to the L level (see closed curve F2). As a result, the control IC 11 can detect that an abnormality such as a signal line disconnection has occurred because the OR circuit 32 does not output an L level when the register is set.

[0087] Figure 11C shows the case where an abnormality is detected by the checksum in the first drive IC 12a. When an abnormality is detected by the checksum in the first drive IC 12a, the abnormality detection signal 1 output by the first drive IC 12a after the communication ends remains at the L level, as shown by the dashed closed curve G1 in Figure 11C. Therefore, the output of the AND circuit 31 also remains at the L level and does not transition to the H level (see closed curve G2). As a result, the control IC 11 can detect that an abnormality occurred in the register setting of the first drive IC 12a because the AND circuit 31 does not output an H level after the communication for register setting of the first drive IC 12a has ended.

[0088] Next, with reference to Figure 12, specific examples of abnormalities that the control IC 11 according to this embodiment can detect will be explained. Figure 12 is a diagram summarizing specific examples of abnormalities that the control IC 11 can detect. In Figure 12, "Signal" indicates the type of signal that caused the abnormality. "State" indicates the state that caused the abnormality, and "Timing" indicates the timing at which the abnormality occurred. "Phenomenon" indicates the phenomenon (event) that occurs when the corresponding abnormality occurs.

[0089] As shown in Figure 12, if the signal line communicating the CS signal is disconnected, the CS signal remains at an L level and does not respond, and the abnormality detection signal remains at an H level and does not behave, so the control IC 11 can detect the abnormality (see Figures 10B and 11B).

[0090] Next, we will explain the case where noise is superimposed on the CS signal, and the timing of the noise occurs between the switch of the CS signal to a high level and before the start of operation of the CLK signal. If the timing of the noise superimposition does not coincide with the timing of the operation of the CLK signal, communication will start and no abnormality will occur. On the other hand, if the timing of the noise superimposition coincides with the timing of the operation of the CLK signal, the control IC 11 can detect the abnormality by detecting an abnormality based on the number of CLKs.

[0091] If noise is superimposed on the CS signal during communication, a checksum is performed when the CS signal switches from a high level to a low level. As a result, the checksum will be inconsistent, and the control IC 11 can detect the abnormality.

[0092] If noise is superimposed on the CS signal between the end of the CLK signal and the CS signal switches to a low level, and the CS signal switches to a low level earlier than the normal timing, the checksum will be inconsistent, and the control IC 11 can detect the abnormality.

[0093] Next, if the signal line that communicates the CLK signal is disconnected, an abnormality is detected in that the number of CLK signals cannot be detected, and the control IC 11 can detect the abnormality.

[0094] If noise is superimposed on the CLK signal during communication, the CLK count will become mismatched, and the control IC 11 can detect the abnormality.

[0095] Next, if the signal line communicating the SIN signal is disconnected and the SIN signal is fixed at a high level, the checksum will be mismatched, and the control IC 11 can detect an abnormality. Also, if the SIN signal is fixed at a low level, the command will also be at a low level, and as described above, the abnormality detection signal will be at a low level, and the control IC 11 can detect an abnormality.

[0096] If noise is superimposed on the SIN signal command, the drive IC 12 will interpret the write instruction as a read instruction. However, since the abnormality detection signal is set to an L level when the command is L level, the control IC 11 can detect the abnormality.

[0097] If noise is introduced during the communication of at least one of the SIN signal address, output data, and checksum, the checksum will become mismatched, and the control IC 11 can detect the abnormality.

[0098] Next, when the signal line that transmits the abnormality detection signal is disconnected, the abnormality detection signal enters a fixed (unchanging) abnormal state, allowing the control IC 11 to detect the abnormality.

[0099] As described above, the printer (recording device) 100 according to this embodiment includes a control IC (first IC) 11 and a drive IC (second IC) 12. The control IC 11 outputs a SIN signal (first signal) including a command, an address, and output data, and a communication signal including a clock signal. The drive IC 12 is communicatively connected to the control IC 11 and outputs a drive signal to the output unit 1A to drive the output unit 1A based on the communication signal. If the command is high level or low level (for example, H level), the drive IC 12 stores the output data in a storage location corresponding to the address. If the command is high level or low level (for example, L level), the drive IC 12 transmits a second signal to the control IC 11 including the data stored in the storage location corresponding to the address.

[0100] Thus, the printer 100 according to this embodiment has a read function, which makes it possible to identify the cause of any abnormalities that occurred during register setting.

[0101] Furthermore, the drive IC 12 can transmit an abnormality detection signal to the control IC 11. When storing the ejection data, the drive IC 12 transmits the abnormality detection signal with different behaviors for the H level and L level depending on whether there is an abnormality in the communication signal or not. As a result, the drive IC 12 according to this embodiment can detect various abnormalities in the communication signal and communicate the detected abnormality to the control IC 11.

[0102] Furthermore, the SIN signal includes a checksum. The drive IC 12 detects abnormalities in the communication signal based on at least one of the checksum and the CLK signal. By detecting abnormalities using the checksum and CLK signal in this way, abnormalities can be detected with high accuracy, and as a result, failures of the liquid discharge head 1 can be prevented. In addition, by using the checksum and CLK signal, the types of abnormalities that can be detected increase, and abnormalities can be detected with greater accuracy.

[0103] Furthermore, the following additional information is disclosed with respect to the above embodiments. <Additional Information> (1) A recording device comprising: a first IC that outputs a first signal including a command, an address, and discharge data, and a communication signal including a clock signal; and a second IC that is communicatively connected to the first IC and outputs a drive signal to the discharge unit to drive the discharge unit based on the communication signal, wherein the second IC stores the discharge data in a storage location corresponding to the address when the command is either high-level or low-level, and transmits a second signal to the first IC including the data stored in the storage location corresponding to the address when the command is either high-level or low-level. (2) The recording device according to (1), wherein the second IC is capable of transmitting an abnormality detection signal to the first IC, and transmits the high-level and low-level behavior of the abnormality detection signal differently depending on whether there is an abnormality or not in the communication signal when storing the discharge data. (3) The recording device according to (2), wherein the first signal includes a checksum, and the second IC detects an abnormality in the communication signal based on at least one of the checksum and the clock signal. (4) The recording device according to (2) or (3), wherein the second IC transmits the abnormality detection signal in the same manner as when there is an abnormality in the communication signal, regardless of whether there is an abnormality in the communication signal, when the command is high level or low level. (5) The recording device according to any one of (2) to (4), wherein there are multiple second ICs, and the recording device comprises a logical AND circuit that takes the logical AND of the abnormality detection signals output from each of the multiple second ICs, and a logical OR circuit that takes the logical OR of the abnormality detection signals output from each of the multiple second ICs, and the first IC is connected to a signal line that transmits the output of the logical AND circuit and a signal line that transmits the output of the logical OR circuit.

[0104] The embodiments disclosed herein should be considered in all respects to be illustrative and not restrictive. Indeed, the embodiments described above can be embodied in a variety of forms. Furthermore, the embodiments described above may be omitted, replaced, or modified in various ways without departing from the scope and spirit of the appended claims.

[0105] 1 Liquid dispensing head 1A Dispensing unit 11 Control IC 12 Drive IC 100 Printer

Claims

1. A recording device comprising: a first IC that outputs a first signal including a command, an address, and discharge data, and a communication signal including a clock signal; and a second IC that is communicatively connected to the first IC and outputs a drive signal to the discharge unit to drive the discharge unit based on the communication signal, wherein the second IC stores the discharge data in a storage location corresponding to the address when the command is either high-level or low-level, and transmits a second signal to the first IC including the data stored in the storage location corresponding to the address when the command is either high-level or low-level.

2. The recording device according to claim 1, wherein the second IC is capable of transmitting an abnormality detection signal to the first IC, and transmits the abnormality detection signal with different behaviors for the high level and low level depending on whether there is an abnormality in the communication signal or not when storing the discharge data.

3. The recording device according to claim 2, wherein the first signal includes a checksum, and the second IC detects an abnormality in the communication signal based on at least one of the checksum and the clock signal.

4. The recording device according to claim 2 or 3, wherein the second IC transmits the abnormality detection signal in the same manner as when there is an abnormality in the communication signal, regardless of whether there is an abnormality in the communication signal, when the command is at a high level or a low level.

5. The recording device according to any one of claims 2 to 4, wherein the second IC comprises a plurality of ICs, an AND circuit that takes the AND of the abnormality detection signals output from each of the plurality of second ICs, and an OR circuit that takes the OR of the abnormality detection signals output from each of the plurality of second ICs, and the first IC is connected to a signal line that transmits the output of the AND circuit and a signal line that transmits the output of the OR circuit.

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