SiC WAFER, SiC EPITAXIAL WAFER, AND SiC DEVICE

Abstract

A SiC wafer according to the present invention is provided with a SiC single crystal layer and a crystal substrate bonded to the SiC single crystal layer. A first surface of the SiC single crystal layer has an offset angle with respect to the (0001) plane in the <11-20> direction, and the offset angle is within the range of 4.000 0.500°.

Description

SiC wafers, SiC epitaxial wafers, and SiC devices

[0001] This disclosure relates to SiC wafers, SiC epitaxial wafers, and SiC devices. This application claims priority under Japanese Patent Application No. 2025-031687, filed in Japan on 28 February 2025, which is incorporated herein by reference.

[0002] Silicon carbide (SiC) has a dielectric breakdown field an order of magnitude larger and a band gap three times larger than silicon (Si). Furthermore, SiC has properties such as a thermal conductivity approximately three times higher than silicon (Si). Therefore, SiC is expected to have applications in power devices, high-frequency devices, and other applications. In addition, devices using SiC can operate at high temperatures of 150°C or higher. For this reason, SiC epitaxial wafers have recently come to be used as substrates for the semiconductor devices mentioned above.

[0003] Semiconductor devices using SiC are called SiC devices. SiC devices are fabricated using SiC epitaxial wafers. SiC epitaxial wafers are obtained by laminating SiC epitaxial layers onto the surface of a SiC substrate. The SiC substrate is the substrate before the SiC epitaxial layers are laminated. SiC substrates are cut, for example, from SiC boules (also called SiC ingots). SiC boules are SiC single crystals processed into a cylindrical shape. Studies are underway to use crystalline substrates as underlayment when forming devices on SiC single crystal layers by bonding the SiC single crystal layers to a crystalline substrate.

[0004] The performance of a SiC device is influenced by the SiC epitaxial wafer, SiC substrate, and SiC boule that form the basis of the SiC device. Crystal information of the SiC single crystals constituting the SiC epitaxial wafer, SiC substrate, and SiC boule is a crucial factor in determining the performance and manufacturing conditions of the SiC device, and therefore requires accurate understanding.

[0005] For example, Patent Document 1 discloses the formation of a side surface in which the relationship between the cleavage lattice plane and the crystal orientation is controlled, in order to increase the mechanical strength of the SiC substrate.

[0006] For example, Patent Document 2 discloses the formation of an orientation flat (OF) in order to confirm the crystal orientation of a SiC substrate.

[0007] Japanese Patent Publication No. 2024-014982 Japanese Patent Publication No. 2021-027106

[0008] The crystal orientation of a SiC single crystal can be measured by X-ray diffraction (XRD). However, the inventors have found that the measured crystal orientation may be misaligned depending on the measurement position of the SiC single crystal. Furthermore, the inventors have found that when a SiC single crystal layer is bonded to a underlying crystal substrate, the misalignment accuracy of the bond and the warping of the crystal substrate make the misalignment of the crystal orientation more pronounced. The crystal orientation of a SiC single crystal is often measured at the center of the SiC single crystal. The fact that the crystal orientation may be misaligned depending on the measurement position raises the problem that there is no guarantee that the crystal orientation of a SiC single crystal measured at the center is the correct value.

[0009] This disclosure has been made in view of the above-mentioned problems, and aims to provide a SiC wafer formed by bonding a SiC single crystal layer capable of accurately measuring the crystal orientation to a crystal substrate, a SiC epitaxial wafer formed using the same, and a SiC device.

[0010] The inventors, through diligent research, have discovered that the cause of the discrepancy in the measured crystal orientation at the measurement location lies in defects, dislocations, etc. The crystal orientation of a SiC single crystal can be measured by X-ray diffraction (XRD). X-ray diffraction measures the crystal orientation of a SiC single crystal using Bragg reflections from lattice planes. In areas with defects, dislocations, etc., the lattice planes may be distorted due to these defects, dislocations, etc. As a result, the inventors have discovered that a discrepancy in crystal orientation occurs depending on the measurement location. Furthermore, considering that the discrepancy in the crystal orientation of the SiC single crystal layer becomes more pronounced when the SiC single crystal layer is bonded to a crystalline substrate, the inventors have found a means to solve the above problem.

[0011] This disclosure provides the following means to solve the above problems.

[0012] (1) The SiC wafer according to the first embodiment comprises a SiC single crystal layer and a crystal substrate bonded to the SiC single crystal layer, wherein the first surface of the SiC single crystal layer has an offset angle with respect to the (0001) plane in the <11-20> direction, and the offset angle is within the range of 4.000 ± 0.500°.

[0013] (2) The SiC wafer according to the second embodiment comprises a SiC single crystal layer and a crystal substrate bonded to the SiC single crystal layer, wherein the first surface of the SiC single crystal layer has an offset angle with respect to the (0001) plane in the <1-100> direction, and the offset angle is within the range of 0.000 ± 0.500°.

[0014] (3) In the SiC wafer according to the above embodiment, the crystal orientation of the (0001) plane may be determined based on the crystal orientation measured in a region having a defect density less than or equal to the average defect density.

[0015] (4) The SiC wafer according to the third embodiment comprises a SiC single crystal layer and a crystal substrate bonded to the SiC single crystal layer, wherein the angle between the crystal orientation of the (0001) plane of the SiC single crystal layer and a line perpendicular to a plane tilted by a design value offset angle with respect to the first plane of the SiC single crystal layer is in the range of -0.500° or more and 0.500° or less.

[0016] (5) In the SiC wafer according to the above embodiment, the angle between the crystal orientation of the (0001) plane and a line perpendicular to the plane that is tilted by a design value offset angle with respect to the first plane in the <11-20> direction may be within the range of -0.500° or more and 0.500° or less.

[0017] (6) In the SiC wafer according to the above embodiment, the angle between the crystal orientation of the (0001) plane and a line perpendicular to the plane that is tilted by a design value offset angle with respect to the first plane in the <1-100> direction may be within the range of -0.500° or more and 0.500° or less.

[0018] (7) In the SiC wafer according to the above embodiment, the design values ​​of the offset angle with respect to the first surface may be 4.000° in the <11-20> direction and 0.000° in the <1-100> direction.

[0019] (8) In the SiC wafer according to the above embodiment, the thickness in the direction perpendicular to the first surface may be 200 μm or more and 600 μm or less.

[0020] (9) In the SiC wafer according to the above embodiment, the diameter of the first surface may be 145 mm or more.

[0021] (10) In the SiC wafer according to the above embodiment, the diameter of the first surface may be 195 mm or more.

[0022] (11) In the SiC wafer according to the above embodiment, the bonding strength of the SiC single crystal layer to the crystal substrate may be 2 N / mm or more.

[0023] (12) In the SiC wafer according to the above embodiment, the difference in thermal expansion coefficient between the SiC single crystal layer and the crystal substrate is 9 × 10 －７ K －１ The following is also acceptable.

[0024] (13) In the SiC wafer according to the above embodiment, the crystal substrate may be a SiC polycrystalline substrate.

[0025] (14) In the SiC wafer according to the above embodiment, the SiC single crystal layer and the crystal substrate may be bonded together via a bonding layer containing Si and C.

[0026] (15) The SiC epitaxial wafer according to the fourth embodiment is a SiC wafer according to the above embodiment in which a SiC epitaxial layer is formed on the SiC single crystal layer.

[0027] (16) The SiC device according to the fifth embodiment is an SiC epitaxial wafer according to the above embodiment in which an element is formed inside the SiC epitaxial layer.

[0028] (17) A SiC epitaxial wafer according to the sixth embodiment comprises a SiC single crystal layer, a crystal substrate layer bonded to the SiC single crystal layer, and a SiC epitaxial layer laminated on the SiC single crystal layer, wherein the angle between the crystal orientation of the (0001) plane of the SiC epitaxial layer and a line perpendicular to a plane tilted by a design value offset angle with respect to the first plane of the SiC epitaxial layer is -0.500° or more and 0.500° or less.

[0029] (18) The SiC device according to the seventh embodiment comprises a SiC single crystal layer, a crystal substrate layer bonded to the SiC single crystal layer, a SiC epitaxial layer laminated on the SiC single crystal layer, and an element formed inside the SiC epitaxial layer, wherein the angle between the crystal orientation of the (0001) plane of the SiC single crystal layer and a line perpendicular to a plane tilted by a design value offset angle with respect to the first plane of the SiC single crystal layer is -0.500° or more and 0.500° or less.

[0030] (19) The SiC device according to the eighth embodiment comprises a SiC single crystal layer, a crystal substrate layer bonded to the SiC single crystal layer, a SiC epitaxial layer laminated on the SiC single crystal layer, and an element formed inside the SiC epitaxial layer, wherein the angle between the crystal orientation of the (0001) plane of the SiC epitaxial layer and a line perpendicular to a plane tilted by a design value offset angle with respect to the first plane of the SiC epitaxial layer is -0.500° or more and 0.500° or less.

[0031] According to this disclosure, it is possible to provide a SiC wafer having a SiC single crystal layer that suppresses the influence of bonding with the underlying substrate and enables accurate measurement of the crystal orientation, a SiC epitaxial wafer formed using the same, and a SiC device.

[0032] It is a perspective view of the SiC single crystal according to the present embodiment. It is a plan view of the SiC single crystal according to the present embodiment. It is a diagram showing an example of a measurement region of the SiC single crystal according to the present embodiment. It is a diagram illustrating a method for manufacturing a SiC single crystal layer according to the present embodiment. It is a schematic diagram illustrating a method for manufacturing an SiC boule according to the present embodiment. It is a cross-sectional view of the SiC single crystal layer according to the present embodiment. It is another cross-sectional view of the SiC single crystal layer according to the present embodiment. It is a plan view of the SiC single crystal layer according to the present embodiment. It is another plan view of the SiC single crystal layer according to the present embodiment. It is a plan view of the SiC wafer according to the present embodiment. It is a diagram for explaining the definition of SORI. It is a cross-sectional view of the SiC wafer according to the present embodiment. It is a diagram illustrating a method for manufacturing the SiC wafer according to the present embodiment. It is a diagram illustrating a method for manufacturing the SiC wafer according to the present embodiment. It is an enlarged view of an overlapping portion of notches of a SiC single crystal layer and a crystal substrate in the manufacturing process of the present embodiment. It is a diagram illustrating a method for manufacturing the SiC wafer according to the present embodiment. It is an enlarged view of an overlapping portion of an orientation flat of a SiC single crystal layer and a crystal substrate in the manufacturing process of the present embodiment.

[0033] Hereinafter, the present embodiment will be described in detail with appropriate reference to the drawings. In the drawings used in the following description, characteristic portions of the present embodiment may be enlarged for convenience in order to make the features of the present embodiment easy to understand, and the dimensional ratios and the like of respective components may differ from actual ones. Materials, dimensions, and the like exemplified in the following description are merely examples, and the present disclosure is not limited thereto, and can be appropriately modified and implemented without changing the gist of the present disclosure.

[0034] In this specification, individual orientations are indicated by [], collective orientations by <>, individual planes by (), and collective planes by {}. For negative indices, crystallographically, a "-" (bar) is placed above the numeral, but in this specification, a negative sign is placed before the numeral.

[0035] First, directions will be defined. The thickness direction of the SiC single crystal, SiC single crystal layer and SiC boule is defined as the Z-direction. The Z-direction may be the <0001> direction of the SiC single crystal, SiC single crystal layer and SiC boule, or may be inclined by an offset angle relative to the <0001> direction. One direction on a plane orthogonal to the Z-direction is defined as the X-direction. Further, on a plane orthogonal to the Z-direction, the direction orthogonal to the X-direction is defined as the Y-direction. The X-direction is, for example, <11-20> of the SiC single crystal, SiC single crystal layer and SiC boule. The Y-direction is, for example, the <1-100> direction of the SiC single crystal, SiC single crystal layer and SiC boule.

[0036] "Method for Measuring Crystal Orientation" The method for measuring the crystal orientation of the SiC single crystal layer 12 constituting the SiC wafer according to the present embodiment includes a defect distribution acquisition step and a crystal orientation measurement step.

[0037] In a crystal, crystal planes are arranged in parallel at equal intervals. Crystal orientation is a plane index representing a direction orthogonal to a crystal plane. For example, the crystal orientation for the (0001) plane is represented by

[0001] . The crystal orientation in a crystal is fixed. Crystal orientation can be measured using X-ray diffraction (XRD). The crystal orientation as a measured value may slightly deviate from the actual crystallographic crystal orientation. The method for measuring the crystal orientation of a SiC single crystal according to the present embodiment is a measurement method capable of reducing the deviation between the crystal orientation as a measured value and the crystallographic crystal orientation.

[0038] FIG. 1 is an example of a SiC single crystal 10 including the SiC single crystal layer 12 according to the present embodiment. The SiC single crystal layer 12 is cut out from this SiC single crystal 10. The SiC single crystal 10 has a first surface 1, a second surface 2, and a side surface 3. The first surface 1 may be a Si surface or a C surface. The first surface 1 may be, for example, any one of a (0001) plane, a plane inclined by an offset angle relative to the (0001) plane, a (000-1) plane, and a plane inclined by an offset angle relative to the (000-1) plane. The second surface 2 is a surface facing the first surface 1; in other words, the second surface 2 is a surface opposite to the first surface 1. The side surface 3 is a surface connecting the first surface 1 and the second surface 2.

[0039] The SiC single crystal 10 is, for example, a cylindrical SiC boule (SiC ingot). The SiC single crystal 10 may also be a film-like SiC single crystal layer. The SiC single crystal 10 may also be a SiC epitaxial wafer.

[0040] The diameter and thickness of the SiC single crystal 10 are not particularly limited. The diameter of the SiC single crystal 10 is, for example, 6 inches or more, preferably 8 inches or more, more preferably 10 inches or more, and even more preferably 12 inches or more.

[0041] The diameter of the SiC single crystal 10 is, for example, 145 mm or more, preferably 149 mm or more. The diameter of the SiC single crystal 10 is, for example, 155 mm or less, preferably 151 mm or less. The diameter of the SiC single crystal 10 is, for example, 195 mm or more, preferably 199 mm or more. The diameter of the SiC single crystal 10 is, for example, 205 mm or less, preferably 201 mm or less. The diameter of the SiC single crystal 10 is, for example, 245 mm or more, preferably 249 mm or more. The diameter of the SiC single crystal 10 is, for example, 255 mm or less, preferably 251 mm or less. The diameter of the SiC single crystal 10 is, for example, 295 mm or more, preferably 299 mm or more. The diameter of the SiC single crystal 10 is, for example, 305 mm or less, preferably 301 mm or less.

[0042] In the defect distribution acquisition step, the defect distribution of the first surface 1 of the SiC single crystal 10 is acquired. In the defect distribution acquisition step, the dislocation distribution may also be acquired along with the defect distribution of the first surface 1. Dislocations include threading dislocations, basal plane dislocations, and micropipes. Defects include dislocations, as well as stacking faults other than dislocations, particles, etc.

[0043] The defect distribution can be obtained, for example, using synchrotron radiation topography or X-ray topography. The defect distribution can also be obtained by microscopic observation after etching the first surface 1 with KOH or NaOH. It is preferable to measure the defect distribution using X-ray topography. X-ray topography does not require etching or other processing and allows for non-destructive measurement.

[0044] If the SiC single crystal 10 is a SiC Boolean crystal, the SiC single crystal 10 may be sliced ​​and the defect distribution obtained from the SiC single crystal layer including the first face 1. This is because SiC Boolean crystals are thick in the Z direction and difficult to measure. Many defects and dislocations are carried over in the crystal growth direction. Therefore, there is a correlation between the defect distribution of the sliced ​​SiC single crystal layer and the defect distribution of the SiC Boolean crystal after it has been cut. In other words, if the defect distribution of the sliced ​​SiC single crystal layer is extracted and inspected, it is not necessary to measure the defect distribution of the SiC Boolean crystal after it has been cut.

[0045] The defect distribution is obtained by dividing the SiC single crystal 10 into predetermined sizes when viewed from the Z direction and aggregating the defect information measured for each section. Defect information is measured for each sectioned region. The size of each sectioned region is the same, for example, 10 mm × 10 mm. For example, each section is arranged without gaps when viewed from the Z direction, and the center of one of the multiple sections coincides with the center of the substrate. In each section, the defect density measured in a 1.0 mm × 1.0 mm measurement area including the center is treated as the defect density for that section. The center of a section is the intersection of the diagonals of the section.

[0046] For each section, it is possible to determine whether the defect density is higher than the average defect density. The average defect density is calculated by dividing the number of defects across the entire surface of the first surface 1 by the area of ​​the first surface 1. Alternatively, for example, a region where the defect density is four times or more higher than the average defect density may be designated as a high defect density region, and a region where the defect density is one-quarter or less of the average defect density may be designated as a low defect density region. By using the average defect density as a reference, the entire wafer can be averaged out, which reduces the deviation (relative difference) in the surface orientation of each chip when it is formed into chips, and is thought to make it easier to reduce extreme variations in surface orientation quality in epitaxial devices.

[0047] Furthermore, when measuring the dislocation density distribution of the first surface 1, the procedure is the same as when measuring the defect distribution. The dislocation density distribution is obtained by dividing the SiC single crystal 10 into predetermined sizes when viewed from the Z direction and summarizing the dislocation information measured for each section. The size of the sections can be the same as when determining the defect distribution.

[0048] For each section, it is possible to determine whether the dislocation density is higher than the average dislocation density. The average dislocation density is calculated by dividing the total number of dislocations across the entire surface of the first surface 1 by the area of ​​the first surface 1. Alternatively, for example, regions where the dislocation density is four times or more higher than the average dislocation density may be designated as high dislocation density regions, and regions where the dislocation density is one-quarter or less of the average dislocation density may be designated as low dislocation density regions.

[0049] In the crystal orientation measurement process, the crystal orientation is measured in at least one measurement region where the defect density of the first surface 1 is less than or equal to the average defect density.

[0050] Figure 2 is a plan view of the first face 1 of the SiC single crystal 10 according to this embodiment. The crystal orientation is measured in a measurement area A determined based on the defect distribution obtained in the defect distribution acquisition process. There may be one measurement area A or multiple measurement areas A. It is preferable that there are multiple measurement areas A.

[0051] Measurement region A is, for example, the center of a section where the defect density is lower than the average defect density. It is preferable that measurement region A is a low defect density region. It is also preferable that measurement region A is a region where the dislocation density is lower than the average dislocation density, and more preferably a low dislocation density region. Defects, dislocations, etc., are one of the factors that distort lattice planes. In areas where there are many of these, the lattice planes may be distorted. If the crystal orientation is measured in an area where the lattice plane is distorted, there is a high risk that the measured crystal orientation will deviate from the actual crystal orientation in crystallography. By measuring the crystal orientation in a region with few defects, the deviation between the actual crystal orientation in crystallography and the measured crystal orientation can be reduced. Furthermore, by measuring the crystal orientation in a region with few dislocations, the deviation between the actual crystal orientation in crystallography and the measured crystal orientation can be reduced even further.

[0052] Alternatively, the crystal orientation may be measured at the center C of the first surface 1. The center C is the center of the circumscribed circle that circumscribes the outer circumference of the SiC single crystal 10.

[0053] Crystal orientation is measured using azimuthal scanning X-ray diffraction (XRD). Azimuthal scanning XRD can be performed using, for example, Omega / Theta (manufactured by Freiberg Instruments GmbH). The ω axis is the axis that determines the rotation angle of the sample holder on which the sample is placed, and the 2θ axis is the axis that determines the rotation angle between the counter that measures the scattered X-ray intensity relative to the line connecting the X-ray source and the sample holder and the line connecting the sample holder. Azimuthal scanning XRD is a method of performing XRD measurements while changing the ω axis and the 2θ axis.

[0054] XRD measurement conditions can be set as follows when measuring a 4H-SiC single crystal with an offset angle of 4.000° in the <11-20> direction: X-ray source voltage: 30kV X-ray source current: 10mA Measurement range: 1mm square including the area to be measured Measurement speed: 3 rotations of the table (5 seconds / rotation) Equilibrium of the measurement table: within 0.002° Incident angle: 43.0±0.2° Detector angle: 69.1±0.3° Plate thickness variation of the object to be measured: within 0.3mm

[0055] When measuring crystal orientation at multiple locations during the crystal orientation measurement process, the average value of the crystal orientations measured at each location is measured. The multiple measurement locations may be multiple measurement regions A, one measurement region A and its center C, or multiple measurement regions A and its center C. By calculating the average of the values ​​at multiple measurement locations, the discrepancy between the actual crystal orientation according to crystallography and the crystal orientation obtained as an average value can be reduced.

[0056] The crystal orientation is preferably measured at four points (measurement area A1) located at half a radius from the center C in both the X and Y directions, as shown in Figure 3. More preferably, the crystal orientation is measured at four points (measurement area A2) located at half a radius from the center in directions rotated 45° with respect to the X and Y directions, in addition to measurement area A1. Even more preferably, the crystal orientation is measured at four points (measurement area A3) located at three-quarters of a radius from the center C in both the X and Y directions, in addition to measurement areas A1 and A2. Particularly preferably, the crystal orientation is measured at four points (measurement area A4) located at three-quarters of a radius from the center in directions rotated 45° with respect to the X and Y directions, in addition to measurement areas A1, A2, and A3. However, locations in measurement areas A1, A2, A3, and A4 where the defect density is equal to or greater than the average defect density are excluded from the measurement locations.

[0057] The method for measuring the crystal orientation of a SiC single crystal according to this embodiment selects locations where lattice plane distortion is less likely to occur and measures the crystal orientation. Therefore, the crystal orientation obtained by the method for measuring the crystal orientation of a SiC single crystal according to this embodiment has a small deviation from the actual crystal orientation in crystallography.

[0058] "Method for Manufacturing a SiC Single Crystal Layer" The method for manufacturing a SiC single crystal layer according to this embodiment comprises a defect distribution acquisition step, a crystal orientation measurement step, and a SiC single crystal layer acquisition step. That is, the method for manufacturing a SiC single crystal layer according to this embodiment comprises the above-described method for measuring the crystal orientation of a SiC single crystal and a SiC single crystal layer acquisition step.

[0059] The defect distribution acquisition process and the crystal orientation measurement process can be performed using the same method as the method for measuring the crystal orientation of a SiC single crystal described above. By performing the method for measuring the crystal orientation of a SiC single crystal described above, the crystal orientation of the SiC single crystal 10 can be accurately measured. In other words, the discrepancy between the measured crystal orientation and the actual crystal orientation in crystallography is small.

[0060] In the SiC single crystal layer acquisition process, the SiC single crystal 10 is sliced ​​based on the crystal orientation of the SiC single crystal 10 measured in the crystal orientation measurement process. By slicing the SiC single crystal 10 based on the accurately determined crystal orientation, a SiC single crystal layer conforming to the design value can be produced. Alternatively, processing (such as grinding) may be performed based on the crystal orientation measured in the crystal orientation measurement process before the slicing process.

[0061] Figure 4 is a schematic diagram of an example of the SiC single crystal layer acquisition process according to this embodiment. For example, when acquiring a SiC single crystal layer having an offset angle in the <11-20> direction, the SiC single crystal 10 is tilted such that the lattice plane L of the SiC single crystal 10 is tilted with respect to the cut surface S by the design value of the offset angle in the <11-20> direction.

[0062] The offset angle is a value determined according to the application of the SiC device, and for example, a design value for the offset angle is set between the customer (e.g., the SiC device manufacturer) and the supplier (e.g., the SiC substrate manufacturer). It is desirable that the difference between the design value of the offset angle and the actual offset angle be small. By slicing the SiC single crystal 10 based on the precisely determined crystal orientation, the difference between the design value of the offset angle and the actual offset angle can be reduced. For example, the design value of the offset angle is 4.000° in the <11-20> direction and 0.000° in the <1-100> direction. The design value of the offset angle is determined by setting the angle between the plane perpendicular to the Z direction, which is the thickness direction of the SiC single crystal, and the (0001) plane in the crystal as a predetermined target value in the design. The design value of the offset angle can be confirmed, for example, from design value information (documents such as product specifications and inspection reports, or data corresponding to these documents), and the target value of the design described in this design value information may be referenced as the design value of the offset angle. In other words, SiC wafers, SiC epitaxial wafers, and SiC devices may be handled together with design value information, such as the design value of the offset angle. For example, a SiC wafer set may include a SiC wafer and the design value information of that SiC wafer. Similarly, a SiC epitaxial wafer set may include a SiC epitaxial wafer and the design value information of that SiC epitaxial wafer. Furthermore, a SiC device set may include a SiC device and the design value information of that SiC device. Handling information containing design value information as a set makes it easier to compare design values ​​with measured values.

[0063] The lattice plane L is the (0001) plane determined from the crystal orientation of the SiC single crystal 10 measured in the crystal orientation measurement process. The discrepancy between the (0001) plane determined from this measurement and the actual (0001) plane in the crystal is small, and the (0001) plane determined from the measurement and the actual (0001) plane in the crystal coincide with each other with high accuracy. Therefore, the SiC single crystal layer obtained by this method has a small discrepancy between the actual offset angle and the design value of the offset angle.

[0064] When obtaining a SiC single crystal layer without an offset angle, the lattice plane L should be made parallel to the cross-section plane S.

[0065] The method for manufacturing a SiC single crystal layer according to this embodiment allows for accurate determination of the lattice plane L because the accuracy of the (0001) plane determined from the measured values ​​is high. Therefore, actual products can be manufactured accurately according to the design values, and SiC single crystals can be produced in which the deviation of the actual offset angle from the design value of the offset angle is between -0.100° and 0.100°.

[0066] "Method for Manufacturing SiC Boules" The method for manufacturing SiC boules according to this embodiment comprises a defect distribution acquisition step, a crystal orientation measurement step, and a crystal orientation information assignment step. That is, the method for manufacturing SiC boules according to this embodiment comprises the above-described method for measuring the crystal orientation of a SiC single crystal and a crystal orientation information assignment step.

[0067] The defect distribution acquisition process and the crystal orientation measurement process can be performed using the same method as the method for measuring the crystal orientation of a SiC single crystal described above. By performing the method for measuring the crystal orientation of a SiC single crystal described above, the crystal orientation of the SiC single crystal 10 can be accurately measured. In other words, the discrepancy between the measured crystal orientation and the actual crystal orientation in crystallography is small.

[0068] Figure 5 is a schematic diagram illustrating the method for manufacturing SiC Boolean according to this embodiment. By measuring the crystal orientation in the crystal orientation measurement step, for example, a reference position R located in the <1-100> direction with respect to the center C of the SiC single crystal 10 can be accurately set. The reference position R is not limited to the <1-100> direction with respect to the center C, but may be set in any direction.

[0069] In the crystal orientation information assignment step, crystal orientation information is assigned to the SiC single crystal 10 based on the crystal orientation of the SiC single crystal 10 measured in the crystal orientation measurement step. For example, as shown in Figure 5, a part of the SiC single crystal 10 is removed to form an orientation flat OF. The orientation flat OF is formed, for example, in a direction perpendicular to the line segment connecting the reference position R and the center C. The crystal orientation information is not limited to the orientation flat OF, and may also be assigned by forming a notch. The notch is formed, for example, as a recess that is indented toward the center C at the reference position R. The line segment connecting the apex of the recess and the center C is aligned along the <1-100> direction. It is preferable to form the orientation flat notch in the [1-100] direction. Alternatively, crystal orientation information may be assigned to the SiC single crystal 10 by forming a marker or the like on the SiC single crystal 10 without removing a part of the SiC single crystal 10.

[0070] In the manufacturing method of SiC booleans according to this embodiment, the crystal orientation of the (0001) plane determined from the measured values ​​matches the actual crystal orientation with high accuracy, so the reference position R located in the <1-100> direction can be accurately set, and the accuracy of the crystal orientation information assigned to the SiC boolean is high. As a result, for example, a SiC boolean can be manufactured in which the deviation between the direction in which the orientation flat OF extends and the actual <11-20> direction in the crystal is small. Also, for example, a SiC boolean can be manufactured in which the deviation between the direction perpendicular to the line connecting the center C and the tip of the notch and the actual <11-20> direction in the crystal is small. In other words, even when the crystal orientation of the SiC boolean according to this embodiment is determined based on the assigned crystal orientation information (e.g., orientation flat OF, notch), the deviation from the actual crystal orientation in the crystal is small.

[0071] "SiC Single Crystal" Figure 6 is a cross-sectional view of the SiC single crystal according to this embodiment. Figure 7 is another cross-sectional view of the SiC single crystal according to this embodiment. Figure 6 is a cross-section cut in the XZ plane, and Figure 7 is a cross-section cut in the YZ plane. Figures 6 and 7 illustrate the case where the SiC single crystal is a SiC single crystal layer 30, but the SiC single crystal may be a SiC boule (ingot) or a SiC epitaxial wafer. A SiC epitaxial wafer is formed by laminating a SiC epitaxial layer (SiC epitaxial film) on one surface of a SiC single crystal layer. The SiC epitaxial layer inherits the crystal structure of the SiC single crystal layer and therefore has the same crystal structure as the SiC single crystal layer. Although a SiC epitaxial wafer has a two-layer structure consisting of a SiC single crystal layer and a SiC epitaxial layer, it is a type of SiC single crystal. The following describes the specific structure of the SiC single crystal layer 30, but the same applies to SiC boules (ingots) and SiC epitaxial wafers. In other words, the following SiC single crystal layer 30 can be replaced with SiC boules (ingots) or SiC epitaxial wafers.

[0072] The SiC single crystal layer 30 shown in Figure 6 has an offset angle θ1 in the <11-20> direction of the first main surface S1. The SiC single crystal layer 30 shown in Figure 7 may or may not have an offset angle θ2 in the <1-100> direction of the first main surface S1. The offset angle is the angle between the plane perpendicular to the Z direction, which is the thickness direction of the SiC single crystal layer 30, and the (0001) plane in the actual crystal. The offset angle θ1 is the slope of the component of the offset angle in the <11-20> direction, and the offset angle θ2 is the slope of the component of the offset angle in the <1-100> direction.

[0073] The first surface of the SiC single crystal layer 30 has an offset angle θ1 with respect to the (0001) plane in the <11-20> direction. This offset angle θ1 is, for example, 3.900° or more and 4.100° or less (within the range of 4.000 ± 0.100°), preferably 3.950° or more and 4.050° or less, and more preferably 3.980° or more and 4.020° or less. The offset angle θ1 may also be, for example, 3.999° or less, or 4.001° or more.

[0074] The first surface of the SiC single crystal layer 30 has an offset angle θ2 with respect to the (0001) plane in the <1-100> direction. This offset angle θ2 is, for example, -0.100° or more and 0.100° or less (within the range of 0.000 ± 0.100°), preferably -0.080° or more and 0.080° or less, and more preferably -0.050° or more and 0.050° or less. The offset angle θ2 may also be, for example, -0.001° or less, or 0.001° or more.

[0075] The offset angle is set according to the product specifications. The design value of the offset angle does not necessarily match the actual offset angle. For example, in the <11-20> direction, the offset angle θ1 and the design value of the offset angle θ1' may not match. Also, for example, in the <1-100> direction, even if the design value of the offset angle is 0.000°, an offset angle θ2 may occur. This is because accurately understanding the (0001) plane in the actual crystal is necessary to make the offset angle and the design value of the offset angle match.

[0076] As shown in Figure 6, in the SiC single crystal layer 30, in the <11-20> direction, the angle φ1 between the crystal orientation Lv of the (0001) plane (lattice plane L) and a line V1 perpendicular to the plane S2 which is inclined by a design offset value θ1' with respect to the first principal plane S1 is -0.100° or more and 0.100° or less (within the range of 0.000 ± 0.100°). The angle φ1 is preferably -0.075° or more and 0.075° or less, more preferably -0.050° or more and 0.050° or less, and even more preferably -0.025° or more and 0.025° or less. The angle φ1 may also be -0.100° or more and -0.001° or less, or 0.001° or more and 0.100° or less. Here, the lattice plane L is the (0001) plane in the actual crystal, and the angle between the lattice plane L and the first plane S1 is the actual offset angle θ1 in the <11-20> direction.

[0077] Furthermore, as shown in Figure 7, in the SiC single crystal layer 30, in the <1-100> direction, the angle φ2 between the crystal orientation Lv of the (0001) plane (lattice plane L) and a line V2 perpendicular to the plane that is inclined with respect to the first principal plane S1 by the design value of the offset angle is between -0.100° and 0.100°. Here, Figure 7 illustrates the case where the design value of the offset angle in the <1-100> direction is 0.000°, and the first principal plane S1 and the plane that is inclined with respect to the first principal plane S1 by the design value of the offset angle are in a parallel relationship. The angle φ2 between the crystal orientation Lv of the (0001) plane (lattice plane L) and a line V2 perpendicular to the plane that is inclined by a design value offset angle with respect to the first principal plane S1 is preferably -0.075° or more and 0.075° or less, preferably -0.050° or more and 0.050° or less, and preferably -0.025° or more and 0.025° or less. The angle φ2 may also be -0.100° or more and -0.001° or less, and may also be 0.001° or more and 0.100° or less.

[0078] Here, the crystal orientation Lv of the (0001) plane (lattice plane L) is the orientation obtained as a result of X-ray diffraction measurement performed on the SiC single crystal layer 30. The crystal orientation Lv of the (0001) plane is the

[0001] orientation based on the results of X-ray diffraction.

[0079] The (0001) plane crystal orientation Lv is, for example, a crystal orientation determined based on the crystal orientation measured in at least one measurement area A where the defect density is less than or equal to the average defect density. For example, if there is one measurement area A, it is the crystal orientation measured in that measurement area A, and if there are multiple measurement areas A, it is the average value of the crystal orientations measured in multiple measurement areas A. The multiple measurement areas A preferably include measurement area A1, more preferably include measurement area A2, even more preferably include measurement area A3, and particularly preferably include measurement area A4.

[0080] The SiC substrate 30 according to this embodiment has an orthogonal misorientation of -1.47° or more and 1.47° or less. Preferably, the orthogonal misorientation is -1.09° or more and 1.09° or less, preferably -0.73° or more and 0.73° or less, and preferably -0.36° or more and 0.36° or less. The orthogonal misorientation is a value that indicates how much the actual offset angle deviates from the design value of the offset angle. For example, in the case of a (0001) plane that has an offset angle θ1 in the <11-20> direction and no offset angle in the <1-100> direction, the line segment obtained by projecting the

[0001] direction vector onto the (0001) plane extends in the <11-20> direction. In contrast, if the (0001) plane is slightly tilted in the <1-100> direction, the line segment obtained by projecting the

[0001] direction vector onto the (0001) plane extends in a direction tilted relative to the <11-20> direction. The angle between this line segment obtained by projecting the

[0001] direction vector onto the (0001) plane and the <11-20> direction corresponds to the orthogonal misorientation.

[0081] Figure 8 is a plan view of the SiC single crystal according to this embodiment. In Figure 8, as in Figures 6 and 7, the case where the SiC single crystal is a SiC single crystal layer 30 is illustrated, but the SiC single crystal may be a SiC boule (ingot) or a SiC epitaxial wafer. The configuration of the SiC single crystal layer 30 will be described in detail below, but the same applies to SiC boules (ingots) and SiC epitaxial wafers. In other words, the following SiC single crystal layer 30 can be replaced with a SiC boule (ingot) or a SiC epitaxial wafer.

[0082] The SiC single crystal layer 30 has an orientation flat (OF) formed on it, which provides information indicating the crystal orientation. The angle between the direction in which the orientation flat (OF) extends and the <11-20> direction is, for example, -0.100° or more and 0.100° or less. The angle between the direction in which the orientation flat (OF) extends and the <11-20> direction is preferably -0.075° or more and 0.075° or less, more preferably -0.050° or more and 0.050° or less, and even more preferably -0.025° or more and 0.025° or less. The angle between the direction in which the orientation flat (OF) extends and the <11-20> direction may also be, for example, -0.100° or more and -0.001° or less, or 0.001° or more and 0.100° or less.

[0083] Here, the <11-20> direction is the orientation of the SiC single crystal layer 30 obtained from the results of X-ray diffraction. The <11-20> direction is, for example, a crystal orientation determined based on the crystal orientation measured in at least one measurement area A where the defect density is less than or equal to the average defect density. For example, if there is one measurement area A, it is the crystal orientation measured in that measurement area A, and if there are multiple measurement areas A, it is the average value of the crystal orientations measured in multiple measurement areas A.

[0084] Figure 9 is a plan view of another example of the SiC single crystal according to this embodiment. The SiC single crystal layer 31 shown in Figure 9 differs from the SiC single crystal layer 30 shown in Figure 8 in that it has notches n instead of orientation flats OF as information indicating the crystal orientation.

[0085] The SiC single crystal layer 31 has an orientation flat OF formed thereon, which provides information indicating the crystal orientation. The angle between the direction perpendicular to the line connecting the center C and the tip of the notch n and the <11-20> direction is, for example, -0.100° or more and 0.100° or less. The angle between the direction perpendicular to the line connecting the center C and the tip of the notch n and the <11-20> direction is preferably -0.075° or more and 0.075° or less, more preferably -0.050° or more and 0.050° or less, and even more preferably -0.025° or more and 0.025° or less. The angle between the direction perpendicular to the line connecting the center C and the tip of the notch n and the <11-20> direction may be, for example, -0.100° or more and -0.001° or less, or 0.001° or more and 0.100° or less.

[0086] Here, the <11-20> direction is the orientation of the SiC single crystal layer 30 obtained from the results of X-ray diffraction. The <11-20> direction is, for example, a crystal orientation determined based on the crystal orientation measured in at least one measurement area A where the defect density is less than or equal to the average defect density. For example, if there is one measurement area A, it is the crystal orientation measured in that measurement area A, and if there are multiple measurement areas A, it is the average value of the crystal orientations measured in multiple measurement areas A.

[0087] The notch n is formed, for example, based on the SiC Boule manufacturing method described above. Since the SiC single crystal layer 31 is made by slicing the SiC Boule, if the notch n is formed in the SiC Boule, the same notch n will be formed in the SiC single crystal layer 31. The SiC Boule manufacturing method described above has high accuracy in the <11-20> direction determined from measured values. Therefore, the notch n can be formed in an accurate position. In this embodiment, the SiC single crystal layer 31 is formed in the <1-100> direction with respect to the center C with high accuracy based on the crystal orientation.

[0088] "SiC Wafer" Figure 10 is a plan view of the SiC wafer 100 according to this embodiment. The SiC wafer 100 is a wafer that is approximately circular in plan view and comprises a SiC single crystal layer with a small offset angle deviation manufactured by the above procedure, and a crystal substrate (crystal substrate layer) bonded to the SiC single crystal layer.

[0089] The diameter of the first surface of the SiC wafer 100 is, for example, 6 inches or more, preferably 8 inches or more, more preferably 10 inches or more, and even more preferably 12 inches or more.

[0090] The diameter of the first surface of the SiC wafer 100 is, for example, 145 mm or more, preferably 149 mm or more. The diameter of the first surface of the SiC wafer 100 is, for example, 145 mm or less, preferably 151 mm or less. The diameter of the first surface of the SiC wafer 100 is, for example, 195 mm or more, preferably 199 mm or more. The diameter of the first surface of the SiC wafer 100 is, for example, 205 mm or less, preferably 201 mm or less. The diameter of the first surface of the SiC wafer 100 is, for example, 245 mm or more, preferably 249 mm or more. The diameter of the first surface of the SiC wafer 100 is, for example, 255 mm or less, preferably 251 mm or less. The diameter of the first surface of the SiC wafer 100 is, for example, 295 mm or more, preferably 299 mm or more. The diameter of the first surface of the SiC wafer 100 is, for example, 305 mm or less, and preferably 301 mm or less.

[0091] The SiC wafer 100 may have a notch n for determining the orientation of the crystal axis when viewed from the Z direction. The notch n is a groove cut out from the outer circumference of the SiC wafer 100 toward the inside. The notch n is located, for example, in the [1-100] direction from the center of the SiC wafer 100. Instead of a notch n, the SiC wafer 100 may have an orientation flat. The center is the center of the smallest circumscribed circle that is tangent to the outer circumference of the SiC wafer 100.

[0092] As the crystal substrate constituting the SiC wafer 100, a substrate with a small SORI is selected so as not to have a large effect on the crystal orientation misalignment of the SiC single crystal layer due to bonding. The SORI of the crystal substrate is preferably 20 μm or less, more preferably 15 μm or less, even more preferably 12 μm or less, and most preferably 10 μm or less. SiC wafers 100 manufactured using a crystal substrate with a small SORI are less prone to warping even when processed (for example, by forming an epitaxial film). By reducing the SORI, the effect of bonding between the SiC single crystal layer and the crystal substrate on misalignment in the offset direction is suppressed.

[0093] SORI is one of the parameters that indicates the tendency of a substrate to warp. SORI is expressed as the sum of the normal distances from the lowest squares plane, which is calculated using the least squares method with all data on the substrate surface, when the back surface of the substrate is supported and measured without changing its original shape. Substrates with a large SORI are prone to warping during processing. Substrates with a small SORI are less prone to warping even after processing.

[0094] Figure 11 is a schematic diagram illustrating the definition of SORI. As shown in Figure 11, when the least-squares plane S1 on the substrate surface is taken as the reference height (least-squares plane height), SORI represents the sum of the distance (a) between the height at the highest point HP on the substrate surface and the reference height, and the distance (b) between the height at the lowest point LP and the reference height.

[0095] Figure 12 is a cross-sectional view of a SiC wafer (composite substrate) 100 according to this embodiment. The SiC wafer 100 comprises a crystalline substrate 11 and a SiC single crystal layer 12. The crystalline substrate 11 is in contact with the SiC single crystal layer 12 and is bonded to the SiC single crystal layer 12. The crystalline substrate 11 and the SiC single crystal layer 12 are bonded together during the manufacturing process and were originally separate substrates.

[0096] The SiC wafer after bonding has an angle between the crystal orientation of the (0001) plane of the SiC single crystal layer and a line perpendicular to the plane that is tilted by a design value offset angle relative to the first plane of the SiC single crystal layer, which is between -0.500° and 0.500°. This offset angle may be an offset angle in the <11-20> direction or the <1-100> direction. The angle between the crystal orientation of the (0001) plane of the SiC single crystal layer and a line perpendicular to the plane tilted by a design value offset angle relative to the first plane of the SiC single crystal layer is most preferably -0.050° or more and 0.050° or less, second preferably -0.075° or more and 0.075° or less, third preferably -0.100° or more and 0.100° or less, fourth preferably -0.150° or more and 0.150° or less, fifth preferably -0.200° or more and 0.200° or less, sixth preferably -0.250° or more and 0.250° or less, sixth preferably -0.300° or more and 0.300° or less, and seventh preferably -0.400° or more and 0.400° or less. The SiC wafer after bonding may have an angle between the crystal orientation of the (0001) plane of the SiC single crystal layer and a line perpendicular to the plane that is tilted by a design value offset angle with respect to the first plane of the SiC single crystal layer, which may be -0.001° or less, or 0.001° or more. The SiC wafer after bonding also satisfies the requirement that, when the first plane is viewed from above, the angle between the direction in which the orientation flat extends or the direction perpendicular to the line connecting the center and the tip of the notch and the <11-20> direction is between -0.500° and 0.500°. These angles are preferable to be as small as possible, most preferably -0.050° or more and 0.050° or less, second preferably -0.075° or more and 0.075° or less, third preferably -0.100° or more and 0.100° or less, fourth preferably -0.150° or more and 0.150° or less, fifth preferably -0.200° or more and 0.200° or less, sixth preferably -0.250° or more and 0.250° or less, seventh preferably -0.300° or more and 0.300° or less, and eighth preferably -0.400° or more and 0.400° or less.When viewing the first surface of the bonded SiC wafer from above, the angle between the direction in which the orientation flat extends or the direction perpendicular to the line connecting the center and the tip of the notch and the <11-20> direction may be -0.001° or less, or it may be 0.001° or more.

[0097] The polytype of the crystalline substrate 11 and the SiC single crystal layer 12 is not particularly limited and can be any of 2H, 3C, 4H, or 6H. For example, the SiC single crystal layer 12 is 4H-SiC.

[0098] The design value for the offset angle of the first plane is preferably 4.000° with respect to the <11-20> direction and 0.000° with respect to the <1-100> direction. After bonding, the SiC wafer has an offset angle of the first plane of the SiC single crystal layer with respect to the (0001) plane in the <11-20> direction, and the offset angle may be within the range of 4.000 ± 0.500°. A smaller range of this offset angle is preferable for higher precision, and may be within the range of 4.000 ± 0.400°, 4.000 ± 0.300°, 4.000 ± 0.250°, 4.000 ± 0.200°, 4.000 ± 0.150°, 4.000 ± 0.100°, 4.000 ± 0.075°, and 4.000 ± 0.050°. This offset angle may be 3.999° or less, or 4.001° or more. Furthermore, the SiC wafer after bonding has an offset angle between the first plane of the SiC single crystal layer and the (0001) plane in the <1-100> direction, and this offset angle may be within the range of 0.000 ± 0.500°. A smaller range for this offset angle is preferable for higher precision, and it may be within the range of 0.000 ± 0.400°, 0.000 ± 0.300°, 0.000 ± 0.250°, 0.000 ± 0.200°, 0.000 ± 0.150°, 0.000 ± 0.100°, 0.000 ± 0.075°, or 0.000 ± 0.050°. This offset angle may be -0.001° or less, or 0.001° or more. Furthermore, the SiC wafer after bonding may be determined based on the crystal orientation of the (0001) plane of the SiC single crystal layer, measured in a region having a defect density less than or equal to the average defect density. The measurement method may be the one described above.

[0099] The thickness in the direction perpendicular to the first plane is preferably not less than 200 µm and not more than 600 µm, more preferably not less than 300 µm and not more than 500 µm. When the thickness is not less than 200 µm, the bonding between the crystal substrate 11 and the SiC single crystal layer 12 is less likely to be misaligned, and the operability during the process is improved. When the thickness is not more than 600 µm, conveyance troubles caused by weight are less likely to occur.

[0100] The bonding strength of the single crystal layer to the crystal substrate is preferably not less than 2 N / mm, more preferably not less than 3 N / mm, and may be, for example, 5 N / mm. When the bonding strength is not less than 2 N / mm, the bonding between the crystal substrate 11 and the SiC single crystal layer 12 is less likely to be misaligned.

[0101] The difference in coefficient of thermal expansion between the SiC single crystal layer and the crystal substrate is 9×10 －７ / K －１ or less, more preferably 8×10 －７ / K －１ or less, and may be, for example, 1×10 －６ / K －１ or more. When the difference in coefficient of thermal expansion is 9×10 －７ / K －１ or less, the stress applied to the crystal substrate 11 and the SiC single crystal layer 12 does not increase, and peeling or cracking can be prevented.

[0102] The crystal substrate 11 may be a single crystal or a polycrystal, but is more preferably a SiC polycrystalline substrate which is less likely to be confused with the X-ray diffraction peak of the single crystal layer when measuring the crystal plane orientation.

[0103] The SiC wafer 100 may have a bonding layer between the crystalline substrate 11 and the SiC single crystal layer 12. The bonding layer is located between the crystalline substrate 11 and the SiC single crystal layer 12. The bonding layer contains a compound of Si and C. For example, the bonding layer is a layer in which 90 atoms or more of the constituent elements are Si and C, and Si and C are present in approximately a 1:1 ratio. The bonding layer may be crystalline, amorphous, or a layer in which both are present. The bonding layer may, in some cases, contain noble gas elements such as Ar and Ne, elements used for etching such as H, and dopant elements such as N, P, and B. The total amount of elements other than Si and C contained in the bonding layer is 10 atoms or less.

[0104] The boundary between the crystalline substrate 11 and the SiC single crystal layer 12 may contain voids. If there are too many voids, the bonding state may not be maintained when heated, so it is desirable to minimize the presence of voids. Preferably, the voids are less than 5% of the bonding area in each interface region. The bonding layer is a layer formed by bonding the crystalline substrate 11 and the SiC single crystal layer 12 together.

[0105] The bonding layer can be identified, for example, by magnifying the side (edge) of the substrate, or by observing the cross-section with a transmission electron microscope (TEM). The thickness of the bonding layer is, for example, between 0.25 nm and 10 nm. The thickness of the bonding layer can sometimes be measured directly by observing the cross-section with a TEM, or it can be measured by scanning the Si-C bonding state using X-ray photoelectron spectroscopy (XPS). However, the resolution of the equipment such as the transmission electron microscope must be considered.

[0106] The surface roughness (Ra) of the crystal substrate 11 is preferably 10 nm or less, more preferably 0.5 nm or less, and even more preferably 0.3 nm or less. The surface roughness (Ra) of the crystal substrate 11 is the surface roughness (Ra) of the surface of the crystal substrate 11 that is not bonded to the SiC single crystal layer 12.

[0107] The surface roughness (Ra) of the SiC single crystal layer 12 is preferably 10 nm or less, more preferably 0.5 nm or less, and even more preferably 0.3 nm or less. The surface roughness (Ra) of the SiC single crystal layer 12 is the surface roughness (Ra) of the surface of the SiC single crystal layer 12 that is not bonded to the crystal substrate 11.

[0108] If the surface roughness of the crystal substrate 11 and the SiC single crystal layer 12 is small, the probability of voids being introduced into the bonding interface when they are bonded together can be reduced.

[0109] Next, a method for manufacturing the SiC wafer 100 according to this embodiment will be described. Figures 13 to 15 are diagrams illustrating the method for manufacturing the SiC wafer 100 according to this embodiment. The method for manufacturing the SiC wafer 100 includes, for example, a crystal substrate preparation step, a SiC single crystal layer preparation step, a bonding step, an edge adjustment step, and a separation step.

[0110] In the crystal substrate preparation step, the crystal substrate 11 described above is prepared. The crystal substrate 11 may be a single crystal or a polycrystalline material. For example, if the crystal substrate 11 is a SiC single crystal, the SiC single crystal may be produced by sublimation, gas method, or solution method. As a means of edge adjustment, a notch or orientation flat is formed on a part of the edge of the prepared crystal substrate 11.

[0111] In the SiC single crystal layer preparation step, a SiC single crystal 13, which will become the SiC single crystal layer described above, is prepared. The SiC single crystal 13 is a single crystal of SiC. The SiC single crystal 13 may be prepared by sublimation, gas method, or solution method.

[0112] A SiC single crystal layer 12 can be obtained by slicing the SiC single crystal 13 to a desired thickness. The SiC single crystal layer can be sliced ​​using known methods such as a wire saw.

[0113] As shown in Figure 14A, when a notch is selected as a means of edge face adjustment (alignment), the size of the notch (pre-notch) 11b formed on the crystal substrate 11 is made smaller than the size of the notch 13a formed on the SiC single crystal 13. Specifically, for example, the width b of the notch 11b１ The width a of the notch 13a １ The value should be between 30% and 70%. Also, for example, the depth b of notch 11b. ２ to the depth a of notch 13a ２ The amount should be between 30% and 70%.

[0114] As shown in Figure 15A, when an orientation flat is selected as a means of adjusting the edge face, the size of the orientation flat (pre-orientation flat) 11d formed on the crystal substrate 11 is made smaller than the size of the orientation flat 13c formed on the SiC single crystal 13. Specifically, for example, the width d of the orientation flat 11d １ The width of the original frame 13cm １ The amount should be between 30% and 70%.

[0115] If the size ratio of the notch or orientation flat of the crystal substrate 11 to the SiC single crystal layer 12 exceeds the above range, the adjustment allowance after bonding tends to be insufficient. If the same size ratio falls below the above range, the accuracy of edge adjustment decreases.

[0116] Figure 14B is a magnified view of the overlapping portion of the notches of the SiC single crystal 13 and the crystal substrate 11 after bonding. Viewed from the SiC single crystal 13 side, the notch 11b of the crystal substrate 11 protrudes inside the notch 13a of the SiC single crystal 13.

[0117] Figure 15B is a magnified view of the overlapping portion of the orientation flats of the SiC single crystal 13 and the crystal substrate 11 after bonding. Viewed from the SiC single crystal 13 side, the orientation flat 11d of the crystal substrate 11 protrudes outside the orientation flat 13c of the SiC single crystal 13. The protruding portion becomes the adjustment allowance for the position of the end face in the next end face adjustment process.

[0118] In the edge adjustment process, the notches or orientation flats of the SiC single crystal 13 and the crystal substrate 11 are processed to align. Specifically, in the case of Figure 14B, the protruding portion of the notch 11b of the crystal substrate 11 is cut off, and in the case of Figure 15B, the protruding portion of the orientation flat 11c of the crystal substrate 11 is cut off. After cutting, the positions of the notches or orientation flats of the SiC single crystal 13 and the crystal substrate 11 are aligned. By performing this process, the positional accuracy of the bonding between the SiC single crystal 13 and the crystal substrate 11 can be improved.

[0119] The crystalline substrate 11 and the SiC single crystal 13 can be bonded together by activating the bonding surface, then stacking them and applying pressure. The bonding surface can be activated, for example, by irradiating the bonding surface with Ar ions. By performing the bonding process, a bonded body is obtained in which the crystalline substrate 11 and the SiC single crystal 13 are joined together.

[0120] As shown in Figure 13, in the separation step, a portion of the SiC single crystal 13 is separated from the bonded body. The SiC single crystal 13 is separated in the thickness direction. For example, by heating the bonded body, the SiC single crystal 13 is separated along the ion implantation region IP. By separating a portion of the SiC single crystal 13 in the thickness direction, a thin film SiC single crystal layer 12 is obtained.

[0121] By following the above-described process, a SiC wafer (composite substrate) 100 is obtained in which a crystal substrate 11 and a SiC single crystal layer 12 are bonded together. The SiC single crystal layer 12 is selected based on the crystal orientation measured in a region with a low defect density, and is characterized by a small offset angle deviation. Furthermore, the underlying crystal substrate 11 is selected for its small SORI, and the alignment accuracy of the SiC single crystal layer 12 is improved by performing the edge adjustment method described above. Therefore, in the SiC wafer in which these are bonded together, the plane orientation deviation of the SiC single crystal layer is kept within the range of 0.000 ± 0.500°.

[0122] Precisely setting the crystal orientation of the SiC single crystal layer is advantageous in post-processing when manufacturing SiC devices. SiC devices are manufactured by depositing a SiC epitaxial layer on one surface of a SiC single crystal layer, forming multiple elements within the SiC epitaxial layer, and then framing the SiC wafer for each of the multiple elements. For example, a SiC wafer is chipped when manufacturing a SiC device. When chipping, the SiC single crystal layer is cut along, for example, the <11-20> direction and the <1-100> direction. Precisely setting the crystal orientation of the SiC single crystal layer can suppress deviations in the cutting direction when chipping. If the cutting direction is misaligned with the <11-20> direction or the <1-100> direction, it may cause damage to the SiC single crystal layer.

[0123] Furthermore, if the crystal orientation of the SiC single crystal layer is accurately set, the crystal orientation of the SiC epitaxial wafer will also be accurate. This is because the SiC epitaxial layer inherits the crystal structure of the SiC single crystal. Therefore, the SiC epitaxial wafer satisfies the requirement that the angle between the crystal orientation of the (0001) plane and a line perpendicular to the plane tilted by a design value of the offset angle with respect to the first plane is between -0.500° and 0.500°. This offset angle may be the offset angle in the <11-20> direction or the <1-100> direction. The angle between the crystal orientation of the (0001) plane of the SiC epitaxial layer and a line perpendicular to the plane that is inclined by a design value offset angle with respect to the first plane is preferably as small as possible, most preferably -0.050° or more and 0.050° or less, second preferably -0.075° or more and 0.075° or less, third preferably -0.100° or more and 0.100° or less, fourth preferably -0.150° or more and 0.150° or less, fifth preferably -0.200° or more and 0.200° or less, sixth preferably -0.250° or more and 0.250° or less, seventh preferably -0.300° or more and 0.300° or less, and eighth preferably -0.400° or more and 0.400° or less. The SiC epitaxial wafer may have an angle between the crystal orientation of the (0001) plane and a line perpendicular to the plane that is tilted by a design value offset angle relative to the first plane, which may be -0.001° or less, or 0.001° or more. The SiC epitaxial wafer also satisfies the requirement that, when the first plane is viewed from above, the angle between the direction in which the orientation flat extends or the direction perpendicular to the line connecting the center and the tip of the notch and the <11-20> direction is between -0.500° and 0.500°.These angles are preferable to be as small as possible, most preferably -0.050° or more and 0.050° or less, second preferably -0.075° or more and 0.075° or less, third preferably -0.100° or more and 0.100° or less, fourth preferably -0.150° or more and 0.150° or less, fifth preferably -0.200° or more and 0.200° or less, sixth preferably -0.250° or more and 0.250° or less, seventh preferably -0.300° or more and 0.300° or less, and eighth preferably -0.400° or more and 0.400° or less. When viewing the first surface of the SiC epitaxial wafer from above, the angle between the direction in which the orientation flat extends or the direction perpendicular to the line connecting the center and the tip of the notch and the <11-20> direction may be -0.001° or less, or 0.001° or more.

[0124] Furthermore, if the crystal orientation of the SiC epitaxial wafer is accurately set, the crystal orientation of the SiC device will also be accurate. This is because SiC devices are chips made from SiC epitaxial wafers, and therefore there is no difference in their crystal structure.

[0125] A SiC device comprises, for example, a SiC single crystal layer, a crystalline substrate bonded to the SiC single crystal layer, a SiC epitaxial layer stacked on the SiC single crystal layer, and elements formed inside the SiC epitaxial layer. The SiC single crystal layer and SiC epitaxial layer in a SiC device correspond to chips formed from the SiC single crystal layer and SiC epitaxial layer of a SiC epitaxial wafer. A SiC device can be manufactured by preparing a SiC epitaxial wafer, forming multiple elements within the SiC epitaxial layer, and then separating the multiple elements into individual pieces. The SiC epitaxial wafer is manufactured using the procedure described above.

[0126] The SiC device satisfies the requirement that the angle between the crystal orientation of the (0001) plane and a line perpendicular to a plane tilted by a design value of the offset angle with respect to the first plane is between -0.500° and 0.500°. This offset angle may be an offset angle in the <11-20> direction or the <1-100> direction. The angle between the crystal orientation of the (0001) plane and the plane tilted by a design value offset angle with respect to the first plane, and the line perpendicular to it, is preferably as small as possible. Most preferably, it is -0.050° or more and 0.050° or less; secondly, -0.075° or more and 0.075° or less; thirdly, -0.100° or more and 0.100° or less; fourthly, -0.150° or more and 0.150° or less; fifthly, -0.200° or more and 0.200° or less; sixthly, -0.250° or more and 0.250° or less; seventhly, -0.300° or more and 0.300° or less; and eighthly, -0.400° or more and 0.400° or less. The SiC device may have an angle between the crystal orientation of the (0001) plane and a line perpendicular to a plane that is tilted by a design value offset angle with respect to the first plane, which may be -0.001° or less, or 0.001° or more.

[0127] The crystal orientation of the (0001) plane may be measured, for example, at the center when the SiC device is viewed in plan view. Alternatively, the crystal orientation of the (0001) plane may be determined based on the crystal orientation measured in at least one measurement region where the defect density is less than or equal to the average defect density, or it may be determined based on the crystal orientation measured in a low defect density region.

[0128] The first surface may be either the first surface of the SiC single crystal layer of the SiC device or the first surface of the SiC epitaxial layer. When measuring the first surface of the SiC single crystal layer, the SiC epitaxial layer and the device can be removed before measurement. When measuring the first surface of the SiC epitaxial layer, the portion containing the device may be removed or avoided during measurement.

[0129] While preferred embodiments of this disclosure have been described in detail above, this disclosure is not limited to any particular embodiment, and various modifications and changes are possible within the scope of the gist of this disclosure as described in the claims. The SiC wafers, SiC epitaxial wafers, and SiC devices of this disclosure may be handled together with design value information, such as the design value of the offset angle. For example, a SiC wafer set may include a SiC wafer and the design value information of that SiC wafer. Also, for example, a SiC epitaxial wafer set may include a SiC epitaxial wafer and the design value information of that SiC epitaxial wafer. Also, for example, a SiC device set may include a SiC device and the design value information of that SiC device. By handling the information containing the design value information as a set, it becomes easier to compare the design value with the measured value.

[0130] The effects of the present invention will be made clearer by the following examples. However, the present invention is not limited to the following examples and can be modified as appropriate without altering its essence.

[0131] (Example 1) Following the above embodiment, a SiC substrate with an offset angle in the <11-20> direction was prepared. The median values ​​of the offset angles were set to 4.000° in the <11-20> direction and 0.000° in the <1-100> direction. The first surface of the SiC substrate was divided into a region A with relatively few defects and a region B with many defects, and the defect density of 10 sections (sections 1 to 10) of 10 mm × 10 mm in region A was measured by X-ray topography. Micropipes and through-helical dislocations were extracted and measured as defects. Micropipes and through-helical dislocations are defects that are considered to have a high probability of affecting the surface orientation. The defect density due to micropipes in region A was approximately 0 cm². －２ The defect density due to through-helic dislocations is 3.00 cm². －２ The following was observed: The average defect density for the entire first surface was 0.86 cm². －２ That was the case.

[0132] The crystal orientations in the <11-20> direction of 10 sections were measured using XRD. The results of the crystal orientation measurements are as follows.

[0133] Section 1: 3.991° Section 2: 3.986° Section 3: 3.982° Section 4: 3.973° ​​Section 5: 3.981° Section 6: 3.977° Section 7: 3.979° Section 8: 3.972° Section 9: 3.971° Section 10: 3.972°

[0134] The results measured in each section were averaged, and the average value was calculated. The angle between this average value and the plane tilted by the median of the design offset angle relative to the first plane (i.e., 4.000°) was 0.021°. The measured crystal orientation of the (0001) plane, determined from the average value, was tilted by -0.021° with respect to a line perpendicular to the plane tilted by the median of the design offset angle relative to the first plane.

[0135] (Comparative Example 1) On the first surface of a SiC substrate, the defect density of 10 sections (sections 1 to 10) of 10 mm × 10 mm in region B, which has a relatively high number of defects, was measured by X-ray topography. The types of defects measured were the same as in Example 1. The defect density in region B measured by micropipes was 1.00 cm². －２ The above results indicate that the defect density due to through-helic dislocations is 15.00 cm³. －２ The above was the procedure. The crystal orientations in the <11-20> direction of the 10 sections were measured using XRD. The results of the crystal orientation measurements are as follows.

[0136] Section 1: 3.826° Section 2: 3.916° Section 3: 3.900° Section 4: 3.898° Section 5: 3.917° Section 6: 3.924° Section 7: 3.901° Section 8: 3.885° Section 9: 3.906° Section 10: 3.907°

[0137] The results measured in each section were averaged, and the average value was calculated. The angle between this average value and the plane tilted by the median of the design offset angle relative to the first plane (i.e., 4.000°) was 0.102°. The measured crystal orientation of the (0001) plane, determined from the average value, was tilted by -0.102° with respect to a line perpendicular to the plane tilted by the median of the design offset angle relative to the first plane.

[0138] Table 1 below summarizes the results for Example 1 and Comparative Example 1.

[0139] As shown in Example 1, the crystal orientation measured in the low defect density region showed little deviation from the actual crystal orientation of the crystal and little deviation from the design median. In contrast, the crystal orientation measured in the high defect density region (Comparative Example 1) showed a larger deviation from the design median than in Example 1. Furthermore, by grinding or slicing the prepared SiC substrate based on the crystal orientation obtained in Example 1, a SiC substrate having a crystal orientation with little deviation from the design value can be obtained. By manufacturing a SiC wafer using this SiC substrate with little deviation from the design value according to the procedure in accordance with the above embodiment, a SiC wafer having a crystal orientation with little deviation from the design value can be obtained. The SiC wafer obtained thereby comprises a SiC single crystal layer and a crystal substrate (crystal substrate layer) bonded to the SiC single crystal layer.

[0140] 1. First surface 2. Second surface 3. Side view 10, 13. SiC single crystal 11. Crystal substrate 12, 30, 31. SiC single crystal layer 20. SiC boolean 100. SiC wafer A, A1, A2, A3, A4. Measurement area C. Center L. Lattice plane Lv. Crystal orientation n. Notch S. Cross-section S1. First principal surface R. Reference position V1, V2. Line OF. Orientation flat

Claims

1. A SiC wafer comprising a SiC single crystal layer and a crystal substrate bonded to the SiC single crystal layer, wherein the first surface of the SiC single crystal layer has an offset angle with respect to the (0001) plane in the <11-20> direction, and the offset angle is within the range of 4.000 ± 0.500°.

2. A SiC wafer comprising a SiC single crystal layer and a crystal substrate bonded to the SiC single crystal layer, wherein the first surface of the SiC single crystal layer has an offset angle with respect to the (0001) plane in the <1-100> direction, and the offset angle is within the range of 0.000 ± 0.500°.

3. The SiC wafer according to claim 1 or 2, characterized in that the crystal orientation of the (0001) plane is determined based on the crystal orientation measured in a region having a defect density less than or equal to the average defect density.

4. A SiC wafer comprising a SiC single crystal layer and a crystal substrate bonded to the SiC single crystal layer, wherein the angle between the crystal orientation of the (0001) plane of the SiC single crystal layer and a line perpendicular to a plane tilted by a design value offset angle with respect to the first plane of the SiC single crystal layer is in the range of -0.500° to 0.500°.

5. The SiC wafer according to claim 4, wherein, in the <11-20> direction, the angle between the crystal orientation of the (0001) plane of the SiC single crystal layer and a line perpendicular to the plane tilted by a design value offset angle with respect to the first plane is within the range of -0.500° or more and 0.500° or less.

6. The SiC wafer according to claim 4, wherein, in the <1-100> direction, the angle between the crystal orientation of the (0001) plane of the SiC single crystal layer and a line perpendicular to a plane tilted by a design value offset angle with respect to the first plane is within the range of -0.500° or more and 0.500° or less.

7. The SiC wafer according to any one of claims 4 to 6, wherein the design values ​​of the offset angle with respect to the first surface are 4.000° in the <11-20> direction and 0.000° in the <1-100> direction.

8. The SiC wafer according to any one of claims 1, 2, 4 to 6, wherein the thickness in the direction perpendicular to the first surface is 200 μm or more and 600 μm or less.

9. The SiC wafer according to any one of claims 1, 2, 4 to 6, wherein the diameter of the first surface is 145 mm or more.

10. The SiC wafer according to any one of claims 1, 2, 4 to 6, wherein the diameter of the first surface is 195 mm or more.

11. The SiC wafer according to any one of claims 1, 2, 4 to 6, wherein the bonding strength of the SiC single crystal layer to the crystal substrate is 2 N / mm or more.

12. The difference in thermal expansion coefficient between the SiC single crystal layer and the crystal substrate is 9 × 10 －７ K －１ The SiC wafer according to any one of claims 1, 2, 4 to 6, which is as follows:

13. The SiC wafer according to any one of claims 1, 2, 4 to 6, wherein the crystal substrate is a SiC polycrystalline substrate.

14. The SiC wafer according to any one of claims 1, 2, 4 to 6, wherein the SiC single crystal layer and the crystal substrate are bonded together via a bonding layer containing Si and C.

15. A SiC epitaxial wafer according to any one of claims 1, 2, 4 to 6, wherein a SiC epitaxial layer is formed on the SiC single crystal layer.

16. A SiC device in which an element is formed inside the SiC epitaxial layer, in the SiC epitaxial wafer according to claim 15.

17. A SiC epitaxial wafer comprising a SiC single crystal layer, a crystal substrate layer bonded to the SiC single crystal layer, and a SiC epitaxial layer laminated on the SiC single crystal layer, wherein the angle between the crystal orientation of the (0001) plane of the SiC epitaxial layer and a line perpendicular to a plane tilted by a design value offset angle with respect to the first plane of the SiC epitaxial layer is -0.500° or more and 0.500° or less.

18. A SiC device comprising a SiC single crystal layer, a crystal substrate layer bonded to the SiC single crystal layer, a SiC epitaxial layer laminated on the SiC single crystal layer, and an element formed inside the SiC epitaxial layer, wherein the angle between the crystal orientation of the (0001) plane of the SiC single crystal layer and a line perpendicular to a plane tilted by a design value offset angle with respect to the first plane of the SiC single crystal layer is -0.500° or more and 0.500° or less.

19. A SiC device comprising a SiC single crystal layer, a crystal substrate layer bonded to the SiC single crystal layer, a SiC epitaxial layer laminated on the SiC single crystal layer, and an element formed inside the SiC epitaxial layer, wherein the angle between the crystal orientation of the (0001) plane of the SiC epitaxial layer and a line perpendicular to a plane tilted by a design value offset angle with respect to the first plane of the SiC epitaxial layer is -0.500° or more and 0.500° or less.

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