Rapid measurement of the internal impedance of batteries up to 100vdc

WO2026182907A1PCT designated stage Publication Date: 2026-09-03DYNEXUS TECHNOLOGY INC
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Patent Information

Application Number
PCT/US2026/014139
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-02-27
Filing Date
2026-02-05
Publication Date
2026-09-03

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Abstract

An impedance measurement device adapted to perform high precision rapid, broadband alternating current measurements of the internal impedance of batteries of greater than 50 volts direct current.
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Description

[0001] RAPID MEASUREMENT OF THE INTERNAL IMPEDANCE OF BATTERIES

[0002] I. FIELD OF THE INVENTION

[0003] An impedance measurement device adapted to perform high-precision, rapid, broadband alternating current measurements of the internal impedance of batteries of greater than 50 volts direct current.

[0004] II. BACKGROUND OF THE INVENTION

[0005] Electrochemical cells (“EC”) transform stored chemical energy into electrical energy. Impedance measurement devices (“IMD”) perform measurements that can reveal changes in the behavior of electrochemical processes in an electrochemical cell as a function of age and use which can provide insights into changes in the electrode surface and diffusion layer. The frequency range of interest of the impedance spectra of these energy storage devices spans a range of about 0.01 Hz to about 10 kHz. EC excitation test signals can comprise a sum of sines (“SOS”) with the frequencies of interest applied in parallel over the range of interest. The IMD assembles an excitation time record of an SOS current or voltages at the frequencies of interest, and implements the excitation time record to excite the EC with the SOS current or voltage (also referred to as the “excitation signal”) and simultaneously captures a response time record comprising the voltage response to the current and frequencies (or a current response to the voltage and frequencies)(also referred to as the “response signal”) applied to the EC. A variety of impedance measurement algorithms can be used to transform the captured response time record into the frequency spectrum, including as examples, harmonic compensated synchronous detection (“HCSD”), fast summation transformation (“FST”), cross talk compensation (“TCTC”), and harmonic orthogonal synchronous transformation (“HOST”).

[0006] However, there remains unresolved and long-standing problems with conventional IMD that perform impedance measurement of ECs of up to 50 VDC and are not adapted to perform impedance measurement of ECs over 50 VDC, such as, electric vehicle (“EV”) or stationary EC packs or modules having an electrical potential of 400 VDC to 1000 VDC. There would be a very substantial advantage in an IMD configured to perform high precision impedance measurement of ECs over 50 VDC, and in particular, EV modules or packs of 400 VDC to 1000 VDC whether during assembly, as the final product for use with EV and stationary, second use assessments, or other applications.III. SUMMARY OF THE INVENTION

[0007] Accordingly, a broad object of embodiments of the invention can be to provide an impedance measurement device, comprising:

[0008] a data acquisition and control device;

[0009] a push-pull current source including:

[0010] at least one push current driver configured to source current;

[0011] at least one pull current driver configured to sink current;

[0012] a balance control comprising current sensing amplifiers configured to:

[0013] sense outputs of said at least one push current driver and at least one pull current driver; and

[0014] generate feedback to maintain balance between outputs of said at least one push current driver and at least one pull current driver;

[0015] wherein said at least one push current driver and said at least one pull current driver under control of said data acquisition and control device generates an excitation signal to a test article.

[0016] Another broad object of embodiments of the invention can be to provide an impedance measurement device, comprising:

[0017] a data acquisition and control device;

[0018] a pre-amplifier configured to attenuate test battery voltage, said pre-amplifier having an pre-amplifier output voltage signal greater than a voltage range of said data acquisition system;

[0019] one or more resistors configured to attenuate the pre-amplifier output voltage signal to within said voltage range of said data acquisition system; and

[0020] a voltage follower operational amplifier electrically coupled to said one or more resistors to maintain unity gain of said pre-amplifier output voltage signal attenuated by said one or more resistance elements to said a data acquisition and control device.

[0021] Another broad object of the invention can be to an impedance measurement device, comprising:

[0022] a data acquisition and control device;

[0023] a push-pull current source including:

[0024] at least one push current driver configured to source current;at least one pull current driver configured to sink current;

[0025] a current sense amplifier configured to acquire the bias current from at least one push current driver and said at least one pull current driver;

[0026] wherein said data acquisition and control device measures said bias current, wherein said data acquisition and control device computes a direct current correction offset applied to said at least one push current driver and said at least one pull current driver,

[0027] wherein said direct current correction offset held constant during excitation signal to a test battery.

[0028] Naturally, further objects of the invention are disclosed throughout other areas of the specification, drawings, photographs, and claims.

[0029] IV. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure l is a general illustration of the inventive impedance measurement system.

[0031] Figure 2 is an electrical schematic diagram of a push pull current source, current driver balance control, battery polarity protection, and power supply of an embodiment of the inventive IMD.

[0032] Figure 3 is an electrical schematic diagram of data acquisition and control elements of an embodiment of the inventive IMD.

[0033] Figure 4 is an electrical schematic diagram of a probe interface of an embodiment of the inventive IMD.

[0034] Figure 5A is an electrical schematic diagram of a power operational amplifier configured as a ground referenced current source that sources current relative to ground to push the output on the positive half of the cycle in an embodiment of the inventive IMD.

[0035] Figure 5B is an electrical schematic diagram of a power operational amplifier configured to sink current relative to ground on the negative half of the cycle in an embodiment of the inventive IMD.Figure 6 is an electrical schematic diagram of a self-balancing circuit to correct differences between the current push and the current pull in an embodiment of the inventive IMD.

[0036] Figure 7 is an electrical schematic diagram of preamplifier configured to increase resolution of the inventive IMD.

[0037] Figure 8 is an electrical schematic diagram of a current sense amplifier for bias current control and in situ calibration of an embodiment of the inventive IMD.

[0038] Figure 9A is an electrical schematic diagram of a current driver voltage validator in an embodiment of the inventive IMD.

[0039] Figure 9B is an electrical schematic diagram of sum-of-sines signal magnitude validator in an embodiment of the inventive IMD.

[0040] Figure 9C is an electrical schematic diagram of a polarity connection validator in an embodiment of the inventive IMD.

[0041] Figure 10 is a plot of buck voltage versus power supply voltage.

[0042] Figure 11 is plot of buck voltage versus battery voltage.

[0043] Figure 12A is a plot of an impedance measurement spectrum of a lithium ion battery under test.

[0044] Figure 12B is a plot of an impedance measurement spectrum of a lead acid battery under test.

[0045] Figure 13 is a plot of impedance measurements of series connected lead acid batteries

[0046] Figure 14 is a plot of shifted impedance measurements of series connected lead acid batteries.

[0047] Figure 15 is a schematic diagram of a test cell equivalent circuit.Figure 16 is a plot of ten test cell spectra.

[0048] Figure 17 is plot of the average of the ten spectra depicted in Figure 15.

[0049] Figure 18 is a plot of the standard deviation of the spectra magnitude of the ten spectra depicted in Figure 16.

[0050] V. DETAILED DESCRIPTION OF THE INVENTION

[0051] With general reference to Figures 1 through 18, which illustrate an inventive impedance measurement system (1) configured to perform high precision impedance measurement of ECs of greater than 50 VDC, methods of making the inventive system (1), and methods of using the inventive system (1). In particular embodiments, the inventive impedance measurement system (1) can be configured to perform high precision impedance measurements of ECs having a voltage greater than 100 VDC. In particular embodiments, the impedance measurement system (1) can be configured to perform high precision impedance measurement of ECs having a voltage of 200 VDC to 1000 VDC. Specific configurations of the impedance measurement system (1) can be used for impedance measurement of battery modules or packs of 400 VDC to 1000 VDC during assembly of the modules or packs, or of the final product for use with EV or other applications.

[0052] Now, with primary reference to Figure 1 , which generally illustrates the impedance measurement system (1). The general impedance measurement process starts with a data acquisition and control module (6) (“DAQ”) that measures the battery (14) voltage. This voltage is held constant and sent back to a pre-amp (15, 18) as a subtraction of the buck voltage (48) to make its output zero during an impedance measurement. The isolation contacts (12, 13) are closed and the DAQ outputs a sum of sines (SOS) voltage signal (24) that goes to a smoothing low pass filter (23) that removes “stair-steps” of the zero-order hold output from the digital to analog converter of the DAQ (6). That voltage signal then goes to the current drivers (10, 11) which is a power op-amp configured as a voltage controlled current source. The resulting current signal excites the battery (14). Since the battery voltage is subtracted out with the buck voltage (48), the pre-amp (15, 18) only responds to the voltage change in the battery (14) due to the excitation current across the internal battery impedance. That voltage signal (1 ) is digitized and captured by the DAQEmbodiments of the impedance measurement system (1) include three principal subsystems: a push-pull current source (2), push-pull balance control module (3), and push-pull protection circuitry (4) as shown in the example of Figure 2; a battery sensing module (5), data acquisition and control module (“DAQ”) (6) and pre-amplifier protection circuitry (7) as shown in the example of Figure 3; and a test battery interface probe (8) as shown in the example of Figure 4.

[0053] Now, with primary reference to Figure 2, which depicts a power supply (9) under on / off control of the DAQ (6) which provides direct current (“DC”) power to a push current drivers (10) and pull current drivers (11), the balance control module (3) and push-pull protection circuitry (4). The push-pull current drivers (10, 11) are power operational amplifiers with the push current drivers configured to source current and the pull current drivers configured to sink current. The push current drivers (10) and the pull current drivers (11) comprise voltage controlled current sources. A ground isolated sum-of-sines signal (24) is generated by the data acquisition and control device (6) to the push current drivers (10) and the pull current drivers (11). The balance control module (3) includes current sensing amplifiers that sense the outputs of the push current drivers (10) and pull current drivers (11) and via feed-back control maintains the push current drivers (10) and the pull current drivers (11) in balance. The push-pull protection circuitry (4) is configured to prevent the push-pull connection relays (12, 13) from hook-up to the test battery (14) unless: the battery hook-up polarity is correct, all of the current source compliance voltages are correct, and current source SOS signal is correct. Additionally, the connection to the test battery (14) can be fuse protected.

[0054] Now, with primary reference to Figure 3, which depicts the battery sensing module (5), the pre-amplifier protection circuitry (7), the DAQ (6), and the power supply (9) under on / off control of the DAQ (6) provides voltage to the subsystem electronics. A voltage sense preamplifier (15) senses the battery voltage which is captured by the DAQ (6). Prior to the excitation of the test battery (14) by the SOS excitation signal (16) generated by push-pull current drivers (10, 11), the measured battery voltage is feed back to the voltage sense preamplifier (15) to subtract off the measured battery voltage. This correction can be held constant during the time which the SOS excitation signal (16) is being applied to the test battery (14). Thus, the voltage sense pre-amplifier (15) only detects the battery response to the SOS excitation signal (16) and all the analog to digital (A / D) bits of resolution of the DAQ (6) arefocused on the battery response signal (17) to the SOS excitation signal (16) and not on the DC battery voltage. The current sense amplifier (18) measures the current delivered by the push-pull current drivers (10, 11) to excite the test battery (14). The current delivered by the push-pull current drivers (10, 11) is measured from a current shunt (29) included within a battery interface probe (8) adapted or configured to connect the test battery (14), as depicted in the example of Figure 4. As with the voltage sense pre-amplifier (15) there are two measurement events for the current sense amplifier (18). The first measurement event occurs prior to the SOS excitation signal (16) right after closure of the push-pull current connection relays (12, 13) and detects the push-pull bias current. The push-pull bias current results from the DC errors of the operational amplifier and resistor tolerance circuitry (21 and 22) as shown in the examples of Figures 5 A and 5B. The DAQ (6) captures the first measurement and adds a DC compensating correction to the SOS excitation signal (16) that is held constant during SOS excitation signal (16) to the battery (14). Thus, the push-pull bias current can be corrected to a negligible level during the SOS excitation signal (16) of the battery (14). The second measurement event comprises the SOS excitation signal (16) that is captured by the DAQ (6) and enables in-situ measurement calibration of the battery impedance. The SOS filter (23) of this subsystem is an electronic active filter that attenuates the zero order hold frequencies caused by digital to analog (D / A) conversion process within the DAQ (6) as it generates the SOS excitation signal (16). A fundamental assumption of the time domain to frequency domain processing algorithm is that all the frequencies present in the time domain captured data are known. The zero order hold frequencies tend to compromise this assumption. The output of SOS filter (23) is the push-pull excitation signal (24) to the push-pull current drivers (10, 11). The pre-amplifier protection circuitry (7) includes the amplifiers and logic that detects that the battery interface probe (8) is correctly hooked to the test battery (14), the push-pull compliance voltages are correct and the SOS push-pull excitation signal (24) to the push-pull current drivers (10, 11) is correct. If all these conditions are correct, the protection control (7) outputs a logic signal to the DAQ (6) allowing all the signal connection relay contacts (12, 13) to close, enabling the impedance measurement process to proceed. The DAQ (6) provides data acquisition, communication, and control for the complete system (1). The DAQ can be connected to a computer (25) via USB, allowing system operation by the system user (26). The DAQ (6) captures voltage and current time records (26, 27) via its A / D function. The DAQ (6) outputs analog signals such as the SOS excitation signal (16) via its D / A. The DAQ (6) also outputs digital bi-level signals via its logic function to start power supplies (9) and close connection relays (12,13). The DAQ (6) uploads captured data to the computer (25) and responds to control commands from thecomputer (25). The user (26) operates the system (2) via program software (28) running on the computer (25).

[0055] Now, with primary reference to Figure 4, which depicts an electrical schematic of an embodiment of the battery interface probe (8) configured to hook to the test battery (14). A current sensing shunt (29) is built into the battery interface probe (8) enabling push-pull current bias measurement. Current sensing leads 32) from the current sensing shunt (29) are permanently attached to the battery interface probe (8) along with the push-pull current driver leads (30, 31). The voltage sensing leads (33) can be either connected to the battery interface probe (8) for a two wire connection to the test battery (14) or separately connected for a four wire connection to the test battery (14). Current carrying leads (30, 31) from the battery interface probe (8) connect to the test battery (14) for the SOS excitation signal (10,11).

[0056] Now, with primary reference to Figures 5A and 5B, which depict electrical schematics of an embodiment of the push current driver (10) and an embodiment of the pull current driver (11) that provide the SOS excitation signal (16) that excites the test battery (14). The building block of the push-pull current sources (10, 11) is a power operational-amplifier (35a, 35b) configured as a ground reference current source. Figure 5A illustrates a power operational-amplifier (35a) configured as a ground referenced current source that pushes current relative to ground. Figure 5B illustrates a power operational-amplifier (35b) configured pull current relative to ground. Assuming perfect operation of the operational-amplifiers (35a, 35b) and that / (n l 2and Rfl 2are a closely matched and are orders of magnitude larger than Rsand R, (the battery internal impedance), then the voltage to current gain for the circuit shown by Figure 5A is given by Equation 1 and the voltage to current gain for Figure 5B is given by Equation 2.

[0057] >

[0058]

[0059] Equation 1.

[0060] Pun _ f

[0061] pullRinRs

[0062] Equation 2.Only if all the assumptions are correct, and Rjnl 2and Rfl 2are closely matched, can the push-pull current drivers (10, 11) be hooked in series to excite the same load impedance. Any mismatch and one or both of the push-pull current drivers (10, 11) can saturate at the power supply voltage then fail. The solution is the self-balancing push-pull feedback control (3) (as shown in the example of Figures 1 and 5) and current source impedance that is much greater than the test battery internal impedance.

[0063] Now, with primary reference to Figure 6, which depicts an electrical schematic of a self- balancing feedback control (3). Operational-amplifier (35a) can capture a signal that is proportional to the difference between Ipush and Ipuii, then gains the error and provides negative feedback into current source operational-amplifier (35b). Rsaii and Ri , which are matched and much greater than the battery impedance, are also source impedance for the push-pull current drivers (10, 11). In the implementation operational-amplifiers (35a, 35b) can each be four power amplifiers with the outputs of all push in parallel and with all the outputs for pull in parallel. In the illustrative example of driving a test battery (14) up to 100V, the power for the push is offset at +53 V & -7V and the power for the pull is also offset at +7V & -53 V. In essence the circuit ground for the push / pull drivers (10, 11) is right at the average of +53 V and -53 V and at the middle of a 100V test battery (14) at +50V above the battery negative terminal. The nominal power for these power operational-amplifiers (35a, 35b) is + / -30V. Offsetting the power enables the push-pull current drivers (10, 11) to provide an SOS excitation signal (16) to a test battery (14) of 100V. The push current drivers (10) will see a maximum of +50V and the pull current drivers (11) will see a minimum of -50V.

[0064] The self-balancing control function can cause SOS current signal amplitude and phase to become corrupted at all the SOS frequencies and that also appears as a common mode voltage relative to the push-pull ground. This can be solved using in situ calibration by placing the signal detection ground at the negative terminal of the test battery (14) and locating the current sensing shunt (29) in the pull return lead (31) right at the test battery (14) (as shown in the example of Figure 4). The current sensing shunt (29) used for in-situ calibration becomes a single ended measurement immune to corruption from the common mode. Because the ground reference of the DAQ (6) is also at the negative terminal of the test battery (14), which can be as much as 50V below the ground for the push-pull electronics, the SOS excitation signal (24) to the push-pull current drivers (10, 11) can be DC coupled with ground isolation.This can be achieved via an analog optical isolation module (36) that has a bandwidth of DC to 10kHz and a dynamic range of + / -10V. The isolator receiver (37) is powered from the push-pull power supply and the isolator transmitter (38) (as shown in the example of Figure 9B) is powered by the same 120VAC that powers the DAQ (6). If the optical transmitter (38) is not powered and the optical receiver (37) is powered that receiver will saturate at + / -12V and output that signal to the push-pull current drivers (10, 11). Then, if the connection relays (12, 13) close the current drivers (10, 11) can be damaged or destroyed. Thus, in a 100 VDC example, the push-pull protection (4) prior to connection relay closure verifies that the + / -53 V and the + / -7V are present at the current drivers (10, 11) and prior to the SOS excitation signal (24), the voltage output from the optical receiver (37) can be very close to zero. Additionally, each of the current driver connection leads (30, 31) can have a 10A fuse to protect the test battery (14) for a push-pull current driver (10, 11) failure during a battery test.

[0065] The same power operational-amplifier devices (as shown in Figures 5A, 5B and 6) can be used to configure push-pull current drivers (10, 11) to excite a test battery (14) of much greater voltage than the example of 100VDC. Given a modular power supply where each power module of the supply can be isolated from adjacent modules by a very high DC voltage then embodiments can employ floating push-pull current drivers (10, 11). As an illustrative example, for a battery voltage of V pick a universal ground reference at V / 2, then relative to this universal ground the battery positive terminal can be +V / 2 and the negative terminal can be -V / 2. Operational-amplifiers rails can be centered about +V / 2 (V / 2+15V & V / 2-15V) to power the push current drivers (10) and another set of operational-amplifier rails can be centered about -V / 2 (-V / 2+15V & -V / 2-15V) to power the pull current drivers (11). The ground for the push current drivers (10) can be +V / 2 relative to the universal ground and the ground for the pull current drivers (11) can be -V / 2. Balance control, bias current control, SOS signal insertion and protection can achieved by the use of multiple optical links (36).

[0066] Battery sensing, including both battery voltage and battery current comprises three steps: battery hook-up validation; bias current compensation and buck voltage compensation; and SOS current excitation and response acquisition. The measurement and excitation electronics are isolated from the test battery (14) by relay contacts. For hook-up validation, high impedance voltage sensing by the voltage sense pre-amplifier (15) in parallel with the voltage contacts (39,40) detects that the polarity of the hookup for voltage is correct allowing the voltage contacts (39, 40) to close. Then the battery voltage is measured to ensure it’s notabove the system (1) limit. The DAQ (6) then issues a command to close the current connection relay contacts (12, 13). High impedance polarity sensing by-passing those contacts will inhibit that contact closure if the polarity is not correct. Battery hook-up validation allows for all isolation contact closure, then a measurement at the current shunt (29) by the current sensing amplifier (18) acquires the bias current from the push-pull current drivers (10, 11), the system software (28) computes a DC correction offset, and that DC correction offset is applied to the SOS input (24) to the push-pull current drivers (10, 11) prior to the SOS excitation signal (16). That correction will be held constant during the SOS excitation signal (16) to the test battery (14). Both the initial bias current and the corrected bias current are reported to the user (26) via a graphical user interface (“GUI”) displayed on the computer (25). After the bias current correction is done, the battery voltage is acquired by the voltage sensing amplifier (15) and reported in the GUI. Then the system software (28) computes and outputs the buck voltage to the voltage sensing amplifier (15) that removes the DC battery voltage from the AC voltage measurement. That buck voltage is held constant during the SOS excitation signal (16). The residual voltage from the buck process is also reported in the GUI. After the bias current and buck voltage process has occurred the SOS excitation signal (16) and battery response signal (17) acquisition will commence. Simultaneous measurements of the battery voltage response to the SOS excitation signal (16) and the battery current as detected by the voltage sensing amplifier (15) (with buck voltage subtraction) and the current sensing amplifier (18) are acquired by the system DAQ (6). These two captured time records (26, 27) are processed by the system software (28) to obtain the battery impedance spectrum.

[0067] Now, with primary reference to Figure 7, which depicts an electrical schematic diagram of a voltage sensing pre-amplifier (15). In a first stage, operational pre-amplifier (41) attenuates the battery voltage signal such that the voltages seen by pins of operational pre-amplifier (41) falls within the power supply rails. In this embodiment, the output of operational pre-amplifier (41) is greater than + / -10V in the example of a test battery (14) of 100V. The attenuation of R8 & R9 and the voltage follower of operational pre-amplifier (42) will provide a signal to the DAQ (6) (Fg^j, to measure the battery voltage) that is within + / -10V. The voltage follower operational amplifier (42) operates as a protective gateway to mitigate voltage spikes from the voltage sensing pre-amplifier (15). The voltage follower operational amplifier (42) operates to block source impedance of the voltage sensing pre-amplifier (15). By decreasing the attenuation of the pre-amplifier (41), at the first stage, the system resolution can increase. Fora modest increase in resolution, the power supply rails could be set at + / -30V. At this level any signal output to the DAQ (6) will always be less than + / -30V. This change can improve resolution by up to 67%. Another option can be to off-set the power supply rails. Consider that if the first stage were at +55 / -5V, now the first stage attenuation could be at 50%. This can result in a 233% increase in resolution.

[0068] Prior to SOS excitation signal (16) of the test battery (14) the buck process subtracts the DC battery voltage from the pre-amplifier (42). The signal VBATis used to obtain the coarse buck signal (43) that the DAQ (6) provides as an input to operational-amplifier (44). Operational-amplifier (44) conditions the coarse buck signal (43) to match the battery voltage output from the first stage pre-amplifier (41). This results in an input signal into the instrumentation amplifier (“IA”) comprised of amplifier (45), amplifier (46), and amplifier (47) has become a common mode voltage that is mostly rejected by amplifier (47) the last stage of the IA. The output of amplifier (47) is input to the DAQ (6) and a fine buck voltage output (48) to amplifier (47) that removes most of the residual DC voltage. The buck voltage (48) is held constant during the time period the SOS excitation signal (16) to the test battery (14). Any remaining residual DC voltage is caused by operational-amplifier DC errors, resistor tolerance, op-amp common mode rejection and system noise. Operation of the buck is defined by the following relationships:

[0069]

[0070] Equation 4.

[0071] Then:5O5¥l + 2— Y-—

[0072]

[0073] Wi

[0074] Equation 5.

[0075] Where: V^p is the final output of the pre-ampVDCis the DC battery voltage

[0076] AE5O5is the response of the battery to the SOS current

[0077] VCBis the coarse buck voltage

[0078] VFBis the fine buck voltage

[0079] The small amount of DC residual voltage in the captured wave form can be completely rejected by the data processing algorithm. Excessive DC within the measurement compromises dynamic range which will decrease resolution. After the buck voltage process is completed the voltage sense amplifier (15) is ready to receive the battery response signal (17) to the SOS excitation signal (16).

[0080] Now, with primary reference to Figure 8, which includes an electrical schematic diagram of a current sensing amplifier (18) that obtains measurements for bias current control and in-situ calibration. The end-to-end gain is given by Equation 6.

[0081]

[0082] Equation 6.

[0083] The shunt amplifier (49) is a differential amplifier that is single ended and cascaded with an IA (amplifiers 49, 50 and 51) that is also single ended. The input amplifier (49) has its inverting input grounded to eliminate the common mode signal that is relative to the push-pull ground (caused by the self-balancing control). During the impedance measurement process after the protection function has occurred and the isolation relay contacts have all closed, the DAQ (6) captures the output of the current sensing amplifier (18), which is a measurement of the bias current that is generated by the push-pull current drivers (10, 11). The system software (28) then computes an offset that is applied to SOS signal (24) to the push-pull current drivers (10, 11). The system software (28) then reports to the user (26) via the GUI displayed on the computer (25), the initial bias current and the corrected bias current. The bias current correction is held constant during SOS excitation signal (16). After the bias current correction has occurred the buck voltage function, as previously described, occurs and then the SOS excitation signal (16) is launched. During the time period of the SOS excitation signal (16) the DAQ (6) captures and digitizes the output from the voltage sense amplifier (15) and the current sense amplifier (18). The system software (28) then processes these captured time records into the impedance spectrum. The data can be stored in a .CSV file and displayed to the user (26) as a Nyquist plot displayed in the GUI.The principal objectives of the protection circuitry (7) are to: protect the user (26); prevent damage to the test battery (14); protect the electronics of the system (1). For the safety of the user (26), all the test connection leads are either open circuit contacts or very high impedance test leads. After connections to the test battery (14) are completed and the user (26) initiates a test through the program software (28), the connections are tested to ensure polarity reversal has not occurred in the connection and will block isolation contact closure if a reversal is detected. Additionally, critical parameters of the push-pull current drivers (10, 11) and the current driver voltages, are sensed to ensure validity. Current push-pull driver voltages must be at the correct value. The SOS signal (24) to the push-pull current drivers (10, 11) from the analog optical receiver (37) is at or close to zero volts. If these conditions are not valid contact closure will be denied. While a battery test is underway, the test battery (14) can be protected from current driver electronics failure by fuses in both current leads. If a push-pull current driver (10 or 11) has failed prior to the start of a battery test one or more of the current driver power supplies (9) has shut down because of short circuit protection and voltage validation test will not allow contact closure for the next test. An additional protection test occurs after contact closure has occurred. Current source bias current is measured and corrected to zero. Excessive bias current is an indication of current driver (10, 11) failure and if the detected bias current exceeds 100mA the connection contacts will open, and the test will be terminated. In regard to the SOS optically coupled signal, if the optical transmitter (38) is not viable and the optical receiver (37) is not in contact with the optical transmitter (38) the output of the optical receiver (37) will always saturate at full scale and if the connection relays close the current drivers will be destroyed. Thus, prior to connection relays closing the SOS signal voltage level must be very low.

[0084] Now, with primary reference to Figure 9A, which illustrates a current driver voltage test (52) logically combined with a valid battery hook-up signal (53) and a valid SOS receiver signal (54). To validate the combination, all the voltage magnitudes are averaged in an operational-amplifier circuit (55) and if all are valid the result will be greater than 5 volts. The output of the operational amplifier (56) has a source resistance such that, if the battery hookup signal (53) is not valid, a contact will close and short the signal, or if the SOS receiver signal (54) is not valid, a parallel contact will close and short the SOS receiver signal (54). Finally, a voltage follower (57) buffers the result into the DAQ (6) and the software looks for the result to be greater than 5 V.Now, with primary reference to Figure 9B, which illustrates a block diagram where the output of a SOS optical receiver (37) is examined with comparator circuits (58) to ensure that the signal magnitude (59), prior to the SOS excitation signal (16) start, is less than a diode voltage forward biased by a few mA. Failure activates a contact in Figure 9A.

[0085] Now, with primary reference to Figure 9C, which illustrates a high impedance operational-amplifier circuit (60) that outputs a signal to a comparator (61) that checks polarity and logically operates the battery hook-up contact in Figure 9A.

[0086] System Testing and Validation.

[0087] Prior to system (1) power-up, all hook-up and interconnections were double-checked. The push-pull current driver output was disconnected. At the battery interface probe (8) the voltage leads and the current leads were shorted. The system AC power switch was turned on and the software recognized the DAQ (6) (DAQ, Chassis: NIcDAQ-9174, A / D Module:NI-9215, D / A Module: NI-9263, Digital Module: NI-9401). The program software (28) was started, and digital multimeter (“DMM”) check measured all the supply voltages at the various test points. The system power was then powered down using the program software.

[0088] Next, the signal input to the voltage sense pre-amplifier (15) was disconnected and a DC signal source was applied to the input of the voltage sense pre-amplifier (15). The system (1) was powered up again and the DMM was used to measure the voltages at the various test points and the response by the DAQ (6). The input polarity was reversed and the process repeated. Using this data, gains and offset errors were computed. The same process was repeated with the current sense amplifier (18). The appropriate gains were loaded into the program software. A low voltage lithium-ion battery (14) was then hooked up to the battery interface probe (8) configured as a 2-wire measurement in the correct polarity (the current drivers were still disconnected). The system (1) was powered up and the program software (28) was set up for a short, zero current measurement. The DMM monitored the load side of the disconnected current connector. When the test was initiated, the DMM read the correct voltage, indicating that the current relay contacts had closed. Additionally, the software program GUI display gave the correct battery voltage and indicated operation of the buck voltage process. The DMM was moved to test points within the voltage sense pre-amplifier (15) and the test repeated as required to observe the expected monitored voltages.The polarity of the hook-up to the test battery (14) was then reversed and the test repeated to verify the protection scheme. The test worked as expected; the isolation relay contacts did not close (no battery voltage was seen looking into the current leads or the test points in the voltage sense pre-amplifier (15) and no ground connection was observed looking back through the shunt lead that would connect to ground).

[0089] The final system check was to establish the bias current control. The actual bias current was measured by connecting the battery interface probe (8) current leads to a DMM and closing the current relay contacts through the program software (28). Ideally, the overall bias current should be less than + / -20 mA. The measured value can be loaded as a variable for the balance control module (3) (shown the example of Figure 2) to counteract the bias current during a impedance measurement.

[0090] Now, with primary reference to Figure 10, the buck voltage (48) for the system (1) was evaluated first using a power supply (9) and no SOS excitation signal (16) (the current leads were shorted together). Short 10 second runs were conducted at zero current with the power supply (9) sequentially set to 15V, 30V, 50V, and 100V to observe the residual voltage after the DC bias was removed. Figure 9 shows the resulting residual for each voltage level. At 100V, the residual voltage was -15 mV, which is only 0.0015 % of the bias which is significantly less than the 20V dynamic range of the DAQ A / D. Thus, the buck voltage circuitry operated as expected.

[0091] Now, with primary reference to Figure 11, buck voltage circuitry was tested with a test battery (14) connection and operating push-pull current drivers (10, 11). Lead acid batteries were connected to the system (1) for 10 second impedance measurements at 500 mA (RMS). The test

[0092] sequence consisted of a single lead-acid battery followed by a battery string from two in series up to six in series (i.e., up to 78V). Figure 10 shows the resulting buck voltage convergence. The worst case in this test was the 5-series string at 64V with a residual voltage of 70 mV. However, this is still considered acceptable since the impedance processing algorithms can reject all DC error because the A / D converter dynamic range is + / - 10V and provided that the voltage response is not

[0093] saturated.Now, with primary reference to Figures 12A and 12B, the system (1) was used to measure impedance of test batteries (14) with incrementally increasing voltage levels. Figure 11A shows impedance measurements for a representative iron-phosphate lithium-ion battery at 3.92 V. Figure 11B shows impedance measurements for a lead acid battery at 12.91 V. Rapid, broadband impedance measurements are typically plotted as Nyquist curves where the negative imaginary is on the y-axis to emphasize the capacitive effects of batteries (14). High frequency measurements are on the left side and low-frequency measurements are on the right side. Battery impedance typically includes a midfrequency arc followed by a low-frequency Warburg tail. The highest frequencies in Figures 12A and 12B (on the left side) represent the battery (14) ohmic resistance. As shown in Figures 12A and 12B, different battery chemistries yield different characteristics in the impedance spectrum. The lithium-ion battery has a very pronounced transition from the semicircle arc to the Warburg tail around 13 m Q , whereas the lead acid battery’s transition is more subtle.

[0094] Now, with primary reference to Figure 13 which shows the impedance spectra for the lead acid series string configurations (as described in the buck voltage test) ranging from one battery at 12.98 V up to six batteries at 77.68 V. This demonstrates the buck voltage convergence (as described in the previous section) and demonstrates spectra measurement for batteries (14) well

[0095] above 50V. The ohmic resistance increases with increasing battery voltage (i.e., the spectra shift to the right) due to higher contact resistance associated with additional batteries being connected in series. As expected, the mid-frequency arc also increases with more batteries connected in series.

[0096] Now, with primary reference to Figure 14 which shows the same impedance spectra where the real impedance was shifted such that all measurements had the same ohmic resistance (no adjustments were made to the imaginary impedance). As the voltage increased, so did the width and height of the mid-frequency arc.

[0097] Now, with primary reference to Figure 15 the resolution of the system was determined over multiple back-to-back measurements. Because repeated measurements on batteries (14) lead to electrochemical changes that affect the impedance spectra as well as the system (1)resolution, an unchanging reference test cell designed to simulate battery characteristics (except the low-frequency tail) was used for this evaluation. The test cell comprises an ohmic resistance (Rl) connected in series with a parallel resistor-capacitor circuit (R3 in parallel with Cl) that simulates the mid-frequency arc of a battery (14). The capacitor, Cl, also comes with an equivalent series resistance. For this resolution test, Rl was 1 m Q , R3 was 5 m Q , and Cl consisted of five 50F capacitors connected in parallel. The resulting equivalent series resistance was 2.14 m Q . The resolution was evaluated with ten back-to-back IMD measurements over a frequency range of 0.0125 to 1638.4 Hz (i.e., an 80 second measurement) at 500 mA (RMS). A 30 second rest was observed between each measurement.

[0098] Now, with primary reference to Figure 16, which shows the resulting impedance spectra for all measurements, and Figure 17 provides the average impedance. As expected, at very high frequency, the capacitor becomes a short, so the impedance is Rl plus the parallel combination of R2 and R3 (i.e., approximately 2.5 m Q ). At very low frequency, the Cl becomes open, so the impedance is Rl plus R3 (6 m Q ).

[0099] Now, with primary reference to Figure 18 which shows the standard deviation of the impedance magnitude as a function of frequency over all ten measurements. This is a very good evaluation of the spectra-to-spectra jitter seen in Figure 16 and is the uncertainty of the average of Figure 16. The worst-case is at the lowest frequency (i.e., with only one period within the SOS excitation signal) with less than + / - 45 / z Q . This is well within the specified resolution of + / -0.1 m Q for the system (1).

[0100] Having IMD measurement capabilities above conventional 50 VDC IMD in the range 100VDC to 1000 VDC can be critical for efficient in-situ monitoring at the module or pack level, as well as assessing batteries for second-use applications.

[0101] As can be easily understood from the foregoing, the basic concepts of the present invention may be embodied in a variety of ways. The invention involves numerous and varied embodiments of an IMD and methods for making and using such IMD including the best mode.

[0102] As such, the particular embodiments or elements of the invention disclosed by the description or shown in the figures or tables accompanying this application are not intended tobe limiting, but rather exemplary of the numerous and varied embodiments generically encompassed by the invention or equivalents encompassed with respect to any particular element thereof. In addition, the specific description of a single embodiment or element of the invention may not explicitly describe all embodiments or elements possible; many alternatives are implicitly disclosed by the description and figures.

[0103] It should be understood that each element of an apparatus or each step of a method may be described by an apparatus term or method term. Such terms can be substituted where desired to make explicit the implicitly broad coverage to which this invention is entitled. As but one example, it should be understood that all steps of a method may be disclosed as an action, a means for taking that action, or as an element which causes that action. Similarly, each element of an apparatus may be disclosed as the physical element or the action which that physical element facilitates. As but one example, the disclosure of an “amplifier” should be understood to encompass disclosure of the act of “amplifying” — whether explicitly discussed or not — and, conversely, were there is a disclosure of the act of “amplifying”, such a disclosure should be understood to encompass disclosure of an “amplifier” and even a “means for amplifying”. Such alternative terms for each element or step are to be understood to be explicitly included in the description.

[0104] In addition, as to each term used it should be understood that unless its utilization in this application is inconsistent with such interpretation, common dictionary definitions should be understood to be included in the description for each term as contained in the Random House Webster’s Unabridged Dictionary, second edition, each definition hereby incorporated by reference.

[0105] All numeric values herein are assumed to be modified by the term “about”, whether or not explicitly indicated. For the purposes of the present invention, ranges may be expressed as from “about” one particular value to “about” another particular value. When such a range is expressed, another embodiment includes from the one particular value to the other particular value. The recitation of numerical ranges by endpoints includes all the numeric values subsumed within that range. A numerical range of one to five includes for example the numeric values 1, 1.5, 2, 2.75, 3, 3.80, 4, 5, and so forth. It will be further understood that the endpoints of each of the ranges are significant both in relation to the other endpoint, and independently of the other endpoint. When a value is expressed as an approximation by use of the antecedent“about,” it will be understood that the particular value forms another embodiment. The term “about” generally refers to a range of numeric values that one of skill in the art would consider equivalent to the recited numeric value or having the same function or result. Similarly, the antecedent “substantially” means largely, but not wholly, the same form, manner or degree and the particular element will have a range of configurations as a person of ordinary skill in the art would consider as having the same function or result. When a particular element is expressed as an approximation by use of the antecedent "substantially," it will be understood that the particular element forms another embodiment.

[0106] Moreover, for the purposes of the present invention, the term “a” or “an” entity refers to one or more of that entity unless otherwise limited. As such, the terms “a” or “an”, “one or more” and “at least one” can be used interchangeably herein.

[0107] Further, for the purposes of the present invention, the term “coupled” or derivatives thereof can mean indirectly coupled, coupled, directly coupled, connected, directly connected, or integrated with, depending upon the embodiment.

[0108] Additionally, for the purposes of the present invention, the term “integrated” when referring to two or more components means that the components (i) can be united to provide a one-piece construct, a monolithic construct, or a unified whole, or (ii) can be formed as a one-piece construct, a monolithic construct, or a unified whole. Said another way, the components can be integrally formed, meaning connected together so as to make up a single complete piece or unit, or so as to work together as a single complete piece or unit, and so as to be incapable of being easily dismantled without destroying the integrity of the piece or unit.

[0109] Thus, the applicant(s) should be understood to claim at least: i) each of the IMD herein disclosed and described, ii) the related methods disclosed and described, iii) similar, equivalent, and even implicit variations of each of these devices and methods, iv) those alternative embodiments which accomplish each of the functions shown, disclosed, or described, v) those alternative designs and methods which accomplish each of the functions shown as are implicit to accomplish that which is disclosed and described, vi) each feature, component, and step shown as separate and independent inventions, vii) the applications enhanced by the various systems or components disclosed, viii) the resulting products produced by such systems or components, ix) methods and apparatuses substantially as described hereinbefore and withreference to any of the accompanying examples, x) the various combinations and permutations of each of the previous elements disclosed.

[0110] The background section of this patent application, if any, provides a statement of the field of endeavor to which the invention pertains. This section may also incorporate or contain paraphrasing of certain United States patents, patent applications, publications, or subject matter of the claimed invention useful in relating information, problems, or concerns about the state of technology to which the invention is drawn toward. It is not intended that any United States patent, patent application, publication, statement or other information cited or incorporated herein be interpreted, construed or deemed to be admitted as prior art with respect to the invention.

[0111] The claims set forth in this specification, if any, are hereby incorporated by reference as part of this description of the invention, and the applicant expressly reserves the right to use all of or a portion of such incorporated content of such claims as additional description to support any of or all of the claims or any element or component thereof, and the applicant further expressly reserves the right to move any portion of or all of the incorporated content of such claims or any element or component thereof from the description into the claims or vice-versa as necessary to define the matter for which protection is sought by this application or by any subsequent application or continuation, division, or continuation-in-part application thereof, or to obtain any benefit of, reduction in fees pursuant to, or to comply with the patent laws, rules, or regulations of any country or treaty, and such content incorporated by reference shall survive during the entire pendency of this application including any subsequent continuation, division, or continuation-in-part application thereof or any reissue or extension thereon. The elements following an open transitional phrase such as “comprising” may in the alternative be claimed with a closed transitional phrase such as “consisting essentially of’ or “consisting of’ whether or not explicitly indicated the description portion of the specification.

[0112] Additionally, the claims set forth in this specification, if any, are further intended to describe the metes and bounds of a limited number of the preferred embodiments of the invention and are not to be construed as the broadest embodiment of the invention or a complete listing of embodiments of the invention that may be claimed. The applicant does not waive any right to develop further claims based upon the description set forth above as a part of any continuation, division, or continuation-in-part, or similar application.

Claims

VI. CLAIMS.

1. An impedance measurement device, comprising:a data acquisition and control device;a push-pull current source including:at least one push current driver configured to source current;at least one pull current driver configured to sink current;a balance control comprising current sensing amplifiers configured to:sense outputs of said at least one push current driver and at least one pull current driver; andgenerate feedback to maintain balance between outputs of said at least one push current driver and at least one pull current driver;wherein said at least one push current driver and said at least one pull current driver under control of said data acquisition and control device generates an excitation signal to a test article.

2. The impedance measurement device of claim 1, wherein said at least one push current driver and said at least one pull current driver comprise voltage controlled current sources.

3. The impedance measurement device of claim 1, further comprising a ground isolated sum-of-sines signal generated by said data acquisition and control device to said at least one push current driver and said at least one pull current driver.

4. The impedance measurement device of claim 1, wherein said a push-pull current source operates to perform impedance measurements of said test article of greater than 50 VDC.

5. The impedance measurement device of claim 1, wherein said a push-pull current source operates to perform impedance measurements of said test article of greater than 100 VDC.

6. The impedance measurement device of claim 1, wherein said a push-pull current source operates to perform impedance measurements of said test article of 100 VDC to 800 VDC.

7. An impedance measurement device, comprising:a data acquisition and control device;a pre-amplifier configured to sense test article voltage, said pre-amplifier having an output voltage greater than said data acquisition and control device;one or more resistors configured to attenuate the pre-amplifier output voltage signal to within said voltage range of said data acquisition system; anda voltage follower operational amplifier electrically coupled to said one or more resistors to buffer said pre-amplifier output voltage signal attenuated by said one or more resistance elements to said data acquisition and control device.

8. The impedance measurement device of claim 7 wherein said voltage follower operational amplifier operates as a protective gateway to mitigate voltage spikes from said preamplifier.

9. The impedance measurement device of claim 7, wherein said voltage follower operational amplifier blocks source impedance of said pre-amplifier.

10. The impedance measurement device of claim 7, wherein said pre-amplifier output voltage signal is greater than + / - 10 VDC; and wherein said voltage range of said data acquisition system has a voltage range of + / - 10 VDC.

11. The impedance measurement device of claim 7, wherein said pre-amplifier output voltage signal is greater than + / - 30 VDC; and wherein said voltage range of said data acquisition system has a voltage range of + / - 30 VDC.

12. The impedance measurement device of claim 7, wherein said pre-amplifier output voltage signal is greater than + / - 55 VDC; and wherein said voltage range of said data acquisition system has a voltage range of + / - 30 VDC.

13. An impedance measurement device, comprising:a data acquisition and control device;a push-pull current source including:at least one push current driver configured to source current;at least one pull current driver configured to sink current;a current sense amplifier configured to acquire a net-self balanced bias current from said at least one push current driver and said at least one pull current driver;wherein said data acquisition and control device measures said bias current, wherein said data acquisition and control device computes a direct current correction offset applied to said at least one push current driver and said at least one pull current driver,wherein said direct current correction offset held constant during excitation signal to a test battery.

14. The impedance measurement device of claim 13, wherein said direct current correction offset is applied to sum-of-sines signal to said at least one push current driver and said at least one pull current driver.