Popcount circuit and associated voting circuit

Abstract

There is provided an analog computation based Popcount circuit, comprising a reference current source configured to supply an input reference bias current and circuitry configured to selectively subtract current from the input reference bias current based on input values inputted to the Popcount circuit. There is also provided a Winner Takes All (WTA) circuit, and a class voting circuit comprising the Popcount and WTA circuits disclosed herein. Associated methods are also provided.

Description

[0001] POPCOUNT CIRCUIT AND ASSOCIATED VOTING CIRCUIT

[0002] FIELD OF THE INVENTION

[0003] The present invention relates to a Popcount circuit and voting circuit based thereon, and an associated method.

[0004] BACKGROUND OF THE INVENTION INTRODUCTION

[0005] Voting circuits are used in various logic computations. Some voting circuits may comprise Popcount and Argmax functions, and these are functions used in Machine Learning. Historically, some Popcount functions have been implemented in code running on a generic processor, however as the method became more prevalent it started having a dedicated processor. In such situations, Popcount is usually run in a sequential process, because it is difficult to run in parallel. Therefore, the process is slow and energy intensive, and so an improved way to provide the Popcount function is needed.

[0006] SUMMARY

[0007] It is an object of the present disclosure to provide an improved Popcount circuit and method. It is also an object of the present disclosure to provide related processing functions, such as an Argmax function.

[0008] BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Examples of the invention are further described hereinafter with reference to the accompanying drawings, in which: Figure 1 shows an example overall voting circuit according to an example of the disclosure;

[0010] Figure 2 shows an example N-channel Popcount circuit, according to an example of the disclosure;

[0011] Figure 3 shows an example Winner Takes All comparator circuit, according to an example of the disclosure;

[0012] Figure 4 shows a method for providing an analog Popcount function, according to an example of the disclosure.

[0013] DETAILED DESCRIPTION

[0014] The technical operation and advantages of the present disclosure shall now be provided by way of a plurality of examples that are merely illustrative of the novel and inventive features, and the disclosed examples are intended to be fully combinable in any reasonable combination.

[0015] Examples of the present disclosure relate to a circuit to provide the ‘pop count’ function (hereafter referred to Popcount), a voting circuit making use of multiple Popcount circuits with a Winner Takes All circuit, and an associated method for providing an analog Popcount function. The Popcount function, also known as the population count function, counts the number of 1s in a binary number. It's a binary arithmetic operation that's used in many applications, including calculating Hamming distance and approximating multiplications in neural networks. The Popcount function is a key function used in Tsetlin Machines, and so examples of the present disclosure may be used in providingTsetlin Machine hardware. Examples provide a voting circuit and associated method. Note, examples of the Popcount circuit may be used to count populations of items of a given class (which may also be used to simply count the number of votes for a given thing, i.e. class), and then the overall voting circuit may include a plurality of such Popcount circuits that can be used to determine a winning class (i.e. having highest population, or, rather, vote count, out of many such counts).

[0016] Figure 1 shows an overall voting circuit 100 that combines a plurality of Popcount circuits and a Winner Takes All circuit according to an example of the present disclosure. The voting circuit 100 operates as follows. For each class, we have a set of n votes acting as inputs (110, 112, 114) to a respective class Popcount circuit 200. These votes are typically binary values, 0 or 1. Each such set of votes for a class consists of positive votes and negative votes. The total binary arithmetic sum of the positive and negative votes is computed for each class in each Popcount block 200 by means of current manipulation that subtracts currents from a maximum input current, described later, in such a way that the output value of current Isumi 120, lSum2122, and Isumn124, from the corresponding Popcount blocks 200 is proportional to the sum of the votes (NB, this is algebraic sum, as some votes are positive and some are negative) being input to each Popcount block 200. These n currents (Isumi - Isumn) are then input to the Winner takes all comparator circuit 300, which determines which of these currents is the largest in its level (i.e. highest current value) and produces a binary signal, i.e. a logical 1, on the corresponding Class winner output - i.e. on one of the n HGF Ref: P391144WO;outputs 130, 132 and 134, whilst keeping the remaining n-1 outputs in logical 0 (i.e. a so called ‘one hot ‘ output). As a result, the whole voting circuit shown in Figure 1 computes which of the binary encoded set of votes 110, 112 and 114, has the largest cumulative value, combined of positive and negative votes, and returns the number (index) of that input channel as a Class winner.

[0017] Examples provide a Popcount function in the form of a Popcount (sub-)circuit, an example 200 of which is shown in Figure 2. The first stage of an example of the Popcount circuit 200 according to the present disclosure may, for example, implement the Popcount function to calculate the ‘class sum’ of a Tsetlin Machine. Figure 2 shows an example of the proposed structure of the Popcount circuit 200 that uses manipulation of currents by the input class values to provide the requisite Popcount function. In particular, the circuit in Figure 2 receives the vote values (in both positive 248 and negative 258 types) and generates different levels of output current Lum 120 that are negatively proportional to the summation of the vote values (i.e. the difference between as 211 and Lum 120 is proportional to the summation of the vote values, as will be seen later). That is, the output current Lum 120 depends on the number and type of inputs into the Popcount circuit (where type means a positive-vote type or a negative vote type).

[0018] Examples use a bias resistor 212 (acting as a current source as) to determine the maximum output current value Lum 120 from power supply Vdd 201, while the gap (i.e. differences in output current) between each set of class sum values being applied to the Popcount circuit 200 is determined by a set of current sources 244 / 254 controlled by each vote input (item 244 is a positive type current source, and item 254 is a negative type current source). The current sources may be formed of a transistor in some examples. The figure also shows multiple current source branches 240-250, one for each value in a balanced arrangement, i.e. both a positive and a negative branch (other examples may be unbalanced, i.e. have unequal positive and negative branches). Therefore, the current Lias 211 generated by the bias resistor 212 is typically higher than the summation of all the current source branches 240 - 250 to ensure the circuit works properly.

[0019] In the case of positive votes, an example of the proposed circuit first inverts the input vote value before performing the counting operation. As a result, the circuit only decreases the output current when the positive vote does not contribute to the final class sum. Specifically, if a positive vote is active (i.e. a positive value) and aligned with the output decision, it will not prompt a decrement in the current that is indicative of the total count. Instead, the circuit will retain its current output value, indicating that the positive vote is not contributing to the counting process. Conversely, the counting behaviour for negative votes is a direct relationship, where, when a negative vote votes for a specific class, the circuit decrements the output current accordingly. This allows the output to directly reflect the impact of negative votes on the overall class sum.

[0020] In more detail, Figure 2 shows an example N-channel Popcount circuit 200, where each of the N channels 210-230 receives either a positive vote (e.g. PCi..n) 248, or a negative vote (e.g. NCi...m) 258, hence N=n+m. Note, the number of positive votes n does not necessarily have to be equal to the number of negative votes, m, which is why split nomenclature is used here, however, there could be equal numbers of positive and negative votes, i.e. n=m (and N= 2n). Also, theoretically, n could =0 (no positive vote inputs) or m could =0 (no negative vote inputs), but at least one of them has to have at least one input, so N>=1. Otherwise, there would be no point to have Popcounts for non-existent voters (i.e. population=0).The respective votes are fed into a transistor 242 / 252. The positive votes 248 are inputted to a respective inversion function 246, e.g. a NOT gate, prior to the transistor 242, whereas the negative votes 258 are provided directly to the transistor 252, so that the Popcount circuit can operate to sum them in such a way that a Maximum Current value can be adjusted down to a respective output current value, that is directly related to the summation of the positive and negative votes involved. The circuit 200 thereby provides an output current that is indicative of the summation of the input votes. In broad terms, when the number of positive votes inputted into the circuit are the maximum number, and there are no negative votes, then the output is equal to the maximum current value. Whereas, as positive votes are taken away, then the output current is reduced. Also, as negative votes are added, then the output current is reduced as well, this overall current summation action is provided by each of the positive or negative votes controlling a respective current sink. The appropriate current subtraction elements Lut are formed, via transistors 244 / 254, in correspondence with the uniquely defined current value Lut by means of a split current mirror formed from items 215, HGF Ref: P391144WO;comprising of a current source resistor 214 and transistor 216, which generate current Lut 218. This arrangement ensures that in each of the N=n+m channels, the absolute value of a potentially subtracted current element is a standardised unique value Lut.

[0021] To illustrate this counting mechanism, consider examples of scenarios where n=m and the class sum is represented as n, 0, and -n. In these cases, the output current Lum 120 corresponds to specific values based on the above noted circuit configuration. When the class sum is n, with all the positive votes actively voting for the class and no negative votes being cast against the class, the output current Lum 120 will equal the reference current Lias 211. If the class sum is 0, the output current Lum will be adjusted to Lias - (n * Lut), where Lut represents the current subtracted due to r<n negative votes actively voting against the class and (n-r) positive votes not actively voting for the class. Finally, when the class sum reaches -n, with all the negative votes actively voting against the class and no positive votes being cast for the class, the output current decreases further to Lias -(2n * Lub), which may be written as Lias - ((n+m) * Lut) when dealing with unbalanced versions of the circuit.

[0022] According to examples this counting mechanism for the Popcount function optimizes the utilization of NMOS transistors and ensures that the output current accurately reflects the collective influence of positive and negative votes in the circuit’s decision-making process. By restricting the counting operation to a decremental method, the design effectively streamlines the determination of class contributions while addressing some of the operational constraints associated with NMOS technology.

[0023] As will now be appreciated, the output of the Popcount circuit of Figure 2 will be an arbitrary (albeit consistently provided) analog value of current that is indicative of the Popcount function acting on the vote values for a given class represented by the input votes (either positive or negative). A single instance of the Popcount circuit of Figure 2 may be used to compare the output current value to one or more predetermined thresholds, to determine vote results.

[0024] However, whilst the Popcount circuit may be used singularly (i.e. one instance on its own), a further aspect of the present disclosure, in some examples, is to provide multiple instances of this same Popcount circuit, as shown in Figure 1 , so that different classes can be compared to one another, by comparing their output currents to one another, and hence an indication of the overall winner can be provided. This is the so called ‘winner take all’ (WTA) comparator circuit 300 that provides census on what has been summed, and its construction and operation will now be explained in further detail.

[0025] In some examples, the WTA comparator may be any form of circuit that is capable of comparing the output currents from each of the Popcount circuits, e.g. an analog to digital convertor. However, according to preferred examples, the comparator function is a dedicated analog comparison circuit.

[0026] Figure 3 shows one such example dedicated analog comparison circuit, which is herein referred to as a Current mode WTA circuit.

[0027] Figure 3 depicts a current mode WTA circuit 300 with N comparison cells 310-330, where each cell takes in one of the currents from a Popcount circuit of Figure 1 (i.e. Lumi 120. Lum2122, etc). In the example shown, each comparison cell 310-330 contains two NMOS transistors, T1k 312-332 and T2k 314-334 (where k = 1...n, each representing a Popcount circuit, and this nomenclature applies to the other parameters, e.g. Lumn, Voutn, Vn, V’nin figure 3), a respective resistor Rn, 311 -331 , and inversion function (e.g. NOT gate) 316-336, which provides the respective output voltage Voutn 315-335. The cell’s 310-330 input and output are current Lumk 120-124 and voltage Voutk 315-335, respectively. The circuit operates as follows: Firstly, it receives the maximum reference current Let from the current mirror 340 (comprising mirroring transistors 342 and 344) and broadcasts its value as L through the common line labelled Vc305. As all the T1 transistors 312-332 share the same gate to source voltage Vc305, the one with the maximum current input Lumk 120...124 should have the maximum drain voltage V’k 317-337. The latter is also the gate voltage of the corresponding transistor T2k (i.e. one of items 314-334), which makes its gate to source voltage greater than the threshold voltage of transistor T2k. Secondly, for all T2 transistors 314-334, the one with the maximum gate voltage Vk 318-338 will have the maximum current flowing through the transistor T2k. However, as the overall current that can flowthrough all the T2 transistors 314-334 is limited by a small current source L, the effect of the current mirror 340 is an increase in the voltage Vc305 on the common line, thereby making the gate to source voltages greater than the respective threshold voltages for the given drain to source current on all T1 transistors 312-332 except the T1 transistor which has the highest current Lumk. This, in turn, HGF Ref: P391144WO;pulls down their drain to source voltage Vk. As a result, the other T2 transistors 314-334 will switch to their OFF state, thereby increasing their drain voltage V’k. Finally, the cell with the maximum current input will have the highest gate voltage on the gate of transistor T2k, fully switching it ON, hence strongly pulling down the input of the inverter 316 and generating a high output Voutk from this inverter, while all other T2 transistors are OFF and have their Vout low.

[0028] In some examples, the analog output voltage (Voutk) levels of each of the current mode WTA circuits of Figure 3 may not be separated enough on their own to allow easy onward processing. Therefore, in some further examples, the output signals may be processed to digital values before the final output, i.e., only the winning class outputs logical 1 while the other classes output logical 0. This is to say, the analog circuitry disclosed herein may be configured to output a digital output signal indicative of the voting outcome, to thereby become a source of a digital signal for further processing in the digital domain.

[0029] Figure 4 shows a method for providing an analog Popcount function, according to an example of the disclosure, for example using the circuit shown in Figure 2 and described above. The method starts by taking input values for the votes involved at step 401. At step 410, the method provides a maximum bias current, Lias. At step 420, the method selectively subtracts the currents (Lut) dependent on (i.e derived from) the vote values involved. At step 430, the method provides an output current of the Popcount circuit, Lum, for a given class, which is indicative of the number of votes forthat class. The method may end at this point (by moving directly to the output at step 470), since a value indicative of the population count (i.e. votes for) a class has now been provided and can be output. However, the method may optionally continue, at step 440, by providing Popcount output currents for multiple classes (Lum...lsumn) (e.g. by using multiple Popcount circuits of Figure 2, as shown in Figure 1). The method may then compare the Popcount output currents for the multiple classes using a Winner Takes All circuit, e.g. the current mode WTA circuit of Figure 3, at step 450. The extended method may then provide an indication of the winning output (i.e. the Popcount with the highest number of votes, and hence highest current), at step 460. Step 460 may be in the form of a one hot arrangement (i.e. a single output is provided which is indicative of the winning current). The extended method of Figure 4 is effectively a method of counting the number of votes for any number of classes, and then providing an indication of the winning class type.

[0030] In the foregoing, functions may be described as circuitry or modules or blocks, i.e. functional units that are operable to carry out the described function(s), and constructed out of base components, as described.

[0031] Examples provide an analog Popcount circuit, comprising a reference current source configured to supply an input bias current and circuitry configured to selectively subtract current from the input bias current based on input values inputted to the Popcount circuit.

[0032] In some examples, the input values inputted to the Popcount circuit may be indicative of votes for or against a class being counted by the Popcount circuit.

[0033] In some examples, the circuitry configured to selectively subtract current may further comprise one or more current subtraction circuits.

[0034] In some examples, the input values inputted to the Popcount circuit may control the one or more current subtraction circuits, such that a negative vote instigates subtraction of a current value, Lut, from the bias current, ias.

[0035] In some examples, the one or more current subtraction circuits each may comprise a first transistor (242) under control of a respective input vote value and a second transistor (244) comprising a subtraction current sink.

[0036] In some examples, ‘under control of a respective input vote value’ may comprise the gate of the first transistor being coupled to the respective input vote value.

[0037] In some examples, the subtraction current sink may further comprise a branch of a first half of a current mirror, where the current mirror may further comprise a second half.

[0038] In some examples, the second half of the current mirror may comprise a subtraction resistor (Rsut), 214 coupled to a voltage supply (Vdd) and a third transistor 216 coupled to the subtraction resistor, where a drain of the third transistor may be coupled to the subtraction resistor 214, and a source of the third transistor 214 may be coupled to a ground 202 and where a gate and the drain of the third transistor may be coupled together.

[0039] HGF Ref: P391144WO;In some examples, the one or more current subtraction circuits may comprise at least one positive count current subtraction circuit, under control of a positive input vote value and / or at least one negative count current subtraction circuit, under control of a negative input vote value.

[0040] In some examples, a positive count current subtraction circuit may further comprise an inversion function between the input vote value and a gate of a first transistor of the respective current subtraction circuit. In some examples, the inversion function may be a NOT gate.

[0041] In some examples, the Popcount circuit may comprise a plurality of channels, where each channel may comprise at least one positive count current subtraction circuit and / or at least one negative count current subtraction circuit.

[0042] In some examples, the positive count current subtraction circuit may take as input a positive vote value and the negative count current subtraction circuit may take as input a negative vote value.

[0043] In some examples, the reference current source may comprise a resistor to provide the input bias current.

[0044] In some examples, the transistors may be NMOS transistors.

[0045] In some examples, the NMOS transistors may be FlexIC transistors, where FlexIC is a plastic semiconductor manufacturing process.

[0046] Examples may also provide a WTA circuit, comprising a plurality of comparison cells, and a second current mirror coupled to the plurality of comparison cells, to provide a maximum reference current for use by the plurality of comparison cells, wherein each comparison cell provides a voltage output based upon a comparison of an input current into each comparison cell with the maximum reference current, such that the WTA circuit provides a single output voltage that indicates the largest input current into all of the comparison cells.

[0047] In some examples, the largest input current into all of the comparison cells may be the winning current.

[0048] In some examples, each comparison cell may comprise a current comparison resistor (Rn). In some examples, each comparison cell may comprise fourth (T11 ) and fifth (T2i) transistors, wherein a drain of the fourth transistor may be coupled to a comparison current input and a gate of the fifth transistor, and a source of the fifth transistor may be coupled to the gate of the fourth transistor, and one side of the second current mirror. In some examples, each comparison cell may comprise a second inversion function (316), coupled to the drain of the fifth transistor and operable to provide a voltage output if the current input into the respective comparison cell is the largest input current.

[0049] In some examples, the second current mirror may comprise a WTA resistor (301 ) coupled to a positive voltage supply Vdd) to provide a reference current, lter, a sixth transistor (Tret) having a drain coupled to the WTA resistor (301) and its own gate, and a source coupled to ground, and a seventh transistor (Tc) having its gate coupled to the gate and drain of the sixth transistor (Tref) The source of the seventh transistor may be coupled to ground, and the drain of the seventh transistor may be coupled to the plurality of comparison cells in a current mirror arrangement.

[0050] It will be appreciated that whilst the above has been described in terms of a specific connectivity arrangement for the transistors, based upon being NMOS transistors, alternative connectivity arrangements that provide the same current processing capabilities may be used for alternative transistor (or other component) types).

[0051] Examples also provide voting circuitry for a plurality of classes, comprising a plurality of Popcount circuits according to any of the disclosure, wherein each Popcount circuit comprises an assessment of respective class, and a WTA circuit according to any of the disclosure, coupled to the outputs of the plurality of Popcount circuits, wherein the voting circuit indicates a winning class out of the plurality of classes.

[0052] Examples also provide an analog method of providing a Popcount value for a class by a Popcount function, comprising providing an input bias current to the Popcount function, selectively subtracting currents from the input bias current, dependent on values of a plurality of input votes to the Popcount function, to provide an output current indicative of a sum of the plurality of input votes, and outputting the provided output current indicative of the sum of the plurality of input votes for the class.

[0053] In some examples, the input votes are for a respective class being voted upon.

[0054] HGF Ref: P391144WO;Examples also provide a method of voting, comprising, carryingout the method of providing a Popcount value a plurality of times, to provide a plurality of currents, each indicative of the sum of votes for a respective class, and comparing the plurality of currents, e.g. to a reference current, and outputting an indication of the largest current (i.e. winning current value, indicative of the winning class, with the most positive votes).

[0055] Examples may also provide a class assessment circuitry, e.g. for use in a Tsetlin Machine, comprising, a plurality of Popcount circuits, wherein a one of the Popcount circuits comprises a single vote assessment of a Tsetlin Machine logic.

[0056] In some examples, the assessment circuitry may further comprise multiple channels, wherein each channel comprise a Popcount circuit.

[0057] In some examples, the assessment circuitry may further comprise at least one WTA comparator circuit, The WTA comparator circuit may be configured to provide an indication of an at least one winner of the Popcount circuits, where the winner is the Popcount circuit with the highest output current value.

[0058] In some examples, the assessment circuitry may further comprise a plurality of comparison current inputs, and the assessment circuitry may be configured to provide assessment of a winning current out of the plurality of comparison current inputs.

[0059] A specific usage for the disclosed circuits is their use in building lower power, edge, Al functions.

[0060] Examples of the present disclosure may make use of Flexible Integrated Circuits (FlexIC) technology. By way of explanation - as the field of flexible electronics continues to expand, Flexible Integrated Circuits (FlexICs) have gained considerable attention in many fields such as the microprocessor area. Additionally, the FlexIC technology may also play a significant role in the Machine Learning (ML) area, because these circuits, built on bendable substrates, offer the potential for novel applications in areas like wearable technology and biomedical devices. However, the current state of FlexIC technology comes with significant constraints, notably the inability to integrate PMOS transistors. Due to common limitations of existing fabrication processes, often only NMOS (PMOS) transistors can be employed. This hinders the design of complementary metaloxide (CMOS) circuits; as a consequence, FlexICs circuits often employ resistive pull-ups (-downs) and pseudo-CMOS techniques to implement the complementary logic. These resistive devices incur additional costs in terms of area and power. Furthermore, state-of-the-art FlexICs technologies present a relatively large minimal feature size (e.g. of 600 nm), increasing parasitic gate capacitance and contributing to the overall area overhead.

[0061] However, these problems with FlexIC technology do not necessarily matter in the field(s) of Binarised neural networks (BNNs) and Tsetlin Machines (TMs), because they are lightweight machine learning models that employ a reduced number of arithmetic operations compared to traditional approaches like convolutional neural networks (CNNs). Both BNNs and TMs take Boolean features as input and employ Boolean conjunctions (i.e. additions) instead of multiplications during their inference process. For example, BNNs use adder circuitry to tally neuron activation and Tsetlin Machines (TM) also use adder circuitry to cast votes.

[0062] While traditional digital implementations of these adder circuits have certain advantages in TM hardware acceleration, their high power and large area overhead limit their applicability in resource-constrained environments. In response to these limitations, it is proposed in this disclosure to leverage the disclosed novel designs for implementing key Tsetlin Machine functions — specifically Popcount and argmax — using only NMOS transistors and resistors. Unlike traditional counting methods that involve both incrementing and decrementing, the proposed circuit(s) takes a different approach by exclusively counting down the output value (i.e. a purely subtractive process). This design choice fits perfectly within the limitations inherent in using only NMOS transistors, because the disclosed Popcount function, responsible for counting the summation of positive and negative signals, is achieved through a current- mirror-based approach, where the current is mirrored and manipulated to perform subtraction operations. Meanwhile, the Argmax function, which selects the index of the largest signal, is implemented using a current-based Winner-Takes-All (WTA) circuit. This current-mode WTA may be followed bya voltage-based WTA circuit that further refines the selection process. Finally, a differential amplifier is employed to compare the output values and determine which input class has the maximum score.

[0063] HGF Ref: P391144WO;Accordingly, examples of the disclosure may provide solutions that are tailored to the limitations of current FlexIC technology, offering a feasible solution for implementing machine learning algorithms on flexible electronics without the need for PMOS components. The disclosed approach demonstrates the potential of using NMOS-only designs to achieve complex functionalities, highlighting the viability of integratingTsetlin Machine logic in emerging flexible electronic systems.

[0064] Examples as disclosed herein, or variants thereof, may provide the Popcount and WTA (or Argmax) functions that are common in machine learning hardware and software designed for artificial neural networks, Tsetlin Machines and other models. Implementing these functions in hardware offers significant advantages in designing machine learning accelerators for Al at the edge. The disclosure may leverage using only NMOS transistors and resistors, which may align with the constraints of current FlexIC technology, to thereby provide cost effect and power efficiency designs. According to examples, the Popcount function selectively subtracts current from a common reference node as a first key innovation. The proposed Argmax function employs a Winner-Takes-All (WTA) circuit to compare the computation from multiple reference nodes (i.e. multiple Popcount circuits) and produces one or more digital outputs, as a second key innovation. Then the proposed modular approach of the third key innovation enables easy scalability by replicating modules / cells to handle multiple classes and votes.

[0065] Examples of the disclosed circuit(s) may be employed in low-power Al accelerators targeting flexible wearable devices to perform on-device inference and data classification. Accelerators constructed using the proposed Popcount / argmax circuit(s) may find applications in medical, commercial and industrial automation fields, for example enabling the construction of smart tags capable of detectingthe development of hazardous conditions in stored items or early signs of a seizure in an epileptic patient.

[0066] Examples utilise an analog approach to calculate Popcount, which gives a rapid, low energy close approximation of the Population (the number of 1 bits in the value of X). During a PPA (Power Performance Area) comparison to the existing purely digital computational versions (both non-pipelined and pipelined) of the Popcount and WTA functions, the analog version according to the present disclosure shows significant reduction in area used, power consumed and time taken. For example, taking the non-pipelined digital version as the base case, then, dependent on the data set used forthe testing, the analog version according to the present disclosure may utilise 16.3-19% of the Area (in urn2), 3.4-25.5% of the Power (in W), and 15.4-30% of the Delay (in secs).

[0067] It will be appreciated that the disclosed Popcount and WTA / Argmax circuits may also be implemented in CMOS processor technology.

[0068] By using the proposed analog circuits and methods it is possible to reduce the area, and energy taken as well as speed up the process. This analog version would result in an approximation of the population, which is sufficient is most machine learning applications.

[0069] Put simply, an innovation of the disclosure is that by implementing Popcount and Argmax as an analog process, one can speed up the process and reduce the energy consumption, especially when implemented on FlexIC manufacturing processes.

[0070] The herein described voting circuit may also be referred to as a voting mechanism circuit or classification circuit. Examples comprise a Winner Takes All (WTA) circuit, which is a name used in the analogue context of the present disclosure. However, in the digital learning domain, this WTA function may also be referred to by the term Argmax function.

[0071] While preferred embodiments of the present invention have been shown and described herein, it will be obvious to those skilled in the art that such embodiments are provided by way of example only. Numerous variations, changes, and substitutions will now occur to those skilled in the art without departing from the scope of the disclosure. It should be understood that various alternatives to the embodiments of the invention described herein may be employed in any combination in practicing the disclosure. It is intended that the following claims define the scope of the invention and that methods and structures within the scope of these claims and their equivalents be covered thereby.

[0072] HGF Ref: P391144WO;

Claims

Claims:

1. An analog Popcount circuit, comprising:a reference current source configured to supply an input bias current; andcircuitry configured to selectively subtract current from the input bias current based on input values inputted to the Popcount circuit.

2. The Popcount circuit of claim 1, wherein the input values inputted to the Popcount circuit are indicative of votes for or against a class being counted by the Popcount circuit.

3. The Popcount circuit of claim 1 or 2, wherein the circuitry configured to selectively subtract current further comprises one or more current subtraction circuits.

4. The Popcount circuit of claim 3, wherein the input values inputted to the Popcount circuit control the one or more current subtraction circuits, such that a negative vote instigates subtraction of a current value, lSub, from the bias current, ias.

5. The Popcount circuit of claim 3 or 4, wherein the one or more current subtraction circuits each comprise:a first transistor (242) under control of a respective input vote value; anda second transistor (244) comprising a subtraction current sink.

6. The Popcount circuit of claim 5, wherein under control of a respective input vote value comprises the gate of the first transistor being coupled to the respective input vote value.

7. The Popcount circuit of claim 5 or 6, wherein the subtraction current sink further comprises a branch of a first half of a current mirror, wherein the current mirror further comprises a second half.

8. The Popcount circuit of claim 7, wherein the second half of the current mirror comprises:a subtraction resistor (214) coupled to a voltage supply; anda third transistor (216) coupled to the subtraction resistor, wherein a drain of the third transistor is coupled to the subtraction resistor, and a source of the third transistor is coupled to a ground and wherein a gate and the drain of the third transistor are coupled together.

9. The Popcount circuit of any of claims 3-8, wherein the one or more current subtraction circuits comprises:at least one positive count current subtraction circuit, under control of a positive input vote value; and / or at least one negative count current subtraction circuit, under control of a negative input vote value.

10. The Popcount circuit of claim 9, wherein a positive count current subtraction circuit further comprises an inversion function between the input vote value and a gate of a first transistor of the respective current subtraction circuit.

11. The Popcount circuit of claim 10, wherein the inversion function is a NOT gate.

12. The Popcount circuit of any preceding claim, wherein the Popcount circuit comprises a plurality of channels, wherein each channel comprises at least one positive count current subtraction circuit and / or at least one negative count current subtraction circuit.HGF Ref: P391144WO;13. The Popcount circuit of claim 12, wherein the positive count current subtraction circuit takes as input a positive vote value and the negative count current subtraction circuit takes as input a negative vote value.

14. The Popcount circuit of any preceding claim, wherein the reference current source comprises a resistor to provide the input bias current.

15. The Popcount circuit of any preceding claim, wherein the transistors are NMOS transistors.

16. The Popcount circuit of claim 15, wherein the NMOS transistors are FlexIC transistors, wherein FlexIC is a plastic semiconductor manufacturing process.

17. A WTA circuit, comprising:a plurality of comparison cells; anda second current mirror coupled to the plurality of comparison cells, to provide a maximum reference current for use by the plurality of comparison cells;wherein each comparison cell provides a voltage output based upon a comparison of an input current into each comparison cell with the maximum reference current, such that the WTA circuit provides a single output voltage that indicates the largest input current into all of the comparison cells.

18. The WTA circuit of claim 17, wherein the largest input current into all of the comparison cells is the winning current.

19. The WTA circuit of claim 17 or 18, wherein each comparison cell comprises:a current comparison resistor (Rn);fourth (T11) and fifth (T2i) transistors, wherein a drain of the fourth transistor is coupled to a comparison current input and a gate of the fifth transistor, and a source of the fifth transistor is coupled to the gate of the fourth transistor, and one side of the second current mirror; anda second inversion function (316), coupled to the drain of the fifth transistor and operable to provide a voltage output if the current input into the respective comparison cell is the largest input current.

20. The WTA circuit of any of claims 17 - 19, wherein the second current mirror comprises:a WTA resistor (301) coupled to a positive voltage supply to provide a reference current, lret;a sixth transistor (Tret) having a drain coupled to the WTA resistor (301) and its gate, and a source coupled to ground; anda seventh transistor (Tc) with its gate coupled to the gate and drain of the sixth transistor (Tret), its source coupled to ground, and its drain coupled to the plurality of comparison cells in a current mirror arrangement.

21. Voting circuitry for a plurality of classes, comprising:a plurality of Popcount circuits according to any of claims 1 to 16, wherein each Popcount circuit comprises an assessment of respective class; anda WTA circuit according to any of claims 17 to 20 coupled to the outputs of the plurality of Popcount circuits; wherein the voting circuit indicates a winning class out of the plurality of classes.

22. An analog method of providing a Popcount value for a class by a Popcount function, comprising:providing an input bias current to the Popcount function;HGF Ref: P391144WO;selectively subtracting currents from the input bias current, dependent on values of a plurality of input votes to the Popcount function, to provide an output current indicative of a sum of the plurality of input votes; andoutputting the provided output current indicative of the sum of the plurality of input votes for the class.

23. The method of claim 22, wherein the input votes are for a respective class being voted upon.

24. A method of voting, comprising:carrying out the method of claim 22 or 23 a plurality of times, to provide a plurality of currents, each indicative the sum of votes for a respective class; andcomparing the plurality of currents and outputting an indication of the largest current.HGF Ref: P391144WO;

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