Semiconductor device

Abstract

A semiconductor device (20) comprises semiconductor elements (40H, 40L), two substrates (50, 60) provided so as to sandwich the semiconductor elements in the plate thickness direction, a signal terminal (93), and bonding wires (110a, 110b, 110c, 110d). The substrate (60) has an insulating base material, obverse surface metal bodies (62, 64, 65) that are disposed on the obverse surface of the insulating base material and are electrically connected to a source electrode, and a reverse surface metal body that is disposed on the reverse surface of the insulating base material. With respect to an arrangement direction (Y) in which the semiconductor elements and the signal terminal are arranged, end parts (64e2, 65e2) of the obverse surface metal bodies are provided closer to the signal terminal than a pad (40P). Notches (66A, 66B) cut out in the arrangement direction or the plate thickness direction are provided at locations overlapping the bonding wires in the plate thickness direction in the obverse surface metal bodies.

Description

Semiconductor Device CROSS-REFERENCE TO RELATED APPLICATION

[0001] This application is based on Japanese Patent Application No. 2025-041782 filed in Japan on March 14, 2025, and the entire content of the base application is incorporated herein by reference.

[0002] The disclosure described in the present specification relates to a semiconductor device and a method for manufacturing the same.

[0003] Patent Document 1 describes a semiconductor device including a semiconductor element having main electrodes on both surfaces, a pair of substrates sandwiching the semiconductor element from both sides, and a signal terminal. The pair of substrates each have a surface metal body connected to the corresponding main electrode. The surface metal body of one substrate is electrically connected to a drain electrode provided on one surface of the semiconductor element. The surface metal body of the other substrate is electrically connected to a source electrode provided on the back surface of the semiconductor element. The signal terminal is electrically connected, via a bonding wire, to a pad provided on the same surface as the source electrode.

[0004] International Publication No. WO 2023 / 047881

[0005] It is generally known that for bonding wires, adjustment of length and height is required to suppress damage caused by resonance. In a semiconductor device having a double-sided heat dissipation structure typified by Patent Document 1, in the substrate connected to the source electrode, the end portion on the signal terminal side of the surface metal body is uniformly cut out toward the terminal side, so that an adjustment range for the length and height of the bonding wire is secured.

[0006] However, uniform cutting out reduces the area of the surface metal body of the substrate connected to the source electrode. Accordingly, the heat dissipation efficiency from the semiconductor element to the substrate connected to the source electrode decreases. It has been difficult to achieve both suppression of a decrease in heat dissipation efficiency in the semiconductor element and securing of the adjustment range for the bonding wire.

[0007] An object of the present disclosure is to provide a semiconductor device that can achieve both suppression of a decrease in heat dissipation efficiency in a semiconductor element and securing of an adjustment range for a bonding wire.

[0008] A semiconductor device according to one aspect of the present disclosure comprises: a semiconductor element having a first main electrode provided on one surface, a second main electrode provided on a back surface opposite to the surface in the thickness direction, and a signal pad provided on the back surface at a position different from the second main electrode; a first wiring member electrically connected to the first main electrode; a second wiring member electrically connected to the second main electrode; a signal terminal; and a bonding wire connecting the pad and the signal terminal. The second wiring member is a substrate having an insulating substrate, a surface metal body disposed on the surface of the insulating substrate which is the surface facing the semiconductor element and electrically connected to the second main electrode, and a back metal body disposed on the back surface of the insulating substrate. With respect to the alignment direction of the semiconductor element and the signal terminal, the end of the surface metal body is provided closer to the signal terminal than the pad, and a notch is provided in the surface metal body at a location that overlaps with the bonding wire in the thickness direction, cut out in the alignment direction or the thickness direction.

[0009] This eliminates the need to significantly reduce the surface area of ​​the metal body. It allows for both suppression of the decrease in heat dissipation efficiency in semiconductor devices and securing a range of adjustment for the length and height of bonding wires.

[0010] The various embodiments disclosed in this specification employ different technical means to achieve their respective objectives. The reference numerals in parentheses in the claims are illustrative in their correspondence with the embodiments described later and are not intended to limit the technical scope. The objectives, features, and effects disclosed in this specification will become clearer by referring to the subsequent detailed description and the accompanying drawings.

[0011] This figure shows the circuit configuration and drive system of a power conversion device to which a semiconductor device is applied. This is a perspective view showing a semiconductor device according to the first embodiment. This is a plan view of Figure 2 as seen from arrow III. This is a cross-sectional view along the line IV-IV in Figure 3. This is a cross-sectional view along the line V-V in Figure 3. This is a cross-sectional view along the line VI-VI in Figure 3. This is a cross-sectional view along the line VII-VII in Figure 3. This is a plan view showing a state in which semiconductor elements are mounted on a substrate. This is a plan view showing the circuit pattern of the substrate on the drain electrode side. This is a plan view showing the circuit pattern of the substrate on the source electrode side. This is an enlarged view of region XI in Figure 6. This is a plan view showing a part of the semiconductor device according to the second embodiment. This is a cross-sectional view showing a part of the semiconductor device according to the third embodiment. This is a cross-sectional view showing a part of the semiconductor device according to the fourth embodiment. This is a cross-sectional view showing a part of the semiconductor device according to the fifth embodiment. This is a cross-sectional view showing a part of the semiconductor device according to the sixth embodiment. This is a cross-sectional view showing a part of the semiconductor device according to the seventh embodiment. This is a cross-sectional view showing a part of the semiconductor device according to the eighth embodiment.

[0012] Several embodiments will be described below with reference to the drawings. In each embodiment, the same reference numerals are used for corresponding components, and redundant explanations may be omitted. If only a part of the configuration is described in each embodiment, the configuration of other embodiments described earlier can be applied to the other parts of that configuration. Furthermore, in addition to the combinations of configurations explicitly stated in the description of each embodiment, configurations from multiple embodiments can be partially combined even if not explicitly stated, as long as there are no particular problems with the combination.

[0013] The semiconductor device of this embodiment is applied, for example, to a power conversion device for a mobile body that uses a rotating electric machine as a drive source. The mobile body may be an electric vehicle such as an electric car, a hybrid car, or a plug-in hybrid car; an aircraft such as a drone; a ship; construction machinery; or agricultural machinery. An example of its application to a vehicle will be described below.

[0014] (First Embodiment) First, the schematic configuration of the vehicle's drive system will be described based on Figure 1.

[0015] <Vehicle Drive System> As shown in Figure 1, the vehicle drive system 1 includes a DC power supply 2, a motor generator 3, and a power converter 4.

[0016] The DC power supply 2 is a DC voltage source composed of rechargeable secondary batteries. The secondary batteries are, for example, lithium-ion batteries or nickel-metal hydride batteries. The motor generator 3 is a three-phase AC rotating electric machine. The motor generator 3 functions as the vehicle's driving source, i.e., an electric motor. The motor generator 3 also functions as a generator during regeneration. The power conversion device 4 performs power conversion between the DC power supply 2 and the motor generator 3.

[0017] <Power Conversion Device> Next, the circuit configuration of the power conversion device 4 will be described based on Figure 1. The power conversion device 4 is equipped with a power conversion circuit. The power conversion device 4 in this embodiment is equipped with a smoothing capacitor 5 and an inverter 6 which is a power conversion circuit.

[0018] The smoothing capacitor 5 primarily smooths the DC voltage supplied from the DC power supply 2. The smoothing capacitor 5 is connected to the P line 7, which is the high-potential power line, and the N line 8, which is the low-potential power line. The P line 7 is connected to the positive terminal of the DC power supply 2, and the N line 8 is connected to the negative terminal of the DC power supply 2. The positive terminal of the smoothing capacitor 5 is connected to the P line 7 between the DC power supply 2 and the inverter 6. The negative terminal of the smoothing capacitor 5 is connected to the N line 8 between the DC power supply 2 and the inverter 6. The smoothing capacitor 5 is connected in parallel to the DC power supply 2. The P line 7 and N line 8 may sometimes be referred to as power lines 7 and 8.

[0019] The inverter 6 is a DC-AC conversion circuit. The inverter 6 converts a DC voltage to a three-phase AC voltage according to switching control by a control circuit (not shown) and outputs it to the motor generator 3. This drives the motor generator 3 to generate a predetermined torque. During regenerative braking of the vehicle, the inverter 6 converts the three-phase AC voltage generated by the motor generator 3 in response to the rotational force from the wheels to a DC voltage according to switching control by the control circuit and outputs it to the P line 7. In this way, the inverter 6 performs bidirectional power conversion between the DC power supply 2 and the motor generator 3.

[0020] The inverter 6 is configured with three phase upper and lower arm circuits 9. The upper and lower arm circuits 9 are sometimes referred to as legs. The upper and lower arm circuits 9 each have an upper arm 9H and a lower arm 9L. The upper arm 9H and lower arm 9L are connected in series between the P line 7 and the N line 8, with the upper arm 9H on the P line 7 side. The connection point between the upper arm 9H and the lower arm 9L is connected to the winding 3a of the corresponding phase in the motor generator 3 via the output line 10. The inverter 6 has six arms. Each arm is configured with a switching element. At least a portion of each of the P line 7, N line 8, and output line 10 is made of conductive material such as a busbar.

[0021] In this embodiment, an n-channel type MOSFET 11 is used as the switching element constituting each arm. The number of switching elements constituting each arm is not particularly limited; there may be one or multiple. MOSFET is an abbreviation for Metal Oxide Semiconductor Field Effect Transistor.

[0022] As an example, in this embodiment, each arm has two MOSFETs 11. The two MOSFETs 11 constituting one arm are connected in parallel. In the upper arm 9H, the drains of the two parallel-connected MOSFETs 11 are connected to the P line 7. In the lower arm 9L, the sources of the two parallel-connected MOSFETs 11 are connected to the N line 8. The sources of the two parallel-connected MOSFETs 11 in the upper arm 9H and the drains of the two parallel-connected MOSFETs 11 in the lower arm 9L are interconnected. The two parallel-connected MOSFETs 11 are turned on and off at the same timing by a common gate drive signal.

[0023] Each MOSFET 11 is connected in antiparallel to a freewheeling diode 12. The diode 12 may be a parasitic diode of the MOSFET 11, or it may be a separate diode. The anode of the diode 12 is connected to the source of the corresponding MOSFET 11, and the cathode is connected to the drain. The upper and lower arm circuit 9 for one phase is provided by a single semiconductor device 20. Details of the semiconductor device 20 will be described later.

[0024] The power converter 4 may further include a converter as a power conversion circuit. The converter is a DC-DC conversion circuit that converts a DC voltage to a DC voltage of a different value. The converter is provided between the DC power supply 2 and the smoothing capacitor 5. The converter is configured, for example, with a reactor and the above-described up-and-down arm circuit 9. With this configuration, step-up and step-down voltage conversion is possible. The power converter 4 may also include a filter capacitor to remove power supply noise from the DC power supply 2. The filter capacitor is provided between the DC power supply 2 and the converter.

[0025] The power converter 4 may include a drive circuit for the switching elements that make up the inverter 6, etc. The drive circuit supplies a drive voltage to the gate of the corresponding arm's MOSFET 11 based on a drive command from the control circuit. The drive circuit drives the corresponding MOSFET 11, i.e., turns it on or off, by applying the drive voltage. The drive circuit is sometimes referred to as a driver.

[0026] The power converter 4 may include a control circuit for the switching element. The control circuit generates a drive command for operating the MOSFET 11 and outputs it to the drive circuit. The control circuit generates the drive command based on, for example, a torque request input from a higher-level ECU (not shown) and signals detected by various sensors. ECU is an abbreviation for Electronic Control Unit.

[0027] Various types of sensors include, for example, current sensors, rotation angle sensors, and voltage sensors. The current sensor detects the phase current flowing through the windings 3a of each phase. The rotation angle sensor detects the rotation angle of the rotor of the motor generator 3. The voltage sensor detects the voltage across the smoothing capacitor 5. The control circuit is configured to include, for example, a processor and memory. The control circuit outputs, for example, a PWM signal as a drive command. PWM is an abbreviation for Pulse Width Modulation.

[0028] <Semiconductor Device> Next, a semiconductor device will be described based on Figures 2 to 10. In the following, the thickness direction of the semiconductor element 40 will be referred to as the Z direction. The direction in which multiple semiconductor elements 40 are arranged side by side, perpendicular to the Z direction, will be referred to as the X direction. In this embodiment, the direction in which multiple semiconductor elements 40 are connected in parallel will be referred to as the X direction. The direction perpendicular to both the Z direction and the X direction will be referred to as the Y direction.

[0029] Unless otherwise specified, a planar shape is defined as a shape viewed from the Z direction, or in other words, a shape along the XY plane defined by the X and Y directions. A view from the Z direction may sometimes be simply referred to as a planar view.

[0030] As shown in Figures 2 to 10, the semiconductor device 20 constitutes one of the upper and lower arm circuits 9 described above, that is, one phase of the upper and lower arm circuit 9. The semiconductor device 20 comprises a encapsulant 30, a semiconductor element 40, substrates 50 and 60, a conductive spacer 70, an arm connection portion 80, and an external connection terminal 90. The semiconductor device 20 is sometimes referred to as a semiconductor module, power card, etc.

[0031] The encapsulant 30 encapsulates a portion of the other elements that constitute the semiconductor device 20. The remaining parts of the other elements are exposed outside the encapsulant 30. The encapsulant 30 is made of, for example, a resin. An example of a resin is an epoxy resin. The encapsulant 30 is molded from the resin by, for example, a transfer molding method. Such a encapsulant 30 may be referred to as a resin encapsulant, molded resin, or resin molded body. The encapsulant 30 may also be formed using, for example, a gel. The gel is placed, for example, in the opposing regions of a pair of substrates 50, 60.

[0032] As shown in Figures 2 to 4, the sealing body 30 has a substantially rectangular shape in plan. The sealing body 30 has one surface 30a and a back surface 30b which is opposite to the one surface 30a in the Z direction. The one surface 30a and the back surface 30b are, for example, flat surfaces. It also has sides 30c, 30d, 30e, and 30f which are surfaces connecting the one surface 30a and the back surface 30b. Side 30c is the surface from which the power terminal 91 and signal terminal 93H of the external connection terminal 90 protrude. Side 30d is the surface opposite to side 30c in the Y direction. Side 30d is the surface from which the output terminal 92 and signal terminal 93L protrude. Sides 30e and 30f are surfaces from which the external connection terminal 90 do not protrude. Side 30e is the surface opposite to side 30f in the X direction.

[0033] The semiconductor device 40 is formed by creating a switching element on a semiconductor substrate made of materials such as silicon or a wide-bandgap semiconductor with a wider bandgap than silicon. Examples of wide-bandgap semiconductors include silicon carbide, gallium nitride, gallium oxide, and diamond. The semiconductor device 40 is sometimes referred to as a power device or semiconductor chip.

[0034] The semiconductor element 40 of this embodiment is formed by creating the n-channel type MOSFET 11 described above on a semiconductor substrate made of SiC. The MOSFET 11 has a vertical structure such that the main current flows in the thickness direction of the semiconductor element 40, i.e., in the Z direction. The semiconductor element 40 has main electrodes for the switching element on both sides in the Z direction, which is the thickness direction of the semiconductor element 40. Specifically, as main electrodes, there is a drain electrode 40D on one side and a source electrode 40S on the back side, which is the side opposite to the one side in the Z direction. The main current flows between the drain electrode 40D and the source electrode 40S.

[0035] If diode 12 is a parasitic diode, the source electrode 40S also serves as the anode electrode, and the drain electrode 40D also serves as the cathode electrode. Diode 12 may be configured on a separate chip from MOSFET 11. The drain electrode 40D is the main electrode on the high-potential side, and the source electrode 40S is the main electrode on the low-potential side.

[0036] The semiconductor element 40 has a planar shape that is approximately rectangular, for example, a square. As shown in Figures 3 and 8, the semiconductor element 40 has pads 40P on its back surface, which are signal electrodes. The pads 40P are formed at different positions on the back surface from the source electrodes 40S. The pads 40P include at least a gate pad. The semiconductor element 40 of this embodiment has three or four pads 40P.

[0037] The source electrode 40S and pad 40P are exposed from a protective film (not shown) formed on the back surface of the semiconductor substrate. The drain electrode 40D is formed over almost the entire surface. The source electrode 40S is formed on a portion of the back surface of the semiconductor element 40. In a plan view, the drain electrode 40D has a larger area than the source electrode 40S. The drain electrode 40D corresponds to the first main electrode, and the source electrode 40S corresponds to the second main electrode.

[0038] As shown in Figures 4, 5, 6, and 7, the semiconductor device 20 comprises a plurality of semiconductor elements 40 having the above configuration. The plurality of semiconductor elements 40 include semiconductor elements 40H that constitute the upper arm 9H and semiconductor elements 40L that constitute the lower arm 9L. Semiconductor elements 40H are sometimes referred to as upper arm elements, and semiconductor elements 40L are sometimes referred to as lower arm elements. The semiconductor element 40 in this embodiment includes two semiconductor elements 40H and two semiconductor elements 40L.

[0039] The semiconductor element 40H includes a first semiconductor element 41H and a second semiconductor element 42H. The two semiconductor elements 41H and 42H are aligned in the X direction. The two semiconductor elements 40H, which are aligned in the X direction, have a common structure. The two semiconductor elements 40H with a common structure are aligned in the X direction in the same orientation. The two semiconductor elements 40H are connected in parallel to each other.

[0040] The semiconductor element 40L includes a first semiconductor element 41L and a second semiconductor element 42L. The two semiconductor elements 41L and 42L are aligned in the X direction. The two semiconductor elements 40L, which are aligned in the X direction, have a common structure. The two semiconductor elements 40L with a common structure are aligned in the X direction in the same orientation. The two semiconductor elements 40L are connected in parallel to each other.

[0041] In this embodiment, all semiconductor elements 40 have a common structure. The arrangement of semiconductor elements 41H and 42H and the arrangement of semiconductor elements 41L and 42L have twofold symmetry around an axis along the Z direction. Semiconductor elements 40H and 40L are aligned in the Y direction. The semiconductor device 20 has two rows of semiconductor elements 40H and 40L along the Y direction.

[0042] Each semiconductor element 40 is positioned at approximately the same location in the Z direction. The drain electrode 40D of each semiconductor element 40 faces the substrate 50. The source electrode 40S of each semiconductor element 40 faces the substrate 60.

[0043] Substrates 50 and 60 are arranged so as to sandwich the plurality of semiconductor elements 40 in the Z direction. Substrates 50 and 60 are arranged such that at least parts thereof face each other in the Z direction. Substrates 50 and 60 include all of the plurality of semiconductor elements 40H and 40L in a plan view.

[0044] Substrate 50 is arranged on the drain electrode 40D side with respect to semiconductor element 40. Substrate 60 is arranged on the source electrode 40S side with respect to semiconductor element 40. Substrate 50 is electrically connected to drain electrode 40D as described later, and provides a wiring function. Similarly, substrate 60 is electrically connected to source electrode 40S and provides a wiring function. For this reason, substrates 50 and 60 are sometimes referred to as wiring members, wiring substrates, and the like. Substrate 50 is sometimes referred to as a drain substrate, and substrate 60 is sometimes referred to as a source substrate. Substrates 50 and 60 provide a heat dissipation function for dissipating heat generated by semiconductor element 40. For this reason, substrates 50 and 60 are sometimes referred to as heat dissipation members. Substrate 50 corresponds to a first wiring member. Substrate 60 is a second wiring member electrically connected to a second main electrode.

[0045] Substrate 50 has a facing surface 50a that faces semiconductor element 40, and a back surface 50b that is a surface opposite to facing surface 50a. Substrate 50 includes an insulating base material 51, a front surface metal body 52, and a back surface metal body 53. Substrate 60 has a facing surface 60a that faces semiconductor element 40, and a back surface 60b that is a surface opposite to facing surface 60a. Substrate 60 includes an insulating base material 61, a front surface metal body 62, and a back surface metal body 63. Hereinafter, front surface metal bodies 52 and 62, and back surface metal bodies 53 and 63 may be simply referred to as metal bodies 52, 53, 62, and 63. Substrate 50 is a substrate in which insulating base material 51 and metal bodies 52 and 53 are laminated. Substrate 60 is a substrate in which insulating base material 61 and metal bodies 62 and 63 are laminated.

[0046] The insulating base material 51 electrically separates the front surface metal body 52 and the back surface metal body 53. Similarly, the insulating base material 61 electrically separates the front surface metal body 62 and the back surface metal body 63. The insulating base materials 51 and 61 may sometimes be referred to as insulating layers. The material of the insulating base materials 51 and 61 is resin or inorganic ceramic. As the resin, for example, epoxy resin, polyimide resin or the like can be used. As the ceramic, for example, alumina, silicon nitride or the like can be used. When the insulating base materials 51 and 61 are made of resin, the substrates 50 and 60 may sometimes be referred to as metal-resin substrates. When the insulating base materials 51 and 61 are made of ceramic, the substrates 50 and 60 may sometimes be referred to as metal-ceramic substrates.

[0047] In the case of the insulating base materials 51 and 61 using a resin material, an inorganic filler may be contained in the resin in order to improve heat dissipation, insulation and the like. The coefficient of linear expansion may be adjusted by adding the filler. As the filler, for example, alumina, silicon dioxide, aluminum nitride, boron nitride or the like can be used. The insulating base materials 51 and 61 may contain only one type of filler, or may contain a plurality of types of filler.

[0048] The metal bodies 52, 53, 62, and 63 are provided as, for example, a metal plate or a metal foil. The metal bodies 52, 53, 62, and 63 are formed using a metal having good electrical conductivity and thermal conductivity such as copper or aluminum as a material. In the Z direction, the front surface metal body 52 is disposed on the front surface of the insulating base material 51. The back surface metal body 53 is disposed on the back surface of the insulating base material 51. Similarly, in the Z direction, the front surface metal body 62 is disposed on the front surface of the insulating base material 61. The back surface metal body 63 is disposed on the back surface of the insulating base material 61.

[0049] The relationship between the thicknesses of the surface metal bodies 52, 62 and the back metal bodies 53, 63 is not particularly limited. The thickness of the surface metal body 52 may be thicker than that of the back metal body 53, or it may be approximately equal to that of the back metal body 53. The thickness of the surface metal body 52 may be thinner than that of the back metal body 53. Similarly, the thickness of the surface metal body 62 may be thicker than that of the back metal body 63, or it may be approximately equal to that of the back metal body 63. The thickness of the surface metal body 62 may be thinner than that of the back metal body 63. The relationship between the thicknesses of the surface metal bodies 52, 62 and the relationship between the thicknesses of the back metal bodies 53, 63 is not particularly limited.

[0050] The surface metal bodies 52 and 62 are patterned. The surface metal bodies 52 and 62 provide wiring, i.e., circuits. For this reason, the surface metal bodies 52 and 62 are sometimes referred to as circuit patterns, wiring layers, circuit conductors, etc. The surface metal bodies 52 and 62 may have a plating film of Ni-based or Au on their metal surfaces. The patterns of the surface metal bodies 52 and 62 are sometimes referred to as circuit patterns. The surface of the surface metal body 52 and the non-placed areas of the surface metal body 52 on the surface of the insulating substrate 51 form the opposing surface 50a of the substrate 50. Similarly, the surface of the surface metal body 62 and the non-placed areas of the surface metal body 62 on the surface of the insulating substrate 61 form the opposing surface 60a of the substrate 60.

[0051] For example, surface metal bodies 52 and 62, patterned into a predetermined shape by press working or etching, may be prepared and then attached to a two-layer laminate consisting of insulating substrates 51 and 61 and back metal bodies 53 and 63 to form substrates 50 and 60. Alternatively, after forming a three-layer laminate consisting of surface metal bodies 52 and 62, insulating substrates 51 and 61, and back metal bodies 53 and 63, the surface metal bodies 52 and 62 may be patterned by cutting or etching.

[0052] As shown in Figures 8 and 9, the surface metal body 52 has P wiring 54, relay wiring 55, and wire wiring 56 and 57. The wire wirings 56 and 57 are metal bodies that electrically relay the pad 40P and the signal terminal 93, and are therefore sometimes referred to as relay metal bodies. The P wiring 54, relay wiring 55, and wire wiring 56 are electrically isolated by a predetermined gap. This gap is filled with a sealant 30. As the surface on the semiconductor element 40 side in the Z direction, the P wiring 54 has an opposing surface 54a, the relay wiring 55 has an opposing surface 55a, and the wire wirings 56 and 57 have opposing surfaces 56a and 57a. These opposing surfaces 54a, 55a, 56a, and 57a constitute the opposing surface 50a described above.

[0053] The P wiring 54 is connected to the P terminal 91P and the drain electrode 40D of the semiconductor element 40H, which will be described later. The P wiring 54 electrically connects the P terminal 91P and the drain electrode 40D of the semiconductor element 40H. The P wiring 54 electrically connects the drain electrode 40D of the semiconductor element 41H and the drain electrode 40D of the semiconductor element 42H.

[0054] The relay wiring 55 is connected to the drain electrode 40D of the semiconductor element 40L, the arm connection part 80, and the output terminal 92. The relay wiring 55 electrically connects the arm connection part 80 and the drain electrode 40D of the semiconductor element 40L. The relay wiring 55 electrically connects the source electrode 40S of the semiconductor element 40H and the drain electrode 40D of the semiconductor element 40L and the output terminal 92. The relay wiring 55 electrically connects the drain electrode 40D of the semiconductor element 41L and the drain electrode 40D of the semiconductor element 42L.

[0055] The wire 56 is connected to the pad 40P and signal terminal 93H of the semiconductor element 40H, which will be described later. The wire 56 is electrically connected to the pad 40P via the first bonding wire 110a. The wire 56 is electrically connected to the signal terminal 93H via the second bonding wire 110b. The wire 56 electrically connects the pad 40P and the signal terminal 93H via the bonding wires 110a and 110b.

[0056] The wire 57 is connected to the pad 40P and signal terminal 93L of the semiconductor element 40L, which will be described later. The wire 57 is electrically connected to the pad 40P via the first bonding wire 110c. The wire 57 is electrically connected to the signal terminal 93L via the second bonding wire 110d. The wire 57 electrically connects the pad 40P and the signal terminal 93L via the bonding wires 110c and 110d.

[0057] The P wiring 54 and the relay wiring 55 are arranged side by side in the Y direction. In the Y direction, the P wiring 54 is located on the side of the power terminal 91, and the relay wiring 55 is located on the side of the output terminal 92. The P wiring 54 is located on the side 30c of the encapsulant 30, and the relay wiring 55 is located on the side 30d.

[0058] The P wiring 54 has a notch 540. The notch 540 opens on one of the four sides of a roughly rectangular plane with the X direction as the longitudinal direction. The notch 540 is located approximately in the center in the X direction on the side facing the side surface 30c. The P wiring 54 has a base portion 541 and a pair of extension portions 542. The base portion 541 and the pair of extension portions 542 define the notch 540. The P wiring 54 has a roughly U-shape in plan.

[0059] The base portion 541 is located on the relay wiring 55 side of the notch 540 and extension portion 542 in the Y direction, and has a substantially rectangular shape in plan view. In plan view, the base portion 541 overlaps the semiconductor element 40H. In other words, the two semiconductor elements 41H and 42H are arranged on the base portion 541. The drain electrodes 40D of each semiconductor element 41H and 42H are connected to the base portion 541.

[0060] The two extensions 542 extend from the base 541 in the same direction, specifically in the Y direction, towards the side surface 30c of the sealant 30. One extension 542 connects to the base 541 near one end in the X direction, and the other connects to the base 541 near the other end. The U-shaped ends of the P wiring 54, that is, the ends of the two extensions 542 opposite to the base 541, are in approximately the same position in the Y direction. The pair of extensions 542 straddle the notch 540 in the X direction. In the Y direction, the base 541 is longer than the depth of the notch 540 and the extensions 542.

[0061] A wire wiring 56 is provided in the notch 540. The wire wiring 56 has a roughly rectangular shape in plan view. The length of the wire wiring 56 in the X direction is slightly shorter than the length of the notch 540 in the X direction. The length of the wire wiring 56 in the Y direction is slightly shorter than the length of the notch 540 in the Y direction.

[0062] The relay wiring 55 also has a notch 550. The notch 550 opens on one of the four sides of the substantially rectangular shape in plan. The notch 550 is located approximately in the center in the X direction on the side facing the side surface 30d. In other words, on the surface metal body 52, a notch 540 is provided on one of the ends in the Y direction, and a notch 550 is provided on the other end.

[0063] The relay wiring 55 has a base portion 551 and a pair of extension portions 552. The base portion 551 and the pair of extension portions 552 define the notch 550. The relay wiring 55 has a roughly U-shape in plan view. In the Y direction, the base portion 551 is the part on the P wiring 54 side of the notch 550 and the extension portions 552, and has a roughly rectangular shape in plan view. In plan view, the base portion 551 overlaps the semiconductor element 40L. In other words, the two semiconductor elements 41L and 42L are arranged on the base portion 551. The drain electrodes 40D of each of the semiconductor elements 41L and 42L are connected to the base portion 551.

[0064] The two extensions 552 extend from the base 551 in the same direction, specifically in the Y direction, towards the side 30d of the sealing body 30. One extension 552 is connected to the base 551 near one end in the X direction, and the other is connected to the base 551 near the other end. The U-shaped ends of the relay wiring 55, that is, the ends of the two extensions 552 opposite to the base 551, are in approximately the same position in the Y direction. The pair of extensions 552 straddle the notch 550 in the X direction. In the Y direction, the base 551 is longer than the depth of the notch 550 and the extensions 552.

[0065] A wire wiring 57 is provided in the notch 550. The wire wiring 57 has a roughly rectangular shape in plan view. The length of the wire wiring 57 in the X direction is slightly shorter than the length of the notch 550 in the X direction. The length of the wire wiring 57 in the Y direction is slightly shorter than the length of the notch 550 in the Y direction.

[0066] As shown in Figures 3 and 10, the surface metal body 62 has N wiring 64 and relay wiring 65. The N wiring 64 and relay wiring 65 are electrically isolated by a predetermined gap. This gap is filled with a sealant 30. As the surface facing the semiconductor element 40 in the Z direction, the N wiring 64 has an opposing surface 64a, and the relay wiring 65 has an opposing surface 65a. These opposing surfaces 64a and 65a constitute the opposing surface 60a described above.

[0067] The N wiring 64 is connected to the N terminal 91N and the source electrode 40S of the semiconductor element 40L, which will be described later. The N wiring 64 electrically connects the N terminal 91N and the source electrode 40S of the semiconductor element 40L. The N wiring 64 electrically connects the source electrode 40S of the semiconductor element 41L and the source electrode 40S of the semiconductor element 42L. The N wiring 64 is sometimes referred to as negative electrode wiring, low-potential power supply wiring, etc.

[0068] The relay wiring 65 is connected to the source electrode 40S and the arm connection part 80 of the semiconductor element 40H. The relay wiring 65 electrically connects the source electrode 40S of the semiconductor element 40H and the arm connection part 80. The relay wiring 65 electrically connects the source electrode 40S of the semiconductor element 41H and the source electrode 40S of the semiconductor element 42H.

[0069] The N wiring 64 also has a notch 640. The notch 640 opens on one of the four sides of the substantially rectangular shape in plan. The notch 640 is located approximately in the center in the X direction on the side facing the side surface 30c. The N wiring 64 has a base portion 641 and a pair of extension portions 642. The base portion 641 and the pair of extension portions 642 define the notch 640. The N wiring 64 has a substantially U-shape in plan.

[0070] The base portion 641 is the part on the side 30d side of the notch 640 and the extension portion 642 in the Y direction. The base portion 641 has a substantially rectangular shape in plan with the X direction as its longitudinal direction. The base portion 641 is arranged in the Y direction alongside the relay wiring 65. In a plan view, the base portion 641 overlaps the relay wiring 55. The source electrode 40S of each semiconductor element 40L is connected to the base portion 641.

[0071] The base portion 641 has an end portion 64e1 connected to the extension portion 642 and an end portion 64e2 on the opposite side of end portion 64e1. End portion 64e1 can be said to be the end on the side surface 30c side. End portion 64e2 can be said to be the end on the side surface 30d side. End portion 64e2 is further away from the signal terminal 93L than end portion 61e1 on the signal terminal 93L side of the insulating substrate 61. The base portion 641 has eight notches 66A in end portion 64e2. Eight notches 66A are provided in end portion 64e2, cut out from end portion 64e2 toward end portion 64e1. The insulating substrate 61 is exposed through the notches 66A. The eight notches 66A form a notch group 67A of four. Two notch groups 67A are provided spaced apart in the X direction.

[0072] One notch group 67A is provided at a position that overlaps with the first bonding wire 110c connected to the semiconductor element 41L in a plan view. In a plan view, one notch group 67A is included within the projection region of the semiconductor element 41L in the Y direction. Another notch group 67A is provided at a position that overlaps with the first bonding wire 110c connected to the semiconductor element 42L in a plan view. In a plan view, one notch group 67A is included within the projection region of the semiconductor element 42L in the Y direction.

[0073] The distance in the X direction between the two notch groups 67A increases from end 64e2 to end 64e5. The apex portion 110t of the first bonding wire 110c is provided in each notch 66A. Each notch 66A can also be described as a recess capable of accommodating the apex portion 110t of the first bonding wire 110c.

[0074] Furthermore, the base portion 641 has wiring pieces 68A that separate adjacent notches 66A in the notch group 67A. Four notches 66A and three wiring pieces 68A are arranged alternately in the X direction to form one notch group 67A. The four notches 66A and three wiring pieces 68A form a comb-shaped notch group 67A. The width of the wiring piece 68A in the X direction is approximately the same as or shorter than the width of each notch 66A in the X direction.

[0075] The base 641 has two ends 64e3 and 64e4 that are further separated in the X direction. End 64e3 can also be said to be the end on the side surface 30f. End 64e4 can also be said to be the end on the side surface 30e. The base 641 has a wiring piece 691A between end 64e3 and the group of notches 67A on the end 64e3 side. The base 641 has a wiring piece 692A between two groups of notches 67A that are separated in the X direction. The base 641 has a wiring piece 693A between end 64e4 and the group of notches 67A on the end 64e4 side. From end 64e3 toward end 64e4, the wiring pieces are arranged in the order of wiring piece 691A, group of notches 67A, wiring piece 692A, group of notches 67A, and wiring piece 693A.

[0076] The two extensions 642 extend from the base 641 in the same direction, specifically in the Y direction, towards the side surface 30c of the sealing body 30. One extension 642 is connected to the base 641 near one end in the X direction, and the other is connected to the base 641 near the other end. The two ends of the U-shape of the N wiring 64, that is, the ends of the two extensions 642 opposite to the base 641, are in approximately the same position in the Y direction.

[0077] The pair of extensions 642 form both ends of the surface metal body 62 in the X direction. The pair of extensions 642 are positioned near the edges of the substrate 60. In plan view, a portion of each of the pair of extensions 642 overlaps with the P wiring 54. In the Y direction, the length of the extensions 642 is longer than that of the base portion 641.

[0078] As described above, the relay wiring 65 is arranged in the Y direction alongside the N wiring 64, specifically the base portion 641. In the Y direction, the relay wiring 65 is positioned close to the side surface 30c of the encapsulant 30, and the base portion 641 is positioned close to the side surface 30d. In the X direction, the relay wiring 65 is positioned between a pair of extension portions 642. The relay wiring 65 is sandwiched between the pair of extension portions 642. The relay wiring 65 is positioned within the notch 640. The relay wiring 65 is positioned with a predetermined gap between it and the N wiring 64. In a plan view, a portion of the relay wiring 65 overlaps with the P wiring 54, and another portion overlaps with the relay wiring 55. The source electrode 40S of each semiconductor element 40H is connected to the relay wiring 65.

[0079] The relay wiring 65 has an end 65e1 on the base 641 side and an end 65e2 on the opposite side of end 65e1. End 65e1 can be said to be the end on the side 30d side. End 65e2 can be said to be the end on the side 30c side. End 65e2 is further away from the signal terminal 93H than end 61e2 on the signal terminal 93H side of the insulating substrate 61. The relay wiring 65 has six notches 66B at end 65e2. Six notches 66B are provided at end 65e2, cut out from end 65e2 toward end 65e1. The insulating substrate 61 is exposed through the notches 66B. The six notches 66B form a notch group 67B of three. Two notch groups 67B are provided spaced apart in the X direction.

[0080] One notch group 67B is provided at a position that overlaps with the first bonding wire 110a connected to the semiconductor element 41H in a plan view. In a plan view, one notch group 67B is included within the projection region of the semiconductor element 41H in the Y direction. Another notch group 67B is provided at a position that overlaps with the first bonding wire 110a connected to the semiconductor element 42H in a plan view. In a plan view, one notch group 67B is included within the projection region of the semiconductor element 42H in the Y direction.

[0081] The distance in the X direction between the two notch groups 67B increases from end 65e2 to end 65e5. The apex portion 110t of the first bonding wire 110a is provided in each notch 66B. Each notch 66B can also be described as a recess capable of housing the apex portion 110t of the first bonding wire 110a.

[0082] Furthermore, the relay wiring 65 has wiring pieces 68B that separate adjacent notches 66B in the notch group 67B. Three notches 66B and two wiring pieces 68B are arranged alternately in the X direction to form one notch group 67B. The three notches 66B and two wiring pieces 68B form a comb-shaped notch group 67B. The length of the wiring piece 68B in the X direction is approximately the same as or shorter than the width of each notch 66B in the X direction.

[0083] The relay wiring 65 has two ends 65e3 and 65e4 that are further separated in the X direction. End 65e3 can also be said to be the end on the side 30f side. End 65e4 can also be said to be the end on the side 30e side. The relay wiring 65 has a wiring piece 691B between end 65e3 and the notch group 67B on the end 65e3 side. The relay wiring 65 has a wiring piece 692B between two notch groups 67B that are separated in the X direction. The relay wiring 65 has a wiring piece 693B between end 65e4 and the notch group 67B on the end 65e4 side. From end 65e3 toward end 65e4, the wiring pieces are arranged in the order of wiring piece 691B, notch group 67B, wiring piece 692B, notch group 67B, and wiring piece 693B.

[0084] The back metal bodies 53 and 63 are electrically isolated from the circuit including the semiconductor element 40 and the front metal bodies 52 and 62 by insulating substrates 51 and 61. The back metal bodies 53 and 63 are sometimes referred to as metal base substrates. The heat generated by the semiconductor element 40 is transferred to the back metal bodies 53 and 63 via the front metal bodies 52 and 62 and the insulating substrates 51 and 61. The back metal bodies 53 and 63 provide a heat dissipation function.

[0085] The back metal bodies 53 and 63 of this embodiment have a substantially rectangular shape in plan. The back metal bodies 53 and 63 are so-called solid conductors arranged over almost the entire back surface of the insulating substrates 51 and 61. As described above, the coefficient of linear expansion of the insulating substrates 51 and 61 is adjusted by adding fillers, so warping can be suppressed even if the patterns are different on the front and back surfaces. Of course, the back metal bodies 53 and 63 may also be patterned to coincide with the front metal bodies 52 and 62 in plan view.

[0086] In this embodiment, the back metal bodies 53 and 63 are arranged over almost the entire back surface of the corresponding insulating substrates 51 and 61. To further enhance the heat dissipation effect, at least one of the back metal bodies 53 and 63 may be exposed from the sealant 30. In this embodiment, the back metal body 53 is exposed from one surface 30a of the sealant 30, and the back metal body 63 is exposed from the back surface 30b. The exposed surface of the back metal body 53 is substantially flush with the surface 30a. The exposed surface of the back metal body 63 is substantially flush with the back surface 30b. The back metal bodies 53 and 63 constitute the back surfaces 50b and 60b of the substrates 50 and 60.

[0087] The conductive spacer 70 provides a spacer function to ensure a predetermined gap between the semiconductor element 40 and the substrate 60. The conductive spacer 70 ensures wire height for electrically connecting the corresponding signal terminal 93 to the pad 40P of the semiconductor element 40. The conductive spacer 70 is located in the middle of the electrical and thermal conduction path between the source electrode 40S of the semiconductor element 40 and the substrate 60, and provides wiring and heat dissipation functions. The conductive spacer 70 contains a metallic material with good electrical and thermal conductivity, such as Cu. The conductive spacer 70 may have a plating film on its surface.

[0088] The conductive spacer 70 is sometimes referred to as a terminal, block, or metal block. The semiconductor device 20 is equipped with the same number of conductive spacers 70 as the semiconductor elements 40. Specifically, it is equipped with four conductive spacers 70. The conductive spacers 70 are individually connected to the semiconductor elements 40. The conductive spacer 70 is a columnar body that, in a plan view, is approximately the same size as or slightly smaller than the source electrode 40S.

[0089] The arm connection portion 80 electrically connects the relay wirings 55 and 65. In other words, the arm connection portion 80 electrically connects the upper arm 9H and the lower arm 9L. The arm connection portion 80 is provided between the semiconductor element 40H and the semiconductor element 40L in the Y direction. In a plan view, the arm connection portion 80 is provided in the overlapping region of the relay wiring 55 and the relay wiring 65. The arm connection portion 80 of this embodiment is configured to include a joint portion 81 and a joining material 103, which will be described later.

[0090] The joint portion 81 is a metal columnar body provided separately from the surface metal bodies 52 and 62. Such a joint portion 81 is sometimes called a joint terminal. In the Z direction, a connecting material 103 is interposed between one end of the joint portion 81 and the relay wiring 55, and another connecting material 103 is interposed between the other end and the relay wiring 65.

[0091] The external connection terminal 90 is a terminal for electrically connecting the semiconductor device 20 to an external device. The external connection terminal 90 is formed using a metal material with good conductivity, such as copper. The external connection terminal 90 is, for example, a plate. The external connection terminal 90 is sometimes referred to as a lead. The external connection terminal 90 includes a power terminal 91, an output terminal 92, and a signal terminal 93. The power terminal 91 includes a P terminal 91P and an N terminal 91N. The P terminal 91P, the N terminal 91N, and the output terminal 92 are main terminals that are electrically connected to the main electrodes of the semiconductor element 40. The signal terminal 93 includes a signal terminal 93H on the upper arm 9H side and a signal terminal 93L on the lower arm 9L side.

[0092] The power terminal 91 is an external connection terminal 90 that is electrically connected to the power lines 7 and 8 described above. The P terminal 91P is electrically connected to the positive terminal of the smoothing capacitor 5. The P terminal 91P is sometimes referred to as the positive terminal or high-potential power terminal. The P terminal 91P is connected to the P wiring 54 of the surface metal body 52. ​​In other words, the P terminal 91P is connected to the drain electrode 40D of the semiconductor element 40H that constitutes the upper arm 9H.

[0093] The P terminal 91P is connected to the vicinity of one end of the P wiring 54 in the Y direction. The P terminal 91P extends in the Y direction from the junction with the P wiring 54 and protrudes out of the sealant 30 from near the center in the Z direction on the side surface 30c. The semiconductor device 20 of this embodiment has two P terminals 91P. As shown in Figure 8, one P terminal 91P is connected to one of the pair of extensions 542, and the other is connected to the other of the pair of extensions 542. The P terminals 91P are positioned close to the notch 540, i.e., towards the inside, in each extension 542 so as to be adjacent to the N terminal 91N in a plan view. The two P terminals 91P are arranged side by side in the X direction. The two P terminals 91P are positioned at approximately the same position in the Z direction.

[0094] The N terminal 91N is electrically connected to the negative terminal of the smoothing capacitor 5. The N terminal 91N is sometimes referred to as the negative terminal or low-potential power supply terminal. The N terminal 91N is connected to the N wiring 64 of the surface metal body 62. In other words, the N terminal 91N is connected to the source electrode 40S of the semiconductor element 40L that constitutes the lower arm 9L.

[0095] The N terminal 91N is connected to the vicinity of one end of the N wiring 64 in the Y direction. The N terminal 91N extends in the Y direction from the junction with the N wiring 64 and protrudes out of the encapsulant 30 from near the center in the Z direction on the side surface 30c. The semiconductor device 20 has two N terminals 91N. One N terminal 91N is connected to one of a pair of extensions 642. The other is connected to the other of the pair of extensions 642. The two N terminals 91N are arranged side by side in the X direction. The two N terminals 91N are arranged in approximately the same position in the Z direction.

[0096] The two N terminals 91N are positioned outside the two P terminals 91P in the X direction. In a plan view, one N terminal 91N is positioned near one P terminal 91P, and the other N terminal 91N is positioned near the other P terminal 91P. In the X direction, adjacent N terminals 91N and P terminals 91P have their sides facing each other in a portion including the portion that protrudes from the sealing body 30.

[0097] The output terminal 92 is electrically connected to the winding 3a of the corresponding phase of the motor generator 3. The output terminal 92 is sometimes referred to as the O terminal or AC terminal. As shown in Figures 3 and 8, the output terminal 92 is connected to the relay wiring 55 of the surface metal body 52 on the substrate 50. In other words, the output terminal 92 is connected to the connection point between the upper arm 9H and the lower arm 9L.

[0098] The output terminal 92 is connected to the vicinity of one end of the relay wiring 55 in the Y direction. The output terminal 92 extends in the Y direction from the junction with the relay wiring 55 and protrudes out of the sealing body 30 from near the center in the Z direction on the side surface 30d. The semiconductor device 20 has two output terminals 92. One output terminal 92 is connected to one of a pair of extensions 552, and the other is connected to the other of the pair of extensions 552. The two output terminals 92 are arranged side by side in the X direction. The two output terminals 92 are located at approximately the same position in the Z direction.

[0099] Signal terminal 93 is electrically connected to a circuit board (not shown) that includes a drive circuit. Signal terminal 93H is electrically connected to the pad 40P of the semiconductor element 40H via bonding wires 110a and 110b. The number of signal terminals 93H is not particularly limited. Signal terminal 93H includes at least one terminal for applying a drive voltage to the gate electrode of the semiconductor element 40H. The semiconductor device 20 of this embodiment has two signal terminals 93H. The two signal terminals 93H are arranged side by side in the X direction.

[0100] The signal terminal 93H is positioned to overlap with the wire wiring 56 in the Y direction. The signal terminal 93H is located closer to the side surface 30c than the wire wiring 56. The signal terminal 93H is connected to the wire wiring 56 via the second bonding wire 110b. The wire wiring 56 is connected to the pad 40P of the semiconductor element 40H via the first bonding wire 110a. The semiconductor device 20 has two sets of three pads 40P. The semiconductor device 20 has two sets of three first bonding wires 110a.

[0101] In a plan view, each first bonding wire 110a overlaps with the corresponding notch 66B. The apex 110t of each first bonding wire 110a is located inside the notch 66B. The apex 110t does not necessarily have to be located inside the notch 66B. The first bonding wire 110a has a mountain-like shape that connects the pad 40P and the wire wiring 56 in a parabolic manner. The apex 110t refers to the tip that is furthest from the pad 40P and the wire wiring 56 in the Z direction.

[0102] The signal terminal 93H extends in the Y direction from the joint with the bonding wire 110 and protrudes out of the sealant 30 from near the center in the Z direction on the side surface 30c. At least a portion of the protruding part of the signal terminal 93H extends in the same direction as the power terminal 91. The signal terminal 93H is positioned between the two P terminals 91P in the X direction. In other words, the external connection terminals 90 protruding from the side surface 30c are arranged in the X direction in the order of N terminal 91N, P terminal 91P, two signal terminals 93H, P terminal 91P, and N terminal 91N.

[0103] The signal terminal 93L is positioned to overlap with the wire wiring 57 in the Y direction. The signal terminal 93L is located closer to the side surface 30d than the wire wiring 57. The signal terminal 93L is connected to the wire wiring 57 via the second bonding wire 110d. The wire wiring 57 is connected to the pad 40P of the semiconductor element 40L via the first bonding wire 110c. The semiconductor device 20 has two sets of four pads 40P. The semiconductor device 20 has two sets of four first bonding wires 110c.

[0104] In a plan view, each first bonding wire 110c overlaps the corresponding notch 66A. The apex 110t of each first bonding wire 110a is located inside the notch 66A. The apex 110t does not necessarily have to be located inside the notch 66A. The first bonding wire 110c has a mountain-like shape that connects the pad 40P and the wire wiring 57 in a parabolic manner. The apex 110t refers to the tip that is furthest from the pad 40P and the wire wiring 57 in the Z direction.

[0105] The signal terminal 93L extends in the Y direction from the joint with the bonding wire 110 and protrudes out of the sealant 30 from near the center in the Z direction on the side surface 30d. At least a portion of the protruding portion of the signal terminal 93L extends in the same direction as the output terminal 92. The signal terminal 93L is located between the two output terminals 92 in the X direction. In other words, the external connection terminal 90 protruding from the side surface 30d is arranged in the X direction in the order of output terminal 92, four signal terminals 93L, and output terminal 92. The four signal terminals 93L are located in the space between the output terminals 92.

[0106] The semiconductor device 20 is equipped with two signal terminals 93H and four signal terminals 93L as signal terminals 93. The signal terminals 93H are arranged in the Y direction so as to sandwich the semiconductor element 40 between them and the signal terminals 93L. The two signal terminals 93H are arranged in the X direction together with two power terminals 91P and two power terminals 91N. The four signal terminals 93L are arranged in the X direction together with two output terminals 92. In order to suppress an increase in size in the X direction, there are two signal terminals 93H and four signal terminals 93L. As a result, the number of external connection terminals 90 is six on both the side 30c and side 30d.

[0107] The drain electrode 40D of the semiconductor element 40 is joined to the surface metal body 52 via the bonding material 100. The source electrode 40S of the semiconductor element 40 is joined to the conductive spacer 70 via the bonding material 101. The conductive spacer 70 is joined to the surface metal body 62 via the bonding material 102. The joint portion 81 is joined to the surface metal bodies 52, 62 via the bonding material 103. Of the external connection terminals 90, the main terminals P terminal 91P, N terminal 91N, and output terminal 92 are joined to the surface metal bodies 52, 62 via the bonding material 104.

[0108] A wire wiring board 561 is provided on the wire wiring 56 via a bonding material 105. The wire wiring board 561 has an opposing surface 56a. A signal terminal 93H is connected to the wire wiring 56 via the wire wiring board 561 and the bonding material 105. A wire wiring board 571 is provided on the wire wiring 57 via a bonding material 105. The wire wiring board 571 has an opposing surface 57a. A signal terminal 93L is connected to the wire wiring 57 via the wire wiring board 571 and the bonding material 105.

[0109] The bonding materials 100 to 105 are conductive bonding materials. For example, solder can be used as the bonding materials 100 to 105. An example of solder is a multi-component lead-free solder containing Cu, Ni, etc., in addition to Sn. Instead of solder, a sintered bonding material such as sintered silver may be used. The P terminal 91P, N terminal 91N, and output terminal 92 may be directly bonded to the corresponding surface metal bodies 52, 62 without using the bonding material 104. The P terminal 91P, N terminal 91N, and output terminal 92 may also be directly bonded to the surface metal bodies 52, 62 by methods such as ultrasonic bonding, friction stir bonding, or laser welding. If the joint portion 81 is provided separately from the substrates 50, 60, the joint portion 81 may be directly bonded to the surface metal bodies 52, 62.

[0110] As described above, in the semiconductor device 20, multiple semiconductor elements 40 constituting one phase of the upper and lower arm circuit 9 are sealed by a sealing body 30. The sealing body 30 integrally seals the multiple semiconductor elements 40, substrates 50 and 60, multiple conductive spacers 70, arm connection portion 80, and external connection terminal 90. The sealing body 30 seals the insulating substrates 51 and 61 and the surface metal bodies 52 and 62 on the substrates 50 and 60.

[0111] The semiconductor element 40 is positioned between substrates 50 and 60 in the Z direction. The semiconductor element 40 is sandwiched between the opposing substrates 50 and 60. This allows heat from the semiconductor element 40 to be dissipated to both sides in the Z direction. The semiconductor device 20 has a double-sided heat dissipation structure. The back surface 50b of substrate 50 is substantially flush with one surface 30a of the encapsulant 30. The back surface 60b of substrate 60 is substantially flush with the back surface 30b of the encapsulant 30. Since the back surfaces 50b and 60b are exposed surfaces, heat dissipation can be enhanced.

[0112] Two semiconductor elements 41H and 42H, arranged side by side in the X direction, are connected in parallel to each other by surface metal bodies 52 and 62, conductive spacers 70, and bonding materials 100 to 102. Two semiconductor elements 41L and 42L, arranged side by side in the X direction, are connected in parallel to each other by surface metal bodies 52 and 62, conductive spacers 70, and bonding materials 100 to 102.

[0113] <Arrangement of Surface Metal Body> Next, the arrangement of the surface metal body 62 will be described based on Figures 3, 6, 10, and 11. Figure 11 is an enlarged view of region XI in Figure 6. In this embodiment, the surface metal body 62 is patterned to form a predetermined positional relationship with some of the other elements constituting the semiconductor device 20.

[0114] First, let's describe the N wiring 64 of the surface metal body 62. As shown in Figures 3, 6, and 11, the semiconductor element 40L and the signal terminal 93L, which are electrically connected via bonding wires 110c and 110d, are aligned in the Y direction. As described above, eight notches 66A are provided at the end 64e2 of the base 641, cut out from end 64e2 toward end 64e1. Of the surfaces that define the notches 66A on the base 641, the end 64e5 closest to end 64e1 is located on the signal terminal 93L side of the pad 40P of the semiconductor element 40L. End 64e5 is sometimes referred to as the notch tip.

[0115] With respect to the Y direction, end 64e5 is located between pad 40P and end 64e2. As shown in Figures 3 and 6, end 64e5 is located closer to end 64e2 than to the joint P1 between N wiring 64 and bonding material 102. End 64e5 is located between end 70e1 and end 64e2 of the conductive spacer 70 to which N wiring 64 is joined.

[0116] Furthermore, the position of end portion 64e5 is not limited to this. End portion 64e5 may be located further from the signal terminal 93L than end portion 64e2, and may also be located further from the signal terminal 93L than the pad 40P of the semiconductor element 40L. End portion 64e5 may overlap with the pad 40P of the semiconductor element 40L in the Z direction.

[0117] Furthermore, the insulating substrate 61 has an exposed portion 61a1 that is exposed from the notch 66A. The vertices 110t of the first bonding wire 110c, which is connected to the pad 40P of the semiconductor element 40L, are provided inside the notch 66A. The eight vertices 110t of the first bonding wire 110c are individually provided inside the corresponding notches 66A. The vertices 110t of the first bonding wire 110c face the exposed portion 61a1 in the Z direction. The vertices 110t are closer to the insulating substrate 61 than the opposing surface 64a of the N wiring 64 in the Z direction. The vertices 110t may be in contact with the insulating substrate 61. The vertices 110t are located between the end 61e1 and the end 64e5 in the Y direction. The vertices 110t are located between the end 64e2 and the end 64e5 in the Y direction.

[0118] The relay wiring 65 has the same configuration as the N wiring 64. As shown in Figures 3 and 6, the semiconductor element 40H and the signal terminal 93H, which are electrically connected via bonding wires 110a and 110b, are aligned in the Y direction. As described above, the end 65e2 of the relay wiring 65 is provided with six notches 66B cut out from end 65e2 toward end 65e1. Of the surfaces that demarcate the notches 66B in the relay wiring 65, the end 65e5 closest to end 65e1 is located on the signal terminal 93H side of the pad 40P of the semiconductor element 40H. End 65e5 is sometimes referred to as the notch tip.

[0119] With respect to the Y direction, end 65e5 is located between pad 40P and end 65e2. As shown in Figures 3 and 6, end 65e5 is located closer to end 65e2 than to the joint P2 between the relay wiring 65 and the joining material 102. End 65e5 is located between end 70e2 and end 65e2 of the conductive spacer 70 to which the relay wiring 65 is joined.

[0120] Furthermore, the position of end portion 65e5 is not limited to this. Although not shown in the diagram, end portion 65e5 may be located further away from the signal terminal 93H than from the pad 40P. End portion 65e5 may also overlap with the pad 40P of the semiconductor element 40H in the Z direction.

[0121] The insulating substrate 61 has an exposed portion 61a2 that is exposed through a notch 66B. The vertices 110t of the first bonding wire 110a connected to the pad 40P of the semiconductor element 40H are located inside the notch 66B. The six vertices 110t of the first bonding wire 110a are individually located inside the corresponding notches 66B. The vertices 110t of the first bonding wire 110a face the exposed portion 61a2 in the Z direction. The vertices 110t are closer to the insulating substrate 61 than the opposing surface 65a of the relay wiring 65 in the Z direction. The vertices 110t may be in contact with the insulating substrate 61. The vertices 110t are located between the end 61e2 and the end 65e5 in the Y direction. The vertices 110t are located between the end 65e2 and the end 65e5 in the Y direction.

[0122] <Summary of the First Embodiment> In this embodiment, a substrate 60 is used as a second wiring member electrically connected to the source electrode 40S, which is the second main electrode. The substrate 60 has a surface metal body 62 on the semiconductor element 40 side. With respect to the Y direction, the end portion 64e2 of the surface metal body 62 is provided on the signal terminal 93L side of the pad 40P of the semiconductor element 40L. A notch 66A is provided in the surface metal body 62 at a location that overlaps with the first bonding wire 110c in the Z direction, and is cut out from the end portion 64e2 in the Y direction.

[0123] Similarly, in the Y direction, the end portion 65e2 of the surface metal body 62 is provided on the signal terminal 93H side of the pad 40P of the semiconductor element 40H. In the Z direction, a notch 66A is provided in the surface metal body 62 at a location that overlaps with the first bonding wire 110a, and is cut out from the end portion 65e2 in the Y direction.

[0124] By providing notches 66A only where the first bonding wires 110a and 110c overlap in the surface metal body 62, the area of ​​the surface metal body 62 is not significantly reduced. The amount of reduction in the surface metal body 62, which is a heat transfer member that receives heat from the semiconductor element 40, can be minimized. As a result, a decrease in the heat dissipation efficiency of the semiconductor element 40 can be suppressed. Furthermore, the length and height of the first bonding wires 110a and 110c can be adjusted by housing a portion of them inside the notches 66A and 66B. This allows for both suppression of a decrease in the heat dissipation efficiency of the semiconductor element 40 and securing an adjustment range for the length and height of the first bonding wires 110a and 110c.

[0125] Generally, wire bonding is performed through a first bonding process, a loop formation process, and a second bonding process. In the first bonding process, the starting point of the capillary is aligned with the pad on the semiconductor chip, and ultrasonic vibrations are applied to bond the material that will become the bonding wire to the pad. Next, in the loop formation process, the capillary is moved through a predetermined spatial path. In the loop formation process, the wire is formed into a V-shaped loop.

[0126] In the second bonding process, the capillary is aligned to a predetermined position on the bonding target and ultrasonic vibration is applied. In the second bonding process, the wire is bonded to the bonding target. A concern with the wire bonding method is that the ultrasonic vibration during the second bonding may cause the wire to resonate and be damaged. Countermeasures are particularly necessary for wires with a diameter of 80 micrometers or less. In the wire bonding method, adjustment of length and height is necessary due to this concern. In this embodiment, the first bonding wires 110a and 110c have a diameter of 80 micrometers or less. In this embodiment, the surface metal body 62 directly above the first bonding wires 110a and 110c is removed along the projection plane of the first bonding wires 110a and 110c. This increases the resonance avoidance region. Furthermore, in this embodiment, the area over which the surface metal body 62 is removed is minimized, thereby increasing the heat dissipation area.

[0127] The semiconductor device 20 of this embodiment has multiple first bonding wires 110a, 110c and corresponding notches 66A, 66B. The notches 66A, 66B are provided at locations corresponding to each of the first bonding wires 110a, 110c. In this embodiment, the surface metal body 62 has wiring pieces 68A, 68B that separate adjacent notches 66A, 66B. In this embodiment, the amount of reduction in the surface metal body 62 can be reduced by the amount of wiring pieces 68A, 68B. This can suppress a decrease in the heat dissipation efficiency of the semiconductor element 40.

[0128] In this embodiment, the notch group 67A is included within the projection region of the semiconductor elements 41L and 42L with respect to the Y direction. The notch group 67B is included within the projection region of the semiconductor elements 41H and 42H with respect to the Y direction. This suppresses large variations in the lengths of the multiple first bonding wires 110a. It also suppresses large variations in the lengths of the multiple first bonding wires 110c. It makes it easier to keep the lengths of the multiple first bonding wires 110a and 110c within a region where resonance can be avoided.

[0129] The first bonding wires 110a and 110c have a vertex 110t that is furthest from the pad 40P and the signal terminal 93 in the Z direction. The vertex 110t of the first bonding wire 110a is located inside the notch 66B. The vertex 110t of the first bonding wire 110c is located inside the notch 66A. Because the insides of the notches 66A and 66B can be used as adjustment ranges for the first bonding wires 110a and 110c, the lengths of the first bonding wires 110a and 110c can be easily kept within a range where resonance can be avoided.

[0130] In this embodiment, the end 64e5 of the N wiring 64 is located closer to the end 64e2 than the joint P1 between the N wiring 64 and the bonding material 102. The end 64e5 is located on the signal terminal 93L side of the pad 40P of the semiconductor element 40L. The end 65e5 of the relay wiring 65 is located closer to the end 65e2 than the joint P2 between the relay wiring 65 and the bonding material 102. The end 65e2 is located on the signal terminal 93H side of the pad 40P of the semiconductor element 40H. Heat is transferred at an ideal angle of 45 degrees in the presence of a heat transfer member. In this embodiment, the heat from the semiconductor elements 40H and 40L can be diffused to the outside of the semiconductor element 40 in a plan view through the N wiring 64 and the relay wiring 65. The heat from the semiconductor element 40 can be diffused in a near-ideal state.

[0131] The semiconductor device 20 has wires 56 and 57 that electrically connect the pad 40P and the signal terminals 93H and 93L. The wires 56 and 57 are electrically connected to the pad 40P via first bonding wires 110a and 110c. The wires 56 and 57 are electrically connected to the signal terminals 93H and 93L via second bonding wires 110b and 110d. This allows the lengths of the first bonding wires 110a and 110c and the second bonding wires 110b and 110d to be kept to a minimum. Large variations in length are suppressed in each of them. It is easier to keep the lengths of each within a range where resonance can be avoided.

[0132] (Second Embodiment) Other embodiments will be described below. The other embodiments will be described focusing on the differences from the first embodiment. Hereafter, in the other embodiments as well, the focus will be on the differences from the embodiments described earlier. Configurations, operations, and effects that are not specifically described in the other embodiments are the same as those in the embodiments described earlier. Note that the configuration of the semiconductor element 40L will be described from the second embodiment onward, but the configuration shown below may also be applied to the semiconductor element 40H side.

[0133] Figure 12 is a plan view showing a part of the semiconductor device 20 according to the second embodiment. In the second embodiment as well, a notch 66A is provided in the N wiring 64 at a location that overlaps with the first bonding wire 110c in the Z direction. In the second embodiment, the position of the end 64e5 is located significantly closer to the signal terminal 93L than the pad 40P of the semiconductor element 40L. With respect to the Y direction, the end 64e5 is located between the end 61e1 and the pad 40P of the semiconductor element 40L. The apex 110t of the first bonding wire 110c is located between the end 64e5 and the end 61e1, or between the end 64e5 and the end 64e2. According to the second embodiment, the amount of notch 66A is reduced. This allows for a good balance between suppressing a decrease in the heat dissipation efficiency of the semiconductor element 40L and securing an adjustment range for the first bonding wire 110c.

[0134] (Third Embodiment) In the third to eighth embodiments, a representative figure will be used to describe a configuration in which the end portion 64e5 overlaps the pad 40P in the Z direction. However, the end portion 64e5 is not limited to this in the third to eighth embodiments. The end portion 64e5 may be provided on the signal terminal 93L side of the pad 40P, or it may be provided further away from the signal terminal 93L than the pad 40P. Figure 13 is a cross-sectional view showing a part of the semiconductor device 20 according to the third embodiment. The semiconductor device 20 of the third embodiment does not have a conductive spacer 70. Even without a conductive spacer 70 as in the third embodiment, the same effects as in the first embodiment are achieved.

[0135] (Fourth Embodiment) Figure 14 is a cross-sectional view showing a part of the semiconductor device 20 according to the fourth embodiment. In the fourth embodiment as well, a notch 66A is provided in the N wiring 64 at a location that overlaps with the first bonding wire 110c in the Z direction. In the fourth embodiment, the notch 66A is cut out in the Z direction from the opposing surface 64a toward the insulating substrate 61. As an example, the notch 66A is cut out in the range from end 64e2 to end 64e5. However, the range of the notch 66A is not limited to this. The N wiring 64 of the fourth embodiment has a first partitioned portion 66C that partitions a part of the notch 66A in the Y direction, and a second partitioned portion 66D that partitions a part of the notch 66A in the Z direction. The thickness of the second partitioned portion 66D in the Z direction is thinner than the thickness of the first partitioned portion 66C in the Z direction. The second partitioned portion 66D partitions a part of the notch 66A in the Z direction and faces the first bonding wire 110c in the Z direction. According to the fourth embodiment, the amount of heat transfer material increases due to the second compartment 66D. Consequently, the heat dissipation performance of the semiconductor element 40 is improved.

[0136] (Fifth Embodiment) Figure 15 is a cross-sectional view showing a part of the semiconductor device 20 according to the fifth embodiment. The fifth embodiment is a configuration from the fourth embodiment with the conductive spacer 70 removed. The fifth embodiment also provides the same effects as the fourth embodiment.

[0137] (Sixth to Eighth Embodiments) Figure 16 is a cross-sectional view showing a part of the semiconductor device 20 according to the sixth embodiment. Figure 17 is a cross-sectional view showing a part of the semiconductor device 20 according to the seventh embodiment. Figure 18 is a cross-sectional view showing a part of the semiconductor device 20 according to the eighth embodiment. In the sixth to eighth embodiments, the semiconductor device 20 does not have wire wiring 56. In the sixth to eighth embodiments, the semiconductor device 20 has bonding wires 110e connecting the pads 40P and the signal terminals 93L.

[0138] The sixth embodiment replaces the bonding wires 110c and 110d of the third embodiment with bonding wire 110e. The seventh embodiment replaces the bonding wires 110c and 110d of the fourth embodiment with bonding wire 110e. The eighth embodiment replaces the bonding wires 110c and 110d of the fifth embodiment with bonding wire 110e. This also produces the same effects as the third to fifth embodiments.

[0139] (Other Embodiments) The disclosures in this specification and drawings are not limited to the exemplary embodiments. The disclosures include the exemplary embodiments and variations thereof by those skilled in the art. For example, the disclosures are not limited to combinations of parts and / or elements shown in the embodiments. The disclosures are implementable in a variety of combinations. The disclosures may have additional parts that can be added to the embodiments. The disclosures include embodiments in which parts and / or elements have been omitted. The disclosures include substitutions or combinations of parts and / or elements between one embodiment and another. The scope of the disclosed technical areas is not limited to the descriptions of the embodiments. Some of the scope of the disclosed technical areas are indicated by the descriptions of the claims and should be understood to include all modifications within the meaning and scope equivalent to those described in the claims.

[0140] The disclosures in the specification and drawings are not limited by the claims. The disclosures in the specification and drawings encompass the technical ideas described in the claims and extend to a wider and more diverse range of technical ideas than those described in the claims. Therefore, a variety of technical ideas can be extracted from the disclosures in the specification and drawings without being bound by the claims.

[0141] When an element or layer is referred to as “on top of,” “connected to,” “linked to,” or “joined,” it may be directly on top of, connected to, or joined to another element or layer. Furthermore, there may be an intervening element or layer. In contrast, when an element is referred to as “directly on top of,” “directly connected to,” “directly linked to,” or “directly joined to” another element or layer, there is no intervening element or layer. Other words used to describe relationships between elements should be interpreted in a similar manner, for example, between “between” versus “directly between,” “adjacent” versus “directly adjacent,” etc. When used in this specification, the term “and / or” includes any combination and all combinations relating to one or more of the enumerated items relating to each other.

[0142] Spatially relative terms such as “inside,” “outside,” “back,” “below,” “low,” “above,” and “high” are used here to facilitate descriptions of the relationship between one element or feature and other elements or features, as illustrated. Spatially relative terms may be intended to encompass different orientations of the device in use or operation, in addition to the orientation depicted in the drawings. For example, if the device in the drawing is turned upside down, an element described as “below” or “directly below” another element or feature will be oriented “above” the other element or feature. Thus, the term “below” can encompass both up and down orientations. The device may be oriented in other directions, and may be rotated 90 degrees or in other directions. Spatially relative descriptors used in this specification shall be interpreted accordingly.

[0143] The vehicle's drive system 1 is not limited to the configuration described above. For example, although an example with one motor generator 3 has been shown, it is not limited to this. It may have multiple motor generators. The power conversion device 4 is shown as an example with an inverter 6 as a power conversion circuit, but it is not limited to this. For example, it may have a configuration with multiple inverters. It may have a configuration with at least one inverter and a converter. It may have only a converter.

[0144] Although an example has been shown in which the semiconductor element 40 has a MOSFET 11 as a switching element, it is not limited to this. For example, an IGBT can also be used. IGBT is an abbreviation for Insulated Gate Bipolar Transistor.

[0145] Although a substrate 50 is shown as an example of a wiring member connected to the drain electrode 40D, the invention is not limited to this. In configurations not limited to the substrate 50, a metal plate may be used instead of the substrate 50. In the case of a metal plate, a first metal plate to which the drain electrode 40D of the semiconductor element 40H is connected and a second metal plate to which the drain electrode 40D of the semiconductor element 40L is connected are arranged on the drain electrode 40D side.

[0146] The example shown illustrates how one semiconductor device 20 constitutes one phase of an upper and lower arm circuit 9, but the model is not limited to this. For example, it can also be applied to semiconductor devices where one semiconductor device 20 constitutes one arm. The number of arms constituted by one semiconductor device 20 is not particularly limited.

[0147] (Disclosure of Technical Ideas) This specification discloses several technical ideas as described in the following paragraphs. Some paragraphs may be written in a multiple dependent form, where subsequent paragraphs optionally refer to preceding paragraphs. Furthermore, some paragraphs may be written in a multiple dependent form, where they refer to other multiple dependent forms. These paragraphs written in multiple dependent forms define several technical ideas.

[0148] (Technical Concept 1) A semiconductor element (40) having a first main electrode (40D) provided on one surface, a second main electrode (40S) provided on the back surface opposite to the first surface in the thickness direction (Z), and a signal pad (40P) provided on the back surface at a position different from the second main electrode; a first wiring member (50) electrically connected to the first main electrode; a second wiring member (60) electrically connected to the second main electrode; a signal terminal (93); and bonding wires (110a, 110b, 110c, 110d, 110e) connecting the pad and the signal terminal, wherein the second wiring member is a substrate having an insulating substrate (61), a surface metal body (62) disposed on the surface of the insulating substrate which is the surface facing the semiconductor element and electrically connected to the second main electrode, and a back metal body (63) disposed on the back surface of the insulating substrate, A semiconductor device in which, with respect to the alignment direction (Y) of the semiconductor elements and the signal terminals, the ends (64e2, 65e2) of the surface metal body are provided closer to the signal terminals than the pads, and notches (66A, 66B) are provided in the surface metal body at locations that overlap with the bonding wire in the thickness direction, and are cut out in the alignment direction or the thickness direction.

[0149] (Technical Concept 2) The semiconductor device according to Technical Concept 1, having a plurality of bonding wires and notches, wherein the notches are provided at locations corresponding to each bonding wire.

[0150] (Technical Concept 3) A semiconductor device according to technical concept 1 or 2, wherein the notch is provided within the projection region of the semiconductor element in the direction of alignment when viewed from the plate thickness direction.

[0151] (Technical Idea 4) The bonding wire has a vertex portion (110t) that is furthest from the pad and the signal terminal in the plate thickness direction, and the vertex portion is provided inside the notch, according to any one of Technical Ideas 1 to 3.

[0152] (Technical Idea 5) A semiconductor device according to any one of Technical Ideas 1 to 4, comprising a bonding material (102) for electrically bonding the surface metal body and the semiconductor element, wherein the notch tip portion (64e5, 65e5) of the surface metal body that forms the notch, which is furthest from the end in the direction of alignment, is located closer to the end than the bonding portion (P1, P2) between the surface metal body and the bonding material.

[0153] (Technical Concept 6) The semiconductor device according to Technical Concept 5, wherein the notched tip is located closer to the end than the pad.

[0154] (Technical Idea 7) A semiconductor device according to any one of Technical Ideas 1 to 6, having a relay metal body (56, 57) that electrically relays the pad and the signal terminal, wherein the bonding wire has first bonding wires (110a, 110c) that connect the pad and the relay metal body and second bonding wires (110b, 110d) that connect the relay metal body and the signal terminal.

Claims

1. A semiconductor element (40) having a first main electrode (40D) provided on one surface, a second main electrode (40S) provided on the back surface opposite to the first surface in the thickness direction (Z), and a signal pad (40P) provided on the back surface at a position different from the second main electrode; a first wiring member (50) electrically connected to the first main electrode; a second wiring member (60) electrically connected to the second main electrode; a signal terminal (93); and bonding wires (110a, 110b, 110c, 110d, 110e) connecting the pad and the signal terminal; wherein the second wiring member is a substrate having an insulating substrate (61), a surface metal body (62) disposed on the surface of the insulating substrate which is the surface facing the semiconductor element and electrically connected to the second main electrode, and a back metal body (63) disposed on the back surface of the insulating substrate. A semiconductor device in which, with respect to the alignment direction (Y) of the semiconductor elements and the signal terminals, the ends (64e2, 65e2) of the surface metal body are provided closer to the signal terminals than the pads, and notches (66A, 66B) are provided in the surface metal body at locations that overlap with the bonding wire in the thickness direction, and are cut out in the alignment direction or the thickness direction.

2. The semiconductor device according to claim 1, comprising a plurality of bonding wires and notches, wherein the notches are provided at locations corresponding to each bonding wire.

3. The semiconductor device according to claim 2, wherein the notch is provided within the projection region of the semiconductor element in the direction of alignment when viewed from the plate thickness direction.

4. The semiconductor device according to claim 3, wherein the bonding wire has a vertex portion (110t) that is furthest from the pad and the signal terminal in the thickness direction of the plate, and the vertex portion is provided inside the notch.

5. The semiconductor device according to claim 4, comprising a bonding material (102) for electrically bonding the surface metal body and the semiconductor element, wherein the notch tip portions (64e5, 65e5) of the surface metal body forming the notch, which are furthest from the end in the direction of alignment, are located closer to the end than the bonding portions (P1, P2) between the surface metal body and the bonding material.

6. The semiconductor device according to claim 5, wherein the notched tip is located closer to the end than the pad.

7. A semiconductor device according to any one of claims 1 to 6, comprising relay metal bodies (56, 57) that electrically relay the pad and the signal terminal, wherein the bonding wire comprises first bonding wires (110a, 110c) that connect the pad and the relay metal body, and second bonding wires (110b, 110d) that connect the relay metal body and the signal terminal.

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