Processing method and processing system

Abstract

This processing method includes: preparing a reconstituted substrate in which a plurality of dies are integrally molded in a state in which surfaces of the plurality of dies and a first carrier are joined; and laminating a plurality of reconstituted substrates.

Description

Processing Method and Processing System

[0001] The present disclosure relates to a processing method and a processing system.

[0002] Patent Document 1 discloses a wafer processing method for dividing a wafer into individual devices. This processing method comprises the steps of: arranging a protective member on a surface of a wafer; holding the protective member side of the wafer on a chuck table, positioning a cutting blade from a back surface of the wafer in a region corresponding to a planned dividing line, forming a cutting groove on the back surface of the wafer, and dividing the wafer into individual devices; and accommodating the wafer in an opening of a frame having the opening for accommodating the wafer, attaching a dicing tape to the back surface of the wafer and the frame, and peeling off the protective member from the surface of the wafer.

[0003] Japanese Unexamined Patent Publication No. 2020-009791

[0004] The technology according to the present disclosure efficiently arranges a plurality of dies in the horizontal direction and the vertical direction.

[0005] A processing method according to one aspect of the present disclosure includes: preparing a reconstructed substrate in which the plurality of dies are integrally formed, in a state where surfaces of the plurality of dies are bonded to a first carrier; and stacking a plurality of the reconstructed substrates.

[0006] According to the present disclosure, a plurality of dies can be efficiently arranged in the horizontal direction and the vertical direction.

[0007] It is a flow diagram illustrating main steps of processing for preparing a reconstructed wafer and is a flow diagram illustrating main steps of processing for stacking a plurality of reconstructed wafers. It is an explanatory diagram schematically illustrating some steps of a series of processes. It is an explanatory diagram schematically illustrating some steps of a series of processes. It is an explanatory diagram schematically illustrating some steps of a series of processes. It is an explanatory diagram schematically illustrating some steps of a series of processes. It is an explanatory diagram schematically illustrating some steps of a series of processes. It is an explanatory diagram schematically illustrating some steps of a series of processes. It is a plan view schematically illustrating the configuration of a processing system.

[0008] The processing method and processing system according to this embodiment will be described below with reference to the drawings. In this specification and the drawings, elements having substantially the same functional configuration are denoted by the same reference numerals, and redundant explanations will be omitted.

[0009] First, the processing method according to this embodiment will be described. In this embodiment, a wafer as a substrate is subjected to a desired process to form multiple dies, and then a reconstructed wafer is prepared as a reconstructed substrate by integrally molding the multiple dies. After that, the multiple reconstructed wafers are stacked. Figure 1 is a flowchart showing the main steps of the process for preparing the reconstructed wafers. Figure 2 is a flowchart showing the main steps of the process for stacking the multiple reconstructed wafers. Figures 3 to 8 are schematic explanatory diagrams showing some of the steps of a series of processes (method of manufacturing a semiconductor device) according to this embodiment.

[0010] First, as shown in Figure 3(a), a device layer EA is formed on the surface of the wafer W on the wiring S side (St101 in Figure 1). The method for forming the device layer EA at St101 is arbitrary, but for example, the device layer EA is formed on the wafer W by performing CVD (Chemical Vapor Deposition) using plasma in a reduced pressure atmosphere.

[0011] The wafer W is formed from, for example, silicon. Wiring S is formed on the surface side of the wafer W. The wiring S is made of, for example, copper. The wiring S penetrates the die D after the wafer W is diced and separated into pieces, as will be described later, and the die D is further thinned. For example, the diameter of the wafer W is about 300 mm and the thickness is about 800 μm.

[0012] The device layer EA is formed from, for example, a dielectric layer. The dielectric layer is an insulating film and is formed from, for example, SiCN. Wiring SA is formed on the device layer EA. Wiring SA is made of, for example, copper. Wiring SA is formed through the device layer EA and is electrically connected to the wiring S of the wafer W. Hereinafter, in the wafer W, the side on which the device layer EA is formed is sometimes referred to as surface Wa, and the side opposite to surface Wa is sometimes referred to as Wb.

[0013] In St101, a protective layer (not shown) may be formed on the surface of the device layer EA. The method for forming the protective layer is arbitrary, but for example, the protective layer can be formed on the surface of the device layer EA by performing CVD using plasma in a reduced pressure atmosphere. The protective layer is a film that reflects laser light, and for example, a metal film or a metal compound film can be used. In this case, when the first carrier C1 is peeled off from the reconstructed wafer R using laser light as described later, it is possible to suppress damage to the device layer EA from the laser light.

[0014] Furthermore, in St101, a bonding layer may be formed on the surface of the protective layer. The method for forming the bonding layer (not shown) is also arbitrary, but for example, the bonding layer can be formed on the surface of the protective layer by performing CVD using plasma in a reduced pressure atmosphere. The bonding layer may have an oxide film, for example, SiO ２ This is used. In such a case, as will be described later, when the wafer W is joined to the die D which has been separated into individual pieces and to the first carrier C1, the bonding layer on the die D and the bonding layer Q1 of the first carrier C1, as will be described later, can be fusion bonded.

[0015] Next, as shown in Figure 3(b), a support tape H is attached to the surface Wa of the wafer W (St102 in Figure 1). For example, a BG tape (backgrind tape) is used for the support tape H.

[0016] Next, as shown in Figure 3(c), the front and back surfaces of the wafer W are inverted so that the back surface Wb faces upward. Subsequently, the wafer W is diced to form scribe lines K on the wafer W (St103 in Figure 1). The scribe lines K are grooves for separating the wafer W into multiple dies D, as will be described later. The method of dicing the wafer W in St103 is arbitrary, but for example, stealth dicing using a laser may be performed, blade dicing using a blade may be performed, or plasma dicing using plasma in a reduced pressure atmosphere may be performed.

[0017] Next, as shown in Figure 3(d), a tape frame T is mounted on the back surface Wb of the wafer W (St104 in Figure 1). The tape frame T has a tape L and a frame M. In St104, with the annular frame M positioned outside the wafer W, the tape L is attached to the back surface Wb of the wafer W. The surface of the tape L is adhesive, and the wafer W is held in place by the surface (adhesive surface) of the tape L. Also, the outer surface of the tape L is fixed to the frame M.

[0018] Next, as shown in Figure 3(e), the wafer W is flipped over so that the front surface Wa faces upward. Subsequently, the support tape H is peeled off from the front surface Wa of the wafer W (St105 in Figure 1). After peeling off the support tape H, the front surface Wa of the wafer W is cleaned.

[0019] Next, as shown in Figure 3(f), the tape L is expanded, and the wafer W is divided into multiple dies D based on the scribe line K (St106 in Figure 1). Hereinafter, in the die D, the side on which the device layer EA is formed is sometimes referred to as surface Da, and the side opposite to surface Da is sometimes referred to as Db.

[0020] Next, the multiple dies D held in the tape frame T are inspected (St107 in Figure 1). In St107, various inspections are performed on the dies D, such as inspection for defects on the surface Da of the die D and inspection of the wiring SA formed on the die D. The multiple dies D are then determined to be good dies and defective dies. Note that the timing of the die D inspection in St107 is not limited to this embodiment. For example, the inspection may be performed on the wafer W before it is separated into multiple dies D.

[0021] Next, as shown in Figure 4(a), the die D held in the tape frame T is joined to the first carrier C1. Before joining the die D and the first carrier C1, each of the die D and the first carrier C1 is subjected to surface treatment.

[0022] The first carrier C1 has a structure in which a laser absorption layer P1 and a bonding layer Q1 are stacked in this order from the base layer side on the surface of a base layer made of, for example, silicon or glass. Any material that absorbs laser light, as described later, can be used for the laser absorption layer P1. The bonding layer Q1 is an oxide film, for example, SiO ２ For example, an oxide film, such as SiO, is used on the laser absorption layer P1. ２ When this is used, the laser absorption layer P1 and the bonding layer Q1 are common and may be a single layer. The first carrier C1 has approximately the same diameter and thickness as the wafer W, for example, a diameter of approximately 300 mm and a thickness of approximately 800 μm. Hereinafter, in the first carrier C1, the side on which the bonding layer Q1 is formed may be called the surface C1a, and the side opposite to the surface C1a may be called the back surface C1b.

[0023] As a surface treatment for die D, the following steps are performed sequentially: cleaning of the surface Da of die D (St108 in Figure 1), modification of the surface Da of die D (St109 in Figure 1), and hydrophilization of the surface Da of die D (St110 in Figure 1).

[0024] In St108, for example, the surface Da of die D (the surface of the device layer EA) is cleaned with a cleaning solution.

[0025] In St109, for example, plasma treatment is performed under a reduced pressure atmosphere to modify the surface Da of the die D.

[0026] In St110, for example, hydroxyl groups (silanol groups) are attached to the surface Da of die D modified in St109 by pure water, making the surface Da hydrophilic. The surface Da is also rinsed with the same pure water.

[0027] As a surface treatment for the first carrier C1, the surface C1a of the first carrier C1 is cleaned (St111 in Figure 1), the surface C1a of the first carrier C1 is modified (St112 in Figure 1), and the surface C1a of the first carrier C1 is hydrophilized (St113 in Figure 1) in sequence.

[0028] In St111, for example, the surface C1a of the first carrier C1 (the surface of the bonding layer Q1) is cleaned with a cleaning solution.

[0029] In St112, for example, plasma treatment is performed under a reduced pressure atmosphere to modify the surface C1a of the first carrier C1.

[0030] In St113, for example, hydroxyl groups (silanol groups) are attached to the surface C1a of the first carrier C1 modified in St112 by pure water, making the surface C1a hydrophilic. The surface C1a is also rinsed with the same pure water.

[0031] Next, as shown in Figure 4(a), the die D held in the tape frame T is detached from the tape frame T and picked up. Furthermore, the device layer EA on the surface Da of the picked-up die D and the bonding layer Q1 on the surface C1a of the first carrier are superimposed, and the die D and the first carrier C1 are joined by pressing the die D (St114 in Figure 1). These die D and first carrier C1 are fusion bonded. In other words, the device layer EA and the bonding layer Q1 are permanently bonded.

[0032] St114 repeatedly picks up the die D from the tape frame T and joins the die D to the first carrier C1. Then, as shown in Figure 4(b), multiple dies D are joined to the first carrier C1.

[0033] Furthermore, in St114, only dies D that have been inspected in St107 and determined to be good dies are joined to the first carrier C1. By excluding defective dies in this way, the performance of the manufactured semiconductor devices can be improved, and the yield of semiconductor devices can also be increased.

[0034] Next, as shown in Figure 4(c), the back surfaces Db of the multiple dies D are ground (St115 in Figure 1). In St115, with a portion of the arc of a grinding wheel (not shown) in contact with the back surfaces Db of the multiple dies D, the first carrier C1 and the grinding wheel are rotated while the grinding wheel is lowered, thereby grinding the back surfaces Db of the dies D. As a result, the dies D are thinned to a desired thickness, for example, 30 μm or less. Then, the wiring S formed on the dies D penetrates through the dies D. This wiring S corresponds to the through-wiring in this disclosure.

[0035] Next, as shown in Figure 5(a), gap fill is performed on multiple dies D to form an insulating layer G (St116 in Figure 1). The insulating layer G is formed to fill the gaps between adjacent dies D in the multiple dies D, and is also formed on the back surface Db of the multiple dies D. The method for forming the insulating layer G in St116 is arbitrary, but for example, the insulating layer G may be formed by performing CVD using plasma in a reduced pressure atmosphere, or the insulating layer G may be formed by applying an insulating material by spin coating.

[0036] Next, as shown in Figure 5(b), the insulating layer G formed on the back surface Db of the multiple dies D is ground (St117 in Figure 1). The grinding method for St117 is the same as that for St115. By grinding away the entire insulating layer G on the back surface Db, the back surface Db is exposed, and the wiring S is further exposed.

[0037] Next, as shown in Figure 5(c), a device layer EB is formed on the back surface Db of multiple dies D (St118 in Figure 1). The method for forming the device layer EA in St118 is arbitrary, but for example, the device layer EB is formed on the back surface Db of the die D by performing CVD using plasma in a reduced pressure atmosphere.

[0038] The device layer EB is formed from, for example, a dielectric layer. The dielectric layer is an insulating film and is formed from, for example, SiCN. Wiring SB is formed in the device layer EB. Wiring SB is made of, for example, copper. Wiring SB is formed through the device layer EB and is electrically connected to the wiring S of the die D.

[0039] In this way, a reconstructed wafer R is formed in which multiple dies D are integrated. That is, the reconstructed wafer R is a wafer obtained by first separating the wafer W into multiple dies D, and then re-forming only the good dies D into a single wafer. Hereinafter, in the reconstructed wafer R, the side on which the device layer EA is formed may be called the surface Ra, and the side on which the device layer EB is formed may be called the back surface Rb.

[0040] In this embodiment, as will be described later, a plurality of reconstructed wafers R are stacked to manufacture a semiconductor device. In the following description, a reference sign n indicating the n-th layer (n is an integer) is added to the reference signs of respective constituent members. For example, in the case of a reconstructed wafer R, the first-layer reconstructed wafer R is denoted as R1, the second-layer reconstructed wafer R is denoted as R2, and the n-th layer reconstructed wafer R is denoted as Rn.

[0041] Note that the wiring configuration in the device layers EA1 to EAn and EB1 to EBn of the first-layer to n-th-layer reconstructed wafers R1 to Rn is arbitrary. The reconstructed wafer R of each layer may have different wiring configurations.

[0042] Here, when stacking a plurality of reconstructed wafers R, after bonding the first-layer reconstructed wafer R1 to a second carrier C2 described later, the second-layer reconstructed wafer R2 is bonded to the first-layer reconstructed wafer R1.

[0043] Therefore, in St118, as shown in FIG. 5(d), in the first-layer reconstructed wafer R1, an additional bonding layer B1 is formed on the surface of the device layer EB1. The method for forming the bonding layer B1 is also arbitrary; for example, CVD is performed using plasma in a reduced-pressure atmosphere to form the bonding layer B1 on the surface of the device layer EB. An oxide film, such as SiO ２ is used.

[0044] As shown in FIG. 5(e), the bonding layer B1 is not formed on the second-layer to n-th-layer reconstructed wafers R2 to Rn, and the reconstructed wafers R2 to Rn are formed in a state where the device layers EB2 to EBn are exposed.

[0045] Note that in the reconstructed wafer R of each layer, a protective layer (not shown) for the device layer EB may be formed on the surface of the device layer EB (between the device layer EB1 and the bonding layer B1 in the case of the first layer). The method for forming the protective layer is arbitrary; for example, CVD is performed using plasma in a reduced-pressure atmosphere to form the protective layer on the surface of the device layer EB. The protective layer is a film that reflects laser light, and for example, a metal film or a metal compound film is used. In such a case, when peeling the first carrier C1 from the reconstructed wafer R using laser light as described later, it is possible to suppress damage to the device layer EB from the laser light.

[0046] The reconstructed wafers R are prepared by performing the series of processes described above. Next, these reconstructed wafers R are stacked.

[0047] First, as shown in Figure 6(a), the first layer of reconstructed wafer R1, which is bonded to the first carrier C1, is bonded to the second carrier C2. Before bonding the reconstructed wafer R1 and the second carrier C2, the back surface of the reconstructed wafer R1 and the surface of the second carrier C2 are treated.

[0048] The second carrier C2 has a structure in which a laser absorption layer P2 and a bonding layer Q2 are stacked in this order from the base layer side on the surface of a base layer made of, for example, silicon or glass. Any material that absorbs laser light, as described later, can be used for the laser absorption layer P2. The bonding layer Q2 is an oxide film, for example, SiO ２ The following is used. For example, an oxide film, such as SiO, is used on the laser absorption layer P2. ２ When this is used, the laser absorption layer P2 and the bonding layer Q2 are common and may be a single layer. The second carrier C2 has approximately the same diameter and thickness as the wafer W, for example, a diameter of approximately 300 mm and a thickness of approximately 800 μm. Hereinafter, in the second carrier C2, the side on which the bonding layer Q2 is formed may be called the surface C2a, and the side opposite to the surface C2a may be called the back surface C2b.

[0049] As a back surface treatment for the reconstructed wafer R1, the back surface R1b of the reconstructed wafer R1 is cleaned (St201 in Figure 2), modified (St202 in Figure 2), and hydrophilized (St203 in Figure 2) are performed sequentially.

[0050] In St201, for example, the back surface R1b (the surface of the bonding layer B1) of the reconstructed wafer R1 is cleaned with a cleaning solution.

[0051] In St202, for example, plasma treatment is performed under a reduced pressure atmosphere to modify the back surface R1b of the reconstructed wafer R1.

[0052] In St203, for example, hydroxyl groups (silanol groups) are attached to the back surface R1b of the reconstructed wafer R1 modified with St202 by pure water, making the back surface R1b hydrophilic. Furthermore, the back surface R1b is rinsed with the same pure water.

[0053] As a surface treatment for the second carrier C2, the following steps are performed sequentially: cleaning of the surface C2a of the second carrier C2 (St204 in Figure 2), modification of the surface C2a of the second carrier C2 (St205 in Figure 2), and hydrophilization of the surface C2a of the second carrier C2 (St206 in Figure 2).

[0054] In St204, for example, the surface C2a of the second carrier C2 (the surface of the bonding layer Q2) is cleaned with a cleaning solution.

[0055] In St205, for example, plasma treatment is performed under a reduced pressure atmosphere to modify the surface C2a of the second carrier C2.

[0056] In St206, for example, pure water causes hydroxyl groups (silanol groups) to adhere to the surface C2a of the second carrier C2 modified in St205, making the surface C2a hydrophilic. The surface C2a is also rinsed with the same pure water.

[0057] Next, as shown in Figure 6(a), the front and back surfaces of the reconfigured wafer R1 bonded to the first carrier C1 are reversed so that the back surface R1b faces downwards.

[0058] Next, as shown in Figure 6(b), the reconstructed wafer R1 and the second carrier C2 are joined (St207 in Figure 2). In St207, the bonding layer B1 on the back surface R1b of the reconstructed wafer R1 and the bonding layer Q2 on the front surface C2a of the second carrier C2 are joined. Oxide films are used for bonding layers B1 and Q2, and these bonding layers B1 and Q2 are fusion-bonded. In other words, bonding layers B1 and Q2 are permanently bonded.

[0059] Next, as shown in Figure 6(c), the first carrier C1 is peeled off from the reconstructed wafer R1 (St208 in Figure 2). In St208, the laser absorption layer P1 of the first carrier C1 is irradiated with laser light (e.g., a YAG laser or fiber laser) to reduce the bonding force at the interface between the base layer of the first carrier C1 and the laser absorption layer P1. Subsequently, the first carrier C1 is peeled off from the reconstructed wafer R1, starting from the interface between the base layer of the first carrier C1 and the laser absorption layer P1.

[0060] Next, as shown in Figure 6(d), the surface R1a side of the reconstructed wafer R1 is polished (St209 in Figure 2). In St209, the laser absorption layer P1 and bonding layer Q1 remaining on the surface R1a of the reconstructed wafer R1 are polished and removed. Then, the device layer EA1 on the surface R1a of the reconstructed wafer R1 is exposed.

[0061] Next, as shown in Figure 7(a), the second layer of reconstructed wafer R2, which is bonded to the first carrier C1, is bonded to the first layer of reconstructed wafer R1. Before bonding the reconstructed wafer R2 and the reconstructed wafer R1, the back surface of the reconstructed wafer R2 and the surface of the reconstructed wafer R1 are treated.

[0062] As a back surface treatment for the reconstructed wafer R2, the back surface R2b of the reconstructed wafer R2 is cleaned (St210 in Figure 2), modified (St211 in Figure 2), and hydrophilized (St212 in Figure 2) are performed sequentially.

[0063] In St210, for example, the back surface R2b (the surface of the device layer EB2) of the reconstructed wafer R2 is cleaned with a cleaning solution.

[0064] In St211, for example, plasma treatment is performed under a reduced pressure atmosphere to modify the back surface R2b of the reconstructed wafer R2.

[0065] In St212, for example, hydroxyl groups (silanol groups) are attached to the back surface R2b of the reconstructed wafer R2 modified in St211 by pure water, making the back surface R2b hydrophilic. Furthermore, the back surface R2b is rinsed with the same pure water.

[0066] As a surface treatment for the reconstructed wafer R1, the following steps are performed sequentially: cleaning of the surface R1a of the reconstructed wafer R1 (St213 in Figure 2), modification of the surface R1a of the reconstructed wafer R1 (St214 in Figure 2), and hydrophilization of the surface R1a of the reconstructed wafer R1 (St215 in Figure 2).

[0067] In St213, for example, the surface R1a (the surface of the device layer EA1) of the reconstructed wafer R1 is cleaned with a cleaning solution.

[0068] In St214, for example, plasma treatment is performed under a reduced pressure atmosphere to modify the surface R1a of the reconstructed wafer R1.

[0069] In St215, for example, hydroxyl groups (silanol groups) are attached to the surface R1a of the reconstructed wafer R1 modified with St214 by pure water, making the surface R1a hydrophilic. Furthermore, the surface R1a is rinsed with the same pure water.

[0070] Next, as shown in Figure 7(a), the front and back surfaces of the reconfigured wafer R2 bonded to the first carrier C1 are reversed so that the back surface R2b faces downwards.

[0071] Next, as shown in Figure 7(b), the reconstructed wafer R2 and the reconstructed wafer R1 are joined (St216 in Figure 2). In St216, the device layer EB2 of the reconstructed wafer R2 and the device layer EA1 of the reconstructed wafer R1 are hybrid-bonded. That is, the dielectric layer of device layer EB2 and the dielectric layer of device layer EA1 are joined, and the wiring SB2 of device layer EB2 and the wiring SA1 of device layer EA1 are joined. Then, wiring SB2 and wiring SA1 become electrically connected.

[0072] Next, as shown in Figure 7(c), the first carrier C1 is peeled off from the reconstructed wafer R2 (St217 in Figure 2). In St217, similar to St208, laser light is irradiated onto the laser absorption layer P1 of the first carrier C1 to reduce the bonding force at the interface between the base layer of the first carrier C1 and the laser absorption layer P1. Subsequently, the first carrier C1 is peeled off from the reconstructed wafer R2, starting from the interface between the base layer of the first carrier C1 and the laser absorption layer P1.

[0073] Next, as shown in Figure 7(d), the surface R2a side of the reconstructed wafer R2 is polished (St218 in Figure 2). In St218, the laser absorption layer P1 and bonding layer Q1 remaining on the surface R2a of the reconstructed wafer R2 are polished and removed. Then, the device layer EA2 on the surface R2a of the reconstructed wafer R2 is exposed.

[0074] Steps St210 to St218 are repeated to stack the reconstructed wafers R3 to Rn for the 3rd to nth layers, as shown in Figure 8. In this way, a semiconductor device is manufactured.

[0075] When manufacturing semiconductor devices, the first to n layers of the reconstructed wafers R1 to Rn are molded, and then the second carrier C2 is peeled off. Similar to St208, the second carrier C2 is peeled off by irradiating the laser absorption layer P2 of the second carrier C2 with laser light to reduce the bonding force at the interface between the base layer and the laser absorption layer P2 of the second carrier C2. Subsequently, the second carrier C2 is peeled off from the reconstructed wafer R1, starting from the interface between the base layer and the laser absorption layer P2 of the second carrier C2.

[0076] Conventionally, when manufacturing semiconductor devices by stacking multiple dies vertically, bumps were provided between the stacked dies, and the wiring between the dies was made electrically conductive through these bumps. However, providing bumps in this way increases the height of the stacked dies, reducing the number of dies that can be stacked in the semiconductor device.

[0077] In this respect, according to this embodiment, the reconfigured wafer R integrates multiple dies D in the horizontal direction. Since the dies D are stacked by stacking the reconfigured wafer R, the number of dies D stacked on the semiconductor device can be increased. Therefore, multiple dies D can be efficiently arranged in both the horizontal and vertical directions.

[0078] Another method for manufacturing semiconductor devices without using bumps is to directly place the dies onto the wafer. Methods for directly placing dies onto a wafer include joining wafers containing dies together, and joining each die individually to the wafer.

[0079] However, when wafers are directly joined together, for example, if wafers with a yield of 90% good dies are joined together to form n layers, the yield will decrease by 0.9 to the power of n. In this respect, according to this embodiment, St107 inspects multiple dies D, and the reconstructed wafer R is formed by first separating the wafer W into multiple dies D, and then re-forming only the good dies D into a single integrated structure. As a result, the yield of semiconductor devices can be significantly improved.

[0080] Furthermore, when a die is directly bonded to a wafer, high bonding accuracy of the die to the wafer is required. Required bonding accuracy includes, for example, the positional accuracy of the die relative to the wafer and the absence of voids at the bonding surface between the wafer and the die. In this regard, according to this embodiment, since a reconstructed wafer R, in which multiple dies D are integrally molded, is stacked, the bonding accuracy between the reconstructed wafers R can be improved.

[0081] Furthermore, according to this embodiment, when peeling the first carrier C1 from the reconstructed wafer R at St208 and St217, laser light is irradiated onto the laser absorption layer P1 to reduce the bonding force at the interface between the base layer of the first carrier C1 and the laser absorption layer P1, and then the first carrier C1 is peeled from the reconstructed wafer R starting from this interface. Therefore, even if the die D and the first carrier C1 are firmly bonded at St114, the first carrier C1 can be appropriately peeled from the reconstructed wafer R at St208 and St217.

[0082] The semiconductor device to be manufactured is not particularly limited, but an example is an HBM (High Bandwidth Memory). Conventionally, when manufacturing HBMs, a reconstituted wafer R is not used as in this embodiment, and this embodiment is particularly useful for manufacturing HBMs.

[0083] Furthermore, in this embodiment, a semiconductor device was manufactured by stacking reconstructed wafers R1 to Rn from the first to the nth layer, but it is not necessary to use reconstructed wafers R for all layers. By stacking at least one reconstructed wafer R, the conventional problems described above can be resolved and the effects of this embodiment can be enjoyed.

[0084] Next, we will describe the processing system 1 for carrying out the above series of processes. Figure 9 is a plan view showing a schematic configuration of the processing system 1.

[0085] As shown in Figure 9, the processing system 1 includes a first processing system 10, a second processing system 20, and a third processing system 30. The first processing system 10 and the second processing system 20 constitute the preparation system in this disclosure and prepare the reconfigured wafer R. The third processing system 30 constitutes the stacking system in this disclosure and stacks a plurality of reconfigured wafers R.

[0086] The first processing system 10 has a configuration in which an input / output station 40 and a processing station 41 are integrally connected. At the input / output station 40, hoops Fw and Ft, each capable of accommodating multiple wafers W and multiple tape frames T respectively, are input and output to and from the outside. The processing station 41 is equipped with various processing devices for realizing a series of processes described later.

[0087] A hoop mounting platform 50 is provided at the loading / unloading station 40. In the illustrated example, multiple hoops, for example, two Fw and two Ft, are placed on the hoop mounting platform 50 in a line along the Y-axis. The number and arrangement of hoops Fw and Ft placed on the hoop mounting platform 50 are not limited to this embodiment and can be determined arbitrarily.

[0088] A transport device 60 is provided adjacent to the hoop mounting table 50 on the positive X-axis side. The transport device 60 is configured to move freely along a transport path 61 extending in the Y-axis direction. The transport device 60 also has, for example, two transport arms 62 that hold and transport the wafer W and tape frame T. Each transport arm 62 is configured to move freely in the horizontal direction, vertical direction, around the horizontal axis, and around the vertical axis. The transport device 60 is configured to transport the wafer W and tape frame T to the hoops Fw and Ft of the hoop mounting table 50, the transition device 80 (described later), and the buffer device 81 (described later).

[0089] The processing station 41 is equipped with a transport device 70, a transition device 80, a buffer device 81, a film deposition device 90, a bonding device 91, a dicing device 92, a mounting device 93, a peeling device 94, an expander device 95, and an inspection device 96. The number and arrangement of these various processing devices are not limited to this embodiment and can be determined arbitrarily.

[0090] The transport device 70 is configured to move freely along a transport path 71 that extends in the X-axis direction. The transport device 70 also has, for example, two transport arms 72 that hold and transport the wafer W and the tape frame T. Each transport arm 72 is configured to move freely in the horizontal direction, the vertical direction, around the horizontal axis, and around the vertical axis. The transport device 70 is configured to transport the wafer W and the tape frame T to each of the devices 80, 81, 90-96 of the processing station 41.

[0091] The transition device 80 and the buffer device 81 are positioned on the negative X-axis side of the transport device 70. The transition device 80 and the buffer device 81 are stacked vertically from the top in this order. Multiple buffer devices 81 may be stacked.

[0092] The transition device 80 transfers the wafer W and tape frame T between the transport device 60 and the transport device 70. The buffer device 81 temporarily stores the wafer W and tape frame T.

[0093] The film deposition apparatus 90, the bonding apparatus 91, the dicing apparatus 92, and the mounting apparatus 93 are arranged in this order from the negative X-axis side to the positive X-axis side on the positive Y-axis side of the transport apparatus 70. The peeling apparatus 94, the expanding apparatus 95, and the inspection apparatus 96 are arranged in this order from the negative X-axis side to the positive X-axis side on the negative Y-axis side of the transport apparatus 70.

[0094] The film deposition apparatus 90 performs St101 to form a device layer EA on the wafer W. The film deposition apparatus 90 may also form a protective layer on the surface of the device layer EA, or a bonding layer on the surface of the protective layer. The film deposition method for each layer in the film deposition apparatus 90 is arbitrary, but for example, CVD is performed using plasma in a reduced pressure atmosphere. A known film deposition apparatus is used for the film deposition apparatus 90.

[0095] The bonding apparatus 91 performs St102 to attach the support tape H to the surface Wa of the wafer W. A known bonding apparatus is used for the bonding apparatus 91.

[0096] The dicing apparatus 92 performs St103 to dice the wafer W and form scribe lines K on the wafer W. The dicing apparatus 92 may perform stealth dicing using a laser, blade dicing using a blade, or plasma dicing using plasma in a reduced pressure atmosphere. A known dicing apparatus is used for the dicing apparatus 92.

[0097] The mounting device 93 performs St104 and mounts the tape frame T on the back surface Wb of the wafer W. A known mounting device is used for the mounting device 93.

[0098] The peeling device 94 performs St105 to peel the support tape H from the surface Wa of the wafer W. A known peeling device is used for the peeling device 94.

[0099] The expanding apparatus 95 executes St106 to expand the tape L, so that the wafer W is divided into multiple dies D with the scribe line K as the base point. A known expanding apparatus is used for the expanding apparatus 95.

[0100] The inspection device 96 executes St107 to inspect the multiple dies D held in the tape frame T and determines which dies are good and which are defective. The inspection device 96 performs, for example, inspection of defects on the surface Da of the die D, inspection of the wiring SA formed on the die D, etc. A known inspection device is used for the inspection device 96.

[0101] Although the first processing system 10 according to this embodiment is configured as described above, other processing devices may be further arranged in the first processing system 10 depending on the purpose, and some processing devices may be arranged outside the first processing system 10 depending on the purpose.

[0102] The second processing system 20 has a configuration in which an input / output station 100 and a processing station 101 are connected as an integrated unit. At the input / output station 100, for example, hoops Ft and Fc1 capable of accommodating multiple tape frames T and multiple first carriers C1, respectively, are input and output to and from the outside. The processing station 101 is equipped with various processing devices for realizing a series of processes described later.

[0103] A hoop mounting platform 110 is provided at the loading / unloading station 100. In the illustrated example, multiple hoops, for example, two Ft and two Fc1, are placed on the hoop mounting platform 110 in a line along the Y-axis. The number and arrangement of hoops Ft and Fc1 placed on the hoop mounting platform 110 are not limited to this embodiment and can be determined arbitrarily.

[0104] A transport device 120 is provided adjacent to the hoop mounting table 110 on the positive X-axis side. The transport device 120 is configured to move freely along a transport path 121 extending in the Y-axis direction. The transport device 120 also has, for example, two transport arms 122 that hold and transport the tape frame T and the first carrier C1. Each transport arm 122 is configured to move freely in the horizontal direction, vertical direction, around the horizontal axis, and around the vertical axis. The transport device 120 is configured to transport the tape frame T and the first carrier C1 to the hoops Ft and Fc1 of the hoop mounting table 110, the transition device 140 (described later), and the buffer device 141 (described later).

[0105] The processing station 101 is provided with, for example, three processing blocks 102 to 104. The first processing block 102, the second processing block 103, and the third processing block 104 are arranged in this order from the negative X-axis side to the positive X-axis side.

[0106] The first processing block 102 is equipped with a transport device 130, a transition device 140, a buffer device 141, a die modifier 150, a carrier modifier 151, a die washing device 152, a carrier washing device 153, a die hydrophilization device 154, and a carrier hydrophilization device 155. The number and arrangement of these various processing devices are not limited to this embodiment and can be determined arbitrarily.

[0107] The transport device 130 is configured to move freely along a transport path 131 that extends in the X-axis direction. The transport device 130 also has, for example, two transport arms 132 that hold and transport the tape frame T and the first carrier C1. Each transport arm 132 is configured to move freely in the horizontal direction, vertical direction, around the horizontal axis, and around the vertical axis. The transport device 130 is configured to transport the tape frame T and the first carrier C1 to the devices 140, 141, 150-155 of the first processing block 102, as well as to the transition device 170 and buffer device 171, which will be described later.

[0108] The transition device 140 and the buffer device 141 are positioned on the negative X-axis side of the transport device 130. The transition device 140 and the buffer device 141 are stacked vertically from the top in this order. Note that multiple buffer devices 141 may be stacked.

[0109] The transition device 140 transfers the tape frame T and the first carrier C1 between the transport device 120 and the transport device 130. The buffer device 141 temporarily stores the tape frame T and the first carrier C1.

[0110] The die modifier 150 and the carrier modifier 151 are positioned on the positive Y-axis side of the conveying device 130. The die modifier 150 and the carrier modifier 151 are arranged in this order from the negative X-axis side to the positive X-axis side.

[0111] The die cleaning device 152, the carrier cleaning device 153, the die hydrophilization device 154, and the carrier hydrophilization device 155 are arranged on the negative Y-axis side of the conveying device 130. The die cleaning device 152 and the carrier cleaning device 153, and the die hydrophilization device 154 and the carrier hydrophilization device 155 are stacked vertically from top to bottom in this order. The die cleaning device 152 and the carrier cleaning device 153 are arranged in this order from the negative X-axis side to the positive X-axis side. The die hydrophilization device 154 and the carrier hydrophilization device 155 are arranged in this order from the negative X-axis side to the positive X-axis side.

[0112] The die modification apparatus 150 performs St109 to modify the surface Da of the die D. The die modification apparatus 150 performs plasma treatment, for example, under a reduced pressure atmosphere. A known die modification apparatus is used for the die modification apparatus 150.

[0113] The carrier modification apparatus 151 performs St112 to modify the surface C1a of the first carrier C1. The carrier modification apparatus 151 performs plasma treatment, for example, under a reduced pressure atmosphere. A known carrier modification apparatus is used for the carrier modification apparatus 151.

[0114] The die cleaning apparatus 152 performs St108 and cleans the surface Da of the die D, for example, with a cleaning solution. A known die cleaning apparatus is used for the die cleaning apparatus 152.

[0115] The carrier cleaning device 153 performs St111 and cleans the surface C1a of the first carrier C1, for example, with a cleaning solution. A known carrier cleaning device is used for the carrier cleaning device 153.

[0116] The die hydrophilization device 154 performs St110, for example, by using pure water to attach hydroxyl groups (silanol groups) to the surface Da of the die D, thereby hydrophilizing the surface Da. The surface Da is also rinsed with the same pure water. A known die hydrophilization device is used for the die hydrophilization device 154.

[0117] The carrier hydrophilization device 155 performs St113, for example, by using pure water to attach hydroxyl groups (silanol groups) to the surface C1a of the first carrier C1, thereby hydrophilizing the surface C1a. The surface C1a is also rinsed with the same pure water. A known carrier hydrophilization device is used for the carrier hydrophilization device 155.

[0118] The second processing block 103 is equipped with a transport device 160, a transition device 170, a buffer device 171, and a joining device 180. The number and arrangement of these various processing devices are not limited to this embodiment and can be determined arbitrarily.

[0119] The conveying device 160 is configured to move freely along a conveying path 161 that extends in the X-axis direction. The conveying device 160 also has, for example, two conveying arms 162 that hold and convey the tape frame T and the first carrier C1. Each conveying arm 162 is configured to move freely in the horizontal direction, the vertical direction, around the horizontal axis, and around the vertical axis. The conveying device 160 is configured to convey the tape frame T and the first carrier C1 to each of the devices 170, 171, and 180 of the second processing block 103.

[0120] The transition device 170 and the buffer device 171 are positioned on the negative X-axis side of the transport device 160. The transition device 170 and the buffer device 171 are stacked vertically from the top in this order. Note that multiple buffer devices 171 may be stacked.

[0121] The transition device 170 transfers the tape frame T and the first carrier C1 between the transport device 130 and the transport device 160. The buffer device 171 temporarily stores the tape frame T and the first carrier C1.

[0122] Two joining devices 180 are arranged in the positive Y-axis direction of the conveying device 160, and two are arranged in the negative Y-axis direction of the conveying device 160.

[0123] The bonding device 180, acting as the third bonding device, performs St114 to bond the die D and the first carrier C1. The bonding device 180 detaches the die D, which is held in the tape frame T, from the tape frame T and picks it up. Furthermore, the device layer EA on the surface Da of the picked-up die D and the bonding layer Q1 on the surface C1a of the first carrier are superimposed, and the die D and the first carrier C1 are fusion bonded by pressing the die D. A known bonding device is used for the bonding device 180.

[0124] The third processing block 104 is equipped with a transport device 190, a transition device 200, a buffer device 201, a grinding device 210, a gap fill device 211, and a film deposition device 212. The number and arrangement of these various processing devices are not limited to this embodiment and can be determined arbitrarily.

[0125] The conveying device 190 is configured to move freely along a conveying path 191 that extends in the X-axis direction. The conveying device 190 also has, for example, two conveying arms 192 that hold and convey the first carrier C1. Each conveying arm 192 is configured to move freely in the horizontal direction, vertical direction, around the horizontal axis, and around the vertical axis. The conveying device 190 is configured to convey the first carrier C1 to each of the devices 200, 201, 210-212 of the third processing block 104.

[0126] The transition device 200 and the buffer device 201 are positioned on the negative X-axis side of the transport device 190. The transition device 200 and the buffer device 201 are stacked vertically from the top in this order. Multiple buffer devices 201 may be stacked.

[0127] The transition device 200 transfers the first carrier C1 between the transport device 160 and the transport device 190. The buffer device 201 temporarily stores the first carrier C1.

[0128] Two grinding devices 210 are positioned in the positive Y-axis direction of the conveying device 190. The gap filling device 211 and the film deposition device 212 are positioned in the negative Y-axis direction of the conveying device 160. The gap filling device 211 and the film deposition device 212 are arranged in this order from the negative X-axis side to the positive X-axis side.

[0129] The first grinding device 210 performs St115 to grind the back surfaces Db of the multiple dies D. The second grinding device 210 performs St117 to grind the insulating layer G formed on the back surfaces Db of the multiple dies D. In the grinding device 210, the back surfaces Db of the multiple dies D are ground by lowering the grinding wheel while rotating the first carrier C1 and the grinding wheel, with a portion of the arc of the grinding wheel (not shown) in contact with the back surfaces Db of the multiple dies D. A known grinding device is used for the grinding device 210.

[0130] The gap-fill apparatus 211 performs St116 to gap-fill multiple dies D and form an insulating layer G. The method for forming the insulating layer G in the gap-fill apparatus 211 is arbitrary, but for example, the insulating layer G may be formed by performing CVD using plasma in a reduced pressure atmosphere, or the insulating layer G may be formed by applying an insulating material by spin coating. A known gap-fill apparatus is used for the gap-fill apparatus 211.

[0131] The film deposition apparatus 212 performs St118 to form device layers EB on the back surfaces Db of multiple dies D. The film deposition apparatus 212 also forms a bonding layer B1 on the surface of the first device layer EB1. The film deposition method for each layer in the film deposition apparatus 212 is arbitrary, but for example, CVD is performed using plasma in a reduced pressure atmosphere. A known film deposition apparatus is used for the film deposition apparatus 90.

[0132] The third processing system 30 has a configuration in which an input / output station 220 and a processing station 221 are connected as an integrated unit. At the input / output station 220, hoops Fc1 and Fc2, each capable of accommodating multiple first carriers C1 and multiple second carriers C2 respectively, are input and output to and from the outside. The processing station 221 is equipped with various processing devices for realizing a series of processes described later.

[0133] A hoop mounting platform 230 is provided at the loading / unloading station 220. In the illustrated example, multiple hoops, for example, two Fc1 and two Fc2, are placed on the hoop mounting platform 230 in a line along the Y-axis. The number and arrangement of hoops Fc1 and Fc2 placed on the hoop mounting platform 230 are not limited to this embodiment and can be determined arbitrarily.

[0134] A transport device 240 is provided adjacent to the hoop mounting table 230 on the positive X-axis side. The transport device 240 is configured to move freely on a transport path 241 extending in the Y-axis direction. The transport device 240 also has, for example, two transport arms 242 that hold and transport the first carrier C1 and the second carrier C2. Each transport arm 242 is configured to move freely in the horizontal direction, vertical direction, around the horizontal axis, and around the vertical axis. The transport device 240 is configured to transport the first carrier C1 and the second carrier C2 to the hoops Fc1 and Fc2 of the hoop mounting table 230, the transition device 260 (described later), and the buffer device 261 (described later).

[0135] The processing station 221 is provided with, for example, three processing blocks 222 to 224. The first processing block 222, the second processing block 223, and the third processing block 224 are arranged in this order from the negative X-axis side to the positive X-axis side.

[0136] The first processing block 222 is equipped with a transport device 250, a transition device 260, a buffer device 261, a reconfigured wafer modification device 270, a carrier modification device 271, a reconfigured wafer cleaning device 272, a carrier cleaning device 273, a reconfigured wafer hydrophilization device 274, and a carrier hydrophilization device 275. The number and arrangement of these various processing devices are not limited to this embodiment and can be determined arbitrarily.

[0137] The conveying device 250 is configured to move freely along a conveying path 251 that extends in the X-axis direction. The conveying device 250 also has, for example, two conveying arms 252 that hold and convey the first carrier C1 and the second carrier C2. Each conveying arm 252 is configured to move freely in the horizontal direction, vertical direction, around the horizontal axis, and around the vertical axis. The conveying device 250 is configured to convey the first carrier C1 and the second carrier C2 to the devices 260, 261, 270-275 of the first processing block 222, as well as to the transition device 290 and buffer device 291, which will be described later.

[0138] The transition device 260 and buffer device 261 are positioned on the negative X-axis side of the transport device 250. The transition device 260 and buffer device 261 are stacked vertically from the top in this order. Multiple buffer devices 261 may be stacked.

[0139] The transition device 260 transfers the first carrier C1 and the second carrier C2 between the transport device 240 and the transport device 250. The buffer device 261 temporarily stores the first carrier C1 and the second carrier C2.

[0140] The reconfiguration wafer modification apparatus 270 and the carrier modification apparatus 271 are positioned on the positive Y-axis side of the transport apparatus 250. The reconfiguration wafer modification apparatus 270 and the carrier modification apparatus 271 are arranged in this order from the negative X-axis side to the positive X-axis side.

[0141] The reconfiguration wafer cleaning device 272, the carrier cleaning device 273, the reconfiguration wafer hydrophilization device 274, and the carrier hydrophilization device 275 are arranged on the negative Y-axis side of the transport device 250. The reconfiguration wafer cleaning device 272 and the carrier cleaning device 273, and the reconfiguration wafer hydrophilization device 274 and the carrier hydrophilization device 275 are stacked vertically from top to bottom in this order. The reconfiguration wafer cleaning device 272 and the carrier cleaning device 273 are arranged in this order from the negative X-axis side to the positive X-axis side. The reconfiguration wafer hydrophilization device 274 and the carrier hydrophilization device 275 are arranged in this order from the negative X-axis side to the positive X-axis side.

[0142] The reconfigured wafer modification apparatus 270 performs St202, St211, and St214 to modify the back surface Rb and front surface Ra of the reconfigured wafer R. The reconfigured wafer modification apparatus 270 performs plasma processing, for example, under a reduced pressure atmosphere. A known reconfigured wafer modification apparatus is used for the reconfigured wafer modification apparatus 270.

[0143] The carrier modification apparatus 271 performs St205 to modify the surface C2a of the second carrier C2. The carrier modification apparatus 271 performs plasma treatment, for example, under a reduced pressure atmosphere. A known carrier modification apparatus is used for the carrier modification apparatus 271.

[0144] The reconfiguration wafer cleaning apparatus 272 performs St201, St210, and St213, for example, cleaning the back surface Rb and front surface Ra of the reconfiguration wafer R with a cleaning solution. A known reconfiguration wafer cleaning apparatus is used for the reconfiguration wafer cleaning apparatus 272.

[0145] The carrier cleaning device 273 performs St204, for example, cleaning the surface C2a of the second carrier C2 with a cleaning solution. A known carrier cleaning device is used for the carrier cleaning device 273.

[0146] The reconstructed wafer hydrophilization apparatus 274 performs St203, St212, and St215, for example, by using pure water to attach hydroxyl groups (silanol groups) to the back surface Rb and front surface Ra of the reconstructed wafer R, thereby hydrophilizing the back surface Rb and front surface Ra. The back surface Rb and front surface Ra are also rinsed with the same pure water. A known reconstructed wafer hydrophilization apparatus is used for the reconstructed wafer hydrophilization apparatus 274.

[0147] The carrier hydrophilization device 275 performs St206, for example, by using pure water to attach hydroxyl groups (silanol groups) to the surface C2a of the second carrier C2, thereby hydrophilizing the surface C2a. The surface C2a is also rinsed with the same pure water. A known carrier hydrophilization device is used for the carrier hydrophilization device 275.

[0148] The second processing block 223 is equipped with a transport device 280, a transition device 290, a buffer device 291, a bonding device 300, a peeling device 301, and a polishing device 302. The number and arrangement of these various processing devices are not limited to this embodiment and can be determined arbitrarily.

[0149] The conveying device 280 is configured to move freely along a conveying path 281 that extends in the X-axis direction. The conveying device 280 also has, for example, two conveying arms 282 that hold and convey the first carrier C1 and the second carrier C2. Each conveying arm 282 is configured to move freely in the horizontal direction, the vertical direction, around the horizontal axis, and around the vertical axis. The conveying device 280 is configured to convey the first carrier C1 and the second carrier C2 to each of the devices 290, 291, 300-302 of the second processing block 223.

[0150] The transition device 290 and the buffer device 291 are positioned on the negative X-axis side of the transport device 280. The transition device 290 and the buffer device 291 are stacked vertically from the top in this order. Multiple buffer devices 291 may be stacked.

[0151] The transition device 290 transfers the first carrier C1 and the second carrier C2 between the transport device 250 and the transport device 280. The buffer device 291 temporarily stores the first carrier C1 and the second carrier C2.

[0152] Two joining devices 300 are arranged in the positive Y-axis direction of the conveying device 280. The peeling device 301 and polishing device 302 are arranged in the negative Y-axis direction of the conveying device 280. The peeling device 301 and polishing device 302 are arranged in this order from the negative X-axis side to the positive X-axis side.

[0153] The bonding apparatus 300, acting as the second bonding apparatus, performs St207 to bond the reconstructed wafer R1 and the second carrier C2. The bonding apparatus 300 fusion bonds the bonding layer B1 on the back surface R1b of the reconstructed wafer R1 and the bonding layer Q2 on the front surface C2a of the second carrier C2. A known bonding apparatus is used for the bonding apparatus 300.

[0154] The second peeling apparatus, peeling apparatus 301, performs St208 to peel the first carrier C1 from the reconstructed wafer R1. The peeling apparatus 301 includes, for example, a laser irradiation module (not shown) and a separation module (not shown). The laser irradiation module irradiates the laser absorption layer P1 of the first carrier C1 with laser light to reduce the bonding force at the interface between the base layer and the laser absorption layer P1 of the first carrier C1. The separation module peels the first carrier C1 from the reconstructed wafer R1, starting from the interface between the base layer and the laser absorption layer P1 of the first carrier C1. A known peeling apparatus is used for the peeling apparatus 301.

[0155] The polishing apparatus 302 performs St209 to polish and remove the laser absorption layer P1 and bonding layer Q1 remaining on the surface R1a of the reconstructed wafer R1. A known polishing apparatus is used for the polishing apparatus 302.

[0156] The third processing block 224 is equipped with a transport device 310, a transition device 320, a buffer device 321, a bonding device 330, a peeling device 331, and a polishing device 332. The number and arrangement of these various processing devices are not limited to this embodiment and can be determined arbitrarily.

[0157] The conveying device 310 is configured to move freely along a conveying path 311 that extends in the X-axis direction. The conveying device 310 also has, for example, two conveying arms 312 that hold and convey the first carrier C1 and the second carrier C2. Each conveying arm 312 is configured to move freely in the horizontal direction, the vertical direction, around the horizontal axis, and around the vertical axis. The conveying device 310 is configured to convey the first carrier C1 and the second carrier C2 to each of the devices 320, 321, 330-332 of the third processing block 224.

[0158] The transition device 320 and the buffer device 321 are positioned on the negative X-axis side of the transport device 310. The transition device 320 and the buffer device 321 are stacked vertically from the top in this order. Multiple buffer devices 321 may be stacked.

[0159] The transition device 320 transfers the first carrier C1 and the second carrier C2 between the transport device 280 and the transport device 310. The buffer device 321 temporarily stores the first carrier C1 and the second carrier C2.

[0160] Two bonding devices 330 are arranged in the positive Y-axis direction of the conveying device 310. The peeling device 331 and polishing device 332 are arranged in the negative Y-axis direction of the conveying device 310. The peeling device 331 and polishing device 332 are arranged in this order from the negative X-axis side to the positive X-axis side.

[0161] The bonding apparatus 330, acting as the first bonding apparatus, performs St216 to bond the reconstructed wafer R2 (Rn) and the reconstructed wafer R1 (Rn-1). The bonding apparatus 330 hybrid bonds the device layer EB2 of the reconstructed wafer R2 and the device layer EA1 of the reconstructed wafer R1. A known bonding apparatus is used for the bonding apparatus 330.

[0162] The first peeling apparatus, the peeling apparatus 331, performs St217 to peel off the first carrier C1 from the reconstructed wafer R2 (Rn). The peeling apparatus 331 includes, for example, a laser irradiation module (not shown) and a separation module (not shown). The laser irradiation module irradiates the laser absorption layer P1 of the first carrier C1 with laser light to reduce the bonding force at the interface between the base layer and the laser absorption layer P1 of the first carrier C1. The separation module peels off the first carrier C1 from the reconstructed wafer R2, starting from the interface between the base layer and the laser absorption layer P1 of the first carrier C1. A known peeling apparatus is used for the peeling apparatus 331.

[0163] The polishing apparatus 332 performs St218 to polish and remove the laser absorption layer P1 and bonding layer Q1 remaining on the surface R2a (Rna) of the reconstructed wafer R2 (Rn). A known polishing apparatus is used for the polishing apparatus 332.

[0164] Each of the above-described processing systems 1 (first processing system 10, second processing system 20, and third processing system 30) is provided with at least one control device 400. The control device 400 processes computer-executable instructions that cause the processing system 1 to perform the various processes described herein. The control device 400 may be configured to control each element of the processing system 1 to perform the various processes described herein. In one embodiment, some or all of the control device 400 may be included in the processing system 1. The control device 400 may include a processing unit, a storage unit, and a communication interface. The control device 400 is implemented, for example, by a computer. The processing unit may be configured to read a program from the storage unit that provides logic or routines that enable various control operations, and to perform various control operations by executing the read program. This program may be stored in the storage unit in advance, or it may be retrieved via a medium when needed. The retrieved program is stored in the storage unit and read from the storage unit and executed by the processing unit. The medium may be various storage media read by a computer, or it may be a communication line connected to a communication interface. The storage medium may be temporary or non-temporary. The processing unit may be a CPU (Central Processing Unit) and may consist of one or more circuits. The storage unit may include RAM (Random Access Memory), ROM (Read Only Memory), HDD (Hard Disk Drive), SSD (Solid State Drive), or a combination thereof. The communication interface may communicate with the processing system 1 via a communication line such as a LAN (Local Area Network).

[0165] According to the processing system 1 of this embodiment, the series of processes described above (St101 to St118 and St201 to St218) can be performed. As a result, the effects of the above embodiment can be enjoyed.

[0166] The embodiments disclosed herein should be considered in all respects as illustrative and not restrictive. The embodiments described above may be omitted, replaced, or modified in various ways without departing from the scope and spirit of the appended claims. For example, the constituent elements of the embodiments described above can be combined in any way. Such any combination will naturally yield the functions and effects of each constituent element in the combination, as well as other functions and effects that will be apparent to those skilled in the art from the description herein.

[0167] Furthermore, the effects described herein are merely descriptive or illustrative and not limiting. In other words, the technology relating to this disclosure may produce other effects that will be apparent to those skilled in the art from the description herein, in addition to or in lieu of the effects described herein.

[0168] 1 Processing System 10 First Processing System 20 Second Processing System 30 Third Processing System C1 First Carrier D Die R Reconstructed Wafer

Claims

1. A processing method comprising: preparing a reconstructed substrate in which the multiple dies are integrally molded with the surfaces of the multiple dies and a first carrier bonded together; and stacking the multiple reconstructed substrates.

2. The processing method according to claim 1, wherein stacking a plurality of the reconstructed substrates includes joining the surface of the nth layer (where n is an integer) of the reconstructed substrate to the back surface of the (n+1)th layer of the reconstructed substrate, and peeling the first carrier from the (n+1)th layer of the reconstructed substrate.

3. The processing method according to claim 2, wherein the surface of the nth layer of the reconstructed substrate and the back surface of the (n+1)th layer of the reconstructed substrate are hybrid bonded.

4. The processing method according to claim 2 or 3, wherein the surface of the (n+1) layer of the reconstructed substrate and the first carrier are fusion-bonded, and the interface between the (n+1) layer of the reconstructed substrate and the first carrier is irradiated with laser light to peel off the first carrier from the (n+1) layer of the reconstructed substrate.

5. The processing method according to claim 1 or 2, wherein stacking a plurality of the reconstructed substrates includes bonding the back surface of the first layer of the reconstructed substrate to the second carrier, and peeling the first carrier from the first layer of the reconstructed substrate.

6. The processing method according to claim 5, wherein the surface of the first layer of the reconstructed substrate and the first carrier are fusion-bonded, and the interface between the first layer of the reconstructed substrate and the first carrier is irradiated with laser light to peel off the first carrier from the first layer of the reconstructed substrate.

7. The processing method according to claim 1 or 2, wherein preparing the reconfigured substrate includes inspecting a plurality of dies to determine good dies and defective dies, and joining the surface of the good dies to the first carrier.

8. The processing method according to claim 1 or 2, wherein preparing the reconfigured substrate includes: dicing the substrate into a plurality of dies; bonding the surfaces of the plurality of dies to the first carrier; grinding the back surfaces of the plurality of dies; forming insulating layers between adjacent dies and on the back surfaces of the plurality of dies; grinding the insulating layers formed on the back surfaces of the plurality of dies; and forming a device layer on which wiring is formed on the back surfaces of the plurality of dies.

9. The processing method according to claim 8, wherein the back surface of the die is ground to form through wiring in the die.

10. The processing method according to claim 8, wherein when preparing the first layer of the reconfigured substrate, a bonding layer to be bonded to a second carrier is formed on the device layer formed on the back surface of a plurality of dies.

11. A processing system comprising: a preparation system for preparing a reconstructed substrate in which the multiple dies are integrally molded with the surfaces of the multiple dies and a first carrier bonded together; and a lamination system for stacking the multiple reconstructed substrates.

12. The processing system according to claim 11, wherein the lamination system comprises a first bonding device for bonding the surface of the nth layer (where n is an integer) of the reconstructed substrate to the back surface of the (n+1)th layer of the reconstructed substrate, and a first peeling device for peeling the first carrier from the (n+1)th layer of the reconstructed substrate.

13. The processing system according to claim 12, wherein the first bonding apparatus hybrid bonds the surface of the n-th layer of the reconstructed substrate and the back surface of the (n+1)-th layer of the reconstructed substrate.

14. The processing system according to claim 12 or 13, wherein the surface of the (n+1) layer of the reconstructed substrate and the first carrier are fusion-bonded, and the first peeling device irradiates the interface between the (n+1) layer of the reconstructed substrate and the first carrier with laser light to peel the first carrier from the (n+1) layer of the reconstructed substrate.

15. The processing system according to claim 11 or 12, wherein the lamination system comprises a second bonding device for bonding the back surface of the first layer of the reconstructed substrate to the second carrier, and a second peeling device for peeling the first carrier from the first layer of the reconstructed substrate.

16. The processing system according to claim 15, wherein the surface of the first layer of the reconstructed substrate and the first carrier are fusion-bonded, and the second peeling device irradiates the interface between the first layer of the reconstructed substrate and the first carrier with laser light to peel the first carrier from the first layer of the reconstructed substrate.

17. The processing system according to claim 11 or 12, wherein the preparation system comprises an inspection device for inspecting a plurality of dies and determining good dies and defective dies, and a third bonding device for bonding the surface of the good dies to the first carrier.

18. The processing system according to claim 11 or 12, wherein the preparation system comprises: a dicing device for dicing a substrate into a plurality of dies; a third bonding device for bonding the surfaces of the plurality of dies to the first carrier; a first grinding device for grinding the back surfaces of the plurality of dies; a backfill device for forming insulating layers in the gaps between adjacent dies and on the back surfaces of the plurality of dies; a second grinding device for grinding the insulating layers formed on the back surfaces of the plurality of dies; and a film deposition device for forming a device layer on which wiring is formed on the back surfaces of the plurality of dies.

19. The processing system according to claim 18, wherein the second grinding apparatus grinds the back surface of the die to form through wiring in the die.

20. The processing system according to claim 18, wherein, when preparing the first layer of the reconstructed substrate, the film deposition apparatus forms a bonding layer to be bonded to a second carrier on the device layer formed on the back surface of the plurality of dies.

Images