Metal sheet material, layered body, insulated circuit board, and method for manufacturing metal sheet material

Abstract

A metal sheet material comprises a sheet body (31) and a surface treatment layer (35) formed on the outermost surface layer of the sheet body. In a luminance image of the surface of the surface treatment layer (35) measured by a laser microscope within a field of view of 128 μm × 128 μm, the non-uniformity ratio, which is defined as the ratio of the total sum of areas of regions detected with a lower limit Threshold of 125 and a detection lower limit area of 300 pixels2 to the area of the entire field of view, is less than 5.5%, and the development interface area ratio Sdr of the surface of the surface treatment layer is within the range of 50-65%.

Description

Metal sheet material, laminate, insulating circuit board, and method for manufacturing metal sheet material

[0001] This invention relates to a metal sheet, a laminate, an insulating circuit board, and a method for manufacturing a metal sheet. This application claims priority based on Japanese Patent Application No. 2025-037743, filed in Japan on March 10, 2025, and Japanese Patent Application No. 2026-035404, filed in Japan on March 5, 2026, the contents of which are incorporated herein by reference.

[0002] Power modules, LED modules, and thermoelectric modules are equipped with an insulated circuit board. The insulated circuit board has an insulating layer, and a circuit layer made of a conductive material is formed on one side of the insulating layer. Insulating resin has been proposed as the material for the insulating layer, and copper has been proposed as the conductive material for forming the circuit layer. When using an insulated circuit board, there is a risk of delamination between the insulating layer (resin) and the circuit layer (copper), so copper with excellent adhesion to the resin is required.

[0003] One method for increasing the bonding strength between resin and copper is to form a surface treatment layer with irregularities on the copper surface using electroplating. For example, Patent Document 1 proposes a technique for forming a surface treatment layer with a roughened shape that can achieve both improved adhesion to resin and reduced transmission loss in printed circuit board applications. Patent Document 2 proposes a roughened shape that optimizes adhesion and peelability with mold resin when applied to lead frame materials. Furthermore, Patent Document 3 describes the use of a surface treatment layer with irregularities as a technique for bonding insulating resin and a metal layer in an insulating circuit board.

[0004] Japanese Patent No. 7114499 (B) Japanese Patent No. 7032239 (B) Japanese Patent No. 7260059 (B)

[0005] Incidentally, with the recent miniaturization, high integration, and increased power output of electrical and electronic equipment, the aforementioned insulating circuit boards are being used under harsh conditions, and there is a greater demand than ever for superior adhesion. In this regard, for example, the copper material described in Patent Documents 1-3 has a roughened surface, but this roughened surface has not been sufficiently considered, and there was a risk that it would not be possible to achieve sufficient adhesion and insulation between the resin material and the copper material.

[0006] This invention has been made in view of the circumstances described above, and aims to provide a metal plate material, a laminate, an insulating circuit board, and a method for manufacturing a metal plate material that have excellent bonding strength with laminated resin members.

[0007] In order to solve the aforementioned problems, the inventors conducted diligent research and obtained the following findings. When the roughness of the surface roughened shape with irregularities formed on the surface of the metal plate is high, if the fluidity of the resin material is low, the resin may not flow sufficiently into the irregularities, and voids may be formed at the bonding interface between the resin member and the metal plate, potentially failing to ensure sufficient insulation. On the other hand, when the roughness of the roughened shape is low, the influence of the crystalline structure of the substrate is greatly affected in the roughened shape formed, resulting in areas where irregularities are not sufficiently formed, potentially leading to a non-uniform shape. If a non-uniform shape occurs, problems such as partial peeling and a decrease in dielectric strength may occur. Therefore, in order to achieve both insulation and adhesion, it is necessary to optimize the surface roughness of the metal plate and to make the roughened shape uniform.

[0008] The present invention is based on the above-mentioned findings, and a metal plate material according to a first aspect of the present invention comprises a plate body and a surface treatment layer formed on the outermost layer of the plate body, wherein in a brightness image of a field of view of 128 μm × 128 μm measured by laser microscope of the surface of the surface treatment layer, the lower limit Threhold is 125 and the detection lower limit area is 300 pixels. ２ The non-uniformity rate, defined as the ratio of the sum of the areas of the regions detected as such to the total area of ​​the field of view, is less than 5.5%, and the unfolded interface area ratio Sdr of the surface of the surface treatment layer is within the range of 50% to 65%.

[0009] According to the metal plate of the first aspect of the present invention, the developed interfacial area ratio Sdr of the surface of the surface treatment layer is within the range of 50% or more and 65% or less. Therefore, unevenness is formed with appropriate roughness on the surface treatment layer, and when joined to a resin member, the resin sufficiently flows into the interior of the unevenness formed on the surface treatment layer, whereby generation of voids at the joining interface between the resin member and the metal plate can be suppressed. Therefore, sufficient insulation properties can be secured when joined to the resin member. Further, sufficient adhesion to the resin member can be secured by the anchor effect from the unevenness of the surface treatment layer.

[0010] In a luminance image within a visual field of 128 μm × 128 μm, the lower threshold is set to 125, and the detection lower limit area is set to 300 pixel ２ , the non-uniformity rate defined as the ratio of the total sum of areas of regions detected as described above to the area of the entire visual field is less than 5.5%. Therefore, unevenness is relatively uniformly formed on the surface treatment layer, whereby occurrence of partial peeling and deterioration of insulation properties can be suppressed.

[0011] The metal plate of the second aspect of the present invention is characterized in that, in the metal plate of the first aspect of the present invention, the plate body is formed of copper or a copper alloy. According to the metal plate of the second aspect of the present invention, since the plate body is formed of copper or a copper alloy, it is excellent in electrical conductivity and thermal conductivity.

[0012] The laminate of the third aspect of the present invention is a laminate in which a resin member is laminated on a plate surface of the metal plate according to the first or second aspect of the present invention, and is characterized in that, at the joining interface between the resin member and the metal plate, the resin member is engaged with the unevenness formed in the surface treatment layer of the metal plate.

[0013] According to the laminate of the third aspect of the present invention, a resin member is laminated on the plate surface of the metal plate on which the surface treatment layer is formed, and the resin member is engaged with the unevenness formed in the surface treatment layer of the metal plate, whereby the adhesion between the resin member and the metal plate can be improved.

[0014] The insulated circuit board according to the fourth aspect of the present invention is an insulated circuit board comprising an insulating resin layer and a circuit layer formed on one surface of the insulating resin layer, wherein the circuit layer is formed by joining the metal plate material according to the first aspect or the second aspect of the present invention to one surface of the insulating resin layer, and at the joining interface between the insulating resin layer and the circuit layer, the insulating resin layer is engaged with the concavities and convexities formed in the surface treatment layer of the metal plate material.

[0015] According to the insulated circuit board of the fourth aspect of the present invention, the circuit layer is formed by joining the metal plate material having the surface treatment layer formed thereon to one surface of the insulating resin layer, and since the insulating resin layer is engaged with the concavities and convexities formed in the surface treatment layer of the metal plate material, the adhesion between the circuit layer and the insulating resin layer can be improved.

[0016] A method for producing a metal plate material according to the fifth aspect of the present invention is a method for producing the metal plate material according to aspect 1 of the present invention, comprising a surface treatment step of forming the surface treatment layer by performing electroplating on the surface of the plate body by Periodic Reverse electrolysis, wherein current pulse conditions in the Periodic Reverse electrolysis satisfy each of the following formulas: 7ms≦T Ｆｗ +T Ｒｅｖ ≦15ms 2.5≦T Ｆｗ / T Ｒｅｖ ≦4.0 8.0 ASD≦I≦20.0 ASD where T Ｆｗ is the reduction current application time in each pulse, T Ｒｅｖ is the oxidation current application time, I is the current density. ASD is the unit of current density, which means A / dm ２ .

[0017] According to the method for producing a metal plate material of the fifth aspect of the present invention, the method comprises a surface treatment step of forming the surface treatment layer by performing electroplating on the surface of the plate body by Periodic Reverse electrolysis, and since the current pulse conditions in Periodic Reverse electrolysis satisfy each of the above formulas, appropriate concavities and convexities can be formed on the surface of the plate body, making it possible to produce a metal plate material having the aforementioned developed interface area ratio Sdr and non-uniformity ratio.

[0018] According to the present invention, it is possible to provide a metal plate material that exhibits excellent adhesion to laminated resin members, a laminate in which the metal plate material and the resin members are laminated, an insulating circuit board, and a method for manufacturing the metal plate material.

[0019] This is a schematic diagram of an insulating circuit board (laminated) equipped with a metal plate material according to an embodiment of the present invention. This is an explanatory diagram of the metal plate material according to an embodiment of the present invention, and is an observation photograph of the surface treatment layer. This is an explanatory diagram of the metal plate material according to an embodiment of the present invention, and is an observation photograph of the cross-section. This is an explanatory diagram of the non-uniformity rate in the surface treatment layer of the metal plate material. (a) is a non-uniformity rate of 18.2%, and (b) is a non-uniformity rate of 1.0%. This is a flowchart explaining the manufacturing method of the metal plate material and insulating circuit board (laminated) according to an embodiment of the present invention. This is a schematic diagram of the manufacturing method of the insulating circuit board (laminated) shown in Figure 4. This is a schematic diagram of electroplating by Periodic Reverse electrolysis performed in the surface treatment process, and is a graph showing the relationship between current and film formation time. This is a schematic diagram of electroplating by Periodic Reverse electrolysis performed in the surface treatment process, and is a schematic diagram of the surface shape change during dissolution (current and time). This is a schematic diagram illustrating electroplating by Periodic Reverse electrolysis performed in the surface treatment process, and is a schematic diagram of the surface shape change during deposition (current and time). This is a surface observation photograph of the surface treatment layer of a metal plate (thickness 0.5 mm) in the example, and is the surface observation photograph of Test No. 1. This is a surface observation photograph of the surface treatment layer of a metal plate (thickness 0.5 mm) in the example, and is the surface observation photograph of Test No. 2. This is a surface observation photograph of the surface treatment layer of a metal plate (thickness 0.5 mm) in the example, and is the surface observation photograph of Test No. 3. This is a surface observation photograph of the surface treatment layer of a metal plate (thickness 0.5 mm) in the example, and is the surface observation photograph of Test No. 4. This is a surface observation photograph of the surface treatment layer of a metal plate (thickness 0.5 mm) in the example, and is the surface observation photograph of Test No. 5. This is a surface observation photograph of the surface treatment layer of a metal plate (thickness 0.5 mm) in the example, and is the surface observation photograph of Test No. 6. This is a surface observation photograph of the surface treatment layer of a metal plate (plate thickness 0.5 mm) in the example, and is a surface observation photograph of test No. 7. This is a schematic diagram of the test apparatus used to evaluate the insulating properties in the example. This is a schematic diagram of the test piece used to evaluate the shear strength in the example.

[0020] The following describes embodiments of the present invention, including a metal plate, a laminate, and an insulating circuit board, with reference to the attached drawings. As shown in Figure 1, the laminate according to this embodiment is an insulating circuit board 10 formed by joining an insulating resin layer 12, which is a resin member, with a metal plate 30 (circuit layer 13) and a metal plate 30 (metal substrate 11) according to this embodiment. Figure 1 shows an insulating circuit board 10 according to an embodiment of the present invention and a power module 1 using this insulating circuit board 10.

[0021] The power module 1 shown in Figure 1 comprises an insulating circuit board 10 and a semiconductor element 3 bonded to one side of the insulating circuit board 10 (the top surface in Figure 1) via a first solder layer 2.

[0022] The semiconductor element 3 is made of a semiconductor material such as Si. The first solder layer 2 that joins the insulating circuit board 10 and the semiconductor element 3 is made of, for example, a Sn-Ag, Sn-Cu, Sn-In, or Sn-Ag-Cu solder material (so-called lead-free solder material).

[0023] As shown in Figure 1, the insulating circuit board 10 of this embodiment comprises a metal substrate 11, an insulating resin layer 12 formed on one surface of the metal substrate 11 (the upper surface in Figure 1), and a circuit layer 13 formed on one surface of the insulating resin layer 12 (the upper surface in Figure 1).

[0024] The insulating resin layer 12 prevents electrical connection between the circuit layer 13 and the metal substrate 11, and is made of an insulating thermosetting resin. In this embodiment, a thermosetting resin containing a filler may be used to ensure the strength and thermal conductivity of the insulating resin layer 12. Here, as the filler, insulating fillers such as alumina, boron nitride, and aluminum nitride can be used. As the thermosetting resin, epoxy resin, polyimide resin, etc. can be used. In this embodiment shown in Figure 1, the insulating resin layer 12 is made of epoxy resin without a filler. In other embodiments, it is made of epoxy resin containing boron nitride as a filler. The thickness of the insulating resin layer 12 is within the range of 20 μm to 250 μm.

[0025] The metal substrate 11 improves heat dissipation characteristics by spreading the heat generated in the semiconductor element 3 mounted on the insulating circuit board 10 in the planar direction. For this reason, the metal substrate 11 is made of a metal with excellent thermal conductivity, and in this embodiment, it is made of copper or a copper alloy. The thickness of the metal substrate 11 is set within the range of 0.5 mm to 3 mm.

[0026] In this circuit layer 13, one side (the top surface in Figure 1) serves as the mounting surface for the semiconductor element 3, and a circuit pattern for conducting electricity to the semiconductor element 3 is formed thereon. For this reason, the circuit layer 13 is made of a metal with excellent electrical conductivity, and in this embodiment, it is made of copper or a copper alloy. In this embodiment, the thickness of the circuit layer 13 is preferably in the range of 0.005 mm to 10 mm, more preferably in the range of 0.01 mm to 5 mm, even more preferably in the range of 0.1 mm to 4 mm, and even more preferably in the range of 0.3 mm to 3 mm.

[0027] As shown in Figure 5, the metal substrate 11 and circuit layer 13 described above are formed by joining the metal plate material 30 (metal plate material 51, 53) of this embodiment with the insulating resin layer 12. Now, the metal plate material 30 of this embodiment that forms the metal substrate 11 and circuit layer 13 will be described.

[0028] In this embodiment, the metal plate material 30 comprises a plate body 31 and a surface treatment layer 35 formed on the outermost surface of the plate body 31, as shown in Figures 2A and 2B. In Figure 2B, the white parts are copper and the gray parts are resin. As shown in Figure 2B, fine irregularities are formed on the surface treatment layer 35. These irregularities are formed by electroplating the surface of the plate body 31 by periodic reverse electrolysis, as will be described later.

[0029] In this surface treatment layer 35, in the brightness image of the surface measured by laser microscope in a field of view of 128 μm × 128 μm, the lower limit Threshhold is 125 and the detection lower limit area is 300 pixels. ２ The heterogeneity rate, defined as the ratio of the sum of the areas of the regions detected as such to the total area of ​​the field of view, is considered to be less than 5.5%.

[0030] Here, if there are areas on the surface of the surface treatment layer 35 where no irregularities are formed, these areas will appear as dark areas in the brightness image. By binarizing the brightness image, the areas where no irregularities are formed can be identified. Therefore, by defining the ratio of the sum of the areas where no irregularities are formed to the total area of ​​the field of view as the non-uniformity rate, the state of irregularity formation on the surface treatment layer 35 can be understood.

[0031] If the non-uniformity rate of the surface treatment layer 35 described above exceeds 5.5%, the in-plane distribution of areas with high and low roughness becomes large, resulting in the formation of unevenness. This may lead to localized delamination or insulation failure. For this reason, in this embodiment, the non-uniformity rate of the surface treatment layer 35 of the metal plate material 30 is set to less than 5.5%. Preferably, the non-uniformity rate of the surface treatment layer 35 of the metal plate material 30 is 3.0% or less, and more preferably 1.5% or less. Furthermore, there is no particular lower limit to the non-uniformity rate of the surface treatment layer 35 of the metal plate material 30, and it is preferably 0%, but it is substantially 0.1% or more.

[0032] Furthermore, the unfolded interface area ratio Sdr of the surface of the surface treatment layer 35 is set to be within the range of 50% to 65%. The unfolded interface area ratio Sdr, a parameter indicating surface roughness, is an index representing the rate of increase in surface area. It can be calculated from the surface area A1 of the contour curved surface including surface irregularities and the area A0 when that surface is projected onto the XY plane using the following formula: Sdr = ((A1 / A0) - 1) × 100 (%)

[0033] Here, if the unfolded interface area ratio Sdr of the surface treatment layer 35 is less than 50%, the anchoring effect at the bonding interface with the insulating resin layer 12 will be insufficient, and adhesion with the insulating resin layer 12 may not be ensured. On the other hand, if the unfolded interface area ratio Sdr of the surface treatment layer 35 exceeds 65%, the resin will not flow sufficiently into the interior of the irregularities, voids will be formed at the bonding interface, and sufficient insulation may not be ensured.

[0034] Therefore, in this embodiment, the unfolded interface area ratio Sdr of the surface of the surface treatment layer 35 is set within the range of 50% to 65%. Preferably, the unfolded interface area ratio Sdr of the surface of the surface treatment layer 35 is 52% or more, and more preferably 55% or more. Furthermore, preferably, the unfolded interface area ratio Sdr of the surface of the surface treatment layer 35 is 63% or less, and more preferably 60% or less.

[0035] Furthermore, in the metal plate material 30 of this embodiment, as described above, high thermal conductivity and electrical conductivity are required for the metal substrate 11 and the circuit layer 13, so it is preferable that they be made of copper or a copper alloy which has particularly excellent thermal conductivity and electrical conductivity. In addition, in the metal plate material 30 made of copper or a copper alloy, a good uneven surface can be formed by electroplating using the Periodic Reverse electrolysis method described later.

[0036] Next, the manufacturing method of the metal plate material 30 and the manufacturing method of the insulating circuit board 10 according to this embodiment will be described with reference to Figures 4 to 6C.

[0037] (Surface treatment process S01) First, a metal plate material 30 which will become the metal substrate 11 and the circuit layer 13 is manufactured. In this embodiment, a plate body 31 made of copper or a copper alloy is prepared, and a surface treatment layer 35 is formed on the surface of this plate body 31 by electroplating using periodic reverse electrolysis. As shown in Figures 6A, 6B, and 6C, an uneven shape is formed on the surface of the plate body 31 by repeatedly carrying out deposition by reduction reaction and dissolution by oxidation reaction.

[0038] In this embodiment, as shown in Figures 6A, 6B, and 6C, the current pulse conditions in Periodic Reverse electrolysis are defined as the reduction current application time in each pulse being T Ｆｗ , the oxidation current application time T Ｒｅｖ The current density is set to I such that the following equations are satisfied: 7ms ≤ T Ｆｗ +T Ｒｅｖ ≤15ms 2.5 ≤T Ｆｗ / T Ｒｅｖ ≦4.0 8.0ASD≦I≦20.0ASD

[0039] Here, pulse time (T) Ｆｗ +T Ｒｅｖ If the pulse time (T) is less than 7 ms, sufficient time for precipitation is not available, and precipitation may occur only in areas prone to nucleation, potentially leading to uneven formation. Ｆｗ +T ＲｅｖIf the pulse time exceeds 15 ms, the growth time of individual nuclei will be long, leading to excessive grain growth and potentially resulting in excessively coarse grains. For this reason, in this embodiment, the pulse time (T Ｆｗ +T Ｒｅｖ The pulse duration (T) is set to a range of 7 ms to 15 ms. Ｆｗ +T Ｒｅｖ The pulse time (T) is preferably 8 ms or longer, and more preferably 10 ms or longer. Ｆｗ +T Ｒｅｖ The time interval is preferably 14 ms or less, and more preferably 13 ms or less.

[0040] Also, the duty cycle (T Ｆｗ / T Ｒｅｖ If the duty cycle (T) is less than 2.5, the precipitated metal (Cu) may dissolve again, and it may not be possible to form sufficient irregularities. On the other hand, if the duty cycle (T) is less than 2.5, the precipitated metal (Cu) may dissolve again, and it may not be possible to form sufficient irregularities. Ｆｗ / T Ｒｅｖ If the duty cycle exceeds 4.0, the amount of deposition (nucleation growth) in a single pulse will increase, and the formation of irregularities may become uneven. For this reason, in this embodiment, the duty cycle (T Ｆｗ / T Ｒｅｖ The duty cycle (T) is set within the range of 2.5 to 4.0. Ｆｗ / T Ｒｅｖ The duty cycle (T) is preferably 2.8 or higher, and more preferably 3 or higher. Ｆｗ / T Ｒｅｖ ) is preferably 3.8 or less, and more preferably 3.5 or less.

[0041] Also, the duty cycle (T Ｆｗ / T Ｒｅｖ ) is within the range of 2.5 to 3.0, pulse time (T Ｆｗ +T Ｒｅｖ It is preferable that the duty cycle (T) be in the range of 7 ms to 10 ms, Ｆｗ / T Ｒｅｖ ) is within the range of 3.0 to 4.0, pulse time (T Ｆｗ +T Ｒｅｖ It is preferable that the time interval be within the range of 10 ms to 15 ms.

[0042] Furthermore, if the current density I is less than 8.0 ASD, the amount of deposition per pulse may be small, and it may not be possible to form uniform irregularities. On the other hand, if the current density I exceeds 20.0 ASD, the supply of metal ions (Cu ions) may not keep up with the plating reaction, which may cause appearance defects such as burning. For this reason, in this embodiment, the current density I is set within the range of 8.0 ASD to 20.0 ASD. It is preferable that the current density I be 9 ASD or higher, and more preferably 10 ASD or higher. On the other hand, it is preferable that the current density I be 18 ASD or lower, and more preferably 16 ASD or lower.

[0043] Furthermore, the duration of the Periodic Reverse electrolysis is preferably 60 seconds or more, and more preferably 75 seconds or more. On the other hand, the duration of the Periodic Reverse electrolysis is preferably 150 seconds or less, and more preferably 120 seconds or less.

[0044] In this embodiment, it is preferable to use an electrolyte solution consisting of an aqueous solution of a copper sulfate bath mainly composed of copper sulfate (CuSO4) and sulfuric acid (H2SO4), to which 3,3'-dithiobis(1-propanesulfonic acid) disodium has been added. Furthermore, it is preferable that the temperature of the plating bath be in the range of, for example, 25°C to 35°C.

[0045] Furthermore, DC electroplating may be performed before electroplating in Periodic Reverse electroplating. In DC electroplating, a reduction current is applied to the Cu plate at a constant current density. Preferably, the current is between 1 ASD and 20 ASD, and the time is between 10 s and 120 s. By performing DC electroplating, even if the crystal grains on the surface of the Cu plate are coarse, it becomes possible to stably form irregularities through subsequent Periodic Reverse electroplating.

[0046] As described above, the metal plate material 30 of this embodiment is manufactured by a surface treatment step S01 in which electroplating is performed on the surface of the plate body 31 by periodic reverse electrolysis.

[0047] (Lamination process S02) Next, a resin composition 22 containing boron nitride as a filler, epoxy resin as a thermosetting resin, and a curing agent is placed on one side (the top surface in Figure 5) of the metal plate material 30 (51) which will become the metal substrate 11. In this embodiment, the resin composition 22 is formed in sheet form. A metal plate material 30 (53) which will become the circuit layer 13 is placed on one side (the top surface in Figure 5) of the resin composition 22. The resin composition 22 is laminated on the surface of the metal plate material 30 (51) and the metal plate material 30 (53) on which the surface treatment layer 35 is formed.

[0048] (Thermocompression bonding process S03) Next, the laminated metal plate material 30 (51), resin composition 22, and metal plate material 30 (53) are pressed and heated in the lamination direction to cure the resin composition 22 and form an insulating resin layer 12, and the metal plate material 30 (51) which will become the metal substrate 11 is joined to the insulating resin layer 12, and the insulating resin layer 12 is joined to the metal plate material 30 (53) which will become the circuit layer 13. The conditions for this thermocompression bonding process S03 are preferably a heating temperature in the range of 150°C to 400°C, a holding time at the heating temperature in the range of 15 minutes to 90 minutes, and a pressing pressure in the lamination direction in the range of 1 MPa to 100 MPa.

[0049] (Circuit pattern formation process S04) Next, the metal plate material 30 (53) bonded to the insulating resin layer 12 is subjected to an etching process to form a circuit pattern and constitute the circuit layer 13.

[0050] As described above, the insulating circuit board 10 (laminated structure) according to this embodiment is manufactured.

[0051] With the metal plate material 30 configured as described above according to this embodiment, the unfolded interface area ratio Sdr of the surface of the surface treatment layer 35 is within the range of 50% to 65%, so that irregularities with an appropriate roughness are formed on the surface treatment layer 35, and when it is joined to the insulating resin layer 12, the resin flows sufficiently into the irregularities formed on the surface treatment layer 35, thereby suppressing the formation of voids at the bonding interface between the insulating resin layer 12 and the metal plate material 30 (circuit layer 13 and metal substrate 11). Therefore, sufficient insulation can be ensured when it is joined to the insulating resin layer 12. In addition, sufficient adhesion with the insulating resin layer 12 can be ensured by the anchoring effect of the irregularities on the surface treatment layer 35.

[0052] Furthermore, according to the metal plate material 30 of this embodiment, for the surface of the surface treatment layer 35, in the brightness image in a field of view of 128 μm × 128 μm, the lower limit Threshold is 125 and the detection lower limit area is 300 pixels. ２ Since the non-uniformity rate, defined as the ratio of the sum of the areas of the regions detected as such to the total area of ​​the field of view, is set to less than 5.5%, the surface treatment layer 35 has relatively uniformly formed irregularities, which can suppress the occurrence of partial peeling and a decrease in insulation performance.

[0053] In the metal plate material 30 according to this embodiment, when the plate body 31 is made of copper or a copper alloy, it has excellent electrical and thermal conductivity and is particularly suitable as the metal substrate 11 and circuit layer 13 of the insulating circuit board 10. Furthermore, by performing electroplating by periodic reverse electrolysis, a good uneven surface can be formed on the surface of the plate body 31.

[0054] According to the insulating circuit board 10 (laminated structure) of this embodiment, the metal substrate 11 and circuit layer 13 are formed by bonding the metal plate material 30 to the insulating resin layer 12, and since the insulating resin layer 12 engages with the irregularities formed on the surface treatment layer 35 of the metal plate material 30, the adhesion between the metal substrate 11 and circuit layer 13 and the insulating resin layer 12 can be improved.

[0055] The manufacturing method for the metal plate material according to this embodiment includes a surface treatment step S01 in which a surface treatment layer 35 is formed on the surface of the plate body 31 by electroplating using periodic reverse electrolysis, and the current pulse conditions in periodic reverse electrolysis are set to pulse time (T Ｆｗ +T Ｒｅｖ ) within the range of 7 ms to 15 ms, Duty cycle (T Ｆｗ / T Ｒｅｖ Since the ratio is set to a range of 2.5 to 4.0 and the current density I to a range of 8.0 ASD to 20.0 ASD, appropriate irregularities can be formed on the surface of the plate body 31, and a metal plate material 30 having the above-mentioned developed interface area ratio Sdr and non-uniformity ratio can be manufactured.

[0056] Although embodiments of the present invention have been described above, the present invention is not limited thereto and can be modified as appropriate without departing from the technical spirit of the invention. In this embodiment, the invention was described as forming an insulating circuit board as shown in Figure 1, but it is not limited thereto, and there are no particular limitations on the application as long as it is a metal plate material that is joined to a resin member. Furthermore, in this embodiment, the invention was described as configuring a power module by mounting semiconductor elements on an insulating circuit board, but it is not limited thereto. For example, an LED module may be configured by mounting LED elements on the circuit layer of an insulating circuit board, or a thermoelectric module may be configured by mounting thermoelectric elements on the circuit layer of an insulating circuit board.

[0057] The results of the verification experiments conducted to confirm the effects of the present invention are described below.

[0058] Rolled oxygen-free copper plates (140 mm x 140 mm x 2 mm or 0.5 mm thick) were prepared. The 0.5 mm thick rolled plates constituted the metal layer on top of the joint and were etched to form the circuit layer. The electrode area to be immersed in the electrolyte was defined as 110 mm x 110 mm using masking tape, with the top of the tape designated as the electrode conductivity area. The electrolyte consisted of an aqueous solution of copper sulfate bath mainly composed of copper sulfate (CuSO4) and sulfuric acid (H2SO4), to which disodium 3,3'-dithiobis(1-propanesulfonic acid) was added. The volume of the solution was 1.75 L. The temperature of the plating bath was set to 30°C.

[0059] First, DC electroplating was performed on the surface of the rolled sheet (sheet body). In this example, electroplating was performed at 3 ASD for 30 seconds. Next, electroplating was performed by periodic reverse electroplating to form a surface treatment layer. At this time, the positive and negative currents were set to 15 ASD or 7.5 ASD, according to the conditions shown in the table. The periodic reverse electroplating time was set to 90 seconds. A metal sheet material was manufactured using the above method.

[0060] The surface development interface area ratio (Sdr) and non-uniformity ratio of the surface treatment layer of the obtained metal plate material were evaluated using a laser microscope as follows. The evaluation results are shown in Table 1. The surface observation results using a laser microscope are shown in Figures 7A to 7G.

[0061] The surface of the surface-treated layer was observed using a laser microscope (Olympus, OLS-5100). The observation conditions were as follows: • Image acquisition: 3D data acquisition • Objective lens: 100x (MPLAPON 100x EXT) • Zoom: 1x • Image acquisition mode: Standard (pitch 60.00 μm, step 3) • Brightness: Auto-adjusted • Sample reflection characteristics: Standard • Laser HDR: Off • Z-skip auto-detection: Enabled • Measurement noise detection level: Weak • Optical noise reduction: Enabled

[0062] The obtained images were processed to remove noise and sample tilt (projection method), and the unfolded interface area ratio Sdr was calculated. For Sdr calculation, no filters were used for F calculation, S filter, or L filter.

[0063] Furthermore, brightness data (observation field 128 μm × 128 μm, pixel count 1024 pixels × 1024 pixels) is output from the observation data, and the 8-bit grayscale brightness image is imported into image processing software (Image-J ver1.54g). The image processing function within Image-J is then used to calculate the area of ​​the non-uniform region (300 pixels) according to the following procedure. ２ The following was calculated: (1) Binarization was performed on the luminance image, setting the threshold lower limit of the luminance histogram to 125 and the upper limit to 255. At this time, Black Background was turned OFF from the Binary Option menu. (2) The minimum value of the detection area in the Analyze Particle function was set to 300 pixels. ２ The sum of the areas of the detected regions (non-uniform regions) was calculated. In this case, Exclude on Edge was set to Off (image edges are also included in the evaluation), and Include holes was set to ON (regions containing holes are also included). (3) The sum of these areas was calculated using the total number of pixels (1024 × 1024 = 1,048,576 pixels). ２ The non-uniformity rate was calculated by dividing by ( ).

[0064] Next, an insulating circuit board was formed by joining a metal plate material with a surface treatment layer formed on it as described above to an insulating resin member by thermocompression bonding. The circuit layer was made of a 0.5 mm thick metal plate material, and the metal substrate was made of a 2 mm thick metal plate material. In this embodiment, an epoxy resin containing boron nitride was used as the insulating resin layer. The thickness of the insulating resin layer was 150 μm.

[0065] A sheet of resin composition (containing filler and thermosetting resin) was placed on the surface of a metal plate (2 mm thick) with a surface treatment layer formed on it. Furthermore, a metal plate (0.5 mm thick) with a surface treatment layer was placed on top of this. This was then pressed and heated in the lamination direction to form a bond between the metal plate and the insulating resin layer. In this example, the heating temperature for thermocompression bonding was 180°C, the holding time was 60 minutes, and the pressurizing pressure was 10 MPa. An etching process was performed on the 0.5 mm thick metal plate of the bonded material to form a circuit pattern, thereby manufacturing an insulating circuit board.

[0066] The dielectric breakdown characteristics and shear strength of the obtained insulating circuit boards were evaluated as follows. The evaluation results are shown in Table 1.

[0067] (Dielectric Breakdown Voltage) As shown in Figure 8, a partial discharge tester D910 manufactured by Mitsubishi Cable Corporation was used to evaluate partial discharge by placing an insulated circuit board on a base plate and bringing a probe 62 into contact with the circuit layer 13. The evaluation was performed in a 3M Fluorinert™ FC-770 test atmosphere. The measurement was performed by increasing the voltage in 0.5 kV steps (each with a holding time of 30 seconds), and the voltage at which overcurrent was detected was defined as the dielectric breakdown voltage.

[0068] (Shear Strength) The shear strength between the insulating resin layer and the metal substrate (thickness 0.5 mm) was tested using the test specimens shown in Figure 9, in accordance with JIS K 6850:1999, "Adhesives - Test Method for Tensile Shear Bond Strength of Rigid Adheres". The test was performed using an Instron 68TM-50 universal material tester at a tensile speed of 1.0 mm / min.

[0069]

[0070] In Test No. 1, the pulse time (T) in Periodic Reverse electrolysis was Ｆｗ +T Ｒｅｖ The reaction time was set to 28 ms, resulting in a developed interface area ratio (Sdr) of 93.1% for a 0.5 mm thick metal plate and 86.2% for a 2.0 mm thick metal plate. Furthermore, the dielectric breakdown voltage of the insulating circuit board was low at 7.4 kV, indicating poor insulating properties.

[0071] In Test No. 3, the pulse time (T) in Periodic Reverse electrolysis was Ｆｗ +T Ｒｅｖ ) is 28 ms, Duty cycle (T Ｆｗ / T Ｒｅｖ The Sdr ratio was set at 8.3, and the unfolded interface area ratio (Sdr) for a 0.5 mm thick metal plate was 46.8% and the non-uniformity ratio was 18.20%, while the Sdr ratio for a 2.0 mm thick metal plate was 46.5% and the non-uniformity ratio was 11.10%. Furthermore, the shear strength between the 2.0 mm thick metal plate and the insulating resin layer was low at 8.4 MPa, indicating poor adhesion.

[0072] In Test No. 7, the current density I in the Periodic Reverse electrolysis was 7.5 ASD, the non-uniformity of the 0.5 mm thick metal plate was 16.30%, and the non-uniformity of the 2.0 mm thick metal plate was 5.6%. Furthermore, the dielectric breakdown voltage of the insulating circuit board was low at 8.5 kV, indicating poor insulation performance.

[0073] In contrast, in tests No. 2, 4, 5, and 6, the pulse time (T) in periodic reverse electrolysis was Ｆｗ +T Ｒｅｖ ) is within the range of 7 ms to 15 ms, Duty cycle (T Ｆｗ / T Ｒｅｖ The coefficient of variation (ASD) was within the range of 2.5 to 4.0, the current density (I) was within the range of 8.0 ASD to 20.0 ASD, the unfolded interface area ratio (Sdr) of the 0.5 mm thick metal plate and the 2.0 mm thick metal plate was within the range of 50% to 65%, and the non-uniformity of the 0.5 mm thick metal plate and the 2.0 mm thick metal plate was less than 5.5%. Furthermore, the dielectric breakdown voltage of the insulating circuit board was high at 8.8 kV or higher, indicating excellent insulation properties. In addition, the shear strength between the 2.0 mm thick metal plate and the insulating resin layer was 9.3 MPa or higher, indicating excellent adhesion properties.

[0074] From the experimental results described above, it was confirmed that, according to the present invention, it is possible to provide a metal plate material, a laminate, an insulating circuit board, and a method for manufacturing a metal plate material that exhibits excellent bonding strength with laminated resin members.

[0075] This makes it possible to provide a metal plate material with excellent adhesion to laminated resin components, a laminate formed by laminating this metal plate material and resin components, an insulating circuit board, and a method for manufacturing the metal plate material.

[0076] 10 Insulated circuit board (laminated structure) 11 Metal substrate 12 Insulated resin layer (resin component) 13 Circuit layer 30 Metal plate

Claims

1. The device comprises a plate body and a surface treatment layer formed on the outermost layer of the plate body, wherein the surface of the surface treatment layer is measured with a laser microscope, and in the brightness image in a field of view of 128 μm × 128 μm, the lower limit Threhold is 125 and the detection lower limit area is 300 pixels. ２ A metal plate material characterized in that the non-uniformity rate, defined as the ratio of the sum of the areas of the regions detected as such to the total area of ​​the field of view, is less than 5.5%, and the unfolded interface area ratio Sdr of the surface of the surface treatment layer is within the range of 50% to 65%.

2. The metal plate material according to claim 1, characterized in that the plate body is made of copper or a copper alloy.

3. A laminate comprising a resin member laminated on the surface of a metal plate material according to claim 1 or claim 2, wherein at the bonding interface between the resin member and the metal plate material, the resin member engages with the irregularities formed on the surface treatment layer of the metal plate material.

4. An insulating circuit board comprising an insulating resin layer and a circuit layer formed on one surface of the insulating resin layer, wherein the circuit layer is formed by bonding a metal plate material according to claim 1 or claim 2 to one surface of the insulating resin layer, and at the bonding interface between the insulating resin layer and the circuit layer, the insulating resin layer engages with irregularities formed on the surface treatment layer of the metal plate material.

5. A method for manufacturing a metal sheet material according to claim 1 or claim 2, comprising a surface treatment step of forming the surface treatment layer by electroplating the surface of the sheet body by periodic reverse electrolysis, characterized in that the current pulse conditions in the periodic reverse electrolysis satisfy the following equations: 7ms ≤ T Ｆｗ +T Ｒｅｖ ≤15ms 2.5 ≤T Ｆｗ / T Ｒｅｖ ≤4.0 8.0ASD ≤ I ≤ 20.0ASD However, T Ｆｗ T is the reduction current application time in each pulse. Ｒｅｖ is the oxidation current application time, and I is the current density.

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