Data storage method and related apparatus

Abstract

A data storage method and a related apparatus, which are applied to the technical field of computers. The data storage method comprises: sending a first instruction, the first instruction being used for instructing to write first data into a first storage area, the first storage area being any storage area in a first storage queue, and storage areas in the first storage queue being in an active state; and when the first storage area reaches a storage threshold, sending a second instruction, the second instruction being used for instructing to migrate second data in the first storage area to a second storage area in a second storage queue, storage areas in the second storage queue being in an erased state, and the second data comprising the latest written data blocks having different data identifiers in the first storage area, wherein the first storage area and the second storage area are divided and determined on the basis of virtual addresses. The method can increase the utilization rate of rewritable and erasable memories, and improve storage performance.

Description

Data storage methods and related devices Technical Field

[0001] This application relates to the field of computer technology, and in particular to a data storage method and related apparatus. Background Technology

[0002] AUTOSAR (Automotive Open System Architecture) is an alliance dedicated to developing standards for automotive electronic software. AUTOSAR aims to develop an open, standardized software architecture for the automotive industry, facilitating the exchange and updating of vehicle electronic system software and providing a foundation for the efficient management of increasingly complex vehicle electronic and software systems. The AUTOSAR Classic Platform (AUTOSAR CP) is AUTOSAR's standard platform, an embedded real-time electronic control unit (ECU) standard based on open systems and corresponding interfaces for the electronics (OSEK) standards.

[0003] Currently, AUTOSAR CP provides a hierarchical non-volatile memory management approach for managing data stored in writable and erasable memory.

[0004] However, current tiered non-volatile memory management methods have low utilization rates and low storage performance for writable and erasable memory. Summary of the Invention

[0005] This application provides a data storage method and related apparatus that can improve the utilization rate of writable and erasable memory and improve storage performance.

[0006] In a first aspect, embodiments of this application provide a data storage method, which includes: sending a first instruction to instruct first data to be written to a first storage area, wherein the first storage area is any storage area in a first storage queue, and the storage areas in the first storage queue are in an active state; and, when the first storage area reaches a storage threshold, sending a second instruction to instruct second data in the first storage area to be migrated to a second storage area in a second storage queue, wherein the storage area in the second storage queue is in an erased state, and the second data includes the most recently written data block with a different data identifier from the data in the first storage area. The first and second storage areas are determined based on virtual address partitioning.

[0007] This application provides a data storage method. When a first storage area in an active state reaches a storage threshold, it instructs data blocks with different data identifiers from the most recently written data in the first storage area to be migrated to a second storage area in an erased state. Since the first and second storage areas are determined based on virtual address partitioning, and there is a correspondence between the virtual addresses of the first and second storage areas, a dynamic correspondence can exist between the active and erased storage areas. Therefore, when the active storage area reaches its storage threshold, data can be migrated to its corresponding erased storage area, achieving wear leveling among multiple storage areas. This improves the utilization rate of the writable and erasable memory and enhances storage performance.

[0008] Optionally, the storage threshold is not a fixed value and can be adjusted according to different storage scenarios; this application embodiment does not impose any restrictions on this. For example, the first storage area reaching the storage threshold may refer to the situation where the first storage area is full.

[0009] Optionally, the virtual address of a storage area can be understood as a virtual partition number (bankID) corresponding to that storage area, bound to its actual physical address. Optionally, there is a correspondence between the virtual addresses of the first and second storage areas, which can be understood as a correspondence between the actual physical addresses of the first and second storage areas. Optionally, there is a dynamic correspondence between storage areas in an active state and storage areas in an erased state, which can be understood as a dynamic correspondence between the actual physical addresses of storage areas in an active state and storage areas in an erased state.

[0010] Optionally, the storage area is in an active state, which can be understood as the storage area being available to store data to be written.

[0011] Optionally, the storage area is in an erased state, which can be understood as the data in the storage area being erased, and can be used to receive data to be migrated after the storage area in the active state reaches the storage threshold.

[0012] In one possible implementation, the number of times the second storage area is erased corresponds to the number of times the first storage area is erased.

[0013] In this embodiment, the virtual addresses of the first storage area and the second storage area have a corresponding relationship, and the number of erases of the second storage area corresponds to the number of erases of the first storage area. Therefore, there can be a dynamic correspondence between the number of erases of the active storage area and the number of erases of the storage area in the erase state. Thus, when the active storage area reaches the storage threshold, the data can be migrated to the storage area in the erase state corresponding to its erase count, thereby achieving the equalization of the number of erases (i.e., wear leveling) among multiple storage areas and ensuring the equalization of the remaining lifetime of multiple storage areas. This can improve the utilization rate of the writable and erasable memory and improve storage performance.

[0014] In one possible implementation, the above data storage method further includes, but is not limited to, the following steps: determining the correspondence between the second storage area in the second storage queue and the first storage area based on the number of times the storage area has been erased.

[0015] In this embodiment, based on the number of erases in the storage area and the correspondence of the virtual addresses of each storage area, the second storage area can be determined to correspond to the first storage area. Thus, when the first storage area reaches the storage threshold, the data can be migrated to the corresponding second storage area, thereby achieving wear leveling among multiple storage areas. This can improve the utilization rate of the writable and erasable memory and improve storage performance.

[0016] In one possible implementation, the above data storage method further includes, but is not limited to, the following steps: after migrating the second data to the second storage area, sending a third instruction to instruct the second storage area to be set to an active state, the second storage area being contained in the first storage queue.

[0017] In this embodiment, after data migration is completed, the second storage area is set to an active state, allowing it to be used to store subsequent data to be written. At this time, the second storage area is included in the first storage queue, which allows for wear leveling between the active storage area in the first storage queue and the erased storage area in the second storage queue, improving the utilization rate of the writable and erasable memory.

[0018] In one possible implementation, the above data storage method further includes, but is not limited to, the following steps: after migrating the second data to the second storage area, sending a fourth instruction, the fourth instruction being used to instruct the data in the first storage area to be erased and the first storage area to be set to an erased state, the first storage area being contained in the second storage queue.

[0019] In this embodiment, after data migration is completed, instructing the erasure of data in the first storage area and setting the first storage area to an erased state allows the first storage area to receive data to be migrated after the active storage area reaches its storage threshold. At this time, the first storage area is included in the second storage queue, which can achieve wear leveling between the active storage areas in the first storage queue and the erased storage areas in the second storage queue, thereby improving the utilization rate of the writable and erasable memory.

[0020] In one possible implementation, the storage areas in the first storage queue are sorted in ascending order of the number of erases, and the storage areas in the second storage queue are sorted in ascending order of the remaining number of erases; or, the storage areas in the first storage queue are sorted in ascending order of the remaining number of erases, and the storage areas in the second storage queue are sorted in ascending order of the number of erases.

[0021] In this embodiment, by sorting the storage areas in the first storage queue and the second storage queue according to the number of erases, the number of erases in the storage areas of the first storage queue corresponds to the number of erases in the storage areas of the second storage queue. Thus, when the storage area in the active state reaches the storage threshold, the data can be migrated to the storage area in the erase state corresponding to its erase count. This achieves wear leveling (i.e., wear leveling) among multiple storage areas, ensuring that the remaining lifespan of multiple storage areas is balanced. This can improve the utilization rate of the writable and erasable memory and improve storage performance.

[0022] In one possible implementation, the storage area in the first storage queue corresponds to the storage area in the second storage queue, and the number of times the storage area in the first storage queue is erased is positively correlated with the remaining number of times the storage area in the corresponding second storage queue is erased.

[0023] In this embodiment, the number of erases in the storage area of ​​the first storage queue is positively correlated with the remaining number of erases in the corresponding storage area of ​​the second storage queue. This can be understood as the more erases a storage area in the first storage queue has, the more remaining erases a storage area in the corresponding second storage queue will have, i.e., fewer erases. Through this embodiment, when a storage area with a shorter remaining lifetime that is in an active state reaches a storage threshold, data can be migrated to a storage area with a longer remaining lifetime that is in an erased state. This achieves a balance in the number of erases (i.e., wear leveling) among multiple storage areas, ensuring a balance in the remaining lifetime of multiple storage areas, thereby improving the utilization rate of the writable and erasable memory and enhancing storage performance.

[0024] In one possible implementation, the first storage area includes at least one of the following information: the cumulative number of erases in the first storage area, the data type stored in the first storage area, the size of the first storage area, the state of the first storage area, the storage area identifier before data migration, the storage area identifier after data migration, the remaining number of erases before data migration, the remaining number of erases after data migration, and the remaining number of erases in the storage area adjacent to the physical address of the first storage area.

[0025] In one possible implementation, the second storage area includes at least one of the following information: the remaining number of erases in the second storage area, the data type stored in the second storage area, the size of the second storage area, the state of the second storage area, the storage area identifier before data migration, the storage area identifier after data migration, and the remaining number of erases in the storage area adjacent to the physical address of the second storage area.

[0026] In one possible implementation, the above data storage method further includes, but is not limited to, the following steps: obtaining the erase count of a third storage area physically adjacent to the first storage area. If the difference between the erase count of the first storage area and the erase count of the third storage area is greater than a first threshold, a fifth instruction is sent, which instructs the data in the first storage area to be migrated to a second storage area, or the data in the third storage area to be migrated to a fourth storage area, wherein the erase count of the fourth storage area corresponds to the erase count of the third storage area.

[0027] In this embodiment, when the difference between the number of erases of two adjacent storage areas is large, the data in either storage area can be actively migrated to the storage area corresponding to its erase count, thereby achieving wear leveling among multiple storage areas and ensuring that the remaining lifetime of multiple storage areas is balanced. This can improve the utilization rate of the writable and erasable memory and improve storage performance.

[0028] In one possible implementation, the above data storage method further includes, but is not limited to, the following steps: when data migration in the first storage area begins, a sixth instruction is sent to instruct the data in the first storage area to be set to a migration in progress state. If the data migration in the first storage area is not complete and there is an abnormal power-down and power-on, based on the migration in progress state, a seventh instruction is sent to instruct the data in the second storage area to be erased and the data in the first storage area to be migrated to the second storage area again.

[0029] In this embodiment, if an abnormal power failure occurs when data migration begins, the data will be re-migrated upon power-up. However, the storage area receiving the migrated data is no longer clean at this time, and data loss may occur during the re-migration. Through this embodiment, the storage area receiving the migrated data can be erased before re-migrating the data, thereby ensuring that historically written data is not lost after a reset and that the management mechanism for multiple storage areas can still operate normally.

[0030] In one possible implementation, the above data storage method further includes, but is not limited to, the following steps: When the data migration in the first storage area is completed and the second storage area is set to an active state, an eighth instruction is sent, which instructs the data in the first storage area to be set to a migration-completed state. In the event of an abnormal power outage and subsequent power-on during the process of setting the second storage area to an active state, a ninth instruction is sent based on the migration-completed state, which instructs the second storage area to be set to an active state again.

[0031] In this embodiment, if an abnormal power outage occurs after data migration is complete and the second storage area is set to active state, the storage area receiving the migrated data may fail to activate upon power-up. This could prevent the storage area from being placed in the first storage queue, leading to an error in the correspondence between storage areas in the first and second storage queues, thus affecting subsequent normal storage operation. Through this embodiment, the migration completion status can be marked after data migration, allowing the second storage area to be reactivated based on this migration completion status in the event of an abnormal power outage and subsequent power-up. This ensures that the management mechanism for multiple storage areas can still operate normally.

[0032] In one possible implementation, the above data storage method further includes, but is not limited to, the following steps: in the event of an abnormal power outage and power-on during the process of erasing data in the first storage area, sending a tenth instruction, which is used to instruct the data in the first storage area to be erased again, reading the remaining erase count of the first storage area from the storage area adjacent to the physical address of the first storage area, writing the remaining erase count of the first storage area into the first storage area, and setting the first storage area to an erased state.

[0033] In this embodiment, if an abnormal power-down occurs during the erasure of data in the first storage area, and the data in the first storage area is not successfully erased after power-on, it may cause the storage area to fail to be successfully reclaimed to the second storage queue. This could lead to an error in the correspondence between storage areas in the first and second storage queues, affecting subsequent normal storage operation and resulting in the loss of the remaining lifespan of the first storage area. However, through this embodiment, the data in the first storage area can be erased again, and the first storage area can be set to an erased state. This ensures that the management mechanism for multiple storage areas can still operate normally, improving the utilization rate of the writable and erasable memory and enhancing storage performance.

[0034] In one possible implementation, the above data storage method further includes, but is not limited to, the following steps: in the event of an abnormal power outage and power-on during the process of setting the first storage area to an erase state, an eleventh instruction is sent, which is used to instruct the data in the first storage area to be erased again, and the remaining erase count of the first storage area is read from the storage area adjacent to the physical address of the first storage area, the remaining erase count of the first storage area is written into the first storage area, and the first storage area is set to an erase state.

[0035] In this embodiment, if an abnormal power-down occurs during the process of erasing the data in the first storage area and setting it to the erase state, the resource reclamation of the first storage area may fail upon power-up. This could result in the storage area not being successfully reclaimed to the second storage queue, leading to an error in the correspondence between storage areas in the first and second storage queues, affecting subsequent normal storage operation, and causing the remaining lifespan of the first storage area to be lost. However, through this embodiment, the data in the first storage area can be erased again, and the first storage area can be set to the erase state, thereby ensuring that the management mechanism for multiple storage areas can still operate normally, improving the utilization rate of the writable and erasable memory, and improving storage performance.

[0036] In one possible implementation, the first and second storage areas are storage areas in the writable and erasable memory on the AUTOSAR CP standard platform for automotive open system architecture.

[0037] In this embodiment, data on the AUTOSAR CP standard platform of the automotive open system architecture can be stored according to the data storage method provided in this application, so as to improve the utilization of the writable and erasable memory and improve storage performance.

[0038] Optionally, the writable and erasable memory includes, but is not limited to, Flash memory, which may also be referred to as flash memory. This application embodiment does not limit this.

[0039] Secondly, embodiments of this application provide a data storage method, which includes: receiving a first instruction to instruct first data to be written to a first storage area, wherein the first storage area is any storage area in a first storage queue, and the storage areas in the first storage queue are in an active state; writing the first data to the first storage area based on the first instruction; and receiving a second instruction when the first storage area reaches a storage threshold, wherein the second instruction instructs second data to be migrated from the first storage area to a second storage area in a second storage queue, wherein the storage areas in the second storage queue are in an erased state, and the second data includes the most recently written data block with a different data identifier from the data in the first storage area; wherein the first storage area and the second storage area are determined based on virtual address partitioning; and migrating the second data from the first storage area to the second storage area in the second storage queue based on the second instruction.

[0040] This application provides a data storage method. When a first storage area in an active state reaches a storage threshold, data blocks with different data identifiers from the most recently written data in the first storage area can be migrated to a second storage area in an erased state. Since the first and second storage areas are determined based on virtual address partitioning, and there is a corresponding relationship between the virtual addresses of the first and second storage areas, a dynamic correspondence can exist between the active and erased storage areas. Therefore, when an active storage area reaches its storage threshold, data can be migrated to its corresponding erased storage area, achieving wear leveling among multiple storage areas. This improves the utilization rate of the writable and erasable memory and enhances storage performance.

[0041] Optionally, the storage threshold is not a fixed value and can be adjusted according to different storage scenarios; this application embodiment does not impose any restrictions on this. For example, the first storage area reaching the storage threshold may refer to the situation where the first storage area is full.

[0042] Optionally, the virtual address of a storage area can be understood as a virtual partition number (bankID) corresponding to that storage area, bound to its actual physical address. Optionally, there is a correspondence between the virtual addresses of the first and second storage areas, which can be understood as a correspondence between the actual physical addresses of the first and second storage areas. Optionally, there is a dynamic correspondence between storage areas in an active state and storage areas in an erased state, which can be understood as a dynamic correspondence between the actual physical addresses of storage areas in an active state and storage areas in an erased state.

[0043] Optionally, the storage area is in an active state, which can be understood as the storage area being available to store data to be written.

[0044] Optionally, the storage area is in an erased state, which can be understood as the data in the storage area being erased, and can be used to receive data to be migrated after the storage area in the active state reaches the storage threshold.

[0045] In one possible implementation, the number of times the second storage area is erased corresponds to the number of times the first storage area is erased.

[0046] In one possible implementation, the above data storage method further includes, but is not limited to, the following steps: after migrating the second data to the second storage area, receiving a third instruction, the third instruction being used to instruct the second storage area to be set to an active state. Based on the third instruction, the second storage area is set to an active state, and the second storage area is included in the first storage queue.

[0047] In one possible implementation, the above data storage method further includes, but is not limited to, the following steps: after migrating the second data to the second storage area, receiving a fourth instruction, the fourth instruction being used to instruct the data in the first storage area to be erased and the first storage area to be set to an erased state. Based on the fourth instruction, the data in the first storage area is erased and the first storage area is set to an erased state, the first storage area being included in the second storage queue.

[0048] In one possible implementation, the storage areas in the first storage queue are sorted in ascending order of the number of erases, and the storage areas in the second storage queue are sorted in ascending order of the remaining number of erases; or, the storage areas in the first storage queue are sorted in ascending order of the remaining number of erases, and the storage areas in the second storage queue are sorted in ascending order of the number of erases.

[0049] In one possible implementation, the storage area in the first storage queue corresponds to the storage area in the second storage queue, and the number of times the storage area in the first storage queue is erased is positively correlated with the remaining number of times the storage area in the corresponding second storage queue is erased.

[0050] In one possible implementation, the first storage area includes at least one of the following information: the cumulative number of erases in the first storage area, the data type stored in the first storage area, the size of the first storage area, the state of the first storage area, the storage area identifier before data migration, the storage area identifier after data migration, the remaining number of erases before data migration, the remaining number of erases after data migration, and the remaining number of erases in the storage area adjacent to the physical address of the first storage area.

[0051] In one possible implementation, the second storage area includes at least one of the following information: the remaining number of erases in the second storage area, the data type stored in the second storage area, the size of the second storage area, the state of the second storage area, the storage area identifier before data migration, the storage area identifier after data migration, and the remaining number of erases in the storage area adjacent to the physical address of the second storage area.

[0052] In one possible implementation, the above data storage method further includes, but is not limited to, the following steps: If the difference between the number of erases in the first storage area and the number of erases in the third storage area is greater than a first threshold, a fifth instruction is received. This fifth instruction instructs that data in the first storage area be migrated to the second storage area, or data in the third storage area be migrated to the fourth storage area, wherein the number of erases in the fourth storage area corresponds to the number of erases in the third storage area, and the physical address of the third storage area is adjacent to the physical address of the first storage area. Based on the fifth instruction, data in the first storage area is migrated to the second storage area, or data in the third storage area is migrated to the fourth storage area.

[0053] In one possible implementation, the above data storage method further includes, but is not limited to, the following steps: When data migration in the first storage area begins, a sixth instruction is received, instructing the data in the first storage area to be set to a migration in progress state. Based on the sixth instruction, the data in the first storage area is set to a migration in progress state. If the data migration in the first storage area is not complete and there is an abnormal power-down and power-on, a seventh instruction is received, instructing the data in the second storage area to be erased and the data in the first storage area to be migrated to the second storage area again. Based on the seventh instruction, the data in the second storage area is erased and the data in the first storage area to be migrated to the second storage area again.

[0054] In one possible implementation, the above data storage method further includes, but is not limited to, the following steps: When the data migration in the first storage area is completed and the second storage area is set to an active state, an eighth instruction is received, which instructs the data in the first storage area to be set to a migration-completed state. Based on the eighth instruction, the data in the first storage area is set to a migration-completed state. If an abnormal power-off and subsequent power-on occurs during the process of setting the second storage area to an active state, a ninth instruction is received, which instructs the second storage area to be set to an active state again. Based on the ninth instruction, the second storage area is set to an active state again.

[0055] In one possible implementation, the above data storage method further includes, but is not limited to, the following steps: In the event of an abnormal power-down and power-on during the erasure of data in the first storage area, receiving a tenth instruction, which instructs the data in the first storage area to be erased again, and reading the remaining erase counts of the first storage area from the storage area adjacent to the physical address of the first storage area, writing the remaining erase counts of the first storage area into the first storage area, and setting the first storage area to an erased state. Based on the tenth instruction, erasing the data in the first storage area again, reading the remaining erase counts of the first storage area from the storage area adjacent to the physical address of the first storage area, writing the remaining erase counts of the first storage area into the first storage area, and setting the first storage area to an erased state.

[0056] In one possible implementation, the above data storage method further includes, but is not limited to, the following steps: In the event of an abnormal power-down and subsequent power-on during the process of setting the first storage area to an erase state, receiving an eleventh instruction, which instructs the data in the first storage area to be erased again, and reading the remaining erase counts of the first storage area from the storage area adjacent to the physical address of the first storage area, writing the remaining erase counts of the first storage area into the first storage area, and setting the first storage area to an erase state. Based on the tenth instruction, erasing the data in the first storage area again, reading the remaining erase counts of the first storage area from the storage area adjacent to the physical address of the first storage area, writing the remaining erase counts of the first storage area into the first storage area, and setting the first storage area to an erase state.

[0057] In one possible implementation, the first and second storage areas are storage areas in the writable and erasable memory on the AUTOSAR CP standard platform for automotive open system architecture.

[0058] The implementation of the methods described in the second aspect and any possible implementation can be referenced to the corresponding implementations in the first aspect.

[0059] For the technical effects of the second aspect and any possible implementation, please refer to the description of the technical effects corresponding to the first aspect and the corresponding implementation.

[0060] Thirdly, embodiments of this application provide a data storage device including units for performing the method as described in any of the first aspects.

[0061] In one possible design, the device includes:

[0062] The communication unit is used to send a first instruction, which instructs to write first data into a first storage area. The first storage area is any storage area in a first storage queue, and the storage areas in the first storage queue are in an active state.

[0063] The communication unit is also configured to send a second instruction when the first storage area reaches a storage threshold. The second instruction is used to instruct the second data in the first storage area to be migrated to the second storage area in the second storage queue. The storage area in the second storage queue is in an erased state. The second data includes the most recently written data block with a different data identifier from the data in the first storage area. The first storage area and the second storage area are determined based on virtual address partitioning.

[0064] In one possible implementation, the device further includes:

[0065] The processing unit is used to generate the first instruction and the second instruction.

[0066] Regarding the processing unit and communication unit described in the third aspect and any possible implementation, the steps performed thereon can be referred to the corresponding implementations in the first aspect.

[0067] For the technical effects of the third aspect and any possible implementation, please refer to the description of the technical effects corresponding to the first aspect and the corresponding implementation.

[0068] Optionally, in the data storage device described in the third aspect above and any possible implementation:

[0069] In one implementation, the data storage device is a data storage apparatus. When the data storage device is a data storage apparatus, the communication unit can be a transceiver or an input / output interface; the processing unit can be at least one processor. Optionally, the transceiver can be a transceiver circuit. Optionally, the input / output interface can be an input / output circuit.

[0070] In another implementation, the data storage device is a chip (system) or circuit used in a data storage device. When the data storage device is a chip (system) or circuit used in a data storage device, the communication unit can be a communication interface (input / output interface), interface circuit, output circuit, input circuit, pin, or related circuit on the chip (system) or circuit; the processing unit can be at least one processor, processing circuit, or logic circuit.

[0071] Fourthly, embodiments of this application provide a data storage device including a unit for performing the method as described in any of the second aspects.

[0072] In one possible design, the device includes:

[0073] The communication unit is used to receive a first instruction, which instructs to write first data into a first storage area. The first storage area is any storage area in a first storage queue, and the storage areas in the first storage queue are in an active state.

[0074] The processing unit is used to write first data into the first storage area based on the first instruction.

[0075] The communication unit is also configured to receive a second instruction when the first storage area reaches a storage threshold. The second instruction is used to instruct the second data in the first storage area to be migrated to the second storage area in the second storage queue. The storage area in the second storage queue is in an erased state. The second data includes the most recently written data block with a different data identifier from the data in the first storage area. The first storage area and the second storage area are determined based on virtual address partitioning.

[0076] The processing unit is also configured to migrate the second data in the first storage area to the second storage area in the second storage queue based on the second instruction.

[0077] Regarding the processing unit and communication unit described in the fourth aspect and any possible implementation, the steps performed thereon can be referred to the corresponding implementation in the second aspect.

[0078] Regarding the technical effects of the fourth aspect and any possible implementation, refer to the description of the technical effects corresponding to the second aspect and the corresponding implementation.

[0079] Optionally, in the data storage device described in the fourth aspect above and in any possible implementation:

[0080] In one implementation, the data storage device is a data storage apparatus. When the data storage device is a data storage apparatus, the communication unit can be a transceiver or an input / output interface; the processing unit can be at least one processor. Optionally, the transceiver can be a transceiver circuit. Optionally, the input / output interface can be an input / output circuit.

[0081] In another implementation, the data storage device is a chip (system) or circuit used in a data storage device. When the data storage device is a chip (system) or circuit used in a data storage device, the communication unit can be a communication interface (input / output interface), interface circuit, output circuit, input circuit, pin, or related circuit on the chip (system) or circuit; the processing unit can be at least one processor, processing circuit, or logic circuit.

[0082] Fifthly, embodiments of this application provide a data storage device including a processor. The processor is coupled to a memory and can be used to execute instructions in the memory to implement the methods of any one of the first to second aspects and any possible implementations described above. Optionally, the data storage device further includes a memory. Optionally, the data storage device further includes a communication interface, and the processor is coupled to the communication interface.

[0083] Sixthly, embodiments of this application provide a chip, including: logic circuitry and a communication interface. The communication interface is used to receive or transmit information; the logic circuitry is used to receive or transmit information through the communication interface, causing the chip to execute the methods of any one of the first to second aspects and any possible implementations described above.

[0084] In a seventh aspect, embodiments of this application provide a computer-readable storage medium for storing a computer program (also referred to as code or instructions); when the computer program is run on a computer, the methods described in any of the first to second aspects and any possible implementations are implemented.

[0085] Eighthly, embodiments of this application provide a computer program product comprising: a computer program (also referred to as code or instructions); and, when the computer program is run, causing a computer to perform the method described in any of the first to second aspects and any possible implementation thereof.

[0086] Ninthly, embodiments of this application provide a data storage system, which includes a first data storage device and a second data storage device. The first data storage device is used to perform the methods described in the first aspect and any of the possible implementations, and the second data storage device is used to perform the methods described in the second aspect and any of the possible implementations.

[0087] Optionally, the data storage system further includes a writable and erasable memory, and a second data storage device is used to perform the methods described in the second aspect and any of the possible implementations on the data in the writable and erasable memory.

[0088] In a tenth aspect, embodiments of this application provide a terminal, which includes at least one data storage device as described in the third aspect, or the fourth aspect, or the fifth aspect, or the sixth aspect, or the ninth aspect.

[0089] Optionally, the terminal can be a means of transportation, such as a car, truck, aircraft, drone, slow transport vehicle, spacecraft, or ship, or any other possible means of transportation used in any possible scenario. This application embodiment does not limit this.

[0090] Optionally, the terminal is used to implement the method described in any one of the first or second aspects and any possible implementation.

[0091] Furthermore, in the process of performing the methods described in any of the first to second aspects and any possible embodiments described above, the processes related to sending and / or receiving information in the above methods can be understood as the process of the processor outputting information, and / or the process of the processor receiving input information. When outputting information, the processor can output the information to a transceiver (or communication interface, or transmitting module) so that the transceiver can transmit it. After the information is output by the processor, it may need to undergo other processing before reaching the transceiver. Similarly, when the processor receives input information, the transceiver (or communication interface, or transmitting module) receives the information and inputs it to the processor. Furthermore, after the transceiver receives the information, the information may need to undergo other processing before being input to the processor.

[0092] Based on the above principles, for example, the information sent mentioned in the aforementioned method can be understood as information output by the processor. Similarly, the information received can be understood as information received by the processor from input.

[0093] Optionally, unless otherwise specified, or unless they contradict their actual function or internal logic in the relevant description, the operations of the processor, such as transmitting, sending, and receiving, can be more generally understood as processor output and receiving, input, and other operations.

[0094] Optionally, in the process of performing the methods described in any of the first to second aspects and any possible embodiments above, the processor may be a processor specifically designed to perform these methods, or it may be a processor that performs these methods by executing computer instructions stored in memory, such as a general-purpose processor. The memory may be a non-transitory memory, such as read-only memory (ROM), which may be integrated with the processor on the same chip or disposed on separate chips. This application does not limit the type of memory or the arrangement of the memory and processor.

[0095] In one possible implementation, at least one of the aforementioned memories is located outside the device.

[0096] In yet another possible implementation, at least one of the aforementioned memories is located within the device.

[0097] In another possible implementation, a portion of the memory of the at least one memory is located inside the device, while another portion is located outside the device.

[0098] In this application, the processor and memory may also be integrated into a single device, that is, the processor and memory can be integrated together. Attached Figure Description

[0099] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments of this application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0100] Figure 1 is a schematic diagram of the architecture of a storage management system provided in an embodiment of this application;

[0101] Figure 2 is a schematic diagram of a data storage process provided in an embodiment of this application;

[0102] Figure 3 is a schematic diagram of a data migration provided in an embodiment of this application;

[0103] Figure 4A is a schematic diagram of a storage partition provided in an embodiment of this application;

[0104] Figure 4B is a schematic diagram of another storage partition provided in an embodiment of this application;

[0105] Figure 5 is a schematic diagram of the architecture of a storage management system provided in an embodiment of this application;

[0106] Figure 6 is a flowchart illustrating a data storage method provided in an embodiment of this application;

[0107] Figure 7 is a flowchart illustrating another data storage method provided in an embodiment of this application;

[0108] Figure 8 is a schematic diagram of the correspondence of storage partitions provided in an embodiment of this application;

[0109] Figure 9 is a flowchart of another data storage method provided in an embodiment of this application;

[0110] Figure 10 is a schematic diagram of data storage provided in an embodiment of this application;

[0111] Figure 11 is a schematic diagram of a data migration state machine provided in an embodiment of this application;

[0112] Figure 12 is a schematic diagram of a data storage device provided in an embodiment of this application;

[0113] Figure 13 is a schematic diagram of the structure of an electronic device provided in an embodiment of this application;

[0114] Figure 14 is a schematic diagram of the structure of a chip provided in an embodiment of this application. Detailed Implementation

[0115] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described below with reference to the accompanying drawings.

[0116] The terms "first" and "second," etc., used in the specification, claims, and drawings of this application are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or apparatuses.

[0117] The term "embodiment" as used herein means that a specific feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will explicitly and implicitly understand that, unless otherwise specified or logically conflicting, the terminology and / or descriptions between the various embodiments of this application are consistent and can be mutually referenced, and technical features in different embodiments can be combined to form new embodiments based on their inherent logical relationships.

[0118] It should be understood that in this application, "at least one (item)" means one or more, "more than one" means two or more, "at least two (items)" means two or three or more, and "and / or" is used to describe the relationship between related objects, indicating that there can be three relationships. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the related objects before and after are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0119] It should be noted that, in this application, "instruction" can include direct instruction, indirect instruction, explicit instruction, and implicit instruction. When describing a certain instruction information to indicate A, it can be understood that the instruction information carries A, directly indicates A, or indirectly indicates A.

[0120] In this application, the information indicated by the instruction information is called the information to be instructed. In specific implementations, there are many ways to indicate the information to be instructed, such as, but not limited to, directly indicating the information to be instructed, such as the information to be instructed itself or its index. It can also indirectly indicate the information to be instructed by indicating other information, where there is a correlation between the other information and the information to be instructed. It can also indicate only a part of the information to be instructed, while the other parts are known or pre-agreed upon. For example, the instruction of specific information can be achieved by using a pre-agreed (e.g., protocol-defined) arrangement of various information, thereby reducing instruction overhead to some extent. The information to be instructed can be sent as a whole or divided into multiple sub-information units, and the sending period and / or timing of these sub-information units can be the same or different. This application does not limit the specific sending method. The sending period and / or timing of these sub-information units can be predefined, for example, according to a protocol, or configured by the transmitting device by sending configuration information to the receiving device.

[0121] It should be noted that in this application, "send" can be understood as "output" and "receive" can be understood as "input". "Send information to A", where "to A" simply indicates the direction of information transmission, and A is the destination, does not limit "send information to A" to a direct transmission over the air interface. "Send information to A" includes sending information directly to A, as well as sending information indirectly to A through a transmitter. Therefore, "send information to A" can also be understood as "outputting information destined for A". Similarly, "receive information from A" indicates that the source of the information is A, including receiving information directly from A, as well as receiving information indirectly from A through a receiver. Therefore, "receive information from A" can also be understood as "inputting information from A".

[0122] To more clearly describe the solution of this application, some terms used in the embodiments of this application will be explained below.

[0123] AUTOmotive Open System Architecture (AUTOSAR) is an alliance dedicated to developing automotive electronic software standards. It's a collaborative development framework for automotive electronic systems, involving global automakers, component suppliers, and various research and service organizations. It establishes an open standard software architecture for automotive electronic control units (ECUs). This architecture covers functions required for building automotive controllers, including real-time scheduling, communication, diagnostics, storage management, functional safety, and information security.

[0124] The Automotive Open System Architecture Classic Platform (AUTOSAR CP) is a solution proposed by AUTOSAR for high real-time and high-security embedded systems. It's an embedded real-time electronic control unit (ECU) standard platform based on open systems and corresponding interfaces for the electronics (OSEK) standards. It is currently widely used in traditional embedded microcontroller units (MCUs). CP provides a hierarchical non-volatile memory management method for managing user data stored in writable and erasable memory.

[0125] Writable and erasable memory: This is a type of storage device that can perform data writing and erasing operations. Common typical memory types include the following: random access memory (RAM), rewritable type of read-only memory (ROM), flash memory, etc.

[0126] A sector is a logical partition of flash memory, which is a combination of several sectors. Users can divide the flash address range into several logical partitions.

[0127] Page: A hardware attribute of Flash memory. Flash writing must be done in page alignment, meaning the smallest unit of Flash writing is a page.

[0128] Sector: A hardware attribute of Flash memory. Flash erasure requires erasing according to sector alignment. A sector contains multiple pages, and the smallest unit of Flash erasure is the sector.

[0129] Block: A block is a data storage unit in the Flash EEPROM Emulation (Fee) module. The Fee module adds a data header and a data tail to the data passed from the Non-Volatile Memory Manager (NVM) module to encapsulate it into a block. The data header contains an ID number and length information.

[0130] Please refer to Figure 1, which is a schematic diagram of the architecture of a storage management system provided in an embodiment of this application.

[0131] Figure 1 shows the architecture of a non-volatile memory management system based on AUTOSAR. This memory management system architecture mainly includes, but is not limited to, the following: application software component (SWC), runtime environment (RTE), memory stack, and hardware Flash. The memory stack includes a non-volatile memory manager (NVRAM Manager, NVM) module, a flash EEPROM emulation (Fee) module, and a flash driver (Fls).

[0132] The AUTOSAR application software initiates data storage requests. The AUTOSAR runtime environment (RTE) passes these requests to the AUTOSAR storage stack, which encapsulates the requested data and writes it to the hardware device's Flash memory. The data to be stored is encapsulated into blocks and stored in one or more Flash pages.

[0133] Optionally, the specific process of AUTOSAR storage stack storing data can be referred to Figure 2, which is a schematic diagram of a data storage process provided by an embodiment of this application.

[0134] As shown in Figure 2, the data storage process includes, but is not limited to, the following steps:

[0135] Step 1: SWC initiates a data storage request.

[0136] Step 2: The NvM module encapsulates the data to be stored into an NvM Block.

[0137] Step 3: The Fee module encapsulates the NvM Block into a Fee Block.

[0138] Step 4: The Fls module stores the Fee Block separately in one or more Flash Pages.

[0139] Understandably, the Fee module in the AUTOSAR storage stack is used to simulate electrically erasable programmable read-only memory (EEPROM), directly determining the storage location of user data. The physical structure of Flash memory cells dictates that Flash needs to be erased before new data can be written. The smallest erase unit of Flash is a sector, and user data is generally smaller than or even much smaller than the sector. Therefore, in-situ erasure and rewriting of data is a significant waste of Flash lifespan.

[0140] Based on this, the Fee specification splits a Flash space into two Banks, as shown in Figure 3, which is a schematic diagram of data migration provided by an embodiment of this application.

[0141] As shown in Figure 3, a Flash memory space is divided into two banks, which can be referred to as Bank0 and Bank1. Each time the upper-layer application writes a block of data to Bank0, if it encounters a block with the same ID, it does not erase the existing block but continues writing, only invalidating the existing one. When Bank0 is full, Bank1 is completely erased, and then the valid blocks in Bank0 are migrated to Bank1. This process is repeated, thus allowing users to repeatedly write data.

[0142] The above implementation of the Fee specification cannot solve the problem of migrating cold and hot data (data is classified as cold and hot based on write frequency; high-frequency data is hot data, and low-frequency data is cold data). Cold data needs to be migrated along with hot data, leading to an increased overall migration time and a shortened Flash lifespan. Furthermore, the migration frequency under this mechanism is determined by the write frequency of hot data; the higher the write frequency of hot data, the higher the migration frequency. Continuously and ineffectively moving cold data results in wasted Flash space.

[0143] To address the issues of Flash memory waste and time consumption caused by the synchronous migration of cold and hot data, a storage scheme that isolates cold and hot data can be adopted, storing cold and hot data in different physical regions, so that the migration of hot data does not affect the migration of cold data.

[0144] Please refer to Figures 4A and 4B, which are schematic diagrams of several storage partitions provided in the embodiments of this application.

[0145] As shown in Figure 4A, a Flash memory is divided into one dynamic area and several static areas.

[0146] The dynamic area stores hot data, and its data migration strategy is consistent with the aforementioned Fee specification. The static area stores cold data, which does not require data migration support; data is written directly after erasing at the original address. Since cold data is written infrequently, the Flash lifespan meets usage requirements. With cold and hot data isolated, migrating hot data does not require migrating cold data, reducing the total amount of data to be migrated, increasing migration speed, and minimizing unnecessary migration of cold data, thus reducing Flash space waste and extending Flash lifespan.

[0147] As shown in Figure 4B, it supports dividing a Flash memory block into several dynamic areas and several static areas.

[0148] The definitions of dynamic and static areas are the same as those in the storage partitions in Figure 4A, and they also improve data migration speed and extend Flash lifespan. Meanwhile, the storage partitions in Figure 4B also support several dynamic areas, making Flash partitioning more flexible. Hot data can be further divided into finer-grained partitions based on write frequency and stored in different dynamic areas.

[0149] While the above storage partitioning strategies can address the migration issues of cold and hot data, the different erase counts for different partitions (static and dynamic partitions) introduce erase interference between partitions. On one hand, data in partitions with low-frequency erases can be affected or even corrupted by partitions with high-frequency erases, leading to user data loss and insufficient storage reliability. On the other hand, the implementation mechanism of static partitions results in low Flash utilization. When the Flash in the dynamic partition reaches its lifespan limit, the Flash in the static partition is far from reaching its limit, meaning the Flash is not being fully utilized. Therefore, the above-mentioned tiered non-volatile memory management method has low utilization of writable and erasable memory, resulting in low storage performance.

[0150] In view of this, embodiments of this application provide a storage management system, and based on the storage management system, provide a new data storage method and related apparatus, relating to the field of computer technology, which can improve the utilization rate of writable and erasable memory and improve storage performance.

[0151] The storage management system and data storage method provided in this application will be described in detail below with reference to the accompanying drawings.

[0152] Please refer to Figure 5, which is a schematic diagram of the architecture of a storage management system provided in an embodiment of this application.

[0153] Figure 5 shows the architecture of a non-volatile memory management system based on AUTOSAR, primarily used for non-volatile memory management in vehicle controllers. This memory management system mainly includes, but is not limited to: application software components (SWC), runtime environment (RTE), memory stack, and hardware Flash. The memory stack includes a non-volatile memory manager (NVRAM Manager, NVM) module, a flash EEPROM emulation (Fee) module, and a flash driver (FLS).

[0154] The SWC module is the application software used to initiate data storage and retrieval requests.

[0155] The RTE module is the runtime environment used to pass data storage and read requests to the NvM module.

[0156] The NvM module is a non-volatile memory manager. When storing data, it is used to add a data header and a data trailer to the data to be stored and encapsulate it into an NvM Block. When reading data, it is used to parse the stored data from the NvM Block.

[0157] The Fee module is a flash EEPROM emulation. During data storage, it is used to add a data header and a data trailer to the NvM Block to be stored and encapsulate it into a Fee Block. During data reading, it is used to parse the stored NvM Block from the Fee Block.

[0158] The Fls module is a Flash driver used to operate hardware Flash devices and store and retrieve data.

[0159] Flash memory is a hardware storage device used to store data.

[0160] Compared with the storage management system described in Figure 1 above, the storage management system provided in this application embodiment improves the Fee module and adds a new unit function: multi-partition virtual address mapping layer.

[0161] The multi-partition virtual address mapping layer can virtualize the Flash multi-partition for managing multi-partition data. It divides the Flash space into N equal-sized bank pools for unified allocation. By combining the remaining lifetime of the bank pools, write frequency, and erase count, it achieves wear leveling and ensures that data is not disturbed by erasure, thereby improving the utilization rate of writable and erasable memory and improving storage performance.

[0162] Please refer to Figure 6, which is a flowchart illustrating a data storage method according to an embodiment of this application. This data storage method is applied in the field of computer technology, such as data storage of writable and erasable memory. Specifically, the data storage method includes, but is not limited to, the following steps:

[0163] S601: The first data storage device sends a first instruction to the second data storage device, and the second data storage device receives the first instruction accordingly.

[0164] S602: The second data storage device writes the first data into the first storage area in the first storage queue based on the first instruction.

[0165] It is understood that the first data storage device in the embodiments of this application may be a device equipped with a processor / chip that can execute computer execution instructions, or it may be a processor / chip that can execute computer execution instructions. Optionally, the first data storage device may be an electronic device, or it may be a processor / chip within an electronic device. Optionally, the first data storage device may specifically be the Fee module in FIG5 above, used to execute the data storage method in the embodiments of this application, which can improve the utilization rate of the writable and erasable memory and improve storage performance.

[0166] It is understood that the second data storage device in this application embodiment may be a device equipped with a processor / chip that can execute computer execution instructions, or it may be a processor / chip that can execute computer execution instructions. Optionally, the second data storage device may be an electronic device, or it may be a processor / chip within an electronic device. Optionally, the second data storage device may specifically be the Fls module in FIG5 above, used to execute the data storage method in this application embodiment, which can improve the utilization rate of the writable and erasable memory and improve storage performance.

[0167] It is understood that the first data storage device can be understood as a decision module, and the second data storage device can be understood as an execution module.

[0168] Optionally, the first data storage device, the second data storage device, and the data storage method in the embodiments of this application can be applied to, but are not limited to, vehicle systems. The vehicle equipped with the vehicle system is an intelligent driving vehicle and can be replaced by a terminal device. The terminal device can be, but is not limited to, vehicles such as commercial vehicles, passenger cars, trains, industrial vehicles (such as forklifts, trailers, tractors, etc.), engineering vehicles (such as excavators, bulldozers, cranes, etc.), robots, etc. The embodiments of this application do not specifically limit this.

[0169] The first instruction is used to instruct the first data to be written to the first storage area.

[0170] The first storage area is any storage area in the first storage queue, and the storage areas in the first storage queue are in an active state.

[0171] Optionally, the storage area is in an active state, which can be understood as the storage area being available to store data to be written.

[0172] Optionally, the first storage area includes at least one of the following information: the cumulative number of erases in the first storage area, the data type stored in the first storage area, the size of the first storage area, the state of the first storage area, the storage area identifier before data migration, the storage area identifier after data migration, the remaining number of erases before data migration, the remaining number of erases after data migration, and the remaining number of erases in the storage area adjacent to the physical address of the first storage area.

[0173] S603: The first data storage device sends a second instruction to the second data storage device, and the second data storage device receives the second instruction accordingly.

[0174] S604: The second data storage device, based on the second instruction, migrates the second data in the first storage area to the second storage area in the second storage queue.

[0175] The second instruction is used to instruct the migration of the second data in the first storage area to the second storage area in the second storage queue.

[0176] The storage area in the second storage queue is in an erased state, and the second data includes the most recently written data block with a different data identifier (BlockID) from the first storage area. Furthermore, the first and second storage areas are determined based on virtual address partitioning.

[0177] Optionally, the storage area is in an erased state, which can be understood as the data in the storage area being erased, and can be used to receive data to be migrated after the storage area in the active state reaches the storage threshold.

[0178] Optionally, the second storage area includes at least one of the following information: the remaining number of erases in the second storage area, the data type stored in the second storage area, the size of the second storage area, the status of the second storage area, the storage area identifier before data migration, the storage area identifier after data migration, and the remaining number of erases in the storage area adjacent to the physical address of the second storage area.

[0179] Optionally, in step S603, the first data storage device may send the second instruction when the first storage area reaches the storage threshold.

[0180] Optionally, after the first storage area reaches the storage threshold, the second data storage device may send information to the first data storage device to inform it that the first storage area has reached the storage threshold.

[0181] Optionally, the storage threshold is not a fixed value and can be adjusted according to different storage scenarios; this application embodiment does not impose any restrictions on this. For example, the first storage area reaching the storage threshold may refer to the situation where the first storage area is full.

[0182] Optionally, the virtual address of a storage area can be understood as a virtual partition number (bankID) corresponding to that storage area, bound to its actual physical address. Optionally, there is a correspondence between the virtual addresses of the first and second storage areas, which can be understood as a correspondence between the actual physical addresses of the first and second storage areas. Optionally, there is a dynamic correspondence between storage areas in an active state and storage areas in an erased state, which can be understood as a dynamic correspondence between the actual physical addresses of storage areas in an active state and storage areas in an erased state.

[0183] Understandably, when the first storage area in the active state reaches the storage threshold, the first data storage device instructs the second data storage device to migrate the data block with a different data identifier that was recently written in the first storage area to the second storage area in the erasure state.

[0184] It is understandable that since the first and second storage areas are determined based on virtual address partitioning, and there is a corresponding relationship between the virtual addresses of the first and second storage areas, a dynamic correspondence can be established between the storage areas in the active state and the storage areas in the erased state. Thus, when the storage area in the active state reaches the storage threshold, data can be migrated to its corresponding storage area in the erased state, achieving wear leveling among multiple storage areas. This can improve the utilization rate of the writable and erasable memory and enhance storage performance.

[0185] Optionally, the first and second storage areas mentioned above are storage areas in the writable and erasable memory on the AUTOSAR CP standard platform for automotive open system architecture.

[0186] Optionally, the writable and erasable memory includes, but is not limited to, Flash memory, which may also be referred to as flash memory. This application embodiment does not limit this.

[0187] It is understood that data on the AUTOSAR CP standard platform of the automotive open system architecture can be stored in accordance with the data storage method provided in this application in order to improve the utilization of the writable and erasable memory and improve storage performance.

[0188] It is understood that the data storage method provided in this application is applied to the automotive field, but is not limited to the multi-partition implementation of wear leveling for Flash in automotive scenarios. It can also be applied to other embedded chip Flash chips of several hundred kilobytes in size to achieve wear leveling between multiple storage areas, improve the utilization rate of writable and erasable memory, and improve storage performance.

[0189] In one possible embodiment, the number of erases of the second storage area corresponds to the number of erases of the first storage area.

[0190] It is understandable that there is a correspondence between the virtual addresses of the first and second storage areas, and the number of erases in the second storage area corresponds to the number of erases in the first storage area. Therefore, a dynamic correspondence can be established between the number of erases in the active storage area and the number of erases in the erased storage area. Thus, when the active storage area reaches the storage threshold, data can be migrated to the erased storage area corresponding to its erase count, achieving a balance of erase counts (i.e., wear leveling) among multiple storage areas. This ensures a balance of the remaining lifetime of multiple storage areas, thereby improving the utilization rate of the writable and erasable memory and improving storage performance.

[0191] Optionally, prior to step S603 above, the data storage method may also perform the following steps, including but not limited to:

[0192] The first data storage device determines the correspondence between the second storage area in the second storage queue and the first storage area based on the number of times the storage area has been erased.

[0193] Understandably, based on the number of erases in the storage area and the correspondence of the virtual addresses of each storage area, it can be determined that the second storage area corresponds to the first storage area. Thus, when the first storage area reaches the storage threshold, data can be migrated to the corresponding second storage area, achieving wear leveling among multiple storage areas. This can improve the utilization rate of the writable and erasable memory and enhance storage performance.

[0194] Optionally, the storage areas in the first storage queue are sorted in ascending order of the number of erases, and the storage areas in the second storage queue are sorted in ascending order of the remaining number of erases; or, the storage areas in the first storage queue are sorted in ascending order of the remaining number of erases, and the storage areas in the second storage queue are sorted in ascending order of the number of erases.

[0195] By sorting the storage areas in the first and second storage queues according to their erase counts, the erase counts of the storage areas in the first and second storage queues can be correlated. Thus, when an active storage area reaches its storage threshold, data can be migrated to the erased storage area corresponding to its erase count. This achieves wear leveling (i.e., wear leveling) among multiple storage areas, ensuring a balanced remaining lifespan for all storage areas. Consequently, the utilization rate of the writable and erasable memory can be improved, thereby enhancing storage performance.

[0196] Optionally, the storage area in the first storage queue corresponds to the storage area in the second storage queue, and the number of times the storage area in the first storage queue is erased is positively correlated with the remaining number of times the storage area in the corresponding second storage queue is erased.

[0197] It is understandable that the number of erases in the storage area of ​​the first storage queue is positively correlated with the remaining number of erases in the corresponding storage area of ​​the second storage queue. This can be interpreted as: the more erases a storage area in the first storage queue has, the more remaining erases a storage area in the corresponding second storage queue will have, i.e., fewer erases. Through the embodiments of this application, when a storage area with a shorter remaining lifetime that is in an active state reaches a storage threshold, data can be migrated to a storage area with a longer remaining lifetime that is in an erased state. This achieves a balance in the number of erases (i.e., wear leveling) among multiple storage areas, ensuring a balance in the remaining lifetime of multiple storage areas, thereby improving the utilization rate of the writable and erasable memory and improving storage performance.

[0198] In one possible embodiment, the above data storage method may further perform the following steps, including but not limited to:

[0199] After migrating the second data to the second storage area, the first data storage device sends a third instruction to the second data storage device, and the second data storage device receives the third instruction accordingly.

[0200] The third instruction is used to instruct the second storage area to be set to an active state, and the second storage area is contained in the first storage queue.

[0201] Optionally, after migrating the second data to the second storage area, the second data storage device may send information to the first data storage device to inform the first data storage device that the data migration is complete.

[0202] Understandably, after the data migration is complete, the first data storage device instructs the second data storage device to set the second storage area to an active state, allowing the second storage area to be used to store subsequent data to be written. At this time, the second storage area is included in the first storage queue, which can level the wear between the active storage area in the first storage queue and the erased storage area in the second storage queue, improving the utilization rate of the writable and erasable memory.

[0203] In one possible embodiment, the above data storage method may further perform the following steps, including but not limited to:

[0204] After migrating the second data to the second storage area, the first data storage device sends a fourth instruction to the second data storage device, and the second data storage device receives the fourth instruction accordingly.

[0205] The fourth instruction is used to instruct the data in the first storage area to be erased and to set the first storage area to an erased state. The first storage area is contained in the second storage queue.

[0206] Optionally, after migrating the second data to the second storage area, the second data storage device may send information to the first data storage device to inform the first data storage device that the data migration is complete.

[0207] Understandably, after data migration is complete, the first data storage device instructs the second data storage device to erase the data in the first storage area and set the first storage area to an erased state. This allows the first storage area to receive data to be migrated after the active storage area reaches its storage threshold. At this time, the first storage area is included in the second storage queue, which can level the wear between the active storage areas in the first storage queue and the erased storage areas in the second storage queue, improving the utilization rate of the writable and erasable memory.

[0208] In one possible embodiment, the above data storage method may further perform the following steps, including but not limited to:

[0209] The first data storage device obtains the number of erases for the third storage area that is physically adjacent to the first storage area.

[0210] If the difference between the number of erases in the first storage area and the number of erases in the third storage area is greater than a first threshold, the first data storage device sends a fifth instruction to the second data storage device, and the second data storage device receives the fifth instruction accordingly.

[0211] The fifth instruction is used to instruct data in the first storage area to be migrated to the second storage area, or data in the third storage area to be migrated to the fourth storage area, wherein the number of erases in the fourth storage area corresponds to the number of erases in the third storage area.

[0212] It is understood that the first threshold is not a fixed value and can be adjusted according to the performance of the writable and erasable memory. This application embodiment does not limit this.

[0213] It is understandable that when the difference between the number of erases of two adjacent storage areas is large, the data in either storage area can be actively migrated to the storage area corresponding to its erase count, thereby achieving wear leveling (i.e., wear leveling) among multiple storage areas and ensuring that the remaining lifespan of multiple storage areas is balanced. This can improve the utilization of writable and erasable memory and improve storage performance.

[0214] In one possible embodiment, in the event of an abnormal power-down at any stage of data storage, the data storage method in this application embodiment also provides a corresponding data rollback mechanism, which may include, but is not limited to, the following situations.

[0215] Scenario 1:

[0216] When data migration begins in the first storage area, the first data storage device sends a sixth instruction to the second data storage device, and the second data storage device receives the sixth instruction accordingly.

[0217] The sixth instruction is used to instruct the data in the first storage area to be set to a migration state.

[0218] If the data in the first storage area has not been migrated and there is an abnormal power outage and power-on, the first data storage device sends a seventh instruction to the second data storage device based on the migration status, and the second data storage device receives the seventh instruction accordingly.

[0219] The seventh instruction is used to instruct the data in the second storage area to be erased and the data in the first storage area to be migrated to the second storage area.

[0220] It is understandable that if an abnormal power outage occurs when data migration begins, the data will be re-migrated after power is restored. However, at this time, the storage area receiving the migrated data is no longer clean, and the re-migration may result in data loss.

[0221] Through the embodiments of this application, the storage area receiving the migration data can be erased first and then the data can be migrated again, thereby ensuring that the historical data written after the reset is not lost and that the management mechanism of multiple storage areas can still operate normally.

[0222] Scenario 2:

[0223] Once the data migration in the first storage area is complete and the second storage area is set to an active state, the first data storage device sends an eighth instruction to the second data storage device, and the second data storage device receives the eighth instruction accordingly.

[0224] The eighth instruction is used to instruct the data in the first storage area to be set to a migration complete state.

[0225] In the event of an abnormal power outage and subsequent power-on during the process of setting the second storage area to an active state, the first data storage device sends a ninth instruction to the second data storage device based on the migration completion status, and the second data storage device receives the ninth instruction accordingly.

[0226] The ninth instruction is used to instruct the second storage area to be reactivated.

[0227] It is understandable that if an abnormal power outage occurs after the data migration is completed and the second storage area is set to active state, the storage area receiving the migrated data may fail to activate after power is restored. This may prevent the storage area from being placed into the first storage queue, which in turn may cause an error in the correspondence between the storage areas in the first storage queue and the storage areas in the second storage queue, affecting the normal operation of subsequent storage.

[0228] Through the embodiments of this application, the migration completion status can be marked after the data migration is completed. In the event of an abnormal power outage and subsequent power-on, the second storage area can be reactivated based on the migration completion status, thereby ensuring that the management mechanism of multiple storage areas can still operate normally.

[0229] Scenario 3:

[0230] In the event of an abnormal power outage and subsequent power-on during the erasure of data in the first storage area, the first data storage device sends a tenth instruction to the second data storage device, and the second data storage device receives the tenth instruction accordingly.

[0231] The tenth instruction is used to instruct the data in the first storage area to be erased again, and to read the remaining erase count of the first storage area from the storage area adjacent to the physical address of the first storage area, write the remaining erase count of the first storage area into the first storage area, and set the first storage area to the erase state.

[0232] It is understandable that if an abnormal power failure occurs during the process of erasing data in the first storage area, and the data in the first storage area is not successfully erased after power is restored, the storage area may not be successfully reclaimed to the second storage queue. This may lead to an error in the correspondence between the storage areas in the first storage queue and the storage areas in the second storage queue, affecting subsequent normal storage operation and causing the remaining lifespan of the first storage area to be lost.

[0233] Through the embodiments of this application, the data in the first storage area can be erased again and the first storage area can be set to an erased state, thereby ensuring that the management mechanism of multiple storage areas can still operate normally, improving the utilization rate of the writable and erasable memory, and improving storage performance.

[0234] Scenario 4:

[0235] In the event of an abnormal power failure and subsequent power-on during the process of setting the first storage area to the erase state, the first data storage device sends an eleventh instruction to the second data storage device, and the second data storage device receives the eleventh instruction accordingly.

[0236] The eleventh instruction is used to instruct the data in the first storage area to be erased again, and to read the remaining erase count of the first storage area from the storage area adjacent to the physical address of the first storage area, write the remaining erase count of the first storage area into the first storage area, and set the first storage area to the erase state.

[0237] It is understandable that if an abnormal power failure occurs during the process of erasing the data in the first storage area and setting it to the erase state, the resource reclamation of the first storage area may fail after power is restored. This may result in the storage area not being successfully reclaimed to the second storage queue, which in turn leads to an error in the correspondence between the storage areas in the first storage queue and the storage areas in the second storage queue, affecting subsequent normal storage operation and causing the remaining lifespan of the first storage area to be lost.

[0238] Through the embodiments of this application, the data in the first storage area can be erased again and the first storage area can be set to an erased state, thereby ensuring that the management mechanism of multiple storage areas can still operate normally, improving the utilization rate of the writable and erasable memory, and improving storage performance.

[0239] It should be understood that the above scenarios one to four are merely illustrative examples of several possible implementations to illustrate the rollback mechanism for abnormal power-off, and should not be construed as limiting the embodiments of this application.

[0240] It should be understood that any new embodiments obtained by reasonable modifications, additions, or combinations of the above-described situations one through four are all within the protection scope of the embodiments of this application.

[0241] Please refer to Figure 7, which is a flowchart illustrating another data storage method provided in an embodiment of this application. This data storage method is applied in the field of computer technology, such as for data storage of writable and erasable memory.

[0242] It is understood that the steps in the embodiments of this application can be regarded as reasonable modifications or supplements to the embodiments in FIG6 above; or, it is understood that the data storage method in the embodiments of this application can also be regarded as an embodiment that can be executed independently, and this application does not limit it.

[0243] It is understood that the data storage device involved in the data storage method provided in this application embodiment can refer to the relevant description of the data storage device involved in the data storage method shown in Figure 6 above, and will not be repeated here.

[0244] The data storage method in this application divides the Flash space into N banks of equal size, where N is an integer greater than 2. Optionally, N can be configured in combination with the capacity of cold data and hot data, which will not be described in detail in this application.

[0245] During the initial run, the first data storage device (Fee module) instructs the second data storage device (Fls module) to write a management header to each bank and mark the bank as being in an erase state, using a cyclic redundancy check (CRC) mechanism to protect the erase state. When a bank contains user data, the first data storage device (Fee module) instructs the second data storage device (Fls module) to write the management header again and mark the bank as being in an active state, thus distinguishing it from banks in the initialization state (i.e., the erase state).

[0246] During the initialization phase, the first data storage device (Fee module) parses the bank header and divides the bank into an active bank queue and an erase bank queue based on the bank status. During the runtime phase, the first data storage device (Fee module), based on write requests from upper-layer modules, instructs the second data storage device (Fls module) to write data to the associated active bank. When an active bank reaches its storage threshold (e.g., when the active bank is full), data migration is triggered. Once the migration trigger condition is met, the first data storage device (Fee module) allocates an erase bank resource and instructs the second data storage device (Fls module) to migrate the data from the active bank that has reached its storage threshold (e.g., the full active bank) to the allocated erase bank. After migration is complete, the first data storage device (Fee module) instructs the second data storage device (Fls module) to erase the previously active bank, and after erasure, marks the bank as being in an erased state and reclaims it from the erase bank queue. After the migration is complete, the first data storage device (Fee module) also instructs the second data storage device (Fls module) to mark the allocated erase bank (i.e. the bank that receives the migration data) as active and place the bank in the active bank queue.

[0247] As shown in Figure 7, the above data migration may include, but is not limited to, the following steps:

[0248] Step 1: The Fee module retrieves a new bank from the erase bank queue. Specifically, the Fee module takes an erase bank from the erase bank queue to store the data to be migrated; this bank should be in an erased state.

[0249] Step 2: The Fee module instructs the Fls module to migrate the latest data to the new bank.

[0250] Step 3: The Fee module instructs the Fls module to set the new bank as the active bank, write the active status, and put it into the active bank queue.

[0251] Step 4: The Fee module instructs the Fls module to erase the old bank, i.e., the original active bank.

[0252] Step 5: The Fee module instructs the Fls module to set the old bank as the erase bank and write the erase status.

[0253] Step 6: The Fee module instructs the Fls module to reclaim the old bank into the erase bank queue.

[0254] Optionally, the new bank can refer to the description of the second storage area above, and the old bank can refer to the description of the first storage area above, which will not be repeated here.

[0255] It is understandable that, with the data write volume remaining constant, the calculation formula for improving the lifetime of multiple partitions in this application embodiment, compared to a single partition, can be as follows:

[0256] Where K is the block before optimization. i Number of migrations, K i For the optimized block i Number of migrations, N is the number of partitions, i is the partition number, and block i This represents the data in the i-th partition.

[0257] Assuming the lifetime of the writable and erasable memory is H hours, and the single-partition scheme requires K migrations, K i This represents the number of times the data blocks in the i-th partition are migrated during the product lifecycle after optimization. The sum of the block lengths in the i-th partition is then... M represents the number of blocks in the i-th partition, j represents the index of the block in the i-th partition, and size(block) j () represents the length of the j-th block in the i-th partition. The number of data migrations in the i-th partition is K. i = H × average hourly write traffic of the i-th partition / (size(partition)) i )-Sum(block i )).

[0258] Please refer to Figure 8, which is a schematic diagram of the correspondence of storage partitions provided in an embodiment of this application.

[0259] First, information related to each storage partition can be stored in the management header (BankHead) of each storage partition.

[0260] The information in the activated bank's management head (BankHead) includes, but is not limited to:

[0261] (1) Basic partition information: partition size, managed data type, version number.

[0262] (2) Logical partition information: logical partition number and cumulative number of erases.

[0263] (3) The partition number and remaining lifetime before and after migration are used for data recovery after being erased due to abnormal power failure.

[0264] Erasing information from the bank's management header includes, but is not limited to:

[0265] (1) Basic partition information: partition size, managed data type, version number.

[0266] (2) Logical partition information: logical partition number and the remaining lifetime of the current bank, i.e. the remaining number of erases.

[0267] (3) The partition number and remaining lifetime before and after migration are used for data recovery after being erased due to abnormal power failure.

[0268] In addition, the status flags following each storage partition's management header (BankHead) indicate the bank status. Key data includes management data types and status information. The status is mainly divided into three types: active status, erased status, and migration status.

[0269] Secondly, based on the information stored in the management header (BankHead) of each of the above storage partitions, the correspondence between the activation bank and the erasure bank can be constructed.

[0270] As shown in Figure 8(a), the activation bank queue exists as a linked list, with each physical partition corresponding to a logical partition, ordered in ascending order of erase count. The erase bank queue also exists as a linked list, with each physical partition corresponding to a logical partition, ordered in ascending order of remaining erase count (i.e., remaining lifetime).

[0271] As shown in Figure 8(b), the activation bank queue exists as a linked list, with each physical partition corresponding to a logical partition, ordered in ascending order of remaining erase counts (i.e., remaining lifetime). The erase bank queue also exists as a linked list, with each physical partition corresponding to a logical partition, ordered in ascending order of erase counts.

[0272] Finally, based on the above correspondence between the activation bank and the erase bank, when the activation bank reaches a storage threshold (e.g., the activation bank is full), the data in the activation bank can be migrated to its corresponding erase bank. See Figure 9 for details; Figure 9 is a flowchart of another data storage method provided in this application embodiment. This data storage method is applied in the field of computer technology, such as for data storage of writable and erasable memory.

[0273] It is understood that the steps in the embodiments of this application can be regarded as reasonable modifications or supplements to the embodiments in Figures 6 and 7 above; or, it is understood that the data storage method in the embodiments of this application can also be regarded as an embodiment that can be executed independently, and this application does not limit it.

[0274] It is understood that the data storage device involved in the data storage method provided in this application embodiment can refer to the relevant description of the data storage device involved in the data storage method shown in Figure 6 above, and will not be repeated here.

[0275] As shown in Figure 9, this data storage method may specifically include, but is not limited to, the following steps:

[0276] Step 1: Read and parse the partition bank header, and put the partition into the active bank queue or the erase bank queue.

[0277] Specifically, the system iterates through the partitions and reads the latest bank header. If the read is successful, the bank management header information is parsed, and the partition is placed into the active bank queue or the erase bank queue based on the header information. If the read fails, the partition is erased, and after erasure, the erase bank management header is written and the partition is placed into the erase bank queue.

[0278] Step 2: Sort the active bank queue and the erase bank queue.

[0279] Specifically, the sorting of the active bank queue and the erase bank queue can be referred to in (a) or (b) of Figure 8 above, which will not be repeated here.

[0280] Step 3: When the active bank reaches the storage threshold, the latest data in the active bank is migrated to its corresponding erase bank.

[0281] Optionally, the storage threshold is not a fixed value and can be adjusted according to different storage scenarios; this application embodiment does not impose any restrictions on this. For example, the first storage area reaching the storage threshold may refer to the situation where the first storage area is full.

[0282] User data is written to the active bank. When the active bank reaches its storage threshold, data migration is triggered. An erase bank with the same partition number as the current active bank is selected from the erase bank queue for migration, and the latest data is written to the erase bank. The principle for selecting an erase bank from the erase bank queue is to allocate logical partitions with more erase cycles to physical partitions with higher remaining lifespans, ensuring wear leveling across partitions.

[0283] Step 4: Add the new bank to the active bank queue and the old bank to the erase bank queue.

[0284] After the data migration is complete, the new bank (i.e. the selected erase bank) is written into the active bank header and placed into the active bank queue. The old bank (i.e. the original active bank) is erased, written into the erase bank header, and placed into the erase bank queue.

[0285] For example, as shown in FIG10, FIG10 is a schematic diagram of data storage provided in an embodiment of the present application.

[0286] Assuming each partition bank has a lifespan of 10 erases, the active bank queue is ordered in ascending order of the number of erases, and the erase bank queue is ordered in ascending order of the remaining number of erases (i.e., the remaining lifespan).

[0287] As shown in Figure 10(a), when the active bank in the active bank queue with 3 erase counts (which can be referred to as bank 1 for convenience) reaches the storage threshold, a data migration is triggered. The remaining erase counts of the erase bank corresponding to bank 1 are 4 (which can be referred to as bank 2 for convenience).

[0288] As shown in Figure 10(b), after the latest data in bank 1 is migrated to bank 2, bank 1 is erased, set to the erase state, and placed in the erase bank queue. At this time, bank 1 is the erase bank with 6 remaining erase counts in the erase bank queue. After the latest data in bank 1 is migrated to bank 2, bank 2 is set to the active state and placed in the active bank queue. At this time, bank 2 is the active bank with 6 erase counts in the active bank queue.

[0289] As shown in Figure 10(c), the active banks in the active bank queue are reordered in ascending order of the number of erasures.

[0290] Through the embodiments of this application, when the storage area in the active state reaches the storage threshold, the data can be migrated to the storage area in the erasure state corresponding to its erasure count, so as to achieve the erasure count balance (i.e. wear leveling) among multiple storage areas, ensure the remaining lifetime of multiple storage areas is balanced, thereby improving the utilization rate of the writable and erasureable memory and improving storage performance.

[0291] Optionally, the data storage method described above, which divides the Flash space into N banks of equal size, carries the risk of erase interference. Frequently erased partitions can corrupt data in other, less frequently erased partitions. This is because partitions in storage devices are not completely physically isolated, and partition data may become unreliable over time due to repeated erasures of adjacent physical units. Therefore, to eliminate this interference, partitions should be actively migrated before the difference in the number of erases between partitions reaches a threshold, thus eliminating the impact of previously accumulated erase interference. Therefore, it is necessary to activate the bank by recording the erase counts of the left and right physically adjacent partitions in the bank header, monitoring the erase counts of partitions, and triggering an active data migration when the erase count of a monitored partition and its adjacent physical address bank exceeds a certain threshold, thereby eliminating the impact of erase interference.

[0292] For example, as shown in Figure 10(c), the difference in erase count between adjacent active banks with erase counts of 1 and 5 in the active bank queue is much greater than that between other adjacent active banks. Therefore, an active data migration is triggered, which can actively migrate the latest data in the active bank with erase count of 1 to its corresponding erase bank, or actively migrate the latest data in the active bank with erase count of 5 to its corresponding erase bank, so as to reduce the gap with adjacent active banks, realize the erase count balance (i.e., wear leveling) among multiple storage areas, ensure the remaining lifetime balance of multiple storage areas, thereby improving the utilization of writable and erasable memory and improving storage performance.

[0293] For example, as shown in Figure 10(c), the difference in the number of erases between adjacent erase banks with 2 and 6 remaining erases in the erase bank queue is much greater than that between other adjacent erase banks. Therefore, the erase bank with 6 remaining erases can be actively erased one or more more times to reduce the gap with adjacent erase banks, thereby achieving a balance of erase counts (i.e., wear leveling) among multiple storage areas and ensuring a balance of remaining lifetimes among multiple storage areas. This can improve the utilization rate of the writable and erasable memory and improve storage performance.

[0294] In addition, embodiments of this application also provide a data rollback mechanism for abnormal power-off during data storage.

[0295] It is understandable that, since the power-down time of the MCU is uncontrollable, there may be scenarios where program abnormalities lead to reset. At this time, the memory stack may be migrating data. The embodiments of this application can ensure that the historical data written after the reset is not lost, and the multi-partition management mechanism can still operate normally.

[0296] Data migration can be mainly divided into the following steps:

[0297] Step 1: Partition-triggered migration. The user issues a write task to the storage stack. The storage stack determines that the remaining space in the current bank cannot meet the data writing requirements and triggers data migration.

[0298] Step 2: Request erase bank queue resources. Locate a matching erase bank in the erase bank queue to store the migrated data.

[0299] Step 3: Data migration begins. The latest data from the active bank is migrated to the new bank (the successfully matched erase bank) one by one.

[0300] Step 4: Data migration complete, new bank set to active status.

[0301] Step 5: Erase the old bank (the active bank that has reached the storage threshold).

[0302] Step 6: Set the old bank to erase mode.

[0303] Step 7: The old bank is recycled to the erase bank queue.

[0304] Optionally, for each stage of data migration, the embodiments of this application provide state machine management for each stage of data migration, as shown in Figure 11, which is a schematic diagram of a state machine for data migration provided by an embodiment of this application.

[0305] As shown in Figure 11, steps one, two, and seven are purely software actions and do not require consideration of the impact of abnormal power-off. However, steps three, four, five, and six will be affected differently in abnormal power-off scenarios, potentially leading to malfunctions in the multi-partition management mechanism. Therefore, this application embodiment provides corresponding analyses and measures for the potentially affected steps, as detailed in Table 1 below:

[0306] Table 1

[0307] Through the embodiments of this application, it can be ensured that historically written data is not lost after abnormal power-down reset at various stages of data migration, and the normal operation of the multi-partition management mechanism can be guaranteed.

[0308] The methods of the embodiments of this application have been described in detail above. The following provides an apparatus for implementing any one of the methods in the embodiments of this application. For example, an apparatus is provided that includes a unit (or means) for implementing the steps performed by the device in any of the above methods.

[0309] Please refer to Figure 12, which is a schematic diagram of the structure of a data storage device provided in an embodiment of this application.

[0310] As shown in Figure 12, the data storage device 120 may include a communication unit 1201 and a processing unit 1202. The communication unit 1201 and the processing unit 1202 may be software, hardware, or a combination of software and hardware.

[0311] The communication unit 1201 can implement sending and / or receiving functions, and can also be described as a transceiver unit. The communication unit 1201 can also be a unit integrating an acquisition unit and a sending unit, wherein the acquisition unit is used to implement the receiving function, and the sending unit is used to implement the sending function. Optionally, the communication unit 1201 can be used to receive information sent by other devices, and can also be used to send information to other devices.

[0312] In one possible design, the data storage device 120 may correspond to the first data storage device in the method embodiment shown in FIG. 6. For example, the data storage device 120 may be an electronic device or a chip within an electronic device. The data storage device 120 may include units for performing the operations performed by the first data storage device in the method embodiment shown in FIG. 6, and each unit in the data storage device 120 is respectively for implementing the operations performed by the first data storage device in the method embodiment shown in FIG. 6. The descriptions of each unit are as follows:

[0313] The communication unit 1201 is used to send a first instruction, which is used to instruct the writing of first data into a first storage area. The first storage area is any storage area in a first storage queue, and the storage areas in the first storage queue are in an active state.

[0314] The communication unit 1201 is further configured to send a second instruction when the first storage area reaches a storage threshold. The second instruction is configured to instruct the second data in the first storage area to be migrated to the second storage area in the second storage queue. The storage area in the second storage queue is in an erased state. The second data includes the most recently written data block with a different data identifier from the data in the first storage area. The first storage area and the second storage area are determined based on virtual address partitioning.

[0315] In one possible implementation, the device further includes:

[0316] The processing unit 1202 is used to generate the first instruction and the second instruction.

[0317] Regarding the communication unit 1201 and processing unit 1202 described in this design, the steps they perform can be referred to the implementation corresponding to the first data storage device in the method embodiment shown in FIG6 above.

[0318] Regarding the technical effects of the implementation methods performed by the communication unit 1201 and processing unit 1202 described in this design, please refer to the description of the technical effects corresponding to the method embodiment shown in FIG6 above.

[0319] In another possible design, the data storage device 120 may correspond to the second data storage device in the method embodiment shown in FIG. 6. For example, the data storage device 120 may be an electronic device or a chip within an electronic device. The data storage device 120 may include units for performing the operations performed by the second data storage device in the method embodiment shown in FIG. 6, and each unit in the data storage device 120 is respectively for implementing the operations performed by the second data storage device in the method embodiment shown in FIG. 6. The descriptions of each unit are as follows:

[0320] The communication unit 1201 is used to receive a first instruction, which instructs to write first data into a first storage area. The first storage area is any storage area in a first storage queue, and the storage areas in the first storage queue are in an active state.

[0321] The processing unit 1202 is used to write the first data into the first storage area based on the first instruction.

[0322] The communication unit 1201 is further configured to receive a second instruction when the first storage area reaches a storage threshold. The second instruction is configured to instruct the second data in the first storage area to be migrated to the second storage area in the second storage queue. The storage area in the second storage queue is in an erased state. The second data includes the most recently written data block with a different data identifier from the data in the first storage area. The first storage area and the second storage area are determined based on virtual address partitioning.

[0323] The processing unit 1202 is also configured to migrate the second data in the first storage area to the second storage area in the second storage queue based on the second instruction.

[0324] Regarding the communication unit 1201 and processing unit 1202 described in this design, the steps they perform can be referred to the implementation corresponding to the second data storage device in the method embodiment shown in FIG6 above.

[0325] Regarding the technical effects of the implementation methods performed by the communication unit 1201 and processing unit 1202 described in this design, please refer to the description of the technical effects corresponding to the method embodiment shown in FIG6 above.

[0326] According to embodiments of this application, the various units in the device shown in FIG12 can be individually or entirely merged into one or more other units, or some of the units can be further divided into multiple functionally smaller units. This achieves the same operation without affecting the technical effect of the embodiments of this application. The above units are based on logical function division. In practical applications, the function of one unit can also be implemented by multiple units, or the function of multiple units can be implemented by one unit. In other embodiments of this application, the electronic device may also include other units. In practical applications, these functions can also be implemented with the assistance of other units, and can be implemented collaboratively by multiple units.

[0327] It should be noted that the implementation of each unit can also refer to the corresponding description of the method embodiment shown in Figure 6 above.

[0328] In the data storage device 120 described in Figure 12, the utilization rate of the writable and erasable memory can be improved, thereby enhancing storage performance.

[0329] If the aforementioned data storage device 120 can be an electronic device, please refer to the structural schematic diagram of the electronic device shown in Figure 13.

[0330] It should be understood that the electronic device 130 shown in FIG13 is only an example. The electronic device in the embodiments of this application may also include other components, or include components with functions similar to the various components in FIG13, or may not be intended to include all the components in FIG13.

[0331] Electronic device 130 includes a transceiver interface 1301 and at least one processor 1302.

[0332] The electronic device 130 can correspond to a data storage device. The transceiver interface 1301 is used to transmit and receive signals, and at least one processor 1302 executes program instructions, causing the electronic device 130 to implement the corresponding flow of the method executed by the corresponding device in the above method embodiments.

[0333] In one possible design, the electronic device 130 may correspond to the first data storage device in the method embodiment shown in FIG. 6 above. For example, the electronic device 130 may be the first data storage device or a chip within the first data storage device. The electronic device 130 may include components for performing the operations performed by the first data storage device in the method embodiment above, and each component in the electronic device 130 is respectively for implementing the operations performed by the first data storage device in the method embodiment above. Specifically, it may be as follows:

[0334] The transceiver interface 1301 is used to send a first instruction, which instructs to write the first data into the first storage area. The first storage area is any storage area in the first storage queue, and the storage areas in the first storage queue are in an active state.

[0335] The transceiver interface 1301 is also used to send a second instruction when the first storage area reaches the storage threshold. The second instruction is used to instruct the second data in the first storage area to be migrated to the second storage area in the second storage queue. The storage area in the second storage queue is in an erased state. The second data includes the most recently written data block with a different data identifier from the data in the first storage area. The first storage area and the second storage area are determined based on virtual address partitioning.

[0336] In one possible implementation, the device further includes:

[0337] Processor 1302 is used to generate the first instruction and the second instruction.

[0338] Regarding the transceiver interface 1301 and at least one processor 1302 described in this design, the steps performed can be referred to the implementation corresponding to the first data storage device in the method embodiment shown in FIG6 above.

[0339] For the technical effects of the implementation methods performed by the transceiver interface 1301 and at least one processor 1302 described in this design, please refer to the description of the technical effects corresponding to the method embodiment shown in FIG6 above.

[0340] In another possible design, the electronic device 130 may correspond to the second data storage device in the method embodiment shown in FIG. 6 above. For example, the electronic device 130 may be the second data storage device or a chip within the second data storage device. The electronic device 130 may include components for performing the operations performed by the second data storage device in the method embodiment above, and each component in the electronic device 130 is respectively for implementing the operations performed by the second data storage device in the method embodiment above. Specifically, it may be as follows:

[0341] The transceiver interface 1301 is used to receive a first instruction, which instructs to write first data into a first storage area. The first storage area is any storage area in the first storage queue, and the storage areas in the first storage queue are in an active state.

[0342] Processor 1302 is used to write first data into a first memory area based on a first instruction.

[0343] The transceiver interface 1301 is also used to receive a second instruction when the first storage area reaches the storage threshold. The second instruction is used to instruct the second data in the first storage area to be migrated to the second storage area in the second storage queue. The storage area in the second storage queue is in an erased state. The second data includes the latest written data block with a different data identifier from the data in the first storage area. The first storage area and the second storage area are determined based on virtual address partitioning.

[0344] The processor 1302 is also configured to migrate second data in the first storage area to the second storage area in the second storage queue based on the second instruction.

[0345] Regarding the transceiver interface 1301 and at least one processor 1302 described in this design, the steps performed can be referred to the implementation corresponding to the second data storage device in the method embodiment shown in FIG6 above.

[0346] For the technical effects of the implementation methods performed by the transceiver interface 1301 and at least one processor 1302 described in this design, please refer to the description of the technical effects corresponding to the method embodiment shown in FIG6 above.

[0347] In the electronic device 130 described in Figure 13, the utilization rate of the writable and erasable memory can be improved, thereby enhancing storage performance.

[0348] If the aforementioned data storage device 120 can be a chip or a chip system, please refer to the schematic diagram of the chip structure shown in Figure 14.

[0349] As shown in Figure 14, chip 140 includes processor 1401 and interface 1402. The number of processors 1401 can be one or more, and the number of interfaces 1402 can be multiple. It should be noted that the functions of processor 1401 and interface 1402 can be implemented through hardware design, software design, or a combination of both; no restrictions are placed here.

[0350] Optionally, chip 140 may also include memory 1403 for storing necessary program instructions and data.

[0351] In this application, processor 1401 can be used to call the implementation program of the data storage method provided in one or more embodiments of this application in a data storage device from memory 1403, and execute the instructions included in the program. Interface 1402 can be used to output the execution result of processor 1401. In this application, interface 1402 can be specifically used to output various messages or information of processor 1401.

[0352] For the data storage methods provided by one or more embodiments of this application, please refer to the various embodiments shown in FIG6 above, which will not be repeated here.

[0353] The processor in this application embodiment can be a central processing unit (CPU), but it can also be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor.

[0354] The memory in this application embodiment is used to provide storage space, in which data such as operating system and computer programs can be stored. The memory includes, but is not limited to, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), or compact disc read-only memory (CD-ROM).

[0355] According to the method provided in the embodiments of this application, the embodiments of this application also provide a computer-readable storage medium storing a computer program. When the computer program is run on one or more processors, it can implement the method shown in FIG6.

[0356] According to the method provided in the embodiments of this application, the embodiments of this application also provide a computer program product, which includes a computer program. When the computer program runs on a processor, it can implement the method shown in FIG6.

[0357] This application also provides a data storage system, which includes a first data storage device and a second data storage device. The first data storage device is used to execute the implementation method corresponding to the first data storage device in the method embodiment shown in FIG6, and the second data storage device is used to execute the implementation method corresponding to the second data storage device in the method embodiment shown in FIG6.

[0358] Optionally, the data storage system further includes a writable and erasable memory, and the second data storage device is used to execute the implementation corresponding to the second data storage device in the method embodiment shown in FIG6 above on the data in the writable and erasable memory.

[0359] This application embodiment also provides a terminal, which includes at least one data storage device 120, or electronic device 130, or chip 140, or the above-described data storage system.

[0360] Optionally, the terminal can be a means of transportation, such as a car, truck, aircraft, drone, slow transport vehicle, spacecraft, or ship, or any other possible means of transportation used in any possible scenario. This application embodiment does not limit this.

[0361] Optionally, the terminal is used to implement the method shown in Figure 6 above.

[0362] This application also provides a processing apparatus, including a processor and an interface; the processor is used to execute the method in any of the above method embodiments.

[0363] It should be understood that the above-described processing device can be a chip. The units in the various device embodiments and the electronic devices in the method embodiments correspond completely, with corresponding modules or units executing corresponding steps. For example, the communication unit (transceiver) executes the receiving or sending steps in the method embodiments, while other steps besides sending and receiving can be executed by the processing unit (processor). The specific functions of each unit can be found in the corresponding method embodiments. There can be one or more processors.

[0364] It is understood that in the embodiments of this application, the electronic device may perform some or all of the steps in the embodiments of this application. These steps or operations are merely examples, and the embodiments of this application may also perform other operations or variations thereof. Furthermore, the steps may be performed in different orders as presented in the embodiments of this application, and it is not necessarily necessary to perform all the operations in the embodiments of this application.

[0365] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0366] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0367] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0368] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the contributing part, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0369] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application.

Claims

1. A data storage method, characterized in that, The data storage method includes: Send a first instruction, which is used to instruct the first data to be written to a first storage area, the first storage area being any storage area in a first storage queue, and the storage areas in the first storage queue being in an active state; When the first storage area reaches the storage threshold, a second instruction is sent. The second instruction is used to instruct the second data in the first storage area to be migrated to the second storage area in the second storage queue. The storage area in the second storage queue is in an erased state. The second data includes the most recently written data block with a different data identifier from the data in the first storage area. The first storage area and the second storage area are determined based on virtual address partitioning.

2. The data storage method according to claim 1, characterized in that, The number of times the second storage area is erased corresponds to the number of times the first storage area is erased.

3. The data storage method according to claim 1 or 2, characterized in that, The data storage method further includes: Based on the number of erases in the storage area, the second storage area in the second storage queue is determined to correspond to the first storage area.

4. The data storage method according to any one of claims 1 to 3, characterized in that, The data storage method further includes: After migrating the second data to the second storage area, a third instruction is sent to instruct the second storage area to be set to an active state, the second storage area being contained in the first storage queue.

5. The data storage method according to any one of claims 1 to 4, characterized in that, The data storage method further includes: After migrating the second data to the second storage area, a fourth instruction is sent, which instructs the data in the first storage area to be erased and the first storage area to be set to an erased state. The first storage area is contained in the second storage queue.

6. The data storage method according to any one of claims 1 to 5, characterized in that, The storage areas in the first storage queue are sorted in ascending order of the number of erases, and the storage areas in the second storage queue are sorted in ascending order of the remaining number of erases; or, the storage areas in the first storage queue are sorted in ascending order of the remaining number of erases, and the storage areas in the second storage queue are sorted in ascending order of the number of erases.

7. The data storage method according to claim 6, characterized in that, The storage areas in the first storage queue correspond to the storage areas in the second storage queue, and the number of times the storage area in the first storage queue is erased is positively correlated with the remaining number of times the corresponding storage area in the second storage queue is erased.

8. The data storage method according to any one of claims 1 to 7, characterized in that, The first storage area includes at least one of the following: the cumulative number of erases in the first storage area, the data type stored in the first storage area, the size of the first storage area, the state of the first storage area, the storage area identifier before data migration, the storage area identifier after data migration, the remaining number of erases before data migration, the remaining number of erases after data migration, and the remaining number of erases in the storage area adjacent to the physical address of the first storage area.

9. The data storage method according to any one of claims 1 to 8, characterized in that, The second storage area includes at least one of the following: the remaining number of erases in the second storage area, the data type stored in the second storage area, the size of the second storage area, the state of the second storage area, the storage area identifier before data migration, the storage area identifier after data migration, and the remaining number of erases in the storage area adjacent to the physical address of the second storage area.

10. The data storage method according to any one of claims 1 to 9, characterized in that, The data storage method further includes: Obtain the number of erases for the third storage area that is physically adjacent to the first storage area; If the difference between the number of erases in the first storage area and the number of erases in the third storage area is greater than a first threshold, a fifth instruction is sent. The fifth instruction is used to instruct the data in the first storage area to be migrated to the second storage area, or the data in the third storage area to be migrated to the fourth storage area, wherein the number of erases in the fourth storage area corresponds to the number of erases in the third storage area.

11. The data storage method according to any one of claims 1 to 10, characterized in that, The data storage method further includes: When data migration begins in the first storage area, a sixth instruction is sent, the sixth instruction being used to instruct the data in the first storage area to be set to a migration state; If the data in the first storage area has not been migrated and there is an abnormal power-down and power-on, a seventh instruction is sent based on the migration status. The seventh instruction is used to instruct the data in the second storage area to be erased and the data in the first storage area to be migrated to the second storage area again.

12. The data storage method according to any one of claims 1 to 11, characterized in that, The data storage method further includes: When the data in the first storage area has been migrated and the second storage area has been set to an active state, an eighth instruction is sent, the eighth instruction being used to instruct the data in the first storage area to be set to a migration complete state; In the event of an abnormal power outage and subsequent power-on during the process of setting the second storage area to an active state, a ninth instruction is sent based on the migration completion status. The ninth instruction is used to instruct the second storage area to be set to an active state again.

13. The data storage method according to any one of claims 1 to 12, characterized in that, The data storage method further includes: In the event of an abnormal power outage and subsequent power-on during the erasure of data in the first storage area, a tenth instruction is sent. The tenth instruction is used to instruct the data in the first storage area to be erased again, and to read the remaining erase count of the first storage area from the storage area adjacent to the physical address of the first storage area, write the remaining erase count of the first storage area into the first storage area, and set the first storage area to the erase state.

14. The data storage method according to any one of claims 1 to 13, characterized in that, The data storage method further includes: In the event of an abnormal power-down and power-on during the process of setting the first storage area to the erase state, an eleventh instruction is sent. The eleventh instruction is used to instruct the data in the first storage area to be erased again, and to read the remaining erase count of the first storage area from the storage area adjacent to the physical address of the first storage area, write the remaining erase count of the first storage area into the first storage area, and set the first storage area to the erase state.

15. The data storage method according to any one of claims 1 to 12, characterized in that, The first and second storage areas are storage areas in the writable and erasable memory on the AUTOSAR CP standard platform of the automotive open system architecture.

16. A data storage method, characterized in that, The data storage method includes: Receive a first instruction, the first instruction being used to instruct the writing of first data into a first storage area, the first storage area being any storage area in a first storage queue, and the storage areas in the first storage queue being in an active state; Based on the first instruction, the first data is written into the first storage area; When the first storage area reaches the storage threshold, a second instruction is received. The second instruction is used to instruct the second data in the first storage area to be migrated to the second storage area in the second storage queue. The storage area in the second storage queue is in an erased state. The second data includes the most recently written data block with a different data identifier from the data in the first storage area. The first storage area and the second storage area are determined based on virtual address partitioning. Based on the second instruction, the second data in the first storage area is migrated to the second storage area in the second storage queue.

17. The data storage method according to claim 16, characterized in that, The number of times the second storage area is erased corresponds to the number of times the first storage area is erased.

18. The data storage method according to claim 16 or 17, characterized in that, The data storage method further includes: After migrating the second data to the second storage area, a third instruction is received, which instructs the second storage area to be set to an active state. Based on the third instruction, the second storage area is set to an active state, and the second storage area is contained in the first storage queue.

19. The data storage method according to any one of claims 16 to 18, characterized in that, The data storage method further includes: After migrating the second data to the second storage area, a fourth instruction is received, which is used to instruct the data in the first storage area to be erased and the first storage area to be set to an erased state; Based on the fourth instruction, the data in the first storage area is erased and the first storage area is set to an erased state, the first storage area being included in the second storage queue.

20. The data storage method according to any one of claims 16 to 19, characterized in that, The storage areas in the first storage queue are sorted in ascending order of the number of erases, and the storage areas in the second storage queue are sorted in ascending order of the remaining number of erases; or, the storage areas in the first storage queue are sorted in ascending order of the remaining number of erases, and the storage areas in the second storage queue are sorted in ascending order of the number of erases.

21. The data storage method according to claim 20, characterized in that, The storage areas in the first storage queue correspond to the storage areas in the second storage queue, and the number of times the storage area in the first storage queue is erased is positively correlated with the remaining number of times the corresponding storage area in the second storage queue is erased.

22. The data storage method according to any one of claims 16 to 21, characterized in that, The first storage area includes at least one of the following: the cumulative number of erases in the first storage area, the data type stored in the first storage area, the size of the first storage area, the state of the first storage area, the storage area identifier before data migration, the storage area identifier after data migration, the remaining number of erases before data migration, the remaining number of erases after data migration, and the remaining number of erases in the storage area adjacent to the physical address of the first storage area.

23. The data storage method according to any one of claims 16 to 22, characterized in that, The second storage area includes at least one of the following: the remaining number of erases in the second storage area, the data type stored in the second storage area, the size of the second storage area, the state of the second storage area, the storage area identifier before data migration, the storage area identifier after data migration, and the remaining number of erases in the storage area adjacent to the physical address of the second storage area.

24. The data storage method according to any one of claims 16 to 23, characterized in that, The data storage method further includes: If the difference between the number of erases in the first storage area and the number of erases in the third storage area is greater than a first threshold, a fifth instruction is received. The fifth instruction is used to instruct the data in the first storage area to be migrated to the second storage area, or the data in the third storage area to be migrated to the fourth storage area. The number of erases in the fourth storage area corresponds to the number of erases in the third storage area, and the physical address of the third storage area is adjacent to the physical address of the first storage area. Based on the fifth instruction, the data in the first storage area is migrated to the second storage area, or the data in the third storage area is migrated to the fourth storage area.

25. The data storage method according to any one of claims 16 to 24, characterized in that, The data storage method further includes: When data migration begins in the first storage area, a sixth instruction is received, the sixth instruction being used to instruct the data in the first storage area to be set to a migration state; Based on the sixth instruction, the data in the first storage area is set to a migration state; If the data in the first storage area has not been migrated and there is an abnormal power-down and power-on, a seventh instruction is received, which is used to instruct the data in the second storage area to be erased and the data in the first storage area to be migrated to the second storage area. Based on the seventh instruction, the data in the second storage area is erased, and the data in the first storage area is migrated back to the second storage area.

26. The data storage method according to any one of claims 16 to 25, characterized in that, The data storage method further includes: When the data in the first storage area has been migrated and the second storage area has been set to an active state, an eighth instruction is received, the eighth instruction being used to instruct the data in the first storage area to be set to a migration complete state; Based on the eighth instruction, the data in the first storage area is set to a migration complete state; In the event of an abnormal power failure and subsequent power-on during the process of setting the second storage area to the active state, a ninth instruction is received, which is used to instruct the second storage area to be set to the active state again. Based on the ninth instruction, the second storage area is reactivated.

27. The data storage method according to any one of claims 16 to 26, characterized in that, The data storage method further includes: In the event of an abnormal power outage and subsequent power-on during the erasure of data in the first storage area, a tenth instruction is received. The tenth instruction is used to instruct the data in the first storage area to be erased again, and to read the remaining erasure count of the first storage area from the storage area adjacent to the physical address of the first storage area, write the remaining erasure count of the first storage area into the first storage area, and set the first storage area to the erasure state. Based on the tenth instruction, the data in the first storage area is erased again, and the remaining erase count of the first storage area is read from the storage area adjacent to the physical address of the first storage area. The remaining erase count of the first storage area is written into the first storage area, and the first storage area is set to the erase state.

28. The data storage method according to any one of claims 16 to 27, characterized in that, The data storage method further includes: In the event of an abnormal power outage and subsequent power-on during the process of setting the first storage area to the erase state, an eleventh instruction is received. The eleventh instruction is used to instruct the data in the first storage area to be erased again, and to read the remaining erase count of the first storage area from the storage area adjacent to the physical address of the first storage area, write the remaining erase count of the first storage area into the first storage area, and set the first storage area to the erase state. Based on the tenth instruction, the data in the first storage area is erased again, and the remaining erase count of the first storage area is read from the storage area adjacent to the physical address of the first storage area. The remaining erase count of the first storage area is written into the first storage area, and the first storage area is set to the erase state.

29. The data storage method according to any one of claims 16 to 28, characterized in that, The first and second storage areas are storage areas in the writable and erasable memory on the AUTOSAR CP standard platform of the automotive open system architecture.

30. A data storage device, characterized in that, Includes units for performing the method as described in any one of claims 1 to 29.

31. A data storage device, characterized in that, Includes a processor for performing the method as described in any one of claims 1 to 29.

32. A chip, characterized in that, It includes logic circuits and interfaces, wherein the logic circuits and the interfaces are coupled; The interface is used for inputting and / or outputting information, and the logic circuit is used for performing the method as described in any one of claims 1 to 29.

33. A data storage system, characterized in that, It includes a first data storage device and a second data storage device; Wherein, the first data storage device is used to perform the method as described in any one of claims 1 to 15, and the second data storage device is used to perform the method as described in any one of claims 16 to 29.

34. The data storage system according to claim 33, characterized in that, The data storage system further includes a writable and erasable memory, and the second data storage device is used to perform the method as described in any one of claims 16 to 29 on the data in the writable and erasable memory.

35. A terminal, characterized in that, This includes the data storage device as described in claim 30, or the data storage device as described in claim 31, or the chip as described in claim 32, or the data storage system as described in claims 33 to 34.

36. A computer-readable storage medium, characterized in that, The computer-readable storage medium is used to store a computer program, which, when executed, performs the method as described in any one of claims 1 to 29.

37. A computer program product, characterized in that, The computer program product includes a computer program, which, when executed, performs the method as described in any one of claims 1 to 29.

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