Silicon-based material and preparation method therefor, secondary battery cell, battery device, and electric device

Abstract

The present disclosure provides a silicon-based material and a preparation method therefor, a secondary battery cell, a battery device, and an electric device. The silicon-based material comprises a substrate and a composite layer; the substrate is provided with at least one accommodating space; the composite layer is located in the accommodating space; the composite layer comprises substrate modification layers and silicon-containing material layers which are alternately arranged in the thickness direction; and at least one substrate modification layer is in contact with the substrate. The silicon-based material provided by the present disclosure allows the secondary battery cell to have low heat generation and good cycle performance.

Description

Silicon-based materials and their preparation methods, secondary battery cells, battery devices, and electrical devices.

[0001] Cross-references to related applications

[0002] This application claims priority to Chinese Patent Application No. 202510344255.8, filed on March 21, 2025, entitled “Silicon-based materials and preparation methods thereof, secondary battery cells, battery devices, and electrical devices”, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to a silicon-based material and its preparation method, a secondary battery cell, a battery device, and an electrical device. Background Technology

[0004] In recent years, with the widespread application of lithium-ion battery cells in energy storage systems such as hydropower, thermal power, wind power, and solar power plants, as well as in power tools, electric bicycles, electric motorcycles, electric vehicles, military equipment, aerospace, and other fields, the energy density of existing lithium-ion battery cells using graphite as the negative electrode active material can no longer meet the ever-increasing technological demands. Silicon has emerged as a candidate for novel negative electrode active materials due to its moderate lithium intercalation potential (0.4V vs. Li / Li+) and high theoretical specific capacity (approximately 3579mAh / g). However, silicon exhibits a volume expansion of up to 300% during the charge-discharge cycle of lithium-ion battery cells, and it is difficult to form a stable solid electrolyte interphase (SEI) film on the silicon surface, resulting in rapid capacity decay of lithium-ion battery cells. Summary of the Invention

[0005] This disclosure provides a silicon-based material and its preparation method, a secondary battery cell, a battery device, and an electrical device. The secondary battery cell has low heat generation and good cycle performance.

[0006] In a first aspect, this disclosure provides a silicon-based material, which includes a substrate and a composite layer. The substrate includes at least one accommodating space, and the composite layer is located within the accommodating space. The composite layer includes a substrate modification layer and a silicon-containing material layer alternately arranged along the thickness direction, and at least one substrate modification layer is in contact with the substrate.

[0007] The composite layer of silicon-based material provided in this disclosure is located within a containment space inside a substrate, and each containment space includes a substrate modification layer and a silicon-containing material layer alternately arranged along its thickness direction. Compared with the substrate, the substrate modification layer and the silicon-containing material layer have a greater affinity. By having at least one substrate modification layer in contact with the substrate, the structural stability of the composite layer can be improved, the volume expansion of the silicon-containing material layer can be better buffered, and the cycle stability of the silicon-based material can be improved. The high cycle stability of silicon-based materials enables secondary battery cells using them to have good cycle performance. By including a substrate modification layer and a silicon-containing material layer alternately arranged along the thickness direction in the composite layer, this disclosure can reduce the contact area between the silicon-containing material layer and the electrolyte, reduce side reactions between the silicon-containing material layer and the electrolyte, thereby reducing the heat generation and gas generation of the secondary battery cell, and also reducing the irreversible consumption of active lithium, improving the initial coulombic efficiency and cycle capacity retention of the secondary battery cell. Therefore, the silicon-based material provided in this disclosure enables secondary battery cells to have lower heat generation and better cycle performance.

[0008] In some embodiments, both ends of the composite layer along the thickness direction are substrate modification layers, and the substrate modification layers are in contact with the substrate. By making both ends of the composite layer along the thickness direction substrate modification layers, and the substrate modification layers in contact with the substrate, the structural stability of the composite layer can be improved, the volume expansion of the silicon-containing material layer can be better buffered, and the cycle stability of the silicon-based material can be improved. Furthermore, the contact area between the silicon-containing material layer and the electrolyte can be further reduced, reducing the side reactions between the silicon-containing material layer and the electrolyte, thereby further improving the cycle performance of the secondary battery cell.

[0009] In some embodiments, the number of substrate modification layers is greater than the number of silicon-containing material layers. By making the number of substrate modification layers greater than the number of silicon-containing material layers, the structural stability of the composite layer can be improved, the volume expansion of the silicon-containing material layer can be better buffered, the cycle stability of the silicon-based material can be improved, and the contact area between the silicon-containing material layer and the electrolyte can be further reduced, thereby reducing the side reactions between the silicon-containing material layer and the electrolyte, which can further improve the cycle performance of the secondary battery cell.

[0010] In some embodiments, the number of substrate modification layers is 2 to 21, optionally 3 to 8.

[0011] In some embodiments, the number of silicon-containing material layers is 1 to 20, optionally 2 to 7.

[0012] When the total mass percentage of the substrate modification layer in the composite layer (i.e., the sum of the mass percentages of multiple substrate modification layers) is the same, increasing the number of substrate modification layers helps buffer the volume expansion of the silicon-containing material layer, improving the cycle stability of the silicon-based material. It also helps reduce the size of the silicon-containing material, lowering the risk of particle breakage due to volume expansion during charge-discharge cycles. This reduces side reactions between the silicon-containing material layer and the electrolyte, further improving the cycle performance of the secondary battery cell. However, the number of substrate modification layers and silicon-containing material layers should not be too large. Within the same space, increasing the number of substrate modification layers and silicon-containing material layers, while reducing the thickness of each layer, increases the processing difficulty and manufacturing cost.

[0013] In some embodiments, the thickness of each substrate modification layer is 0.5 nm-100 nm, optionally 0.5 nm-20 nm.

[0014] In some embodiments, the thickness of each silicon-containing material layer is 0.5nm-100nm, and optionally 2nm-20nm.

[0015] In some embodiments, the substrate modification layer includes one or more of amorphous carbon, ZnO, CdO, Cr2O3, Al2O3, SnO2, and indium tin oxide.

[0016] In some embodiments, the silicon-containing material layer includes one or more of crystalline silicon, amorphous silicon, silicon oxide, silicon carbide, silicon nitride, and alloy silicon.

[0017] In some embodiments, the substrate modification layer has a porous structure. This is beneficial for improving the adsorption force of the substrate modification layer on the silicon-containing material layer, and also provides a buffer space for the volume expansion of the silicon-containing material layer during charging and discharging, thereby improving the cycle performance of the secondary battery cell.

[0018] In some embodiments, the substrate includes at least one of a sheet-like substrate and a granular porous substrate.

[0019] In some embodiments, the substrate is a layered substrate, and the composite layer is located between the layers of the layered substrate. Using a layered substrate, the resulting substrate modification layer and silicon-containing material layer are two-dimensional layers. Compared to zero-dimensional silicon-containing material particles and one-dimensional silicon-containing materials, the two-dimensional layered silicon-containing material layer has a smaller specific surface area. This can reduce the heat generation and gas production of the secondary battery cell, and also reduce the contact between the silicon-containing material layer and oxygen during thermal runaway, thereby improving the thermal safety performance of the secondary battery cell.

[0020] In some embodiments, the number of sheets in the sheet-like substrate is 2 to 50, optionally 2 to 20.

[0021] In some embodiments, the sheet-like substrate is any one of sheet graphite, expanded graphite, MXene material, molybdenum disulfide, and tungsten disulfide.

[0022] In some embodiments, the thickness of a single layer of the sheet-like substrate is 1 nm-100 nm, and can be selected as 2 nm-20 nm.

[0023] In some embodiments, the interlayer spacing of the sheet-like substrate is 2nm-100nm, optionally 2nm-50nm. A large interlayer spacing of the sheet-like substrate can, on the one hand, increase the specific capacity of the final prepared silicon-based material, and on the other hand, facilitate the formation of the substrate modification layer and the silicon-containing material layer between the sheet-like graphite structure.

[0024] In some embodiments, the specific surface area of ​​the layered substrate is 10 m². 2 / g-500m 2 / g, optional 15m 2 / g-50m 2 / g. The large specific surface area of ​​the lamellar substrate can improve the specific capacity of the final silicon-based material, and also facilitates the formation of the substrate modification layer and the silicon-containing material layer between the lamellar structures of the lamellar graphite.

[0025] In some embodiments, the tap density of the lamellar substrate is 0.05 g / cm³. 3 -0.6g / cm 3 The option is 0.15g / cm³. 3 -0.5g / cm 3 .

[0026] In some embodiments, the volumetric particle size Dv50 of the sheet-like substrate is 4μm-50μm, and optionally 8μm-30μm.

[0027] In some embodiments, the layered substrate is layered graphite or expanded graphite, and the graphitization degree of the layered substrate is greater than or equal to 80%, optionally greater than or equal to 94%. A high degree of graphitization in the layered substrate results in good electronic conductivity, which is beneficial for improving the kinetic performance of silicon-based materials and for improving the rate performance of secondary battery cells.

[0028] In some embodiments, one or both ends of the lamellar substrate are curved; and / or, at least a portion of adjacent lamellar substrates are cross-linked together. The large gaps between the lamellar structures at the curved locations provide buffer space for the volume expansion of the silicon-containing material layer during subsequent charge-discharge cycles of the secondary battery cell. The cross-linking of at least a portion of adjacent lamellar substrates can form gaps between different lamellar substrates, providing buffer space for the volume expansion of the silicon-containing material layer during subsequent charge-discharge cycles of the secondary battery cell.

[0029] In some embodiments, the substrate is a granular porous substrate, and the composite layer is located within the voids of the granular porous substrate.

[0030] In some embodiments, the particulate porous substrate is either porous carbon or MOF material.

[0031] In some embodiments, the pore size of the particulate porous substrate is 2 nm-2 μm, optionally 100 nm-500 nm. The large pore size of the particulate porous substrate can, on the one hand, increase the specific capacity of the final prepared silicon-based material, and on the other hand, facilitate the formation of the substrate modification layer and the silicon-containing material layer within the pores of the particulate porous substrate.

[0032] In some embodiments, the specific surface area of ​​the granular porous substrate is 20 m². 2 / g-2000m 2 / g, optional 200m 2 / g-1600m 2 / g. The large specific surface area of ​​the granular porous substrate can improve the specific capacity of the final silicon-based material, and also facilitates the formation of the substrate modification layer and silicon-containing material layer within the pores of the granular porous substrate.

[0033] In some embodiments, the tap density of the granular porous substrate is 0.05 g / cm³. 3 -1g / cm 3 0.2g / cm can be selected. 3 -0.9g / cm 3 .

[0034] In some embodiments, the volume distribution particle size Dv50 of the granular porous substrate is 4μm-50μm, and can be selected as 8μm-15μm.

[0035] In some embodiments, the silicon-based material further includes a coating layer covering the substrate. By providing a coating layer on the substrate surface, the specific surface area of ​​the silicon-based material can be reduced, the oxidation kinetics of the silicon-based material during thermal runaway can be reduced, and the direct contact between the silicon-containing material layer and the electrolyte can be reduced, thereby improving the cycle stability of the silicon-based material and enhancing the cycle performance of the secondary battery cell.

[0036] In some embodiments, the coating layer includes one or more of amorphous carbon, carbon nanofibers, carbon nanotubes, titanium dioxide, tin oxide, niobium oxide, and solid electrolyte materials.

[0037] In some embodiments, the specific surface area of ​​the silicon-based material is 0.1 m². 2 / g-15m 2 / g, optional 1m 2 / g-5m 2 / g.

[0038] In some embodiments, the tap density of the silicon-based material is 0.5 g / cm³. 3 -1g / cm 3 0.6g / cm³ is an option. 3 -1g / cm 3 .

[0039] In some embodiments, the volumetric particle size Dv50 of the silicon-based material is 4μm-50μm, and can be selected as 10μm-30μm.

[0040] In a second aspect, this disclosure provides a method for preparing a silicon-based material, comprising the following steps: providing a substrate, the substrate including at least one accommodating space; first depositing a substrate modification layer in the accommodating space inside the substrate, then depositing a silicon-containing material layer, and then alternately depositing the substrate modification layer and the silicon-containing material layer to obtain a silicon-based material.

[0041] In some embodiments, the method for preparing silicon-based materials further includes the following step: coating a substrate surface with a coating layer to obtain a silicon-based material.

[0042] In some embodiments, the method for preparing silicon-based materials further includes the following steps: coating a substrate surface with a coating layer, and then shaping it to obtain the silicon-based material. During the shaping process, different lamellar substrates come into contact, are squeezed, and bend. For example, one or both ends of the lamellar substrate are bent. The gaps between the lamellar structures at the bent positions are large, which can provide buffer space for the volume expansion of the silicon-containing material layers during the subsequent cycle charging and discharging of secondary battery cells.

[0043] Thirdly, this disclosure provides a secondary battery cell, including a negative electrode, a positive electrode, and a separator, wherein the separator is disposed between the negative electrode and the positive electrode, the negative electrode includes a negative current collector and a negative electrode film layer located on at least one side of the negative current collector, the negative electrode film layer includes a negative electrode active material, and the negative electrode active material includes the silicon-based material of the first aspect.

[0044] In some embodiments, the positive electrode includes a positive current collector and a positive electrode film layer located on at least one side of the positive current collector. The positive electrode film layer includes a positive electrode active material, which includes one or more of lithium transition metal oxides and their modified forms, lithium phosphates and their modified forms.

[0045] Fourthly, this disclosure provides a battery device comprising a plurality of secondary battery cells according to the third aspect of this disclosure.

[0046] Fifthly, this disclosure provides an electrical device that includes a secondary battery cell according to the third aspect of this disclosure or a battery device according to the fourth aspect of this disclosure. Attached Figure Description

[0047] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings used in the embodiments of this disclosure will be briefly described below. Obviously, the drawings described below are merely some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on the drawings without any creative effort.

[0048] Figure 1 shows a schematic diagram of a secondary battery cell provided in some embodiments of this disclosure.

[0049] Figure 2 shows a schematic diagram of an electrical device provided in some embodiments of this disclosure.

[0050] Figure 3 shows a schematic diagram of the structure of silicon-based materials provided in some embodiments of this disclosure.

[0051] Figure 4 shows a transmission electron microscope image of a cross-section of a silicon-based material.

[0052] Figure 5 shows a scanning electron microscope image of the cross-section of the negative electrode sheet.

[0053] The reference numerals in the attached figures are explained as follows: 1. Layered structure; 2. Substrate modification layer; 3. Silicon-containing material layer; 4. Coating layer; 5. Cell. Detailed Implementation

[0054] The following detailed description, with appropriate reference to the accompanying drawings, discloses embodiments of the silicon-based materials and their preparation methods, secondary battery cells, battery devices, and power-consuming devices of this disclosure. However, unnecessary detailed descriptions may be omitted. For example, detailed descriptions of well-known matters and repetitive descriptions of practically identical structures may be omitted. This is to avoid unnecessarily lengthy descriptions and to facilitate understanding by those skilled in the art. Furthermore, the accompanying drawings and the following description are provided to enable those skilled in the art to fully understand this disclosure and are not intended to limit the subject matter of the claims.

[0055] The "range" disclosed in this disclosure is defined by a lower limit and an upper limit, whereby a given range is defined by selecting a lower limit and an upper limit, which define the boundaries of the particular range. Ranges defined in this way can include or exclude endpoints and can be arbitrarily combined; that is, any lower limit can be combined with any upper limit to form a range. For example, if ranges of 60-120 and 80-110 are listed for a specific parameter, it is expected that ranges of 60-110 and 80-120 are also expected. Furthermore, if minimum range values ​​1 and 2 are listed, and if maximum range values ​​3, 4, and 5 are listed, then the following ranges are all expected: 1-3, 1-4, 1-5, 2-3, 2-4, and 2-5. In this disclosure, unless otherwise stated, the numerical range "ab" represents a shortened representation of any combination of real numbers between a and b, where a and b are real numbers. For example, the numerical range "0-5" indicates that all real numbers between "0-5" have been listed in this article; "0-5" is simply a shortened representation of these numerical combinations. Furthermore, when a parameter is stated as an integer ≥2, it is equivalent to disclosing that the parameter is, for example, an integer such as 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, etc.

[0056] Unless otherwise specified, all embodiments and optional embodiments of this disclosure may be combined with each other to form new technical solutions, and such technical solutions should be considered as included in the disclosure of this disclosure.

[0057] Unless otherwise specified, all technical features and optional technical features of this disclosure can be combined to form new technical solutions, and such technical solutions should be considered as included in the disclosure of this disclosure.

[0058] Unless otherwise specified, all steps in this disclosure may be performed sequentially or randomly, preferably sequentially. For example, the method includes steps (a) and (b), indicating that the method may include steps (a) and (b) performed sequentially, or it may include steps (b) and (a) performed sequentially. For example, the mention that the method may also include step (c) indicates that step (c) may be added to the method in any order; for example, the method may include steps (a), (b), and (c), or it may include steps (a), (c), and (b), or it may include steps (c), (a), and (b), etc.

[0059] Unless otherwise specified, in this disclosure, the terms "first," "second," etc., are used to distinguish different objects, rather than to describe a specific order or primary / secondary relationship.

[0060] In this disclosure, the terms "multiple" or "a variety" refer to two or more kinds.

[0061] In the description of the embodiments of this disclosure, unless otherwise specified, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "over," and "on top" of the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0062] Unless otherwise stated, the test temperature for all parameters mentioned in this disclosure is 25°C.

[0063] The secondary battery cells mentioned in the embodiments of this disclosure can independently perform charge and discharge functions, and can continue to be used by recharging after discharge to activate the active materials. The secondary battery cells can be cylindrical, cuboid, or other shapes, etc., and the embodiments of this disclosure are not limited to this. Figure 1 shows a cuboid secondary battery cell 5 as an example.

[0064] The battery apparatus mentioned in the embodiments of this disclosure may include one or more battery cell assemblies for providing voltage and capacity. A battery cell assembly may include multiple secondary battery cells, which are connected in series, parallel, or mixed connections via a busbar.

[0065] In some embodiments, a battery cell assembly is typically formed by arranging multiple secondary battery cells.

[0066] As an example, a battery cell assembly can be a battery module, which is formed by arranging and fixing multiple secondary battery cells together to form an independent module. As another example, a battery module can be formed by bundling multiple secondary battery cells together with cable ties.

[0067] In some embodiments, the battery device may be a battery pack, which includes a housing and one or more individual battery cells housed within the housing.

[0068] As an example, the battery cell assembly can be a battery module, which can be housed in a housing by fixing the battery module in the housing.

[0069] As an example, battery cell assemblies can also be housed in a housing by directly fixing multiple secondary battery cells to the housing.

[0070] As an example, the enclosure may include a first enclosure and a second enclosure. The first enclosure and the second enclosure are fastened together to form a closed space inside the enclosure to house the individual battery cells. Here, "closed" refers to covering or closing, and can be either sealed or unsealed. The first enclosure may be a top cover or a bottom plate.

[0071] As an example, the enclosure may include a top cover, a frame, and a bottom plate. The top cover and bottom plate are connected to the frame, creating an enclosed space inside the enclosure to house the individual battery cells.

[0072] In some embodiments, the housing may be part of the vehicle's chassis structure. For example, a portion of the housing may be at least a part of the vehicle's floor, or a portion of the housing may be at least a part of the vehicle's crossbeams and longitudinal beams.

[0073] The technical solutions described in this disclosure are applicable to various electrical devices that use secondary battery cells or battery devices, such as, but not limited to, mobile devices (e.g., mobile phones, tablets, laptops, etc.), electric vehicles (e.g., pure electric vehicles, hybrid electric vehicles, plug-in hybrid electric vehicles, electric bicycles, electric scooters, electric golf carts, electric trucks, etc.), electric trains, ships and satellites, energy storage systems, etc. Secondary battery cells and battery devices are used to store or provide electrical energy.

[0074] Figure 2 is a schematic diagram of an example electrical device. This electrical device is a pure electric vehicle, a hybrid electric vehicle, or a plug-in hybrid electric vehicle, etc.

[0075] The specific surface area of ​​the material can be measured according to GB / T 19587-2017, using the nitrogen adsorption specific surface area analysis method, and calculated using the BET (Brunauer Emmett Teller) method. The testing instrument can be the Tri-Star 3020 specific surface area and pore size analyzer from Micromeritics, USA.

[0076] The tap density of the material can be determined using a powder tap density tester in accordance with GB / T 5162-2006. The testing instrument can be Dandong Baite BT-301, with the following test parameters: vibration frequency 250±15 times / minute, amplitude 3±0.2mm, number of vibrations 5000 times, and measuring cylinder 25mL.

[0077] Dv50 represents the particle size corresponding to a cumulative volumetric distribution percentage of 50% for the material. It can be measured using a laser particle size analyzer, referring to GB / T 19077-2016. During testing, add 1g of the sample to a clean small beaker, along with 20ml of deionized water. Sonicate at 53kHz / 120W for 5 minutes to ensure complete dispersion. Turn on the laser particle size analyzer, clean the optical path system, and automatically test the background. Stir the sonicated solution to ensure uniform dispersion, then place it in the sample cell as required and begin measuring the particle size. A MasterSizer 3000 laser particle size analyzer can be used as the testing instrument.

[0078] The degree of graphitization of a material can be measured using an X-ray diffractometer (such as a Bruker D8 Discover). The measurement can be performed according to JIS K 0131-1996 and JB / T 4220-2011, yielding the average interlayer spacing d of the C(002) crystal planes in the material's crystal structure. 002 Then, according to the formula g = (0.344 - d) 002 The degree of graphitization is calculated as d / (0.344-0.3354)×100%. In the above formula, d... 002 It is the average interlayer spacing of the C(002) crystal plane in the material crystal structure, expressed in nanometers (nm).

[0079] The pore size of the material can be determined using a specific surface area analyzer, referring to GB / T 21650.2-2008. The testing instrument can be a TristarII 3020 fully automatic specific surface area and porosity analyzer.

[0080] To reduce the volume expansion of silicon, existing technologies use silane gas cracking to directly fill nano-silicon into porous carbon substrates to prepare silicon-carbon materials. Compared to pure silicon, the volume expansion of this silicon-carbon material is reduced. However, the nano-silicon in the pores of the porous carbon substrate exhibits high reactivity, numerous side reactions with the electrolyte, significant charge-discharge volume changes, and poor electronic conductivity. This leads to poor cycle performance in secondary battery cells using this silicon-carbon material. Furthermore, it results in high gas production and high heat generation, which can easily cause the secondary battery cell casing to crack or even explode.

[0081] In view of this, the present disclosure provides a silicon-based material and a secondary battery cell, battery device and power supply device containing the same. The silicon-based material provided by the present disclosure enables the secondary battery cell to have low heat generation and good cycle performance.

[0082] The silicon-based material provided in this disclosure includes a substrate and a composite layer. The substrate includes at least one accommodating space, and the composite layer is located within the accommodating space. The composite layer includes a substrate modification layer and a silicon-containing material layer alternately arranged along the thickness direction, with at least one substrate modification layer in contact with the substrate. The substrate modification layer does not contain silicon, and compared to the substrate, the substrate modification layer has a greater affinity for the silicon-containing material layer.

[0083] The silicon-based composite layer provided in this embodiment is located within a containment space inside the substrate, and each containment space includes a substrate modification layer and a silicon-containing material layer alternately arranged along its thickness direction. Compared with the substrate, the substrate modification layer and the silicon-containing material layer have a greater affinity. By contacting at least one substrate modification layer with the substrate, the structural stability of the composite layer can be improved, the volume expansion of the silicon-containing material layer can be better buffered, and the cycle stability of the silicon-based material can be improved. The high cycle stability of the silicon-based material enables secondary battery cells using it to have good cycle performance.

[0084] This disclosure reduces the contact area between the silicon-containing material layer and the electrolyte by making the composite layer include a substrate modification layer and a silicon-containing material layer alternately arranged along the thickness direction, thereby reducing the side reactions between the silicon-containing material layer and the electrolyte. This can reduce the heat generation and gas generation of the secondary battery cell, reduce the irreversible consumption of active lithium, and improve the initial coulombic efficiency and cycle capacity retention of the secondary battery cell.

[0085] Therefore, the silicon-based materials provided in this disclosure enable secondary battery cells to have lower heat generation and better cycle performance.

[0086] In some embodiments, both ends of the composite layer along the thickness direction are substrate modification layers, and the substrate modification layers are in contact with the substrate.

[0087] By making both ends of the composite layer along the thickness direction substrate modification layer, and having the substrate modification layer in contact with the substrate, the structural stability of the composite layer can be improved, the volume expansion of the silicon-containing material layer can be better buffered, the cycle stability of the silicon-based material can be improved, and the contact area between the silicon-containing material layer and the electrolyte can be further reduced, thereby reducing the side reactions between the silicon-containing material layer and the electrolyte, which can further improve the cycle performance of the secondary battery cell.

[0088] In some embodiments, the composite layer is located within the containment space, and the volume percentage of the composite layer within the containment space can be 95%-100%, meaning the composite layer completely or almost completely fills the containment space. This allows silicon-based materials to have high capacity, enabling secondary battery cells to have high energy density.

[0089] Of course, in order to reduce the volume expansion of silicon-based materials, the volume ratio of the composite layer in the containment space can also be reduced.

[0090] The composite layer includes a substrate modification layer and a silicon-containing material layer alternately arranged along the thickness direction. The substrate modification layer can be a continuous film layer or a discontinuous film layer, and can be a dense film layer or a loose film layer. The silicon-containing material layer can be a continuous film layer or a discontinuous film layer, and can be a dense film layer or a loose film layer.

[0091] In some embodiments, the number of substrate modification layers can be greater than the number of silicon-containing material layers.

[0092] By making the number of substrate modification layers greater than the number of silicon-containing material layers, the structural stability of the composite layer can be improved, the volume expansion of the silicon-containing material layer can be better buffered, the cycle stability of the silicon-based material can be improved, and the contact area between the silicon-containing material layer and the electrolyte can be further reduced, thereby reducing the side reactions between the silicon-containing material layer and the electrolyte, which can further improve the cycle performance of the secondary battery cell.

[0093] In some embodiments, the number of substrate modification layers can be 2 to 21, for example, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, or any range of the above values.

[0094] In some embodiments, the number of silicon-containing material layers can be from 1 to 20, for example, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, or any range of the above values.

[0095] Optionally, the number of layers of the substrate modification layer can be 3 to 21, 3 to 18, 3 to 15, 3 to 12, 3 to 10, 3 to 8, 4 to 21, 4 to 18, 4 to 15, 4 to 12, 4 to 10, or 4 to 8.

[0096] Optionally, the number of silicon-containing material layers can be 2 to 20, 2 to 17, 2 to 14, 2 to 11, 2 to 9, 2 to 7, 3 to 20, 3 to 17, 3 to 14, 3 to 11, 3 to 9, or 3 to 7.

[0097] When the total mass percentage of the substrate modification layer in the composite layer (i.e., the sum of the mass percentages of multiple substrate modification layers) is the same, increasing the number of substrate modification layers helps buffer the volume expansion of the silicon-containing material layer, improving the cycle stability of the silicon-based material. It also helps reduce the size of the silicon-containing material, lowering the risk of particle breakage due to volume expansion during charge-discharge cycles. This reduces side reactions between the silicon-containing material layer and the electrolyte, further improving the cycle performance of the secondary battery cell. However, the number of substrate modification layers and silicon-containing material layers should not be too large. Within the same space, increasing the number of substrate modification layers and silicon-containing material layers, while reducing the thickness of each layer, increases the processing difficulty and manufacturing cost.

[0098] In some embodiments, the thickness of each substrate modification layer can be 0.5nm-100nm, for example, it can be 0.5nm, 1nm, 2nm, 4nm, 6nm, 8nm, 10nm, 12nm, 14nm, 16nm, 18nm, 20nm, 22nm, 24nm, 26nm, 28nm, 30nm, 32nm, 34nm, 36nm, 38nm, 40nm, 42nm, 44nm, 46nm, 48nm, 50nm, 55nm, 60nm, 65nm, 70nm, 75nm, 80nm, 85nm, 90nm, 95nm, 100nm, or any range of the above values.

[0099] Optionally, the thickness of each substrate modification layer can be 0.5nm-80nm, 0.5nm-70nm, 0.5nm-60nm, 0.5nm-50nm, 0.5nm-40nm, 0.5nm-30nm, or 0.5nm-20nm.

[0100] In some embodiments, the thickness of each silicon-containing material layer can be 0.5nm-100nm, for example, it can be 0.5nm, 1nm, 2nm, 4nm, 6nm, 8nm, 10nm, 12nm, 14nm, 16nm, 18nm, 20nm, 22nm, 24nm, 26nm, 28nm, 30nm, 32nm, 34nm, 36nm, 38nm, 40nm, 42nm, 44nm, 46nm, 48nm, 50nm, 55nm, 60nm, 65nm, 70nm, 75nm, 80nm, 85nm, 90nm, 95nm, 100nm, or any range of the above values.

[0101] Optionally, the thickness of each silicon-containing material layer can be 2nm-80nm, 2nm-70nm, 2nm-60nm, 2nm-50nm, 2nm-40nm, 2nm-30nm, or 2nm-20nm.

[0102] In some embodiments, the substrate modification layer may include one or more of amorphous carbon, ZnO, CdO, Cr2O3, Al2O3, SnO2, and indium tin oxide.

[0103] Optionally, the substrate modification layer may include amorphous carbon.

[0104] Compared with silicon-containing material layers, amorphous carbon has better electronic conductivity, which can improve the electronic conductivity of the composite layer, enhance the kinetic performance of silicon-based materials, and improve the cycle performance and rate performance of secondary battery cells.

[0105] In some embodiments, the substrate modification layer may have a porous structure.

[0106] The porous structure of the substrate modification layer indicates that the substrate modification layer is not a completely dense film layer, but rather exhibits a loose and porous structure. This is beneficial for improving the adsorption force of the substrate modification layer on the silicon-containing material layer. In addition, it can also provide a buffer space for the volume expansion of the silicon-containing material layer during charging and discharging, thereby improving the cycle performance of the secondary battery cell.

[0107] In some embodiments, the substrate modification layer may have a porous structure and may include amorphous carbon.

[0108] The surface of the amorphous carbon substrate modification layer with a loose and porous structure has abundant defects and some dangling bonds. This can not only enhance the adsorption force of the substrate modification layer on the silicon-containing material layer, but also provide a buffer space for the volume expansion of the silicon-containing material layer during charging and discharging, thereby improving the cycle performance of the secondary battery cell.

[0109] In some embodiments, the silicon-containing material layer may include one or more of crystalline silicon, amorphous silicon, silicon oxide, silicon carbide, silicon nitride, and alloy silicon.

[0110] In some embodiments, the substrate may include at least one of a layered substrate and a granular porous substrate. The interlayers of the layered substrate serve as receiving spaces for the composite layer, and the pores of the granular porous substrate serve as receiving spaces for the composite layer.

[0111] Optionally, the substrate can be a lamellar substrate.

[0112] By using a layered substrate, the substrate modification layer and silicon-containing material layer formed are two-dimensional layers. Compared with zero-dimensional silicon-containing material particles and one-dimensional silicon-containing materials, the specific surface area of ​​the two-dimensional layered silicon-containing material layer is smaller. This can reduce the heat generation and gas generation of the secondary battery cell. In addition, it can reduce the contact between the silicon-containing material layer and oxygen when thermal runaway occurs, thereby improving the thermal safety performance of the secondary battery cell.

[0113] [Laminar basement]

[0114] In some embodiments, the substrate may be a sheet-like substrate, and the composite layer is located between the layers of the sheet-like substrate.

[0115] In some embodiments, the number of sheets in the sheet-like substrate can be from 2 to 50, for example, it can be 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 42, 44, 46, 48, 50, or any range of the above values.

[0116] Optionally, the number of sheets in the lamellar substrate can be 2 to 40, 2 to 30, 2 to 20, 2 to 15, 2 to 10, 3 to 40, 3 to 30, 3 to 20, 3 to 15, 3 to 10, 4 to 40, 4 to 30, 4 to 20, 4 to 15, or 4 to 10.

[0117] In some embodiments, the sheet-like substrate may be any one of sheet graphite, expanded graphite, MXene material, molybdenum disulfide, and tungsten disulfide.

[0118] Alternatively, the layered substrate may be layered graphite or expanded graphite.

[0119] Alternatively, the lamellar substrate can be lamellar graphite.

[0120] Sheet graphite has certain flame retardancy, which can reduce the heat generation of secondary battery cells. Sheet graphite has a large interlayer spacing and a large specific surface area, which can improve the specific capacity of the final silicon-based material and facilitate the formation of the substrate modification layer and silicon-containing material layer between the sheet structures of sheet graphite.

[0121] In some embodiments, the preparation method of sheet graphite may include, but is not limited to, supercritical CO2 exfoliation, high-temperature oxidation, ultrasonic exfoliation, etc.

[0122] In some embodiments, the thickness of a single layer can be 1nm-100nm, for example, it can be 1nm, 2nm, 4nm, 6nm, 8nm, 10nm, 12nm, 14nm, 16nm, 18nm, 20nm, 22nm, 24nm, 26nm, 28nm, 30nm, 32nm, 34nm, 36nm, 38nm, 40nm, 42nm, 44nm, 46nm, 48nm, 50nm, 55nm, 60nm, 65nm, 70nm, 75nm, 80nm, 85nm, 90nm, 95nm, 100nm, or any range of the above values.

[0123] Optionally, the thickness of a single layer can be 2nm-100nm, 2nm-80nm, 2nm-70nm, 2nm-60nm, 2nm-50nm, 2nm-40nm, 2nm-30nm, or 2nm-20nm.

[0124] In some embodiments, the interlayer spacing of the sheet-like substrate can be 2nm-100nm, for example, it can be 2nm, 4nm, 6nm, 8nm, 10nm, 12nm, 14nm, 16nm, 18nm, 20nm, 22nm, 24nm, 26nm, 28nm, 30nm, 32nm, 34nm, 36nm, 38nm, 40nm, 42nm, 44nm, 46nm, 48nm, 50nm, 55nm, 60nm, 65nm, 70nm, 75nm, 80nm, 85nm, 90nm, 95nm, 100nm, or any range of the above values.

[0125] The large interlayer spacing of the lamellar substrate can improve the specific capacity of the final silicon-based material and also facilitate the formation of the substrate modification layer and the silicon-containing material layer between the lamellar structure of the lamellar graphite.

[0126] Optionally, the interlayer spacing of the sheet-like substrate can be 2nm-80nm, 2nm-70nm, 2nm-60nm, or 2nm-50nm.

[0127] In some embodiments, the specific surface area of ​​the layered substrate can be 10 m². 2 / g-500m 2 / g, for example, can be 10m 2 / g, 15m 2 / g、20m 2 / g、25m 2 / g、30m 2 / g、35m 2 / g、40m 2 / g、45m 2 / g, 50m 2 / g、55m 2 / g、60m 2 / g、65m 2 / g、70m 2 / g、75m 2 / g、80m 2 / g、85m 2 / g、90m 2 / g、95m 2 / g, 100m 2 / g、120m 2 / g, 140m 2 / g, 160m2 / g、180m 2 / g、200m 2 / g、220m 2 / g、240m 2 / g、260m 2 / g、280m 2 / g、300m 2 / g、320m 2 / g、340m 2 / g、360m 2 / g、380m 2 / g、400m 2 / g、420m 2 / g、440m 2 / g、460m 2 / g、480m 2 / g、500m 2 / g, or any range of the above values.

[0128] The large specific surface area of ​​the lamellar substrate can improve the specific capacity of the final silicon-based material and facilitate the formation of the substrate modification layer and the silicon-containing material layer between the lamellar structure of the lamellar graphite.

[0129] Optionally, the specific surface area of ​​the lamellar substrate can be 15 m². 2 / g-200m 2 / g, 10m 2 / g-100m 2 / g, 10m 2 / g-80m 2 / g, 15m 2 / g-50m 2 / g.

[0130] In some embodiments, the tap density of the lamellar substrate may be 0.05 g / cm³. 3 -0.6g / cm 3 For example, it can be 0.05 g / cm³. 3 0.06g / cm 3 0.08g / cm 3 0.1g / cm 3 0.12g / cm 3 0.15g / cm 3 0.18g / cm 3 0.2g / cm 3 0.22g / cm 3 0.25g / cm 3 0.28g / cm 3 0.3g / cm3 0.32g / cm 3 0.35g / cm 3 0.38g / cm 3 0.4g / cm 3 0.42g / cm 3 0.45g / cm 3 0.48g / cm 3 0.5g / cm 3 0.52g / cm 3 0.55g / cm 3 0.58g / cm 3 0.6g / cm 3 or a range consisting of any of the above values.

[0131] Optionally, the tap density of the lamellar substrate can be 0.1 g / cm³. 3 -0.6g / cm 3 0.1g / cm 3 -0.55g / cm 3 0.1g / cm 3 -0.5g / cm 3 0.15g / cm 3 -0.5g / cm 3 0.2g / cm 3 -0.5g / cm 3 0.25g / cm 3 -0.5g / cm 3 .

[0132] In some embodiments, the volumetric particle size Dv50 of the sheet-like substrate can be 4μm-50μm, for example, it can be 4μm, 5μm, 6μm, 7μm, 8μm, 9μm, 10μm, 11μm, 12μm, 13μm, 14μm, 15μm, 16μm, 18μm, 20μm, 22μm, 24μm, 26μm, 28μm, 30μm, 32μm, 34μm, 36μm, 38μm, 40μm, 42μm, 44μm, 46μm, 48μm, 50μm, or any range of the above values.

[0133] Optionally, the volumetric particle size Dv50 of the lamellar substrate can be 8 μm-30 μm.

[0134] In some embodiments, the sheet-like substrate is sheet graphite or expanded graphite, and the degree of graphitization of the sheet-like substrate can be greater than or equal to 80%, for example, greater than or equal to 80%, greater than or equal to 81%, greater than or equal to 82%, greater than or equal to 83%, greater than or equal to 84%, greater than or equal to 85%, greater than or equal to 86%, greater than or equal to 87%, greater than or equal to 88%, greater than or equal to 89%, greater than or equal to 90%, greater than or equal to 91%, greater than or equal to 92%, greater than or equal to 93%, greater than or equal to 94%, or any range of the above values.

[0135] High graphitization of layered substrates results in good electronic conductivity, which is beneficial for improving the kinetic performance of silicon-based materials and the rate performance of secondary battery cells.

[0136] Optionally, the degree of graphitization of the lamellar substrate can be greater than or equal to 94%.

[0137] In some embodiments, the sheet-like substrate is sheet graphite, and the degree of graphitization of the sheet graphite can be greater than or equal to 80%, for example, greater than or equal to 80%, greater than or equal to 81%, greater than or equal to 82%, greater than or equal to 83%, greater than or equal to 84%, greater than or equal to 85%, greater than or equal to 86%, greater than or equal to 87%, greater than or equal to 88%, greater than or equal to 89%, greater than or equal to 90%, greater than or equal to 91%, greater than or equal to 92%, greater than or equal to 93%, greater than or equal to 94%, or any range of the above values.

[0138] Optionally, the degree of graphitization of the lamellar graphite can be greater than or equal to 94%.

[0139] In some embodiments, one or both ends of the sheet-like substrate may be curved.

[0140] The large gaps between the curved lamellar structures provide a buffer space for the volume expansion of the silicon-containing material layers during the subsequent cycle charging and discharging of the secondary battery cells.

[0141] In some embodiments, at least a portion of adjacent sheet-like substrates may be cross-linked together.

[0142] This allows for the formation of gaps between different layered substrates, providing a buffer space for the volume expansion of the silicon-containing material layer during subsequent cycle charging and discharging of the secondary battery cell.

[0143] In some embodiments, one or both ends of the sheet-like substrate may be curved, and at least a portion of adjacent sheet-like substrates may be cross-linked together.

[0144] Figure 3 shows a schematic diagram of the structure of a silicon-based material provided in some embodiments of the present disclosure. As shown in Figure 3, the silicon-based material has a layered substrate, a composite layer is located between the layered structures 1 of the layered substrate, and the composite layer includes a substrate modification layer 2 and a silicon-containing material layer 3 alternately arranged along the thickness direction.

[0145] Figure 4 shows a transmission electron microscope image of a cross-section of a silicon-based material provided in one embodiment. As can be seen from Figure 4, the silicon layer and the amorphous carbon substrate modification layer are alternately arranged along the thickness direction.

[0146] Figure 5 shows a scanning electron microscope image of the cross-section of a negative electrode sheet prepared using the silicon-based material provided in the embodiments of this disclosure. As can be seen from Figure 5, one or both ends of some of the lamellar substrates can be bent, and some of the lamellar substrates can be cross-linked together.

[0147] [Particulate porous substrate]

[0148] In other embodiments, the substrate may be a granular porous substrate, and the composite layer is located within the voids of the granular porous substrate.

[0149] In some embodiments, the particulate porous substrate can be any of porous carbon or MOF materials.

[0150] Alternatively, the particulate porous substrate can be porous carbon.

[0151] Alternatively, the particulate porous substrate can be porous hard carbon.

[0152] MOF materials are porous structures formed by the coordination of at least one metal ion or metal ion cluster with an organic ligand. Optionally, the metal ion may include Mg. 2+ Al 3+ Ca 2+ Ti 4+ V 4+ V 3+ V 2+ Cr 3+ Mn 3+ Mn 2+ Fe 3+ Fe 2+ Co 3+ Co 2+ Ni 2+ Ni + Cu 2+ Cu + Zn 2+ Ga 3+ 、Ge 4+ 、Ge 2+ As 5+ As 3+ As+ Y 3+ Zr 4+ Mo 3+ Pd 2+ Pd + Pt 2+ Pt + Ag + Cd 2+ In 3+ La 3+ Ce 4+ Ce 3+ Hf 4+ One or more of the following. Optionally, the organic ligand may include terephthalic acid, 2-methylimidazolium, phenyl-1,2,4,5-tetracarboxylic acid, 5-nitroisophthalic acid, isophthalic acid, nicotinic acid, 3-nitrophthalic acid, imidazolium, 5-aminoisophthalic acid, isonicotinic acid, 1,3,5-tricarboxylic acid benzene, 2,3-pyridinedicarboxylic acid, 2,2'-bipyridine, 1,4-cyclohexanedicarboxylic acid, thiophene-2,5-dicarboxylic acid, pyrazine, butynedioic acid, [1,1′-biphenyl]-4-carboxylic acid, trans-1,4-cyclohexanedicarboxylic acid, cis- 1,2-Cyclohexanedicarboxylic acid, 2,3,5,6-Tetrafluoroterephthalic acid, 2-Nitroterephthalic acid, Pyrazine-2,3-dicarboxylic acid, 4,4'-Biphenyldicarboxylic acid, Fumaric acid, 3,4-Pyridinedicarboxylic acid, 2,4-Pyridinedicarboxylic acid, 4-Aminobiphenyldicarboxylic acid, Azazine salicylate, 1H-Imidazol-4,5-dicarboxylic acid, 1H-Pyrazole-3,5-dicarboxylic acid hydrate, 4,4'-Bipyridine, 3,6-Di-2-pyridyl-1,2,4,5-tetraazine, 2,5-Dibromoterephthalic acid, 2, 5-Dichloro-terephthalic acid, trans-1,2-cyclohexanedicarboxylic acid, 3,5-pyrazoledicarboxylic acid, (1R,2R)-1,2-cyclohexanedicarboxylic acid, 2,2'-biphenyl dicarboxylic acid, 3,5-pyridinedicarboxylic acid, trimellitic acid, naphthalene-1,4-dicarboxylic acid, 4-hydroxyphthalic acid, 2,5-dihydroxyterephthalic acid, 5-hydroxyisophthalic acid, 1,4-phenylene diacetic acid, 4-carboxyphenylacetic acid, 2-aminoterephthalic acid, cyclohexane-1,3-dicarboxylic acid, cis-1,4-cyclohexanedicarboxylic acid, One or more of the following: 2,6-naphthalenedicarboxylic acid, cyclohexane-1,2,4,5-tetracarboxylic acid, 2-bromo-terephthalic acid, 9-anthracarboxylic acid, 1,4-dibromo-2,5-diiodobenzene, 4,4′-dimethoxy-1,1′-biphenyl, 1-ethyl-2-methylquinoline-1-onium iodide, 1-ethyl-3-vinylimidazolium bromide, 1,3-bis(2,6-diisopropylphenyl)imidazolium chloride, iron phthalocyanine, 1,3-dibromo-5-(tert-butyl)benzene, tetrafluorophthalic acid, and tetrachlorophthalic acid hemihydrate;

[0153] Optionally, MOF materials may include any one of the following: UiO, MOF, IRMOF, ZIF, BTC, MIL, and HKUST. As an example, MOF materials may include any one of UiO-66, UiO-67, UiO-68, UiO-69, MOF-5, MOF-74, MOF-177, MOF-505, MOF-525, MOF-801, IRMOF-1, IRMOF-3, IRMOF-6, IRMOF-8, ZIF-7, ZIF-8, MIL-53, MIL-88, MIL-101, and HKUST-1.

[0154] In some embodiments, the pore size of the particulate porous substrate can be 2nm-2μm, for example, it can be 2nm, 5nm, 10nm, 20nm, 40nm, 60nm, 80nm, 100nm, 200nm, 300nm, 400nm, 500nm, 600nm, 700nm, 800nm, 900nm, 1μm, 1.1μm, 1.2μm, 1.3μm, 1.4μm, 1.5μm, 1.6μm, 1.7μm, 1.8μm, 1.9μm, 2μm, or any range of the above values.

[0155] The large pore size of the granular porous substrate can improve the specific capacity of the final silicon-based material, and it also facilitates the formation of the substrate modification layer and silicon-containing material layer within the pores of the granular porous substrate.

[0156] Optionally, the pore size of the particulate porous substrate can be 20nm-1μm, 20nm-800nm, 20nm-700nm, 20nm-600nm, 20nm-500nm, 50nm-1μm, 50nm-800nm, 50nm-700nm, 50nm-600nm, 50nm-500nm, 100nm-1μm, 100nm-800nm, 100nm-700nm, 100nm-600nm, or 100nm-500nm.

[0157] In some embodiments, the specific surface area of ​​the granular porous substrate can be 20 m². 2 / g-2000m 2 / g, for example, can be 20m 2 / g, 50m 2 / g、80m 2 / g, 100m 2 / g、200m 2 / g、300m 2 / g、400m 2 / g、500m 2 / g、600m2 / g、700m 2 / g、800m 2 / g、900m 2 / g, 1000m 2 / g、1100m 2 / g、1200m 2 / g、1300m 2 / g, 1400m 2 / g, 1500m 2 / g, 1600m 2 / g、1700m 2 / g、1800m 2 / g、1900m 2 / g、2000m 2 / g, or any range of the above values.

[0158] The large specific surface area of ​​the granular porous substrate can improve the specific capacity of the final silicon-based material and facilitate the formation of the substrate modification layer and silicon-containing material layer within the pores of the granular porous substrate.

[0159] Optionally, the specific surface area of ​​the granular porous substrate can be 20 m². 2 / g-2000m 2 / g, 20m 2 / g-1800m 2 / g, 20m 2 / g-1600m 2 / g, 50m 2 / g-1600m 2 / g, 100m 2 / g-1600m 2 / g, 200m 2 / g-1600m 2 / g.

[0160] In some embodiments, the tap density of the granular porous substrate can be 0.05 g / cm³. 3 -1g / cm 3 For example, it can be 0.05 g / cm³. 3 0.06g / cm 3 0.08g / cm 3 0.1g / cm 3 0.12g / cm 3 0.15g / cm 3 0.18g / cm 3 0.2g / cm 3 0.25g / cm 3 0.3g / cm3 0.35g / cm 3 0.4g / cm 3 0.45g / cm 3 0.5g / cm 3 0.55g / cm 3 0.6g / cm 3 0.65g / cm 3 0.7g / cm 3 0.75g / cm 3 0.8g / cm 3 0.85g / cm 3 0.9g / cm 3 0.95g / cm 3 1g / cm 3 or a range consisting of any of the above values.

[0161] Optionally, the tap density of the granular porous substrate can be 0.1 g / cm³. 3 -1g / cm 3 0.15g / cm 3 -1g / cm 3 0.2g / cm 3 -1g / cm 3 0.2g / cm 3 -0.9g / cm 3 .

[0162] In some embodiments, the volume distribution particle size Dv50 of the particulate porous substrate can be 4μm-50μm, for example, it can be 4μm, 5μm, 6μm, 7μm, 8μm, 9μm, 10μm, 11μm, 12μm, 13μm, 14μm, 15μm, 16μm, 18μm, 20μm, 22μm, 24μm, 26μm, 28μm, 30μm, 32μm, 34μm, 36μm, 38μm, 40μm, 42μm, 44μm, 46μm, 48μm, 50μm, or any range of the above values.

[0163] Optionally, the volumetric particle size Dv50 of the granular porous substrate can be 8 μm-15 μm.

[0164] [Covering layer]

[0165] In some embodiments, as shown in FIG3, the silicon-based material may further include a coating layer 4 covering the substrate.

[0166] By setting a coating layer on the substrate surface, the specific surface area of ​​silicon-based materials can be reduced, the oxidation kinetics of silicon-based materials during thermal runaway can be reduced, and the direct contact between the silicon-containing material layer and the electrolyte can be reduced, thereby improving the cycle stability of silicon-based materials and enhancing the cycle performance of secondary battery cells.

[0167] In some embodiments, the coating layer may include one or more of amorphous carbon, carbon nanofibers (VGCF), carbon nanotubes (CNT), titanium dioxide, tin oxide, niobium oxide, and solid electrolyte materials.

[0168] Optionally, the solid electrolyte material may include one or more of sulfide solid electrolyte materials, halide solid electrolyte materials, and oxide solid electrolyte materials.

[0169] Optionally, the sulfide solid electrolyte material may include one or more of the following: silver-germanium sulfide type, LGPS type, Li₂S-GeS₂ type, Li₂S-P₂S₅ type, Li₂S-SiS₂ type, and Li₂S-MeS-P₂S₅ type sulfide solid electrolyte materials. Me may include one or more of Si, Ge, Sn, and Al. Optionally, the silver-germanium sulfide type sulfide solid electrolyte material may include materials with the chemical formula Li 6±s P 1-j A j S 5±s-t B t X 1±s The material has the following properties: 0≤j<1, 0≤t<1, 0≤s<1. A includes one or more elements selected from Ge, Si, Sn, and Sb; B includes one or more elements selected from O, Se, and Te; and X includes one or more elements selected from Cl, Br, I, and F. Optionally, LGPS-type sulfide solid electrolyte materials may include those with the chemical formula Li. 10±δ5 Ge 1-g G g P 2-q Q q S 12-w W w The material has the following properties: 0≤δ5<1, 0≤g≤1, 0≤q≤2, 0≤w<1, G includes one or two elements from Si and Sn, Q includes Sb, and W includes one or more elements from O, Se, Te, Cl, Br, I, and F.

[0170] As an example, sulfide solid electrolyte materials may include Li6PS5Cl, Li6PS5Br, Li 10 GeP2S 12 Li3PS4, Li7P3S 11 One or more of them.

[0171] Optionally, the halide solid electrolyte material may be one or more of Li3YCl6, Li3YBr6, Li3ErCl6, Li3InCl6, and Li3InBr6, including but not limited to.

[0172] Optionally, the oxide solid electrolyte material may include one or more of the following: NASICON type solid electrolyte, LISICON type solid electrolyte, perovskite type solid electrolyte, and garnet type solid electrolyte.

[0173] As an example, oxide solid electrolyte materials may include, but are not limited to, Li5La3Ti2O 12 Li7La3Zr2O 12 Li4Ti5O 12 Li 14 Zn(GeO4)4, LiTi2(PO4)3, Li 1+x Al x Ti 2-x (PO4)3, Li 1+y Al y Ge 2-y One or more of (PO4)3, 0 < x < 2, 0 < y < 2.

[0174] In some embodiments, the specific surface area of ​​the silicon-based material can be 0.1 m². 2 / g-15m 2 / g, for example, can be 0.1m 2 / g, 0.2m 2 / g, 0.5m 2 / g, 0.8m 2 / g, 1m 2 / g、2m 2 / g、3m 2 / g、4m 2 / g、5m 2 / g、6m 2 / g、7m 2 / g、8m 2 / g、9m 2 / g, 10m 2 / g、11m 2 / g、12m 2 / g、13m 2 / g、14m 2 / g, 15m 2 / g, or any range of the above values.

[0175] Optionally, the specific surface area of ​​the silicon-based material can be 1m². 2 / g-10m 2 / g, 1m 2 / g-8m 2 / g, 1m 2 / g-6m 2 / g, 1m 2 / g-5m 2 / g.

[0176] In some embodiments, the tap density of the silicon-based material can be 0.5 g / cm³. 3 -1g / cm 3 For example, it can be 0.5g / cm 3 0.55g / cm 3 0.6g / cm 3 0.65g / cm 3 0.7g / cm 3 0.75g / cm 3 0.8g / cm 3 0.85g / cm 3 0.9g / cm 3 0.95g / cm 3 1g / cm 3 or a range consisting of any of the above values.

[0177] Optionally, the tap density of the silicon-based material can be 0.6 g / cm³. 3 -1g / cm 3 .

[0178] In some embodiments, the volumetric particle size Dv50 of the silicon-based material can be 4μm-50μm, for example, it can be 4μm, 5μm, 6μm, 7μm, 8μm, 9μm, 10μm, 11μm, 12μm, 13μm, 14μm, 15μm, 16μm, 18μm, 20μm, 22μm, 24μm, 26μm, 28μm, 30μm, 32μm, 34μm, 36μm, 38μm, 40μm, 42μm, 44μm, 46μm, 48μm, 50μm, or any range of the above values.

[0179] Optionally, the volumetric particle size Dv50 of the silicon-based material can be 10 μm-30 μm.

[0180] This disclosure also provides a method for preparing a silicon-based material, which can prepare the silicon-based material provided in this disclosure.

[0181] The method for preparing silicon-based materials includes the following steps: providing a substrate, the substrate having at least one containment space; first depositing a substrate modification layer in the containment space inside the substrate, then depositing a silicon-containing material layer, and then alternately depositing the substrate modification layer and the silicon-containing material layer to obtain the silicon-based material.

[0182] In some embodiments, the method for preparing silicon-based materials includes the following steps: providing a substrate, the substrate having at least one accommodating space inside; first depositing a substrate modification layer in the accommodating space inside the substrate, and then depositing a silicon-containing material layer to obtain a silicon-based material.

[0183] In some embodiments, the method for preparing silicon-based materials further includes the following step: coating a substrate surface with a coating layer to obtain a silicon-based material.

[0184] By setting a coating layer on the substrate surface, the specific surface area of ​​silicon-based materials can be reduced, the oxidation kinetics of silicon-based materials during thermal runaway can be reduced, and the direct contact between the silicon-containing material layer and the electrolyte can be reduced, thereby improving the cycle stability of silicon-based materials and enhancing the cycle performance of secondary battery cells.

[0185] Alternatively, the process of coating the substrate surface with a coating layer can be melt coating, pyrolysis carbonization, chemical vapor deposition, mechanical ball milling, etc.

[0186] Optionally, the materials used for coating may include one or more of the following: asphalt, carbon source gas, polymer materials, carbon nanofibers, carbon nanotubes, titanium dioxide, tin oxide, niobium oxide, and solid electrolyte materials.

[0187] Amorphous carbon is formed after coating with asphalt, carbon source gas, and polymer materials.

[0188] Polymer materials can be coated onto the substrate surface to form an amorphous carbon coating layer via pyrolysis and carbonization. Optionally, the polymer material may include one or more of phenolic resin, epoxy resin, starch, glucose, sucrose, polyvinylidene fluoride (PVDF), and polytetrafluoroethylene (PTFE).

[0189] A carbon source gas can be deposited onto the substrate surface using chemical vapor deposition to form an amorphous carbon coating layer. Optionally, the carbon source gas may include one or more of the following: acetylene, propylene, ethylene, methane, ethane, propane, isopropane, butane, isobutane, butene, chloroethane, fluoroethane, difluoroethane, chloromethane, fluoromethane, difluoromethane, trifluoromethane, vinyl chloride, vinyl fluoride, difluoroethylene, methylamine, formaldehyde, benzene, toluene, xylene, styrene, and phenol. Optionally, the deposition temperature may be between 500℃ and 1000℃.

[0190] In some embodiments, the method for preparing silicon-based materials further includes the following steps: coating a substrate surface with a coating layer and then shaping it to obtain the silicon-based material.

[0191] During the shaping process, different lamellar substrates come into contact, are squeezed, and bend. For example, one or both ends of the lamellar substrate are bent. The gaps between the lamellar structures at the bent position are large, which can provide a buffer space for the volume expansion of the silicon-containing material layer during the subsequent cycle charging and discharging of the secondary battery cell.

[0192] In some embodiments, the process of depositing a substrate modification layer within the containment space inside the substrate may include, but is not limited to, chemical vapor deposition, thermal evaporation, magnetron sputtering, etc.

[0193] In some embodiments, the step of depositing a substrate modification layer in a containment space inside the substrate includes the following steps: introducing a mixture of carbon source gas and protective gas into a chemical vapor deposition apparatus, and depositing the substrate modification layer in a containment space inside the substrate by vapor deposition.

[0194] Optionally, the carbon source gas may include one or more of the following: acetylene, propylene, ethylene, methane, ethane, propane, isopropane, butane, isobutane, butene, chloroethane, fluoroethane, difluoroethane, chloromethane, fluoromethane, difluoromethane, trifluoromethane, vinyl chloride, vinyl fluoride, difluoroethylene, methylamine, formaldehyde, benzene, toluene, xylene, styrene, and phenol.

[0195] Optionally, the deposition temperature can be 500℃-800℃.

[0196] Optionally, the protective gas may include one or more of nitrogen, argon, and helium.

[0197] The thickness of the substrate modification layer can be adjusted by regulating parameters such as deposition temperature and time.

[0198] By using carbon source gas for deposition at low temperatures, a loose and porous sponge-like carbon layer can be formed. Its surface has abundant defects and some dangling bonds, which can not only enhance the adsorption force of the substrate modification layer on the silicon-containing material layer, but also provide a buffer space for the volume expansion of the silicon-containing material layer during charging and discharging.

[0199] In some embodiments, the process of depositing a silicon-containing material layer within the containment space inside the substrate may include, but is not limited to, silane pyrolysis, silicon thermal evaporation, and silicon target magnetron sputtering.

[0200] Alternatively, the process of depositing a silicon-containing material layer within the containment space inside the substrate can employ silane pyrolysis. Silane pyrolysis can form discontinuous sheet-like or island-like film structures.

[0201] In some embodiments, the step of depositing a silicon-containing material layer within a containment space inside the substrate includes the following steps: introducing a mixture of silicon source gas and protective gas into a chemical vapor deposition apparatus, and depositing a silicon-containing material layer within a containment space inside the substrate by vapor deposition.

[0202] Optionally, the silicon source gas may include silicon gas, silicon oxide gas, silicon alloy gas, silane (H4Si), silane (H6Si2), propane (H8Si3), silicon tetrachloride (Cl4Si), trichlorosilane (Cl3HSi), dichlorosilane (Cl2H2Si), chlorosilane (ClH3Si), silicon tetrafluoride (F4Si), trifluorosilane (F3HSi), difluorosilane (F2H2Si), fluorosilane (FH3Si), hexachlorodisilane (Cl6Si2), pentachlorodisilane (Cl5HSi2), 1,1,2,2-tetrachlorodisilane, 1,1,1,2-tetrachlorodisilane, 1,1,2-trichlorodisilane, 1,1,1-trichlorodisilane, 1,1-dichlorodisilane, 1,2-dichlorodisilane, and monochlorodisilane (ClH5Si). 2. One or more of the following: hexafluorodisilane F6Si2, pentafluorodisilane F5HSi2, 1,1,2,2-tetrafluorodisilane F4H2Si2, 1,1,1-trifluorodisilane F3H3Si2, 1,1-difluorodisilane, 1,2-difluorodisilane, monofluorodisilane FH5Si2, methylsilane, ethylsilane, dimethylsilane, trimethylsilane, tetramethylsilane, methyldisilane, dimethyldisilane, trimethyldisilane, tetramethyldisilane, hexamethylsilane, methyltrichlorosilane, methylchlorosilane, chloroethylsilane, dichlorodimethylsilane, dichlorodiethylsilane, tri(trimethylsilyl)silane, hexamethyldisilane, methylvinyldichlorosilane, dimethylvinylchlorosilane, and vinyltrichlorosilane.

[0203] Alternatively, the deposition temperature can be 450℃-650℃.

[0204] Optionally, the protective gas may include one or more of nitrogen, argon, and helium.

[0205] The thickness of the silicon-containing material layer can be adjusted by regulating parameters such as deposition temperature and time.

[0206] This disclosure also provides a secondary battery cell.

[0207] The secondary battery cells provided in the embodiments of this disclosure may include, but are not limited to, lithium battery cells, such as lithium-ion battery cells.

[0208] The secondary battery cell provided in the embodiments of this disclosure includes an electrode assembly, which includes a negative electrode, a positive electrode, and a separator, with the separator disposed between the negative and positive electrode. The electrode assembly can be a wound structure or a stacked structure, and the embodiments of this disclosure are not limited in this regard. The secondary battery cell also includes an outer packaging, which can be used to encapsulate the electrode assembly. The outer packaging can be a hard shell, such as a hard plastic shell, an aluminum shell, or a steel shell. The outer packaging can also be a soft package, such as a pouch. The material of the soft package can be plastic, such as aluminum-plastic film, polypropylene, polybutylene terephthalate (PBT), and polybutylene succinate (PBS) or one or more of these materials.

[0209] [Negative electrode plate]

[0210] In some embodiments, the negative electrode sheet may include a negative current collector and a negative electrode film layer disposed on at least one surface of the negative current collector and comprising a negative electrode active material, wherein the negative electrode active material includes the silicon-based material provided in the embodiments of this disclosure. The negative current collector has two surfaces opposite to each other in its thickness direction, and the negative electrode film layer is disposed on either or both of the two opposite surfaces of the negative current collector.

[0211] In some embodiments, the negative electrode active material may also include other negative electrode active materials, such as one or more of natural graphite, artificial graphite, soft carbon, hard carbon, and lithium titanate, including but not limited to natural graphite, artificial graphite, soft carbon, hard carbon, and lithium titanate.

[0212] In some embodiments, the negative electrode film layer may further include a negative electrode conductive agent. As an example, the negative electrode conductive agent may include, but is not limited to, one or more of superconducting carbon, conductive graphite, acetylene black, carbon black, Ketjen black, carbon dots, carbon nanotubes, graphene, and carbon nanofibers.

[0213] In some embodiments, the negative electrode film layer may further include a negative electrode binder. As an example, the negative electrode binder may include, but is not limited to, one or more of styrene-butadiene rubber (SBR), water-soluble unsaturated resin SR-1B, waterborne acrylic resins (e.g., polyacrylic acid PAA, polymethacrylic acid PMAA, sodium polyacrylate PAAS), polyacrylamide (PAM), polyvinyl alcohol (PVA), sodium alginate (SA), and carboxymethyl chitosan (CMCS).

[0214] In some embodiments, the negative electrode film layer may also include other additives. As an example, other additives may include thickeners, such as sodium carboxymethyl cellulose (CMC), PTC thermistor materials, etc.

[0215] In some embodiments, the negative electrode current collector may be a metal foil or a composite current collector. As an example of a metal foil, copper foil may be used. The composite current collector may include a polymeric material substrate and a metal material layer formed on at least one surface of the polymeric material substrate. As an example, the metal material may include, but is not limited to, one or more of copper, copper alloys, nickel, nickel alloys, titanium, titanium alloys, silver, and silver alloys. As an example, the polymeric material substrate may include, but is not limited to, one or more of polypropylene, polyethylene terephthalate (PET), polybutylene terephthalate (PBT), polystyrene, and polyethylene.

[0216] The negative electrode film is typically formed by coating a negative electrode slurry onto a negative electrode current collector, followed by drying and cold pressing. The negative electrode slurry is usually formed by dispersing the negative electrode active material, negative electrode conductive agent, negative electrode binder, and other optional additives in a solvent and stirring until homogeneous. The solvent can be N-methylpyrrolidone (NMP) or deionized water, but is not limited to these.

[0217] The negative electrode sheet does not exclude other additional functional layers besides the negative electrode film layer. For example, in some embodiments, the negative electrode sheet also includes a conductive undercoat layer (e.g., composed of a conductive agent and a binder) sandwiched between the negative electrode current collector and the negative electrode film layer and disposed on the surface of the negative electrode current collector.

[0218] [Positive electrode plate]

[0219] In some embodiments, the positive electrode may include a positive current collector and a positive electrode film layer disposed on at least one surface of the positive current collector and comprising a positive electrode active material. The positive current collector has two surfaces opposite each other in its thickness direction, and the positive electrode film layer is disposed on either or both of the two opposite surfaces of the positive current collector.

[0220] The positive electrode active material may include, but is not limited to, one or more of lithium transition metal oxides, lithium phosphates, and their respective modified compounds.

[0221] Examples of lithium transition metal oxides may include, but are not limited to, one or more of lithium cobalt oxides, lithium nickel oxides, lithium manganese oxides, lithium nickel cobalt oxides, lithium manganese cobalt oxides, lithium nickel manganese oxides, lithium nickel cobalt manganese oxides, lithium nickel cobalt aluminum oxides, and their respective modified compounds.

[0222] Examples of lithium phosphates may include, but are not limited to, lithium iron phosphate, lithium iron phosphate and carbon composites, lithium manganese phosphate, lithium manganese phosphate and carbon composites, lithium manganese iron phosphate, lithium manganese iron phosphate and carbon composites, and one or more of their respective modified compounds.

[0223] In some embodiments, to further improve the energy density of a secondary battery cell, the positive electrode active material may include materials of the general formula Li.a Ni b Co c M d O e A f One or more of lithium transition metal oxides and their modified compounds. 0.8≤a≤1.2, 0.5≤b<1, 0<c<1, 0<d<1, 1≤e≤2, 0≤f≤1, M includes but is not limited to one or more of Mn, Al, Zr, Zn, Cu, Cr, Mg, Fe, V, Ti and B, and A includes but is not limited to one or more of N, F, S and Cl.

[0224] As an example, the positive electrode active material may include, but is not limited to, LiCoO2, LiNiO2, LiMnO2, LiMn2O4, and LiNi 1 / 3 Co 1 / 3 Mn 1 / 3 O2 (abbreviated as NCM333), LiNi 0.5 Co 0.2 Mn 0.3 O2 (abbreviated as NCM523), LiNi 0.5 Co 0.25 Mn 0.25 O2 (abbreviated as NCM211), LiNi 0.6 Co 0.2 Mn 0.2 O2 (abbreviated as NCM622), LiNi 0.8 Co 0.1 Mn 0.1 O2 (abbreviated as NCM811), LiNi 0.83 Mn 0.08 Co 0.07 O2 (abbreviated as Ni83), LiNi 0.90 Mn 0.05 Co 0.05 O2 (abbreviated as Ni90), LiNi 0.94 Mn 0.03 Co 0.03 O2 (abbreviated as Ni94), LiNi 0.96 Co 0.02 Mn 0.02 O2 (abbreviated as Ni96), LiNi 0.80 Co 0.15 Al 0.05 One or more of O2, LiFePO4, LiMnPO4 and their respective modified materials.

[0225] During the charging and discharging process, Li undergoes insertion / extraction and consumption in a single secondary battery cell, resulting in varying molar Li content at different discharge states. In the examples of positive electrode active materials in this disclosure, the molar Li content represents the initial state of the material, i.e., the state before feeding. When the positive electrode active material is applied to a secondary battery cell, the molar Li content changes after charge-discharge cycles. Similarly, in the examples of positive electrode active materials in this disclosure, the molar O content is only a theoretical value. Lattice oxygen release causes changes in the molar O content, and the actual molar O content will also fluctuate.

[0226] The modified compounds for the above-mentioned positive electrode active materials can be obtained by doping and / or surface coating of the positive electrode active materials.

[0227] In some embodiments, the positive electrode film layer may further include a positive electrode conductive agent. As an example, the positive electrode conductive agent may include, but is not limited to, one or more of superconducting carbon, conductive graphite, acetylene black, carbon black, Ketjen black, carbon dots, carbon nanotubes, graphene, and carbon nanofibers.

[0228] In some embodiments, the positive electrode film layer may further include a positive electrode binder. As an example, the positive electrode binder may include, but is not limited to, one or more of polyvinylidene fluoride (PVDF), polytetrafluoroethylene (PTFE), vinylidene fluoride-tetrafluoroethylene-propylene terpolymer, vinylidene fluoride-hexafluoropropylene-tetrafluoroethylene terpolymer, tetrafluoroethylene-hexafluoropropylene copolymer, and fluorinated acrylate resins.

[0229] In some embodiments, the positive current collector may be a metal foil or a composite current collector. An example of a metal foil is aluminum foil. The composite current collector may include a polymeric material substrate and a metal material layer formed on at least one surface of the polymeric material substrate. As an example, the metal material may include, but is not limited to, one or more of aluminum, aluminum alloys, nickel, nickel alloys, titanium, titanium alloys, silver, and silver alloys. As an example, the polymeric material substrate may include, but is not limited to, one or more of polypropylene, polyethylene terephthalate (PET), polybutylene terephthalate (PBT), polystyrene, and polyethylene.

[0230] The positive electrode film is typically formed by coating a positive electrode slurry onto a positive electrode current collector, followed by drying and cold pressing. The positive electrode slurry is usually formed by dispersing positive electrode active materials, positive electrode conductive agents, positive electrode binders, and any other components in a solvent and stirring until homogeneous. The solvent can be N-methylpyrrolidone (NMP), but is not limited to this.

[0231] [Isolation Component]

[0232] The separator can be a single component located between the positive and negative electrodes, or it can be attached to the surface of either the positive or negative electrode.

[0233] In some embodiments, the separator may be a separator membrane. This disclosure does not impose any particular limitation on the type of separator membrane; any known porous separator membrane with good chemical and mechanical stability may be selected.

[0234] As an example, the main material of the separator can be selected from at least one of glass fiber, non-woven fabric, polyethylene, polypropylene, polyvinylidene fluoride, and ceramics. The separator can be a single-layer film or a multi-layer composite film, without particular limitation. When the separator is a multi-layer composite film, the materials of each layer can be the same or different, without particular limitation.

[0235] Alternatively, an inorganic particle coating, an organic particle coating, or an organic / inorganic composite coating may be applied to the surface of the separator.

[0236] In some embodiments, the separator may be a solid electrolyte sheet, which includes a solid electrolyte material. Optionally, the solid electrolyte material may include one or more of sulfide solid electrolyte materials, halide solid electrolyte materials, oxide solid electrolyte materials, and polymer solid electrolyte materials. The types of sulfide solid electrolyte materials, halide solid electrolyte materials, oxide solid electrolyte materials, and polymer solid electrolyte materials can be found above and will not be repeated here.

[0237] In some embodiments, the solid electrolyte sheet may or may not include a binder, depending on the manufacturing process of the battery cell. Optionally, the binder may include, but is not limited to, one or more of the following: polyvinylidene fluoride (PVDF), polytetrafluoroethylene (PTFE), ethylene-tetrafluoroethylene-propylene terpolymer, ethylene-hexafluoropropylene-tetrafluoroethylene terpolymer, tetrafluoroethylene-hexafluoropropylene copolymer, fluorinated acrylate resin, styrene-butadiene rubber (SBR), water-soluble unsaturated resin SR-1B, methyl vinyl silicone rubber, nitrile rubber (NBR), hydrogenated nitrile rubber (HNBR), thermoplastic styrene-butadiene rubber (SBS), isoprene rubber, cis-butadiene rubber (BR), ethyl cellulose, fluororubber, and acrylate rubber.

[0238] In some embodiments, the secondary battery cell includes an electrolyte, which includes an electrolyte salt and an organic solvent.

[0239] Optionally, the electrolyte salt may be one or more of lithium hexafluorophosphate (LiPF6), lithium tetrafluoroborate (LiBF4), lithium perchlorate (LiClO4), lithium hexafluoroarsenate (LiAsF6), lithium bis(fluorosulfonyl)imide (LiFSI), lithium bis(trifluoromethanesulfonyl)imide (LiTFSI), lithium trifluoromethanesulfonate (LiTFS), lithium difluorooxalate borate (LiDFOB), lithium dioxalate borate (LiBOB), lithium difluorophosphate (LiPO2F2), lithium difluorodioxalate phosphate (LiDFOP), and lithium tetrafluorooxalate phosphate (LiTFOP).

[0240] Optionally, the organic solvent may include, but is not limited to, one or more of the following: ethylene carbonate (EC), propylene carbonate (PC), methyl ethyl carbonate (EMC), diethyl carbonate (DEC), dimethyl carbonate (DMC), dipropyl carbonate (DPC), methyl propyl carbonate (MPC), ethyl propyl carbonate (EPC), butyl carbonate (BC), methyl formate (MF), methyl acetate (MA), ethyl acetate (EA), propyl acetate (PA), methyl propionate (MP), ethyl propionate (EP), propyl propionate (PP), methyl butyrate (MB), ethyl butyrate (EB), 1,4-butyrolactone (GBL), sulfolane (SF), dimethyl sulfone (MSM), methyl ethyl sulfone (EMS), diethyl sulfone (ESE), ethylene glycol dimethyl ether, ethylene glycol diethyl ether, diethylene glycol dimethyl ether, triethylene glycol dimethyl ether, tetraethylene glycol dimethyl ether, 1,3-dioxolane, tetrahydrofuran, methyl tetrahydrofuran, diphenyl ether, and crown ether.

[0241] In some embodiments, the electrolyte may also include additives. For example, the additives may include negative electrode film-forming additives, positive electrode film-forming additives, and additives that can improve certain properties of the secondary battery cell, such as additives that improve overcharge performance, additives that improve high-temperature performance, additives that improve low-temperature performance, etc.

[0242] Optionally, the additive may include one or more of fluoroethylene carbonate (FEC), vinylene carbonate (VC), 1,3-propanesulfonate lactone (PS), and vinyl sulfate (DTD).

[0243] Methods for preparing secondary battery cells are well known. In some embodiments, a positive electrode, a separator, a negative electrode, and an electrolyte can be assembled to form a secondary battery cell. As an example, the positive electrode, separator, and negative electrode can be made into an electrode assembly, which is then placed in an outer packaging, dried, and injected with electrolyte. After standing and formation processes, a secondary battery cell is obtained.

[0244] Example

[0245] The following examples describe the contents of this disclosure in more detail. These examples are merely illustrative, as various modifications and variations will be apparent to those skilled in the art within the scope of this disclosure. Unless otherwise stated, all parts, percentages, and ratios reported in the following examples are based on mass, and all reagents used in the examples are commercially available or synthesized by conventional methods and can be used directly without further processing, and the instruments used in the examples are commercially available.

[0246] Example 1

[0247] Preparation of silicon-based materials

[0248] Layered graphite was obtained using supercritical CO2 exfoliation as the substrate. The layered graphite had a volumetric particle size distribution (Dv50) of 24 μm, a graphitization degree of 96%, and a specific surface area of ​​16.4 m². 2 / g, tap density is 0.47g / cm³ 3 .

[0249] Amorphous carbon layers and nano-silicon layers were deposited in a fluidized bed chemical vapor deposition (FCVD) system. First, acetylene gas was introduced into an argon-protected atmosphere to deposit an amorphous carbon layer between the layers of sheet graphite at a carbonization temperature of 600°C. Then, silane gas was introduced into an argon-protected atmosphere to deposit a nano-silicon layer between the layers of sheet graphite at a deposition temperature of 550°C. Subsequently, amorphous carbon and nano-silicon layers were deposited alternately between the layers of sheet graphite. During the deposition of the nano-silicon layer, the powder resistivity was monitored. When the powder resistivity suddenly increased, the interlayer of sheet graphite reached adsorption saturation. At this point, the introduction of silane gas was stopped, and acetylene gas was introduced instead, forming an amorphous carbon coating layer on the surface of the sheet graphite. This was then shaped to obtain a silicon-based material. The interlayer of the sheet graphite contained four amorphous carbon layers and three nano-silicon layers, with the amorphous carbon layers exhibiting a porous structure.

[0250] Preparation of negative electrode sheet

[0251] The silicon-based material prepared above was used as the negative electrode active material and added to deionized water at a mass ratio of 80:10:10 with the negative electrode conductive agent carbon black and the negative electrode binder polyacrylic acid. After thorough stirring and mixing, a negative electrode slurry was prepared. The negative electrode slurry was uniformly coated on the negative electrode current collector copper foil, and then dried, cold-pressed and slit to obtain the negative electrode sheet.

[0252] Preparation of positive electrode sheet

[0253] LiNi, the positive electrode active material 0.8 Co 0.1 Mn 0.1O2, positive electrode binder polyvinylidene fluoride (PVDF), and positive electrode conductive agent carbon black are added to N-methylpyrrolidone (NMP) in a mass ratio of 98:1:1 and thoroughly mixed to prepare a positive electrode slurry. The positive electrode slurry is then uniformly coated onto the positive electrode current collector aluminum foil, and subsequently dried, cold-pressed, and slit to obtain the positive electrode sheet.

[0254] Preparation of the separating membrane

[0255] Commercially available polyethylene film with a thickness of 13μm was used as the separator.

[0256] Preparation of electrolyte

[0257] At 25°C, ethylene carbonate (EC), diethyl carbonate (DEC), and dimethyl carbonate (DMC) were mixed in a volume ratio of 1:1:1 to obtain a mixed solvent. LiPF6 was then dissolved in the mixed solvent to obtain the electrolyte. The concentration of LiPF6 was 1 mol / L.

[0258] Preparation of secondary battery cells

[0259] The electrodes are arranged in the order of "separator-negative electrode sheet-separator-positive electrode sheet". One end of the positive electrode sheet, negative electrode sheet and separator is fixed to the discharge roller, and the other end is stacked together and fixed to the winding shaft. The winding shaft is rotated by a motor to wind the positive electrode sheet, negative electrode sheet and separator to obtain the electrode assembly. After the electrode assembly is placed in the outer packaging and dried, the electrolyte is injected. Then, after standing, formation and other processes, the secondary battery cell is obtained.

[0260] Comparative Example 1

[0261] Preparation of silicon-based materials

[0262] Porous hard carbon was used as the substrate. The porous hard carbon had a volumetric particle size (Dv50) of 9 μm and a specific surface area of ​​1800 m². 2 / g, tap density is 0.4g / cm³ 3 .

[0263] In a fluidized bed chemical vapor deposition (FCVD) system, silane gas is introduced under an argon protective atmosphere to deposit silicon within the pores of porous hard carbon at a deposition temperature of 550°C. Then, acetylene gas is introduced to coat an amorphous carbon coating layer using FCVD, resulting in a silicon-based material.

[0264] Comparative Example 2

[0265] Preparation of silicon-based materials

[0266] Layered graphite was obtained using supercritical CO2 exfoliation as the substrate. The layered graphite had a volumetric particle size distribution (Dv50) of 24 μm, a graphitization degree of 96%, and a specific surface area of ​​16.4 m².2 / g, tap density is 0.47g / cm³ 3 .

[0267] In a fluidized bed chemical vapor deposition (CVD) apparatus, silane gas is introduced under an argon protective atmosphere to deposit silicon between layers of sheet graphite at a deposition temperature of 550°C. Then, acetylene gas is introduced to coat an amorphous carbon coating layer via CVD, followed by shaping to obtain a silicon-based material. The silane gas flow rate is the same as in Example 1, and the silane gas deposition time is the same as the total silane gas deposition time in Example 1.

[0268] Comparative Example 3

[0269] Preparation of silicon-based materials

[0270] Layered graphite was obtained using supercritical CO2 exfoliation as the substrate. The layered graphite had a volumetric particle size distribution (Dv50) of 24 μm, a graphitization degree of 96%, and a specific surface area of ​​16.4 m². 2 / g, tap density is 0.47g / cm³ 3 .

[0271] Nanoscale silicon layers and amorphous carbon layers were deposited in a fluidized bed chemical vapor deposition (FCVD) apparatus. First, silane gas was introduced into the interlayer of sheet graphite under an argon protective atmosphere to deposit a nanoscale silicon layer at a deposition temperature of 550°C. Then, acetylene gas was introduced into the interlayer of sheet graphite under an argon protective atmosphere to deposit an amorphous carbon layer at a carbonization temperature of 600°C. Subsequently, nanoscale silicon layers were deposited into the interlayer of sheet graphite. During the deposition process, the flow rate of silane gas was the same as in Example 1, and the total deposition time of silane gas was the same as in Example 1. After reaching the same deposition time, the introduction of silane gas was stopped, and acetylene gas was introduced instead. Once the interlayer of sheet graphite reached adsorption saturation (monitoring the specific surface area of ​​the material during deposition), acetylene gas was continued to form an amorphous carbon coating layer on the surface of the sheet graphite. Following this, shaping was performed to obtain a silicon-based material. The interlayer of sheet graphite has 4 nano-silicon layers and 3 amorphous carbon layers, with the amorphous carbon layers having a porous structure.

[0272] Performance testing

[0273] (1) Test of the mass percentage of Si element in silicon-based materials

[0274] The mass percentage of Si in silicon-based materials was measured using an inductively coupled plasma optical emission spectrometer (ICP). The testing standard can be found in JY / T 015 1996.

[0275] (2) Specific surface area test of silicon-based materials

[0276] The specific surface area of ​​silicon-based materials was measured according to GB / T 19587-2017 using the nitrogen adsorption specific surface area analysis method and calculated using the BET (Brunauer Emmett Teller) method. The testing instrument was a Tri-Star 3020 specific surface area and pore size analyzer from Micromeritics, USA.

[0277] (3) Specific capacity and initial coulombic efficiency tests of silicon-based materials

[0278] A coin cell was obtained by using a lithium sheet as the counter electrode, and assembling it with the prepared negative electrode sheet, the same separator and electrolyte as in Example 1.

[0279] At 25°C, the coin cell was discharged at a constant current of 0.1C to a discharge cutoff voltage of 5mV, then discharged at a constant voltage until the current was less than or equal to 0.05C, and allowed to stand for 5 minutes to obtain the initial discharge capacity. The coin cell was then charged at a constant current of 0.1C to a cutoff voltage of 0.8V to obtain the 0.8V charging capacity. Initial coulombic efficiency = 0.8V charging capacity / initial discharge capacity × 100%. 0.8V specific capacity (mAh / g) = 0.8V charging capacity / mass of silicon-based material.

[0280] (4) Cycle performance test of secondary battery cells

[0281] At 25℃, a single secondary battery cell was charged at a constant current of 0.1C to 4.25V, then charged at a constant voltage of 4.25V to a current of 0.05C, allowed to stand for 5 minutes, and then discharged at a constant current of 0.1C to 2.5V. This charging and discharging process was repeated, and the charging and discharging capacities of the single secondary battery cell after 20 cycles were recorded. The coulombic efficiency of the single secondary battery cell after 20 cycles = (discharge capacity of the 20th cycle / charging capacity of the 20th cycle) × 100%.

[0282] (5) Heat generation test of secondary battery cells

[0283] At 25℃, the secondary battery cell was charged at a constant current of 0.1C to 4.25V, and then charged at a constant voltage of 4.25V until the current was 0.05C, at which point the secondary battery cell was fully charged. The fully charged secondary battery cell was disassembled in a glove box, and the positive electrode, separator, and negative electrode were cut to appropriate sizes and placed together with the electrolyte in a differential scanning calorimeter for testing. The test started at 35℃, ended at 490℃, and the heating rate was 10℃ / min. The total heat release was calculated by integrating the area under the DSC curve. Heat generation = Total heat release / Sample mass.

[0284] Table 1

[0285] Table 2

[0286] Table 3

[0287] As can be seen from the test results of Example 1 and Comparative Examples 1 to 3, this disclosure enables the silicon-based material to have high specific capacity while the secondary battery cell has low heat generation, high initial coulombic efficiency and good cycle performance by alternately distributing a substrate modification layer and a silicon-containing material layer in the accommodating space of the substrate and making at least one substrate modification layer in contact with the substrate.

[0288] Comparative Example 2 involves direct deposition of silicon between layers of sheet graphite. Due to the limited number of active sites on the surface of sheet graphite, silicon cannot be effectively deposited, resulting in a low Si content in the silicon-based material, low specific capacity of the silicon-based material, and low initial coulombic efficiency of the secondary battery cell.

[0289] Comparative Example 3 first deposits silicon between the layers of sheet graphite. Due to the small number of active sites on the surface of sheet graphite, silicon cannot be effectively deposited, resulting in a low mass ratio of Si element in the silicon-based material, low specific capacity of the silicon-based material, and low initial coulombic efficiency of the secondary battery cell.

[0290] Example 1-1

[0291] Except for the following differences, the preparation process of the secondary battery cell is the same as that in Example 1.

[0292] Preparation of silicon-based materials

[0293] Layered graphite was obtained using supercritical CO2 exfoliation as the substrate. The layered graphite had a volumetric particle size distribution (Dv50) of 24 μm, a graphitization degree of 96%, and a specific surface area of ​​16.4 m². 2 / g, tap density is 0.47g / cm³ 3 .

[0294] Amorphous carbon layers and nano-silicon layers were deposited in a fluidized bed chemical vapor deposition (FCVD) system. First, acetylene gas was introduced into an argon-protected atmosphere to deposit amorphous carbon layers between the layers of sheet graphite at a carbonization temperature of 600°C. Then, silane gas was introduced into the same argon-protected atmosphere to deposit nano-silicon layers between the layers at a deposition temperature of 550°C. Subsequently, amorphous carbon and nano-silicon layers were deposited alternately between the layers of sheet graphite. Then, acetylene gas was introduced until the interlayer of sheet graphite reached adsorption saturation (the specific surface area of ​​the material was monitored during deposition). Acetylene gas was then continued to be introduced to form an amorphous carbon coating layer on the surface of the sheet graphite. The material was then shaped to obtain a silicon-based material. The interlayer of the sheet graphite contained 7 amorphous carbon layers and 6 nano-silicon layers, with the amorphous carbon layers exhibiting a porous structure.

[0295] Examples 1-2

[0296] Except for the following differences, the preparation process of the secondary battery cell is the same as that in Example 1.

[0297] Preparation of silicon-based materials

[0298] Layered graphite was obtained using supercritical CO2 exfoliation as the substrate. The layered graphite had a volumetric particle size distribution (Dv50) of 24 μm, a graphitization degree of 96%, and a specific surface area of ​​16.4 m². 2 / g, tap density is 0.47g / cm³ 3 .

[0299] Amorphous carbon layers and nano-silicon layers were deposited in a fluidized bed chemical vapor deposition (FCVD) system. First, acetylene gas was introduced into the interlayer of sheet graphite under an argon protective atmosphere to deposit an amorphous carbon layer at a carbonization temperature of 600°C. Then, silane gas was introduced into the interlayer of sheet graphite under an argon protective atmosphere to deposit a nano-silicon layer at a deposition temperature of 550°C. During the deposition of the nano-silicon layer, the powder resistivity was monitored. When the powder resistivity suddenly increased, the interlayer of sheet graphite reached adsorption saturation. At this point, the introduction of silane gas was stopped, and acetylene gas was introduced instead, forming an amorphous carbon coating layer on the surface of the sheet graphite. Subsequent shaping yielded a silicon-based material. The interlayer of the sheet graphite contained two amorphous carbon layers and one nano-silicon layer, with the amorphous carbon layers exhibiting a porous structure.

[0300] Table 4

[0301] As shown in Table 4, increasing the number of amorphous carbon layers and nano-silicon layers between the layers of sheet graphite helps to buffer the volume expansion of silicon-containing material layers and improve the cycle stability of silicon-based materials. It also helps to reduce the specific surface area of ​​silicon-containing materials, reducing the risk of particle breakage due to volume expansion during the cycle charge and discharge of silicon-containing materials. This can reduce the side reactions between silicon-containing material layers and electrolytes, thereby further improving the cycle performance of secondary battery cells.

[0302] Example 2-1

[0303] Except for the following differences, the preparation process of the secondary battery cell is the same as that in Example 1.

[0304] Preparation of silicon-based materials

[0305] Layered graphite was obtained using supercritical CO2 exfoliation as the substrate. The layered graphite had a volumetric particle size distribution (Dv50) of 24 μm, a graphitization degree of 96%, and a specific surface area of ​​16.4 m². 2 / g, tap density is 0.47g / cm³ 3 .

[0306] SnO2 and nano-silicon layers were deposited in a fluidized bed chemical vapor deposition (FCVD) system. First, tin tetrachloride gas was introduced using oxygen as a carrier gas to deposit SnO2 layers between the layers of sheet graphite at a deposition temperature of 350°C. Then, silane gas was introduced under an argon protective atmosphere to deposit nano-silicon layers between the layers of sheet graphite at a deposition temperature of 550°C. Subsequently, SnO2 and nano-silicon layers were deposited alternately between the layers of sheet graphite. During the deposition of the nano-silicon layers, the powder resistivity was monitored. When the powder resistivity suddenly increased, the interlayer of sheet graphite reached adsorption saturation. At this point, the introduction of silane gas was stopped, and acetylene gas was introduced instead, forming an amorphous carbon coating layer on the surface of the sheet graphite. This was then shaped to obtain a silicon-based material. The interlayer of the sheet graphite contained four SnO2 layers and three nano-silicon layers.

[0307] Table 5

[0308] As shown in Table 5, the test results indicate that using amorphous carbon as a substrate modification layer can further improve the cycle performance of secondary battery cells.

[0309] It should be noted that this disclosure is not limited to the above-described embodiments. The above embodiments are merely examples, and any embodiments with the same essential structure and achieving the same effect as the technical concept within the scope of this disclosure are included in the technical scope of this disclosure. Furthermore, various modifications that can be conceived by those skilled in the art to the embodiments, and other ways of constructing by combining some of the constituent elements of the embodiments, are also included in the scope of this disclosure without departing from the spirit of this disclosure.

Claims

1. A silicon-based material, wherein, The silicon-based material includes: A substrate, the substrate including at least one receiving space therein; and A composite layer is located within the accommodating space. The composite layer includes a substrate modification layer and a silicon-containing material layer that are alternately arranged along the thickness direction, and at least one substrate modification layer is in contact with the substrate.

2. The silicon-based material according to claim 1, wherein, Both ends of the composite layer along the thickness direction are substrate modification layers, and the substrate modification layers are in contact with the substrate.

3. The silicon-based material according to any one of claims 1-2, wherein, The number of layers in the substrate modification layer is greater than the number of layers in the silicon-containing material layer; and / or, The number of layers in the substrate modification layer is 2 to 21; and / or, The number of silicon-containing material layers is 1 to 20.

4. The silicon-based material according to claim 3, wherein, The number of layers in the substrate modification layer is 3 to 8; and / or, The number of silicon-containing material layers can be selected from 2 to 7.

5. The silicon-based material according to any one of claims 1-4, wherein, The thickness of each substrate modification layer is 0.5nm-100nm, optionally 0.5nm-20nm; and / or, The thickness of each silicon-containing material layer is 0.5nm-100nm, and can be selected as 2nm-20nm.

6. The silicon-based material according to any one of claims 1-5, wherein, The substrate modification layer comprises one or more of amorphous carbon, ZnO, CdO, Cr2O3, Al2O3, SnO2, and indium tin oxide; and / or, The silicon-containing material layer includes one or more of crystalline silicon, amorphous silicon, silicon oxide, silicon carbide, silicon nitride, and alloy silicon.

7. The silicon-based material according to any one of claims 1-6, wherein, The substrate modification layer has a porous structure.

8. The silicon-based material according to any one of claims 1-7, wherein, The substrate includes at least one of a sheet-like substrate and a granular porous substrate.

9. The silicon-based material according to any one of claims 1-8, wherein, The substrate is a sheet-like substrate, and the composite layer is located between the layers of the sheet-like substrate.

10. The silicon-based material according to claim 9, wherein, The number of sheets in the lamellar substrate is 2 to 50, and can be selected as 2 to 20.

11. The silicon-based material according to any one of claims 9-10, wherein, The layered substrate is any one of layered graphite, expanded graphite, MXene material, molybdenum disulfide, and tungsten disulfide.

12. The silicon-based material according to any one of claims 9-11, wherein, The lamellar substrate satisfies at least one of the following conditions (1) to (5): (1) The thickness of a single layer is 1nm-100nm, and can be selected as 2nm-20nm; (2) The interlayer spacing of the sheet-like substrate is 2nm-100nm, and can be selected as 2nm-50nm; (3) The specific surface area of ​​the layered substrate is 10 m². 2 / g-500m 2 / g, optional 15m 2 / g-50m 2 / g; (4) The tap density of the lamellar substrate is 0.05 g / cm³. 3 -0.6g / cm 3 The option is 0.15g / cm³. 3 -0.5g / cm 3 ; (5) The volume distribution particle size Dv50 of the lamellar substrate is 4μm-50μm, and can be selected as 8μm-30μm.

13. The silicon-based material according to any one of claims 9-12, wherein, The lamellar substrate is lamellar graphite or expanded graphite, and the degree of graphitization of the lamellar substrate is greater than or equal to 80%, preferably greater than or equal to 94%.

14. The silicon-based material according to any one of claims 9-13, wherein, One or both ends of the lamellar substrate are curved; and / or, at least a portion of the adjacent lamellar substrates are cross-linked together.

15. The silicon-based material according to any one of claims 1-8, wherein, The substrate is a granular porous substrate, and the composite layer is located within the voids of the granular porous substrate.

16. The silicon-based material according to claim 15, wherein, The granular porous substrate is either porous carbon or MOF material.

17. The silicon-based material according to any one of claims 15-16, wherein, The granular porous substrate satisfies at least one of the following conditions (1) to (4): (1) The pore size of the granular porous substrate is 2nm-2μm, and can be selected as 100nm-500nm; (2) The specific surface area of ​​the granular porous substrate is 20 m². 2 / g-2000m 2 / g, optional 200m 2 / g-1600m 2 / g; (3) The tap density of the granular porous substrate is 0.05 g / cm³. 3 -1g / cm 3 0.2g / cm can be selected. 3 -0.9g / cm 3 ; (4) The volume distribution particle size Dv50 of the granular porous substrate is 4μm-50μm, and can be selected as 8μm-15μm.

18. The silicon-based material according to any one of claims 1-17, wherein, The silicon-based material also includes a coating layer that covers the substrate.

19. The silicon-based material according to claim 18, wherein, The coating layer includes one or more of amorphous carbon, carbon nanofibers, carbon nanotubes, titanium oxide, tin oxide, niobium oxide, and solid electrolyte materials.

20. The silicon-based material according to any one of claims 1-19, wherein, The silicon-based material satisfies at least one of the following conditions (1) to (3): (1) The specific surface area of ​​the silicon-based material is 0.1 m². 2 / g-15m 2 / g, optional 1m 2 / g-5m 2 / g; (2) The tap density of the silicon-based material is 0.5 g / cm³. 3 -1g / cm 3 0.6g / cm³ is an option. 3 -1g / cm 3 ; (3) The volume distribution particle size Dv50 of the silicon-based material is 4μm-50μm, and can be selected as 10μm-30μm.

21. A method for preparing a silicon-based material, comprising the following steps: A substrate is provided, the substrate including at least one receiving space; A substrate modification layer is first deposited within the containment space of the substrate, followed by the deposition of a silicon-containing material layer. Then, the substrate modification layer and the silicon-containing material layer are deposited alternately to obtain a silicon-based material.

22. The preparation method according to claim 21, wherein, The method for preparing the silicon-based material further includes the following steps: coating the substrate surface with a coating layer to obtain the silicon-based material.

23. The preparation method according to claim 21, wherein, The method for preparing the silicon-based material further includes the following steps: coating the substrate surface with a coating layer, and then shaping it to obtain the silicon-based material.

24. A secondary battery cell, wherein, The device includes a negative electrode, a positive electrode, and an separator, wherein the separator is disposed between the negative electrode and the positive electrode. The negative electrode includes a negative current collector and a negative electrode film layer located on at least one side of the negative current collector. The negative electrode film layer includes a negative electrode active material, wherein the negative electrode active material includes the silicon-based material according to any one of claims 1-20.

25. The secondary battery cell according to claim 24, wherein, The positive electrode includes a positive current collector and a positive electrode film layer located on at least one side of the positive current collector. The positive electrode film layer includes a positive electrode active material, which includes one or more of lithium transition metal oxides and their modified materials, lithium phosphates and their modified materials.

26. A battery device comprising a plurality of secondary battery cells as described in any one of claims 24-25.

27. An electrical device comprising a secondary battery cell as described in any one of claims 24-25 or a battery device as described in claim 26.

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