Uninterruptible power supply system

Abstract

An uninterruptible power supply system (100) comprises: a DC line (5) that transmits DC power; an inverter device (8) that converts the DC power received from the DC line (5) into AC power and supplies the AC power to a load; and a control device (10) that controls the inverter device (8). The inverter device (8) includes a plurality of inverter units (80, 81, 82) connected in parallel between the DC line (5) and the load (2). The plurality of inverter units (80, 81, 82) include first inverter units (80, 81) having a first capacity and a second inverter unit (82) having a second capacity different from the first capacity.

Description

Uninterruptible power supply system

[0001] The present disclosure relates to an uninterruptible power supply system.

[0002] For example, Japanese Patent Laid-Open No. 2022-143967 discloses an uninterruptible power supply including a plurality of power conversion modules connected in parallel to each other for a load. Each power conversion module includes a converter unit that converts AC power from an AC power source into DC power, a battery, and an inverter unit that converts DC power from the converter unit and the battery into AC power and supplies the converted AC power to the load.

[0003] Japanese Patent Laid-Open No. 2022-143967

[0004] The uninterruptible power supply having the above configuration has a capacity corresponding to the product of the capacity per power conversion module and the number of power conversion modules connected in parallel. That is, the capacity of the uninterruptible power supply is determined by a multiple of the capacity of the power conversion modules. This means that the capacity of the uninterruptible power supply can only be changed in units of the capacity of the power conversion modules.

[0005] Therefore, there may be cases where a user of the uninterruptible power supply has no choice but to configure an uninterruptible power supply having a capacity larger than the capacity of the load. In this case, there is concern that this may impose a burden on the user in terms of the size and cost of the uninterruptible power supply.

[0006] Therefore, a main object of the present disclosure is to reduce the burden on the user in terms of the size and cost of the uninterruptible power supply system.

[0007] An uninterruptible power supply system according to one aspect of the present disclosure includes: a DC line that transmits DC power; an inverter device that converts DC power received from the DC line into AC power and supplies the AC power to a load; and a control device that controls the inverter device. The inverter device includes a plurality of inverter units connected in parallel between the DC line and the load. The plurality of inverter units include a first inverter unit having a first capacity, and a second inverter unit having a second capacity different from the first capacity.

[0008] This disclosure makes it possible to reduce the user's burden in terms of size and cost of uninterruptible power supply systems.

[0009] This is a circuit block diagram showing an example configuration of an uninterruptible power supply system according to Embodiment 1. This is a block diagram showing an example hardware configuration of a control device. This is a circuit diagram showing an example configuration of an inverter unit. This is a block diagram showing the configuration of the control circuit shown in Figure 3. This is a block diagram showing the configuration of the current distribution calculation unit shown in Figure 4. This is a block diagram showing the configuration of the PWM circuit shown in Figure 4. This is a diagram showing the configuration of an inverter device according to the embodiment and comparative example. This is a diagram showing the relationship between the capacity of the inverter device and the number of inverter units constituting the inverter device. This is a circuit block diagram showing an example configuration of an uninterruptible power supply system according to Embodiment 2. This is a circuit diagram showing an example configuration of a chopper unit.

[0010] Embodiments of this disclosure will be described in detail below with reference to the drawings. In the following, the same or corresponding parts in the drawings will be denoted by the same reference numerals, and their descriptions will not be repeated in principle.

[0011] [Embodiment 1] Figure 1 is a circuit block diagram showing an example configuration of an uninterruptible power supply system according to Embodiment 1. As shown in Figure 1, the uninterruptible power supply system 100 according to Embodiment 1 includes an AC input terminal T1, a battery terminal T2, and an AC output terminal T3. The AC input terminal T1 receives AC power at commercial frequency from a commercial AC power supply 1.

[0012] Battery terminal T2 is connected to battery 3 (power storage device). Battery 3 stores DC power. The power storage device may be an electric double-layer capacitor or a flywheel instead of battery 3.

[0013] The AC output terminal T3 is connected to the load 2. The load 2 is driven by AC power supplied from the uninterruptible power supply system 100.

[0014] Although the uninterruptible power supply system 100 actually receives three-phase AC voltage from the commercial AC power supply 1 and supplies three-phase AC voltage to the load 2, for the sake of simplicity in the diagrams and explanations, only the part related to single-phase AC voltage is shown in Figure 1.

[0015] The uninterruptible power supply system 100 further comprises switches S1 to S3, a converter device 4, a DC line 5, a capacitor 6, a chopper device 7, an inverter device 8, current detectors CD1 to CD3, an operating unit 9, and a control device 10.

[0016] Switch S1 is connected between the AC input terminal T1 and the AC node 4a of the converter device 4. Switch S1 is controlled by the control device 10. When AC power is supplied normally from the commercial AC power supply 1 (when the commercial AC power supply 1 is healthy), switch S1 is turned ON. When AC power is no longer supplied normally from the commercial AC power supply 1 (when the commercial AC power supply 1 is abnormal), switch S1 is turned OFF. The current detector CD1 detects the current Ii flowing between the commercial AC power supply 1 and the converter device 4 and outputs a signal Iif indicating the detected value to the control device 10.

[0017] The instantaneous value of the AC input voltage VI appearing at the AC input terminal T1 is detected by the control device 10. Based on the instantaneous value of the AC input voltage VI, the control device 10 determines whether or not an abnormality has occurred in the commercial AC power supply 1. The control device 10 also controls the converter device 4 and other components in synchronization with the AC input voltage VI.

[0018] The converter device 4 is controlled by the control device 10. When the commercial AC power supply 1 is functioning properly, the converter device 4 converts the AC power from the commercial AC power supply 1 into DC power and outputs it to the DC node 4b. The DC node 4b is connected to the DC line 5. The output voltage of the converter device 4 can be controlled to a desired value. When the commercial AC power supply 1 malfunctions, the operation of the converter device 4 is stopped.

[0019] Capacitor 6 is connected to DC line 5 and smooths the DC voltage VD of DC line 5. The instantaneous value of the DC voltage VD of DC line 5 is detected by control device 10. When the commercial AC power supply 1 is healthy, control device 10 controls converter device 4 so that the DC voltage VD becomes the reference voltage VDR, and when the commercial AC power supply 1 is abnormal, it stops the operation of converter device 4.

[0020] The DC line 5 is connected to the high-voltage side node 7b of the chopper device 7, and the low-voltage side node 7a of the chopper device 7 is connected to the battery terminal T2 via switch S2. Switch S2 is turned on when the uninterruptible power supply system 100 is in use and turned off, for example, when the uninterruptible power supply system 100 is being maintained.

[0021] The chopper device 7 is controlled by the control device 10. The capacity of the chopper device 7 is set to the same value as the capacity of the converter device 4.

[0022] Basically, when the commercial AC power supply 1 is functioning properly, the chopper device 7 stores the DC power received from the DC line 5 in the battery 3, and when the commercial AC power supply 1 is malfunctioning, it supplies the DC power from the battery 3 to the inverter device 8 via the DC line 5. However, when the commercial AC power supply 1 is functioning properly but is in overload operation mode, the chopper device 7 supplies the DC power from the battery 3 to the inverter device 8 via the DC line 5. The current detector CD2 detects the current IB flowing between the chopper device 7 and the battery 3 and outputs a signal IBf indicating the detected value to the control device 10. The instantaneous value of the terminal voltage (battery voltage) VB of the battery 3 appearing at the battery terminal T2 is detected by the control device 10.

[0023] Basically, when the commercial AC power supply 1 is functioning normally, the control device 10 controls the chopper device 7 so that the battery voltage VB becomes the reference voltage VBR, and when the commercial AC power supply 1 is malfunctioning, the control device 10 controls the chopper device 7 so that the DC voltage VD of the DC line 5 becomes the reference voltage VDR. However, when the commercial AC power supply 1 is functioning normally but is under overload, the control device 10 controls the chopper device 7 so that the DC voltage VD of the DC line 5 becomes the reference voltage VDR.

[0024] The inverter device 8 is controlled by the control device 10. The capacity of the inverter device 8 and the converter device 4 are the same. The inverter device 8 converts the DC power received from the DC line 5 via the DC node 8a into AC power and outputs it to the AC node 8b. The output voltage of the inverter device 8 can be controlled to a desired value.

[0025] The inverter device 8 includes a plurality (for example, three) of inverter units 80, 81, and 82. The plurality of inverter units 80, 81, and 82 are connected in parallel between the DC node 8a and the AC node 8b of the inverter device 8.

[0026] The circuit configurations of inverter units 80, 81, and 82 are identical. The capacity of inverter unit 80 is the same as the capacity of inverter unit 81. On the other hand, the capacity of inverter unit 82 is smaller than the capacity of inverter units 80 and 81. For example, if the capacity of inverter units 80 and 81 is 100%, the capacity of inverter unit 82 is 50%.

[0027] In Embodiment 1, the inverter device 8 is configured to include at least two types of inverter units with different capacities. These at least two types of inverter units are connected in parallel between the DC node 8a and the AC node 8b of the inverter device 8. In the example shown in Figure 1, inverter units 80 and 81 correspond to an embodiment of a "first inverter unit" having a first capacity, and inverter unit 82 corresponds to an embodiment of a "second inverter unit" having a second capacity smaller than the first capacity.

[0028] In Figure 1, the inverter device 8 is configured to include two types of inverter units, but the inverter device 8 may also be configured to include three or more types of inverter units with different capacities. Furthermore, the number of each type of inverter unit may be one or more.

[0029] The AC node 8b of the inverter device 8 is connected to the AC output terminal T3 via switch S3. Switch S3 is controlled by the control device 10 and is turned on when the uninterruptible power supply system 100 is in operation and turned off when the uninterruptible power supply system 100 is shut down. The instantaneous value of the AC output voltage VO that appears at the AC output terminal T3 is detected by the control device 10.

[0030] The current detector CD3 detects the current (load current) IL flowing between the inverter device 8 and the load 2, and provides the control device 10 with a signal ILf indicating the detected value. The control device 10 controls the inverter units 80, 81, and 82 so that the AC output voltage VO becomes a sinusoidal reference voltage VOR.

[0031] The control unit 9 includes a number of buttons operated by the user of the uninterruptible power supply system 100, a display that shows various information, and the like. By operating the control unit 9, the user can set various reference voltages VDR, VBR, and VOR, and turn the power of the uninterruptible power supply system 100 on and off.

[0032] The control device 10 controls the entire uninterruptible power supply system 100 based on the AC input voltage VI, AC input current Ii, DC voltage VD, battery voltage VB, battery current IB, AC output voltage VO, load current IL, and signals from the operation unit 9. As will be described later, the control device 10 includes a plurality of control circuits for controlling a plurality of inverter units 80, 81, and 82 in the inverter device 8, respectively.

[0033] Figure 2 is a block diagram showing an example of the hardware configuration of the control device 10. Typically, the control device 10 can be configured using a microcomputer with a predetermined program pre-stored in it.

[0034] In the example shown in Figure 2, the control device 10 includes a CPU (Central Processing Unit) 102, a memory 104, and an input / output (I / O) circuit 106. The CPU 102, memory 104, and I / O circuit 106 can exchange data with each other via a bus 108. A program is stored in a portion of the memory 104, and the CPU 102 can execute this program to realize various functions described later. The I / O circuit 106 inputs and outputs signals and data to and from the outside of the control device 10.

[0035] Alternatively, unlike the example in Figure 2, at least a portion of the control device 10 can be configured using circuits such as FPGA (Field Programmable Gate Array) or ASIC (Application Specific Integrated Circuit). Furthermore, at least a portion of the control device 10 can also be configured using analog circuits.

[0036] Figure 3 is a circuit diagram showing an example configuration of the inverter unit 80 shown in Figure 1. While Figure 1 only shows the portion related to one phase of the three-phase AC voltage, Figure 3 shows the portion related to all three phases of AC voltage. Furthermore, while Figure 1 only shows the positive DC line 5, Figure 3 also shows the negative DC line 5n. Since inverter units 80, 81, and 82 have the same circuit configuration, a representative example of the inverter unit 80's circuit configuration will be described.

[0037] As shown in Figure 3, the inverter unit 80 is composed of a U-phase arm 12U, a V-phase arm 12V, a W-phase arm 12W, an AC filter 18, and a current detector CD4.

[0038] The U-phase arm 12U, V-phase arm 12V, and W-phase arm 12W constitute a three-phase inverter. Since the circuit configurations of each phase arm 12U, 12V, and 12W are the same, the circuit configuration of the U-phase arm 12U will be described as representative.

[0039] The U-phase arm 12U includes a plurality (for example, two) of leg circuits 12A and 12B. Leg circuits 12A and 12B are connected in parallel to the DC lines 5 and 5n. Each of the leg circuits 12A and 12B includes a plurality of semiconductor switching elements. In Embodiment 1, IGBTs (Insulated Gate Bipolar Transistors) are used as semiconductor switching elements.

[0040] The REG circuit 12A includes IGBTs Q1A and Q2A, and diodes D1A and D2A. IGBTs Q1A and Q2A are connected in series between DC line 5 and DC line 5n. Diodes D1A and D2A are connected in antiparallel to IGBTs Q1A and Q2A, respectively. The connection point of IGBTs Q1A and IGBTs Q2A constitutes the output node of the REG circuit 12A.

[0041] The REG circuit 12B includes IGBTs Q1B and Q2B, and diodes D1B and D2B. IGBTs Q1B and Q2B are connected in series between DC line 5 and DC line 5n. Diodes D1B and D2B are connected in antiparallel to IGBTs Q1B and Q2B, respectively. The connection point of IGBTs Q1B and IGBTs Q2B constitutes the output node of the REG circuit 12B.

[0042] Although not shown in the diagram, each of the V-phase arm 12V and W-phase arm 12W, like the U-phase arm 12U, includes two leg circuits 12A and 12B connected in parallel to the DC lines 5 and 5n.

[0043] The three leg circuits 12A included in the three-phase arms 12U, 12V, and 12W respectively constitute the "first inverter." The three leg circuits 12B included in the three-phase arms 12U, 12V, and 12W respectively constitute the "second inverter." The first and second inverters are connected in parallel to the DC lines 5 and 5n. The first and second inverters are switched by the control circuit 20 in different phases from each other. That is, the first and second inverters constitute an interleaved inverter.

[0044] It should be noted that each of the leg circuits 12A and 12B may include a multi-level circuit of three or more levels instead of a two-level circuit. Further, the number of leg circuits included in each phase arm 12U, 12V, 12W may be three or more.

[0045] The AC filter 18 is a three-phase LC filter circuit including reactors 14U, 14V, 14W and a capacitor 16.

[0046] The U-phase reactor 14U includes a plurality of (for example, two) reactors LAU and LBU. A first terminal of the reactor LAU is connected to an output node of the leg circuit 12A, and a second terminal thereof is connected to an output node 8bU of the inverter device 8. A first terminal of the reactor LBU is connected to an output node of the leg circuit 12B, and a second terminal thereof is connected to the output node 8bU of the inverter device 8.

[0047] The V-phase reactor 14V includes a plurality of (for example, two) reactors LAV and LBV. The plurality of reactors LAV and LBV of the V-phase reactor 14V are provided respectively corresponding to the plurality of leg circuits 12A and 12B constituting the V-phase arm 12V.

[0048] The W-phase reactor 14W includes a plurality of (for example, two) reactors LAW and LBW. The plurality of reactors LAW and LBW of the W-phase reactor 14W are provided respectively corresponding to the plurality of leg circuits 12A and 12B constituting the W-phase arm 12W.

[0049] The AC filter 18 is a low-pass filter that allows three-phase AC power at commercial frequency generated by the interleave inverter to pass through, and prevents switching frequency signals generated by the interleave inverter from passing through to the load 2.

[0050] The current detector CD4 detects an AC output current Io (U-phase current IU, V-phase current IV, W-phase current IW) flowing between the inverter unit 80 and the load 2, and supplies a signal Iof indicating the detection value to the control circuit 20. Instantaneous values of AC output voltages VU, VV, VW appearing at output nodes 8bU, 8bV, 8bW are detected by the control circuit 20.

[0051] The control circuit 20 controls the inverter unit 80 so that the AC output voltages VU, VV, and VW become a sinusoidal reference voltage VOR. The control circuit 20 can apply PWM (Pulse Width Modulation) control as the control method for the inverter unit 80.

[0052] At this time, the control circuit 20 interleaves the leg circuits 12A and 12B of each phase arm 12U, 12V, and 12W. Specifically, the control circuit 20 shifts the phase of the signal that turns leg circuit 12A on and off and the phase of the signal that turns leg circuit 12B on and off by 180 degrees in each phase arm 12U, 12V, and 12W.

[0053] In this way, the ripple (current fluctuations that occur during switching) generated by each leg circuit can cancel each other out. Therefore, the ripple component included in the sum of the output currents of leg circuits 12A and 12B is reduced, and the effective frequency of the ripple component is doubled, allowing the AC filter 18 to be miniaturized. In addition, since the current is divided between leg circuits 12A and 12B in each phase arm 12U, 12V, and 12W, the power loss per IGBT is reduced, and as a result, the thermal design of the IGBT becomes easier.

[0054] Figure 4 is a block diagram showing the configuration of the control circuit 20 shown in Figure 3. As shown in Figure 4, the control circuit 20 is composed of subtractors 22A to 22C, 28A to 28C, a voltage control unit 24, a current distribution calculation unit 25, adders 26A to 26C, a current control unit 30, and a PWM circuit 32.

[0055] The reference voltage VOR is the target value (output voltage command value) of the AC output voltages VU, VV, and VW of the inverter unit 80, and includes the U-phase voltage command value VUR, the V-phase voltage command value VVR, and the W-phase voltage command value VWR.

[0056] Subtractor 22A calculates the deviation ΔVU = VUR - VU between the U-phase voltage command value VUR and the U-phase output voltage VU. Subtractor 22B calculates the deviation ΔVV = VVR - VV between the V-phase voltage command value VVR and the V-phase output voltage VV. Subtractor 22C calculates the deviation ΔVW = VWR - VW between the W-phase voltage command value VWR and the W-phase output voltage VW.

[0057] The voltage control unit 24 determines current command values ​​IUc, IVc, and IWc so that the deviations ΔVU, ΔVV, and ΔVW become zero. For example, the voltage control unit 24 generates current command values ​​IUc, IVc, and IWc by performing a proportional or proportional-integral operation on the deviations ΔVU, ΔVV, and ΔVW. The current command values ​​IUc, IVc, and IWc correspond to the feedback component of the values ​​corresponding to the deviations ΔVU, ΔVV, and ΔVW. Feedback control of the AC output current Io of the inverter unit 80 is performed so that the deviations ΔVU, ΔVV, and ΔVW are eliminated.

[0058] The current distribution calculation unit 25 calculates the current distribution IS that the inverter unit 80 should supply to the load 2 based on the load current IL detected by the current detector CD3. Figure 5 is a block diagram showing the configuration of the current distribution calculation unit 25 shown in Figure 4.

[0059] As shown in Figure 5, the current distribution calculation unit 25 is configured to include a capacity ratio calculation unit 250 and a multiplier 252. The capacity ratio calculation unit 250 acquires information regarding the total capacity of the inverter device 8, which is pre-stored in the memory 104 of the control device 10. The total capacity of the inverter device 8 corresponds to the sum of the capacities of the multiple inverter units 80, 81, and 82 included in the inverter device 8. The capacity ratio calculation unit 250 also acquires information regarding the capacity of the inverter unit 80 from the memory 104 of the control device 10.

[0060] The capacity ratio calculation unit 250 calculates the ratio of the capacity of the inverter unit 80 to the total capacity of the inverter device 8. For example, if the total capacity of the inverter device 8 is 500 kVA and the capacity of the inverter unit 80 is 200 kVA, the capacity ratio will be 200 kVA / 500 kVA (i.e., 2 / 5).

[0061] The multiplier 252 calculates the current IS shared by the inverter unit 80 by multiplying the load current IL detected by the current detector CD3 by a coefficient K corresponding to the capacity ratio calculated by the capacity ratio calculation unit 250. For example, if the capacity ratio is 2 / 5, the current IS shared by the inverter unit 80 is IL × 2 / 5. The shared current IS includes the U-phase shared current ISU, the V-phase shared current ISV, and the W-phase shared current ISW.

[0062] Returning to Figure 4, adder 26A adds the current command value IUc from the voltage control unit 24 and the U-phase current ISU from the current distribution calculation unit 25 to generate the current command value IU* = IUc* + ISU. Adder 26B adds the current command value IVc from the voltage control unit 24 and the V-phase current ISV from the current distribution calculation unit 25 to generate the current command value IV* = IVc + ISV. Adder 26C adds the current command value IWc from the voltage control unit 24 and the W-phase current ISW from the current distribution calculation unit 25 to generate the current command value IW* = IWc + ISW. The current command values ​​IU*, IV*, and IW* correspond to the command values ​​of the AC output current Io of the inverter unit 80.

[0063] The shared currents ISU, ISV, and ISW correspond to the feedforward components of the current command values ​​IU*, IV*, and IW*. By introducing a feedforward component corresponding to the shared current IS into the current command values ​​IU*, IV*, and IW*, the inverter unit 80 can output an AC output current Io that includes a feedback component corresponding to the deviations ΔVU, ΔVV, and ΔVW, as well as the feedforward component.

[0064] As described above, the inverter device 8 is composed of two types of inverter units 80, 81, and 82 with different capacities. In this configuration, the impedance of the electrical circuits (inverters and AC filters, etc.) may differ between the inverter units 80 and 81 with larger capacities and the inverter unit 82 with a smaller capacity. Therefore, there is a possibility that power may flow between the inverter units 80, 81, and 82 that are operating in parallel (i.e., crossflow).

[0065] Therefore, in Embodiment 1, a feedforward component IS corresponding to the current that each inverter unit is to handle is introduced into the current command values ​​IU*, IV*, and IW*. This feedforward component IS allows the AC output current Io of each inverter unit to be controlled to its assigned current at high speed. As a result, it becomes possible to suppress the generation of crosscurrent.

[0066] Subtractor 28A calculates the deviation ΔIU = IU* - IU between the current command value IU* and the U-phase current IU detected by the current detector CD4. Subtractor 28B calculates the deviation ΔIV = IV* - IV between the current command value IV* and the V-phase current IV detected by the current detector CD4. Subtractor 28C calculates the deviation ΔIW = IW* - IW between the current command value IW* and the W-phase current IW detected by the current detector CD4.

[0067] The current control unit 30 determines voltage command values ​​VU*, VV*, and VW* based on the deviations ΔIU, ΔIV, and ΔIW. For example, the current control unit 30 generates voltage command values ​​VU*, VV*, and VW*, which are sine wave signals at commercial frequency, by performing a proportional or proportional-integral operation on the deviations ΔIU, ΔIV, and ΔIW.

[0068] The PWM circuit 32 outputs signals to make the three-phase AC voltages VU, VV, and VW output from the inverter unit 80 equal to the voltage command values ​​VU*, VV*, and VW*, respectively, based on the voltage command values ​​VU*, VU*, and VW*. These signals are PWM signals φ1A, φ1B, φ2A, and φ2B for controlling the on / off state of the four IGBTs Q1A, Q1B, Q2A, and Q2B included in each phase arm 12U, 12V, and 12W of the inverter unit 80.

[0069] Figure 6 is a block diagram showing the configuration of the PWM circuit 32 shown in Figure 4. Figure 6 shows the configuration of the part related to the control of the U-phase arm 12U. As shown in Figure 6, the PWM circuit 32 is composed of an oscillator 320, triangular wave generators 322 and 324, comparators 326 and 328, buffers 330 and 334, and NOT gates 332 and 336.

[0070] Oscillator 320 outputs a clock signal with a frequency sufficiently higher than the commercial frequency. Triangular wave generators 322 and 324 output triangular wave signals Cu1 and Cu2, respectively, with the same frequency as the output clock signal of oscillator 320. Triangular wave signals Cu1 and Cu2 are out of phase by 180 degrees.

[0071] The comparator 326 compares the voltage command value VU* with the triangular wave signal Cu1 from the triangular wave generator 322 and outputs a PWM signal φ1A indicating the comparison result. The buffer 330 supplies the PWM signal φ1A to the reg circuit 12A. The NOT circuit 332 inverts the PWM signal φ1A and supplies the PWM signal φ2A to the reg circuit 12A. IGBTs Q1A and Q2A are turned on when the PWM signals φ1A and φ2A are at a high level, and turned off when the PWM signals φ1A and φ2A are at a low level.

[0072] The comparator 328 compares the voltage command value VU* with the triangular wave signal Cu2 from the triangular wave generator 324 and outputs a PWM signal φ1B indicating the comparison result. The buffer 334 supplies the PWM signal φ1B to the reg circuit 12B. The NOT circuit 336 inverts the PWM signal φ1B and supplies the PWM signal φ2B to the reg circuit 12B. The IGBTs Q1B and Q2B are turned on when the PWM signals φ1B and φ2B are at a high level, and turned off when the PWM signals φ1B and φ2B are at a low level.

[0073] By intentionally keeping the phases of the PWM signals φ1A and φ1B and the PWM signals φ2A and φ2B the same, the parallel-connected leg circuits 12A and 12B are interleaved in each phase arm 12U, 12V, and 12W.

[0074] The AC output voltage of the inverter unit 80 is controlled to the reference voltage VOR, and the AC output current Io of the inverter unit 80 is controlled to the shared current IS. The control circuits for controlling the inverter unit 81 and the inverter unit 82 have the same configuration as the control circuit 20 shown in Figures 4 to 6.

[0075] In other words, the control circuit of the inverter unit 81 determines the current IS that the inverter unit 81 should supply to the load 2 by multiplying the load current IL detected by the current detector CD3 by a coefficient K corresponding to the ratio of the capacity of the inverter unit 81 to the total capacity of the inverter device 8. The control circuit then controls the inverter unit 81 so that an AC output current is output from the inverter unit 81 that includes a feedback component corresponding to the deviation of the AC output voltage of the inverter unit 81 from the reference voltage VOR and a feedforward component corresponding to the current IS. At this time, the control circuit interleaves the leg circuits 12A and 12B of each phase arm of the inverter unit 81.

[0076] The control circuit of the inverter unit 82 calculates the current IS that the inverter unit 82 should supply to the load 2 by multiplying the load current IL detected by the current detector CD3 by a coefficient K corresponding to the ratio of the capacity of the inverter unit 82 to the total capacity of the inverter device 8. The control circuit then controls the inverter unit 82 so that an AC output current is output from the inverter unit 82 that includes a feedback component corresponding to the deviation of the AC output voltage of the inverter unit 82 from the reference voltage VOR and a feedforward component corresponding to the current IS. At this time, the control circuit interleaves the leg circuits 12A and 12B of each phase arm of the inverter unit 82.

[0077] The effects and benefits of the uninterruptible power supply system 100 according to Embodiment 1 will be described below with reference to the following examples.

[0078] Figure 7(A) shows the configuration of an inverter device 8 according to the embodiment. As shown in Figure 7(A), the inverter device 8 according to the embodiment is configured by combining an inverter unit 80A having a first capacity and an inverter unit 80B having a second capacity. The first capacity is, for example, 200 kVA, and the second capacity is 100 kVA. Therefore, the size of inverter unit 80B is smaller than the size of inverter unit 80A. The number of inverter units 80A and 80B can be one or more.

[0079] Figure 7(B) shows the configuration of the inverter device 8A according to the comparative example. As shown in Figure 7(B), the inverter device 8A according to the comparative example is configured by combining multiple inverter units 80A having the same capacity. The capacity of the inverter unit 80A is, for example, 200 kVA.

[0080] Figure 8 shows the relationship between the total capacity of the inverter device (device capacity) and the number of inverter units that make up the inverter device, for each of the inverter device 8 according to the embodiment and the inverter device 8A according to the comparative example.

[0081] Figure 8(A) shows the relationship between the capacity of the inverter device 8 according to the embodiment and the number of inverter units. For example, if the inverter device 8 is configured with one inverter unit 80B, an inverter device 8 with a capacity of 100 kVA can be formed. If the inverter device 8 is configured with one inverter unit 80A, an inverter device 8 with a capacity of 200 kVA can be formed. Furthermore, if the inverter device 8 is configured with one inverter unit 80A and one inverter unit 80B, an inverter device 8 with a capacity of 300 kVA can be formed.

[0082] In this embodiment, the capacity of the inverter device 8 can be changed in 100 kVA increments by changing the number of inverter units 80A and 80B. Therefore, users of the uninterruptible power supply system can finely adjust the capacity of the inverter device 8 according to the load capacity.

[0083] Figure 8(B) shows the relationship between the capacity of the inverter device 8A according to the comparative example and the number of inverter units. For example, when the inverter device 8 is configured with one inverter unit 80A, an inverter device 8A with a capacity of 200 kVA can be formed. When the inverter device 8 is configured with two inverter units 80A, an inverter device 8A with a capacity of 400 kVA can be formed.

[0084] Thus, the capacity of the inverter device 8A according to the comparative example is determined by multiples of the inverter unit 80A's capacity of 200 kVA. This means that the capacity of the inverter device 8A can only be changed in units of 200 kVA, the capacity of the inverter unit 80A. Therefore, when constructing an uninterruptible power supply system, it may be necessary to configure the inverter device 8A with a capacity larger than the load capacity. In this case, there is concern that the size and cost of the inverter device will burden the user of the uninterruptible power supply system.

[0085] In the comparative example, reducing the capacity of the inverter unit 80A makes it possible to finely adjust the capacity of the inverter device 8A by changing the number of inverter units 80A. However, there is a concern that the size of the inverter device 8A will increase in proportion to the number of inverter units 80A. In this respect, the inverter device 8 according to the embodiment is expected to reduce the burden on users who build an uninterruptible power supply system.

[0086] On the other hand, when an inverter device 8 is configured by combining inverter units of different capacities, there is a concern that crosscurrents may occur between multiple inverter units operating in parallel due to differences in the impedance of the electrical circuits of each inverter unit.

[0087] To address these concerns, the control circuit of each inverter unit calculates the current IS that the inverter unit should supply to the load 2 by multiplying the load current IL detected by the current detector CD3 by a coefficient K corresponding to the ratio of the inverter unit's capacity to the total capacity of the inverter device 8, as described above. The control circuit then controls the inverter unit so that an AC output current is output from the inverter unit that includes a feedback component corresponding to the deviation of the inverter unit's AC output voltage relative to the reference voltage VOR, and a feedforward component corresponding to the supplied current IS. In this way, the feedforward component allows for high-speed control of the AC output current of each inverter unit to the supplied current, thereby suppressing the generation of crosscurrent.

[0088] [Embodiment 2] In Embodiment 1 described above, an example was described in which the inverter device 8 was composed of inverter units with different capacities. However, the converter device and the chopper device can also be composed of units with different capacities.

[0089] Figure 9 is a circuit block diagram showing an example configuration of an uninterruptible power supply system according to Embodiment 2. As shown in Figure 9, the uninterruptible power supply system 110 according to Embodiment 2 differs from the uninterruptible power supply system 100 shown in Figure 1 in the configuration of the converter device 4 and the chopper device 7.

[0090] The converter device 4 is comprised of at least two types of converter units with different capacities. These at least two types of converter units are connected in parallel between the AC node 4a and the DC node 4b of the converter device 4. In the example shown in Figure 9, the converter device 4 includes a plurality (e.g., three) of converter units 40, 41, and 42.

[0091] The circuit configurations of converter units 40, 41, and 42 are identical. The capacitance of converter unit 40 is the same as that of converter unit 41. On the other hand, the capacitance of converter unit 42 is smaller than that of converter units 40 and 41. For example, if the capacitance of converter units 40 and 41 is 100%, then the capacitance of converter unit 42 is 50%.

[0092] In Figure 9, the converter device 4 is configured to include two types of converter units, but the converter device 4 may also be configured to include three or more types of converter units with different capacities. Furthermore, the number of each type of converter unit may be one or more.

[0093] Each of the converter units 40, 41, and 42 has a circuit configuration similar to that of the inverter unit 80 shown in Figure 3. For example, converter unit 40 is composed of an AC filter consisting of a three-phase LC filter circuit and a three-phase converter. Each phase arm of the three-phase converter includes a plurality of parallel-connected leg circuits. When the commercial AC power supply 1 is healthy, the control circuit of converter unit 40 controls the converter unit 40 so that the DC voltage VD becomes the reference voltage VDR. At this time, the control circuit interleaves the plurality of leg circuits of each phase arm. When the commercial AC power supply 1 is abnormal, the control circuit stops the operation of converter unit 40.

[0094] The chopper device 7 is configured to include at least two types of chopper units with different capacities. These at least two types of chopper units are connected in parallel between the low-voltage node 7a and the high-voltage node 7b of the chopper device 7. In the example shown in Figure 9, the chopper device 7 includes a plurality (e.g., three) of chopper units 70, 71, and 72.

[0095] The circuit configurations of chopper units 70, 71, and 72 are identical. The capacitance of chopper unit 70 is the same as that of chopper unit 71. On the other hand, the capacitance of chopper unit 72 is smaller than that of chopper units 70 and 71. For example, if the capacitance of chopper units 70 and 71 is 100%, then the capacitance of chopper unit 72 is 50%.

[0096] In Figure 9, the chopper device 7 is configured to include two types of chopper units, but the chopper device 7 may also be configured to include three or more types of chopper units with different capacities. Furthermore, the number of each type of chopper unit may be one or more.

[0097] Figure 10 is a circuit diagram showing an example configuration of the chopper unit 70 shown in Figure 9. Since chopper units 70, 71, and 72 have the same circuit configuration, a representative example of the chopper unit 70's circuit configuration will be described. As shown in Figure 10, the chopper unit 70 includes multiple (for example, two) leg circuits 74A and 74B and a reactor 76.

[0098] Leg circuits 74A and 74B are connected in parallel to DC lines 5 and 5n. Leg circuit 74A includes IGBTs Q11A and Q12A and diodes D11A and D12A. IGBTs Q11A and Q12A are connected in series between DC line 5 and DC line 5n. Diodes D11A and D2A are connected in antiparallel to IGBTs Q11A and Q12A, respectively. The connection point of IGBTs Q11A and Q12A constitutes the output node of leg circuit 74A.

[0099] The REG circuit 74B includes IGBTs Q11B and Q12B, and diodes D11B and D12B. IGBTs Q11B and Q12B are connected in series between DC line 5 and DC line 5n. Diodes D11B and D12B are connected in antiparallel to IGBTs Q11B and Q12B, respectively. The connection point of IGBTs Q11B and IGBTs Q12B constitutes the output node of the REG circuit 74B.

[0100] The reactor 76 includes multiple (e.g., two) reactors LA and LB. The first terminal of reactor LA is connected to the output node of the leg circuit 74A, and its second terminal is connected to the low-voltage side node 7aP of the chopper unit 70. The first terminal of reactor LB is connected to the output node of the leg circuit 74B, and its second terminal is connected to the low-voltage side node 7aP of the chopper unit 70.

[0101] Leg circuit 74A and reactor LA constitute the "first chopper," and leg circuit 74B and reactor LB constitute the "second chopper." The first and second choppers are connected in parallel to the DC lines 5 and 5n. The first and second choppers are switched by the control circuit 50 in different phases. That is, the first and second choppers constitute an interleaved chopper. The number of choppers included in the chopper unit 70 may be three or more.

[0102] The control circuit 50 basically controls the chopper unit 70 so that the battery voltage VB becomes the reference voltage VBR when the commercial AC power supply 1 is functioning properly, and controls the chopper unit 70 so that the DC voltage VD of the DC line 5 becomes the reference voltage VDR when the commercial AC power supply 1 is malfunctioning.

[0103] At this time, the control circuit 50 shifts the phase of the signal that turns leg circuit 74A on and off by 180 degrees from the phase of the signal that turns leg circuit 74B on and off. This allows the ripple generated by each leg circuit to cancel each other out. Therefore, the ripple component included in the sum of the output currents of leg circuits 74A and 74B is reduced, and the effective frequency of the ripple component is doubled, making it possible to miniaturize the reactor 76.

[0104] As described above, in Embodiment 2, each of the converter device 4, chopper device 7, and inverter device 8 is configured by combining at least two types of power conversion units with different capacities. In this way, the capacity of each of the converter device 4, chopper device 7, and inverter device 8 can be finely adjusted according to the capacity of the load 2. Therefore, it is expected that the size and cost of each power conversion device will be manageable for the user of the uninterruptible power supply system 110.

[0105] The embodiments disclosed herein should be considered in all respects to be illustrative and not restrictive. The scope of this disclosure is indicated by the claims and not by the foregoing description, and all modifications within the meaning and scope of the claims are intended to be included.

[0106] 1 Commercial AC power supply, 2 Load, 3 Battery, 4 Converter device, 5, 5n DC line, 6, 16 Capacitor, 7 Chopper device, 8, 8A Inverter device, 9 Operation unit, 10 Control device, 12A, 12B, 74A, 74B Reg circuit, 12U U-phase arm, 12V V-phase arm, 12W W-phase arm, 14U, 14V, 14W, 76, LAU, LBU, LAV, LBV, LAW, LBW Reactor, 18 AC filter, 20, 50 Control circuit, 22A-22C, 28A-28C Subtractor, 24 Voltage control unit, 25 Current distribution calculation unit, 26A-26C Adder, 30 Current control unit, 32 PWM circuit, 40-42 Converter unit, 70-72 Chopper unit, 80-82, 80A, 80B Inverter unit, 100, 110 Uninterruptible power supply system, 102 CPU, 104 Memory, 106 I / O circuit, 108 Bus, 250 Capacitance ratio calculation unit, 252 Multiplier, 320 Oscillator, 322, 324 Triangular wave generator, 326, 328 Comparator, 330, 334 Buffer, 332, 336 NOT circuit, Q1A, Q2A, Q1B, Q2B, Q11A, Q12A, Q11B, Q12B IGBT, D1A, D2A, D1B, D2B, D11A, D12A, D11B, D12B Diode, S1-S3 Switch, T1 AC input terminal, T2 battery terminal, T3 AC output terminal.

Claims

1. An uninterruptible power supply system comprising: a DC line for transmitting DC power; an inverter device for converting the DC power received from the DC line into AC power and supplying it to a load; and a control device for controlling the inverter device, wherein the inverter device includes a plurality of inverter units connected in parallel between the DC line and the load, and the plurality of inverter units include a first inverter unit having a first capacity and a second inverter unit having a second capacity different from the first capacity.

2. The uninterruptible power supply system according to claim 1, further comprising a current detector for detecting a load current, wherein the control device includes a plurality of control circuits for controlling each of the plurality of inverter units, the plurality of control circuits include a first control circuit for controlling the first inverter unit and a second control circuit for controlling the second inverter unit, the first control circuit calculates a first current to be supplied by the first inverter unit to the load by multiplying the detected value of the current detector by a first coefficient corresponding to the ratio of the first capacity to the total capacity of the inverter device, and controls the first inverter unit to supply the first current to the load, the second control circuit calculates a second current to be supplied by the second inverter unit to the load by multiplying the detected value of the current detector by a second coefficient corresponding to the ratio of the second capacity to the total capacity of the inverter device, and controls the second inverter unit to supply the second current to the load.

3. The uninterruptible power supply system according to claim 2, wherein the first control circuit controls the first inverter unit to supply an AC current to the load that includes a feedback component corresponding to the deviation between the output voltage of the first inverter unit and the output voltage command value and a feedforward component corresponding to the first current distribution, and the second control circuit controls the second inverter unit to supply an AC current to the load that includes a feedback component corresponding to the deviation between the output voltage of the second inverter unit and the output voltage command value and a feedforward component corresponding to the second current distribution.

4. The uninterruptible power supply system according to claim 2 or 3, wherein each of the first inverter unit and the second inverter unit includes a plurality of inverters connected in parallel to the DC line, and a plurality of reactors provided corresponding to each of the plurality of inverters and connected between the corresponding inverter and the load, and each of the first control circuit and the second control circuit interleaves the plurality of inverters included in the corresponding inverter unit.

5. The uninterruptible power supply system according to claim 1, further comprising a converter device for converting AC power supplied from an AC power source into DC power and supplying it to the DC line, wherein the converter device includes a plurality of converter units connected in parallel between the AC power source and the DC line, and the plurality of converter units include a first converter unit and a second converter unit with different capacities.

6. The uninterruptible power supply system according to claim 5, wherein each of the plurality of converter units includes a plurality of converters connected in parallel to the DC line, and a plurality of reactors provided corresponding to each of the plurality of converters and connected between the corresponding converter and the AC power supply, and the control device interleaves the plurality of converters included in each converter unit.

7. The uninterruptible power supply system according to claim 5 or 6, further comprising a chopper device that supplies DC power supplied from a power storage device to the DC line in the event of an abnormality in the AC power supply, wherein the chopper device includes a plurality of chopper units connected in parallel between the power storage device and the DC line, and the plurality of chopper units include a first chopper unit and a second chopper unit having different capacities.

8. The uninterruptible power supply system according to claim 7, wherein each of the plurality of chopper units includes a plurality of choppers connected in parallel to the DC line, and the control device interleaves the plurality of choppers included in each chopper unit.

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