Capacitor element and solid electrolytic capacitor

Abstract

This capacitor element has a valve-action metal substrate, a first mask, a second mask, and a solid electrolyte layer. The valve-action metal substrate has a dielectric layer on at least one main surface. The first mask is formed in a frame shape on the surface of the dielectric layer. The second mask is formed in a region defined by the first mask. The solid electrolyte layer is formed in a region defined by the first mask and the second mask.

Description

Capacitor element and solid electrolytic capacitor

[0001] The present invention relates to a capacitor element and a solid electrolytic capacitor formed by laminating a plurality of capacitor elements.

[0002] Conventionally, various techniques for increasing the capacitance of solid electrolytic capacitors (capacitor elements) have been studied. Patent Document 1 describes a method for manufacturing a solid electrolytic capacitor and the solid electrolytic capacitor. The solid electrolytic capacitor includes a plurality of flat film-shaped capacitor elements and a plurality of metal foils (cathodes). The plurality of flat film-shaped capacitor elements each have a valve-action metal base having a dielectric layer on at least one main surface thereof. On the main surface where the dielectric layer is formed, a mask layer (insulating resin) is formed to cover the periphery. A solid electrolyte layer is formed in a region (cathode formation region) surrounded by the mask layer.

[0003] Japanese Patent Application Laid-Open No. 2021-44549

[0004] The solid electrolyte layer of Patent Document 1 is formed such that the thickness increases along the inner circumference of the mask layer. This utilizes the fact that the solid electrolyte layer is selectively formed thick on the inner circumference of the mask layer due to the coffee stain effect. The coffee stain effect is a phenomenon in which when a coffee droplet dries, the thickness at the peripheral edge of the droplet is large, and the thickness is small (thin) in other portions.

[0005] That is, in the configuration of Patent Document 1, the effect of improving the withstand voltage of the solid electrolytic capacitor can be obtained because the thickness increases along the inner circumference of the mask layer. However, due to the coffee stain effect, the solid electrolyte layer becomes thin in portions other than the inner circumference along the mask layer. In other words, there is a risk that the solid electrolyte layer may not be sufficiently formed. When the solid electrolyte layer is not sufficiently formed, it is difficult to obtain a desired capacitance.

[0006] Accordingly, an object of the present invention is to provide a capacitor element and a solid electrolytic capacitor that can easily obtain a desired capacitance.

[0007] The capacitor element of this invention comprises a valve-acting metal substrate, a first mask, a second mask, and a solid electrolyte layer. The valve-acting metal substrate has a dielectric layer on at least one main surface. The first mask is formed in a frame shape on the surface of the dielectric layer. The second mask is formed within the region defined by the first mask. The solid electrolyte layer is formed within the regions defined by the first and second masks.

[0008] In this capacitor element, the second mask is formed within the region defined by the first mask. That is, even if the coffee stain phenomenon occurs when forming the solid electrolyte layer in the capacitor element, the region in which the solid electrolyte layer is formed thinly can be reduced. In other words, variations in the thickness of the solid electrolyte layer can be suppressed, and a capacitor element that can easily obtain the desired capacitor capacitance can be realized.

[0009] This invention provides a capacitor element and a solid electrolytic capacitor that can easily obtain a desired capacitance.

[0010] Figure 1 is a cross-sectional view showing the configuration of a solid electrolytic capacitor according to the first embodiment. Figures 2(A) and 2(B) are cross-sectional views showing the configuration of a capacitor element and cathode electrode set before pieceification. Figure 3 is a plan view of a capacitor element. Figure 4 is a plan view of a capacitor element in a conventional configuration. Figure 5 is a flowchart showing an example of the capacitor element formation process. Figure 6 is an external perspective view in a multi-layer state showing the shape of the capacitor element sheet. Figure 7 is an exploded perspective view showing the state in which the capacitor element sheet and cathode electrode sheet are stacked. Figure 8 is an external perspective view in a multi-layer state showing the shape of the cathode electrode before pieceification. Figure 9 is an external perspective view showing the shape of the cathode electrode before pieceification. Figure 10 is a flowchart showing an example of the capacitor element formation process. Figures 11(A), 11(B), 11(C), 11(D), and 11(E) are schematic diagrams showing the process of forming a capacitor element of a solid electrolytic capacitor according to the first embodiment. Figures 12(A), 12(B), 12(C), 12(D), 12(E), and 12(F) are plan views of capacitor elements according to modified examples. Figures 13(A), 13(B), 13(C), 13(D), 13(E), and 13(F) are plan views of capacitor elements according to modified examples. Figure 14 is a table showing comparative examples.

[0011] [First Embodiment] A capacitor element and a solid electrolytic capacitor according to the first embodiment of the present invention will be described with reference to the figures.

[0012] (General description of the configuration of the solid electrolytic capacitor 1) First, the structure of the capacitor element and solid electrolytic capacitor according to the embodiment of the present invention will be described. Figure 1 is a cross-sectional view showing the configuration of the solid electrolytic capacitor according to the first embodiment. Note that in Figure 1, only the insulating resin and the external electrodes are hatched for clarity. Figures 2(A) and 2(B) are cross-sectional views showing the configuration of the capacitor element and cathode electrode set before individualization.

[0013] As shown in Figures 1, 2(A), and 2(B), the solid electrolytic capacitor 1 comprises a capacitor element laminate 100, an insulating resin 50, an external electrode 61, and an external electrode 62. The capacitor element laminate 100 comprises a plurality of flat film capacitor elements 10 and a plurality of flat film cathode electrodes 20. Note that the number of flat film capacitor elements 10 and cathode electrodes 20 in the configuration shown in Figure 1 is not limited to this. The cross-sectional views in Figures 1, 2(A), and 2(B) are cross-sectional views of the capacitor element laminate 100 in Figure 1 taken from planes perpendicular to the top surface 101 and bottom surface 102. These flat film cathode electrodes 20 correspond to the "cathode electrode foil" in the present invention. The insulating resin 50 corresponds to the "sealing resin" in the present invention.

[0014] As shown in Figure 2(B), the capacitor element 10 comprises a flat film-shaped anode electrode 11, a dielectric layer 12, and a CP layer (solid electrolyte layer) 13. This flat film-shaped anode electrode 11 corresponds to the "valve-acting metal substrate" in the present invention.

[0015] Although detailed structural illustrations are omitted in Figures 2(A) and 2(B), the anode electrode 11 has numerous pores. In other words, the anode electrode 11 is porous. The ratio of the thickness of the porous portion on one side of the anode electrode 11 to the core metal portion and the porous portion on the other side is approximately 1:1:1. The dielectric layer 12 covers the outer surface of the anode electrode 11. In Figures 2(A) and 2(B), detailed structural illustrations of the anode electrode 11 are omitted, so the dielectric layer 12 is schematically shown as covering the macroscopic surface of the anode electrode 11. In reality, the dielectric layer 12 covers not only the macroscopic surface of the anode electrode 11 but also the inner surfaces of the numerous pores in the anode electrode 11.

[0016] The CP layer 13 covers the surface of the dielectric layer 12. A frame-shaped first mask 14 is formed on the outer periphery of the CP layer 13. In other words, the CP layer 13 is formed within the region defined by the frame-shaped first mask 14.

[0017] Furthermore, a second mask 15 is formed within the region enclosed by the first mask 14. In the first embodiment, the second mask 15 is formed near the center of the region enclosed by the first mask 14 (see Figure 3, described later). A more detailed description of the structure of the second mask 15 will be given later.

[0018] The CP layer 13 has a laminated structure consisting of an inner CP (inner solid electrolyte layer) 131 and an outer CP (outer solid electrolyte layer) 132. The inner CP 131 is formed on the surface of the dielectric layer 12. The outer CP 132 is formed on the surface of the inner CP 131.

[0019] Multiple capacitor elements 10 and multiple cathode electrodes 20 are stacked alternately so that their respective flat surfaces are parallel and overlap when viewed from above. In this case, the outer layer CP132 of the capacitor elements and the cathode electrodes 20 are directly connected. In the structure shown in Figure 2(A), the outer layer CP132 of the capacitor elements 10 and the cathode electrodes 20 are in direct contact. As a result, adjacent capacitor elements 10 and cathode electrodes 20 are electrically connected. By stacking the capacitor elements 10 and cathode electrodes 20 in this way without using adhesives, the thickness of the solid electrolytic capacitor 1 can be reduced. However, if the adhesive does not affect the thickness of the solid electrolytic capacitor 1, the capacitor elements 10 and cathode electrodes 20 may be bonded using an adhesive. In this case, it is preferable that the adhesive contains carbon.

[0020] In this stacked state, the first ends 10E1 (see Figure 1) of the multiple capacitor elements 10 are in approximately the same position when viewed from the side. Similarly, the second ends 10E2 (see Figure 1) of the multiple capacitor elements 10 are in approximately the same position when viewed from the side. Furthermore, the first ends 20E1 (see Figure 1) of the multiple cathode electrodes 20 are in approximately the same position when viewed from the side. Similarly, the second ends 20E2 (see Figure 1) of the multiple cathode electrodes 20 are in approximately the same position when viewed from the side.

[0021] The first ends 10E1 of the multiple capacitor elements 10 and the second ends 20E2 of the multiple cathode electrodes 20 are positioned on the first end 100E1 side of the capacitor element stack 100. The first ends 10E1 of the multiple capacitor elements 10 protrude outward beyond the second ends 20E2 of the multiple cathode electrodes 20.

[0022] The second ends 10E2 of the multiple capacitor elements 10 and the first ends 20E1 of the multiple cathode electrodes 20 are positioned on the second end 100E2 side of the capacitor element stack 100. The first ends 20E1 of the multiple cathode electrodes 20 protrude outward from the second ends 10E2 of the multiple capacitor elements 10.

[0023] This structure realizes a capacitor element laminate 100 having a top surface 101 and a bottom surface 102 at both ends in the stacking direction of the multiple capacitor elements 10 and multiple cathode electrodes 20. A more detailed structure of the capacitor element 10 will be described later.

[0024] The external electrode 61 covers the first end of the insulating resin 50 (the first end 10E1 of the anode electrode 11). The external electrode 61 is connected to the first end 10E1 of the anode electrode 11 of the multiple capacitor elements 10. The external electrode 62 covers the second end of the insulating resin 50 (the first end 20E1 of the cathode electrode 20). The external electrode 62 is connected to the first end 20E1 of the multiple cathode electrodes 20.

[0025] The solid electrolytic capacitor 1 is realized with the above configuration.

[0026] (Detailed structure of capacitor element 10) Next, the detailed structure of the capacitor element 10 will be explained using Figure 3. Figure 3 is a plan view of the capacitor element 10.

[0027] As shown in Figure 3, a frame-shaped first mask 14 is formed on the capacitor element 10. In a plan view, a second mask 15 is formed inside the region defined by the first mask 14. The CP layer 13 is formed in the region defined by the first mask 14 and the second mask 15. The second mask 15 has a rectangular shape in a plan view. The thickness of the first mask 14 relative to the dielectric layer 12 (first thickness) is approximately the same as the thickness of the second mask 15 relative to the dielectric layer 12 (second thickness).

[0028] When the region defined by the first mask 14 is set to 100, it is preferable that the second mask 15 is formed at a rate of 30% or less, and more preferably at a rate of 20% or less. By having the proportion of the second mask 15 formed at 30% or less, the capacitor capacitance can be obtained more efficiently even if the second mask 15 is an insulator.

[0029] Let's compare the configuration in Figure 3 with the configuration in Figure 4. Figure 4 shows an example where the second mask 15 is not formed within the region defined by the first mask 14 in the conventional configuration. In Figures 3 and 4, the areas hatched with diagonal lines indicate regions where the CP layer 13 is formed thickly due to the coffee stain phenomenon. The area enclosed by the hatched areas with diagonal lines indicates regions where the CP layer 13 is not sufficiently formed and is formed thinly due to the coffee stain phenomenon.

[0030] First, the configurations of the first mask 14 and the second mask 15 will be described. The first mask 14 and the second mask 15 are made of a material that repels the CP layer 13. More specifically, the first mask 14 and the second mask 15 are made of a water-repellent resin. Furthermore, it is preferable that the CP layer 13 is made of an aqueous dispersion of a conductive polymer. In addition, the conductive polymer forming the CP layer 13 is insoluble or sparingly soluble in water. In this case, it is preferable that the contact angle between the first mask 14 and the second mask 15 and the CP layer 13 is 90° or more.

[0031] With the above configuration, the first mask 14 and the second mask 15 repel the CP layer 13. In other words, uneven formation of the CP layer 13 within the region defined by the first mask 14 and the second mask 15 can be suppressed.

[0032] Next, we compare the lengths of the regions where the CP layer 13 is formed in the X-axis direction in the XY plane. In Figure 3, the distance between the first mask 14 and the second mask is denoted as d1, and in Figure 4, the distance between the first mask 14 and the second mask 14 (the distance between the inner circumferences of the first mask 14) is denoted as d2. Distances d1 and d2 represent the distance between masks (resin and resin). In this case, distance d1 is smaller than distance d2.

[0033] In Figure 4, the CP layer 13 is formed near the first mask 14, and there is a region (second region) near the center of the area defined by the first mask 14 where the CP layer 13 is not sufficiently formed. This is because the coffee stain phenomenon causes the CP layer 13 to form unevenly near the first mask 14.

[0034] On the other hand, in the configuration shown in Figure 3, if the coffee stain phenomenon occurs, the CP layer 13 is formed near the first mask 14 and the second mask 15. In addition, there is a region (first region) between the first mask 14 and the second mask 15 where the CP layer 13 is not sufficiently formed.

[0035] In the configuration shown in Figure 3, since distance d1 is smaller than distance d2, when the capacitor element 10 is viewed in plan view in the XY plane, the area of ​​the first region is smaller than the area of ​​the second region. In other words, the configuration shown in Figure 3 has a smaller area where the CP layer 13 is not sufficiently formed compared to the configuration shown in Figure 4.

[0036] In this case, it is preferable that the sum of the area of ​​the first region that does not contribute to the capacitance of the solid electrolytic capacitor in Figure 3 and the area of ​​the second mask 15 is smaller than the area of ​​the second region that does not contribute to the capacitance of the solid electrolytic capacitor in Figure 4. This makes it possible to form the CP layer 13 more efficiently by having the second mask 15 within the region defined by the first mask 14. As a result, the solid electrolytic capacitor 1 can easily obtain the desired capacitance.

[0037] Furthermore, it is preferable that the second mask 15 has a predetermined rigidity. This allows the second mask 15 to suppress excessive compression of the capacitor element laminate 100 when the solid electrolytic capacitor 1 is heated and pressurized.

[0038] Furthermore, it is preferable that the second mask 15 is formed near the approximate center of the region defined by the first mask 14 when viewed from above. By forming the second mask 15 near the approximate center in this manner, it becomes possible to form the CP layer 13 substantially uniformly.

[0039] (Method for Manufacturing Solid Electrolytic Capacitor 1) The solid electrolytic capacitor 1 having the above configuration is manufactured, for example, as follows. Figure 5 is a flowchart showing an example of the capacitor element formation process. Figure 6 is an external perspective view in a multi-state showing the shape of the capacitor element sheet. Figure 7 is an exploded perspective view showing the state in which the capacitor element sheet and the cathode electrode sheet are stacked. Figure 8 is an external perspective view in a multi-state showing the shape of the cathode electrode before individualization. Figure 9 is an external perspective view showing the shape of the cathode electrode before individualization. Figure 10 is a flowchart showing an example of the capacitor element formation process. Figures 11(A), 11(B), 11(C), 11(D), and 11(E) are schematic diagrams showing the process of forming the capacitor element of a solid electrolytic capacitor according to the first embodiment.

[0040] A capacitor element sheet is formed (Figure 5: S11). As shown in Figure 6, the capacitor element sheet is formed with multiple capacitor elements 10 arranged in a row, each forming a different solid electrolytic capacitor 1. As shown in Figure 6 and Figure 11(E) described later, the multiple capacitor elements 10 have through holes for the anodes.

[0041] As shown in Figure 6, multiple capacitor elements 10 (structures consisting of an anode electrode 11, a dielectric layer 12, a CP layer 13, a first mask 14, and a second mask 15) are arranged in two dimensions. Furthermore, the first mask 14 has anode through-holes 19C and groove-shaped anode through-holes 19L formed therein. More specifically, multiple cylindrical anode through-holes 19C and groove-shaped anode through-holes 19L are formed in the anode electrode 11. In this case, the multiple cylindrical anode through-holes 19C and groove-shaped anode through-holes 19L penetrate not only the anode electrode 11 but also the first mask 14. The multiple cylindrical anode through-holes 19C and groove-shaped anode through-holes 19L are arranged alternately along a predetermined cutting line (see Figure 11(E)) in which the portions that will become the multiple anode electrodes 11 are aligned. The multiple cylindrical anode through-holes 19C are formed at positions that realize the first end 10E1 of the anode electrode 11. The groove-shaped anode through-hole 19L is formed at a position that straddles the portions that will become adjacent anode electrodes 11, and at a position that provides the second end 10E2 of adjacent anode electrodes 11.

[0042] Furthermore, a second mask 15 is formed within the region defined by the first mask 14. A more specific method for forming the capacitor element 10 will be described later.

[0043] Next, as shown in Figure 7, the capacitor element sheet and the cathode electrode sheet are stacked to form a capacitor element laminate 100 (Figure 5: S12). The cathode electrode sheet is formed with multiple cathode electrodes 20 arranged on it, each forming a different solid electrolytic capacitor 1, as shown in Figure 8.

[0044] As shown in Figs. 8 and 9, a plurality of cylindrical cathode through holes 29C and groove-shaped cathode through holes 29L are formed in the cathode electrode 20. The plurality of cylindrical cathode through holes 29C and the groove-shaped cathode through holes 29L are alternately arranged along the direction of a predetermined cutting line where portions serving as the plurality of cathode electrodes 20 are aligned. The plurality of cylindrical cathode through holes 29C are formed at positions that realize the first end 20E1 of the cathode electrode 20. The groove-shaped cathode through holes 29L are formed at positions straddling adjacent portions serving as cathode electrodes 20 and at positions that realize the second ends 20E2 of adjacent cathode electrodes 20.

[0045] The positional relationship among the anode through holes 19C, the groove-shaped anode through holes 19L, the plurality of cylindrical cathode through holes 29C, and the groove-shaped cathode through holes 29L is shown below.

[0046] - When viewed in the lamination direction (thickness direction), the plurality of cylindrical anode through holes 19C in the capacitor element sheet overlap with the groove-shaped cathode through holes 29L in the cathode electrode sheet (see Fig. 7). - When viewed in the lamination direction (thickness direction), the groove-shaped anode through holes 19L in the capacitor element sheet overlap with the plurality of cylindrical cathode through holes 29C in the cathode electrode sheet (see Fig. 7). Therefore, a plurality of through holes penetrating from the upper surface to the lower surface are formed in the capacitor element laminate 100.

[0047] Next, the capacitor element laminate 100 is sealed with an insulating resin 50 (Fig. 5: S13). At this time, the sheet laminate is provided with through holes penetrating from the upper surface to the lower surface of the capacitor element laminate 100 (holes formed by overlapping the aforementioned anode through holes 19C and cathode through holes 29L, and holes formed by overlapping the anode through holes 19L and cathode through holes 29C), and resin sealing is performed by compression molding. As a result, the insulating resin 50 is filled into the through holes. In addition, the top surface and the bottom surface of the capacitor element laminate 100 are covered with the insulating resin.

[0048] The sealing of the insulating resin 50 is performed in a multi-state before the solid electrolytic capacitors 1 are singulated (a state in which a plurality of parts to become the solid electrolytic capacitors 1 are arranged).

[0049] Next, the stacked capacitor element stack 100 shown in Figure 7 is heated and pressurized (Figure 5: S14).

[0050] Next, the sheet laminate sealed with insulating resin 50 is cut and separated into individual pieces (Figure 5: S15). It is cut along a predetermined cutting line for forming the solid electrolytic capacitor 1. This forms multiple solid electrolytic capacitors 1 (referred to as the base bodies of the solid electrolytic capacitor 1) in which no external electrodes have been formed. In other words, individual pieces are formed in which the anode electrode 11 and cathode electrode 20 are covered with insulating resin 50, and the anode electrode 11 and cathode electrode 20 are not undesirably exposed to the outside.

[0051] Next, external electrodes 61 and 62 are formed on the end face of the solid electrolytic capacitor 1 (Figure 5: S16).

[0052] (Formation Process of Capacitor Element Sheet) Next, a more detailed process for forming the capacitor element 10 (capacitor element sheet) will be described. Figure 10 is a flowchart showing an example of the process for forming a capacitor element. Figures 11(A), 11(B), 11(C), 11(D), and 11(E) are schematic diagrams showing the process for forming the capacitor element of a solid electrolytic capacitor according to the first embodiment. Note that in Figures 11(A), 11(B), 11(C), 11(D), and 11(E), a portion of the capacitor element in a multi-state is shown.

[0053] As shown in Figure 11(A), the anode electrode 11 is subjected to a chemical conversion treatment to form a dielectric layer 12 (Figure 10: S21). As described above, numerous holes are formed on the surface of the anode electrode 11 by etching, and the area near the surface of the anode electrode 11 is porous. The dielectric layer 12 covers the surface of the anode electrode 11, including the inner surfaces of the holes.

[0054] Next, as shown in Figure 11(B), a first mask 14 and a second mask 15 are formed on the surface of the dielectric layer 12 (Figure 10: S22). The first mask 14 has a frame-shaped opening. The second mask 15 is formed within the region defined by the first mask 14. The first mask 14 and the second mask 15 are formed, for example, by screen printing. By forming the first mask 14 and the second mask 15 simultaneously, it becomes possible to easily form the capacitor element 10. It is preferable that the second mask 15 is formed near the center of the region defined by the first mask 14.

[0055] Next, as shown in Figure 11(C), an inner layer CP 131 is formed in the region defined by the first mask 14 and the second mask 15 (Figure 10: S23). The region defined by the first mask 14 and the second mask 15 is composed of an annular region whose outer edge is defined by the first mask 14 and whose inner edge is defined by the second mask 15.

[0056] Next, as shown in Figure 11(D), an outer layer CP132 is formed in the region where the inner layer CP131 is formed (Figure 8: S24). The outer layer CP132 is made of the same material as the inner layer CP131, for example.

[0057] Next, as shown in Figure 11(E), a through-hole 19C for the anode and a groove-shaped through-hole 19L for the anode are formed in the first mask 14 (Figure 10: S25).

[0058] In the above-described configuration, step S22 shows a process in which the first mask 14 and the second mask 15 are formed simultaneously. However, the first mask 14 and the second mask 15 may be formed in separate processes. By forming them in separate processes, the individual processes for forming the first mask 14 and the second mask 15 can be simplified, thereby improving the efficiency of the process.

[0059] In the above configuration, step S22 shows the formation of the first mask 14, followed by step S25 in which a through-hole for the anode is formed in the anode electrode 11. However, the first mask 14 may be formed after the anode through-hole is formed in the anode electrode 11, without blocking the anode through-hole.

[0060] In this way, by providing the first mask 14 and the second mask 15, it becomes possible to form the CP layer 13 more efficiently. That is, even if the coffee stain phenomenon occurs when forming the CP layer 13, variations in the thickness of the CP layer 13 can be suppressed, and the desired capacitor capacitance can be obtained. In other words, the area where the CP layer 13 is thin can be reduced.

[0061] In the above-described configuration, the first mask 14 and the second mask 15 are made of insulating resin. However, the first mask 14 and the second mask 15 may be made of resins with different components. Furthermore, the second mask 15 may be made of a conductive resin (for example, an insulating resin mixed with a conductive material). In this way, if the second mask 15 is conductive, the second mask 15 can function as an electrode.

[0062] [Second Embodiment] A capacitor element and a solid electrolytic capacitor according to a second embodiment of the present invention will be described. In the second embodiment, the materials of the first mask 14 and the second mask 15, and the configuration of the CP layer 13 are different. The configuration of the capacitor element and solid electrolytic capacitor according to the second embodiment is the same as that of the solid electrolytic capacitor according to the first embodiment, and the description of the similar parts will be omitted.

[0063] The first mask 14 and the second mask are made of a material that repels the dispersion of conductive polymer that forms the CP layer 13, similar to the first embodiment. More specifically, the first mask 14 and the second mask 15 are made of an oil-repellent resin.

[0064] In this case, the dispersion medium for the conductive polymer dispersion forming the CP layer 13 is preferably an organic solvent. Furthermore, the conductive polymer forming the CP layer 13 is insoluble or sparingly soluble in the organic solvent. As a result, the first mask 14 and the second mask 15 repel the dispersion of the conductive polymer forming the CP layer 13. That is, variations in the thickness of the CP layer 13 can be suppressed within the region defined by the first mask 14 and the second mask 15.

[0065] Even with this configuration, the area where the CP layer 13 is not sufficiently formed becomes smaller. Therefore, the presence of the second mask 15 within the area defined by the first mask 14 makes it possible to form the CP layer 13 more efficiently. As a result, the solid electrolytic capacitor 1 can easily obtain the desired capacitance.

[0066] [Modified Examples] Modified examples of the capacitor element and solid electrolytic capacitor of the present invention will be described with reference to the figures. Figures 12(A), 12(B), 12(C), 12(D), 12(E), and 12(F) are plan views of the capacitor element according to the modified examples. Figures 13(A), 13(B), 13(C), 13(D), 13(E), and 13(F) are plan views of the capacitor element according to the modified examples. In the modified examples, the shape of the second mask 15 is different from that of the first embodiment. Other configurations of the capacitor element and solid electrolytic capacitor according to the modified examples are the same as those of the solid electrolytic capacitor according to the first embodiment, and descriptions of similar parts will be omitted.

[0067] Figure 12(A) differs in that the second mask 15A is elliptical in shape. In this configuration, even if the coffee stain phenomenon occurs, the area in which the thickness of the CP layer 13 becomes thinner can be made smaller. As a result, the CP layer 13 can be formed more efficiently, and the desired capacitor capacitance can be obtained more efficiently.

[0068] Figure 12(B) differs in that it has multiple rectangular second masks 15B. In this configuration, even if the coffee stain phenomenon occurs, it is possible to reduce the area in which the CP layer 13 becomes thin, and the CP layer 13 can be formed efficiently. That is, it becomes possible to obtain the desired capacitor capacitance. Furthermore, it is preferable that the multiple second masks 15B are formed at equal positions in the area defined by the first mask 14. Here, equal positions mean that the multiple second masks 15B are line-symmetric with respect to a hypothetical axis of symmetry set to be parallel to the area defined by the first mask 14 in a top view, and / or that the multiple second masks 15B are rotationally symmetric with respect to a hypothetical axis of symmetry set to be orthogonal to the area defined by the first mask 14 in a top view. This makes it possible to further reduce the area in which the thickness of the CP layer 13 becomes thin. As a result, the CP layer 13 can be formed more efficiently, and the desired capacitor capacitance can be obtained more efficiently.

[0069] Figure 12(C) differs in that it has multiple linear second masks 15C. In this configuration, even if the coffee stain phenomenon occurs, the area in which the thickness of the CP layer 13 becomes thinner can be made smaller. As a result, the CP layer 13 can be formed more efficiently, and the desired capacitor capacitance can be obtained more efficiently. Furthermore, it is preferable that the multiple second masks 15C are formed at equal positions in the region defined by the first mask 14. This makes it possible to form the CP layer 13 more uniformly. As described above, equal positions mean that the multiple second masks 15C are line-symmetric with respect to a symmetry axis virtually set parallel to the region defined by the first mask 14 in a top view, and / or that the multiple second masks 15C are rotationally symmetric with respect to a symmetry axis virtually set orthogonal to the region defined by the first mask 14 in a top view.

[0070] Figure 12(D) differs in that the second mask 15D is cross-shaped. In this configuration, even if the coffee stain phenomenon occurs, the area in which the thickness of the CP layer 13 becomes thinner can be made smaller. As a result, the CP layer 13 can be formed more efficiently, and the desired capacitor capacitance can be obtained more efficiently.

[0071] Figure 12(E) differs in that the second mask 15E has protrusions (irregularities) on its outer edge. In this configuration, even if the coffee stain phenomenon occurs, the area in which the thickness of the CP layer 13 becomes thinner can be made smaller. As a result, the CP layer 13 can be formed more efficiently, and the desired capacitor capacitance can be obtained more efficiently.

[0072] Figure 12(F) differs in that it has multiple triangular second masks 15F. In this configuration, even if the coffee stain phenomenon occurs, the area in which the thickness of the CP layer 13 becomes thinner can be made smaller. As a result, the CP layer 13 can be formed more efficiently, and the desired capacitor capacitance can be obtained more efficiently. Furthermore, it is preferable that the multiple second masks 15F are formed at equal positions in the region defined by the first mask 14. As described above, equal positions mean that the multiple second masks 15F are line-symmetric with respect to a symmetry axis virtually set parallel to the region defined by the first mask 14 in a top view, and / or that the multiple second masks 15F are rotationally symmetric with respect to a symmetry axis virtually set orthogonal to the region defined by the first mask 14 in a top view.

[0073] Figure 13(A) differs in that the second mask 15G is annular in shape. In this configuration, even if the coffee stain phenomenon occurs, the area in which the thickness of the CP layer 13 becomes thinner can be made smaller. As a result, the CP layer 13 can be formed more efficiently, and the desired capacitor capacitance can be obtained more efficiently. In other words, the desired capacitor capacitance can be obtained. Note that the second mask 15G is not limited to an annular shape; it may also be a shape in which a part of the annulus is missing, or a shape in which multiple annuluses are connected.

[0074] Figure 13(B) differs in that it includes a plurality of polygonal second masks 15H. In this configuration, even if the coffee stain phenomenon occurs, the area in which the thickness of the CP layer 13 becomes thinner can be made smaller. As a result, the CP layer 13 can be formed more efficiently, and the desired capacitor capacitance can be obtained more efficiently. Furthermore, it is preferable that the plurality of second masks 15H are formed at equal positions in the region defined by the first mask 14. This makes it possible to form the CP layer 13 more uniformly. As described above, equal positions mean that the plurality of second masks 15H are line-symmetric with respect to a symmetry axis virtually set parallel to the region defined by the first mask 14 in a top view, and / or that the plurality of second masks 15H are rotationally symmetric with respect to a symmetry axis virtually set orthogonal to the region defined by the first mask 14 in a top view.

[0075] Figure 13(C) differs in that it includes a plurality of circular second masks 15I having protrusions on their outer edges. In this configuration, even if the coffee stain phenomenon occurs, the area in which the thickness of the CP layer 13 becomes thinner can be made smaller. As a result, the CP layer 13 can be formed more efficiently, and the desired capacitor capacitance can be obtained more efficiently. Furthermore, it is preferable that the plurality of second masks 15I are formed at equal positions in the region defined by the first mask 14. This makes it possible to form the CP layer 13 more uniformly. As described above, equal positions mean that the plurality of second masks 15I are line-symmetric with respect to a symmetry axis virtually set parallel to the region defined by the first mask 14 in a top view, and / or rotationally symmetric with respect to a symmetry axis virtually set orthogonal to the region defined by the first mask 14 in a top view.

[0076] Figure 13(D) differs in that the second mask 15J is lattice-shaped. In this configuration, even if the coffee stain phenomenon occurs, the area in which the thickness of the CP layer 13 becomes thinner can be made smaller. As a result, the CP layer 13 can be formed more efficiently, and the desired capacitor capacitance can be obtained more efficiently.

[0077] Figure 13(E) differs in that the second mask 15K is frame-shaped (annular). In this configuration, even if the coffee stain phenomenon occurs, the area in which the thickness of the CP layer 13 becomes thinner can be made smaller. As a result, the CP layer 13 can be formed more efficiently, and the desired capacitor capacitance can be obtained more efficiently.

[0078] Figure 13(F) differs in that the second mask 15L has multiple frame-like (annular) sections. Even with this configuration, if the coffee stain phenomenon occurs, the area in which the thickness of the CP layer 13 becomes thinner can be made smaller. As a result, the CP layer 13 can be formed more efficiently, and the desired capacitor capacitance can be obtained more efficiently. Furthermore, it is preferable that the multiple second masks 15L have the same center of gravity. This allows the CP layer 13 to be formed more uniformly. As described above, uniform positioning means that the multiple second masks 15L are line-symmetric with respect to a symmetry axis virtually set parallel to the region defined by the first mask 14 in a top view, and / or rotationally symmetric with respect to a symmetry axis virtually set perpendicular to the region defined by the first mask 14 in a top view.

[0079] However, the above configuration is not limited to any configuration that allows the distance between the first mask 14 and the second mask 15 to be shortened within the region defined by the first mask 14.

[0080] [Comparative Example] Next, we will compare the configurations of the first embodiment, the second embodiment, and the comparative example. As described above, when using the configuration of the first embodiment and the configuration of the second embodiment, the CP layer 13 can be formed efficiently. That is, even when the coffee stain phenomenon occurs, the area in which the thickness of the CP layer 13 becomes thinner can be made smaller. As a result, the CP layer 13 can be formed more efficiently, and the desired capacitor capacitance can be obtained more efficiently.

[0081] The comparative example has the following configuration: The first mask 14 and the second mask 15 are made of a water-repellent resin. The CP layer 13 is made of a conductive polymer water solution, and the solvent is an organic solvent.

[0082] In this comparative example configuration, the first mask 14 and the second mask 15 do not repel the CP layer 13. Furthermore, in the regions defined by the first mask and the second mask 15, the CP layer 13 becomes non-uniform. In other words, it was not possible to improve the capacitor capacitance.

[0083] As described above, by incorporating the configurations of the first and second embodiments, even when the coffee stain phenomenon occurs, it is possible to reduce the area in which the CP layer 13 becomes thin, and the CP layer 13 can be formed efficiently. In other words, it becomes possible to easily obtain the desired capacitor capacitance.

[0084] (Explanation of specific materials and other examples for each component of the solid electrolytic capacitor 1) (Capacitor element) The capacitor element 10 is realized using, for example, the following materials and thicknesses.

[0085] The anode electrode 11 is made of, for example, a single metal such as aluminum, tantalum, niobium, titanium, zirconium, or magnesium, or an alloy containing these metals. Preferably, the anode electrode 11 is aluminum or an aluminum alloy. The anode electrode 11 can be any valve-acting metal that exhibits so-called valve action.

[0086] The anode electrode 11 is preferably flat, and the thickness of the core portion of the anode electrode 11 (the central part not reached by the pores of the porous material) is preferably 5 μm or more and 100 μm or less. The thickness of the porous portion (the portion where the pores of the porous material are formed) (thickness on one side) is preferably 5 μm or more and 200 μm or less.

[0087] The dielectric layer 12 is preferably made of an oxide film of the anode electrode 11. For example, when aluminum foil is used for the anode electrode 11, the dielectric layer 12 is formed by oxidation in an aqueous solution containing boric acid, phosphoric acid, adipic acid, or their sodium salts, ammonium salts, etc. The thickness of the dielectric layer 12 is preferably 1 nm or more and 100 nm or less.

[0088] The inner layer CP131 is realized using, for example, a conductive polymer with pyrroles, thiophenes, anilines, etc. as its backbone, or a conductive polymer with thiophenes as its backbone, such as PEDOT [poly(3,4-ethylenedioxythiophene)], and is a PEDOT:PSS layer compounded with polystyrene sulfonic acid (PSS) which acts as a dopant. The inner layer CP131 is formed, for example, by a method of forming a polymerized film of poly(3,4-ethylenedioxythiophene) etc. on the surface of the dielectric layer 12 using a processing solution containing monomers such as 3,4-ethylenedioxythiophene, or by a method of applying a dispersion of polymer such as poly(3,4-ethylenedioxythiophene) to the surface of the dielectric part and drying it.

[0089] The thickness of the outer layer CP132 is preferably 2 μm or more and 20 μm or less. The material of the outer layer CP132 is the same as the material of the inner layer CP131.

[0090] The cathode electrode 20 is preferably made of aluminum or an aluminum alloy. The thickness of the cathode electrode 20 is, for example, about the same as the thickness of the anode electrode 11.

[0091] The insulating resin 50 may contain fillers. Preferred resins include, for example, epoxy resins, phenolic resins, polyimide resins, silicone resins, polyamide resins, and liquid crystal polymers. Preferred fillers include, for example, insulating oxide particles such as silica particles, alumina particles, titania particles, and zirconia particles. The maximum diameter of the fillers is preferably, for example, 30 μm or more and 40 μm or less. For example, a solid epoxy resin containing silica particles is more preferable.

[0092] d1, d2... Distance 1... Solid electrolytic capacitor 10... Capacitor element 10E1... First end 10E2... Second end 11... Anode electrode 12... Dielectric layer 13... CP layer 14... First mask 15, 15A, 15B, 15C, 15D, 15E, 15F, 15G, 15H, 15I, 15J, 15K, 15L... Second mask 19C, 19L... Through-hole for anode 20... Cathode electrode 20E1... First end 20E2... Second end 29C, 29L... Through-hole for cathode 50... Insulating resin 61, 62... External electrodes 100... Capacitor element laminate 101... Top surface 102... Bottom surface 131... Inner layer CP 132... Outer layer CP

Claims

1. A capacitor element comprising: a valve-acting metal substrate having a dielectric layer on at least one main surface; a first mask formed in the shape of a frame on the surface of the dielectric layer; a second mask formed within a region defined by the first mask; and a solid electrolyte layer formed within a region defined by the first and second masks.

2. The capacitor element according to claim 1, wherein the second mask is formed in the central part of the region defined by the first mask in a plan view.

3. The capacitor element according to claim 1 or claim 2, wherein the first mask and the second mask are insulating.

4. The capacitor element according to claim 1 or claim 2, wherein the second mask is conductive.

5. The capacitor element according to any one of claims 1 to 4, wherein the conductive polymer forming the solid electrolyte layer is insoluble or sparingly soluble in water, and the first mask and the second mask are water-repellent.

6. The capacitor element according to any one of claims 1 to 4, wherein the conductive polymer forming the solid electrolyte layer is insoluble or sparingly soluble in an organic solvent, and the first mask and the second mask are oil-repellent.

7. The capacitor element according to any one of claims 1 to 6, wherein the first thickness of the first mask with respect to the dielectric layer is substantially the same as the second thickness of the second mask with respect to the dielectric layer.

8. The capacitor element according to any one of claims 1 to 7, wherein, when the valve-acting metal substrate is viewed from above, the second mask is formed in a proportion of 30% or less of the region defined by the first mask.

9. The capacitor element according to any one of claims 1 to 8, wherein the contact angles of the first mask and the second mask with respect to the solid electrolyte layer are 90° or more.

10. A capacitor element according to any one of claims 1 to 9, comprising a plurality of the second masks, wherein the plurality of the second masks are each formed at equal positions in the region defined by the first mask.

11. A solid electrolytic capacitor comprising: a plurality of capacitor elements according to any one of claims 1 to 10; a plurality of flat film cathode electrode foils; a sheet laminate formed by alternately stacking the plurality of capacitor elements and the plurality of cathode electrode foils in the stacking direction; a sealing resin for sealing the sheet laminate; and an external electrode connected to the sheet laminate.

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