Semiconductor module

Abstract

This semiconductor module comprises a semiconductor element, a sealing part, an insulating substrate, and a conductive part. The semiconductor element has an element main surface and an element back surface facing away from each other in the thickness direction, and is mounted on the conductive part. The sealing part covers the semiconductor element. The insulating substrate has a substrate main surface facing the element back surface in the thickness direction. The conductive part is disposed on the substrate main surface. The sealing part has a top surface facing the same direction as the element main surface in the thickness direction, and a signal opening provided in the top surface. The conductive part includes a signal terminal part that is electrically connected to the semiconductor element and is exposed from the signal opening.

Description

Semiconductor Module

[0001] The present disclosure relates to a semiconductor module.

[0002] Conventionally, semiconductor modules mounted with semiconductor elements such as MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) and IGBTs (Insulated-Gate Bipolar Transistors) are widely known. Patent Document 1 discloses an example of a conventional semiconductor module. The semiconductor module described in Patent Document 1 includes a plurality of semiconductor elements, a plurality of input terminals, an output terminal, a plurality of control terminals, a control terminal support, and a sealing resin. The sealing resin covers the plurality of semiconductor elements. The plurality of input terminals, the output terminal, and the plurality of control terminals each protrude from the sealing resin. The plurality of semiconductor elements include a first semiconductor element and a second semiconductor element. The plurality of semiconductor elements (the first semiconductor element and the second semiconductor element) convert power input from the plurality of input terminals via a switching function and output the converted power from the output terminal. Each of the plurality of control terminals is electrically connected to one of the plurality of semiconductor elements (the first semiconductor element and the second semiconductor element). Each of the plurality of control terminals is a signal terminal for inputting or outputting a signal for controlling the switching function of the plurality of semiconductor elements. The plurality of control terminals are disposed on the control terminal support.

[0003] Japanese Unexamined Patent Application Publication No. 2023-181544

[0004] [Abstract] Semiconductor modules can be mounted in various electronic devices ranging from industrial equipment to home appliances, information terminals, and automotive equipment. Therefore, there are cases where a position for the plurality of control terminals different from that of the semiconductor module described in Patent Document 1 is required.

[0005] An object of the present disclosure is to provide an improved semiconductor module compared to conventional ones. In particular, in view of the above circumstances, an object of the present disclosure is to provide a semiconductor module capable of improving the degree of freedom in arrangement of signal terminals.

[0006] A semiconductor module provided by a first aspect of this disclosure comprises: at least one first semiconductor element having a first element main surface and a first element back surface facing opposite directions in the thickness direction; a sealing portion covering the at least one first semiconductor element; an insulating substrate having a substrate main surface facing the first element back surface in the thickness direction; and a first conductive portion disposed on the substrate main surface and on which the at least one first semiconductor element is mounted, wherein the sealing portion has a top surface facing the same direction as the first element main surface in the thickness direction, and a first signal opening formed on the top surface; and the first conductive portion includes a first signal terminal portion that is electrically connected to the at least one first semiconductor element and exposed from the first signal opening.

[0007] Other features and advantages of this disclosure will become more apparent from the detailed description below, based on the accompanying drawings.

[0008] Figure 1 is a perspective view showing a semiconductor module according to the first embodiment. Figure 2 is a perspective view of Figure 1 with the sealing portion omitted. Figure 3 is a plan view showing a semiconductor module according to the first embodiment. Figure 4 is a plan view of Figure 3 with the sealing portion indicated by dashed lines. Figure 5 is a plan view of Figure 4 with one of the two conductive members indicated by dashed lines. Figure 6 is a plan view of Figure 5 with one of the two conductive members and the sealing portion omitted, and one of the two conductive members indicated by dashed lines. Figure 7 is a partially enlarged plan view of Figure 6. Figure 8 is a plan view showing a support member and a plurality of semiconductor elements of a semiconductor module according to the first embodiment, with some of the other components indicated by dashed lines. Figure 9 is a front view showing a semiconductor module according to the first embodiment. Figure 10 is a bottom view showing a semiconductor module according to the first embodiment. Figure 11 is a rear view showing a semiconductor module according to the first embodiment. Figure 12 is a side view (right side) showing a semiconductor module according to the first embodiment. Figure 13 is a cross-sectional view along the line XIII-XIII in Figure 4. Figure 14 is a partially enlarged cross-sectional view of a part of Figure 13. Figure 15 is a partially enlarged cross-sectional view of a part of Figure 13. Figure 16 is a cross-sectional view along the line XVI-XVI in Figure 4. Figure 17 is a cross-sectional view along the line XVII-XVII in Figure 4. Figure 18 is a cross-sectional view along the line XVIII-XVIII in Figure 4. Figure 19 is a cross-sectional view along the line XIX-XIX in Figure 4. Figure 20 is a cross-sectional view along the line XX-XX in Figure 4. Figure 21 is a cross-sectional view along the line XXI-XXI in Figure 4. Figure 22 is a cross-sectional view along the line XXII-XXII in Figure 4. Figure 23 is a plan view showing a power conversion unit equipped with a semiconductor module according to the first embodiment. Figure 24 is a front view showing a power conversion unit equipped with a semiconductor module according to the first embodiment. Figure 25 is a cross-sectional view showing a power conversion unit equipped with a semiconductor module according to the first embodiment, corresponding to the cross-section in Figure 19. Figure 26 is a partially enlarged cross-sectional view of Figure 25. Figure 27 is a schematic diagram of a vehicle equipped with a semiconductor module according to the first embodiment. Figure 28 is a perspective view showing a semiconductor module according to a modified example of the first embodiment.Figure 29 is a plan view showing a semiconductor module according to a modification of the first embodiment, with the sealing portion indicated by dashed lines. Figure 30 is a cross-sectional view along the line XXX-XXX in Figure 29. Figure 31 is a cross-sectional view along the line XXXI-XXXI in Figure 29. Figure 32 is a plan view showing a semiconductor module according to the second embodiment. Figure 33 is a view of the plan view of Figure 32, with the sealing portion indicated by dashed lines. Figure 34 is a plan view showing a semiconductor module according to a modification of the second embodiment, with the sealing portion indicated by dashed lines. Figure 35 is a plan view showing a semiconductor module according to the third embodiment, with the sealing portion indicated by dashed lines. Figure 36 is a cross-sectional view along the line XXXVI-XXXVI in Figure 35. Figure 37 is a cross-sectional view along the line XXXVII-XXXVII in Figure 35. Figure 38 is a plan view showing a semiconductor module according to the fourth embodiment, with the sealing portion indicated by dashed lines. Figure 39 is a partially enlarged plan view of a semiconductor module according to the fourth embodiment, corresponding to a partially enlarged view of Figure 7. Figure 40 is a plan view showing a semiconductor module according to the fifth embodiment. Figure 41 is a cross-sectional view along the line XLI-XLI in Figure 40, corresponding to the cross-section in Figure 21. Figure 42 is a cross-sectional view showing a semiconductor module according to the sixth embodiment, corresponding to the cross-section in Figure 16. Figure 43 is a plan view showing a semiconductor module according to the first modification of the sixth embodiment, with the sealing portion indicated by dashed lines. Figure 44 is a cross-sectional view along the line XLIV-XLIV in Figure 43. Figure 45 is a plan view showing a semiconductor module according to the second modification of the sixth embodiment, with the sealing portion indicated by dashed lines. Figure 46 is a cross-sectional view along the line XLVI-XLVI in Figure 45. Figure 47 is a plan view showing a semiconductor module according to the seventh embodiment, with the sealing portion indicated by dashed lines. Figure 48 is a plan view showing a semiconductor module according to the eighth embodiment. Figure 49 is a cross-sectional view showing a semiconductor module according to the eighth embodiment, corresponding to the cross-section in Figure 19. Figure 50 is a plan view showing a semiconductor module according to another configuration example, in which the sealing portion is indicated by dashed lines. Figure 51 is a plan view showing a semiconductor module according to another configuration example, in which the sealing portion is indicated by dashed lines. Figure 52 is a plan view showing a semiconductor module according to another configuration example.Figure 53 is a plan view showing a semiconductor module according to another configuration example.

[0009] [Detailed Description] Preferred embodiments of the semiconductor modules of this disclosure are described below with reference to the drawings. Hereafter, identical or similar components are denoted by the same reference numerals, and redundant descriptions are omitted. The terms "first," "second," "third," etc., in this disclosure are used merely as labels and are not necessarily intended to assign a sequence to the objects.

[0010] In this disclosure, "object A is formed on object B" and "object A is formed on object B" include, unless otherwise specified, "object A is directly formed on object B" and "object A is formed on object B with another object interposed between object A and object B." Similarly, "object A is located on object B" and "object A is located on object B" include, unless otherwise specified, "object A is directly located on object B" and "object A is located on object B with another object interposed between object A and object B." Similarly, "object A is located on object B" includes, unless otherwise specified, "object A is in contact with object B and located on object B" and "object A is located on object B with another object interposed between object A and object B." Furthermore, "object A overlaps with object B when viewed in a certain direction" includes, unless otherwise specified, "object A overlaps with all of object B" and "object A overlaps with a part of object B." Also, "object A (or its material) contains material C" includes "object A (or its material) consists of material C" and "the main component of object A (or its material) is material C." Furthermore, "a surface A faces a certain direction B (one side or the other side)" is not limited to cases where the angle of surface A with respect to direction B is 90°, but also includes cases where surface A is inclined with respect to direction B. Furthermore, "a surface A is perpendicular to surface B" is not limited to cases where the angle of surface A with respect to surface B is 90°, but also includes cases where surface A is inclined with respect to surface B.

[0011] First Embodiment: Figures 1 to 22 show a semiconductor module A10 according to the first embodiment. As shown in these figures, the semiconductor module A10 comprises a plurality of semiconductor elements 11, a plurality of semiconductor elements 12, a support member 20, a plurality of signal boards 24 to 27, a plurality of base portions 281 to 286, two conductive members 31 and 32, a plurality of terminal members 34 to 36, a plurality of connecting members 411 to 413, 421 to 423, 431 to 433, 441 to 443, a sealing portion 5, and a plurality of terminal members 6.

[0012] For the sake of explanation, we will refer to the mutually orthogonal thickness direction z, the first direction y, and the second direction x. The thickness direction z corresponds to the thickness direction of semiconductor module A10. Also, "plan view" refers to the view in the thickness direction z. The first direction y is orthogonal to the thickness direction z. The second direction x is orthogonal to both the thickness direction z and the first direction y. One direction in the thickness direction z is sometimes called "up," and the other direction in the thickness direction z is sometimes called "down." Terms such as "up," "down," "upper," "downward," "upper surface," and "lower surface" indicate the relative positional relationship of each component in the thickness direction z, and do not necessarily define a relationship with the direction of gravity.

[0013] The semiconductor module A10 converts a DC power supply voltage supplied from outside the semiconductor module A10 into an AC voltage using multiple semiconductor elements 11 and 12. The converted AC voltage is input to a power supply object (such as a motor) outside the semiconductor module A10. The power supply object is not limited to a motor.

[0014] Each of the multiple semiconductor elements 11 and 12 is, for example, a MOSFET. Alternatively, each of the multiple semiconductor elements 11 and 12 may be other transistors such as IGBTs and bipolar transistors, or diodes. In this embodiment, each of the multiple semiconductor elements 11 and 12 is an n-channel type MOSFET with a vertical structure.

[0015] Each of the multiple semiconductor elements 11 and 12 includes a compound semiconductor substrate. The composition of the compound semiconductor substrate includes silicon (Si), a wide-bandgap semiconductor with a wider bandgap than Si, or an ultra-wide-bandgap semiconductor with an even wider bandgap than a wide-bandgap semiconductor. The wide-bandgap semiconductor includes, but is not limited to, silicon carbide (SiC) and gallium nitride (GaN). The ultra-wide-bandgap semiconductor is, for example, gallium oxide (Ga ２ O ３ This includes, but is not limited to, materials such as ), diamond and aluminum nitride (AlN). In this embodiment, the composition of each compound semiconductor substrate of the plurality of semiconductor elements 11 and plurality of semiconductor elements 12 includes SiC. Note that the types and compositions of the plurality of semiconductor elements 11 and plurality of semiconductor elements 12 are not limited to being the same configuration, but may be different configurations.

[0016] As shown in Figures 6 and 21, the multiple semiconductor elements 11 are mounted on a support member 20 (metal layer 221, described later). The multiple semiconductor elements 11 are arranged along the second direction x. In the illustrated example, the semiconductor module A10 has four semiconductor elements 11, but the number of semiconductor elements 11 is not limited to four and can be changed as appropriate according to the specifications of the semiconductor module A10.

[0017] As shown in Figure 14, each of the multiple semiconductor elements 11 has an element main surface 11a and an element back surface 11b. The element main surface 11a and the element back surface 11b are separated in the thickness direction z. The element main surface 11a and the element back surface 11b face opposite each other in the thickness direction z. The element main surface 11a faces upward in the thickness direction z, and the element back surface 11b faces downward in the thickness direction z. The element back surface 11b faces the support member 20.

[0018] Each of the multiple semiconductor elements 11 has a back electrode 111, a main surface electrode 112, and a main surface electrode 113. The back electrode 111, main surface electrode 112, and main surface electrode 113 described below are common to each semiconductor element 11 unless otherwise specified.

[0019] As shown in Figure 14, the back electrode 111 is located on the back surface 11b of the element and is exposed on the back surface 11b. As shown in Figures 7 and 14, the main surface electrodes 112 and 113 are located on the main surface 11a of the element and are exposed on the main surface 11a. In the illustrated example, the main surface electrode 112 includes a power pad 1121 and a signal pad 1122. The signal pad 1122 is located on one side of the first direction y (the side where the signal substrate 24 is located in the first direction y) relative to the power pad 1121. The signal pad 1122 is adjacent to the main surface electrode 113 in the second direction x. The planar area of ​​the power pad 1121 is larger than the planar area of ​​each of the signal pads 1122. The planar area of ​​the main surface electrode 113 is smaller than the planar area of ​​the power pad 1121 of the main surface electrode 112. Unlike the illustrated example, the power pad 1121 of the main surface electrode 112 may be divided into two or more regions. The main surface electrode 112 may include two signal pads 1122. In this example, the two signal pads 1122 may be individually positioned on either side of the main surface electrode 113, for example, in a second direction x. That is, in a second direction x, the main surface electrode 113 may be sandwiched between the two signal pads 1122. The main surface electrode 112 does not have to include signal pads 1122. As shown in Figure 7, the main surface electrode 113 and the signal pads 1122 are located on the same side as the signal substrate 24 with respect to the power pad 1121 in a first direction y.

[0020] Each semiconductor element 11 switches between an ON state (conductive state) and an OFF state (disconnected state) in response to a first drive signal input to the main surface electrode 113. The alternating switching between the ON and OFF states of each semiconductor element 11 is called switching operation. In the ON state (conductive state), the back surface electrode 111 and the main surface electrode 112 (power pad 1121) are conductive, and in the OFF state (disconnected state), the back surface electrode 111 and the main surface electrode 112 (power pad 1121) are nonconductive. In each semiconductor element 11, current flows from the back surface electrode 111 to the main surface electrode 112 (power pad 1121) in the ON state, and this current is disconnected in the OFF state. In the main surface electrode 112, the signal pad 1122 is short-circuited to the power pad 1121 inside the semiconductor element 11. In this example, the potential of the signal pad 1122 is equal to the potential of the power pad 1121. In the example where each semiconductor element 11 is a MOSFET, the back electrode 111 is the drain electrode, the main surface electrode 112 is the source electrode, and the main surface electrode 113 is the gate electrode. Here, on the main surface electrode 112, the power pad 1121 is the source pad, and the signal pad 1122 is the source sense pad.

[0021] The semiconductor module A10 further comprises a plurality of conductive bonding layers 119. As can be seen from Figure 14, each of the plurality of semiconductor elements 11 is bonded to the support member 20 (metal layer 221 described later) by a corresponding one of the plurality of conductive bonding layers 119. Each of the plurality of conductive bonding layers 119 is interposed between the back electrode 111 of the corresponding semiconductor element 11 and the support member 20 (metal layer 221 described later), making them electrically connected. The back surface 11b (back electrode 111) of each semiconductor element 11 is electrically bonded to the support member 20 (metal layer 221 described later) by the corresponding conductive bonding layer 119. Each conductive bonding layer 119 is, for example, solder. In addition, each conductive bonding layer 119 may contain a sintered body of metal particles (for example, silver particles), or it may be an insert metal used in solid-phase diffusion bonding.

[0022] As shown in Figures 6 and 22, the multiple semiconductor elements 12 are mounted on a support member 20 (metal layer 222, described later). The multiple semiconductor elements 12 are arranged along a second direction x. The multiple semiconductor elements 11 and the multiple semiconductor elements 12 are arranged along a first direction y. In the illustrated example, the semiconductor module A10 has four semiconductor elements 12, but the number of semiconductor elements 12 is not limited to four and can be changed as appropriate according to the specifications of the semiconductor module A10.

[0023] As shown in Figure 15 and other figures, each of the multiple semiconductor elements 12 has an element main surface 12a and an element back surface 12b. The element main surface 12a and the element back surface 12b are separated in the thickness direction z. The element main surface 12a and the element back surface 12b face opposite each other in the thickness direction z. The element main surface 12a faces upward in the thickness direction z, and the element back surface 12b faces downward in the thickness direction z. The element back surface 12b faces the support member 20.

[0024] Each of the multiple semiconductor elements 12 has a back electrode 121, a main electrode 122, and a main electrode 123. The back electrode 121, main electrode 122, and main electrode 123 described below are common to each semiconductor element 12 unless otherwise specified.

[0025] As shown in Figure 15, the back electrode 121 is located on the back surface 12b of the element and is exposed on the back surface 12b. As shown in Figures 7 and 15, the main surface electrodes 122 and 123 are located on the main surface 12a of the element and are exposed on the main surface 12a. In the illustrated example, the main surface electrode 122 includes a power pad 1221 and a signal pad 1222. The signal pad 1222 is located on one side of the first direction y (the side where the signal substrate 26 is located in the first direction y) relative to the power pad 1221. The signal pad 1222 is adjacent to the main surface electrode 123 in the second direction x. The planar area of ​​the power pad 1221 is larger than the planar area of ​​each of the signal pads 1222. The planar area of ​​the main surface electrode 123 is smaller than the planar area of ​​the power pad 1221 of the main surface electrode 122. Unlike the illustrated example, the power pad 1221 of the main surface electrode 122 may be divided into two or more regions. The main surface electrode 122 may include two signal pads 1222. In this example, the two signal pads 1222 may be individually positioned on either side of the main surface electrode 123, for example, in a second direction x. That is, in a second direction x, the main surface electrode 123 may be sandwiched between the two signal pads 1222. The main surface electrode 122 does not have to include signal pads 1222. As shown in Figure 7, the main surface electrode 123 and the signal pads 1222 are located on the same side as the signal substrate 26 with respect to the power pad 1221 in a first direction y.

[0026] Each semiconductor element 12 switches between an ON state (conductive state) and an OFF state (blocked state) by a second drive signal input to the main surface electrode 123. The operation of each semiconductor element 12 alternately switching between the ON state and the OFF state is called switching operation. In the ON state (conductive state), the back surface electrode 121 and the main surface electrode 122 (power pad 1221) are conductive, and in the OFF state (blocked state), the back surface electrode 121 and the main surface electrode 122 (power pad 1221) are nonconductive. In each semiconductor element 12, in the ON state, current flows from the back surface electrode 121 to the main surface electrode 122 (especially the power pad 1221), and in the OFF state, this current is blocked. In the main surface electrode 122, the signal pad 1222 is short-circuited to the power pad 1221 inside the semiconductor element 12. In this example, the potential of the signal pad 1222 is equal to the potential of the power pad 1221. In the example where each semiconductor element 12 is a MOSFET, the back electrode 121 is the drain electrode, the main electrode 122 is the source electrode, and the main electrode 123 is the gate electrode. Here, on the main electrode 122, the power pad 1221 is the source pad, and the signal pad 1222 is the source sense pad.

[0027] The semiconductor module A10 further comprises a plurality of conductive bonding layers 129. As can be seen from Figure 15, each of the plurality of semiconductor elements 12 is bonded to the support member 20 (metal layer 222 described later) by a corresponding one of the plurality of conductive bonding layers 129. Each of the plurality of conductive bonding layers 129 is interposed between the back electrode 121 of the corresponding semiconductor element 12 and the support member 20 (metal layer 222 described later), making them electrically conductive. The back surface 11b (back electrode 121) of each semiconductor element 12 is bonded to the support member 20 (metal layer 222 described later) by the corresponding conductive bonding layer 129. Each conductive bonding layer 129 is, for example, solder. In addition, each conductive bonding layer 129 may contain a sintered body of metal particles (for example, silver particles), or it may be an insert metal used in solid-phase diffusion bonding.

[0028] In semiconductor module A10, the back electrodes 111 (drain electrodes) of each of the multiple semiconductor elements 11 are electrically connected to each other, and the power pads 1121 of each main electrode 112 (source electrode) are electrically connected to each other. In other words, the multiple semiconductor elements 11 are electrically connected in parallel to each other. In the multiple semiconductor elements 12, the back electrodes 121 (drain electrodes) of each of the multiple semiconductor elements 12 are electrically connected to each other, and the power pads 1221 of each main electrode 122 (source electrode) are electrically connected to each other. In other words, the multiple semiconductor elements 12 are electrically connected in parallel to each other. Furthermore, in semiconductor module A10, the power pads 1121 of each main electrode 112 (source electrode) of each of the multiple semiconductor elements 11 and the back electrodes 121 (drain electrodes) of each of the multiple semiconductor elements 12 are electrically connected. In other words, the multiple semiconductor elements 11 and the multiple semiconductor elements 12 are connected in series. Semiconductor module A10 constitutes a half-bridge circuit with the multiple semiconductor elements 11 as the upper arm circuit and the multiple semiconductor elements 12 as the lower arm circuit.

[0029] As shown in Figures 4 to 6, 8, 13 to 15, 21 and 22, the support member 20 supports multiple semiconductor elements 11 and multiple semiconductor elements 12 in the thickness direction z. The support member 20 is, for example, a DCB (Direct Copper Bonding) substrate. Note that a DCB substrate is sometimes called a DBC (Direct Bonding Copper or Direct Bonded Copper) substrate. Unlike this example, the support member 20 may also be an AMB (Active Metal Brazing) substrate. The support member 20 includes an insulating substrate 21, multiple metal layers 221 to 227, and a back metal layer 23. As shown in Figures 4, 10, 13 to 15, 21 and 22, the support member 20 is covered by a sealing portion 5, except for a part of the back metal layer 23.

[0030] As shown in Figures 13 and 16 to 22, the insulating substrate 21 is interposed between a plurality of metal layers 221 to 227 and a back metal layer 23 in the thickness direction z. The insulating substrate 21 supports a plurality of semiconductor elements 11 and a plurality of semiconductor elements 12 via any of the plurality of metal layers 221 to 227 (in this embodiment, metal layer 221 and metal layer 222). The insulating substrate 21 contains a material with relatively high thermal conductivity. The insulating substrate 21 contains, for example, ceramics. The ceramics contain, for example, aluminum nitride (AlN). In addition to ceramics, the insulating substrate 21 may also contain an insulating resin sheet.

[0031] As shown in Figures 13 and 16 to 22, the insulating substrate 21 has a main substrate surface 21a and a back substrate surface 21b. The main substrate surface 21a and the back substrate surface 21b are separated in the thickness direction z. The main substrate surface 21a and the back substrate surface 21b face opposite each other in the thickness direction z. The main substrate surface 21a faces upward in the thickness direction z, and the back substrate surface 21b faces downward in the thickness direction z. The main substrate surface 21a faces a plurality of semiconductor elements 11 (each element's back surface 11b) and a plurality of semiconductor elements 12 (each element's back surface 12b).

[0032] As shown in Figures 13 and 16 to 22, the multiple metal layers 221 to 227 are each located above the insulating substrate 21 in the thickness direction z. Each of the multiple metal layers 221 to 227 is in contact with the main surface 21a of the substrate and is bonded to the main surface 21a of the substrate. The composition of each of the multiple metal layers 221 to 227 includes copper (Cu), but may also include metals other than copper. In a plan view, each of the multiple metal layers 221 to 227 is surrounded by the periphery of the insulating substrate 21. The multiple metal layers 221 to 227 are spaced apart from each other. The multiple metal layers 221 to 227 are electrically connected to at least one of the multiple semiconductor elements 11 or one of the multiple semiconductor elements 12. In addition to the metal layers 221 to 227, the support member 20 may further include a metal layer that is not electrically connected to either the multiple semiconductor elements 11 or the multiple semiconductor elements 12.

[0033] Multiple semiconductor elements 11 (the back surface 11b of each element) are bonded to the metal layer 221. The metal layer 221 is electrically connected to the back surface electrodes 111 of each of the multiple semiconductor elements 11. As shown in Figure 8 and other figures, the metal layer 221 includes a main portion 2211 and an extended portion 2212. Each of the multiple semiconductor elements 11 is bonded to the main portion 2211. A signal substrate 24 is bonded to the main portion 2211. Two terminal members 34 are electrically connected to the main portion 2211. The extended portion 2212 extends from the main portion 2211. A base portion 281 is electrically connected to the extended portion 2212. In a plan view, the extended portion 2212 extends in the first direction y while being located in one of the second directions x of the main portion 2211. In the illustrated example, the main portion 2211 and the extended portion 2212 are integrally formed. Unlike this example, the main portion 2211 and the extension portion 2212 may be separated from each other. In this case, the main portion 2211 and the extension portion 2212 may be electrically connected by bonding wire, bonding ribbon, or metal plate material (metal clip), etc.

[0034] Multiple semiconductor elements 12 (the back surface 12b of each element) are bonded to the metal layer 222. The metal layer 222 is electrically connected to the back surface electrode 121 of each of the multiple semiconductor elements 12. In this embodiment, the metal layer 222 is electrically connected to the main surface electrode 112 (power pad 1121) of each of the multiple semiconductor elements 11. As shown in Figure 8 and other figures, the metal layer 222 includes a main portion 2221 and an extended portion 2222. Each of the multiple semiconductor elements 12 is bonded to the main portion 2221. A signal substrate 26 is bonded to the main portion 2221. A terminal member 36 is electrically connected to the main portion 2221. The extended portion 2222 extends from the main portion 2221. A base portion 282 is electrically connected to the extended portion 2222. The extended portion 2222 extends in the first direction y while being located in one of the second directions x of the main portion 2221. In the illustrated example, the main portion 2221 and the extension portion 2222 are formed integrally. Unlike this example, the main portion 2221 and the extension portion 2222 may be separated from each other. In this case, the main portion 2221 and the extension portion 2222 may be electrically connected by bonding wire, bonding ribbon, or metal plate material (metal clip), etc.

[0035] As shown in Figures 7 and 8, the main portion 2211 of metal layer 221 and the main portion 2221 of metal layer 222 are separated in the first direction y. The main portions 2211 and 2221 are aligned in the first direction y. In the main portions 2211 and 2221, the main portion 2211 is located closer to the two terminal members 34 and 35 in the first direction y, and the main portion 2221 is located closer to the terminal member 36 in the first direction y. The extended portion 2212 of metal layer 221 is located next to the main portion 2221 of metal layer 222 in the second direction x. A part of the extended portion 2222 of metal layer 222 is located next to the main portion 2211 of metal layer 221 in the second direction x.

[0036] The metal layer 223 is electrically connected to the main surface electrodes 113 of each of the multiple semiconductor elements 11. A base portion 283 is electrically bonded to the metal layer 223. As shown in Figures 7 and 8, the metal layer 223 is located next to the main portion 2221 of the metal layer 222 in the second direction x. The metal layer 223 is located on the opposite side of the extended portion 2212 of the metal layer 221, with respect to the main portion 2221 of the metal layer 222 in the second direction x. The planar shape of the metal layer 223 is not limited in any way, but in the illustrated example it is rectangular.

[0037] The metal layer 224 is electrically connected to the main surface electrodes 112 (signal pads 1122) of each of the multiple semiconductor elements 11. The base portion 284 is electrically bonded to the metal layer 224. As shown in Figures 7 and 8, the metal layer 224 is located next to the main portion 2221 of the metal layer 222 in the second direction x. The metal layer 224 is located on the opposite side of the extended portion 2212 of the metal layer 221, with respect to the main portion 2221 of the metal layer 222 in the second direction x. The planar shape of the metal layer 224 is not limited in any way, but in the illustrated example it is rectangular.

[0038] As shown in Figures 7 and 8, the metal layer 223 and the metal layer 224 are located next to the main portion 2221 of the metal layer 222 in the second direction x, and on one side (terminal member 36 side) of the expansion portion 2222 in the first direction y. As shown in Figures 7, 8 and 19, the metal layer 223 and the metal layer 224 are adjacent in the first direction y. In the illustrated example, in the first direction y, the metal layer 223 is located between the metal layer 224 and the expansion portion 2222. The positions of the metal layer 223 and the metal layer 224 may be reversed.

[0039] The metal layer 225 is electrically connected to the main surface electrodes 123 of each of the multiple semiconductor elements 12. The base portion 285 is electrically bonded to the metal layer 225. As shown in Figures 7 and 8, the metal layer 225 is located next to the main portion 2211 of the metal layer 221 in the second direction x. The metal layer 225 is located on the opposite side of the extended portion 2222 of the metal layer 222, with respect to the main portion 2211 of the metal layer 221 in the second direction x. The planar shape of the metal layer 225 is not limited in any way, but in the illustrated example it is rectangular.

[0040] The metal layer 226 is electrically connected to the main surface electrodes 122 (signal pads 1222) of each of the multiple semiconductor elements 12. The base portion 286 is electrically bonded to the metal layer 226. As shown in Figures 7 and 8, the metal layer 226 is located next to the main portion 2211 of the metal layer 221 in the second direction x. The metal layer 226 is located on the opposite side of the extended portion 2222 of the metal layer 222, with respect to the main portion 2211 of the metal layer 221 in the second direction x. The planar shape of the metal layer 226 is not limited in any way, but in the illustrated example it is rectangular.

[0041] As shown in Figures 7 and 8, the metal layer 225 and the metal layer 226 are located next to the main portion 2211 of the metal layer 221 in the second direction x, and on one side of the expansion portion 2212 (the side of the two terminal members 35 and terminal member 34) in the first direction y. As shown in Figures 7, 8 and 20, the metal layer 225 and the metal layer 226 are adjacent in the first direction y. In the illustrated example, in the first direction y, the metal layer 225 is located between the metal layer 226 and the expansion portion 2212. The positions of the metal layer 225 and the metal layer 226 may be reversed.

[0042] The metal layer 227 is electrically connected to the main surface electrode 122 (power pad 1221) of each of the plurality of semiconductor elements 12. A part of the terminal member 35 (the joint portion 352 described later) is conductively bonded to the metal layer 227. As shown in FIGS. 6 and 8, the metal layer 227 is located adjacent to the main portion 2211 of the metal layer 221 in the first direction y, and in particular, is located on the opposite side of the main portion 2211 from the main portion 2221 with reference to the main portion 2211 in the first direction y. In the example shown in FIG. 8, a notch is provided at an edge on one side of the main portion 2211 of the metal layer 221 in the first direction y, and the metal layer 227 is disposed in the notch portion.

[0043] As shown in FIGS. 13 and 16 to 22, the back metal layer 23 is located below the insulating substrate 21 in the thickness direction z in the thickness direction z. The back metal layer 23 is in contact with and bonded to the substrate back surface 21b of the insulating substrate 21. Similar to the plurality of metal layers 221 to 227, the composition of the back metal layer 23 contains copper, but may also contain metals other than copper. The composition of the back metal layer 23 may be different from that of the plurality of metal layers 221 to 227. In this embodiment, the back metal layer 23 has a bottom surface 23b. The bottom surface 23b is the lower surface of the back metal layer 23 (the surface facing downward in the thickness direction z). The bottom surface 23b is exposed from the sealing portion 5 (the bottom surface 52 described later). In this example, a heat dissipation member (not shown, the heat dissipation member C1 described later) can be bonded to the bottom surface 23b. Unlike this example, the bottom surface 23b may be covered by the sealing portion 5. The planar shape of the back metal layer 23 is not particularly limited, and is, for example, a rectangle. In plan view, the back metal layer 23 is surrounded by the peripheral edge of the insulating substrate 21. Note that the support member 20 does not necessarily need to include the back metal layer 23. In this example, the substrate back surface 21b of the insulating substrate 21 may be covered by the sealing portion 5 or may be exposed from the sealing portion 5.

[0044] The multiple metal layers 221-227 and the back metal layer 23 are metal bodies that are individually bonded to both sides of the insulating substrate 21 in the thickness direction z. The multiple metal layers 221-227 are patterns of metal bodies formed on the main substrate surface 21a of the insulating substrate 21. In the example where the support member 20 is a DCB substrate, the multiple metal layers 221-227 and the back metal layer 23 are each bonded to the insulating substrate 21 by a direct bonding method. In the example where the support member 20 is an AMB substrate, the multiple metal layers 221-227 and the back metal layer 23 are each bonded by an activated metal bonding method.

[0045] Each of the multiple base portions 281 to 286 is a metal block. Each of the multiple base portions 281 to 286 contains, for example, copper or a copper alloy, but may also contain a metal other than copper. As shown in Figure 7, each of the multiple base portions 281 to 286 is electrically bonded to one of the multiple metal layers 221 to 226. Each of the multiple base portions 281 to 286 and the corresponding base portion 281 to 286 can be joined by a conductive bonding material (not shown), for example, solder or a sintered body of metal particles. These joining methods are not limited to those using conductive bonding materials, and other methods such as solid-phase diffusion bonding (including those using insert metals), ultrasonic bonding, or laser bonding may be used.

[0046] The base portion 281 is electrically connected to the metal layer 221 (extension portion 2212) and is electrically connected to the metal layer 221. The base portion 281 is electrically connected to each back electrode 111 (drain electrode) of the plurality of semiconductor elements 11 via the metal layer 221. As shown in Figure 20, the base portion 281 has a main surface 281a. The main surface 281a faces upward in the thickness direction z. The main surface 281a is the upper surface of the base portion 281. A part of the main surface 281a is exposed from the sealing portion 5 (signal opening 571 described later).

[0047] The base portion 282 is conductively bonded to and electrically connected with the metal layer 222 (the extension portion 2222). The base portion 282 is electrically connected to each back electrode 121 (drain electrode) of the plurality of semiconductor elements 12 via the metal layer 222. As shown in FIG. 19, the base portion 282 has a main surface 282a. The main surface 282a faces upward in the thickness direction z. The main surface 282a is the upper surface of the base portion 282. A part of the main surface 282a is exposed from the sealing portion 5 (the signal opening 572 described later).

[0048] The base portion 283 is conductively bonded to and electrically connected with the metal layer 223. The base portion 283 is electrically connected to the main surface electrodes 113 (gate electrodes of the upper arm circuit) of the plurality of semiconductor elements 11 via the metal layer 223. As shown in FIG. 19, the base portion 283 has a main surface 283a. The main surface 283a faces upward in the thickness direction z. The main surface 283a is the upper surface of the base portion 283. A part of the main surface 283a is exposed from the sealing portion 5 (the signal opening 573 described later).

[0049] The base portion 284 is conductively bonded to and electrically connected with the metal layer 224. The base portion 284 is electrically connected to the signal pads 1122 (source sense pads) of the main surface electrodes 112 (source electrodes of the upper arm circuit) of the plurality of semiconductor elements 11 via the metal layer 224. As shown in FIG. 19, the base portion 284 has a main surface 284a. The main surface 284a faces upward in the thickness direction z. The main surface 284a is the upper surface of the base portion 284. A part of the main surface 284a is exposed from the sealing portion 5 (the signal opening 574 described later).

[0050] The base portion 285 is conductively bonded to and electrically connected with the metal layer 225. The base portion 285 is electrically connected to the main surface electrodes 123 (gate electrodes of the lower arm circuit) of the plurality of semiconductor elements 12 via the metal layer 225. As shown in FIG. 20, the base portion 285 has a main surface 285a. The main surface 285a faces upward in the thickness direction z. The main surface 285a is the upper surface of the base portion 285. A part of the main surface 285a is exposed from the sealing portion 5 (the signal opening 575 described later).

[0051] The base portion 286 is electrically connected to the metal layer 226 and is electrically connected to the metal layer 226. The base portion 286 is electrically connected to the signal pads 1222 (source sense pads) of the main surface electrodes 122 (source electrodes of the lower arm circuit) of the multiple semiconductor elements 12 via the metal layer 226. As shown in Figure 20, the base portion 286 has a main surface 286a. The main surface 286a faces upward in the thickness direction z. The main surface 286a is the upper surface of the base portion 286. A part of the main surface 286a is exposed from the sealing portion 5 (signal opening 576 described later).

[0052] The two terminal members 34, terminal member 35, and terminal member 36 are each electrically connected to one of the plurality of semiconductor elements 11 and the plurality of semiconductor elements 12. The two terminal members 34, terminal member 35, and terminal member 36 each carry a current corresponding to the power before conversion by the switching operation of the plurality of semiconductor elements 11 and the switching operation of the plurality of semiconductor elements 12, or a current corresponding to the power after conversion. In this disclosure, these currents are sometimes collectively referred to as the "main current". In semiconductor module A10, the number of terminal members 34, terminal members 35, and terminal members 36 are not limited to the illustrated example.

[0053] The two terminal members 34 are electrically connected to the metal layer 221 (main part 2211) as shown in Figures 4 to 6, 17 and 18. The two terminal members 34 are supported by the metal layer 221. The two terminal members 34 are electrically connected to the back electrodes 111 (drain electrodes of the upper arm circuit) of each of the multiple semiconductor elements 11 via the metal layer 221. A portion of each terminal member 34 is used as a P terminal (positive terminal) to which the DC power supply voltage to be converted is applied. The two terminal members 34 are separated from each other in the second direction x. A terminal member 35 is located between the two terminal members 34. As shown in Figures 4 to 6, the two terminal members 34 are located on the same side as the terminal member 35 with respect to the support member 20 in the first direction y. The two terminal members 34 are located on the opposite side from the multiple semiconductor elements 12, with the multiple semiconductor elements 11 in between, in the first direction y. Each of the two terminal members 34 extends from the main portion 2211 of the metal layer 221 to one side in the first direction y (towards the side 531 of the sealing portion 5, which will be described later). In the illustrated example, each terminal member 34 includes a bent portion, but it may also be flat. A portion of each terminal member 34 is covered by the sealing portion 5. Grooves, notches, or through holes may be formed in each terminal member 34 to prevent them from falling out of the sealing portion 5.

[0054] As shown in Figures 4 to 6, 17 and 18, each of the two terminal members 34 includes a pad portion 341, a connecting portion 342, and an extension portion 343. The number of extension portions 343 is not limited to one, but may be two or more. Unless otherwise specified, the pad portion 341, connecting portion 342, and extension portion 343 described below are common to each terminal member 34.

[0055] The joint 342 is electrically bonded to the main portion 2211 of the metal layer 221. The joint 342 can be bonded to the metal layer 221 by a conductive bonding material (not shown), such as solder or a sintered body of metal particles. In addition, bonding methods that allow for electrical connection, such as solid-phase diffusion bonding (including those using insert metals), ultrasonic bonding, crimping, or laser bonding, can be employed for these bonding processes.

[0056] The pad portion 341 is connected to the joint portion 342 and extends from the joint portion 342 in a first direction y. In a plan view, the pad portion 341 extends from the joint portion 342 to the outside of the support member 20. The pad portion 341 has a main surface 341a. The main surface 341a faces upward in the thickness direction z. The main surface 341a is the upper surface of the pad portion 341. The main surface 341a is flat. A part of the main surface 341a is exposed from the sealing portion 5 (power opening 561 described later). This exposed portion can be used as the P terminal described above.

[0057] The extension 343 extends from the pad portion 341 in a first direction y. With respect to the first direction y, the extension 343 is located on the opposite side of the pad portion 341 from the joint portion 342. In the illustrated example, the extension 343 includes a portion that bends upward in the thickness direction z. Unlike the illustrated example, the extension 343 may extend from the pad portion 341 in a second direction x. Alternatively, in a configuration with two or more extensions 343, there may be an extension 343 extending from the pad portion 341 in a first direction y and an extension 343 extending from the pad portion 341 in a second direction x. Alternatively, the extension 343 may extend from the pad portion 341 in one of the first direction y and the second direction x, and have a portion that branches off to the other of the first direction y and the second direction x.

[0058] In the illustrated example, as shown in Figures 4 to 6, the dimension of the joint portion 342 in the second direction x is smaller than the dimension of the pad portion 341 in the second direction x. Also, the dimension of the extension portion 343 in the second direction x is smaller than the dimension of the pad portion 341 in the second direction x, and also smaller than the dimension of the joint portion 342 in the second direction x. The dimensional relationship of the pad portion 341, the joint portion 342, and the extension portion 343 in the second direction x is not limited to the example described above.

[0059] As shown in Figures 4 to 6, 13 and 16, the terminal member 35 is electrically connected to the metal layer 227. The terminal member 35 is supported by the metal layer 227. The terminal member 35 is electrically connected to the main surface electrodes 122 (source electrodes of the lower arm circuit) of each of the multiple semiconductor elements 12 via the conductive member 32. A part of the terminal member 35 is used as the N terminal (negative terminal) to which the DC power supply voltage to be converted is applied. The terminal member 35 is located between the two terminal members 34 in the second direction x. In the first direction y, the terminal member 35 is located on the opposite side from the multiple semiconductor elements 12, with the multiple semiconductor elements 11 in between. The terminal member 35 extends from the metal layer 227 to one side in the first direction y (towards the side 531 of the sealing portion 5, which will be described later). In the illustrated example, the terminal member 35 includes a bent portion, but it may also be flat. A part of the terminal member 35 is covered by the sealing portion 5. To prevent the terminal member 35 from falling out of the sealing portion 5, grooves, notches, or through holes may be formed in the terminal member 35.

[0060] As shown in Figures 4 to 6, Figure 13, and Figure 16, the terminal member 35 includes a pad portion 351, a joint portion 352, and two extension portions 353. The number of extension portions 353 is not limited to two; it may be one or three or more.

[0061] The joint 352 is electrically bonded to the metal layer 227. The joint 352 can be bonded to the metal layer 227 by a conductive bonding material (not shown), such as solder or a sintered body of metal particles. In addition, bonding methods that allow for electrical connection, such as solid-phase diffusion bonding (including those using insert metals), ultrasonic bonding, crimping, or laser bonding, can be employed for these bonding processes.

[0062] The pad portion 351 is connected to the joint portion 352 and extends from the joint portion 352 in a first direction y. In a plan view, the pad portion 351 extends from the joint portion 352 to the outside of the support member 20. The pad portion 351 has a main surface 351a. The main surface 351a faces upward in the thickness direction z. The main surface 351a is the upper surface of the pad portion 351. The main surface 351a is flat. A part of the main surface 351a is exposed from the sealing portion 5 (power opening 562 described later). This exposed portion can be used as the aforementioned N terminal.

[0063] Each of the two extensions 353 extends from the pad portion 351 in a first direction y. Each extension 353 is located on the opposite side of the pad portion 351 from the joint portion 352 in the first direction y. In the illustrated example, each extension 353 includes a portion that bends upward in the thickness direction z.

[0064] In the illustrated example, as shown in Figures 4 to 6, the dimension of the pad portion 351 in the second direction x is the same as the dimension of the joint portion 352 in the second direction x. Also, the dimension of each extension portion 353 in the second direction x is smaller than the dimension of the pad portion 351 in the second direction x and also smaller than the dimension of the joint portion 352 in the second direction x. The dimensional relationship in the second direction x between the pad portion 351, the joint portion 352, and the two extension portions 353 is not limited to the example described above.

[0065] As shown in Figures 4 to 6 and Figure 16, the terminal member 36 is electrically connected to the metal layer 222 (main part 2221). The terminal member 36 is supported by the metal layer 222. The terminal member 36 is electrically connected to the back electrode 121 (drain electrode of the lower arm circuit) of each of the multiple semiconductor elements 12 via the metal layer 222, and is also electrically connected to the main surface electrode 112 (source electrode of the upper arm circuit) of each of the multiple semiconductor elements 11 via the metal layer 222 and the conductive member 31. AC power converted by the multiple semiconductor elements 11 and 12 is output from the terminal member 36. In other words, a part of the terminal member 36 is used as the output terminal for the AC power. In the second direction x, the terminal member 36 is connected near the center of the main part 2221. In the first direction y, the terminal member 36 is located on the opposite side of the multiple semiconductor elements 11, with the multiple semiconductor elements 12 in between. The terminal member 36 extends from the metal layer 222 to the other side in the first direction y (towards the side 532 of the sealing portion 5, which will be described later). In the illustrated example, the terminal member 36 includes a bent portion, but it may also be flat. A part of the terminal member 36 is covered by the sealing portion 5. To prevent the terminal member 36 from falling out of the sealing portion 5, grooves, notches, or through holes may be formed in the terminal member 36.

[0066] As shown in Figures 4 to 6 and Figure 16, the terminal member 36 includes a pad portion 361, a connecting portion 362, and an extension portion 363, respectively. Note that the number of extension portions 363 is not limited to one, but may be two or more.

[0067] The joint 362 is electrically bonded to the main portion 2221 of the metal layer 222. The joint 362 can be bonded to the metal layer 222 by a conductive bonding material (not shown), such as solder or a sintered body of metal particles. In addition, bonding methods that allow for electrical connection, such as solid-phase diffusion bonding (including those using insert metals), ultrasonic bonding, crimping, or laser bonding, can be employed for these bonding processes.

[0068] The pad portion 361 is connected to the joint portion 362 and extends from the joint portion 362 in a first direction y. In a plan view, the pad portion 361 extends from the joint portion 362 to the outside of the support member 20. The pad portion 361 has a main surface 361a. The main surface 361a faces upward in the thickness direction z. The main surface 361a is the upper surface of the pad portion 361. The main surface 361a is flat. A part of the main surface 361a is exposed from the sealing portion 5 (power opening 563 described later). This exposed portion can be used as the output terminal described above.

[0069] The extension 363 extends from the pad portion 361 in a first direction y. The extension 363 is located on the opposite side of the joint portion 362 from the pad portion 361 with respect to the first direction y. In the illustrated example, the extension 363 includes a portion that bends upward in the thickness direction z. Unlike the illustrated example, the extension 363 may extend from the pad portion 361 in a second direction x. Alternatively, in a configuration with two or more extensions 363, there may be an extension 363 extending from the pad portion 361 in a first direction y and an extension 363 extending from the pad portion 361 in a second direction x. Alternatively, the extension 363 may extend from the pad portion 361 in one of the first direction y and the second direction x, and have a portion that branches off to the other of the first direction y and the second direction x.

[0070] In the illustrated example, as shown in Figures 4 to 6, the dimension of the joint portion 362 in the second direction x is smaller than the dimension of the pad portion 361 in the second direction x. Also, the dimension of the extension portion 363 in the second direction x is smaller than the dimension of the pad portion 361 in the second direction x, and also smaller than the dimension of the joint portion 362 in the second direction x. The dimensional relationship of the pad portion 361, the joint portion 362, and the extension portion 363 in the second direction x is not limited to the example described above.

[0071] As shown in Figures 1 to 12 and Figures 15 to 19, the sealing portion 5 covers a plurality of semiconductor elements 11 and 12. The sealing portion 5 covers the support member 20 (excluding the bottom surface 23b of the back metal layer 23), two conductive members 31 and 32, and a plurality of connecting members 411 to 413, 421 to 423, 431 to 433, and 441 to 443. The sealing portion 5 covers each of the plurality of signal substrates 24 to 27 and a portion of each of the plurality of base portions 281 to 286. The sealing portion 5 covers a portion of each of the plurality of terminal members 34 to 36. The sealing portion 5 has electrical insulating properties. The sealing portion 5 contains, for example, a black epoxy resin. The sealing portion 5 is formed, for example, by molding. The sealing portion 5 has a top surface 51, a bottom surface 52, a plurality of side surfaces 531 to 534, a protrusion 54, a plurality of power openings 561 to 563, and a plurality of signal openings 571 to 576.

[0072] As shown in Figures 9 to 13 and Figures 16 to 22, the top surface 51 and the bottom surface 52 are separated in the thickness direction z. The top surface 51 and the bottom surface 52 face opposite each other in the thickness direction z. The top surface 51 faces upward in the thickness direction z, and the bottom surface 52 faces downward in the thickness direction z. The top surface 51 faces the same direction as the main substrate surface 21a, the main element surface 11a, and the main element surface 12a in the thickness direction z. As shown in Figures 10, 13, and 16 to 22, the bottom surface 23b of the back metal layer 23 of the support member 20 is exposed from the bottom surface 52.

[0073] Multiple sides 531 to 534 each connect to the top surface 51. As shown in Figure 3, a pair of sides 531 and 532 are separated in the first direction y. The pair of sides 531 and 532 face opposite each other in the first direction y. The pair of sides 531 and 532 each extend in the second direction x. Parts of each of the two terminal members 34 and a part of the terminal member 35 protrude from side 531. A part of the terminal member 36 protrudes from side 532. As shown in Figure 3, a pair of sides 533 and 534 are separated in the second direction x. The pair of sides 533 and 534 face opposite each other in the second direction x. The pair of sides 533 and 534 each extend in the first direction y. As shown in Figures 21 and 22, a pair of sides 533 and 534 each connect to the bottom surface 52 in addition to the top surface 51. In a configuration where the extension portion 343 of each terminal member 34 and the extension portion 363 of the terminal member 36 extend in the second direction x, a portion of each terminal member 34 and a portion of the terminal member 36 may protrude from either the side surface 533 or the side surface 534, respectively.

[0074] As shown in Figures 3 and 4, the protrusion 54 extends from the side surface 532 in a first direction y. The protrusion 54 covers a portion of the terminal member 36 that protrudes from the side surface 532. The terminal member 36 protrudes from the protrusion 54 in the first direction y. The sealing portion 5 does not have to have the protrusion 54. The sealing portion 5 may have, in addition to or instead of the protrusion 54, at least one additional protrusion that protrudes from the side surface 531 in a first direction y. This at least one protrusion covers at least one of the two terminal members 34 and terminal members 35 that protrude from the side surface 531, and the corresponding one of the two terminal members 34 and terminal members 35 may protrude from this protrusion.

[0075] Multiple power openings 561 to 563 are each formed on the top surface 51, as shown in Figure 3 and other figures. The two power openings 561 each individually expose a portion of the two terminal members 34 (the main surface 341a of the pad portion 341). Power opening 562 individually exposes a portion of the terminal member 35 (the main surface 351a of the pad portion 351). Power opening 563 exposes a portion of the terminal member 36 (the main surface 361a of the pad portion 361). In the illustrated example, the plan view shape of each of the multiple power openings 561 to 563 is rectangular. In the illustrated example, as shown in Figures 13 and 16 to 18, each side wall of the multiple power openings 561 to 563 is inclined such that the cross-sectional area perpendicular to the thickness direction z increases as it approaches the top surface 51 in the thickness direction z. In other words, in the illustrated example, each of the multiple power openings 561 to 563 is tapered. Unlike the illustrated example, the side walls of the multiple power openings 561 to 563 may not be inclined and may be parallel to the thickness direction z. The shape, size, and arrangement of each of the multiple power openings 561 to 563 may be appropriately changed according to the corresponding terminal members 34 to 36.

[0076] Multiple signal openings 571 to 576 are each formed on the top surface 51, as shown in Figure 3 and other figures. Each of the multiple signal openings 571 to 576 individually exposes a part (main surface 281a to 286a) of the multiple base portions 281 to 286. In the illustrated example, the plan view shape of each of the multiple signal openings 571 to 576 is rectangular. In the illustrated example, as shown in Figures 19 and 20, each side wall of the multiple signal openings 571 to 576 is parallel to the thickness direction z. Unlike this example, each side wall of the multiple signal openings 571 to 576 may be inclined such that the cross-sectional area perpendicular to the thickness direction z increases as it approaches the top surface 51 in the thickness direction z. The shape, size, and arrangement of each of the multiple signal openings 571 to 576 can be appropriately changed according to the corresponding base portions 281 to 286.

[0077] The multiple signal boards 24-27 constitute part of the conductive path between the multiple terminal members 6 and the multiple semiconductor elements 11 and 12. Each of the multiple signal boards 24-27 is, for example, a DCB board or an AMB board. Unlike this example, each of the multiple signal boards 24-27 may be a printed circuit board. Each of the multiple signal boards 24-27 is covered by a sealing portion 5. Each of the multiple signal boards 24-27 may be bonded to at least one of the multiple metal layers 221-227. Each of the multiple signal boards 24-27 is located on the opposite side of the multiple metal layers 221-227 from the side where the insulating board 21 is located, with respect to the thickness direction z.

[0078] As shown in Figure 7 and other figures, the signal substrate 24 is located between the plurality of semiconductor elements 11 and the two terminal members 34 and terminal member 35 in the first direction y. The signal substrate 24 is bonded to the metal layer 221 (main part 2211) as shown in Figures 13 and 16. In a plan view, the signal substrate 24 is strip-shaped and extends in the second direction x. That is, the signal substrate 24 extends along the arrangement direction of the plurality of semiconductor elements 11. The signal substrate 24 includes an insulating layer 241, two wiring layers 242 and 243, and a metal layer 244.

[0079] The insulating layer 241 is interposed between the two wiring layers 242 and 243 and the metal layer 244 in the thickness direction z. The insulating layer 241 may be made of, for example, ceramics. In addition to ceramics, the insulating layer 241 may be made of an insulating resin sheet.

[0080] As shown in Figures 13 and 16, the two wiring layers 242 and 243 are located above the insulating layer 241 in the thickness direction z. The composition of the two wiring layers 242 and 243 is not limited, but may include copper. As shown in Figure 7, the two wiring layers 242 and 243 are spaced apart from each other on the insulating layer 241. The plan view shape, arrangement, and size of the two wiring layers 242 and 243 are not limited to the illustrated example. In the illustrated example, the two wiring layers 242 and 243 are each strip-shaped extending in the second direction x and are parallel to each other. In the illustrated example, the wiring layer 242 is located closer to the plurality of semiconductor elements 11 than the wiring layer 243 in the first direction y. The wiring layer 242 is electrically connected to the main surface electrodes 113 of the plurality of semiconductor elements 11 via a plurality of connecting members 411. The wiring layer 243 is electrically connected to the signal pads 1122 of the main surface electrodes 112 of the multiple semiconductor elements 11 via multiple connecting members 421.

[0081] As shown in Figures 13 and 16, the metal layer 244 is located on the opposite side of the two wiring layers 242 and 243 in the thickness direction z, with the insulating layer 241 in between. The composition of the metal layer 244 is not limited, but may include copper. The metal layer 244 is joined to the main portion 2211 of the metal layer 221 by an adhesive layer (not shown). This adhesive layer is not limited, including whether or not it is conductive, but may be solder, for example.

[0082] As shown in Figure 7 and other figures, the signal substrate 25 is located between a plurality of semiconductor elements 11 and a plurality of semiconductor elements 12 and a plurality of base portions 282, 283, and 284 in the second direction x. As shown in Figures 7 and 17, the signal substrate 25 spans across and is bonded to metal layers 221 and 222. In a plan view, the signal substrate 25 is a strip extending in the first direction y. That is, the signal substrate 25 extends along the alignment direction of the plurality of semiconductor elements 11 and a plurality of semiconductor elements 12. The signal substrate 25 includes an insulating layer 251, two wiring layers 252 and 253, and a metal layer 254.

[0083] The insulating layer 251 is interposed between the two wiring layers 252 and 253 and the metal layer 254 in the thickness direction z. The insulating layer 251 may be made of, for example, ceramics. In addition to ceramics, the insulating layer 251 may be made of an insulating resin sheet.

[0084] As shown in Figures 7 and 17, the two wiring layers 252 and 253 are located above the insulating layer 251 in the thickness direction z. The composition of the two wiring layers 252 and 253 is not limited, but may include copper. As shown in Figure 7, the two wiring layers 252 and 253 are spaced apart from each other on the insulating layer 251. The plan view shape, arrangement, and size of the two wiring layers 252 and 253 are not limited to the illustrated example. In the illustrated example, the two wiring layers 252 and 253 are each strip-shaped extending in the first direction y and are parallel to each other. In the illustrated example, with respect to the second direction x, wiring layer 252 is located closer to the plurality of semiconductor elements 11 and plurality of semiconductor elements 12 than wiring layer 253. Wiring layer 252 is electrically connected to wiring layer 242 of the signal substrate 24 via a connecting member 412. The wiring layer 253 is electrically connected to the wiring layer 243 of the signal board 24 via the connecting member 422.

[0085] As shown in Figure 17, the metal layer 254 is located on the opposite side of the two wiring layers 252 and 253 in the thickness direction z, with the insulating layer 251 in between. The composition of the metal layer 254 is not limited, but may include copper. The metal layer 254 is joined to the metal layer 221 (main portion 2211) and the metal layer 222 (main portion 2221) by an adhesive layer (not shown). The adhesive layer is not limited, including whether or not it is conductive, but for example, it may be solder. As shown in Figure 17, the insulating layer 251 includes two portions that are separated from each other, one of which is joined to the metal layer 221, and the other of which is joined to the metal layer 222. This prevents a short circuit between the metal layer 221 and the metal layer 222 via the metal layer 254.

[0086] As shown in Figure 7 and other figures, the signal substrate 26 is located between the plurality of semiconductor elements 12 and the terminal member 36 in the first direction y. The signal substrate 26 is bonded to the metal layer 222 (main part 2221) as shown in Figures 13 and 16. In a plan view, the signal substrate 26 is strip-shaped and extends in the second direction x. That is, the signal substrate 26 extends along the arrangement direction of the plurality of semiconductor elements 12. The signal substrate 26 includes an insulating layer 261, two wiring layers 262 and 263, and a metal layer 264.

[0087] The insulating layer 261 is interposed between the two wiring layers 262 and 263 and the metal layer 264 in the thickness direction z. The insulating layer 261 may be made of, for example, ceramics. In addition to ceramics, the insulating layer 261 may be made of an insulating resin sheet.

[0088] As shown in Figures 13 and 16, the two wiring layers 262 and 263 are located above the insulating layer 261 in the thickness direction z. The composition of the two wiring layers 262 and 263 is not limited, but may include copper. As shown in Figure 7, the two wiring layers 262 and 263 are spaced apart from each other on the insulating layer 261. The plan view shape, arrangement, and size of the two wiring layers 262 and 263 are not limited to the illustrated example. In the illustrated example, the two wiring layers 262 and 263 are each strip-shaped extending in the second direction x and are parallel to each other. In the illustrated example, the wiring layer 262 is located closer to the plurality of semiconductor elements 12 than the wiring layer 263 in the first direction y. The wiring layer 262 is electrically connected to the main surface electrodes 123 of the plurality of semiconductor elements 12 via a plurality of connecting members 431. The wiring layer 263 is electrically connected to the signal pads 1222 of the main surface electrodes 122 of the multiple semiconductor elements 12 via multiple connecting members 441.

[0089] As shown in Figures 13 and 16, the metal layer 264 is located on the opposite side of the two wiring layers 262 and 263 in the thickness direction z, with the insulating layer 261 in between. The composition of the metal layer 264 is not limited, but may include copper. The metal layer 264 is joined to the main portion 2221 of the metal layer 222 by an adhesive layer (not shown). This adhesive layer is not limited, including whether or not it is conductive, but may be solder, for example.

[0090] As shown in Figure 7 and other figures, the signal substrate 27 is located between a plurality of semiconductor elements 11 and a plurality of semiconductor elements 12 and a plurality of base portions 281, 285, and 286 in the second direction x. As shown in Figures 7 and 18, the signal substrate 27 spans across and is bonded to metal layers 221 and 222. In a plan view, the signal substrate 27 is strip-shaped and extends in the first direction y. The signal substrate 27 extends along the alignment direction of the plurality of semiconductor elements 11 and a plurality of semiconductor elements 12. The signal substrate 27 includes an insulating layer 271, two wiring layers 272 and 273, and a metal layer 274.

[0091] The insulating layer 271 is interposed between the two wiring layers 272 and 273 and the metal layer 274 in the thickness direction z. The insulating layer 271 may be made of, for example, ceramics. In addition to ceramics, the insulating layer 271 may be made of an insulating resin sheet.

[0092] As shown in Figure 18, the two wiring layers 272 and 273 are located above the insulating layer 271 in the thickness direction z. The composition of the two wiring layers 272 and 273 is not limited, but may include copper. As shown in Figure 7, the two wiring layers 272 and 273 are spaced apart from each other on the insulating layer 271. The plan view shape, arrangement, and size of the two wiring layers 272 and 273 are not limited to the illustrated example. In the illustrated example, the two wiring layers 272 and 273 are each strip-shaped extending in the first direction y and are parallel to each other. In the illustrated example, with respect to the second direction x, wiring layer 272 is located closer to the plurality of semiconductor elements 11 and plurality of semiconductor elements 12 than wiring layer 273. Wiring layer 272 is electrically connected to wiring layer 262 of the signal substrate 26 via a connecting member 432. The wiring layer 273 is electrically connected to the wiring layer 263 of the signal board 26 via the connecting member 442.

[0093] As shown in Figure 18, the metal layer 274 is located on the opposite side of the two wiring layers 272 and 273 in the thickness direction z, with the insulating layer 271 in between. The composition of the metal layer 274 is not limited, but may include copper. The metal layer 274 is joined to the metal layer 221 (main portion 2211) and the metal layer 222 (main portion 2221) by an adhesive layer (not shown). The adhesive layer is not limited, including whether or not it is conductive, but for example, it may be solder. As shown in Figure 17, the insulating layer 271 includes two portions that are separated from each other, one of which is joined to the metal layer 221, and the other of which is joined to the metal layer 222. This prevents a short circuit between the metal layer 221 and the metal layer 222 via the metal layer 274.

[0094] Each of the multiple terminal members 6 is electrically connected to either one of the multiple semiconductor elements 11 or one of the multiple semiconductor elements 12. As shown in Figure 1 and other figures, the multiple terminal members 6 include multiple terminal members 61 to 66.

[0095] As shown in Figures 4 and 20, the terminal member 61 is electrically connected to the base portion 281 (main surface 281a). The terminal member 61 is electrically connected to each back electrode 111 of the plurality of semiconductor elements 11. A voltage (drain voltage of the upper arm circuit) corresponding to the maximum current flowing through each back electrode 111 of the plurality of semiconductor elements 11 is applied to the terminal member 61.

[0096] As shown in Figures 4 and 19, the terminal member 62 is electrically connected to the base portion 282 (main surface 282a). The terminal member 62 is electrically connected to each back electrode 121 of the plurality of semiconductor elements 12. A voltage (drain voltage of the lower arm circuit) corresponding to the maximum current flowing through each back electrode 121 of the plurality of semiconductor elements 12 is applied to the terminal member 62.

[0097] As shown in Figures 4 and 19, the terminal member 63 is electrically connected to the base portion 283 (main surface 283a). The terminal member 63 is electrically connected to each main surface electrode 113 of the plurality of semiconductor elements 11. A first drive signal for driving each semiconductor element 11 is input to the terminal member 63 (the gate voltage of the upper arm circuit is applied).

[0098] As shown in Figures 4 and 19, the terminal member 64 is electrically connected to the base portion 284 (main surface 284a). The terminal member 64 is electrically connected to each main surface electrode 112 (signal pad 1122) of the plurality of semiconductor elements 11. A voltage (source voltage of the upper arm circuit) corresponding to the maximum current flowing through each of the main surface electrodes 112 (signal pad 1122) of the plurality of semiconductor elements 11 is applied to the terminal member 64.

[0099] As shown in Figures 4 and 20, the terminal member 65 is electrically connected to the base portion 285 (main surface 285a). The terminal member 65 is electrically connected to each main surface electrode 123 of the plurality of semiconductor elements 12. A second drive signal for driving each semiconductor element 12 is input to the terminal member 65 (the gate voltage of the lower arm circuit is applied).

[0100] As shown in Figures 4 and 20, the terminal member 66 is electrically connected to the base portion 286 (main surface 286a). The terminal member 66 is electrically connected to each main surface electrode 122 (signal pad 1222) of the plurality of semiconductor elements 12. A voltage (source voltage of the lower arm circuit) corresponding to the maximum current flowing through each of the main surface electrodes 122 (signal pad 1222) of the plurality of semiconductor elements 12 is applied to the terminal member 66.

[0101] As shown in Figures 19 and 20, each of the multiple terminal members 6 (multiple terminal members 61 to 66) includes a sleeve 601 and a metal pin 602.

[0102] The sleeve 601 is joined to a corresponding base portion 281-286 by a conductive bonding material. The conductive bonding material is, for example, solder, but may also be a sintered body containing metal particles. The method of joining the sleeve 601 to the corresponding base portion 281-286 is not limited to using a conductive bonding material, and other methods such as solid-phase diffusion bonding (including those using insert metal), ultrasonic bonding, or laser bonding may be used. The sleeve 601 is made of a conductive material such as metal. The sleeve 601 is cylindrical and extends in the thickness direction z. The sleeve 601 is housed in a corresponding signal opening 571-576. One end of the sleeve 601 in the thickness direction z (the lower edge in the thickness direction z) is electrically bonded to a corresponding base portion 281-286. In the examples shown in Figures 19 and 20, the other end of the sleeve 601 in the thickness direction z (the edge on the upper side in the thickness direction z) protrudes from the top surface 51. This edge may be flush with the top surface 51, or it may not protrude from the top surface 51.

[0103] The metal pin 602 extends in the thickness direction z. The metal pin 602 protrudes above the top surface 51 of the sealing portion 5 in the thickness direction z. The metal pin 602 is press-fitted into the sleeve 601. As a result, the metal pin 602 is supported by the sleeve 601 and is electrically connected to the sleeve 601. Most of the metal pins 602 are, for example, prismatic, but they may also be cylindrical or polygonal. The metal pin 602 includes a bulge 6021. The bulge 6021 is provided on the tip side of the metal pin 602 (opposite the side that is press-fitted into the sleeve 601). As can be seen from Figures 21 and 22, the bulge 6021 bulges in the metal pin 602 in a direction perpendicular to the thickness direction z.

[0104] The multiple connecting members 411-413, 421-423, 431-433, and 441-443 each electrically connect parts that are separated from each other. Each of the multiple connecting members 411-413, 421-423, 431-433, and 441-443 is, for example, a bonding wire. Unlike this example, each of the multiple connecting members 411-413, 421-423, 431-433, and 441-443 may be a bonding ribbon or a metal plate (metal clip). The composition of each of the multiple connecting members 411-413, 421-423, 431-433, and 441-443 includes gold (Au). The composition of each of the multiple connecting members 411-413, 421-423, 431-433, and 441-443 may include copper or aluminum.

[0105] As shown in Figure 7, each of the multiple connecting members 411 is joined to the main surface electrode 113 of the corresponding semiconductor element 11 and to the wiring layer 242 of the signal substrate 24, thereby creating electrical conductivity between them. Connecting member 412 is joined to the wiring layer 242 of the signal substrate 24 and to the wiring layer 252 of the signal substrate 25, thereby creating electrical conductivity between them. Connecting member 413 is joined to the wiring layer 252 of the signal substrate 25 and to the metal layer 223, thereby creating electrical conductivity between them. Since the base portion 283 is electrically joined to the metal layer 223, the base portion 283 is electrically connected to each of the main surface electrodes 113 of the multiple semiconductor elements 11. The connecting member 413 may be joined to the base portion 283 instead of the metal layer 223.

[0106] Each of the multiple connecting members 421 is joined to the signal pad 1122 of the main surface electrode 112 of the corresponding semiconductor element 11 and to the wiring layer 243 of the signal substrate 24, as shown in Figure 7, thereby creating electrical conductivity between them. If the main surface electrode 112 of each semiconductor element 11 does not include a signal pad 1122, each of the multiple connecting members 421 can be joined to the power pad 1121 of the main surface electrode 112 of the corresponding semiconductor element 11. The connecting member 422 is joined to the wiring layer 243 of the signal substrate 24 and the wiring layer 253 of the signal substrate 25, thereby creating electrical conductivity between them. The connecting member 423 is joined to the wiring layer 253 of the signal substrate 25 and to the metal layer 224, thereby creating electrical conductivity between them. Since the base portion 284 is electrically joined to the metal layer 224, the base portion 284 is electrically connected to each of the multiple semiconductor elements 11's main surface electrodes 112 (signal pads 1122 in this embodiment). The connecting member 423 may be joined to the base portion 284 instead of the metal layer 224.

[0107] As shown in Figure 7, each of the multiple connecting members 431 is joined to the main surface electrode 123 of the corresponding semiconductor element 12 and to the wiring layer 262 of the signal substrate 26, thereby creating electrical conductivity between them. Connecting member 432 is joined to the wiring layer 262 of the signal substrate 26 and to the wiring layer 272 of the signal substrate 27, thereby creating electrical conductivity between them. Connecting member 433 is joined to the wiring layer 272 of the signal substrate 27 and to the metal layer 225, thereby creating electrical conductivity between them. Since the base portion 285 is electrically joined to the metal layer 225, the base portion 285 is electrically connected to each of the multiple main surface electrodes 123 of the semiconductor elements 12. Connecting member 433 may be joined to the base portion 285 instead of the metal layer 225.

[0108] Each of the multiple connecting members 441 is joined to the signal pad 1222 of the main surface electrode 122 of the corresponding semiconductor element 12 and to the wiring layer 263 of the signal substrate 26, as shown in Figure 7, thereby creating electrical conductivity between them. If the main surface electrode 122 of each semiconductor element 12 does not include a signal pad 1222, each of the multiple connecting members 441 can be joined to the power pad 1221 of the main surface electrode 122 of the corresponding semiconductor element 12. The connecting member 442 is joined to the wiring layer 263 of the signal substrate 26 and to the wiring layer 273 of the signal substrate 27, thereby creating electrical conductivity between them. The connecting member 443 is joined to the wiring layer 273 of the signal substrate 27 and to the metal layer 226, thereby creating electrical conductivity between them. Since the base portion 286 is electrically joined to the metal layer 226, the base portion 286 is electrically connected to each of the multiple semiconductor elements 12's main surface electrodes 122 (signal pads 1222 in this embodiment). The connecting member 443 may be joined to the base portion 286 instead of the metal layer 226.

[0109] The conductive member 31 electrically connects the main surface electrodes 112 of the multiple semiconductor elements 11 to the metal layer 222 (main portion 2221). As shown in Figure 4 and other figures, the conductive member 31 is joined to the power pads 1121 of the main surface electrodes 112 of the multiple semiconductor elements 11 and to the main portion 2221 of the metal layer 222 of the support member 20. As previously mentioned, the terminal member 36 is electrically connected to the metal layer 222. Therefore, the terminal member 36 is electrically connected to the main surface electrodes 112 (power pads 1121) of the multiple semiconductor elements 11 via the metal layer 222 and the conductive member 31. The composition of the conductive member 31 may include copper. The conductive member 31 is a metal plate (metal clip). The shape of the conductive member 31 is not limited to the illustrated example and can be appropriately changed depending on the arrangement of the multiple semiconductor elements 11 and the shape and arrangement of the metal layer 222. When forming the sealing portion 5, a notch or a through hole in the thickness direction z may be formed in the conductive member 31 to avoid contact between the clamp member for fixing the support member 20 and the conductive member 31, or to ensure good flow of the sealing portion 5 downward in the thickness direction z of the conductive member 31. As shown in Figures 5 and 13, the conductive member 31 includes a main body portion 310, a plurality of joint portions 311 and a plurality of joint portions 312.

[0110] The main body portion 310 constitutes the main part of the conductive member 31. As shown in Figure 5, the main body portion 310 extends in the second direction x. As shown in Figures 5 and 13, in a plan view, the main body portion 310 overlaps with the metal layer 221 (main portion 2211) and the metal layer 222 (main portion 2221). In the example shown in Figure 5, the main body portion 310 has a plurality of through holes. Each of the multiple through holes penetrates the main body portion 310 in the thickness direction z. In a plan view, the multiple through holes overlap with the main portion 2211 (metal layer 221) and the main portion 2221 (metal layer 222). This allows for good flow of the sealing portion 5 downward in the thickness direction z of the main body portion 310 when the sealing portion 5 is formed.

[0111] As shown in Figures 5 and 13, each of the multiple joints 311 is joined to the metal layer 222 (main part 2221). Each joint 311 faces the main part 2221. In plan view, each joint 311 extends from the main body 310 to the other side in the first direction y (towards the multiple semiconductor elements 12). A portion of each joint 311 is bent downward in the thickness direction z. As a result, the tip of each joint 311 (the end opposite to the side connected to the main body 310) is located below the main body 310 in the thickness direction z.

[0112] As shown in Figures 5 and 13, each of the multiple junctions 312 is individually bonded to the main surface electrode 112 (power pad 1121) of the corresponding semiconductor element 11. Each junction 312 faces the power pad 1121 of one of the main surface electrodes 112 of the multiple semiconductor elements 11. In a plan view, each junction 312 extends from the main body 310 to one side in the first direction y (towards the multiple semiconductor elements 11). In the illustrated example, each junction 312 is bifurcated from the main body 310, but it does not have to be bifurcated. A part of each junction 312 is bent downward in the thickness direction z. As a result, the tip of each junction 312 (the end opposite to the side connected to the main body 310) is located below the main body 310 in the thickness direction z.

[0113] The semiconductor module A10 further comprises a plurality of conductive bonding layers 319. Each of the plurality of conductive bonding layers 319 may be, for example, solder, but may also be a sintered metal body such as sintered silver, or an insert metal used in solid-phase diffusion bonding. The plurality of conductive bonding layers 319 include those that are individually interposed between a plurality of bonding portions 311 and a metal layer 222 (main portion 2221) to electrically bond them, and those that are individually interposed between a plurality of bonding portions 312 and the main surface electrodes 112 (power pads 1121) of a plurality of semiconductor elements 11, as can be understood from Figure 14, to electrically bond them.

[0114] The conductive member 32 electrically connects the main surface electrodes 122 of the multiple semiconductor elements 12 to the terminal member 35. As shown in Figure 4, the conductive member 32 is electrically joined to the power pads 1221 of the main surface electrodes 122 of the multiple semiconductor elements 12 and to the terminal member 35. The terminal member 35 is electrically connected to the main surface electrodes 122 (power pads 1221) of the multiple semiconductor elements 12 via the conductive member 32. The composition of the conductive member 32 may include, for example, copper. The conductive member 32 is a metal plate (metal clip). The shape of the conductive member 32 is not limited to the illustrated example and can be appropriately changed depending on the arrangement of the multiple semiconductor elements 12 and the shape and arrangement of the terminal member 35. When forming the sealing portion 5, a notch or a through hole in the thickness direction z may be formed in the conductive member 32 to avoid contact between the clamp member for fixing the support member 20 and the conductive member 32, or to ensure good flow of the sealing portion 5 downward in the thickness direction z of the conductive member 32. As shown in Figures 4, 16 and 22, the conductive member 32 includes a main body portion 320, a joint portion 321, a plurality of joint portions 322, a connecting portion 324, and a plurality of connecting portions 325.

[0115] The main body portion 320 constitutes the main part of the conductive member 32. As shown in Figure 16, the main body portion 320 is arranged parallel to the upper surface of the metal layer 221 and the upper surface of the metal layer 222. The main body portion 320 is separated from the main body portion 310 of the conductive member 31, as well as from the metal layer 221 and the metal layer 222. The main body portion 320 is located above the main body portion 310 in the thickness direction z.

[0116] As shown in Figures 4 and 16, the joint portion 321 is joined to the terminal member 35 (joint portion 352). Unlike this example, the joint portion 321 may be joined to the metal layer 227. In this case, the terminal member 35 (joint portion 352) is joined to the joint portion 321. That is, in the thickness direction z, the joint portion 321 is interposed between the joint portion 352 and the metal layer 227. In the thickness direction z, the joint portion 321 is located below the main body portion 320 in the thickness direction z.

[0117] As shown in Figures 4, 16, and 22, the multiple junctions 322 are individually bonded to the power pads 1221 of the main surface electrodes 122 of the multiple semiconductor elements 12. Each of the multiple junctions 322 faces the power pad 1221 of the main surface electrode 122 of any of the multiple semiconductor elements 12. As a result, each junction 322 is located below the main body 320 in the thickness direction z.

[0118] As shown in Figures 4 and 16, the connecting portion 324 connects to the main body portion 320 and the joint portion 321, linking them together. The connecting portion 324 extends from the main body portion 320 in the first direction y (the side on which the multiple semiconductor elements 11 are located relative to the main body portion 320). The end of the connecting portion 324 that connects to the joint portion 321 is bent downward in the thickness direction z. This connects the main body portion 320 and the joint portion 321, which are located at different positions in the thickness direction z.

[0119] Each of the multiple connecting portions 325 is connected to either the main body portion 320 or one of the multiple joining portions 322, as shown in Figures 4, 16, and 22, thereby connecting them. As shown in Figures 4 and 16, each of the multiple connecting portions 325 extends from the main body portion 320 in a first direction y (the side on which the multiple semiconductor elements 12 are located relative to the main body portion 320). In a plan view, the multiple connecting portions 325 are spaced apart from each other in a second direction x. In each of the multiple connecting portions 325, the end that connects to the joining portion 322 extends in the second direction x. Some of the multiple connecting portions 325 have their ends opposite the main body portion 320 branching into two on both sides of the second direction x, while others extend to one side of the second direction x. Most of each connecting portion 325 is at the same height as the main body portion 320 in the thickness direction z (they are at the same position in the thickness direction z). The end of each connecting portion 325 that connects to the joint portion 322 is bent downward in the thickness direction z. This connects the main body portion 320 and each connecting portion 322, which are located at different positions in the thickness direction z.

[0120] The semiconductor module A10 further comprises a plurality of conductive bonding layers 329. Each of the plurality of conductive bonding layers 329 may be, for example, solder, but may also be a sintered metal body such as sintered silver, or an insert metal used in solid-phase diffusion bonding. As shown in Figure 16, some of the plurality of conductive bonding layers 329 are interposed between the bonding portion 321 and the terminal member 35 (bonding portion 352) to electrically bond them, and as shown in Figure 15, some are interposed between the plurality of bonding portions 322 and the main surface electrodes 122 (power pads 1221) of the plurality of semiconductor elements 12 to electrically bond them.

[0121] As shown in Figures 1, 3, 4, 13, and 16 to 18, the semiconductor module A10 includes two power terminals T11, T12, and T13. Each of the power terminals T11, T12, and T13 is electrically connected to at least one of the multiple semiconductor elements 11 and the multiple semiconductor elements 12. A current corresponding to the power before conversion by the switching operations of the multiple semiconductor elements 11 and the multiple semiconductor elements 12, or a current corresponding to the power after conversion, flows through each of the power terminals T11, T12, and T13.

[0122] Each of the two power terminals T11 is electrically connected to the back electrode 111 (drain electrode of the upper arm circuit) of each of the multiple semiconductor elements 11. The two power terminals T11 are portions that are individually exposed from the two power openings 561 of the semiconductor module A10. Each of the two power terminals T11 is a part of the terminal member 34 (specifically the main surface 341a of the pad portion 341) that is exposed from either of the two power openings 561. Therefore, each of the two terminal members 34 includes either of the two power terminals T11. The two power terminals T11 are the P terminals (positive terminals) described above.

[0123] The power terminal portion T12 is electrically connected to the power pad 1221 (source electrode of the lower arm circuit) of each main surface electrode 122 of the plurality of semiconductor elements 12. The power terminal portion T12 is the part of the semiconductor module A10 that is exposed from the power opening 562. The power terminal portion T12 is part of the terminal member 35 (specifically the main surface 351a of the pad portion 351) that is exposed from the power opening 562. Therefore, the terminal member 35 includes the power terminal portion T12. The power terminal portion T12 is the aforementioned N terminal (negative electrode terminal).

[0124] The power terminal portion T13 is electrically connected to the power pads 1121 (source electrodes of the upper arm circuit) of each main surface electrode 112 of the plurality of semiconductor elements 11, and also electrically connected to the back surface electrodes 121 (drain electrodes of the lower arm circuit) of each of the plurality of semiconductor elements 12. The power terminal portion T13 is a part of the semiconductor module A10 that is exposed from the power opening 563. The power terminal portion T13 is a part of the terminal member 36 (specifically the main surface 361a of the pad portion 361) that is exposed from the power opening 563. Therefore, the terminal member 36 includes the power terminal portion T13. The power terminal portion T13 is the output terminal described above.

[0125] As shown in Figures 1, 3 to 8, and 13 to 22, the semiconductor module A10 is equipped with two conductive parts L1 and L2.

[0126] The conductive portion L1 is a part of the semiconductor module A10 that is located on the main surface 21a of the insulating substrate 21 and on which multiple semiconductor elements 11 are mounted. The conductive portion L1 is electrically connected to the multiple semiconductor elements 11. In a plan view, the conductive portion L1 overlaps the insulating substrate 21. The conductive portion L1 is a transmission path that transmits a first control signal for controlling the switching operation of the multiple semiconductor elements 11. The first control signal includes a first drive signal and a first detection signal (upper arm side detection signal) for detecting the voltage generated between the back electrode 111 and the main surface electrode 112. The conductive portion L1 includes signal terminals T21, T23, and T24.

[0127] The signal terminal T21 is electrically connected to the back electrode 111 of each semiconductor element 11. The signal terminal T21 is the output terminal of the first detection signal (i.e., a signal for detecting the voltage generated between the back electrode 111 and the main electrode 112 of each semiconductor element 11). As shown in Figures 1 and 20, the signal terminal T21 is the portion of the semiconductor module A10 that is exposed from the signal opening 571. The signal terminal T21 is a part of the main surface 281a of the base portion 281 that is exposed from the signal opening 571. In this embodiment, as shown in Figure 7 and others, the conductive portion L1 includes the metal layer 221 and the base portion 281 as a current path from each back electrode 111 of the plurality of semiconductor elements 11 to the signal terminal T21.

[0128] The signal terminal portion T23 is electrically connected to the main surface electrode 113 of each semiconductor element 11. The signal terminal portion T23 is the input terminal of the first drive signal (gate voltage of the upper arm circuit) that is input to the main surface electrode 113 of each semiconductor element 11. As shown in Figures 1 and 19, the signal terminal portion T23 is the part of the semiconductor module A10 that is exposed from the signal opening 573. The signal terminal portion T23 is a part of the main surface 283a of the base portion 283 that is exposed from the signal opening 573. In this embodiment, as shown in Figure 7 and others, the conductive portion L1 includes a plurality of connecting members 411, the wiring layer 242 of the signal substrate 24, the connecting member 412, the wiring layer 252 of the signal substrate 25, the connecting member 413, the metal layer 223, and the base portion 283 as a current path from each main surface electrode 113 of the plurality of semiconductor elements 11 to the signal terminal portion T23.

[0129] The signal terminal T24 is electrically connected to the main surface electrode 112 (signal pad 1122) of each semiconductor element 11. The signal terminal T24 is the output terminal of the first detection signal (that is, a signal for detecting the voltage generated between the back surface electrode 111 and the main surface electrode 112 of each semiconductor element 11). As shown in Figures 1 and 19, the signal terminal T24 is the part of the semiconductor module A10 that is exposed from the signal opening 574. The signal terminal T24 is a part of the main surface 284a of the base portion 284 that is exposed from the signal opening 574. In this embodiment, as shown in Figure 7 and others, the conductive portion L1 includes a plurality of connecting members 421, a wiring layer 243 of the signal substrate 24, a connecting member 422, a wiring layer 253 of the signal substrate 25, a connecting member 423, a metal layer 224, and a base portion 284 as a current path from each main surface electrode 112 (signal pad 1122) of the plurality of semiconductor elements 11 to the signal terminal portion T24.

[0130] The conductive portion L2 is a part of the semiconductor module A10 that is located on the main surface 21a of the insulating substrate 21 and on which multiple semiconductor elements 12 are mounted. The conductive portion L2 is electrically connected to the multiple semiconductor elements 12. In a plan view, the conductive portion L2 overlaps the insulating substrate 21. The conductive portion L2 is a transmission path that transmits a second control signal for controlling the switching operation of the multiple semiconductor elements 12. The second control signal includes a second drive signal and a second detection signal (lower arm side detection signal) for detecting the voltage generated between the back electrode 121 and the main surface electrode 122. The conductive portion L2 includes signal terminals T22, T25, and T26.

[0131] The signal terminal T22 is electrically connected to the back electrode 121 of each semiconductor element 12. The signal terminal T22 is the output terminal of the second detection signal (i.e., a signal for detecting the voltage generated between the back electrode 121 and the main electrode 122 of each semiconductor element 12). As shown in Figures 1 and 19, the signal terminal T22 is the portion of the semiconductor module A10 that is exposed from the signal opening 572. The signal terminal T22 is a part of the main surface 282a of the base portion 282 that is exposed from the signal opening 572. In this embodiment, as shown in Figure 7 and others, the conductive portion L2 includes the metal layer 222 and the base portion 282 as a current path from each back electrode 121 of the plurality of semiconductor elements 12 to the signal terminal T22.

[0132] The signal terminal T25 is electrically connected to the main surface electrode 123 of each semiconductor element 12. The signal terminal T25 is the input terminal of the second drive signal (gate voltage of the lower arm circuit) that is input to the main surface electrode 123 of each semiconductor element 12. As shown in Figures 1 and 20, the signal terminal T25 is the part of the semiconductor module A10 that is exposed from the signal opening 575. The signal terminal T25 is a part of the main surface 285a of the base portion 285 that is exposed from the signal opening 575. In this embodiment, as shown in Figure 7 and others, the conductive portion L2 includes a plurality of connecting members 431, the wiring layer 262 of the signal substrate 26, the connecting member 432, the wiring layer 272 of the signal substrate 27, the connecting member 433, the metal layer 225, and the base portion 285 as a current path from each main surface electrode 123 of the plurality of semiconductor elements 12 to the signal terminal T25.

[0133] The signal terminal T26 is electrically connected to the main surface electrode 122 (signal pad 1222) of each semiconductor element 12. The signal terminal T26 is the output terminal of the second detection signal (that is, a signal for detecting the voltage generated between the back surface electrode 121 and the main surface electrode 122 of each semiconductor element 12). As shown in Figures 1 and 20, the signal terminal T26 is the part of the semiconductor module A10 that is exposed from the signal opening 576. The signal terminal T26 is a part of the main surface 286a of the base portion 286 that is exposed from the signal opening 576. In this embodiment, as shown in Figure 7 and others, the conductive portion L2 includes a plurality of connecting members 441, a wiring layer 263 of the signal substrate 26, a connecting member 442, a wiring layer 273 of the signal substrate 27, a connecting member 443, a metal layer 226, and a base portion 286 as a current path from each main surface electrode 122 (signal pad 1222) of the plurality of semiconductor elements 12 to the signal terminal portion T26.

[0134] As shown in Figure 3, in semiconductor module A10, the three signal terminals T22, T23, and T24 are arranged along the side surface 533 of the sealing portion 5, and the three signal terminals T21, T25, and T26 are arranged along the side surface 534 of the sealing portion 5. Furthermore, as can be understood from Figures 3 and 4, in semiconductor module A10, the three signal terminals T21, T23, and T24 that conduct to each semiconductor element 11 are located on the side surface 532 (power terminal T13) side with respect to the center of the first direction y of the sealing portion 5 (and insulating substrate 21) in a plan view, and the three signal terminals T22, T25, and T26 that conduct to each semiconductor element 12 are located on the side surface 531 (power terminals T11, T12) side with respect to the center of the first direction y of the sealing portion 5 (and insulating substrate 21) in a plan view. In the semiconductor module A10, a plurality of semiconductor elements 11 and three signal terminals T22, T25, and T26 are arranged on the side surface 531, with reference to the center of the sealing portion 5 in the first direction y in a plan view, and a plurality of semiconductor elements 12 and three signal terminals T21, T23, and T24 are arranged on the side surface 532, respectively. In a plan view, the center of the sealing portion 5 (and insulating substrate 21) in the first direction y overlaps with the main portion 2211 of the metal layer 221 and the main portion 2221 of the metal layer 222.

[0135] Next, a power conversion unit U10 equipped with semiconductor modules A10 will be described with reference to Figures 23 to 26. The power conversion unit U10 comprises three semiconductor modules A10, a heat dissipation member C1, and a control board E1.

[0136] The heat dissipation member C1 supports a plurality of semiconductor modules A10. The heat dissipation member C1 is, for example, a heat sink. The heat dissipation member C1 may not be a heat sink, but rather a housing (frame, etc.) for electronic devices and electric vehicles. The majority of the heat dissipation member C1 is located below the plurality of semiconductor modules A10 in the thickness direction z. The heat dissipation member C1 faces the lower surface (the surface facing downward in the thickness direction z) of each of the plurality of semiconductor modules A10. The material of the heat dissipation member C1 includes, for example, aluminum. The material is not limited to aluminum, but may be other metal materials or resin materials (preferably those with good thermal conductivity), etc. As shown in Figures 24 and 25, the heat dissipation member C1 includes a main body portion 71 and a heat dissipation portion 73.

[0137] The main body portion 71 is a plate material. Multiple semiconductor modules A10 are mounted on the main body portion 71. The multiple semiconductor modules A10 are arranged on the main body portion 71 along a second direction x. The main body portion 71 faces the lower surface of each of the multiple semiconductor modules A10. The main body portion 71 is, for example, rectangular in plan view, but the plan view shape of the main body portion 71 is not limited in any way. Each of the multiple semiconductor modules A10 is bonded to the main body portion 71 by a bonding layer 80. The bonding layer 80 is sandwiched between the lower surface (bottom surface 23b) of the back metal layer 23 and the upper surface (main body surface 71a, described later) of the main body portion 71. The bonding layer 80 is, for example, solder, a sintered metal body such as sintered silver (sintered metal particles), or an adhesive sheet. In addition, the bonding layer 80 may be an insert metal used in solid-phase diffusion bonding. Preferably, the bonding layer 80 may be made of a material with high thermal conductivity. Each semiconductor module A10 is not limited to being bonded to the main body 71 by a bonding layer 80; it may also be fixed in close contact with the main body 71 by mounting members such as leaf springs or screws. The side surface of the bonding layer 80 (the surface parallel to the thickness direction z) may be covered by the sealing portion 5.

[0138] The main body portion 71 has a main body surface 71a and a main body back surface 71b. As shown in Figures 24 and 25, the main body surface 71a and the main body back surface 71b are separated in the thickness direction z. The main body surface 71a and the main body back surface 71b face opposite each other in the thickness direction z. The main body surface 71a faces upward in the thickness direction z, and the main body back surface 71b faces downward in the thickness direction z. Multiple semiconductor modules A10 are mounted on the main body surface 71a.

[0139] The heat dissipation section 73 protrudes from the back surface 71b of the main body 71 in the thickness direction z. With respect to the main body 71 in the thickness direction z, the heat dissipation section 73 is located on the opposite side from each semiconductor module A10. In the illustrated example, the heat dissipation section 73 is block-shaped, but unlike this example, it may be a plurality of pins spaced apart from each other in a direction perpendicular to the thickness direction z. Alternatively, the heat dissipation section 73 may be cylindrical in shape into which a coolant (which may be liquid or gas) can be introduced.

[0140] As shown in Figure 23, the control board E1 is provided in common for the three semiconductor modules A10. Alternatively, multiple control boards E1 may be provided individually for each of the three semiconductor modules A10. As can be seen from Figures 23 to 26, each terminal member 6 of the three semiconductor modules A10 is inserted through the control board E1. The control board E1 is electrically connected to each terminal member 6. The control board E1 includes, for example, a control circuit that controls the driving of each of the multiple semiconductor elements 11 and 12 of the three semiconductor modules A10. In an example where each semiconductor element 11 and each semiconductor element 12 are MOSFETs or IGBTs, the control board E1 is a gate driver. The control board E1 faces the upper surface (top surface 51) of each sealing portion 5 of the three semiconductor modules A10. The control board E1 is located on the opposite side of the main body 71 of the heat dissipation member C1 from the three semiconductor modules A10. In a plan view, the control board E1 overlaps each of the sealing portions 5 of the three semiconductor modules A10.

[0141] As shown in Figures 23 and 24, the power conversion unit U10 further comprises a plurality of base portions 82. The plurality of base portions 82 may be erected, for example, on the main body surface 71a of the main body portion 71 of the heat dissipation member C1. The plurality of base portions 82 are sandwiched between the main body portion 71 (main body surface 71a) of the heat dissipation member C1 and the control board E1 in the thickness direction z. The control board E1 is held by the plurality of base portions 82 at a constant distance in the thickness direction z.

[0142] As shown in Figure 26, the control board E1 has a base material 91, main wiring 92, back wiring 93, and internal wiring 94. The base material 91 is provided with a plurality of through-holes 911 that penetrate in the thickness direction z. The main wiring 92 is formed on the upper surface of the base material 91 (the surface facing upward in the thickness direction z). The back wiring 93 is formed on the lower surface of the base material 91 (the surface facing downward in the thickness direction z). The internal wiring 94 is arranged on the inner surfaces of the plurality of through-holes 911. The internal wiring 94 is connected to the main wiring 92 and the back wiring 93. The main wiring 92 forms a path for the back wiring 93 and internal wiring 94 and the circuit provided on the control board E1 to be electrically connected to each other.

[0143] Each terminal member 6 of the three semiconductor modules A10 is inserted into a corresponding through-hole 911 of the control board E1. Figure 26 shows the state in which the terminal member 6 of any of the three semiconductor modules A10 is inserted into a through-hole 911 of the base material 91. As can be seen from Figure 26, all of the terminal members 6 of the three semiconductor modules A10 are inserted into the through-hole 911 of the base material 91.

[0144] As shown in Figure 26, the bulge 6021 of each terminal member 6 is press-fitted into one of the multiple through-holes 911 of the control board E1. As a result, the internal wiring 94 located in one of the multiple through-holes 911 is pressed against the bulge 6021 of the terminal member 6 that is inserted into the through-hole 911. Therefore, each terminal member 6 is electrically connected to the control board E1 (and its control circuit) by being press-fitted into the through-hole 911 in the thickness direction z. The control board E1 is supported by each terminal member 6 as each terminal member 6 is press-fitted into one of the multiple through-holes 911. As can be understood from this configuration, the control board E1 is attached to each terminal member 6. In contrast to this configuration, each terminal member 6 does not have to include a bulge 6021. That is, each terminal member 6 may be a straight pin with no change in thickness. In this case, each terminal member 6 is inserted into the through-hole 911 and then soldered to the control board E1.

[0145] Next, a vehicle F1 equipped with the semiconductor module A10 will be described with reference to Figure 27. Vehicle F1 is, for example, an electric vehicle (EV). In Figure 27, the semiconductor module A10 is described as being mounted on vehicle F1 as the power conversion unit U10, but it may also be mounted on vehicle F1 as a semiconductor module A10. In this case, the heat dissipation member C1 and the control board E1 are provided separately on vehicle F1.

[0146] As shown in Figure 27, the vehicle F1 includes an on-board charger F11, a battery F12, and a drive system F13. Power is supplied to the on-board charger F11 wirelessly from a power supply facility (not shown) installed outdoors. Alternatively, the means of supplying power from the power supply facility to the on-board charger F11 may be wired. The on-board charger F11 is configured with a boost-type DC-DC converter. The voltage of the power supplied to the on-board charger F11 is boosted by the converter and then supplied to the battery F12. The boosted voltage is, for example, 600V.

[0147] The drive system F13 drives the vehicle F1. The drive system F13 includes an inverter F131 and a drive source F132. The power conversion unit U10 (semiconductor module A10) constitutes part of the inverter F131. Power stored in the battery F12 is supplied to the inverter F131. The power supplied from the battery F12 to the inverter F131 is DC power. In addition, unlike the power system shown in Figure 27, a boost DC-DC converter may be further provided between the battery F12 and the inverter F131. The inverter F131 converts DC power to AC power. The inverter F131, including the power conversion unit U10 (semiconductor module A10), is connected to the drive source F132. The drive source F132 includes an AC motor and a transmission. When the AC power converted by the inverter F131 is supplied to the drive source F132, the AC motor rotates, and this rotation is transmitted to the transmission. The transmission reduces the rotational speed transmitted from the AC motor as appropriate and then rotates the drive shaft of the vehicle F1. This drives the vehicle F1. In driving the vehicle F1, it is necessary to freely control the rotational speed of the AC motor based on information such as the amount of fluctuation of the accelerator pedal. Therefore, the power conversion unit U10 (semiconductor module A10) in the inverter F131 is necessary to output AC power whose frequency is appropriately changed in order to correspond to the required rotational speed of the AC motor.

[0148] The mounting of the semiconductor module A10 on the vehicle F1 is not limited to the illustrated example. For example, the semiconductor module A10 may constitute part of the DC-DC converter of the onboard charger F11.

[0149] The operation and effects of semiconductor module A10 are as follows:

[0150] The semiconductor module A10 includes a conductive portion L1 on which a semiconductor element 11 is mounted, positioned on the main surface 21a of an insulating substrate 21. The sealing portion 5 has a signal opening 573 formed on its top surface 51, and the conductive portion L1 includes a signal terminal portion T23 that is exposed from the signal opening 573 while being electrically connected to the semiconductor element 11 (main surface electrode 113). In the semiconductor module described in Patent Document 1, the control terminal is positioned on a control terminal support, so the positioning of the control terminal is limited to the area of ​​the control terminal support. On the other hand, in the semiconductor module A10, since the signal terminal portion T23 is included in the conductive portion L1 on the insulating substrate 21, it is possible to position the signal terminal portion T23 within the area of ​​the insulating substrate 21. Therefore, the semiconductor module A10 can improve the degree of freedom in positioning the signal terminal portion T23 compared to the conventional semiconductor module (Patent Document 1).

[0151] In semiconductor module A10, the conductive portion L1 arranged on the main surface 21a of the insulating substrate 21 includes a signal terminal portion T24 that is electrically connected to the main surface electrode 112 and exposed from the signal opening 574. With this configuration, it is possible to arrange the signal terminal portion T24 within the area of ​​the insulating substrate 21. Therefore, semiconductor module A10 can improve the degree of freedom in arranging the signal terminal portion T24 compared to the conventional semiconductor module (Patent Document 1).

[0152] In semiconductor module A10, the conductive portion L1, which is located on the main surface 21a of the insulating substrate 21, includes a signal terminal portion T21 that is electrically connected to the back electrode 111 and exposed from the signal opening 571. With this configuration, it is possible to arrange the signal terminal portion T21 within the area of ​​the insulating substrate 21. Therefore, semiconductor module A10 can improve the degree of freedom in arranging the signal terminal portion T21 compared to the conventional semiconductor module (Patent Document 1).

[0153] In semiconductor module A10, the conductive portion L1 includes a metal layer 223 and a base portion 283, and a part of the main surface 283a of the base portion 283 is exposed from the signal opening 573 as a signal terminal portion T23. With this configuration, the distance along the thickness direction z between the top surface 51 and the signal terminal portion T23 (main surface 283a) can be reduced. Similarly, the conductive portion L1 includes a metal layer 224 and a base portion 284, and a part of the main surface 284a of the base portion 284 is exposed from the signal opening 574 as a signal terminal portion T24. With this configuration, the distance along the thickness direction z between the top surface 51 and the signal terminal portion T24 (main surface 284a) can be reduced. Furthermore, it includes a metal layer 221 and a base portion 281, and a part of the main surface 281a of the base portion 281 is exposed from the signal opening 571 as a signal terminal portion T21. This configuration makes it possible to reduce the distance along the thickness direction z between the top surface 51 and the signal terminal portion T21 (main surface 281a).

[0154] In semiconductor module A10, the conductive portion L1 includes a signal substrate 24 (wiring layer 242) electrically connected between the main surface electrode 113 of the semiconductor element 11 and the metal layer 223. This configuration improves the degree of freedom of wiring between the main surface electrode 113 of the semiconductor element 11 and the signal terminal portion T23 in the conductive portion L1. Furthermore, in semiconductor module A10, the conductive portion L1 includes a signal substrate 25 separated from the signal substrate 24, and the signal substrate 24 (wiring layer 242) is electrically connected between the main surface electrode 113 of the semiconductor element 11 and the signal substrate 25 (wiring layer 252), and the signal substrate 25 (wiring layer 252) is electrically connected between the signal substrate 24 (wiring layer 242) and the metal layer 223. This configuration further improves the degree of freedom of wiring between the main surface electrode 113 of the semiconductor element 11 and the signal terminal portion T23 in the conductive portion L1. Improving the flexibility of these wirings is effective in improving the flexibility of the arrangement of the signal terminal section T23. In particular, the semiconductor module A10 includes a plurality of semiconductor elements 11 that are electrically connected in parallel to each other. When the plurality of semiconductor elements 11 are operated in parallel, a common first drive signal is input to each main surface electrode 113 of the plurality of semiconductor elements 11. Therefore, in the semiconductor module A10, by providing a signal board 24 (and signal board 25) in the conductive section L1, the first drive signal can be transmitted from the signal terminal section T23 to the vicinity of the plurality of semiconductor elements 11 via a single transmission path. This is preferable in improving the flexibility of the wiring between the main surface electrodes 113 of the semiconductor elements 11 and the signal terminal section T23 in the conductive section L1.

[0155] In semiconductor module A10, the signal substrate 24 (wiring layer 243) is electrically connected between the main surface electrode 112 of the semiconductor element 11 and the metal layer 224. With this configuration, the degree of freedom of wiring between the main surface electrode 112 of the semiconductor element 11 and the signal terminal T23 in the conductive part L1 can be improved, as can the degree of freedom of wiring between the main surface electrode 112 of the semiconductor element 11 and the signal terminal T23 in the conductive part L1. Furthermore, in semiconductor module A10, the signal substrate 24 is electrically connected between the main surface electrode 112 of the semiconductor element 11 and the signal substrate 25 (wiring layer 253), and the signal substrate 25 is electrically connected between the signal substrate 24 (wiring layer 243) and the metal layer 224. With this configuration, the degree of freedom of wiring between the main surface electrode 112 of the semiconductor element 11 and the signal terminal T23 in the conductive part L1 can be further improved, as can the degree of freedom of wiring between the main surface electrode 112 of the semiconductor element 11 and the signal terminal T23 in the conductive part L1. Furthermore, the semiconductor module A10 includes a plurality of semiconductor elements 11. In this configuration, the inclusion of a signal board 24 (and signal board 25) is preferable for consolidating and outputting the signals (the first detection signals) for detecting the voltage generated between the back surface electrodes 111 and the main surface electrodes 112 of the plurality of semiconductor elements 11 to a single signal terminal T24.

[0156] In semiconductor module A10, the signal board 25 extends along the arrangement direction of semiconductor elements 11 and 12 (first direction y in this embodiment). This configuration makes it possible to arrange signal terminals T23 and T24 on the side of the semiconductor element 11 in the second direction x. In particular, in semiconductor module A10, the signal board 24 extends along the arrangement direction of the plurality of semiconductor elements 11 (second direction x in this embodiment). In other words, the two signal boards 24 and 25 extend in different directions from each other in a plan view. Such a configuration is preferable in increasing the degree of freedom of wiring between each semiconductor element 11 and each signal terminal T23 and T24.

[0157] The semiconductor module A10 includes a conductive portion L2 on which a semiconductor element 12 is mounted, positioned on the main surface 21a of an insulating substrate 21. The sealing portion 5 has a signal opening 575 formed on its top surface 51, and the conductive portion L2 includes a signal terminal portion T25 that is electrically connected to the semiconductor element 12 (main surface electrode 123) and exposed from the signal opening 575. In the semiconductor module A10, since the signal terminal portion T25 is included in the conductive portion L2 on the insulating substrate 21, it is possible to position the signal terminal portion T25 within the area of ​​the insulating substrate 21. Therefore, the semiconductor module A10 can improve the degree of freedom in positioning the signal terminal portion T25 compared to the conventional semiconductor module (Patent Document 1).

[0158] In semiconductor module A10, the conductive portion L2, which is located on the main surface 21a of the insulating substrate 21, includes a signal terminal portion T26 that is electrically connected to the main surface electrode 122 and exposed from the signal opening 576. With this configuration, it is possible to arrange the signal terminal portion T26 within the area of ​​the insulating substrate 21. Therefore, semiconductor module A10 can improve the degree of freedom in arranging the signal terminal portion T26 compared to the conventional semiconductor module (Patent Document 1).

[0159] In semiconductor module A10, the conductive portion L2, which is located on the main surface 21a of the insulating substrate 21, includes a signal terminal portion T22 that is electrically connected to the back electrode 121 and exposed from the signal opening 572. With this configuration, it is possible to arrange the signal terminal portion T22 within the area of ​​the insulating substrate 21. Therefore, semiconductor module A10 can improve the degree of freedom in arranging the signal terminal portion T22 compared to the conventional semiconductor module (Patent Document 1).

[0160] In semiconductor module A10, the conductive portion L2 includes a metal layer 225 and a base portion 285, and a part of the main surface 285a of the base portion 285 is exposed from the signal opening 575 as a signal terminal portion T25. With this configuration, the distance along the thickness direction z between the top surface 51 and the signal terminal portion T25 (main surface 285a) can be reduced. Similarly, the conductive portion L2 includes a metal layer 226 and a base portion 286, and a part of the main surface 286a of the base portion 286 is exposed from the signal opening 576 as a signal terminal portion T26. With this configuration, the distance along the thickness direction z between the top surface 51 and the signal terminal portion T26 (main surface 286a) can be reduced. Furthermore, it includes a metal layer 222 and a base portion 282, and a part of the main surface 282a of the base portion 282 is exposed from the signal opening 572 as a signal terminal portion T22. This configuration makes it possible to reduce the distance along the thickness direction z between the top surface 51 and the signal terminal portion T22 (main surface 282a).

[0161] In semiconductor module A10, the conductive portion L2 includes a signal substrate 26 (wiring layer 262) electrically connected between the main surface electrode 123 of the semiconductor element 12 and the metal layer 225. This configuration improves the degree of freedom of wiring between the main surface electrode 123 of the semiconductor element 12 and the signal terminal portion T25 in the conductive portion L2. Furthermore, in semiconductor module A10, the conductive portion L2 includes a signal substrate 27 separated from the signal substrate 26, and the signal substrate 26 (wiring layer 262) is electrically connected between the main surface electrode 123 of the semiconductor element 12 and the signal substrate 27 (wiring layer 272), and the signal substrate 27 (wiring layer 272) is electrically connected between the signal substrate 26 (wiring layer 262) and the metal layer 225. This configuration further improves the degree of freedom of wiring between the main surface electrode 123 of the semiconductor element 12 and the signal terminal portion T25 in the conductive portion L2. Improving the flexibility of these wirings is effective in improving the flexibility of the arrangement of the signal terminal section T25. In particular, the semiconductor module A10 is equipped with a plurality of semiconductor elements 12 that are electrically connected in parallel to each other. When the plurality of semiconductor elements 12 are operated in parallel, a common second drive signal is input to each main surface electrode 123 of the plurality of semiconductor elements 12. Therefore, in the semiconductor module A10, by providing a signal board 26 (and signal board 27) in the conductive section L2, the second drive signal can be transmitted from the signal terminal section T25 to the vicinity of the plurality of semiconductor elements 12 through a single transmission path. This is preferable in improving the flexibility of the wiring between the main surface electrodes 123 of the semiconductor elements 12 and the signal terminal section T25 in the conductive section L2.

[0162] In semiconductor module A10, the signal substrate 26 (wiring layer 263) is electrically connected between the main surface electrode 122 of the semiconductor element 12 and the metal layer 226. With this configuration, the degree of freedom of wiring between the main surface electrode 122 of the semiconductor element 12 and the signal terminal T25 in the conductive part L2 can be improved, as can the degree of freedom of wiring between the main surface electrode 122 of the semiconductor element 12 and the signal terminal T25 in the conductive part L2. Furthermore, in semiconductor module A10, the signal substrate 26 is electrically connected between the main surface electrode 122 of the semiconductor element 12 and the signal substrate 27 (wiring layer 273), and the signal substrate 27 is electrically connected between the signal substrate 26 (wiring layer 263) and the metal layer 226. With this configuration, the degree of freedom of wiring between the main surface electrode 122 of the semiconductor element 12 and the signal terminal T25 in the conductive part L2 can be further improved, as can the degree of freedom of wiring between the main surface electrode 122 of the semiconductor element 12 and the signal terminal T25 in the conductive part L2. Furthermore, the semiconductor module A10 includes a plurality of semiconductor elements 12. In this configuration, the inclusion of a signal board 26 (and signal board 27) is preferable for consolidating and outputting the signals (the second detection signals) for detecting the voltage generated between the back surface electrodes 121 and the main surface electrodes 122 of the plurality of semiconductor elements 12 to a single signal terminal T26.

[0163] In semiconductor module A10, the signal board 27 extends along the arrangement direction of semiconductor elements 11 and 12 (first direction y in this embodiment). This configuration makes it possible to arrange signal terminals T25 and T26 on the side of semiconductor element 11 in the second direction x. In particular, in semiconductor module A10, the signal board 26 extends along the arrangement direction of the plurality of semiconductor elements 12 (second direction x in this embodiment). In other words, the two signal boards 26 and 27 extend in different directions from each other in a plan view. Such a configuration is preferable in increasing the degree of freedom of wiring between each semiconductor element 11 and each signal terminal T25 and T26.

[0164] The semiconductor module A10 includes terminal members 61, 63, and 64. With this configuration, a first control signal (first drive signal and first detection signal) for controlling the switching operation of each semiconductor element 11 can be transmitted up to the top surface 51 in the thickness direction z. Similarly, the semiconductor module A10 includes terminal members 62, 65, and 66. With this configuration, a second control signal (second drive signal and second detection signal) for controlling the switching operation of each semiconductor element 12 can be transmitted up to the top surface 51 in the thickness direction z. In such a configuration, for example, as shown in Figures 24 and 25, a control board E1 for controlling the switching operation of multiple semiconductor elements 11 and 12 can be connected from the top surface 51 in the thickness direction z.

[0165] Other embodiments and modifications of the semiconductor module of this disclosure are described below. The configurations of the parts in each embodiment and each modification can be combined with each other to the extent that no technical inconsistencies arise. Furthermore, the semiconductor modules according to each embodiment and each modification described below can be appropriately mounted in the power conversion unit U10 and the vehicle F1.

[0166] Figures 28 to 31 show a semiconductor module A11 according to a modification of the first embodiment. Semiconductor module A11 differs from semiconductor module A10 in the following respects. First, in semiconductor module A11, the power terminals T11 and T12 are arranged in opposite positions. Second, semiconductor module A11 does not have any of the multiple terminal members 6 (multiple terminal members 61 to 66). As can be seen from Figures 28 to 31, the configuration of the two conductive parts L1 and L2 in semiconductor module A11 is the same as in semiconductor module A10.

[0167] In semiconductor module A11, there is one power terminal T11 and two power terminal T12. As shown in Figure 28, in the second direction x, power terminal T11 is located between the two power terminal T12. With this configuration, in semiconductor module A11, two terminal members 35 are individually arranged on both sides of terminal member 34 in the second direction x. The support member 20 includes two metal layers 227, and the conductive member 32 includes two joints 321 and two connecting parts 324. The joints 352 of the two terminal members 35 are each joined to one of the two metal layers 227, and the two joints 321 are each joined to the joint 352 of one of the two terminal members 35.

[0168] Semiconductor module A11 has a configuration common to semiconductor module A10 and thus achieves the same effects as semiconductor module A10. As can be understood from semiconductor module A11, in the semiconductor module of this disclosure, the arrangement of power terminals T11, power terminals T12, power terminals T11 at one end of the sealing portion 5 in the first direction y, or the arrangement of power terminals T12, power terminals T11, power terminals T12, can be changed as appropriate. Also, as can be understood from semiconductor module A11, the presence or absence of multiple terminal members 6 in the semiconductor module of this disclosure is not limited in any way.

[0169] In the first embodiment described above (including modified examples), each signal terminal portion T21 to T26 is a part of the main surfaces 281a to 286a of the corresponding base portions 281 to 286. Unlike this example, each signal terminal portion T21 to T26 may be the entire main surface 281a to 286a of the corresponding base portions 281 to 286. In this example, the entire main surface 281a to 286a of each base portion 281 to 286 is exposed from the corresponding signal openings 571 to 576. In the example where the entire main surface 281a to 286a is used as the corresponding signal terminal portion T21 to T26, each main surface 281a to 286a may be flush with the top surface 51, or it may protrude upward in the thickness direction z from the top surface 51.

[0170] Second Embodiment: Figures 32 and 33 show a semiconductor module A20 according to the second embodiment. Compared to semiconductor module A10, semiconductor module A20 differs in the number of power terminals T11 and the number of power terminals T13.

[0171] In semiconductor module A20, there is one power terminal T11 and two power terminal T13s. As shown in Figure 32, power terminal T11 and power terminal T12 are arranged along the second direction x in a plan view. With this configuration, the number of terminal members 34 in semiconductor module A20 has been changed to one. The positional relationship between power terminal T11 and power terminal T12 may be reversed. In semiconductor module A20, since the terminal member 35 is not sandwiched between the two terminal members 34 in the second direction x, the extension portion 353 of the terminal member 35 may extend from the pad portion 351 in the second direction x. Alternatively, in a configuration with two or more extension portions 353, it may include an extension portion 353 extending from the pad portion 351 in the first direction y and an extension portion 353 extending from the pad portion 351 in the second direction x. Alternatively, the extension 353 may extend from the pad portion 351 in one of the first direction y and the second direction x, and have a portion that branches off in the other of the first direction y and the second direction x.

[0172] In semiconductor module A20, as shown in Figure 32, the two power terminals T12 are arranged along the second direction x. With this configuration, the number of terminal members 36 in semiconductor module A20 is changed to two. Each of the two terminal members 36 is electrically connected to the main portion 2221 (metal layer 222).

[0173] In semiconductor module A20, the arrangement of terminal members 34 and 35 is different from that of semiconductor module A10. As shown in Figure 33, the connecting portion 324 of the conductive member 32 is bent in the second direction x on the side of the joint portion 321 in the first direction y when viewed from above.

[0174] As can be understood from the above explanation, in semiconductor module A20, the main current path is different from that of semiconductor module A10, but the transmission paths for the first control signal and the second control signal (i.e., the two conductive parts L1 and L2) are the same.

[0175] The operation and effects of semiconductor module A20 are as follows:

[0176] Like semiconductor module A10, semiconductor module A20 includes a conductive portion L1 which is conductive to the semiconductor element 11 and exposed from the signal opening 573, and a signal terminal portion T23. Therefore, like semiconductor module A10, semiconductor module A20 allows the signal terminal portion T23 to be arranged within the range of the insulating substrate 21, and thus semiconductor module A20, like semiconductor module A10, can improve the degree of freedom in the arrangement of the signal terminal portion T23 compared to the conventional semiconductor module (Patent Document 1). In addition, semiconductor module A20 has a configuration common to semiconductor module A10 and therefore achieves the same effects as semiconductor module A10. As can be understood from semiconductor module A20, the semiconductor module of this disclosure only needs to have at least one power terminal portion T11, at least one power terminal portion T12, and at least one power terminal portion T13, and the number of these can be changed as appropriate.

[0177] Figure 34 shows a semiconductor module A21 according to a modification of the second embodiment. Semiconductor module A21 differs from semiconductor module A20 in the configuration of the conductive member 32.

[0178] In semiconductor module A21, similar to semiconductor module A10, the connecting portion 324 of the conductive member 32 extends in the first direction y in a plan view and is not bent in the second direction x. However, in the conductive member 32 of semiconductor module A21, the position where the connecting portion 324 connects to the main body portion 320 is shifted to one side in the second direction x (the side where the terminal member 35 is located relative to the terminal member 34 in the second direction x).

[0179] In semiconductor module A21, the same configuration as semiconductor module A20 (A10) is used, and the same effects as semiconductor module A20 (A10) are achieved. Furthermore, as can be seen from this modified example, in the conductive member 32 of the semiconductor module disclosed herein, the connection position of the connecting portion 324 to the main body portion 320 is not limited in any way.

[0180] Third Embodiment: Figures 35 to 37 show a semiconductor module A30 according to the third embodiment. The semiconductor module A30 differs from the semiconductor module A10 in that it does not have a plurality of base portions 281 to 286.

[0181] The semiconductor module A30 does not include any of the multiple base portions 281 to 286, and one of the multiple metal layers 221 to 226 is exposed from each of the multiple signal openings 571 to 576. Metal layer 221 has a main surface 221a. The main surface 221a faces upward in the thickness direction z. The main surface 221a is the upper surface of metal layer 221. A part of the main surface 221a is exposed from the signal opening 571 as a signal terminal portion T21. Similarly, each of the multiple metal layers 222 to 226 has a corresponding main surface 222a to 226a. Each of the multiple main surfaces 222a to 226a faces upward in the thickness direction z. Each of the multiple main surfaces 222a to 226a is the upper surface of the corresponding metal layer 222 to 226. As shown in Figure 36, a portion of the main surface 222a is exposed from the signal opening 572 as a signal terminal T22, a portion of the main surface 223a is exposed from the signal opening 573 as a signal terminal T23, and a portion of the main surface 224a is exposed from the signal opening 574 as a signal terminal T24. Also, as shown in Figure 37, a portion of the main surface 225a is exposed from the signal opening 575 as a signal terminal T25, and a portion of the main surface 226a is exposed from the signal opening 576 as a signal terminal T26.

[0182] The operation and effects of semiconductor module A30 are as follows:

[0183] In semiconductor module A30, similar to semiconductor module A10, the conductive portion L1 includes a signal terminal portion T23 that is exposed from the signal opening 573 while conducting to the semiconductor element 11. Therefore, in semiconductor module A30, similar to semiconductor module A10, the signal terminal portion T23 can be arranged within the range of the insulating substrate 21, and thus, semiconductor module A30, similar to semiconductor module A10, can improve the degree of freedom in the arrangement of the signal terminal portion T23 compared to conventional semiconductor modules (Patent Document 1). In addition, semiconductor module A30 has a configuration common to the other semiconductor modules A10, A11, A20, and A21, and thus achieves the same effects as semiconductor modules A10, A11, A20, and A21. As can be seen from semiconductor module A30, in the semiconductor module of this disclosure, the presence or absence of each base portion 281, 283, 284 in the conductive portion L1 is not limited in any way, and the presence or absence of each base portion 282, 285, 286 in the conductive portion L2 is not limited in any way.

[0184] Fourth Embodiment: Figures 38 and 39 show a semiconductor module A40 according to the fourth embodiment. The semiconductor module A40 differs from the semiconductor module A10 in that it does not include either the signal board 25 or the signal board 27.

[0185] In semiconductor module A40, as shown in Figure 38, metal layer 223 and metal layer 224 are located next to the main portion 2211 of metal layer 221 in the second direction x, and on one side of the expansion portion 2212 in the first direction y (on the side where the multiple semiconductor elements 11 are located relative to the multiple semiconductor elements 12 in the first direction y). Metal layer 223 and metal layer 224 are adjacent in the first direction y. In the illustrated example, in the first direction y, metal layer 223 is located between metal layer 224 and the expansion portion 2212. The positions of metal layer 223 and metal layer 224 may be reversed. Furthermore, in semiconductor module A40, as shown in Figure 38, metal layer 225 and metal layer 226 are located next to the main portion 2221 of metal layer 222 in the second direction x, and on one side of the expansion portion 2222 in the first direction y (on the side where the multiple semiconductor elements 12 are located relative to the multiple semiconductor elements 11 in the first direction y). Metal layer 225 and metal layer 226 are adjacent in the first direction y. In the illustrated example, in the first direction y, metal layer 225 is located between metal layer 226 and the expansion portion 2222. The positions of metal layer 225 and metal layer 226 may be reversed.

[0186] In semiconductor module A40, as shown in Figure 39, the connecting member 412 is joined to the wiring layer 242 and the metal layer 223 of the signal substrate 24, making them electrically conductive. Therefore, the base portion 283 is electrically conductive to the main surface electrodes 113 of the multiple semiconductor elements 11 via the metal layer 223, the connecting member 412, the wiring layer 242 of the signal substrate 24, and the multiple connecting members 411. In this configuration, the conductive portion L1 includes the multiple connecting members 411, the wiring layer 242 of the signal substrate 24, the connecting member 412, the metal layer 223, and the base portion 283 as a current path from each main surface electrode 113 of the multiple semiconductor elements 11 to the signal terminal portion T23. As shown in Figure 39, the connecting member 422 is joined to the wiring layer 243 and the metal layer 224 of the signal substrate 24, making them electrically conductive. Therefore, the base portion 284 is electrically connected to the main surface electrodes 112 (signal pads 1122) of the multiple semiconductor elements 11 via the metal layer 224, the connecting member 422, the wiring layer 243 of the signal board 24, and the multiple connecting members 421. In this configuration, the conductive portion L1 includes the multiple connecting members 421, the wiring layer 243 of the signal board 24, the connecting member 422, the metal layer 224, and the base portion 284 as a current path from each main surface electrode 112 (signal pad 1122) of the multiple semiconductor elements 11 to the signal terminal portion T24.

[0187] In semiconductor module A40, as shown in Figure 39, the connecting member 432 is joined to the wiring layer 262 and the metal layer 225 of the signal substrate 26, making them electrically conductive. Therefore, the base portion 285 is electrically conductive to the main surface electrodes 123 of the multiple semiconductor elements 12 via the metal layer 225, the connecting member 432, the wiring layer 262 of the signal substrate 26, and the multiple connecting members 431. In this configuration, the conductive portion L2 includes the multiple connecting members 431, the wiring layer 262 of the signal substrate 26, the connecting member 432, the metal layer 225, and the base portion 285 as a current path from each main surface electrode 123 of the multiple semiconductor elements 12 to the signal terminal portion T25. As shown in Figure 39, the connecting member 442 is joined to the wiring layer 263 and the metal layer 226 of the signal substrate 26, making them electrically conductive. Therefore, the base portion 286 is electrically connected to the main surface electrodes 122 (signal pads 1222) of the multiple semiconductor elements 12 via the metal layer 226, the connecting member 442, the wiring layer 263 of the signal board 26, and the multiple connecting members 441. In this configuration, the conductive portion L2 includes the multiple connecting members 441, the wiring layer 263 of the signal board 26, the connecting member 442, the metal layer 226, and the base portion 286 as a current path from each main surface electrode 122 (signal pad 1222) of the multiple semiconductor elements 12 to the signal terminal portion T26.

[0188] The operation and effects of semiconductor module A40 are as follows:

[0189] In semiconductor module A40, similar to semiconductor module A10, the conductive portion L1 includes a signal terminal portion T23 that is electrically connected to the semiconductor element 11 and exposed from the signal opening 573. Therefore, in semiconductor module A40, similar to semiconductor module A10, the signal terminal portion T23 can be arranged within the range of the insulating substrate 21, and thus, semiconductor module A40, similar to semiconductor module A10, can improve the degree of freedom in the arrangement of the signal terminal portion T23 compared to the conventional semiconductor module (Patent Document 1). In addition, semiconductor module A40 has a configuration common to the other semiconductor modules A10, A11, A20, A21, and A30, and thus achieves the same effects as semiconductor modules A10, A11, A20, A21, and A30. As can be understood from semiconductor module A40, in the semiconductor module of this disclosure, the presence or absence of the signal substrate 25 in the conductive portion L1 is not limited in any way, and the presence or absence of each base portion 282, 285, 286 in the conductive portion L2 is not limited in any way. As can be seen from semiconductor module A40, when the semiconductor module of this disclosure comprises a plurality of semiconductor elements 11, it is preferable to include a signal board 24 for appropriately aggregating the first drive signal and the first detection signal, respectively. Similarly, when the semiconductor module of this disclosure comprises a plurality of semiconductor elements 12, it is preferable to include a signal board 26 for appropriately aggregating the second drive signal and the second detection signal, respectively.

[0190] Fifth Embodiment: Figures 40 and 41 show a semiconductor module A50 according to the fifth embodiment. The semiconductor module A50 differs from the semiconductor module A10 in the configuration of each terminal member 6 (each terminal member 61 to 66).

[0191] In semiconductor module A50, each terminal member 6 (each terminal member 61-66) is a metal plate. Each terminal member 6 (each terminal member 61-66) includes, for example, copper or a copper alloy. Each terminal member 6 (each terminal member 61-66) may also include other metals other than copper (for example, aluminum, gold, silver, iron, etc.). As can be seen from Figures 40 and 41, each terminal member 61-66 includes a portion electrically connected to the corresponding base portions 281-286 inside the corresponding signal openings 571-576, a portion extending upward in the thickness direction z from this electrically connected portion, and a portion extending in a second direction x from the portion extending upward in the thickness direction z. The portion extending upward in the thickness direction z extends above the top surface 51 in the thickness direction z. The portion extending in the second direction x extends outward in plan view toward the sealing portion 5. Unlike the illustrated example, the portion extending in the second direction x may extend inward from the sealing portion 5 in a plan view. The shape of each terminal member 6 in the semiconductor module A50 is not limited to the illustrated example.

[0192] The operation and effects of semiconductor module A50 are as follows:

[0193] In semiconductor module A50, similar to semiconductor module A10, the conductive portion L1 includes a signal terminal portion T23 that is electrically connected to the semiconductor element 11 and exposed from the signal opening 573. Therefore, in semiconductor module A50, similar to semiconductor module A10, the signal terminal portion T23 can be arranged within the range of the insulating substrate 21, and thus, semiconductor module A50, similar to semiconductor module A10, can improve the degree of freedom in the arrangement of the signal terminal portion T23 compared to the conventional semiconductor module (Patent Document 1). In addition, semiconductor module A50 has a configuration common to the other semiconductor modules A10, A11, A20, A21, A30, and A40, and thus achieves the same effects as those semiconductor modules A10, A11, A20, A21, A30, and A40. As can be understood from semiconductor module A50, in the semiconductor module of this disclosure, the configuration of each of the multiple terminal members 6 (multiple terminal members 61 to 66) can be changed as appropriate.

[0194] In a configuration different from semiconductor module A50, the multiple terminal members 6 may be made of flexible printed circuit boards (FPCs) instead of metal plates. In this example, at least two of the multiple terminal members 6 may be made of a common FPC. Alternatively, the multiple terminal members 6 may be made of rigid-flexible substrates.

[0195] Sixth Embodiment: Figure 42 shows a semiconductor module A60 according to the sixth embodiment. The semiconductor module A60 differs from the semiconductor module A10 in the configuration of the multiple terminal members 34 to 36.

[0196] In semiconductor module A60, as shown in Figure 42, terminal member 35 includes a conductive portion 354 located on pad portion 351 and housed in power opening 562. The conductive portion 354 is made of metal. The conductive portion 354 may be integrally formed with pad portion 351, or it may be formed separately from pad portion 351 and electrically connected to pad portion 351. As shown in Figure 42, the conductive portion 354 has a main surface 354a. The main surface 354a is the upper surface (the surface facing upward in the thickness direction z) of the conductive portion 354. In the illustrated example, the main surface 354a is flush with the top surface 51, but it may be located above or below the top surface 51 in the thickness direction z. As shown in Figure 42, terminal member 36 includes a conductive portion 364 located on pad portion 361 and housed in power opening 563. The conductive portion 364 is made of metal. The conductive portion 364 may be formed integrally with the pad portion 361, or it may be formed separately from the pad portion 361 and electrically connected to the pad portion 361. As shown in Figure 42, the conductive portion 364 has a main surface 364a. The main surface 364a is the upper surface (the surface facing upward in the thickness direction z) of the conductive portion 364. In the illustrated example, the main surface 364a is flush with the top surface 51, but it may be located above or below the top surface 51 in the thickness direction z. Although not shown, each terminal member 34 is configured similarly. That is, each terminal member 34 is located on the pad portion 341 and includes a conductive portion housed in the power opening 561. The conductive portion of each terminal member 34 may be configured similarly to the conductive portions 354 and 364 described above.

[0197] The operation and effects of semiconductor module A60 are as follows:

[0198] In semiconductor module A60, similar to semiconductor module A10, the conductive portion L1 includes a signal terminal portion T23 that is exposed from the signal opening 573 while being electrically connected to the semiconductor element 11. Therefore, in semiconductor module A60, similar to semiconductor module A10, it is possible to arrange the signal terminal portion T23 within the range of the insulating substrate 21, and thus, semiconductor module A60, similar to semiconductor module A10, can improve the degree of freedom in arranging the signal terminal portion T23 compared to conventional semiconductor modules (Patent Document 1).

[0199] Furthermore, semiconductor module A60 has a configuration common to the other semiconductor modules A10, A11, A20, A21, A30, A40, and A50, and therefore achieves the same effects as those semiconductor modules A10, A11, A20, A21, A30, A40, and A50.

[0200] Figures 43 and 44 show a semiconductor module A61 according to a first modified example of the sixth embodiment. The semiconductor module A61 differs from the semiconductor module A60 in the configuration of the multiple terminal members 34 to 36.

[0201] In semiconductor module A61, as shown in Figures 43 and 44, terminal member 35 includes a block-shaped pad portion 351 and does not include a joint portion 352 and an extension portion 353. The pad portion 351 is electrically bonded to the metal layer 227. As shown in Figures 43 and 44, terminal member 36 includes a block-shaped pad portion 361 and does not include a joint portion 362 and an extension portion 363. The pad portion 361 is electrically bonded to the metal layer 222. In the illustrated example, the metal layer 222 includes an extension portion 2223 extending from the main portion 2221 in a first direction y, and the pad portion 361 is electrically bonded to the extension portion 2223. As can be seen from Figure 43, each terminal member 34 includes a block-shaped pad portion 341 and does not include a joint portion 342 and an extension portion 343. The pad portion 341 is bonded to the metal layer 221. In the illustrated example, the metal layer 221 includes two extensions 2213 extending from the main portion 2211 in a first direction y, and the pad portions 341 of two terminal members 34 are individually electrically connected to the two extensions 2213.

[0202] In a configuration different from semiconductor module A61, the semiconductor module of this disclosure does not need to have two terminal members 34, terminal member 35, and terminal member 36. In this example, a part of the main surface 221a of the metal layer 221 is exposed from the power opening 561 as a power terminal portion T11, a part of the main surface 222a of the metal layer 222 is exposed from the power opening 562 as a power terminal portion T12, and a part of the main surface 223a of the metal layer 223 is exposed from the power opening 563 as a power terminal portion T13.

[0203] Figures 45 and 46 show a semiconductor module A62 according to a second modification of the sixth embodiment. Semiconductor module A62 differs from semiconductor modules A60 and A61 in the configuration of the multiple terminal members 34 to 36.

[0204] In semiconductor module A62, the sealing portion 5 does not have any of the multiple power openings 561 to 563. As shown in Figure 45, semiconductor module A62 has the protruding portion 343a of each terminal member 34 as a power terminal portion T11. Also, as shown in Figures 45 and 46, semiconductor module A62 has the protruding portion 353a of terminal member 35 as a power terminal portion T12, and the protruding portion 363a of terminal member 36 as a power terminal portion T13. In the illustrated example, each terminal member 34 to 36 is a flat plate that is not bent, but like semiconductor module A10 and the like, it may include a bent portion.

[0205] In the illustrated example, as shown in Figure 45, the sealing portion 5 has two recesses 55. Each of the two recesses 55 is recessed in a first direction y from the side surface 531. The two recesses 55 are individually positioned on the side surface 531 in a second direction x, between one of the two terminal members 34 and terminal member 35, and between the other of the two terminal members 34 and terminal member 35. This allows for a larger creepage distance along the side surface 531.

[0206] In the semiconductor modules A61 and A62 described above, the same configuration as semiconductor module A60 (A10) is used, and the same effects as semiconductor module A60 (A10) are achieved. As can be understood from semiconductor modules A60 to A62 described above, the configuration of the multiple terminal members 34 to 36 (i.e., the multiple power terminal sections T11 to T13) in the semiconductor modules of this disclosure can be changed as appropriate.

[0207] Seventh Embodiment: Figure 47 shows a semiconductor module A70 according to the seventh embodiment. The semiconductor module A70 differs from the semiconductor module A10 in the following respect: the plurality of signal terminals T21 to T26 are arranged on one side of the plurality of semiconductor elements 11 and the plurality of semiconductor elements 12 with respect to the second direction x.

[0208] In semiconductor module A70, the multiple signal terminals T21 to T26 are arranged in a first direction y along the side surface 533 in a plan view. Unlike the illustrated example, the multiple signal terminals T21 to T26 may be arranged in a first direction y along the side surface 534 in a plan view. In the illustrated example, the multiple signal terminals T21 to T26 are arranged in a single row in the first direction y. Unlike this example, the multiple signal terminals T21 to T26 may be arranged in multiple rows in the first direction y by changing the shape and arrangement of the multiple metal layers 221 to 227 and the shape and arrangement of the multiple signal substrates 24 to 27.

[0209] The operation and effects of semiconductor module A70 are as follows:

[0210] In semiconductor module A70, similar to semiconductor module A10, the conductive portion L1 includes a signal terminal portion T23 that is exposed from the signal opening 573 while conducting to the semiconductor element 11. Therefore, in semiconductor module A70, similar to semiconductor module A10, the signal terminal portion T23 can be arranged within the range of the insulating substrate 21, and thus, semiconductor module A70, similar to semiconductor module A10, can improve the degree of freedom in the arrangement of the signal terminal portion T23 compared to conventional semiconductor modules (Patent Document 1). In addition, semiconductor module A70 has a configuration common to other semiconductor modules A10, A11, A20, A21, A30, A40, A50, A60 to A62, and thus achieves the same effects as semiconductor modules A10, A11, A20, A21, A30, A40, A50, A60 to A62.

[0211] Eighth Embodiment: Figures 48 and 49 show a semiconductor module A80 according to the eighth embodiment. The semiconductor module A80 differs from the semiconductor module A10 in the following respect: The sealing portion 5 of the semiconductor module A80 has two signal openings 570 instead of a plurality of signal openings 571 to 576. In the illustrated example, the semiconductor module A80 does not include any of the plurality of terminal members 6, but it may include a plurality of terminal members 6.

[0212] One of the two signal openings 570 is located near the edge of the top surface 51 on the side surface 533 side in a plan view, and is rectangular in shape with the first direction y as the longitudinal direction. The three signal terminals T22 to T24 are exposed from this signal opening 570. In other words, the three signal terminals T22 to T24 are exposed from a common signal opening 570. The other of the two signal openings 570 is located near the edge of the top surface 51 on the side surface 534 side in a plan view, and is rectangular in shape with the first direction y as the longitudinal direction. The three signal terminals T21, T25, and T26 are exposed from this signal opening 570. In other words, the three signal terminals T21, T25, and T26 are exposed from a common signal opening 570. In the illustrated example, the sealing portion 5 has two intermediate surfaces 58. As shown in Figure 48, the two intermediate surfaces 58 are located inside each signal opening 570 in a plan view. Each intermediate surface 58 is located between the top surface 51 and the bottom surface 52 in the thickness direction z. As can be seen from Figure 49, in the illustrated example, each intermediate surface 58 is flush with the main surfaces 281a to 286a of each base portion 281 to 286. Unlike this example, each intermediate surface 58 may be located above or below the main surfaces 281a to 286a of the multiple base portions 281 to 286 in the thickness direction z. The number and shape of the signal openings 570 are not limited to the illustrated example, and the combination of signal terminal portions T21 to T26 exposed from the common signal opening 570 is not limited in any way.

[0213] The operation and effects of semiconductor module A80 are as follows:

[0214] Like semiconductor module A10, semiconductor module A80 includes a conductive portion L1 which is conductive to the semiconductor element 11 and exposed from the signal opening 573, and a signal terminal portion T23. Therefore, like semiconductor module A10, semiconductor module A80 allows the signal terminal portion T23 to be arranged within the range of the insulating substrate 21, and thus semiconductor module A80, like semiconductor module A10, can improve the degree of freedom in the arrangement of the signal terminal portion T23 compared to the conventional semiconductor module (Patent Document 1). In addition, semiconductor module A80 has a configuration common to the other semiconductor modules A10, A11, A20, A21, A30, A40, A50, A60 to A62, and A70, and thus achieves the same effects as semiconductor modules A10, A11, A20, A21, A30, A40, A50, A60 to A62, and A70. As can be seen from semiconductor module A80, the semiconductor module of this disclosure is not limited to a configuration in which each of the multiple signal terminals T21 to T26 is individually exposed from the corresponding signal openings 571 to 576, but at least two of the multiple signal terminals T21 to T26 may be exposed from a common signal opening 570.

[0215] In configurations different from the first to eighth embodiments described above (including their variations), the semiconductor module of the present disclosure may have a configuration in which the two conductive parts L1 and L2 do not include any of the plurality of signal terminal parts T21 to T26. In other words, the semiconductor module of the present disclosure may have a configuration in which the two conductive parts L1 and L2 include at least one of the plurality of signal terminal parts T21 to T26. For example, the semiconductor module of the present disclosure may have a configuration in which the conductive part L1 includes only the signal terminal part T23, or a configuration in which the conductive part L2 includes only the signal terminal part T25. For example, there are semiconductor modules that do not include a signal terminal part T22 (the drain sense terminal of the lower arm circuit), and the configurations of each part in each of the above embodiments can also be applied to such semiconductor modules.

[0216] In configurations different from the first to eighth embodiments described above (including their variations), the semiconductor module of the present disclosure may have a configuration comprising one semiconductor element 11 (i.e., the number of semiconductor elements 11 may be one). Similarly, the semiconductor module of the present disclosure may have a configuration comprising one semiconductor element 12 (i.e., the number of semiconductor elements 12 may be one).

[0217] In configurations different from the first to eighth embodiments described above (including their variations), the semiconductor module of the present disclosure may be configured to include at least one semiconductor element 11 or at least one semiconductor element 12. In other words, the conductor module of the present disclosure is not limited to one that constitutes a half-bridge circuit, but may be configured as a switching circuit (power conversion circuit) that includes at least one semiconductor element 11 or at least one semiconductor element 12. In such variations, for example, in a configuration that includes at least one semiconductor element 11, elements that conduct to only at least one semiconductor element 12 (and not to at least one semiconductor element 11) may be omitted.

[0218] In configurations different from the first to eighth embodiments described above (including their variations), the semiconductor module of this disclosure may not include either of the two signal substrates 24 and 25, and may electrically connect the main surface electrode 113 of each semiconductor element 11 to the metal layer 223 using a plurality of connecting members 411, while electrically connecting the main surface electrode 112 (signal pad 1122) of each semiconductor element 11 to the metal layer 224 using a plurality of connecting members 421. Such a configuration can be easily applied when there is only one semiconductor element 11. Similarly, the semiconductor module of this disclosure may not include either of the two signal substrates 26 and 27, and may electrically connect the main surface electrode 123 of each semiconductor element 12 to the metal layer 225 using a plurality of connecting members 431, while electrically connecting the main surface electrode 122 (signal pad 1222) of each semiconductor element 12 to the metal layer 226 using a plurality of connecting members 441. Such a configuration can be easily applied when there is only one semiconductor element 12.

[0219] In configurations different from the first to eighth embodiments described above (including their variations), each terminal member 34 to 36 of the semiconductor module of this disclosure may have the configuration shown in Figures 50 and 51.

[0220] In the semiconductor module shown in Figure 50, each of the two terminal members 34 with respect to the semiconductor module A10 further includes an extension 343 extending from the pad portion 341 in a second direction x. The extension 343 of each terminal member 34 protrudes from either the side surface 533 or the side surface 534. The terminal member 36 further includes two extensions 363 extending individually from the pad portion 361 on both sides in the second direction x. These two extensions 363 protrude individually from the side surfaces 533 and 534, respectively. Note that in the semiconductor module shown in Figure 50, each of the two terminal members 34 does not necessarily include an extension 343 extending from the pad portion 341 in a first direction y. Similarly, the terminal member 36 does not necessarily include an extension 363 extending from the pad portion 361 in a first direction y.

[0221] In the semiconductor module shown in Figure 51, with respect to the semiconductor module A20, terminal member 34 includes an extension 343 extending from the pad portion 341 in a second direction x (towards the side surface 533), and terminal member 35 extends from the pad portion 351 in a second direction x (towards the side surface 534). Furthermore, each of the two terminal members 36 includes an extension 363 extending from the pad portion 361 in a second direction x. The extension 363 of each terminal member 36 protrudes from either the side surface 533 or the side surface 534. Note that in the semiconductor module shown in Figure 51, terminal member 34 does not need to include an extension 343 extending from the pad portion 341 in a first direction y, and terminal member 35 does not need to include an extension 353 extending from the pad portion 351 in a first direction y. Similarly, the terminal member 36 does not need to include an extension 363 extending from the pad portion 361 in the first direction y.

[0222] In a configuration where multiple terminal members 34 to 36 protrude from at least one of the side surfaces 533 and 534, as shown in Figures 50 and 51, the sealing portion 5 may have protrusions 54 protruding from the side surface 533 or 534. For example, Figure 52 shows a semiconductor module according to such a modification, in which protrusions 54 protruding from the side surface 533 or 534 are provided in the semiconductor module shown in Figure 50. In the example shown in Figure 52, the sealing portion 5 has multiple protrusions 54. The multiple protrusions 54 include those that cover a portion of the extension 343 protruding from the side surface 533 of one of the two terminal members 34, those that cover a portion of the extension 343 protruding from the side surface 534 of the other of the two terminal members 34, those that cover a portion of the extension 363 protruding from the side surface 533 of the terminal member 36, and those that cover a portion of the extension 363 protruding from the side surface 534 of the terminal member 36. Similarly, in the semiconductor module shown in Figure 51, a protrusion 54 may be provided that extends from the side surface 533 or side surface 534.

[0223] In configurations different from the first to eighth embodiments described above (including their variations), the sealing portion 5 of the semiconductor module of the present disclosure may have the configuration shown in Figure 53. In the semiconductor module shown in Figure 53, the sealing portion 5 has a plurality of recesses 59 relative to the semiconductor module A10. The plurality of recesses 59 include, in a plan view, those recessed from the side surface 531 in a first direction y, and those recessed from the side surface 532 in a first direction y. The extension portion 343 (projection portion 343a) of each terminal member 34 protrudes from the sealing portion 5 in the recess 59 provided on the side surface 531. The two extension portions 353 (two projection portions 353a) of the terminal member 35 each protrude from the sealing portion 5 in the recess 59 provided on the side surface 531. In the illustrated example, two extension portions 353 protrude from a common recess 59, but separate recesses 59 may be provided for each of the two extension portions 353. Furthermore, two extensions 343 and two extensions 353 may protrude from a single recess 59. In the illustrated example, the tip of each extension 343 and the tip of each extension 353 are recessed relative to the side surface 531 in the first direction y (located inside the corresponding recess 59 in a plan view), but unlike this example, these tips may be at the same position as the side surface 531 in the first direction y, or they may protrude beyond the side surface 531. The extension 363 (protruding portion 363a) of the terminal member 36 is exposed from the sealing portion 5 in the recess 59 provided on the side surface 532. In the illustrated example, the tip of the extension 363 is recessed relative to the side surface 532 in the first direction y (located inside the corresponding recess 59 in a plan view), but this tip may be at the same position as the side surface 532 in the first direction y, or it may protrude beyond the side surface 532. Such recesses 59 may be provided on the side surfaces 533 and 534 of the extensions 343, 353, and 363 that extend in the second direction x as shown in Figures 50 and 51.

[0224] The semiconductor module relating to this disclosure is not limited to the embodiments described above. The specific configuration of each part of the semiconductor module relating to this disclosure can be modified in various ways. For example, the conductive module relating to this disclosure includes the embodiments described in the following appendix. Appendix 1. The device comprises: at least one first semiconductor element (11) having a first element main surface (11a) and a first element back surface (11b) facing opposite directions with respect to the thickness direction (z); a sealing portion (5) covering the at least one first semiconductor element (11); an insulating substrate (21) having a substrate main surface (21a) facing the first element back surface (11b) with respect to the thickness direction (z); and a first conductive portion (L1) on which the at least one first semiconductor element (11) is mounted while being arranged on the substrate main surface (21a), wherein the sealing portion (5) has a top surface (51) facing the same direction as the first element main surface (11a) with respect to the thickness direction (z), and a first signal opening (573) formed on the top surface (51). The first conductive portion (L1) includes a first signal terminal portion (T23) that is exposed from the first signal opening (573) while being electrically connected to the at least one first semiconductor element (11), and is part of a semiconductor module (A10, A11, A20, A21, A30, A40, A50, A60-A62, A70, A80). Note 2. The first conductive portion (L1) includes a first metal layer (223) bonded to the substrate main surface (21a) and a first metal base portion (283) electrically bonded to the first metal layer (223), the first base portion (283) having a main surface (283a) facing the same direction as the first element main surface (11a) in the thickness direction (z), and a part of the main surface (283a) of the first base portion (283) being exposed from the first signal opening (573) as the first signal terminal portion (T23), as described in Appendix 1 (A10, A11, A20, A21, A40, A50, A60 to A62, A70, A80).Note 3. The semiconductor module (A30) described in Note 1, wherein the first conductive portion (L1) includes a first metal layer (223) bonded to the substrate main surface (21a), the first metal layer (223) has a main surface (223a) that faces the same direction as the first element main surface (11a) in the thickness direction (z), and a part of the main surface (223a) of the first metal layer (223) is exposed from the first signal opening (573) as the first signal terminal portion (T23). Note 4. The semiconductor module described in Appendix 2 or 3 (A10, A11, A20, A21, A30, A40, A50, A60 to A62, A70, A80) is characterized in that at least one first semiconductor element (11) has a first electrode (111), a second electrode (112), and a third electrode (113), and in response to a first drive signal input to the third electrode (113), a state in which current flows from the first electrode (111) to the second electrode (112) and a state in which the current is interrupted, and the first metal layer (223) is conductive to the third electrode (113). Appendix 5. The sealing portion (5) has a second signal opening (574) formed on the top surface (51), the first conductive portion (L1) includes a second signal terminal portion (T24) that is exposed from the second signal opening (574) while being conductive to the second electrode (112), and the first conductive portion (L1) includes a second metal layer (224) that is bonded to the main surface (21a) of the substrate and is conductive to the second electrode (112), as described in Appendix 4 (A10, A11, A20, A21, A30, A40, A50, A60 to A62, A70, A80). Appendix 5-1. The first conductive portion (L1) includes a second metallic base portion (284) electrically bonded to the second metal layer (224), the second base portion (284) has a main surface (284a) that faces the same direction as the first element main surface (11a) in the thickness direction (z), and a part of the main surface (284a) of the second base portion (284) is exposed from the second signal opening (574) as the second signal terminal portion (T24), as described in Appendix 5 (A10, A11, A20, A21, A40, A50, A60 to A62, A70, A80).Note 5-2. The semiconductor module (A30) described in Note 5, wherein the second metal layer (224) has a main surface (224a) that faces the same direction as the main surface (11a) of the first element in the thickness direction (z), and a part of the main surface (224a) of the second metal layer (224) is exposed from the second signal opening (574) as the second signal terminal portion (T24). Note 6. The sealing portion (5) has a third signal opening (571) formed on the top surface (51), the first conductive portion (L1) includes a third signal terminal portion (T21) that is conductive to the first electrode (111) and exposed from the third signal opening (571), and the first conductive portion (L1) includes a third metal layer (221) that is conductive to the first electrode (111), as described in Appendix 4 or Appendix 5 (A10, A11, A20, A21, A30, A40, A50, A60 to A62, A70, A80). Appendix 6-1. The first conductive portion (L1) includes a third metallic base portion (281) electrically bonded to the third metal layer (221), the third base portion (281) has a main surface (281a) that faces the same direction as the first element main surface (11a) in the thickness direction (z), and a part of the main surface (281a) of the third base portion (281) is exposed from the third signal opening (571) as the third signal terminal portion (T21), as described in Appendix 6 (A10, A11, A20, A21, A40, A50, A60 to A62, A70, A80). Appendix 6-2. The semiconductor module (A30) described in Appendix 6, wherein the third metal layer (221) has a main surface (221a) that faces the same direction as the main surface (11a) of the first element with respect to the thickness direction (z), and a part of the main surface (221a) of the third metal layer (221) is exposed from the third signal opening (571) as the third signal terminal portion (T21). Appendix 7. The semiconductor module (A10, A11, A20, A21, A30, A40, A50, A60 to A62, A70, A80) described in Appendix 6, wherein at least one first semiconductor element (11) is conductively bonded to the third metal layer (221).Note 8. The semiconductor module (A10, A11, A20, A21, A30, A40, A50, A60 to A62, A70, A80) according to any one of Notes 4 to 7, wherein the first conductive portion (L1) includes a first signal substrate (24) electrically connected between the third electrode (113) and the first metal layer (223). Note 8-1. The semiconductor module (A10, A11, A20, A21, A30, A40, A50, A60 to A62, A70, A80) according to Note 8, wherein the first signal substrate (24) is located on the opposite side of the first metal layer (223) with respect to the thickness direction (z) from the side where the insulating substrate (21) is located. Note 9. The semiconductor module (A10, A11, A20, A21, A30, A50, A60 to A62, A70, A80) described in Appendix 8, wherein the first conductive portion (L1) includes a second signal substrate (25) separated from the first signal substrate (24), the first signal substrate (24) is electrically connected between the third electrode (113) and the second signal substrate (25), and the second signal substrate (25) is electrically connected between the first signal substrate (24) and the first metal layer (223). Appendix 9-1. The semiconductor module (A10, A11, A20, A21, A30, A50, A60 to A62, A70, A80) described in Appendix 9, wherein the second signal substrate (25) is located on the opposite side of the first metal layer (223) with respect to the thickness direction (z) from the side where the insulating substrate (21) is located. Note 9-2. The semiconductor module (A10, A11, A20, A21, A30, A50, A60 to A62, A70, A80) described in Note 9 or Note 9-1, wherein the first signal substrate (24) and the second signal substrate (25) extend in different directions when viewed in the thickness direction (z). Note 10. The semiconductor module (A10, A11, A20, A21, A30, A40, A50, A60 to A62, A70, A80) described in any one of Notes 1 to 9, wherein the at least one first semiconductor element (11) comprises a plurality of first semiconductor elements (11), and the plurality of first semiconductor elements (11) are electrically connected in parallel with each other.Note 11. The semiconductor module (A10, A11, A20, A21, A30, A40, A50, A60 to A62, A70, A80) according to any one of Notes 1 to 10, further comprising at least one second semiconductor element (12) having a second main surface (12a) facing the same direction as the first main surface (11a) in the thickness direction (z) and a second back surface (12b) facing the same direction as the back surface (11b) of the first element in the thickness direction (z), wherein the second semiconductor element (12) is covered by the sealing portion (5) and electrically connected in series with the at least one first semiconductor element (11). Note 12. The semiconductor module (A10, A11, A20, A21, A30, A40, A50, A60 to A62, A70, A80) described in Appendix 11 further comprises a second conductive portion (L2) on which at least one second semiconductor element (12) is mounted, the sealing portion (5) has a fourth signal opening (575) formed on the top surface (51), and the second conductive portion (L2) includes a fourth signal terminal portion (T25) that is electrically connected to the at least one second semiconductor element (12) and exposed from the fourth signal opening (575). Appendix 12-1. The second conductive portion (L2) includes a fourth metal layer (225) bonded to the main surface (21a) of the substrate and a fourth metallic base portion (285) electrically bonded to the fourth metal layer (225), wherein the fourth base portion (285) has a main surface (285a) that faces the same direction as the second element main surface (12a) in the thickness direction (z), and a part of the main surface (285a) of the fourth base portion (285) is exposed from the fourth signal opening (575) as the fourth signal terminal portion (T25), as described in Appendix 12 (A10, A11, A20, A21, A40, A50, A60 to A62, A70, A80).Note 12-2. The semiconductor module (A30) described in Note 12, wherein the second conductive portion (L2) includes a fourth metal layer (225) bonded to the substrate main surface (21a), the fourth metal layer (225) has a main surface (225a) that faces the same direction as the second element main surface (12a) in the thickness direction (z), and a part of the main surface (225a) of the fourth metal layer (225) is exposed from the fourth signal opening (575) as the fourth signal terminal portion (T25). Note 12-3. The semiconductor module described in Appendix 12-1 or Appendix 12-2 (A10, A11, A20, A21, A30, A40, A50, A60 to A62, A70, A80), wherein the at least one second semiconductor element (12) has a fourth electrode (121), a fifth electrode (122), and a sixth electrode (123), and in response to a second drive signal input to the sixth electrode (123), the state in which current flows from the fourth electrode (121) to the fifth electrode (122) switches between a state in which the current is interrupted and the fourth metal layer (225) is conductive to the sixth electrode (123). Appendix 12-4. The sealing portion (5) has a fifth signal opening (576) formed on the top surface (51), the second conductive portion (L2) includes a fifth signal terminal portion (T26) that is exposed from the fifth signal opening (576) while being conductive to the fifth electrode (122), and the second conductive portion (L2) includes a fifth metal layer (226) that is bonded to the main surface (21a) of the substrate and is conductive to the fifth electrode (122), as described in Appendix 12-3 (A10, A11, A20, A21, A30, A40, A50, A60 to A62, A70, A80). Appendix 12-5. The second conductive portion (L2) includes a metal fifth base portion (286) electrically bonded to the fifth metal layer (226), the fifth base portion (286) has a main surface (286a) that faces the same direction as the second element main surface (12a) in the thickness direction (z), and a part of the main surface (286a) of the fifth base portion (286) is exposed from the fifth signal opening (576) as the fifth signal terminal portion (T26), as described in Appendix 12-4 (A10, A11, A20, A21, A40, A50, A60 to A62, A70, A80).Note 12-6. The semiconductor module (A30) described in Note 12-4, wherein the fifth metal layer (226) has a main surface (226a) that faces the same direction as the second element main surface (12a) in the thickness direction (z), and a part of the main surface (226a) of the fifth metal layer (226) is exposed from the fifth signal opening (576) as the fifth signal terminal portion (T26). Note 12-7. The sealing portion (5) has a sixth signal opening (572) formed on the top surface (51), the second conductive portion (L2) includes a sixth signal terminal portion (T22) that is conductive to the fourth electrode (121) and exposed from the sixth signal opening (572), and the second conductive portion (L2) includes a sixth metal layer (222) that is conductive to the fourth electrode (121), as described in any of Appendix 12-3 to Appendix 12-6 (A10, A11, A20, A21, A30, A40, A50, A60 to A62, A70, A80). Appendix 12-8. The second conductive portion (L2) includes a metal sixth base portion (282) electrically bonded to the sixth metal layer (222), the sixth base portion (282) has a main surface (282a) that faces the same direction as the second element main surface (12a) in the thickness direction (z), and a part of the main surface (282a) of the sixth base portion (282) is exposed from the sixth signal opening (572) as the sixth signal terminal portion (T22), as described in Appendix 12-7 (A10, A11, A20, A21, A40, A50, A60 to A62, A70, A80). Appendix 12-9. The semiconductor module (A30) according to Appendix 12-7, wherein the sixth metal layer (222) has a main surface (222a) that faces the same direction as the main surface (12a) of the second element with respect to the thickness direction (z), and a part of the main surface (222a) of the sixth metal layer (222) is exposed from the sixth signal opening (572) as the sixth signal terminal portion (T22). Appendix 12-10. The semiconductor module (A10, A11, A20, A21, A30, A40, A50, A60 to A62, A70, A80) according to any one of Appendix 12-7 to Appendix 12-9, wherein at least one second semiconductor element (12) is conductively bonded to the sixth metal layer (222).Note 12-11. The semiconductor module (A10, A11, A20, A21, A30, A40, A50, A60 to A62, A70, A80) according to any one of Notes 12-3 to 12-10, wherein the second conductive portion (L2) includes a third signal substrate (26) electrically connected between the sixth electrode (123) and the fourth metal layer (225). Note 12-12. The semiconductor module (A10, A11, A20, A21, A30, A40, A50, A60 to A62, A70, A80) according to Note 12-11, wherein the third signal substrate (26) is located on the opposite side of the fourth metal layer (225) with respect to the thickness direction (z) from the side where the insulating substrate (21) is located. Note 12-13. The semiconductor module (A10, A11, A20, A21, A30, A50, A60-A62, A70, A80) described in Appendix 12-11 or Appendix 12-12, wherein the second conductive portion (L2) includes a fourth signal substrate (27) separated from the third signal substrate (26), the third signal substrate (26) is electrically connected between the sixth electrode (123) and the fourth signal substrate (27), and the fourth signal substrate (27) is electrically connected between the third signal substrate (26) and the fourth metal layer (225). Appendix 12-14. The fourth signal substrate (27) is a semiconductor module (A10, A11, A20, A21, A30, A50, A60 to A62, A70, A80) as described in Appendix 12-13, located on the opposite side of the fourth metal layer (225) from the side where the insulating substrate (21) is located, with respect to the thickness direction (z). Appendix 12-15. The third signal substrate (26) and the fourth signal substrate (27) are semiconductor modules (A10, A11, A20, A21, A30, A50, A60 to A62, A70, A80) as described in Appendix 12-13 or Appendix 12-14, extending in different directions from each other when viewed in the thickness direction (z). Appendix 13. The semiconductor module (A10, A11, A20, A21, A30, A40, A50, A60 to A62, A70, A80) described in Appendix 11 or Appendix 12 comprises a plurality of second semiconductor elements (12), wherein the plurality of second semiconductor elements (12) are electrically connected in parallel with one another.Note 14. A semiconductor module according to any one of Notes 11 to 13 (A10, A11, A20, A21, A30, A40, A50, A60 to A62, A70, A80), further comprising at least one power terminal portion (T11 to T13) each which is conductive to at least one of the at least one first semiconductor element (11) and the second semiconductor element (12). Note 15. A semiconductor module according to Note 14 (A10, A11, A20, A21, A30, A40, A50, A60, A61, A70, A80), wherein the sealing portion (5) includes at least one power opening (561 to 563) formed on the top surface (51), and the at least one power terminal portion (T11 to T13) is individually exposed from the at least one power opening (561 to 563). Note 16. The semiconductor module (A10, A11, A20, A21, A30, A40, A50, A60, A70, A80) according to Note 15, further comprising at least one power terminal member (34-36) each individually containing at least one power terminal portion (T11-T13), wherein the sealing portion (5) has a first side surface (531) and a second side surface (532) facing opposite directions with respect to a first direction (y) perpendicular to the thickness direction (z), and each of the at least one power terminal member (34-36) includes a projection protruding from either the first side surface (531) or the second side surface (532). Note 16-1. The semiconductor module (A10, A11, A20, A21, A30, A40, A50, A60-A62, A70, A80) described in any of Appendix 14 to Appendix 16, wherein the at least one power terminal portion (T11-T13) includes a first power terminal portion (T11) and a second power terminal portion (T12) that are individually conductive to both ends of the series circuit of the at least one first semiconductor element (11) and the second semiconductor element (12), and a third power terminal portion (T13) that is conductive to the connection point between the at least one first semiconductor element (11) and the second semiconductor element (12) in the series circuit.Note 17. The semiconductor module (A10, A20, A21, A30, A40, A50, A60-A62, A70) according to any one of Notes 1 to 16, further comprising a signal terminal member (63) electrically connected to the first signal terminal portion (T23) from outside the sealing portion (5). Note 18. The semiconductor module (A10, A20, A21, A30, A40, A50, A60-A62, A70) according to Note 17, wherein the signal terminal member (63) includes a metal pin (602) extending in the thickness direction (z). Note 19. The semiconductor module (A10, A11, A20, A21, A30, A40, A50, A60-A62, A70, A80) described in any of Appendix 1 to Appendix 18 further comprises a back metal layer (23) bonded to the insulating substrate (21), the insulating substrate (21) having a back surface (21b) facing away from the main substrate surface (21a) in the thickness direction (z), the back metal layer (23) being bonded to the back surface (21b), the sealing portion (5) having a bottom surface (52) facing away from the top surface (51) in the thickness direction (z), and the back metal layer (23) being exposed from the bottom surface (52). Appendix 20. The at least one first semiconductor element (11) is a semiconductor module (A10, A11, A20, A21, A30, A40, A50, A60-A62, A70, A80) according to any one of the appendices 1 to 19, including a semiconductor substrate. Appendix 20-1. The semiconductor module (A10, A11, A20, A21, A30, A40, A50, A60-A62, A70, A80) according to appendice 20, including the semiconductor substrate, silicon, a wide-bandgap semiconductor with a wider bandgap than silicon (e.g., silicon carbide or gallium nitride), or an ultra-wide-bandgap semiconductor with a wider bandgap than a wide-bandgap semiconductor (e.g., gallium oxide, diamond, aluminum nitride).Note 21. A power conversion unit (U10) further comprising a semiconductor module (A10, A11, A20, A21, A30, A40, A50, A60-A62, A70, A80) described in any of Notes 1 to 20, and a control board (E1) for controlling the semiconductor module (A10, A11, A20, A21, A30, A40, A50, A60-A62, A70, A80). Note 22. A vehicle (F1) comprising a semiconductor module (A10, A11, A20, A21, A30, A40, A50, A60-A62, A70, A80) as described in any of Appendix 1 to Appendix 21, and a drive source F132, wherein the semiconductor module (A10, A11, A20, A21, A30, A40, A50, A60-A62, A70, A80) is electrically connected to the drive source (F132).

[0225] A10, A11, A20, A21, A30, A40, A50, A60-A62, A70, A80: Semiconductor module, C1: Heat dissipation member, E1: Control board, F1: Vehicle, F11: On-board charger, F12: Storage battery, F13: Drive system, F131: Inverter, F132: Drive source, L1, L2: Conductive part, T11-T13: Power terminal part, T21-T26: Signal terminal part, U10: Power conversion unit, 11, 12: Semiconductor element, 11a, 12a: Main surface of element, 11b, 12b: Back surface of element, 111, 121: Back surface electrode, 112, 1 22: Main surface electrode, 1121, 1221: Power pad, 1122, 1222: Signal pad, 113, 123: Main surface electrode, 119, 129: Conductive bonding layer, 20: Support member, 21: Insulating substrate, 21a: Main surface of substrate, 21b: Back surface of substrate, 221-228: Metal layer, 221a, 222a, 223a, 224a, 225a, 226a: Main surface, 2211, 2221: Main part, 2212, 2213, 2222, 2223: Extended part, 23: Back surface metal layer, 23b: Bottom surface, 24, 25, 26, 27: Signal substrate, 241, 251, 261, 271: Insulating layer, 242, 252, 262, 272: Wiring layer, 243, 253, 263, 273: Wiring layer, 244, 254, 264, 275: Metal layer, 281-286: Base part, 281a, 282a, 283a, 284a, 285a, 286a: Main surface, 31: Conductive member, 310: Main body part, 311, 312: Joint part, 319: Conductive bonding layer, 32: Conductive member, 320: Main body part, 321, 322: Joint part, 324, 325: Connecting part, 329: Conductive bonding layer, 34: Terminal member, 35: Terminal member, 36: Terminal member, 34 1, 351, 361: Pad portion, 341a, 351a, 361a: Main surface, 342, 352, 362: Joint portion, 343, 353, 363: Extension portion, 343a, 353a, 363a: Protruding portion, 354, 364: Conductive portion, 354a, 364a: Main surface, 411-413, 421-423, 431-433, 441-443: Connecting member, 5: Sealing portion, 51: Top surface, 52: Bottom surface, 531-534: Side surface, 54: Convex portion, 55: Recess, 561-563: Power opening, 570-576: Signal opening, 58: Intermediate surface, 59: Recess, 6,61-66: Terminal members, 601: Sleeve, 602: Metal pin, 6021: Bulge, 71: Main body, 71a: Main surface of main body, 71b: Back surface of main body, 73: Heat dissipation part, 80: Bonding layer, 82: Base part, 91: Base material, 911: Through hole, 92: Main wiring, 93: Back wiring, 94: Internal wiring,

Claims

1. A semiconductor module comprising: at least one first semiconductor element having a first element main surface and a first element back surface facing opposite directions in the thickness direction; a sealing portion covering the at least one first semiconductor element; an insulating substrate having a substrate main surface facing the back surface of the first element in the thickness direction; and a first conductive portion disposed on the substrate main surface and on which the at least one first semiconductor element is mounted, wherein the sealing portion has a top surface facing the same direction as the first element main surface in the thickness direction, and a first signal opening formed on the top surface; and the first conductive portion includes a first signal terminal portion that is electrically connected to the at least one first semiconductor element and exposed from the first signal opening.

2. The semiconductor module according to claim 1, wherein the first conductive portion includes a first metal layer bonded to the main surface of the substrate and a first metal base portion electrically bonded to the first metal layer, the first base portion has a main surface that faces the same direction as the main surface of the first element in the thickness direction, and a part of the main surface of the first base portion is exposed from the first signal opening as the first signal terminal portion.

3. The semiconductor module according to claim 1, wherein the first conductive portion includes a first metal layer bonded to the main surface of the substrate, the first metal layer has a main surface that faces the same direction as the main surface of the first element in the thickness direction, and a part of the main surface of the first metal layer is exposed from the first signal opening as the first signal terminal portion.

4. The semiconductor module according to claim 2 or 3, wherein the at least one first semiconductor element has a first electrode, a second electrode, and a third electrode, and in response to a first drive signal input to the third electrode, the state in which current flows from the first electrode to the second electrode and the state in which the current is interrupted switches, and the first metal layer is conductive to the third electrode.

5. The semiconductor module according to claim 4, wherein the sealing portion has a second signal opening formed on the top surface, the first conductive portion includes a second signal terminal portion that is electrically connected to the second electrode and exposed from the second signal opening, and the first conductive portion includes a second metal layer that is bonded to the main surface of the substrate and is electrically connected to the second electrode.

6. The semiconductor module according to claim 4 or 5, wherein the sealing portion has a third signal opening formed on the top surface, the first conductive portion includes a third signal terminal portion that is conductive to the first electrode and exposed from the third signal opening, and the first conductive portion includes a third metal layer that is conductive to the first electrode.

7. The semiconductor module according to claim 6, wherein at least one first semiconductor element is electrically bonded to the third metal layer.

8. The semiconductor module according to any one of claims 4 to 7, wherein the first conductive portion includes a first signal substrate electrically connected between the third electrode and the first metal layer.

9. The semiconductor module according to claim 8, wherein the first conductive portion includes a second signal substrate separated from the first signal substrate, the first signal substrate is electrically connected between the third electrode and the second signal substrate, and the second signal substrate is electrically connected between the first signal substrate and the first metal layer.

10. The semiconductor module according to any one of claims 1 to 9, wherein the at least one first semiconductor element comprises a plurality of first semiconductor elements, and the plurality of first semiconductor elements are electrically connected in parallel with one another.

11. The semiconductor module according to any one of claims 1 to 10, further comprising at least one second semiconductor element having a second main surface facing the same direction as the first main surface in the thickness direction and a second back surface facing the same direction as the back surface of the first element in the thickness direction, wherein the at least one second semiconductor element is electrically connected in series with the first semiconductor element while being covered by the sealing portion.

12. The semiconductor module according to claim 11, further comprising a second conductive portion disposed on the main surface of the substrate and on which at least one second semiconductor element is mounted, wherein the sealing portion has a fourth signal opening formed on the top surface, and the second conductive portion includes a fourth signal terminal portion that is electrically connected to the at least one second semiconductor element and is exposed from the fourth signal opening.

13. The semiconductor module according to claim 11 or claim 12, wherein the at least one second semiconductor element comprises a plurality of second semiconductor elements, and the plurality of second semiconductor elements are electrically connected in parallel with one another.

14. The semiconductor module according to any one of claims 11 to 13, further comprising at least one power terminal portion, each of which conducts to at least one of the at least one first semiconductor element and at least one second semiconductor element.

15. The semiconductor module according to claim 14, wherein the sealing portion includes at least one power opening formed on the top surface, and the at least one power terminal portion is individually exposed from the at least one power opening.

16. The semiconductor module according to claim 15, further comprising at least one power terminal member, each individually including the at least one power terminal portion, wherein the sealing portion has a first side surface and a second side surface facing opposite directions to each other in a first direction perpendicular to the thickness direction, and each of the at least one power terminal member includes a projection protruding from either the first side surface or the second side surface.

17. The semiconductor module according to any one of claims 1 to 16, further comprising a signal terminal member electrically connected to the first signal terminal portion from outside the sealing portion.

18. The semiconductor module according to claim 17, wherein the signal terminal member includes a metal pin extending in the thickness direction.

19. A semiconductor module according to any one of claims 1 to 18, further comprising a back metal layer bonded to the insulating substrate, wherein the insulating substrate has a back surface facing away from the main surface of the substrate in the thickness direction, the back metal layer is bonded to the back surface of the substrate, the sealing portion has a bottom surface facing away from the top surface in the thickness direction, and the back metal layer is exposed from the bottom surface.

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