Multilayer ceramic capacitor

Abstract

Provided is a multilayer ceramic capacitor in which short-circuiting of an external electrode is prevented. In a multilayer ceramic capacitor 1 according to the present invention, a laminate 2 has: an inner layer part 6 in which a first internal electrode layer 5A, a second internal electrode layer 5B, and an internal dielectric layer 4 are alternately laminated; and a first side gap part disposed between the inner layer part 6 and a first lateral surface. The first side gap part 70 has a ceramic grain diameter smaller than the ceramic grain diameter of the inner dielectric layer 4. The first lateral surface B1 or second lateral surface B2 that is not covered with a first external electrode 3A or second external electrode 3B has a ceramic grain diameter of 200 nm or less. In a cross-section passing through the length direction and the width direction, the angle formed between a line tangent to the longitudinal end of a first resin electrode 32A or second resin electrode 32B, and the first lateral surface or second lateral surface is 20° or less.

Description

Multilayer Ceramic Capacitor

[0001] The present invention relates to a multilayer ceramic capacitor.

[0002] Conventionally, in multilayer ceramic capacitors, external electrodes including resin electrodes have been developed to improve mechanical strength (see Patent Document 1). Such resin electrodes contain metals that easily dissolve in water to form ions, such as Ag and Cu.

[0003] Japanese Patent Application Laid-Open No. 2024-83200

[0004] In a multilayer ceramic capacitor including such a resin electrode, when the surface absorbs moisture under high-humidity conditions, metals that easily dissolve in water to form ions in the resin electrode elute, and a phenomenon called ion migration, in which metal ions precipitate on the ceramic surface of the multilayer ceramic capacitor when a voltage is applied, may occur. When such ion migration occurs, the two external electrodes may be electrically connected to cause a short circuit.

[0005] An object of the present invention is to provide a multilayer ceramic capacitor in which short-circuiting of external electrodes is prevented.

[0006] To solve the above problems, the present invention provides a laminate having a first main surface and a second main surface facing each other in the stacking direction, a first side surface and a second side surface facing each other in the width direction intersecting the stacking direction, and a first end surface and a second end surface facing each other in the length direction intersecting the stacking direction and the width direction; a first external electrode provided on the first end surface; and a second external electrode provided on the second end surface, wherein the first external electrode includes a first resin electrode containing a resin component, and the second external electrode includes a second resin electrode containing a resin component, and the laminate is made up of a first internal electrode layer, a second internal electrode layer and an internal dielectric layer alternately stacked. The present invention provides a multilayer ceramic capacitor having an inner layer and a first side gap portion disposed between the inner layer and the first side surface, wherein the particle size of the ceramic in the first side gap portion is smaller than the particle size of the ceramic in the inner dielectric layer, the particle size of the ceramic on the first or second side surface not covered by the first and second external electrodes is 200 nm or less, and the angle between the tangent at the longitudinal end of the first or second resin electrode and the first or second side surface in a cross section passing through the longitudinal and width directions is 20° or less.

[0007] According to the present invention, it is possible to provide a multilayer ceramic capacitor in which short circuits of the external electrodes are prevented.

[0008] This is a perspective view of a multilayer ceramic capacitor 1 according to the first embodiment. This is a cross-sectional view of the multilayer ceramic capacitor 1 along the line II-II in Figure 1. This is a cross-sectional view of the multilayer ceramic capacitor 1 along the line III-III in Figure 1. This is a cross-sectional view of the multilayer ceramic capacitor 1 passing through the length direction L and the width direction W along the line IV-IV shown in Figures 1 and 2. This is an enlarged view of region S in Figure 3. This is a flowchart showing an example of a method for manufacturing the multilayer ceramic capacitor 1. This is an enlarged view of region S in Figure 3 in the multilayer ceramic capacitor 1 according to the second embodiment. This is an enlarged view of region S in Figure 3 in the multilayer ceramic capacitor 1 according to the third embodiment.

[0009] (First Embodiment) A first embodiment of the present invention will be described below. Figure 1 is a perspective view of a multilayer ceramic capacitor 1 according to the first embodiment. Figure 2 is a cross-sectional view of the multilayer ceramic capacitor 1 along the line II-II in Figure 1. Figure 3 is a cross-sectional view of the multilayer ceramic capacitor 1 along the line III-III in Figure 1. Figure 4 is a cross-sectional view of the multilayer ceramic capacitor 1 along the line IV-IV shown in Figures 1 and 2. The multilayer ceramic capacitor 1 comprises a laminate 2 and a pair of external electrodes 3 provided at both ends of the laminate 2.

[0010] The laminate 2 comprises an inner layer portion (effective portion) 6 and an inactive portion 7. The inner layer portion 6 is a region in which internal electrode layers 5 (first internal electrode layer 5A and second internal electrode layer 5B) and internal dielectric layers 4 are alternately laminated. The inactive portion 7 is a region in which internal electrode layers 5 are not arranged and comprises an outer layer portion 7A that sandwiches the inner layer portion 6 from the lamination direction T and a side gap portion 70 that sandwiches the inner layer portion 6 from the width direction W. The side gap portion 70 comprises a first side gap and a second side gap, but from now on, unless it is necessary to explain them separately, they will be described as the side gap portion 70.

[0011] In the following description, the orientation of the multilayer ceramic capacitor 1 is expressed as follows: the direction in which the internal electrode layer 5 and the internal dielectric layer 4 are stacked is referred to as the stacking direction T. The direction intersecting the stacking direction T and on which the pair of external electrodes 3 are provided is referred to as the length direction L. The direction intersecting both the length direction L and the stacking direction T is referred to as the width direction W. In this embodiment, the length direction L, the width direction W, and the stacking direction T are orthogonal to each other.

[0012] (Laminate 2) Laminate 2 has two main surfaces A facing the lamination direction T, two end surfaces C facing the length direction L, and two side surfaces B facing the width direction W. The two main surfaces A include a first main surface A1 and a second main surface A2, the two end surfaces C include a first end surface C1 and a second end surface C2, and the two side surfaces B include a first side surface B1 and a second side surface B2.

[0013] On the LW surface passing through the length direction L and the width direction W, the side surface B is formed by an approximate curve or approximate straight line passing through five points: the midpoint P0 in the length direction L of the laminate 2, the ends P1 and P2 in the length direction L of the external electrode 3, and the ends P3 and P4 in the width direction W of the end faces C1 and C2, when the laminate 2 is polished along the LW surface to expose the LW cross-section as shown in Figure 4.

[0014] On the WT surface passing through the width direction W and the lamination direction T, the side surface B is formed by an approximate curve or approximate straight line passing through five points: the midpoint Q0 of the lamination direction T of the lamination body 2, the ends Q1 and Q2 of the inner layer portion 6 in the lamination direction T, and the ends Q3 and Q4 of the main surfaces A1 and A2 in the width direction W, when the laminate 2 is polished along the WT surface to expose the WT cross section as shown in Figure 3.

[0015] In this embodiment, it is preferable that the edge portion R1 between two adjacent faces of the laminate 2 has a rounded radius. This helps to suppress chipping at the angular parts of the laminate 2. In the definition of the side surface B above, the flat portion that does not include the edge portion R1 is defined as the end face C and the main face A.

[0016] (Internal dielectric layer 4) The internal dielectric layer 4 is made of BaTiO as a ceramic. ３ The main component is barium titanate, and at least one of Dy, Si, Mg, Mn, Sn, Cu, rare earth elements, Ni, and Al is included as a minor component. The grain size of the ceramic in the internal dielectric layer 4 is preferably 100 nm to 200 nm. Hereinafter, grain size refers to D50, the median diameter. To determine the grain size D50, the sample was heat-treated at 1000°C to expose an arbitrary cross-section and clarify the boundaries (grain boundaries) between ceramic grains. Each ceramic grain was extracted from the SEM image obtained when each region was observed at 20,000x magnification using an SEM, and the area of ​​the inner portion of the grain boundary of each ceramic grain was determined to calculate the equivalent circular diameter, from which the grain D50 diameter was calculated.

[0017] (Internal electrode layer 5) The internal electrode layer 5 comprises a first internal electrode layer 5A exposed on the first end face C1 and a second internal electrode layer 5B exposed on the second end face C2.

[0018] As shown in Figure 2, the internal electrode layer 5 includes opposing portions 52 that face each other between the first internal electrode layer 5A and the second internal electrode layer 5B, and leading portions 51 that do not face each other between the first internal electrode layer 5A and the second internal electrode layer 5B, but are drawn out from the opposing portions 52 toward one of the first end faces C1 or the second end face C2. The direction in which the leading portions 51 extend differs between the first internal electrode layer 5A and the second internal electrode layer 5B, with the leading portions being drawn toward the first end face C1 side and the second end face C2 side.

[0019] The ends of the lead-out portions 51 of the first internal electrode layer 5A are exposed to the first end face C1 and electrically connected to the first external electrode 3A. The ends of the lead-out portions 51 of the second internal electrode layer 5B are exposed to the second end face C2 and electrically connected to the second external electrode 3B. Charge is accumulated between the opposing portions 52 of the first internal electrode layer 5A and the second internal electrode layer 5B that are adjacent in the stacking direction T, and they function as a capacitor.

[0020] (Length-direction step absorption region 76) As shown in Figure 2, in the laminate 2, when viewed in the stacking direction T, the region where the lead portion 51 is located has half the number of internal electrode layers 5 compared to the region where the opposing portion 52 is located. Therefore, compared to the region where the opposing portion 52 is located, the thickness in the stacking direction T of the region where the lead portion 51 is located is thinner by the thickness of the internal electrode layer 5 in the stacking direction T, and a step is formed between the two regions.

[0021] In the embodiment, in order to absorb the step, a longitudinal step absorption region 76 is arranged between the first internal electrode layer 5A and the end face C2 of the first internal electrode layer 5A that is not connected to the external electrode 3B, and between the second internal electrode layer 5B and the end face C1 of the second internal electrode layer 5B that is not connected to the external electrode 3A.

[0022] (Region of the internal electrode layer 5) As shown in Figure 3, the internal electrode layer 5 has two widthwise end regions W1 that extend from each of the two ends of the widthwise direction W toward the center of the widthwise direction W to a range of 40 μm, two widthwise intermediate regions W2 that extend from each of the two widthwise end regions W1 toward the center of the widthwise direction W to a range of another 40 μm, and a widthwise central region W3 that is provided between the two widthwise intermediate regions W2.

[0023] In other words, the first internal electrode layer 5A has two first widthwise end regions W1 positioned at the end of the widthwise direction W on the first side surface B1 side and at a position extending 40 μm toward the center of the widthwise direction W from the end of the widthwise direction W on the second side surface B2 side, one first widthwise central region W3 positioned between a position 80 μm from the end of the widthwise direction W on the first side surface B1 side and a position 80 μm from the end of the widthwise direction W on the second side surface B2 side, and two first widthwise intermediate regions W2 positioned between the first widthwise end regions W1 and the first widthwise central regions W3.

[0024] Similarly, the second internal electrode layer 5B includes two first widthwise end regions W1 positioned at the end of the widthwise direction W on the first side surface B1 side and 40 μm from the end of the widthwise direction W on the second side surface B2 towards the center of the widthwise direction W, one second widthwise central region W3 positioned between a position 80 μm from the end of the widthwise direction W on the first side surface B1 side and a position 80 μm from the end of the widthwise direction W on the second side surface B2 side, and two second widthwise intermediate regions W2 positioned between the first widthwise end regions W1 and the second widthwise central regions W3.

[0025] (Coverage w) The internal electrode layer 5 includes a void where no metal is present. In this specification, the proportion of the internal electrode layer 5 occupied by metal is defined as coverage w. Specifically, within a predetermined dimension WA (not shown) in the width direction W of the internal electrode layer 5, the dimension WB (not shown) in the width direction W where metal is substantially observed is determined. Note that WB is the remaining dimension obtained by subtracting the dimension of the area in the internal electrode layer 5 where no metal is observed from dimension WA. Then, WB / WA is the coverage w of the internal electrode layer 5.

[0026] The coverage w can be measured in the following way. First, the laminate 2 is polished to expose the WT cross section, which extends in the width direction W and the lamination direction T at the center of the length direction L, as shown in Figure 3.

[0027] Next, using an optical microscope or the like, the exposed WT cross section is observed, and the widthwise dimension WB (the remaining length after subtracting the length of the region where the metal of the internal electrode layer is not observed from the whole) is determined for each of the widthwise end region W1, widthwise intermediate region W2, and widthwise central region W3 of the internal electrode layer 5, within the range of a predetermined widthwise dimension W WA.

[0028] Then, the coverage w, or WB / WA, in each domain is calculated.

[0029] In the internal electrode layer 5, let w1 be the coverage of the widthwise end region W1, w2 be the coverage of the widthwise intermediate region W2, and w3 be the coverage of the widthwise central region W3. Here, in at least one internal electrode layer 5, 0.80 ≤ w1 / w3 ≤ 0.95. Also, in at least one internal electrode layer 5, 1.00 ≤ w2 / w3 ≤ 1.20.

[0030] When the conductive paste used to form the internal electrode layer is applied, the peripheral areas may be thinner than the central areas. The thinner peripheral areas will have lower coverage after firing, making it more likely that electrode breaks will occur. In that case, when a voltage is applied to the multilayer ceramic capacitor, the electric field will concentrate not at the end of the internal electrode layer in the width direction W, which includes the electrode break, but closer to the center in the width direction W, at the very edge of the continuous portion of the internal electrode layer, which may cause a decrease in reliability.

[0031] However, according to this embodiment, 1.00 ≤ w2 / w3, i.e., w3 ≤ w2. As a result, the resistance value in the intermediate region W2 in the width direction, which was more prone to electric field concentration than the central region W3 in the width direction, becomes lower, and electric field concentration can be suppressed.

[0032] (Outer layer 7A) The outer layer 7A is positioned on the first main surface A1 side and the second main surface A2 side of the inner layer 6, respectively, so as to sandwich the inner layer 6 in the stacking direction T.

[0033] (Side gap portion 70) Figure 5 is an enlarged view of region S in Figure 3. As shown in Figures 3 and 5, a side gap portion 70 is provided in the region from the end in the width direction W of the first internal electrode layer 5A and the second internal electrode layer 5B to the first side surface B1 or the second side surface B2.

[0034] (Step absorption region) The side gap portion 70 comprises a widthwise step absorption region 75 from the widthwise end of the internal electrode layer 5 to the side surface B, and a widthwise non-step region 74 connected to the internal dielectric layer 4.

[0035] (Width-direction step absorption region 75) The internal electrode layer 5 is not located in the side gap portion 70. Therefore, compared to the inner layer portion 6 in which the internal electrode layer 5 and the internal dielectric layer 4 are stacked, the thickness of the side gap portion 70 in the stacking direction T is reduced by the amount of the internal electrode layer 5, and a step is formed between the inner layer portion 6 and the side gap portion 70. In this embodiment, in order to absorb this step, a width-direction step absorption region 75 is located between the internal dielectric layers 4 that are adjacent to each other in the stacking direction T.

[0036] As mentioned above, the conductive paste used to form the internal electrode layer 5 may be thinner in the peripheral areas than in the central area when applied. Therefore, the widthwise end region W1 may be thinner than the widthwise intermediate region W2. However, since some of the material from the widthwise step absorption region 75 flows into one side of the thinned widthwise end region W1 in the lamination direction T, the reduction in thickness in the lamination direction T in the widthwise end region W1 is also mitigated.

[0037] The widthwise step absorption region 75 and the inflow of the material from the widthwise step absorption region 75 into the widthwise end region W1 eliminate the step between the inner layer 6 and the side gap 70, thereby suppressing excessive curvature on the side B side of the laminate 2. Therefore, as shown in Figure 3, the dimension T1 in the widthwise direction T at the end of two adjacent internal electrode layers 5 in the widthwise direction T satisfies the relationship T1 > T2 with respect to the dimension T2 in the widthwise direction T at the center of the widthwise direction W.

[0038] Thus, the internal electrode layer 5 of the multilayer ceramic capacitor 1 in this embodiment is not significantly curved at its ends in the width direction W. Therefore, defects such as short circuits at the ends in the width direction W of the internal electrode layer 5 are suppressed.

[0039] Furthermore, as shown in Figure 2, in the multilayer ceramic capacitor 1 of the embodiment, the dimension T3 in the stacking direction T between the internal electrode layers 5 in the opposing portion 52 has the relationship T4 > 2 × T3 with respect to the dimension T4 in the stacking direction T between the internal dielectric layers 4 in the lead portion 51.

[0040] This is because, as described above, the lead portion 51 includes a longitudinal step absorption region 76, eliminating the step between the region where the lead portion 51 is located and the region where the opposing portion 52 is located, thereby suppressing excessive curvature of the internal electrode layer 5 in the laminate 2. Thus, the internal electrode layer 5 of the multilayer ceramic capacitor 1 in this embodiment is not excessively curved even at its ends in the longitudinal direction L. Therefore, defects such as short circuits at the ends in the longitudinal direction L of the internal electrode layer 5 are suppressed.

[0041] (Types and concentrations of subcomponents in the side gap portion 70) The side gap portion 70 (widthwise step absorption region 75 and widthwise non-step region 74) is made of BaTiO, similar to the internal dielectric layer 4. ３ It mainly consists of barium titanate and contains at least one of Dy, Si, Mg, Mn, Sn, Cu, rare earth elements, Ni, and Al as a minor component.

[0042] The particle size of the ceramic can be adjusted by changing the type and / or amount of these minor components. In the widthwise step absorption region 75, the content of minor components relative to 100 mol of Ti is preferably 0.1 mol% to 3.0 mol%. Furthermore, the concentration of minor components relative to 100 mol of Ti in the widthwise step absorption region 75 is preferably higher than the concentration of minor components relative to 100 mol of Ti in the internal dielectric layer 4. This makes the particle size of the ceramic in the widthwise step absorption region 75 smaller than the particle size of the ceramic in the widthwise non-step region 74 (internal dielectric layer 4).

[0043] In the width-direction step absorption region 75, the ceramic particle diameter on the surface of the side face B is smaller than that of the internal dielectric layer 4. Further, the ceramic particle diameter of the width-direction step absorption region 75 is not less than 0.9 times and not more than 1.1 times the ceramic particle diameter of the width-direction non-step region 74.

[0044] As shown in FIG. 5, in the first embodiment, the particle diameter of the width-direction non-step region 74 is substantially equal to the ceramic particle diameter of the internal dielectric layer 4. And the ceramic particle diameter of the width-direction step absorption region 75 is smaller than the ceramic particle diameter of the width-direction non-step region 74. It should be noted that even when the ceramic particle diameter of the width-direction step absorption region 75 is smaller than that of the width-direction non-step region 74, it is not less than 0.9 times, but for ease of understanding in FIG. 5, the particle diameter is exaggerated and illustrated to be smaller than 0.9 times.

[0045] The particle diameter of the width-direction non-step region 74 is substantially equal to the ceramic particle diameter of the internal dielectric layer 4, and the ceramic particle diameter of the width-direction step absorption region 75 is smaller than the ceramic particle diameter of the width-direction non-step region 74 (the internal dielectric layer 4). Therefore, the ceramic particle diameter of the side gap portion 70 is smaller than the ceramic particle diameter at the central portion 4M (shown in FIG. 4) of the internal dielectric layer 4 in the length direction L and the width direction W. It should be noted that the ceramic particle diameter at the central portion 4M of the internal dielectric layer 4 may be larger than the ceramic particle diameter at portions other than the central portion 4M of the internal dielectric layer 4.

[0046] Further, in the side gap portion 70, the ceramic particle diameter of the portion (covered region 70a) covered by the external electrode 3 at the surface portion of the side face B is 200 nm or less. And in the side gap portion 70, the ceramic particle diameter of the portion (exposed region 70b) not covered by the external electrode 3 at the surface portion of the side face B is also 200 nm or less. Furthermore, it is preferable that the ceramic particle diameter in the covered region 70a and the exposed region 70b is 180 nm or less.

[0047] Thus, since the particle size of the ceramic in the side gap portion 70 is smaller than the particle size of the ceramic in the central portion 4M of the internal dielectric layer 4, the surface roughness of the side gap portion 70 is smaller than when it is the same as the central portion 4M. Furthermore, when the particle size of the ceramic in the exposed region 70b is 200 nm or less, the surface roughness of the exposed region 70b is Ra 0.5 μm or less.

[0048] Since the surface roughness of the exposed region 70b becomes Ra 0.5 μm or less, resulting in a smooth surface, even when the exposed region 70b comes into contact with moisture, moisture is less likely to be absorbed into the exposed region 70b, which is the outer surface of the laminate 2. Therefore, even under humid conditions, metal ions from the external electrode 3, especially the resin electrode 32 containing Ag, Cu, etc., are less likely to dissolve into the exposed region 70b, suppressing the phenomenon of metal deposition in the exposed region 70b when a voltage is applied (migration phenomenon), thereby ensuring the reliability of the multilayer ceramic capacitor.

[0049] If the ceramic particle size is further reduced to 180 nm or less in the covered area 70a and the exposed area 70b, the surface roughness can be further reduced. This makes the surface of side B of the side gap portion 70 that comes into contact with moisture smoother, and makes it more difficult for moisture to be adsorbed onto the ceramic surface in the side gap portion 70. Therefore, the migration phenomenon can be further suppressed.

[0050] (External Electrode 3) The external electrode 3 has a first external electrode 3A and a second external electrode 3B and is connected to the internal electrode layer 5. The first external electrode 3A is positioned on the first end face C1 and extends further to the first main surface A1, the second main surface A2, the first side surface B1 and the second side surface B2. The second external electrode 3B is positioned on the second end face C2 and extends further to the first main surface A1, the second main surface A2, the first side surface B1 and the second side surface B2. Each of the external electrodes 3 comprises, from the laminate 2 side, a base electrode 31, a resin electrode 32 and a plating layer 33.

[0051] (Underlay electrode 31) The underlay electrode 31 (the first underlay electrode 31A on the side of the first external electrode 3A and the second underlay electrode 31B on the side of the second external electrode 3B) contains, but is not limited to, a conductive component (such as Cu) and a glass component.

[0052] (Resin electrode 32) The resin electrode 32 (the first resin electrode 32A on the side of the first external electrode 3A and the second resin electrode 32B on the side of the second external electrode 3B) contains resin and a conductive metal (Ag, Cu, Ni, etc.).

[0053] (Angle of resin electrode 32) The ceramic particle size on the side surface B (covered area 70a and exposed area 70b) of the side gap portion 70 that is in contact with the resin electrode 32 is small, at 200 nm or less. As a result, the surface roughness of the side surface B of the side gap portion 70 is small, and in this embodiment, the surface roughness is Ra 0.5 μm or less.

[0054] Therefore, as shown in Figure 4, the angle θ between the tangent to the resin electrode 32 (first resin electrode 32A and second resin electrode 32B) at its end in the length direction L, and the side surface B (at least one of the first side surface B1 or the second side surface B2), in the LW cross-section passing through the length direction L and the width direction W, is 20° or less. If θ is less than 5°, it may not be possible to cover the base electrode 31 at the end in the length direction L, so it is preferable that θ is between 5° and 20°.

[0055] When θ is 20° or less, the thickness of the resin electrode 32 in direct contact with the surface of the side B of the side gap portion 70 becomes thinner than the thickness of the resin electrode 32 in contact with the base electrode 31. Therefore, the amount of metal contained in the end of the resin electrode 32 in the longitudinal direction L can be reduced.

[0056] Therefore, even under humid conditions, the amount of metal ions (such as Ag and Cu contained in the resin electrode 32) that dissolve from the ends in the longitudinal direction L of the resin electrode 32 is reduced, which suppresses the migration phenomenon and ensures the reliability of the multilayer ceramic capacitor.

[0057] In this embodiment, a base electrode 31 was included, but it is not necessary to include it. If the base electrode 31 is not included, the area in direct contact between the resin electrode 32 and the side surface B1 increases. As a result, the thickness of the resin electrode 32 on the side surface B1 becomes thinner than the thickness of the resin electrode 32 on the base electrode 31, so the amount of resin electrode 32 on the side surface B1 decreases, and therefore the amount of metal ions contained in the resin electrode 32 also decreases, thus increasing the migration suppression effect.

[0058] (Plating layer 33) The plating layer 33 includes a Ni plating layer 33a and a Sn plating layer 33b.

[0059] (Method for manufacturing the multilayer ceramic capacitor 1) Next, a method for manufacturing the multilayer ceramic capacitor 1 according to the embodiment will be described. Figure 6 is a flowchart showing an example of a method for manufacturing the multilayer ceramic capacitor 1.

[0060] (Dielectric layer fabrication process S1) First, a ceramic green sheet for the dielectric layer is created by forming a ceramic slurry into a sheet. The ceramic slurry is, for example, BaTiO ３ Contains (barium titanate).

[0061] (Internal electrode layer printing process S2) Next, conductive paste for the internal electrode layer is printed onto the prepared ceramic green sheet for the dielectric layer. At this time, the amount of printed conductive paste (amount of coating) is changed so that the thickness of the printed conductive paste is such that the widthwise edge region W1 < widthwise central region W3 < widthwise intermediate region W2. For example, conductive paste for the internal electrode layer for the widthwise central region W3 is printed at the position that will be the widthwise center of the laminate 2 after the firing process described later, conductive paste for the widthwise intermediate region W2 is printed on both sides of the area where the conductive paste for the widthwise central region W3 was printed, and conductive paste for the widthwise edge region W1 is printed on both sides of that region.

[0062] (Step Absorption Region Printing Process S3) As described above, the internal electrode layer 5 is not arranged in the side gap portion 70, as shown in Figure 3. Therefore, compared to the inner layer portion 6 in which the internal electrode layer 5 and the internal dielectric layer 4 are laminated, the thickness in the lamination direction T is thinner in the portion with only the internal dielectric layer 4, and a step is formed. Also, as described above, the number of internal electrode layers 5 in the lead-out portion 51 is half that of the opposing portion 52. Therefore, the thickness in the lamination direction T of the lead-out portion 51 is thinner than that of the opposing portion 52, and a step is formed.

[0063] Therefore, in this embodiment, a step-absorbing dielectric paste is printed in the region of the ceramic green sheet for dielectric layers where the internal electrode layer 5 is not present, forming a step-absorbing region 75 in the width direction and a step-absorbing region 76 in the length direction.

[0064] A minor component (e.g., Dy) is included in the formulation of the dielectric paste for absorbing steps. The amount of the minor component in the formulation of the dielectric paste for absorbing steps is arbitrary, but it is preferable that the amount of the minor component relative to 100 mol of Ti after the firing process is 0.1 mol% to 3.0 mol%.

[0065] As for the printing method, printing may be done in one pass using one type of step-absorbing dielectric paste. Alternatively, in the second and third embodiments described later, multiple step-absorbing dielectric pastes with different sub-component contents may be prepared, and the step-absorbing dielectric paste may be printed on the side gap portion 70 in multiple passes.

[0066] This makes it possible to compensate for the reduction in the thickness of the internal electrode layers 5 when the product is manufactured as a multilayer ceramic capacitor 1.

[0067] (Outer layer lamination process S4) Next, outer layer ceramic green sheets, which will become the outer layer 7A, are stacked on both sides of the lamination direction T of the multiple laminated dielectric layer ceramic green sheets to form a mother block.

[0068] (Pressing process S5) The created mother block is then subjected to rigid pressing. As a result, the dielectric paste that forms the widthwise step absorption region 75 absorbs the step between the widthwise end region W1 and the side gap portion 70, and the dielectric paste that forms the lengthwise step absorption region 76 absorbs the step at the drawout portion 51.

[0069] Furthermore, the conductive paste used to form the internal electrode layer 5 may be thinner in the peripheral areas than in the central area when applied. Therefore, the conductive paste in the widthwise edge region W1 may be thinner than in the widthwise intermediate region W2. The dielectric paste that forms the widthwise step absorption region 75 flows into this thinner widthwise edge region W1 in the pressing process S5 described later, thus mitigating the reduction in thickness in the lamination direction T at the widthwise edge region W1.

[0070] (Cutting process S6) The rigidly pressed mother block is cut to manufacture a rectangular laminated chip.

[0071] (Firing process S7) This laminated chip is fired at a predetermined temperature to form the laminate 2.

[0072] (External electrode layer formation step S8) (Underlayment electrode formation) Next, using a dip method or the like, a paste for underlayment electrodes containing conductive metal and glass components, which will become the external electrodes 3, is applied to the end face C of the laminate 2. The paste for underlayment electrodes is also applied to the first main surface A1, the second main surface A2, the first side surface B1, and the second side surface B2 of the laminate 2. After that, the laminate 2 to which the underlayment electrode paste has been applied is fired again at a predetermined temperature. Alternatively, the firing step S7 described above may be omitted, and the laminate chip and the underlayment electrodes 31 may be fired simultaneously in the firing after this external electrode layer formation step S8.

[0073] Next, the portion of the end face C of the laminate 2 where the base electrode 31 is formed is further immersed in the conductive resin paste and coated with conductive resin paste. Here, since the particle size of the ceramic on the surface of the side B of the side gap portion 70 that is in contact with the resin electrode 32 is small, at 200 nm or less, the surface roughness is reduced, and in this embodiment, the surface roughness is Ra 0.5 μm or less. Therefore, when the conductive resin paste is applied, the contact angle with the coated area 70a becomes small, and the resin electrode 32 becomes spread out.

[0074] Subsequently, the conductive resin paste is heat-cured to form the resin electrode 32. At this time, the conductive resin paste is in a state where the contact angle with the covering area 70a is small and spread out. Therefore, in the state of the resin electrode 32 after heat curing, as shown in Figure 4, the angle θ between the tangent at the end of the resin electrode 32 in the length direction L and the side surface B, on the cross-sectional B1 plane passing through the length direction L and the width direction W, is 20° or less.

[0075] A Ni plating layer 33a is formed on the surface of the resin electrode 32. Furthermore, a Sn plating layer 33b is formed on the surface of the Ni plating layer 33a. Through these steps, the multilayer ceramic capacitor 1 of the embodiment is manufactured.

[0076] Although preferred embodiments of the present invention have been described above, the present invention is not limited thereto, and various modifications are possible.

[0077] (Second Embodiment) In the first embodiment, the particle size of the ceramic in the widthwise step absorption region 75 was smaller than the particle size of the ceramic in the widthwise non-step region 74. However, it is not limited to this.

[0078] Figure 7 is an enlarged view of region S in Figure 3 in the multilayer ceramic capacitor 1 according to the second embodiment. In the second embodiment, as shown in the figure, the particle size of the ceramic in the widthwise step absorption region 75 is the same as the particle size of the ceramic in the widthwise non-step region 74. Furthermore, in the widthwise direction W within the side gap portion 70, the particle size of the ceramic on the side surface B of the side gap portion 70 is smaller than the particle size of the ceramic on the internal electrode layer 5 side of the side gap portion 70.

[0079] In this case as well, the overall ceramic particle size on the side surface B of the widthwise step absorption region 75 is smaller than that of the internal dielectric layer 4. Therefore, the surface of side surface B of the side gap portion 70 that comes into contact with moisture becomes smoother, and moisture is less likely to be adsorbed onto the ceramic surface corresponding to the side gap portion 70.

[0080] Therefore, even under humid conditions, metal ions from the external electrodes 3, especially the resin electrodes 32 containing Ag, Cu, etc., are less likely to dissolve. This suppresses the phenomenon of metal deposition (migration phenomenon) on the uncoated surface of the laminated external electrodes 3 when a voltage is applied, thereby ensuring the reliability of the multilayer ceramic capacitor.

[0081] Furthermore, the angle θ between the tangent at the end of the resin electrode 32 (first resin electrode and second resin electrode) in the length direction L, in the LW cross-section passing through the length direction L and the width direction W, and the side surface B (first side surface B1 or second side surface B2) can be reduced.

[0082] This allows the thickness of the resin electrode 32 in direct contact with the surface of side B of the side gap portion 70 to be thinner than the thickness of the resin electrode 32 in contact with the base electrode 31. Therefore, the amount of metal at the ends of the resin electrode 32 in the longitudinal direction L can be reduced. As a result, even under humid conditions, the amount of metal ions (such as Ag and Cu contained in the resin electrode 32) that dissolve from the ends of the resin electrode 32 in the longitudinal direction L is reduced, which suppresses migration phenomena and ensures the reliability of the multilayer ceramic capacitor.

[0083] (Third Embodiment) In the first embodiment, the particle size of the ceramic in the widthwise step absorption region 75 was smaller than the particle size of the ceramic in the widthwise non-step region 74. However, it is not limited to this.

[0084] Figure 8 is an enlarged view of region S in Figure 3 in the multilayer ceramic capacitor 1 according to the third embodiment. In the third embodiment, as shown in the figure, the particle size of the ceramic in the widthwise step absorption region 75 and the particle size of the ceramic in the widthwise non-step region 74 are equivalent, and in the widthwise direction W within the side gap portion 70, the particle size of the ceramic gradually decreases from the internal electrode layer 5 side of the side gap portion 70 toward the side surface B side of the side gap portion 70.

[0085] In this case as well, the overall ceramic particle size on the side surface B of the widthwise step absorption region 75 becomes smaller than that of the internal dielectric layer 4. Therefore, the surface of side surface B of the side gap portion 70 that comes into contact with moisture becomes smoother, and moisture is less likely to be adsorbed onto the ceramic surface corresponding to the side gap portion 70.

[0086] Therefore, even under humid conditions, metal ions from the external electrodes 3, especially the resin electrodes 32 containing Ag, Cu, etc., are less likely to dissolve. This suppresses the phenomenon of metal deposition (migration phenomenon) on the uncoated surface of the laminated external electrodes 3 when a voltage is applied, thereby ensuring the reliability of the multilayer ceramic capacitor.

[0087] Furthermore, the angle θ between the tangent at the end of the resin electrode 32 (first resin electrode and second resin electrode) in the longitudinal direction L, on the cross section B1 plane passing through the longitudinal direction L and the width direction W, and the side surface B (first side surface B1 or second side surface B2) can be reduced.

[0088] This allows the thickness of the resin electrode 32 in direct contact with the surface of side B of the side gap portion 70 to be thinner than the thickness of the resin electrode 32 in contact with the base electrode 31. Therefore, the amount of metal at the ends of the resin electrode 32 in the longitudinal direction L can be reduced. As a result, even under humid conditions, the amount of metal ions (such as Ag and Cu contained in the resin electrode 32) that dissolve from the ends of the resin electrode 32 in the longitudinal direction L is reduced, which suppresses migration phenomena and ensures the reliability of the multilayer ceramic capacitor.

[0089] Furthermore, the ceramic particle size may gradually decrease from the first side B1 or second side B2 of the side gap portion 70 towards the first internal electrode layer or second internal electrode layer of the side gap portion 70. This makes it possible to create a multilayer ceramic capacitor that suppresses migration without affecting the expression of electrical characteristics.

[0090] 1 Multilayer ceramic capacitor 2 Laminate 3 External electrode 4 Internal dielectric layer 4M Central part 5 Internal electrode layer 5A First internal electrode layer 5B Second internal electrode layer 6 Inner layer 7A Outer layer 31 Base electrode 32 Resin electrode 70 Side gap 70a Covered area 70b Exposed area 74 Width direction non-step area 75 Width direction step absorption area

Claims

1. A laminate having first main surfaces and second main surfaces facing each other in the stacking direction, first side surfaces and second side surfaces facing each other in the width direction intersecting the stacking direction, and first end surfaces and second end surfaces facing each other in the length direction intersecting the stacking direction and the width direction; a first external electrode provided on the first end surface; a second external electrode provided on the second end surface, wherein the first external electrode includes a first resin electrode containing a resin component, and the second external electrode includes a second resin electrode containing a resin component; the laminate has an inner layer portion in which a first internal electrode layer and a second internal electrode layer and an internal dielectric layer are alternately stacked; and a first side gap portion disposed between the inner layer portion and the first side surface, wherein the particle size of the ceramic in the first side gap portion is smaller than the particle size of the ceramic in the internal dielectric layer, and the particle size of the ceramic on the first or second side surface not covered by the first external electrode and the second external electrode is 200 nm or less. A multilayer ceramic capacitor in which the angle between the tangent at the longitudinal end of the first or second resin electrode and the first or second side surface in a cross section passing through the longitudinal and width directions is 20° or less.

2. The multilayer ceramic capacitor according to claim 1, wherein the particle size of the ceramic in the internal dielectric layer is 100 nm or more and 200 nm or less.

3. The multilayer ceramic capacitor according to claim 1 or claim 2, wherein the first side gap portion contains Ti as the main component, and at least one of Dy, Si, Mg, Mn, Sn, Cu, rare earth elements, Ni, and Al as a minor component, and the average concentration of the minor component per 100 mol of Ti in the first side gap portion is higher than the average concentration of the minor component per 100 mol of Ti in the internal dielectric layer.

4. The multilayer ceramic capacitor according to any one of claims 1 to 3, wherein the total ceramic particle size of the first or second side surface is 180 nm or less.

5. The multilayer ceramic capacitor according to any one of claims 1 to 4, wherein the particle size of the ceramic on the first side or the second side is smaller than the particle size of the ceramic on the first internal electrode layer or the second internal electrode layer.

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