Power semiconductor device, and power conversion apparatus and switching mode power supply including same power semiconductor device

Abstract

One embodiment provides a power semiconductor device comprising: a power switch for controlling a power flow between a drain electrode and a source electrode; an auxiliary switch including a control node for auxiliary control of a gate-source voltage between a gate electrode and the source electrode of the power switch; and a capacitive coupling structure at least partially including a capacitance component and providing a high-frequency displacement current path between the drain electrode of the power switch and the control node of the auxiliary switch.

Description

Power semiconductor device, and a power converter and a switching power supply including the power semiconductor device

[0001] This embodiment relates to power semiconductor devices and power conversion device technology.

[0002] The application of power converters is expanding across various fields, including electric vehicles, hybrid vehicles, charging infrastructure (slow / fast chargers), renewable energy integration facilities (solar / wind), energy storage systems (ESS), data center and server power supplies, telecommunications equipment power supplies, industrial motor drives, and home appliance power supplies. In these applications, it is necessary to convert power into desired voltage and current forms or to maintain stable power quality, while there is an increasing demand for system miniaturization and high integration. Consequently, the demand for high-efficiency, high-power-density, and high-reliability power converters is on a continuous upward trend.

[0003] Power converters generally include a structure that converts power using switching elements. For example, they can be implemented in various topologies, such as half-bridge or full-bridge structures, synchronous rectification structures, Power Factor Correction (PFC) structures, and inverter structures. In these power converters, power flow is controlled by repeatedly switching switching elements on and off, and desired output characteristics are often formed through energy storage elements such as inductors and capacitors. In particular, as the switching frequency increases, it becomes easier to reduce the size of passive components or increase power density; therefore, power semiconductor devices and driving technologies that support high-frequency switching are in demand across various product categories.

[0004] Meanwhile, performance requirements for power converters are tending to expand beyond the level of generating output voltage to include high efficiency, high power density, a wide input voltage range, fast dynamic characteristics, high reliability, thermal stability, and satisfaction of electromagnetic compatibility (EMI / EMC). In particular, it is important to reduce losses occurring during switching operations, stably control the switching transition period, and prevent cross-conduction between switches. To this end, a configuration in which a gate driver provides an appropriate gate driving signal to the gate electrode of a switching element and performs complementary driving including dead time is widely used.

[0005] However, unlike ideal switching models, the actual operation of switching devices is influenced by various non-ideal factors, such as wiring parasitic inductance, parasitic capacitance, package structure, layout, and the output impedance of the gate driver. For example, as the voltage change (dV / dt) and current change (dI / dt) at the switching node increase, drain-gate coupling (also known as the Miller effect) or gate voltage ringing may occur. This can lead to unintended instantaneous turn-on or turn-off delays, which can result in increased switching losses, instantaneous cross-conduction currents, increased device stress, and potential degradation of system reliability. Therefore, applications requiring high-speed switching demand more precise gate driving and switching transition control.

[0006] In addition, there is an increasing number of cases where not only silicon (Si)-based devices but also wide bandgap (WBG)-based devices (e.g., SiC, GaN, etc.) are applied as switching elements in power converters. While these devices can provide characteristics advantageous for high-speed switching and high-efficiency operation, the dV / dt in the switching transition region can increase, and they can become sensitive to driving conditions and parasitic components; consequently, there is a tendency for technical considerations to increase in order to achieve stable operation in actual system environments. Therefore, in response to the expanded application of power converters and the demand for high performance, there is a continuous need for power semiconductor devices and driving technologies that can implement switching operations more stably and appropriately manage non-abnormal phenomena that may occur in the switching transition region.

[0007] Against this backdrop, the objective of the present embodiment is, in one aspect, to provide a technology that enables stable switching operation despite the influence of voltage shifts and parasitic components that may occur during the process of switching a switching element at a high frequency in a power converter. In another aspect, the objective of the present embodiment is to provide a technology to mitigate the problem of unintended instantaneous turn-on or turn-off delays that may occur due to voltage changes (dV / dt) at the switching node and non-ideal elements in the gate driving path. In yet another aspect, the objective of the present embodiment is to provide a technology that ensures the gate-source voltage of the switching element is appropriately maintained so as to suppress cross-conduction or increased power loss during the switching transition period.

[0008] To achieve the aforementioned objective, one embodiment provides a power semiconductor device comprising: a power switch for controlling power flow between a drain electrode and a source electrode; an auxiliary switch including a control node for auxiliaryly controlling a gate-source voltage between the gate electrode of the power switch and the source electrode; and a capacitive coupling structure including at least partially a capacitance component and providing a high-frequency displacement current path between the drain electrode of the power switch and the control node of the auxiliary switch.

[0009] The power semiconductor device may further include a resistive coupling structure that includes at least a partially resistive component, such that an auxiliary gate-source voltage is formed between the control node of the auxiliary switch and the source electrode of the power switch by the current transmitted through the high-frequency displacement current path.

[0010] The above capacitive coupling structure includes at least one capacitor element, and the above resistive coupling structure may include at least one resistor element.

[0011] The power semiconductor device may further include a Zener diode connected in parallel with the at least one resistor element to clamp the voltage between the control node of the auxiliary switch and the source electrode of the power switch.

[0012] The power switch, the auxiliary switch, the capacitive coupling structure, and the resistive coupling structure may be monolithically integrated on the same semiconductor substrate, and may further include at least one terminal that allows an external resistor to be selectively connected to the at least one resistive element in parallel, in series, or in a combination of series and parallel.

[0013] The above capacitive coupling structure may include at least a portion of the area of ​​a gate shield electrode formed in the power switch, and the gate shield electrode may be electrically connected to a control node of the auxiliary switch, and the high-frequency displacement current path may be provided at least partially by a capacitance component formed between the gate shield electrode and the drain electrode of the power switch.

[0014] The above auxiliary switch may include a drain node, a source node, and a control node, and the drain node of the auxiliary switch may be electrically connected to the gate electrode of the power switch, and the source node of the auxiliary switch may be electrically connected to the source electrode of the power switch.

[0015] The auxiliary switch above can be turned on when the auxiliary gate-source voltage formed at the control node exceeds a preset threshold value, thereby allowing charge to be discharged from the gate electrode of the power switch to the source electrode of the power switch.

[0016] The source electrode of the power switch and the source node of the auxiliary switch can form a common source electrode.

[0017] The gate electrode of the power switch can be electrically connected to an external gate driver, and the drain node of the auxiliary switch can be electrically connected to a gate wiring node that includes the gate electrode of the power switch.

[0018] The above resistive coupling structure can be connected between the control node of the auxiliary switch and the source electrode of the power switch.

[0019] The above resistive coupling structure, together with the above capacitive coupling structure, forms a time constant to set the holding time of the voltage formed at the control node of the above auxiliary switch.

[0020] Another embodiment provides a power conversion device comprising: a first switching element connected between a DC input terminal and a switching node; a second switching element connected between the switching node and a reference potential terminal; and at least one gate driver that provides a gate driving signal to the first switching element and the second switching element, wherein at least one of the first switching element and the second switching element is a power semiconductor device according to the above-described embodiment.

[0021] The above power semiconductor device may be the above second switching device.

[0022] The first switching element and the second switching element may form a half-bridge, and the switching node may be a common connection node of the first switching element and the second switching element.

[0023] The power semiconductor device may be configured such that charge is discharged from the gate electrode of the second switching device to the source electrode of the second switching device so that the second switching device remains in an off state during a voltage transition section in which the voltage of the switching node rises.

[0024] The power semiconductor device may be configured such that the auxiliary switch is turned on by a dV / dt event at the switching node, and a discharge path is formed between the gate electrode of the second switching device and the source electrode of the second switching device by the turning on of the auxiliary switch.

[0025] The at least one gate driver can provide a complementary gate driving signal including a dead time to the first switching element and the second switching element, and the power semiconductor device can be configured to maintain the off state of the second switching element during the dead time.

[0026] The power semiconductor device may be the first switching device, and may be configured to form an additional discharge path that discharges charge from the gate electrode of the first switching device to the source electrode of the first switching device in response to an increase in the drain-source voltage of the first switching device during a voltage transition section in which the first switching device is turned off.

[0027] The above power semiconductor device may include a gallium nitride (GaN)-based semiconductor structure.

[0028] Another embodiment provides a switching power supply comprising: a power switching stage including at least one switching element; and at least one gate driver providing a gate driving signal to the at least one switching element, wherein the at least one switching element is a power semiconductor device according to the above-described embodiment.

[0029] As described above, according to the present embodiment, the switching operation can be performed stably despite the influence of voltage shifts and parasitic components that may occur during the process of switching a switching element at a high frequency in a power converter. Furthermore, according to the present embodiment, the problem of unintended instantaneous turn-on or turn-off delays occurring due to voltage changes (dV / dt) at the switching node and non-ideal elements in the gate driving path can be mitigated. Additionally, according to the present embodiment, the gate-source voltage of the switching element can be appropriately maintained to suppress cross-conduction or increased power loss during the switching transition period.

[0030] Figure 1 is a diagram of a typical power conversion system.

[0031] Figure 2 is a diagram showing the main waveform in Figure 1.

[0032] Figure 3 is a circuit diagram of the gate driver and one switching element in Figure 1.

[0033] Figure 4 is a diagram illustrating that the turn-off is delayed according to dVds / dt in the circuit configuration of Figure 3.

[0034] Figure 5 is a diagram illustrating that the low-side switch is instantaneously turned on as the drain-source voltage rises in the circuit configuration of Figure 3.

[0035] FIG. 6 is a configuration diagram of a power converter according to one embodiment.

[0036] FIG. 7 is a first example circuit diagram of a power semiconductor device according to one embodiment.

[0037] FIG. 8 is a second example circuit diagram of a power semiconductor device according to one embodiment.

[0038] FIG. 9 is a third example circuit diagram of a power semiconductor device according to one embodiment.

[0039] FIG. 10 is a fourth example circuit diagram of a power semiconductor device according to one embodiment.

[0040] FIG. 11 is a diagram showing the difference in efficiency depending on whether one embodiment is applied.

[0041] Hereinafter, some embodiments of the present invention will be described in detail with reference to the exemplary drawings. It should be noted that in assigning reference numerals to the components of each drawing, the same components are given the same reference numeral whenever possible, even if they are shown in different drawings. Furthermore, in describing the present invention, if it is determined that a detailed description of related known components or functions could obscure the essence of the invention, such detailed description is omitted.

[0042] In addition, terms such as first, second, A, B, (a), (b), etc., may be used when describing the components of the present invention. These terms are intended only to distinguish the components from other components, and the essence, order, or sequence of the components is not limited by the terms. Where it is stated that a component is "connected," "combined," or "connected" to another component, it should be understood that the component may be directly connected or connected to the other component, but that another component may also be "connected," "combined," or "connected" between each component.

[0043] Figure 1 is a diagram of a typical power conversion system.

[0044] Referring to FIG. 1, the power conversion system (1) may include a DC voltage source (Vs), a first switching element (SWH), a second switching element (SWL), a diode (D1), an inductor (L1), an output capacitor (C1), and a load. The DC voltage source (Vs) is a power source that provides an input voltage to the power conversion system (1) and may be various DC power sources, such as a battery, a DC link capacitor, or the output terminal of a rectifier circuit.

[0045] The first switching element (SWH) and the second switching element (SWL) may be connected in series between a DC voltage source (Vs) and a reference potential (e.g., ground). The first switching element (SWH) may be a high-side switching element, and the second switching element (SWL) may be a low-side switching element. A switching node (Nsw) may be formed at the common connection point of the first switching element (SWH) and the second switching element (SWL), and the voltage of the switching node (Nsw) may change according to the switching operation.

[0046] The diode (D1) may be a freewheeling element that provides a current path to ensure that the current flowing through the inductor (L1) is maintained continuously during the switching operation. For example, since the current in the inductor (L1) is unlikely to change rapidly even while the second switching element (SWL) is in a non-conducting state, the diode (D1) may provide a path through which the current in the inductor (L1) can circulate. Additionally, if the second switching element (SWL) operates in a synchronous rectification mode, the diode (D1) may function as a body diode or an antiparallel diode of the second switching element (SWL).

[0047] The inductor (L1) is an energy storage element that averages the voltage waveform generated at the switching node (Nsw) and can perform the role of smoothing the voltage and current at the output terminal. The output capacitor (C1) can function as a smoothing element to reduce voltage ripple at the output terminal and provide a stable DC output to the load. The load is a load that operates using the output voltage of the power conversion system (1) and can be various loads such as electronic devices, motor drive units, and power modules.

[0048] The power conversion system (1) can operate to change the voltage of the switching node (Nsw) through the switching operation of the first switching element (SWH) and the second switching element (SWL), and to form a desired DC output at the output terminal through the energy storage and smoothing action of the inductor (L1) and the output capacitor (C1). For example, when the first switching element (SWH) is turned on, the voltage of the switching node (Nsw) approaches the DC voltage source (Vs), and energy is stored in the inductor (L1) and current can be supplied to the output terminal. Conversely, when the first switching element (SWH) is turned off and the second switching element (SWL) is turned on, the voltage of the switching node (Nsw) approaches the reference potential, and the energy stored in the inductor (L1) can be transferred to the load. In this way, the power conversion system (1) can convert the input voltage to a desired output voltage by repeating the switching operation.

[0049] Figure 2 is a diagram showing the main waveform in Figure 1.

[0050] Referring to FIG. 2, major waveforms during the switching operation of the first switching element (SWH) and the second switching element (SWL) may be illustrated. For example, FIG. 2 may include a gate driving signal of the first switching element (SWH), a gate driving signal of the second switching element (SWL), a drain-source voltage (Vds(SWL)) of the second switching element (SWL), an inductor (L1) current or output current, and a PWM (Pulse Width Modulation) waveform.

[0051] The drain-source voltage (Vds(SWL)) of the second switching element (SWL) is a voltage waveform that changes according to the switching operation, and may have a relatively large value during the period when the second switching element (SWL) is in the off state and a relatively small value during the period when the second switching element (SWL) is in the on state. Additionally, Vds(SWL) may include a rising or falling transition section during the voltage transition section where the switching state is switched, and the slope of the said transition section may vary depending on the switching operation conditions.

[0052] The PWM waveform may be a synchronization reference waveform that operates based on the switching period of the first switching element (SWH) and the second switching element (SWL). For example, the PWM waveform can provide a timing reference so that gate driving signals are generated in accordance with a predetermined switching period, thereby enabling the switching operation of the first switching element (SWH) and the second switching element (SWL) to be synchronized for the same switching period. Additionally, the on and off periods of the first switching element (SWH) and the second switching element (SWL), respectively, may be set based on the PWM waveform, and non-overlapping periods, such as dead time, may be included.

[0053] The inductor (L1) current may appear as a waveform that flows continuously while repeating sections of increase or decrease depending on the switching operation, and the output voltage may be smoothed by the output capacitor (C1).

[0054] Figure 3 is a circuit diagram of the gate driver and one switching element in Figure 1.

[0055] Referring to FIG. 3, the gate driver (GDRV) may include a driving logic, a driving voltage source (Vdrv), and a driving impedance (Zdrv). The driving impedance (Zdrv) may represent an output impedance or an equivalent resistance component present in the gate driving path, thereby limiting the current supplied to or discharged from the gate terminal (G).

[0056] The switching element (SW) may include a drain terminal (D), a gate terminal (G), and a source terminal (S). Inside the switching element (SW), a dielectric or depletion region may be interposed between the gate electrode and the channel (or the region where the channel is formed), between the gate electrode and the drain-side electrode or drift region, between the gate electrode and the source-side electrode or source region, and as a result, a parasitic capacitance component may be formed between the terminals. For example, a drain-gate capacitance (Cgd) may exist between the drain terminal (D) and the gate terminal (G), and a gate-source capacitance (Cgs) may exist between the gate terminal (G) and the source terminal (S). The value of this capacitance component may be determined by the opposing area of ​​the conductive region between the terminals, the spacing, dielectric properties, and the depletion state according to voltage, and the effective value may change depending on the structure and operating conditions of the switching element (SW).

[0057] Generally, the drain-gate capacitance (Cgd) can act as a path through which voltage changes at the drain terminal (D) are coupled to the gate terminal (G), which can lead to the so-called Miller effect, where changes in the drain-source voltage (Vds) affect the gate-source voltage (Vgs). For example, if the voltage at the drain terminal (D) rises or falls rapidly, displacement current through the drain-gate capacitance (Cgd) may flow into or out of the gate terminal (G). If the driving impedance (Zdrv) fails to sufficiently absorb or supply this displacement current, the potential of the gate terminal (G) may change in an unintended manner. Additionally, during the switching process, a region may be formed where the drain-source voltage (Vds) primarily changes while the gate-source voltage (Vgs) remains within a specific range (e.g., near the threshold voltage (Vth)); this region can be described as a Miller plateau. Consequently, the turn-on and turn-off transition intervals of the switching element (SW) can be affected not only by the gate driving signal but also by non-ideal elements such as drain-gate capacitance (Cgd), gate-source capacitance (Cgs), and driving impedance (Zdrv).

[0058] Figure 4 is a diagram illustrating that the turn-off is delayed according to dVds / dt in the circuit configuration of Figure 3.

[0059] Referring to FIG. 4, during the process of the switching element (SW) turning off, the gate-source voltage (Vgs) may decrease and the drain-source voltage (Vds) may increase, and dVds / dt may be formed in the voltage transition section where the drain-source voltage (Vds) increases. At this time, a displacement current corresponding to the voltage change on the drain side may be coupled to the gate side by the drain-gate capacitance (Cgd), and this may appear in a form that competes with the current in the direction of discharging the gate charge. In addition, if the driving impedance (Zdrv) is large, the current discharging charge from the gate terminal (G) may be limited, so the gate-source voltage (Vgs) may not decrease quickly or the rate of decrease of the gate-source voltage (Vgs) may be slowed down. In particular, if the gate-source voltage (Vgs) does not decrease sufficiently quickly near the threshold voltage (Vth), the drain-source voltage (Vds) may increase over time or increase losses, and a reduced turn-off speed may occur as shown in Fig. 4.

[0060] Figure 5 is a diagram illustrating that the low-side switch is instantaneously turned on as the drain-source voltage rises in the circuit configuration of Figure 3.

[0061] Referring to FIG. 5, in the voltage transition section where the drain-source voltage (Vds(SWL)) of the second switching element (SWL) rises from near 0V to near Vs, the gate-source voltage (Vgs(SWL)) of the second switching element (SWL) may temporarily rise due to coupling by the drain-gate capacitance (Cgd). Such a rise in the gate-source voltage (Vgs(SWL)) may occur even when the second switching element (SWL) is commanded to be off by a gate driving signal, and may be more pronounced when the gate voltage is not maintained sufficiently low due to the driving impedance (Zdrv) or non-ideal elements of the gate driving path. At this time, if the gate-source voltage (Vgs(SWL)) rises above the threshold voltage (Vth), the drain-source current (Ids(SWL)) of the second switching element (SWL) may increase instantaneously, and a shoot-through current may occur as shown in FIG. 5. This shoot-through current can be understood as a typical example that may occur when voltage changes in the switching transition region and non-ideal elements of the gate driving path are combined, and it may lead to increased power loss and increased device stress.

[0062] To mitigate these issues, technology is required to control gate voltage fluctuations caused by voltage changes (dV / dt) during the switching transition period and to supplement the gate charge discharge capability limited by the driving impedance (Zdrv) of the external gate driver. For example, it is necessary to suppress instantaneous turn-on and cross-conduction by stably maintaining the off state to prevent the gate-source voltage of the switching device from rising unintendedly during the voltage transition period. Furthermore, even if coupling through the drain-gate capacitance (Cgd) occurs due to a rise in the drain-source voltage (Vds) during the switching device's turn-off process, it is necessary to ensure that the gate charge is removed more smoothly so that the switching device turns off quickly. In other words, in addition to securing the ability to maintain the off state during the switching transition period, improving the turn-off speed by mitigating turn-off delay is important for the efficiency and reliability of the power converter. Hereinafter, the configuration of an embodiment for responding to such requirements will be specifically described with reference to FIG. 6 and below.

[0063] FIG. 6 is a configuration diagram of a power converter according to one embodiment.

[0064] Referring to FIG. 6, the power converter (600) may include a DC input terminal (Ti), a reference potential terminal (Tr), a switching node (Nsw), and an output terminal (To). A DC voltage source (Vs) may be connected between the DC input terminal (Ti) and the reference potential terminal (Tr), and the DC voltage source (Vs) may be a DC power source that provides an input voltage to the power converter (600).

[0065] The power converter (600) may include a first switching element (SWH) and a second switching element (SWL). The first switching element (SWH) and the second switching element (SWL) may be connected in series between a DC input terminal (Ti) and a reference potential terminal (Tr) to form a half-bridge. The first switching element (SWH) may be a high-side switching element placed on the DC input terminal (Ti) side, and the second switching element (SWL) may be a low-side switching element placed on the reference potential terminal (Tr) side. A switching node (Nsw) may be formed at the common connection point of the first switching element (SWH) and the second switching element (SWL), and the switching node (Nsw) is a node in which the voltage fluctuates between a state approaching the potential of the DC input terminal (Ti) and a state approaching the potential of the reference potential terminal (Tr) depending on the switching operation.

[0066] The output terminal (To) may be a terminal placed on the path through which power is transferred from the switching node (Nsw) to the output side. For example, the output terminal (To) may be electrically connected to the switching node (Nsw) to allow voltage fluctuations of the switching node (Nsw) to be transmitted to the output side circuit. An inductor (L1) may be connected to the output terminal (To), and the other end of the inductor (L1) may be connected to an output capacitor (C1) and a load. The inductor (L1) and the output capacitor (C1) may operate as output filters that smooth the voltage and current of the output terminal, and the load is a load that operates using the output voltage. Accordingly, the power converter (600) can provide a DC output to the load by averaging the voltage waveform generated at the switching node (Nsw) by the switching operation of the first switching element (SWH) and the second switching element (SWL) through the energy storage and smoothing action of the inductor (L1) and the output capacitor (C1).

[0067] The power converter (600) may further include a diode (D1). The diode (D1) may provide a current path to ensure the continuity of the inductor (L1) current when the first switching element (SWH) and the second switching element (SWL) are in a specific state, such as during a switching transition or dead time. For example, since the inductor (L1) current is difficult to change to zero instantaneously, the diode (D1) may function as a path through which the current can circulate during the switching state transition. In one embodiment, the diode (D1) may be implemented as a separate discrete element, and in another embodiment, the diode (D1) may be provided by a diode component inherent in the second switching element (SWL).

[0068] The power converter (600) may further include a gate driver (GDRV). The gate driver (GDRV) is configured to control the switching operation of the half-bridge by providing a gate driving signal to the first switching element (SWH) and the second switching element (SWL). In one embodiment, the gate driver (GDRV) can drive both the first switching element (SWH) and the second switching element (SWL) as a single gate driver, and in another embodiment, the gate driver (GDRV) may be implemented as a plurality of gate drivers that drive the first switching element (SWH) and the second switching element (SWL) separately, respectively. The gate driver (GDRV) can provide a complementary gate driving signal so that the first switching element (SWH) and the second switching element (SWL) do not conduct simultaneously, and can provide a gate driving signal including a dead time as needed.

[0069] Additionally, the first switching element (SWH), the second switching element (SWL), the diode (D1), and the gate driver (GDRV) constituting the power converter (600) may each be composed of separate discrete elements, or two or more components may be integrated into a single discrete element or a single module. For example, the first switching element (SWH) and the second switching element (SWL) may be provided as a single power module, and the gate driver (GDRV) may be integrated together with the power module.

[0070] Meanwhile, in a half-bridge structure, the voltage of the switching node (Nsw) can change rapidly during the switching transition period, and such voltage changes can affect the gate driving and off-state maintenance of the switching device. Furthermore, if the turn-off of the switching device is delayed or unintended conduction occurs in the off-state, power loss and device stress may increase. Below, with reference to FIG. 7, an exemplary circuit configuration of a power semiconductor device configured to auxiliaryly control the gate-source voltage of the switching device, taking into account the operating characteristics during this switching transition period, will be described in detail.

[0071] FIG. 7 is a first example circuit diagram of a power semiconductor device according to one embodiment.

[0072] Referring to FIG. 7, the power semiconductor device (700) may include a power switch (SW), an auxiliary switch (SWa), a capacitive coupling structure (Im1), and a resistive coupling structure (Im2).

[0073] The power switch (SW) includes a drain electrode (D), a gate electrode (G), and a source electrode (S), and is a switching element that controls the power flow between the drain electrode (D) and the source electrode (S) according to the gate-source voltage applied to the gate electrode (G).

[0074] The auxiliary switch (SWa) includes a drain node (Nd), a control node (Ng), and a source node (Ns), and is a switching element in which the conduction state between the drain node (Nd) and the source node (Ns) is controlled in response to a voltage formed at the control node (Ng).

[0075] In FIG. 7, the drain node (Nd) of the auxiliary switch (SWa) is electrically connected to the gate electrode (G) of the power switch (SW), and the source node (Ns) of the auxiliary switch (SWa) is electrically connected to the source electrode (S) of the power switch (SW). Accordingly, when the auxiliary switch (SWa) is turned on, a path can be formed through which charge can be discharged from the gate electrode (G) of the power switch (SW) to the source electrode (S).

[0076] The capacitive coupling structure (Im1) of FIG. 7 may be configured to include at least a capacitance component and provide a high-frequency displacement current path between the drain electrode (D) of the power switch (SW) and the control node (Ng) of the auxiliary switch (SWa).

[0077] When the capacitive coupling structure (Im1) includes a capacitor element, a voltage change occurring at the drain electrode (D) of the power switch (SW) can be coupled to the control node (Ng) through the capacitance component of the capacitive coupling structure (Im1), and as a result, a displacement current can flow into or out of the control node (Ng).

[0078] The resistive coupling structure (Im2) may be configured to include at least a resistive component and be connected between the control node (Ng) of the auxiliary switch (SWa) and the source node (Ns) of the auxiliary switch (SWa).

[0079] When the resistive coupling structure (Im2) includes a resistive element, a voltage can be formed between the control node (Ng) and the source node (Ns) by the current flowing into the control node (Ng). That is, by the current transmitted through the capacitive coupling structure (Im1), a voltage can be formed secondarily between the control node (Ng) of the auxiliary switch (SWa) and the source electrode (S) of the power switch (SW) (and the source node (Ns) connected thereto), and this voltage can act as a driving voltage that causes the auxiliary switch (SWa) to turn on.

[0080] In FIG. 7, parasitic capacitance components of the power switch (SW) may also be illustrated. For example, a drain-gate capacitance (Cgd) may exist between the drain electrode (D) and the gate electrode (G) of the power switch (SW), and a gate-source capacitance (Cgs) may exist between the gate electrode (G) and the source electrode (S) of the power switch (SW).

[0081] Drain-gate capacitance (Cgd) can act as a path for changes in drain-source voltage to be coupled toward the gate electrode (G), and is one of the factors causing the Miller effect, in which the gate-source voltage fluctuates unintendedly during the switching transition period.

[0082] The gate-source capacitance (Cgs) is involved in the relationship between the amount of charge accumulated on the gate electrode (G) and the gate-source voltage, and can affect the response speed to the gate driving signal and the waveform of the transition section.

[0083] The configuration of FIG. 7 provides a principle that mitigates conventional problems that may arise from the influence of such voltage shifts (dV / dt) and parasitic components. For example, if the drain-source voltage of a power switch (SW) rises rapidly during the switching transition period, a displacement current may be coupled to the gate electrode (G) by the drain-gate capacitance (Cgd), and if the gate electrode (G) is not kept sufficiently low due to the impedance component of the external gate driving path, the gate-source voltage may temporarily rise. At this time, if the gate-source voltage rises above a threshold voltage, the switch requiring an off state may momentarily conduct, and in half-bridge driving, there is a possibility of cross-conduction or shoot-through current occurring. In the case of FIG. 7, a voltage change occurring at the drain electrode (D) of the power switch (SW) can be coupled to the control node (Ng) of the auxiliary switch (SWa) through the capacitive coupling structure (Im1) to form a voltage at the control node (Ng). Then, when the potential of the control node (Ng) rises relative to the source node (Ns) due to the resistive coupling structure (Im2), the auxiliary switch (SWa) can be turned on. When the auxiliary switch (SWa) is turned on, the connection between the drain node (Nd) and the source node (Ns) is made conductive, and the charge accumulated at the gate electrode (G) of the power switch (SW) can be discharged toward the source electrode (S). As a result, the tendency for the gate-source voltage to rise unintentionally during the voltage transition period is suppressed, and the maintenance of the off state can be reinforced.

[0084] In addition, the configuration of FIG. 7 provides a principle that enables rapid turn-off. During the process of turning off the power switch (SW), the charge stored in the gate electrode (G) must be removed so that the gate-source voltage decreases, and at the same time, a transition region in which the drain-source voltage increases can be formed. At this time, the coupling due to the drain-gate capacitance (Cgd) acts in a direction that competes with the gate charge discharge, which may delay the turn-off. In the case of FIG. 7, when the control node (Ng) rises through the capacitive coupling structure (Im1) due to the voltage increase of the drain electrode (D) and the auxiliary switch (SWa) is turned on, an additional discharge path from the gate electrode (G) of the power switch (SW) to the source electrode (S) can be formed. Therefore, even under conditions where it is difficult to remove gate charge sufficiently quickly with only the external gate driving path, the discharge of the gate electrode (G) is assisted, so that the turn-off transition period can be shortened and the turn-off delay can be alleviated.

[0085] The resistive coupling structure (Im2) can form a time constant together with the capacitive coupling structure (Im1). That is, the time characteristics of the rise and fall of the voltage formed at the control node (Ng) can be determined by the combination of the capacitance component of the capacitive coupling structure (Im1) and the resistive component of the resistive coupling structure (Im2), and this can serve as a factor for setting the time during which the auxiliary switch (SWa) maintains the turn-on state or the time during which the gate discharge is sustained. Consequently, the configuration of FIG. 7 can be implemented in a form that controls the gate-source voltage auxiliaryly for the necessary period during the voltage transition interval while adjusting the operating time so that the influence on the entire switching operation does not become excessive.

[0086] The power semiconductor device of FIG. 7 forms an auxiliary driving voltage at the control node (Ng) of the auxiliary switch (SWa) in conjunction with the voltage transition occurring at the drain electrode (D) of the power switch (SW), and forms a discharge path between the gate electrode (G) and the source electrode (S) of the power switch (SW) by turning on the auxiliary switch (SWa), thereby providing a principle that reinforces the ability to maintain the off state during the switching transition period and enables rapid turning off.

[0087] FIG. 8 is a second example circuit diagram of a power semiconductor device according to one embodiment.

[0088] Referring to FIG. 8, the power semiconductor device (800) may include a power switch (SW), an auxiliary switch (SWa), a capacitor Cgda, and a resistor Rtc.

[0089] The power switch (SW) may include a drain electrode (D), a gate electrode (G), and a source electrode (S), and can control the power flow between the drain electrode (D) and the source electrode (S) according to the gate-source voltage formed on the gate electrode (G).

[0090] The auxiliary switch (SWa) may include a drain node (Nd), a source node (Ns), and a control node (Ng), and the conduction state between the drain node (Nd) and the source node (Ns) may be controlled in response to a voltage formed at the control node (Ng). For example, the drain node (Nd) may be electrically connected to the gate electrode (G) of the power switch (SW), and the source node (Ns) may be electrically connected to the source electrode (S) of the power switch (SW). Accordingly, when the auxiliary switch (SWa) is turned on, a path may be formed through which charge can be discharged from the gate electrode (G) of the power switch (SW) to the source electrode (S).

[0091] A gate driver (GDRV) may be further illustrated in FIG. 8. The gate driver (GDRV) may include a driving voltage source (Vdrv) and a driving impedance (Zdrv), and the current supplied to or discharged from the gate electrode (G) may be limited by the driving impedance (Zdrv). Accordingly, a condition may be formed in which the potential of the gate electrode (G) does not change sufficiently quickly during the switching transition period.

[0092] A drain-gate capacitance (Cgd) and a gate-source capacitance (Cgs) may be formed in the power switch (SW). The drain-gate capacitance (Cgd) is a parasitic capacitance component between the drain electrode (D) and the gate electrode (G), and can act as a path through which voltage changes at the drain electrode (D) are coupled to the gate electrode (G). Such coupling can be explained by the so-called Miller effect, where the gate-source voltage fluctuates unintendedly during the switching transition period, and as a result, instantaneous turn-on or turn-off delay may occur in the off state. The gate-source capacitance (Cgs) is involved in the relationship between the amount of charge stored in the gate electrode (G) and the gate-source voltage, and can affect the time characteristics of the gate voltage change.

[0093] In FIG. 8, the capacitor Cgda can operate as a capacitive coupling structure. The capacitor Cgda may include at least a partial capacitance component and may provide a path through which a high-frequency displacement current can be transmitted to the auxiliary switch (SWa) in conjunction with a voltage transition at the power switch (SW). For example, in a voltage transition section where the voltage at the drain electrode (D) rises or falls rapidly, a displacement current may be generated through the capacitor Cgda, and this displacement current may induce the formation of an auxiliary voltage at the control node (Ng) of the auxiliary switch (SWa). In addition, as shown in FIG. 8, even when the capacitor Cgda is implemented in a form coupled to the drain electrode (D) side and the drain node (Nd) side, an operation in which voltage is induced to the control node (Ng) by a parasitic capacitance component inside the auxiliary switch (SWa) (e.g., parasitic coupling between the drain node (Nd) and the control node (Ng)) can be implemented. Consequently, the capacitor Cgda can provide a capacitive coupling path that causes a voltage to be formed at the control node (Ng) of the auxiliary switch (SWa) during the voltage transition period.

[0094] The resistor Rtc can operate as a resistive coupling structure. The resistor Rtc may include at least a partially resistive component and may be connected between the control node (Ng) and the source node (Ns). When a displacement current transmitted through the capacitor Cgda flows into the control node (Ng), the current flows through the resistor Rtc toward the source node (Ns), thereby forming a voltage difference between the control node (Ng) and the source node (Ns). If this voltage difference is formed to the extent that it can cause the auxiliary switch (SWa) to turn on, the auxiliary switch (SWa) can be turned on, and accordingly, a path can be additionally provided to allow charge to be discharged from the gate electrode (G) of the power switch (SW) to the source electrode (S). As a result, the phenomenon of the potential of the gate electrode (G) rising unintendedly during the switching transition period can be mitigated, and additionally, the gate charge discharge is assisted during the turn-off process, so that the off can be achieved more quickly.

[0095] Regarding capacitor Cgda, a capacitance component corresponding to capacitor Cgda may be provided by utilizing a gate shield structure inside the power switch (SW). The gate shield can be understood as a conductive structure that may be additionally placed inside the power switch (SW) to disperse the electric field or to mitigate electric field concentration around the gate electrode (G). A capacitor can be formed when an insulator is interposed between two facing conductive regions; if the gate shield has an opposing surface area with an insulating layer between the conductive region on the drain electrode (D) side and the gate shield, a capacitance component can be formed itself. Furthermore, since capacitance can increase as the opposing surface area increases, a capacitance component corresponding to capacitor Cgda can be secured without adding a separate large-area capacitor element by electrically isolating at least a portion of the gate shield area and connecting it to a specific node (e.g., control node (Ng) or drain node (Nd)). That is, the capacitor Cgda may be provided by the gate shield structure (or part of its area) inside the power switch (SW).

[0096] In addition, the resistance value of resistor Rtc can be an important parameter that determines the operating characteristics. The voltage formed at the control node (Ng) can change over time depending on the effective capacitance value of capacitor Cgda and the effective resistance value of resistor Rtc, and this time characteristic can be described by a time constant. For example, the time constant can typically be understood as “effective resistance x effective capacitance,” and as the time constant increases, the voltage formed at the control node (Ng) tends to be maintained for a longer period, while as the time constant decreases, the voltage at the control node (Ng) tends to decay more quickly. Therefore, when resistor Rtc is relatively large, the operation can be set to extend the turn-on time of the auxiliary switch (SWa) or the duration of the gate discharge, and when resistor Rtc is relatively small, the operation can be set to terminate in a shorter time. As such, the size of the resistor Rtc can be important in terms of setting the holding time of the control node (Ng) voltage.

[0097] The power semiconductor device (800) of FIG. 8 uses a capacitor Cgda and a resistor Rtc to induce a voltage to be formed at the control node (Ng) of the auxiliary switch (SWa) during the switching transition period, and by turning on the auxiliary switch (SWa), a discharge path is additionally formed between the gate electrode (G) and the source electrode (S) of the power switch (SW), thereby enabling the maintenance of the off state and rapid turning off.

[0098] FIG. 9 is a third example circuit diagram of a power semiconductor device according to one embodiment.

[0099] Referring to FIG. 9, the power semiconductor device (900) may include a power switch (SW), an auxiliary switch (SWa), a capacitor Cgda, and a resistor Rtc, similar to the power semiconductor device of FIG. 8. That is, the capacitor Cgda may operate as a capacitive coupling structure, the resistor Rtc may operate as a resistive coupling structure, and the auxiliary switch (SWa) may operate to form an auxiliary discharge path between the gate electrode (G) and the source electrode (S) of the power switch (SW) in response to the voltage formed at the control node (Ng).

[0100] FIG. 9 can be distinguished from FIG. 8 in that a Zener diode Zn may be additionally included. The Zener diode Zn may be arranged in a configuration that limits the voltage formed between the control node (Ng) and the source node (Ns) of the auxiliary switch (SWa), that is, between the control node (Ng) and the source electrode (S) of the power switch (SW). For example, the Zener diode Zn may be connected in parallel with a resistor Rtc, so that the Zener diode Zn conducts when the voltage between the control node (Ng) and the source node (Ns) is about to exceed a predetermined level, thereby clamping the voltage.

[0101] In the switching transition period, if the displacement current transmitted through the capacitor Cgda increases or if the voltage transition at the power switch (SW) is formed very rapidly, the voltage formed at the control node (Ng) may rise relatively significantly. At this time, if an excessively high voltage is formed at the control node (Ng), the gate of the auxiliary switch (SWa) (or the corresponding control node) may be subjected to overvoltage stress, and the operation of the auxiliary switch (SWa) may be excessively induced or its reliability may be affected. The Zener diode Zn of FIG. 9 can limit the voltage of the control node (Ng) in such situations, thereby protecting the auxiliary switch (SWa) from being subjected to excessive stress by the control voltage formed by the dV / dt operation.

[0102] In addition, the Zener diode Zn is a device having high-speed response characteristics and can be used to rapidly suppress transient voltages that occur for very short periods, such as during switching transitions. As described in the materials provided by the inventor, other fast regulators that perform a function similar to or are substituted for the Zener diode Zn may be included. That is, by limiting the voltage formed at the control node (Ng) to within a predetermined range, a protection function can be provided for the gate of the circuit linked to dV / dt (e.g., the control node of the auxiliary switch (SWa)).

[0103] The power semiconductor device of Fig. 9 may include a Zener diode Zn or other high-speed regulator in addition to the configuration of Fig. 8, and the configuration may operate to protect the gate of the dV / dt circuit by limiting the voltage formed at the control node (Ng) during the switching transition period.

[0104] FIG. 10 is a fourth example circuit diagram of a power semiconductor device according to one embodiment.

[0105] Referring to FIG. 10, the power semiconductor device (1000) may include a power switch (SW), an auxiliary switch (SWa), a capacitor Cgda, and a resistor Rtc, similar to the configuration of FIG. 8 and 9, and may further include a Zener diode Zn according to the embodiment. Also, FIG. 10 may show a gate driver (GDRV), a driving voltage source (Vdrv), and a driving impedance (Zdrv), and may also show the drain-gate capacitance (Cgd) and gate-source capacitance (Cgs) of the power switch (SW).

[0106] FIG. 10 can be distinguished from FIG. 8 and FIG. 9 in that a plurality of terminals may be provided so that an external resistor Rtca can be selectively connected to the power semiconductor device (1000). In FIG. 10, the first terminal T1 may be a terminal to which a gate driving signal is supplied. That is, through the first terminal T1, a gate driving signal generated from a driving voltage source (Vdrv) may be transmitted through a driving impedance (Zdrv) to a gate-side node of a power switch (SW) (e.g., a drain node (Nd) or a gate electrode (G) of a power switch (SW)).

[0107] In FIG. 10, the second terminal T2 and the third terminal T3 may be terminals provided to allow an external resistor Rtca to be connected. For example, the external resistor Rtca may be optionally connected between the second terminal T2 and the third terminal T3, and the external resistor Rtca may be implemented in a form coupled in parallel, series, or a combination of series and parallel to the resistor Rtc inside the power semiconductor device (1000). Consequently, the effective resistance value provided by the resistive coupling structure may be adjusted by the external resistor Rtca.

[0108] The external resistor Rtca can play a role in adjusting the time characteristics of the voltage formed at the control node (Ng) of the auxiliary switch (SWa) during the switching transition period. For example, the voltage formed at the control node (Ng) may have time characteristics described by a time constant based on the effective capacitance value of the capacitor Cgda and the effective resistance value of the resistive coupling structure, and if the effective resistance value changes due to the external resistor Rtca, the duration of the voltage formed at the control node (Ng) may change. Therefore, if the external resistor Rtca is set to a relatively large value, the voltage formed at the control node (Ng) can be adjusted to be maintained for a longer period, and accordingly, the turn-on duration of the auxiliary switch (SWa) or the duration of the gate discharge can be set to be longer. Conversely, if the external resistance Rtca is set to a relatively small value, the voltage of the control node (Ng) can be adjusted to decay more quickly, and the operation of the auxiliary switch (SWa) can be set to end in a shorter time. In this way, the external resistance Rtca can be used as a factor to tune the operating characteristics of the power semiconductor device (1000) to match system conditions.

[0109] Additionally, the external resistor Rtca can be used to adjust the auxiliary discharge operation provided by the power semiconductor device (1000) so that it is not excessive or insufficient, even if system conditions such as the layout of the power converter, switching frequency, voltage level, and the driving impedance (Zdrv) of the gate driver (GDRV) change. For example, under conditions where the slope (dV / dt) of the voltage transition increases, the voltage induced at the control node (Ng) may increase; therefore, by using the external resistor Rtca to appropriately set the operating window of the auxiliary switch (SWa), excessive operation can be suppressed or the operation can be adjusted to be performed only for the necessary period. Conversely, the external resistor Rtca can also be adjusted so that sufficient auxiliary discharge is performed even under conditions where dV / dt is relatively small.

[0110] The power semiconductor device (1000) of FIG. 10, in addition to the configuration of FIG. 8 and FIG. 9, can provide a structure in which a gate driving signal can be supplied through a first terminal T1, and an external resistor Rtca can be selectively connected through a second terminal T2 and a third terminal T3. Accordingly, the effective resistance value of the resistive coupling structure defined by the resistor Rtc can be adjusted by the external resistor Rtca, and the time constant formed in combination with the capacitor Cgda and the holding time of the control node (Ng) voltage can be set according to system conditions.

[0111] Additionally, in the embodiment of FIG. 10, a voltage limiting element or another fast regulator corresponding to the Zener diode Zn may be provided outside the power semiconductor device (1000), and in this case, the voltage limiting element or the fast regulator may be selectively connected through the second terminal T2 and the third terminal T3. For example, by connecting the Zener diode Zn or the fast regulator between the second terminal T2 and the third terminal T3, the voltage formed between the control node (Ng) and the source node (Ns) of the auxiliary switch (SWa) may be configured to be limited from rising above a predetermined level.

[0112] Meanwhile, in a power semiconductor device according to one embodiment, a power switch, an auxiliary switch, a capacitive coupling structure, and a resistive coupling structure can be monolithically integrated on the same semiconductor substrate. For example, the drain electrode, gate electrode, and source electrode of the power switch, the drain node, source node, and control node of the auxiliary switch, the capacitance component of the capacitive coupling structure, and the resistive component of the resistive coupling structure can be formed on the same semiconductor substrate. Accordingly, parasitic inductance or parasitic resistance that may be added by wiring between discrete devices can be relatively reduced, and more predictable time characteristics for high-frequency components in the switching transition period can be secured. In addition, monolithic integration can be used to implement short and uniform connections between the gate electrode of a power switch and the drain node of an auxiliary switch, connections between the source node of an auxiliary switch and the source electrode of a power switch, and resistive coupling paths between a control node and a source node.

[0113] In addition, a power semiconductor device according to one embodiment may include a gallium nitride (GaN)-based semiconductor structure. For example, the GaN-based semiconductor structure may include a GaN-based semiconductor layer and a barrier layer (e.g., AlGaN-based) combined therewith, and may be implemented as a high electron mobility transistor (HEMT) structure in which a channel is formed by these. As another example, the GaN-based semiconductor structure may be implemented as a Metal-Insulator-Semiconductor (MIS) structure including a GaN-based semiconductor layer, an insulating layer, and a gate electrode. When such a GaN-based semiconductor structure is included, switching can be performed at high speed, so the voltage transition period at the switching node may be shortened, and consequently, gate voltage fluctuations caused by dV / dt events may become a problem. Therefore, a configuration that auxiliaryly controls the gate-source voltage using high-frequency components in the switching transition period can be particularly effectively applied.

[0114] Additionally, for convenience of explanation, the term “control node of the auxiliary switch” was used in FIGS. 7 to 10, but the control node may be provided by the gate electrode of the auxiliary switch, and the drain node and source node of the auxiliary switch may be provided by the drain electrode and source electrode of the auxiliary switch, respectively. Furthermore, the drain node of the auxiliary switch may be electrically connected to the gate electrode of the power switch, and more specifically, may be electrically connected to a gate wiring node that includes the gate electrode of the power switch. For example, when the gate electrode of the power switch is electrically connected to an external gate driver, the drain node of the auxiliary switch may be connected to a gate wiring node to which the driving path of the external gate driver is connected.

[0115] Additionally, the source node of the auxiliary switch may be electrically connected to the source electrode of the power switch, and according to the embodiment, the source electrode of the power switch and the source node of the auxiliary switch may form a common source electrode. For example, the power switch and the auxiliary switch may be implemented to share the same metal layer or the same conductive layer to form a source-side node.

[0116] Additionally, the capacitive coupling structure may include at least a capacitance component and provide a high-frequency displacement current path between the drain electrode of the power switch and the control node of the auxiliary switch. In this case, the capacitive coupling structure may include at least one capacitor element and, according to an embodiment, may include at least a portion of the area of ​​the gate shield electrode formed on the power switch. The gate shield electrode may be electrically connected to the control node of the auxiliary switch, and the high-frequency displacement current path may be provided at least partially by the capacitance component formed between the gate shield electrode and the drain electrode of the power switch.

[0117] Additionally, the resistive coupling structure may include at least partially resistive components and may be connected between the control node of the auxiliary switch and the source electrode of the power switch. Accordingly, an auxiliary gate-source voltage may be formed between the control node of the auxiliary switch and the source electrode of the power switch by the current transmitted through the high-frequency displacement current path. Additionally, the auxiliary switch may be turned on when the auxiliary gate-source voltage formed at the control node exceeds a preset threshold value, and the turning on of the auxiliary switch may cause charge to be discharged from the gate electrode of the power switch to the source electrode of the power switch.

[0118] In addition, the resistive coupling structure, together with the capacitive coupling structure, forms a time constant to set the holding time of the voltage formed at the control node of the auxiliary switch. For example, the time constant can be understood as the product of the effective resistance and the effective capacitance; as the time constant increases, the control node voltage tends to be held for a longer period, and as the time constant decreases, the control node voltage tends to decay more quickly. Therefore, depending on the values ​​of the resistive component of the resistive coupling structure (e.g., resistor Rtc) and the capacitance component of the capacitive coupling structure (e.g., capacitor Cgda), the turn-on holding time of the auxiliary switch or the duration of the power switch gate charge discharge can be set.

[0119] Additionally, according to an embodiment, at least one terminal may be provided to allow an external resistor to be selectively connected to at least one resistor element in parallel, in series, or in a combination of series and parallel. For example, a gate driving signal may be supplied through the first terminal T1, and an external resistor may be selectively connected through the second terminal T2 and the third terminal T3. Accordingly, the effective resistance value of the resistive coupling structure may be adjusted by the external resistor, and the time constant and the holding time of the control node voltage may be set according to system conditions. Additionally, a Zener diode or other high-speed regulator may be selectively connected through the second terminal T2 and the third terminal T3, thereby limiting the voltage formed between the control node and the source electrode from rising above a predetermined level.

[0120] FIG. 11 is a diagram showing the difference in efficiency depending on whether one embodiment is applied.

[0121] Referring to FIG. 11, the horizontal axis represents the size of the low-side switching element (SWL), and “Scale 1” may be a scale indicating the relative size with a normalized element size (e.g., LK4718 size) set to 1. The vertical axis may represent efficiency. Additionally, in the legend, “Applied” may indicate the case where the configuration of the present embodiment is applied, and “Not Applied” may indicate the case where the configuration of the present embodiment is not applied.

[0122] In the case of “not applied” in Fig. 11, efficiency may increase as the SWL size increases up to a certain range, but after a certain size, efficiency may gradually decrease, and in larger size ranges, the decrease in efficiency may be more significant. For example, as the SWL size increases, parasitic components and gate charges of the switching device may tend to increase, and voltage transitions and gate voltage fluctuations in the switching transition range may lead to increased losses. As a result, there may be a tendency for efficiency to decrease rapidly in the range where the SWL size is large.

[0123] On the other hand, in the case of “application” in Fig. 11, even if the SWL size changes, the efficiency can be maintained at a relatively high level, and in particular, the decrease in efficiency can be mitigated even in the section where the SWL size is large. This is because the gate-source voltage of the switching element is controlled auxiliaryly in conjunction with the voltage transition in the switching transition section, and an operation is provided to maintain the off state, thereby suppressing losses caused by unintended instantaneous turn-on or turn-off delays. In addition, when the gate charge discharge is assisted during the turn-off process, the operation is performed in a direction that shortens the voltage transition section, thereby mitigating switching losses.

[0124] FIG. 11 exemplarily shows that the efficiency degradation of “applied” compared to “not applied” can be small under conditions where the SWL size increases. In other words, the application of this embodiment can provide design freedom regarding changes in the size of the low-side switching element and can contribute to mitigating the phenomenon of a sharp drop in efficiency that may occur after a certain size range.

[0125] As described above, according to the present embodiment, the switching operation can be performed stably despite the influence of voltage shifts and parasitic components that may occur during the process of switching a switching element at a high frequency in a power converter. Furthermore, according to the present embodiment, the problem of unintended instantaneous turn-on or turn-off delays occurring due to voltage changes (dV / dt) at the switching node and non-ideal elements in the gate driving path can be mitigated. Additionally, according to the present embodiment, the gate-source voltage of the switching element can be appropriately maintained to suppress cross-conduction or increased power loss during the switching transition period.

[0126] Terms such as "include," "compose," or "have" as described above, unless specifically stated otherwise, mean that the relevant component may be inherent; therefore, they should be interpreted as allowing for the inclusion of additional components rather than excluding them. All terms, including technical or scientific terms, have the same meaning as generally understood by those skilled in the art to which the present invention pertains, unless otherwise defined. Commonly used terms, such as those defined in advance, should be interpreted in accordance with their meaning in the context of the relevant technology and should not be interpreted in an ideal or overly formal sense unless explicitly defined in the present invention.

[0127] The foregoing description is merely an illustrative explanation of the technical concept of the present invention, and those skilled in the art to which the present invention pertains will be able to make various modifications and variations within the scope of the essential characteristics of the present invention. Accordingly, the embodiments disclosed in the present invention are intended to explain, not limit, the technical concept of the present invention, and the scope of the technical concept of the present invention is not limited by these embodiments. The scope of protection of the present invention shall be interpreted by the claims below, and all technical concepts within an equivalent scope shall be interpreted as being included within the scope of rights of the present invention.

Claims

1. A power switch that controls the power flow between a drain electrode and a source electrode; An auxiliary switch comprising a control node for auxiliaryly controlling the gate-source voltage between the gate electrode of the power switch and the source electrode; and A capacitive coupling structure comprising at least partially a capacitance component and providing a high-frequency displacement current path between the drain electrode of the power switch and the control node of the auxiliary switch. A power semiconductor device including 2. In Paragraph 1, A power semiconductor device comprising a resistive coupling structure that includes at least partially a resistive component, wherein an auxiliary gate-source voltage is formed between the control node of the auxiliary switch and the source electrode of the power switch by the current transmitted through the above high-frequency displacement current path.

3. In Paragraph 2, A power semiconductor device wherein the above capacitive coupling structure comprises at least one capacitor element, and the above resistive coupling structure comprises at least one resistor element.

4. In Paragraph 3, A power semiconductor device further comprising a Zener diode connected in parallel with at least one resistor element to clamp the voltage between the control node of the auxiliary switch and the source electrode of the power switch.

5. In Paragraph 3, The power switch, the auxiliary switch, the capacitive coupling structure, and the resistive coupling structure are monolithically integrated on the same semiconductor substrate, and A power semiconductor device further comprising at least one terminal that allows an external resistor to be selectively connected to the above-mentioned at least one resistor element in parallel, in series, or in a combination of series and parallel.

6. In Paragraph 1, The above capacitive coupling structure includes at least a portion of the area of ​​the gate shield electrode formed in the power switch, and The gate shield electrode is electrically connected to the control node of the auxiliary switch, and A power semiconductor device in which the high-frequency displacement current path is at least partially provided by a capacitance component formed between the gate shield electrode and the drain electrode of the power switch.

7. In Paragraph 1, The above auxiliary switch includes a drain node, a source node, and the control node, and The drain node of the above auxiliary switch is electrically connected to the gate electrode of the above power switch, and A power semiconductor device in which the source node of the above auxiliary switch is electrically connected to the source electrode of the above power switch.

8. In Paragraph 7, The above auxiliary switch is turned on when the auxiliary gate-source voltage formed at the control node exceeds a preset threshold value, A power semiconductor device that allows charge to be discharged from the gate electrode of the power switch to the source electrode of the power switch.

9. In Paragraph 7, A power semiconductor device in which the source electrode of the power switch and the source node of the auxiliary switch form a common source electrode.

10. In Paragraph 7, The gate electrode of the above power switch is electrically connected to an external gate driver, and A power semiconductor device in which the drain node of the above auxiliary switch is electrically connected to a gate wiring node including the gate electrode of the above power switch.

11. In Paragraph 2, The above resistive coupling structure is a power semiconductor device connected between the control node of the auxiliary switch and the source electrode of the power switch.

12. In Paragraph 2, A power semiconductor device wherein the above resistive coupling structure forms a time constant together with the above capacitive coupling structure to set the holding time of the voltage formed at the control node of the above auxiliary switch.

13. A first switching element connected between a DC input terminal and a switching node; A second switching element connected between the above switching node and the reference potential terminal; and It includes at least one gate driver that provides a gate driving signal to the first switching element and the second switching element, and A power conversion device in which at least one of the first switching element and the second switching element is a power semiconductor device according to any one of claims 1 to 12.

14. In Paragraph 13, The above power semiconductor device is a power conversion device comprising a gallium nitride (GaN)-based semiconductor structure.

15. In Paragraph 13, The first switching element and the second switching element form a half-bridge, and The above switching node is a power conversion device that is a common connection node of the first switching element and the second switching element.

16. In Paragraph 13, A power conversion device configured such that the power semiconductor device is configured to discharge charge from the gate electrode of the second switching device to the source electrode of the second switching device so that the second switching device remains in an off state during a voltage transition section in which the voltage of the switching node rises.

17. In Paragraph 13, The above power semiconductor device turns on the auxiliary switch by a dV / dt event at the switching node, and A power conversion device configured such that a discharge path is formed between the gate electrode of the second switching element and the source electrode of the second switching element by turning on the auxiliary switch.

18. In Paragraph 13, The above at least one gate driver provides a complementary gate driving signal including a dead time for the first switching element and the second switching element, and A power conversion device in which the power semiconductor device is configured to maintain the off state of the second switching device during the dead time.

19. In Paragraph 13, The above power semiconductor device is the above first switching device, and A power conversion device configured to form an additional discharge path that allows charge to be discharged from the gate electrode of the first switching element to the source electrode of the first switching element in response to an increase in the drain-source voltage of the first switching element during a voltage transition section in which the first switching element is turned off.

20. A power switching stage comprising at least one switching element; and It includes at least one gate driver that provides a gate driving signal to the above at least one switching element, and A switching power supply, wherein at least one switching element is a power semiconductor element according to any one of claims 1 to 12.

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