Dry planarization and polishing of diamond wafers using multi-stage plasma etching

Abstract

A method polishes a surface of a diamond wafer using a first dry plasma etching stage within a plasma processing chamber. The first stage operates under a first set of conditions configured to provide a relatively higher mechanical etch component and a relatively higher material removal rate than a second dry plasma etching stage.. The second stage operates under a second set of conditions configured to provide a relatively greater chemical etch contribution and a relatively lower material removal rate than the first stage. The second stage is configured to reduce surface roughness of the top surface to a final roughness value lower that is lower than an intermediate roughness value. The second stage also is configured to produce a near-surface region of the diamond wafer that has a defect density no greater than about 1.5 times the bulk defect density of the diamond wafer.

Description

[0001] 126324 / 13302-LAN#7902969.1

[0002] 3 / 17 / 2026

[0003] 1

[0004] DRY PLANARIZATION AND POLISHING OF DIAMOND WAFERS USING MULTI-STAGE PLASMA ETCHING

[0005] PRIORITY

[0006] This patent application claims priority from provisional United States patent application number 63 / 773,276, filed March 17, 2025, entitled, “DRY PROCESS OF POLISHING DIAMOND WAFER,” and naming John Ciraldo as inventor, the disclosure of which is incorporated herein, in its entirety, by reference.

[0007] FIELD

[0008] Illustrative embodiments generally relate to diamonds and, more particularly, various embodiments relate to polishing diamonds.

[0009] BACKGROUND

[0010] Polishing diamond wafers is an important step in refining lab-grown diamonds for industrial and electronic applications. The process typically begins with mechanical polishing, where the rough wafer surface is smoothed using diamond grit abrasives. Since diamond is the hardest known material, only finer diamond particles can effectively grind and polish its surface. This typically is done using a lapping machine equipped with a rotating metal plate coated with diamond slurry. The wafer is pressed against the plate under controlled pressure, gradually reducing surface roughness and achieving a uniform finish.

[0011] After mechanical polishing, a chemical-mechanical polishing (CMP) step typically is employed to further enhance the wafer’s surface quality. In this process, a reactive chemical agent is used along with nano-sized diamond abrasives to achieve a finer smoothness. CMP minimizes subsurface damage, removes micro-defects, and improves transparency.

[0012] Unfortunately, these processes often damage or otherwise change the crystal lattice of the diamond. Among other issues, damaging the diamond lattice disrupts its crystalline structure, leading to several issues depending on the application. In optics and laser technologies, lattice defects introduce scattering centers, reducing transparency, and degrading light transmission. For semiconductors and quantum126324 / 13302-LAN#7902969.1

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[0015] computing, defects create unwanted energy states and charge traps, negatively impacting the performance of diamond-based transistors, NV (nitrogen-vacancy) centers, and sensors.

[0016] Mechanically, damage weakens the diamond’s structural integrity, making it more prone to fracture, which is problematic for cutting tools, high-pressure anvils, and industrial applications. Additionally, thermal conductivity — one of diamond’s valuable properties — can be compromised, reducing its effectiveness in heat dissipation for high-power electronics.

[0017] SUMMARY OF VARIOUS EMBODIMENTS

[0018] In accordance with one example, a method polishes a surface of a diamond wafer. The method provides a diamond wafer having a top surface and performs a first dry plasma etching stage on the top surface of the diamond wafer within a plasma processing chamber. The first dry plasma etching stage operates under a first set of conditions configured to provide a relatively higher mechanical etch component and a relatively higher material removal rate than a second dry plasma etching stage. The first dry plasma etching stage is configured to reduce surface roughness of the top surface from an initial roughness value to an intermediate roughness value. A second dry plasma etching stage is performed on the top surface of the diamond wafer within a plasma processing chamber. The second dry plasma etching stage operates under a second set of conditions configured to provide a relatively greater chemical etch contribution and a relatively lower material removal rate than the first dry plasma etching stage. The second dry plasma etching stage is configured to reduce surface roughness of the top surface to a final roughness value lower that is lower than the intermediate roughness value. The second dry plasma etching stage also is configured to produce a near-surface region of the diamond wafer that has a defect density no greater than about 1.5 times the bulk defect density of the diamond wafer.

[0019] In some embodiments, the conditions of the first and second plasma etching stages may differ in both gas composition and ion bombardment energy. For example, the first plasma stage may employ a higher ratio of a non-reactive heavy bombardment gas to a reactive gas, along with a higher substrate bias level, while the second plasma stage may employ a lower ratio of the non-reactive heavy126324 / 13302-LAN#7902969.1

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[0022] bombardment gas to the reactive gas and a lower substrate bias level. Suitable non-reactive heavy bombardment gases may include argon, xenon, or combinations thereof, while suitable reactive gases may include oxygen, fluorine-containing gases, chlorine-containing gases, sulfur-containing gases, or combinations thereof.

[0023] Prior to the plasma etching stages, the diamond wafer may be planarized to provide an initial surface roughness suitable for subsequent dry plasma polishing. Such planarization may be achieved by one or more processes including lapping, grinding, laser-based surface preparation, and reactive ion beam etching.

[0024] In some embodiments, the transition from the first plasma stage to the second plasma stage may be implemented as a continuous or gradient transition, in which one or more process parameters, such as substrate bias level, gas composition, and / or inductive coil power, are varied gradually over a transition period, rather than through discrete step changes. In this manner, the process may evolve from a more aggressive, higher-removal-rate regime to a gentler, lower-damage finishing regime.

[0025] The resulting surface may exhibit a final roughness of less than about 5 nanometers Ra and, in some embodiments, a near-surface region that is substantially free of subsurface lattice damage beyond that intrinsic to the bulk crystal structure.

[0026] The process is particularly advantageous for larger diamond wafers, such as wafers having a diameter of at least about 42 millimeters, because the plasma-based etching stages are performed without mechanical contact between a polishing surface and the wafer surface. As a result, the process avoids the force-scaling and surfacedamage issues associated with conventional contact-based polishing techniques. In accordance with another implementation, a plasma processing system is configured to polish a surface of a diamond wafer using a multi-stage dry plasma process in which gas composition and ion bombardment energy are actively controlled. The system includes one or more gas flow controllers for supplying a non-reactive heavy bombardment gas and a reactive gas, a substrate bias power supply for accelerating ions toward the wafer surface, and an inductive coil power supply for generating a plasma within the processing chamber. A controller executes instructions to operate the system in a first plasma stage having a relatively higher mechanical etch component and higher material removal rate to reduce surface roughness to an intermediate level, and then, based on process signals indicative of surface or plasma126324 / 13302-LAN#7902969.1

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[0029] conditions, transitions to a second plasma stage having a relatively greater chemical etch contribution and lower material removal rate. The second stage further reduces surface roughness and removes damage introduced during the first stage, thereby producing a near-surface region having a defect density no greater than about 1.5 times the bulk defect density of the diamond wafer.

[0030] In some embodiments, the plasma processing system may further include one or more sensing devices configured to monitor conditions within the plasma processing chamber and / or at the surface of the diamond wafer during processing. Such sensing devices may include, for example, an optical emission spectrometer configured to detect emission signals from plasma byproducts at wavelengths associated with carbon-containing etch products, a laser interferometer configured to measure etch depth in real time, and / or an RF impedance monitor configured to detect changes in plasma impedance. The controller may be configured to evaluate signals from these sensing devices to determine when to transition between process stages. For example, the predetermined transition criterion may include one or more of: a detected change in an optical emission signal indicative of a change in material removal rate, a calculated etch depth reaching a predetermined threshold, a detected change in plasma impedance correlating with a change in surface condition, and / or an elapsed process time reaching a predetermined duration.

[0031] In some embodiments, the transition from the first set of conditions to the second set of conditions may be implemented as a continuous or gradient transition. For example, the controller may cause the system to continuously vary one or more process parameters — including substrate bias level, the ratio of non-reactive heavy bombardment gas to reactive gas, inductive coil power, and / or chamber pressure — over a predetermined ramp period. In this manner, the system transitions gradually from the first set of conditions to the second set of conditions without a discrete parameter step change, thereby implementing a smooth transition between a more aggressive plasma regime and a gentler finishing regime.

[0032] In various embodiments, the system may be configured to tailor process conditions based on characteristics of the diamond wafer. For example, prior to performing the first plasma stage, the controller may receive a wafer characteristic input identifying one or more properties of the wafer, such as crystallographic126324 / 13302-LAN#7902969.1

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[0035] orientation and / or wafer diameter. In response, the controller may select a process recipe from a plurality of stored recipes, each specifying corresponding first and second stage conditions. By way of example, for a diamond wafer having a (111) crystallographic orientation, the selected process recipe may specify a greater mechanical etch component during the first plasma stage relative to a process recipe selected for a diamond wafer having a (100) or (110) crystallographic orientation.

[0036] In some embodiments, the one or more process signals used to control stage transitions and process adjustments may be received from sensing devices coupled to the plasma processing chamber, enabling real-time or near-real-time feedback control of the plasma etching process.

[0037] In accordance with another example, a method of finishing a diamond wafer provides a diamond wafer having a planarized surface. The planarized surface is exposed to a first plasma etching stage configured to operate in an aggressive regime having a first material removal rate. The first plasma etching stage includes ion bombardment sufficient to reduce the surface roughness of the planarized surface to an intermediate roughness between about 10 nanometers and about 20 nanometers. The first plasma etching stage produces a near-surface region containing lattice damage. The method further includes a second plasma etching stage configured to operate in a gentle regime having a second material removal rate lower than the first material removal rate. The second plasma etching stage is more chemically dominated and less mechanically aggressive than the first plasma etching stage. The second plasma etching stage removes material from the near-surface region containing the lattice damage produced during the first plasma etching stage. The process thereby produces a finished surface having an average surface roughness of less than about 5 nanometers and a surface defect density no greater than about 1.5 times a bulk defect density of the diamond wafer.

[0038] In some embodiments, the planarized surface of the diamond wafer has an average surface roughness of less than about 200 nanometers prior to the first plasma etching stage. In certain embodiments, the planarized surface may have an average surface roughness greater than about 30 nanometers, such that the first plasma etching stage operates to reduce the surface roughness from a relatively rough but planarized126324 / 13302-LAN#7902969.1

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[0041] condition to the intermediate roughness range suitable for the subsequent gentle finishing stage.

[0042] In yet another implementation, a method of polishing a diamond wafer includes planarizing a diamond wafer to a first surface roughness of less than approximately 150 nm Ra. The method performs a first plasma dry etch step under conditions comprising a higher ratio of non-reactive gas to reactive gas and / or a higher RF bias. This first step reducing the surface roughness to approximately 10-15 nm Ra. The method further includes performing a second plasma dry etch step under conditions comprising a higher ratio of reactive gas to non-reactive gas and / or a lower RF bias. This second step reduces the surface roughness to less than 5 nm Ra and achieves a surface defect density no greater than approximately 1.5 times the bulk crystal defect density.

[0043] The second plasma dry etch step may be performed with a reduced RF bias applied to the plasma chamber as compared to the first plasma dry etch step and / or with an increased ratio of reactive gas relative to non-reactive gas. The planarization step may comprise reactive ion beam etching (RIBE), for example using co-etching of a resist layer and the diamond surface to transfer planarity from the resist layer to the diamond wafer.

[0044] A diamond wafer produced by the method may exhibit a surface roughness Ra of less than about 1 nanometer and a surface defect density no greater than about 1.5 times the bulk defect density of the diamond crystal. The wafer may have a diameter of at least about 50 millimeters and less than about 300 millimeters.

[0045] A diamond wafer may include a bulk diamond crystal body having an intrinsic bulk defect density and a top surface produced by a dry plasma polishing process. The top surface may exhibit an average surface roughness of less than about 5 nanometers Ra and a near-surface region having a defect density no greater than about 1.5 times the intrinsic bulk defect density of the bulk diamond crystal body, with the near-surface region being substantially free of subsurface lattice damage beyond that intrinsic to the bulk crystal structure. In certain implementations, the average surface roughness may be less than about 1 nanometer Ra, less than or equal to about 0.5 nanometers Ra, or may approach angstrom-scale roughness, for example on the order of approximately 2 A or lower.126324 / 13302-LAN#7902969.1

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[0048] The diamond wafer may have a diameter of at least about 42 millimeters, and the top surface may exhibit the described average surface roughness substantially uniformly across the full diameter of the surface. The bulk diamond crystal body may be a single-crystal diamond body formed by chemical vapor deposition (CVD) or high-pressure high-temperature (HPHT) growth, and the top surface may correspond to a crystallographic orientation selected from the group consisting of (100), (110), (111), and combinations thereof.

[0049] Illustrative embodiments of the invention are implemented as a computer program product having a computer usable medium with computer readable program code thereon. The computer readable code may be read and utilized by a computer system in accordance with conventional processes.

[0050] BRIEF DESCRIPTION OF THE DRAWINGS

[0051] Those skilled in the art should more fully appreciate advantages of various embodiments of the invention from the following “Description of Illustrative Embodiments,” discussed with reference to the drawings summarized immediately below.

[0052] Figure 1 shows a process of an example method for processing a diamond surface using a multi-stage dry plasma polishing sequence, in accordance with illustrative embodiments.

[0053] Figure 2 is a graph illustrating the progression of surface roughness and material removal rate across the pre-planarization, aggressive smoothing, and gentle finishing stages of the dry plasma polishing process, in accordance with illustrative embodiments.

[0054] Figures 3A-3C are schematic cross-sectional views of a diamond wafer surface after various stages, in accordance with illustrative embodiments.

[0055] Figure 4 schematically shows across-sectional view of an example inductively coupled plasma, in accordance with illustrative embodiments.

[0056] Figure 5 is a schematic diagram illustrating the relative proportions of non-reactive heavy bombardment gas and reactive gas in the plasma processing environment during the aggressive smoothing stage and the gentle finishing stage, in accordance with illustrative embodiments.126324 / 13302-LAN#7902969.1

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[0059] Figure 6 is a comparative diagram showing various process parameters in accordance with illustrative embodiments.

[0060] Figure 7 schematically shows details of the reactor controller configured in accordance with illustrative embodiments.

[0061] DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS

[0062] In illustrative embodiments, a scalable plasma-based method for polishing diamond wafers uses sequential dry etch regimes that transition from an aggressive higher-removal-rate smoothing stage to a gentler, lower-damage finishing stage. A diamond wafer that has been planarized to a moderate roughness (for example by lapping, grinding, laser preparation, or resist-assisted ion-beam planarization such as RIBE) is subjected to a first plasma process that has a more aggressive material removal rate. Because the aggressive conditions may introduce subsurface lattice damage, the wafer is subsequently processed in a second plasma process that is relatively more chemically dominated and less mechanically aggressive, thereby removing the damaged near-surface layer and producing a very smooth, low-defect surface. In various embodiments, the relative aggressiveness of the stages is controlled by combinations of gas chemistry, heavy inert bombardment gases (e.g., argon or xenon), reactive gases capable of chemically etching diamond (e.g., oxygen, fluorine-, chlorine-, or sulfur-containing gases), bias power, plasma density, and / or related process parameters. Details of illustrative embodiments are discussed below.

[0063] As used throughout this description, unless explicitly stated otherwise, any feature, structure, step, or function described in connection with one embodiment may be used independently of that embodiment and may be combined with any feature, structure, step, or function described in connection with any other embodiment, in any technically feasible combination. References to components or embodiments as alternatives are for illustrative purposes only and do not imply that such components or embodiments are mutually exclusive, unless explicitly stated. The described embodiments are illustrative only and are not intended to limit the scope of the invention to the specific combinations shown.

[0064] Any feature, structure, step, or functional relationship that is described only once or in connection with a single embodiment is nevertheless intended to be126324 / 13302-LAN#7902969.1

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[0067] generally applicable throughout this description, unless explicitly stated otherwise. Such features may be implemented independently of the particular embodiment in which they are described and may be combined with any other features described herein, in any technically feasible manner.

[0068] Figure 1 schematically shows an example method for processing a diamond wafer to produce a surface having low roughness and reduced subsurface lattice damage in accordance with illustrative embodiments. Such surfaces may be suitable for a variety of applications including electronic devices, optical components, epitaxial growth substrates, and quantum-device platforms.

[0069] It should be noted that this method is substantially simplified from a longer process that may normally be used. Accordingly, the method shown in Figure 1 may have many other steps that those skilled in the art likely would use. In addition, some of the steps may be performed in a different order than that shown, or at the same time. Furthermore, some of these steps may be optional in some embodiments. For example, some embodiments may skip step 12. Furthermore, although many examples herein describe diamond wafers, the processes described may also be applied to other diamond substrates, plates, or components having a surface that can be exposed to plasma processing. Accordingly, the process is merely exemplary of one process in accordance with illustrative embodiments. Those skilled in the art therefore can modify the process as appropriate.

[0070] The method begins at step 10 by providing a diamond suitable for subsequent plasma-based surface processing. The diamond may be a single-crystal diamond wafer, a lab-grown diamond wafer, and / or another suitable diamond substrate. It may be intended for a variety of uses, for example, as an electronic-grade, optical-grade, epitaxial -grade, or quantum-grade substrate, and the methods described herein are not limited to any particular classification of diamond wafer.

[0071] In illustrative embodiments, the diamond wafer is formed from a larger diamond crystal that is first grown and then separated into wafer-shaped sections. For CVD growth, carbon-containing gases are decomposed in a plasma environment and carbon atoms are deposited onto a diamond seed to form a larger crystal over time. For HPHT growth, conditions allow carbon to crystallize onto a diamond seed and form a larger crystal structure. After a sufficiently large crystal has been formed, it126324 / 13302-LAN#7902969.1

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[0074] may be cut, sliced, or otherwise sectioned to produce one or more wafers having a generally planar geometry with opposing major surfaces.

[0075] In illustrative embodiments, the diamond wafer is formed using laser cutting techniques. Laser cutting is particularly well suited for diamond materials because the extreme hardness of diamond makes conventional wire-saw or mechanical-sawing approaches impractical. In a typical laser-cutting process, a high-energy laser beam, such as a pulsed, femtosecond, or picosecond laser source, is directed toward the diamond crystal to locally ablate or vaporize material along a predefined cutting path. Laser cutting may allow relatively precise control over the cutting path and may produce wafers with comparatively low initial roughness relative to mechanical cutting approaches. Although laser cutting is used in many embodiments, other cutting or wafer-formation processes, including combinations of techniques such as initial laser separation followed by mechanical edge trimming, may also be used.

[0076] Regardless of the specific cutting technique, the resulting wafer surface is not yet suitable for final device applications. The cutting process may leave the wafer with surface roughness, waviness, or total thickness variation (TTV) that must be reduced through subsequent planarization and polishing processes. Accordingly, the process proceeds to the surface preparation and plasma-based processing stages described below.

[0077] At step 12, the diamond wafer may undergo one or more surface preparation operations before the multi-stage dry polishing sequence. These operations condition the wafer surface so that the subsequent plasma-based processing stages can operate efficiently and predictably. The term planarizing as is not limited to traditional lapping; rather, it encompasses a variety of surface preparation processes capable of reducing roughness and improving surface planarity, including lapping, grinding, laser-based surface preparation, reactive ion beam etching (RIBE), and combinations of these techniques.

[0078] The preparation stage provides a sufficiently planar surface, sufficiently low roughness, and acceptable total thickness variation (TTV) to optimize the multi-stage dry plasma processing sequence that follows. Reducing surface roughness provides a surface morphology that can be efficiently processed by the aggressive plasma stage, and reducing TTV produces a sufficiently planar surface that allows plasma126324 / 13302-LAN#7902969.1

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[0081] processing to proceed uniformly across the wafer. In illustrative embodiments, the preparation stage may reduce average surface roughness (Ra) to less than about 200 nanometers, less than about 150 nanometers, less than about 100 nanometers, or in some embodiments less than about 50 nanometers. In various embodiments employing RIBE-based planarization, the preparation stage may achieve roughness values on the order of approximately 30 to 50 nanometers Ra, which falls within the broader less-than-50-nanometer range. Ra is the average of the absolute deviations of a measured surface profile from a mean line over a specified evaluation length, and is commonly used in the art as a measure of average surface roughness. In various embodiments, the wafer need not be fully polished prior to the plasma stages described herein. In some embodiments, the wafer may only be sufficiently planarized to allow the subsequent plasma stages to operate effectively.

[0082] An example planarized starting surface is schematically illustrated in Figure 3 A, showing wafer body 30 having a surface 32 with peaks and valleys representative of residual roughness Ra, and a near-surface damaged region 34 that may be introduced by prior processing steps.

[0083] In some embodiments, the wafer surface 32 may be planarized using lapping, which involves pressing the wafer 30 against a lapping plate or pad containing abrasive particles to gradually remove material and reduce surface roughness.

[0084] Lapping may also contribute to improved wafer flatness by reducing local variations in surface height. Diamond-based abrasives may be used to facilitate effective material removal from the diamond wafer surface 32.

[0085] In other embodiments, the wafer surface 32 may be prepared using reactive ion beam etching or related ion-beam planarization processes, in which energetic ions are directed toward the wafer surface 32 in a controlled manner to remove material and improve planarity. For example, an RIBE process may apply a spin-coated resist to the wafer surface 32 and co-etch the resist and diamond at a matched rate using combined argon ion bombardment and an oxygen plasma chemistry. Because the resist layer is relatively flat, this process can transfer its flatness to the diamond surface and produce a well-planarized wafer with roughness values on the order of 30 to 50 nanometers Ra. Ion-beam planarization may also be performed within a multichamber plasma processing tool, allowing the wafer to transfer directly from the126324 / 13302-LAN#7902969.1

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[0088] planarization chamber into the aggressive and gentle etch stages without breaking vacuum.

[0089] Roughness values in the approximate range of 30-50 nanometers Ra produced by RIBE-based planarization may be particularly well suited for the aggressive plasma stage described herein, providing a surface morphology that allows efficient roughness reduction while avoiding excessive processing time.

[0090] In some other embodiments, laser-based processing may be used to prepare the wafer surface 32. Laser processing techniques may include laser planarization, laser surface conditioning, or other methods that locally remove material or modify surface morphology.

[0091] In certain embodiments, the wafer surface 32 may be prepared using grinding operations that employ abrasive media to remove material and improve planarity. Grinding may be particularly useful when processing wafers 30 that exhibit relatively large surface irregularities after cutting.

[0092] In various implementations, the preparation stage may involve multiple techniques applied sequentially or in combination. For example, the wafer 30 may undergo an initial grinding process to improve overall flatness, followed by lapping to further reduce roughness, or ion-beam planarization followed by additional conditioning. Hybrid approaches may be particularly useful when preparing larger wafers 30 or when transitioning from earlier wafer-formation steps to the multi-stage dry polishing sequence.

[0093] The evolution of the wafer surface 32 through the processing sequence is conceptually illustrated in Figures 3A through 3C. These figures provide schematic representations of how surface 32 morphology changes as the wafer 30 progresses through the preparation stage and the subsequent plasma polishing stages. The figures are illustrative and conceptual in nature; the relative scale of surface features and the magnitude of roughness values are simplified for purposes of explanation.

[0094] The surface 32 refers to the outermost exposed surface of the diamond substrate 30 at any given point in the process and is intended to be understood in a dynamic and relative sense. During the various processing stages described herein, including planarization and plasma etching, material is progressively removed from the diamond, such that the physical location of the outermost surface 30 continuously126324 / 13302-LAN#7902969.1

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[0097] changes. Accordingly, these terms do not refer to a fixed interface, a particular crystallographic layer, or a specific initial surface, but rather to the then-current exposed surface on which processing is being performed. As material is removed, newly exposed underlying material becomes the relevant surface 30 for subsequent processing steps. Further, the use of top surface 32 is merely a convenient frame of reference and does not imply any particular spatial orientation, gravitational direction, or crystallographic orientation of the diamond wafer. The described processes may be applied to any suitably oriented surface, including surfaces of different crystallographic orientations, and the terminology should not be construed as limiting the invention to any specific orientation or configuration.

[0098] Figure 3 A illustrates the planarized but not yet fully polished starting surface 32 at the entry to the plasma stages at steps 14 and 16. Figure 3B schematically illustrates the wafer body 30 having the surface 32 with reduced-amplitude features relative to Figure 3 A, reflecting the roughness reduction achieved by the aggressive stage at step 12. However, a subsurface damaged layer 38 remains beneath the surface 32 as a result of energetic ion bombardment. This damaged region 38 may include dislocations in the diamond crystal lattice, localized lattice disorder, crystal disturbances caused by energetic ion impacts, and implantation-type effects in which ion species, particularly heavy ions such as those derived from argon, become embedded or trapped within the near-surface region of the crystal. Figure 3C illustrates the finished wafer surface 32 after the second, gentler finishing stage at step 16. Here, the wafer body 30 has a substantially smooth surface 32 with roughness average Ra approaching sub-nanometer or angstrom scale, and the near-surface region 42 exhibits a defect density approaching that of the bulk crystal, reflecting removal of the previously damaged material.

[0099] The plasma-based processing stages described herein may be carried out using a variety of plasma processing systems, and the description of example configurations below is intended to illustrate representative embodiments rather than limit various embodiments to a particular reactor design.

[0100] Figure 4 schematically shows a plasma processing chamber 50 in accordance with illustrative embodiments. The chamber is suitable for the various stages described herein. The chamber 50 may be an inductively coupled plasma (ICP)126324 / 13302-LAN#7902969.1

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[0103] reactor, and may provide separate power inputs for plasma generation and ion acceleration. An induction coil 56 positioned around the chamber 50 is driven by radio-frequency power to generate a high-density plasma within the chamber 50. A separate bias power supply 68 applied to the substrate electrode 52 controls ion acceleration toward the wafer 30. Gas is supplied through an inlet 60, and reaction byproducts are removed through exhaust port 62. A plasma region 64 is maintained within the chamber 59 interior. By independently adjusting the coil power supply 66 and the substrate bias power supply 68, the process can independently control plasma density and ion bombardment energy, providing flexible tuning of the mechanical and chemical contributions of the etch.

[0104] Referring to Figure 1, after the preparation stage, at step 14 the wafer surface 32 undergoes a first dry plasma processing stage configured to operate in a relatively aggressive smoothing regime. This stage efficiently reduces surface roughness and transitions the wafer from the planarized starting condition to an intermediate condition suitable for subsequent finishing.

[0105] The first stage is configured to reduce roughness from the pre-planarized starting condition to an intermediate level by efficiently attacking elevated surface features and reducing surface height variations across the wafer. It operates with a relatively high material removal rate compared with the later finishing stage, allowing it to rapidly smooth the surface morphology and bring the wafer into an intermediate regime.

[0106] The aggressive stage is advantageous because the finishing stage operates under relatively gentle conditions and is not well suited for processing a surface that is initially too rough. If the process were to begin directly with a gentle plasma etch on a rough surface, the etch would tend to behave conformally, (e.g., following the existing surface morphology rather than effectively reducing the amplitude of surface features). Peaks and valleys would be reduced only slowly, and roughness would remain relatively high even after extended processing. The aggressive stage therefore provides the high-removal-rate smoothing regime that makes the finishing stage practical. The functional relationship between the two stages is described further below.126324 / 13302-LAN#7902969.1

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[0109] In general terms, step 14 operates in a regime that is relatively more mechanically aggressive, more bombardment-driven, and higher in material removal rate than the finishing stage (at step 16), and it is more likely to induce subsurface lattice damage. These characteristics arise from energetic ion bombardment, relatively high ion energies, and gas chemistries that produce significant sputtering effects. Because the aggressive stage is optimized for roughness reduction and removal rate rather than minimal damage, it produces a near-surface damaged region that is addressed by the subsequent finishing stage.

[0110] A variety of process variables may be adjusted to produce the aggressive plasma etch conditions associated with this stage. Higher RF bias, higher DC bias, or increased ion acceleration toward the wafer surface 32 may increase the mechanical component of the etch. Higher source power, increased plasma density, or higher inductively coupled plasma (ICP) coil power may increase the flux of energetic ions interacting with the wafer surface 32. Gas composition may also be adjusted to increase the aggressive character of this stage: a relatively lower ratio of reactive gas to non-reactive heavy bombardment gas, a higher concentration or fraction of heavy inert gases such as argon or xenon, and a lower concentration or fraction of reactive gases such as oxygen, fluorine-containing chemistries, chlorine-containing chemistries, or sulfur-containing chemistries may each increase the mechanical sputtering component of the etch. Additional parameters including chamber pressure, substrate temperature, and process duration may also influence the aggressive character of this stage.

[0111] Plasma chemistries suitable for the aggressive stage include mixtures of a non-reactive heavy bombardment gas, such as argon, and / or xenon, with a reactive gas such as oxygen, a fluorine-containing chemistry, a chlorine-containing chemistry, and / or a sulfur-containing chemistry. In various embodiments, the first stage uses a relatively higher fraction of the non-reactive bombardment gas and a relatively lower fraction of the reactive gas compared with the finishing stage.

[0112] In various embodiments, the starting roughness of the wafer surface 32 entering the aggressive stage may be less than about 200 nanometers Ra, less than about 150 nanometers Ra, or less than about 100 nanometers Ra, depending on the preparation technique used. After the aggressive plasma stage, roughness may be126324 / 13302-LAN#7902969.1

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[0115] reduced to an intermediate range of approximately 10 to 20 nanometers Ra, and in various embodiments approximately 10 to 15 nanometers Ra. In one illustrative example, a wafer surface 32 with initial roughness of approximately 150 nanometers Ra may undergo material removal on the order of 200 to 300 nanometers to reach this intermediate condition.

[0116] Because this stage involves significant ion bombardment, it may introduce subsurface lattice damage in the near-surface region 38 of the diamond wafer 30, as conceptually illustrated in Figure 3B. This damage may include crystal defects such as dislocations, localized lattice disorder, and implantation-type effects in which ion species become embedded within the near-surface region, as described above. The depth 35B of the damaged region 38 may depend on ion energy, gas species, and process conditions, but may generally be less than about 10 micrometers, less than about 5 micrometers, and in many cases less than about 1 micrometer. This damage is substantially or completely removed during the subsequent finishing stage at step 16.

[0117] The process then continues to step 16, where the wafer surface 32 is subjected to a second dry plasma processing stage configured to operate in a relatively gentler finishing regime. This gentler stage forms the second portion of the multi-stage dry polishing process and is configured to reduce remaining surface roughness while removing material containing defects introduced by earlier processing.

[0118] The second stage (also referred to as the gentle stage or finishing stage) refines the wafer surface 32 after the intermediate condition produced by the aggressive stage. It further reduces surface roughness, removes material containing subsurface damage introduced by the aggressive stage and prior preparation processes, and produces a surface condition approaching that required for polished wafers, epitaxial growth substrates, or quantum-device applications.

[0119] The finishing stage is advantageous because the aggressive stage alone does not practically achieve the desired final surface condition. After the wafer surface 32 has reached an intermediate roughness level on the order of tens of nanometers Ra, continued operation in the aggressive regime produces diminishing returns. In other words, the surface morphology may cease to improve substantially, the aggressive bombardment conditions may continue to maintain a characteristic roughness floor and damage floor, and additional processing primarily results in wafer thinning rather126324 / 13302-LAN#7902969.1

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[0122] than improved surface quality. By transitioning to gentler conditions with reduced mechanical bombardment and greater chemical contribution, the finishing stage can remove previously damaged material and achieve a smoother, lower-damage surface that the aggressive stage cannot reach.

[0123] The finishing stage operates under conditions that are relatively lower in material removal rate, lower in effective mechanical bombardment, higher in chemical contribution, and less likely to introduce additional subsurface lattice damage than the aggressive stage. Because the mechanical component of the etch is reduced, material is removed in a more controlled and less damaging manner, allowing the process to remove previously damaged near-surface material while further improving surface smoothness.

[0124] The finishing stage may be produced by reducing ion bombardment energy, for example by lowering RF bias, DC bias, or other ion-acceleration conditions, and / or by reducing plasma density through lower source power or ICP coil power. Gas composition may also be adjusted so that the plasma chemistry becomes more chemically dominated, for example by increasing the relative fraction of reactive gas species such as oxygen, fluorine-containing chemistries, chlorine-containing chemistries, or sulfur-containing chemistries, while decreasing the fraction of heavy inert bombardment gases such as argon or xenon. As with the aggressive stage, these parameters may be used individually or in combination, and the finishing stage is defined by its functional behavior rather than any fixed parameter set.

[0125] The finishing stage may employ an oxygen-rich plasma, a fluorine-containing chemistry, a chlorine-containing chemistry, a sulfur-containing chemistry, and / or mixed chemistries containing multiple reactive species. The finishing stage does not necessarily require a completely different gas chemistry from the aggressive stage; in some embodiments the same nominal gas chemistry may be used while other parameters such as bias power or gas ratios are adjusted to reduce the mechanical component of the etch.

[0126] The finishing stage may reduce surface roughness to less than about 5 nanometers Ra, less than about 1 nanometer Ra, less than or equal to about 0.5 nanometers Ra, or in some embodiments to angstrom-scale roughness such as approximately 2 A or lower. In one illustrative example, the wafer surface 32 with126324 / 13302-LAN#7902969.1

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[0129] intermediate roughness Ra of approximately 20 nanometers may undergo material removal on the order of approximately 40 to 60 nanometers during the finishing stage to achieve a final roughness on the order of approximately 1 nanometer Ra.

[0130] Because the finishing stage operates under relatively gentle conditions, it does not materially increase defect density or subsurface lattice damage relative to the underlying crystal. In some embodiments, the finishing stage may reduce defect density by removing previously damaged material introduced by the aggressive stage and prior preparation processes. In various embodiments, the finishing stage may produce a surface condition in which the surface defect density is no greater than about 1.5 times the bulk defect density of the underlying diamond crystal, indicating that the near-surface lattice region approaches the intrinsic structural quality of the underlying material. Methods for measuring subsurface lattice damage and defect density include X-ray rocking curve measurements, etch-pit studies in which a targeted chemical etch reveals dislocations as countable pits, and related characterization techniques.

[0131] At step 18, the process yields a finished diamond wafer having a planar major surface 32 characterized by low average surface roughness Ra and reduced or substantially eliminated subsurface lattice damage. In various embodiments, the finished wafer surface may exhibit an average surface roughness Ra of less than about 5 nanometers, and in various embodiments less than about 1 nanometer or approaching angstrom-scale roughness such as approximately 2 A or lower. The surface 32 defect density of the finished wafer 30 may be no greater than about 1.5 times the bulk defect density of the underlying diamond crystal, indicating that the near-surface lattice region 42 approaches the intrinsic structural quality of the underlying material. The finished wafer 30 may be suitable for a variety of demanding technological applications.

[0132] For example, the wafer 30 may serve as a substrate for epitaxial growth processes in which additional crystalline material is deposited on the wafer surface, where low roughness and a defect-free near-surface lattice are required to support high-quality epitaxial layers. The finished wafer 30 may also be used in the fabrication of high-performance electronic devices, including wide-bandgap semiconductor devices that benefit from smooth, structurally sound diamond126324 / 13302-LAN#7902969.1

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[0135] substrates. In quantum technology applications, the reduced subsurface lattice damage provided by the gentle finishing stage may produce a more pristine near-surface environment that supports improved quantum coherence in devices relying on near-surface quantum defects or color centers. Additionally, the finished wafer may be suitable for optical applications such as windows, lenses, and waveguides, where low surface roughness reduces scattering and subsurface lattice quality contributes to consistent optical properties. In embodiments where the process has been performed within an integrated multi-chamber tool without breaking vacuum, the finished wafer 30 may also exhibit reduced surface contamination relative to wafers processed using conventional polishing methods that are not amenable to cleanroom operation.

[0136] The finished wafer 30 may include a planar major surface processed to achieve low surface roughness and reduced or substantially eliminated subsurface lattice damage relative to earlier stages of processing. In various embodiments, the finished wafer surface 32 may exhibit an average surface roughness Ra less than about 5 nanometers, less than about 1 nanometer, or less than or equal to about 0.5 nanometers. In certain implementations, the finishing stage 22 may produce angstrom-scale surface roughness of approximately 2 A or lower. In addition to low roughness, the wafer surface 32 may exhibit a surface defect density no greater than about 1.5 times the bulk defect density of the underlying diamond crystal, indicating that the near-surface region approaches the intrinsic structural quality of the underlying material.

[0137] The diamond wafer produced by the processes described herein may have any suitable crystallographic orientation, including (100), (110), (111), depending on how the wafer is cut from the parent crystal and the intended application. The process is well suited for larger wafer diameters, and the resulting wafer may have a diameter of at least about 25 millimeters, 42 millimeters, 50 millimeters, or 100 millimeters. The resulting wafer may be suitable for use as a substrate for epitaxial growth processes, for quantum device fabrication in which quantum defects or color centers are located near the surface, or for optical device fabrication where reduced surface roughness and improved lattice quality contribute to improved optical properties.

[0138] The process of Figure 1 then comes to an end. Although the process of Figure 1 is described with reference to a single diamond wafer for clarity of illustration,126324 / 13302-LAN#7902969.1

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[0141] those skilled in the art will appreciate that the process may be applied to a plurality of diamond wafers simultaneously within the same plasma processing chamber, or sequentially to a series of diamond wafers processed one after another, without departing from the scope of the invention.

[0142] Figure 2 is a graph illustrating the progression of surface roughness (Ra) and material removal rate across the processing stages in accordance with illustrative embodiments. The horizontal axis represents process stage or elapsed time, and the vertical axis represents surface roughness on a schematically logarithmic scale, with roughness decreasing downward. A solid curve shows Ra declining steeply during the aggressive smoothing stage 20 as surface high spots are rapidly removed, then continuing to decline more gradually during the gentle finishing stage 22 as the process transitions to a lower-removal-rate, chemically dominated regime. A dashed curve shows the corresponding material removal rate, which is relatively high during the aggressive stage 20 and lower during the finishing stage 22. The figure illustrates the complementary roles of the two stages 20, 22: the aggressive stage 20 provides efficient roughness reduction from the planarized starting condition, while the gentle stage 22 provides final refinement to sub-nanometer roughness levels.

[0143] Rather than relying on a single plasma regime, the process employs two functionally distinct regimes that cooperate to produce the surface 32 having both low roughness and reduced or substantially eliminated subsurface lattice damage, a combination that is difficult or impractical to obtain with either regime alone. The aggressive stage 20 and finishing stage 22 cooperate to produce a surface condition that neither stage can practically achieve alone. The aggressive regime efficiently reduces roughness but introduces damage, while the finishing regime removes damage but cannot efficiently smooth a rough surface. The combination of the two regimes therefore enables both rapid smoothing and low-damage finishing.

[0144] The aggressive stage 20 efficiently reduces surface roughness from the planarized starting condition to an intermediate level but cannot practically achieve the desired final surface condition on its own: it exhibits a roughness floor and damage floor below which further improvement is difficult, and continued operation primarily results in wafer thinning. Conversely, the finishing stage can achieve very smooth, low-damage surfaces but is inefficient when applied directly to a rough126324 / 13302-LAN#7902969.1

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[0147] starting surface because its lower removal rate and more conformal behavior make reduction of large-amplitude features impractically slow. The aggressive stage 20 provides substantially higher material removal rates than the finishing stage 22, allowing efficient removal of surface high spots. Without this higher-removal-rate stage 20, achieving comparable smoothing using only the gentler stage 22 would require impractically long processing times.

[0148] By first applying the aggressive stage 20 to rapidly reduce roughness to an intermediate level, and then applying the finishing stage 22 to remove damaged material and further refine the surface, the combined process provides practical throughput, scalable processing across a range of wafer sizes, very low final roughness, and reduced or substantially eliminated subsurface lattice damage, all in a manner that neither stage alone can provide. In some implementations, the multi-stage dry polishing process may replace the final CMP step used in conventional wafer finishing. In other embodiments, it may replace a larger portion of the conventional polishing chain following the planarization stage, thereby simplifying wafer processing and improving scalability.

[0149] In many existing dry etch polishing approaches, the plasma process is applied only to wafers 30 that have already been mechanically polished to very low roughness levels. The plasma process is therefore used primarily to remove subsurface damage from an already smooth surface. In contrast, the multi-stage dry polishing process described herein allows plasma processing to begin from a comparatively rougher but planarized surface, enabling the plasma stages to replace a larger portion of the conventional polishing chain.

[0150] The near-surface region of the diamond wafer passes through three distinct structural conditions during processing, each represented by a separate element number in the figures. Layer 34, shown in Figure 3 A, is the damaged zone present at the start of the plasma processing sequence, introduced by prior mechanical preparation steps such as lapping, grinding, or RIBE. The mechanical processes physically stress the crystal lattice over a relatively large interaction zone, producing a thick band of diffuse damage, primarily dislocations spread across a depth 35 A that may extend several microns, and potentially up to approximately 10 microns in the126324 / 13302-LAN#7902969.1

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[0153] case of aggressive grinding. This layer may be the starting condition that the two-stage plasma process is designed to address.

[0154] The aggressive dry etch stage of the present process removes some or all of layer 34, but in doing so introduces a new and structurally distinct damaged zone, shown as layer 38 in Figure 3B. This damage arises from a different mechanism, the inventor suspects for example from energetic ion bombardment and argon implantation, rather than mechanical stress, and has a different character as a result. The defects are more concentrated and localized near the immediate surface rather than diffusely distributed through a thick zone, and the damaged layer has a depth 35B that is meaningfully thinner than 34, generally sub-micron and in many cases less than approximately one micron deep.

[0155] Although the local defect density within this thinner band may be higher than in 34, its reduced depth means it can be efficiently removed by the subsequent gentle finishing stage 22. Layer 38 therefore represents a transitional damage state — a consequence of the high-removal-rate smoothing regime, but one that is shallower and more tractable than the mechanical damage it replaced. The gentle finishing stage 22 removes this layer, yielding the near-surface region shown as 42 in Figure 3C, which is a region whose defect density approaches that of the underlying bulk crystal, which is no greater than approximately 1.5 times the bulk diamond 30 defect density.

[0156] Figure 5 schematically shows the relative gas composition of the plasma processing environment during the aggressive stage 20 and the gentle finishing stage 22 in accordance with illustrative embodiments. Each stage is represented as a divided bar showing the approximate proportional contributions of non-reactive heavy bombardment gas, such as argon or xenon, and reactive gas (e.g., oxygen, additionally or alternatively fluorine-, chlorine-, or sulfur-containing gas). In the aggressive stage 20, the non-reactive gas fraction is relatively higher, providing a greater mechanical ion bombardment component and a higher material removal rate. In the gentle finishing stage, the reactive gas fraction is relatively higher, providing a greater chemical etching contribution and reduced mechanical aggressiveness.

[0157] Figure 5 illustrates the preferred trend in gas composition across the two stages, with a transition arrow indicating that the shift between regimes may be achieved through gas ratio adjustment, bias or power adjustment, or a combination of126324 / 13302-LAN#7902969.1

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[0160] both. Proportions shown are illustrative; additional diluent gases (e.g., N2, H2) may also be present, and the nominal gas chemistry need not change between stages if other process parameters are adjusted instead.

[0161] The reactive gas refers to a gas species that exhibits substantial chemical etching activity with respect to diamond under the processing conditions used.

[0162] Reactive gases participate in chemical reactions with carbon atoms in the diamond lattice to form volatile reaction products that are removed from the chamber.

[0163] Oxygen may be the reactive gas in various embodiments. Oxygen-based plasma chemistries react with carbon to form gaseous species such as carbon monoxide or carbon dioxide, and oxygen-containing plasmas therefore provide an effective chemical etching component for diamond surfaces. Fluorine-containing gases capable of reacting with carbon to form volatile fluorinated carbon species may also be used, as may chlorine-containing chemistries that produce reactive species capable of chemically interacting with carbon under appropriate conditions. Sulfur-containing chemistries may be used in some embodiments and represent possible but less primary examples of reactive gases.

[0164] In addition to reactive gases, the plasma processing stages may employ non-reactive gases that contribute primarily to mechanical sputtering or ion-bombardment effects. A non-reactive heavy bombardment gas, as used herein, refers to a relatively inert species that does not significantly react chemically with diamond under the processing conditions used, but that produces ions which, when accelerated toward the wafer surface 32, transfer significant momentum and contribute to physical material removal.

[0165] Argon may be used as the non-reactive bombardment gas in various embodiments. Argon benefits from being widely available, relatively inexpensive, and chemically inert under most processing conditions, and its relatively high atomic mass makes it effective at transferring momentum during ion bombardment. Additionally, or alternative, Xenon may also be used. Xenon’s greater atomic mass may provide even greater momentum transfer per ion, but xenon is generally more expensive and less commonly used in practice. Other noble gases such as helium or neon are generally less effective for this purpose due to their lower atomic mass, and radioactive noble gases such as radon are not suitable.126324 / 13302-LAN#7902969.1

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[0168] Other gases may also be present in the plasma environment to function as diluents, carrier gases, plasma-stabilizing gases, or gases that modify overall plasma chemistry. Examples include nitrogen, hydrogen, and helium. Although these gases may not serve as primary etchants for diamond, their presence can nonetheless influence the effective mechanical and chemical balance of the plasma process by affecting plasma density, ion energy distributions, and reaction kinetics. For instance, introducing a diluent gas may reduce the effective concentration of reactive species or heavy bombardment ions, thereby modifying overall etching behavior in a manner functionally similar to adjusting the reactive-to-non-reactive gas ratio directly.

[0169] Because these gases may alter the effective characteristics of the plasma process even when they are not primary etchants, illustrative embodiments are not limited to simple binary gas mixtures; the plasma chemistry may include multiple species whose combined effects determine the effective mechanical and chemical contributions of the etch.

[0170] In various embodiments, the aggressive stage 20 is configured to use a higher fraction of non-reactive heavy bombardment gas and a lower fraction of reactive gas, while the finishing stage 22 uses a higher fraction of reactive gas and a reduced fraction of non-reactive bombardment gas. These relative trends help shift the process from a bombardment-dominated regime toward a more chemically dominated regime as the wafer progresses from aggressive smoothing to gentle finishing. However, illustrative embodiments are not limited to any particular binary gas composition or specific gas ratio. In some embodiments the nominal gas chemistry may remain the same across both stages while other parameters , such as bias power, plasma density, or pressure, are adjusted to produce the desired transition in effective etch character.

[0171] It should be noted that the gas compositions described herein and illustrated in Figure 5 are provided as illustrative examples rather than strict requirements. The proportions of non-reactive heavy bombardment gas and reactive gas shown in Figure 5 are representative of some embodiments and do not imply that the plasma gas mixture must consist exclusively of these two components. In practice, additional gases may be present in the plasma environment, including diluent gases, carrier gases, or plasma-stabilizing gases such as nitrogen, hydrogen, or helium, whose combined presence may modify the effective balance between the mechanical and126324 / 13302-LAN#7902969.1

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[0174] chemical components of the etch without necessarily serving as primary etchants. Furthermore, the absolute percentage of non-reactive heavy bombardment gas in the total mixture is not itself a defining parameter of the aggressive or gentle regimes. Rather, the effective mechanical aggressiveness of the plasma process is determined by the combination of the non-reactive gas concentration, the reactive gas concentration, and the ion acceleration conditions established by the substrate bias and plasma density. For example, a relatively modest argon concentration may still produce an aggressive mechanical etch if combined with sufficiently high substrate bias, while a high argon concentration under low bias conditions may produce a gentler result. Accordingly, the transition from the aggressive smoothing stage to the gentle finishing stage may be achieved by adjusting gas composition alone, bias and power conditions alone, or combinations of both, and illustrative embodiments are not limited to any particular absolute gas percentage or binary gas mixture.

[0175] Figure 6 is an example comparative parameter table illustrating the relative levels of process variables across the aggressive smoothing stage 20 and the gentle finishing stage 22 in accordance with illustrative embodiments. For each parameter — including RF and ion bias energy, ICP source power, material removal rate, non-reactive gas fraction, reactive gas fraction, subsurface lattice damage introduced, and resulting surface roughness — the figure shows a scaled bar indicating whether that parameter is relatively higher or lower in each stage. The aggressive stage 20 is characterized by higher bias energy, higher source power, higher removal rate, a greater proportion of non-reactive bombardment gas, and introduction of subsurface lattice damage, resulting in an intermediate surface roughness of approximately 10 to 15 nanometers Ra. The gentle finishing stage 22 is characterized by lower bias energy, reduced source power, lower removal rate, a greater proportion of reactive gas, substantially no additional lattice damage introduced, and a final surface roughness below 5 nanometers Ra, with a target of sub-nanometer. The figure illustrates that the transition between stages may be achieved by adjusting gas composition, bias conditions, source power, or combinations of these parameters.

[0176] The relative aggressiveness or gentleness of the plasma processing stages may be controlled not only by gas chemistry but also by a variety of electrical, thermal, and operational parameters within the plasma processing system. The effective126324 / 13302-LAN#7902969.1

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[0179] etching behavior is determined by a combination of gas chemistry, bias conditions, plasma density, chamber pressure, and other process-control variables, and should not be understood as defined solely by any particular gas ratio.

[0180] Parameters that may influence the balance between chemical and mechanical etch components include RF bias applied to the wafer or substrate holder, DC bias within the plasma chamber, source power and plasma density power, ICP coil power, chuck or substrate electrode power, chamber pressure, concentration of reactive gases, concentration of non-reactive bombardment gases, gas dilution with additional carrier or modifying gases, substrate temperature, and process duration. Each of these parameters may affect the degree to which energetic ion bombardment contributes to material removal relative to chemical surface reactions, and all of them, individually or in combination, represent process levers through which the transition from the aggressive to the gentle regime may be achieved.

[0181] In various embodiments, the aggressive stage 20 operates with higher effective ion bombardment energy than the finishing stage 22. This may be achieved by applying higher RF or DC bias to accelerate ions toward the wafer surface 32, by increasing plasma density, or by adjusting other parameters that increase ion energy or ion flux. In contrast, the finishing stage 22 operates with lower effective ion bombardment energy, achieved by reducing bias, source power, ICP coil power, or a combination of these parameters.

[0182] Because these parameters may interact in complex ways, the aggressive stage 20 and gentle stage 22 may be achieved through multiple combinations of processcontrol variables rather than a single fixed parameter set.

[0183] In a discrete two-step embodiment, the wafer surface 32 first undergoes the aggressive plasma stage and then transitions at a clearly defined point to the finishing stage 22, with the plasma tool switching from one set of parameters to another as conceptually illustrated in Figures 5 and 6.

[0184] In various multi-step embodiments, the process may include three or more discrete stages in which the aggressiveness of the plasma process changes progressively. One or more intermediate stages may be applied between the initial aggressive regime and the final gentle regime, allowing more gradual transitions126324 / 13302-LAN#7902969.1

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[0187] between processing conditions. Such embodiments may provide greater control over surface evolution, particularly for larger wafers or unusual starting conditions.

[0188] In gradient or continuous-transition embodiments, one or more process parameters may change gradually during plasma processing rather than switching at discrete points. For example, the process may begin with conditions corresponding to the aggressive stage 20 and then continuously transition toward the gentler finishing stage 22 over time by gradually decreasing RF bias, increasing the fraction of reactive gas, decreasing the fraction of heavy inert gas, reducing ICP coil power, adjusting chamber pressure, or applying combinations of these changes. Such gradient embodiments may provide a smooth evolution of surface conditions and may allow the process to adapt dynamically as the surface morphology changes during polishing. Even in illustrative embodiments having such continuous-transition, different stages are understood to exist based on the prevailing process conditions, such that portions of the process may still be characterized as corresponding to a more aggressive stage 20 and later portions as corresponding to a gentler stage 22, notwithstanding the absence of discrete step changes.

[0189] In various embodiments, the aggressive and finishing plasma stages may be performed within the same plasma processing chamber (e.g., the chamber shown in Figure 4) by adjusting process parameters such as gas composition, RF bias, or plasma density between stages. In other embodiments, the stages may be performed in separate chambers of a multi-chamber cluster tool while maintaining vacuum conditions during wafer transfer.

[0190] For example, the various processing stages may be implemented within an integrated multi-chamber processing tool in which multiple chambers are connected through vacuum transfer systems. A planarization chamber may be configured for RIBE or ion-beam planarization; an aggressive etch chamber may be configured for the first plasma stage; and a finishing chambermay be configured for the second plasma stage. Wafers may be transferred between chambers by a robotic transfer arm operating within a vacuum transfer module and may enter and exit the tool through a load lock.

[0191] The plasma-based processing methods described herein may be applied to diamond wafers having a variety of crystallographic orientations, including the (100)126324 / 13302-LAN#7902969.1

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[0194] orientation (100), the (110) orientation (102), the (111) orientation (104), and others. While the crystallographic orientation may influence the detailed behavior of the plasma etching process, it does not prevent the process from being used; rather, it may influence how process parameters are tuned to achieve the desired surface condition.

[0195] For example, the (111) orientation may exhibit greater mechanical hardness compared with other orientations because its higher density of atoms in the surface plane resists mechanical removal more strongly. At the same time, the higher atomic density of the (111) plane may provide more surface sites for chemical reactions, making this orientation relatively more chemically reactive under certain plasma conditions. The (100) and (110) orientations may exhibit more similar mechanical and chemical characteristics relative to each other and may respond to plasma processing in ways that differ somewhat from the (111) orientation. When processing mechanically harder orientations such as (111), the aggressive stage 20 may therefore be configured to provide a greater mechanical contribution, for example by increasing ion bombardment energy, adjusting bias conditions, or modifying the concentration of heavy inert bombardment gases.

[0196] The overall multi-stage dry polishing process remains applicable across different orientations; by adjusting process variables such as gas chemistry, bias conditions, and plasma density, the process can be adapted to accommodate the mechanical and chemical characteristics associated with different crystallographic planes.

[0197] The multi-stage dry polishing process may be particularly advantageous when applied to larger diamond wafers. In conventional contact-based polishing approaches such as CMP, the forces applied to the wafer 30 scale with wafer surface area. As wafer 30 diameters increase, maintaining uniform polishing conditions may require substantially higher forces at the polishing interface. These higher forces increase the likelihood of mechanical damage: if a small particle or chipped fragment of diamond becomes trapped between the wafer and the polishing surface, it can create a localized region of extremely high pressure and gouge the wafer surface 32 as it is dragged across under load. Because diamond is the hardest known material, even very small fragments can cause severe surface damage under these conditions.

[0198] The dry plasma polishing process described herein avoids these issues because it does not rely on a physical polishing interface in contact with the wafer surface 32,126324 / 13302-LAN#7902969.1

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[0201] and material removal is performed through plasma-based mechanisms rather than mechanical contact. As a result, the process can avoid many of the mechanical scaling limitations associated with traditional polishing techniques.

[0202] In various embodiments, the methods described herein may be applied to diamond wafers having diameters greater than about 1 inch, greater than about 2 inches, or at least about 25 millimeters, 42 millimeters, 50 millimeters, 75 millimeters, or 100 millimeters. Wafer diameters on the order of 42 millimeters represent current or near-term production scales, while the plasma-based processing described herein may be scalable toward wafer sizes of 100 millimeters or greater as diamond wafer manufacturing continues to evolve.

[0203] Referring generally to Figure 3C, the multi-stage dry polishing process may produce diamond wafer surfaces 32 suitable for a variety of demanding technological applications. The combination of low surface roughness and reduced subsurface lattice damage achieved through the process enables preparation of surfaces that approach polished-wafer quality while removing near-surface damaged material.

[0204] In one illustrative example suitable for a diamond wafer of approximately 42 millimeters in diameter, the aggressive smoothing stage and the gentle finishing stage may be implemented using the process parameters set forth in Table 1 below. These parameters are provided as non-limiting examples intended to illustrate one representative embodiment of the multi-stage dry plasma polishing process. The specific values recited herein may vary depending on wafer size, chamber geometry, and equipment configuration, and are not intended to limit the scope of the invention. In particular, because the relationship between process parameters and etch behavior may vary as wafer diameter increases, the values described in Table 1 should be understood as representative of a smaller-scale implementation, and appropriate adjustments may be required when scaling the process to larger wafer formats.

[0205] Table 1. Example Process Parameters for Aggressive Plasma Stage 20 and Gentle Plasma Stage 22

[0206]

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[0210] Parameter Aggressive Stage Gentle Stage (Second Dry Direction (First Dry Plasma Plasma Stage) of Stage) Change Gas Chemistry

[0211] Argon flow rate -40 -10 Down (seem)

[0212] Oxygen flow rate -10 -40 Up (seem)

[0213] Ar: 02 ratio -4:1 -1:4 Down Power Conditions

[0214] ICP coil power -800 -200 Down (W)

[0215] Substrate RF bias -300 -50 Down power (W)

[0216] Chamber Conditions

[0217] Chamber pressure -5 -10 Up (mTorr)

[0218] Expected Process Outputs

[0219] Material removed -200 - 300 -40 - 60 Down (nm, approx.)

[0220] Resulting surface -10 - 15 nm <1 nm (target sub-nm) Down roughness Ra

[0221] Subsurface lattice Yes — Minimal — does not Down damage introduced dislocations, materially increase

[0222] implantation defect density

[0223] effects

[0224]

[0225] Following Ta jle 1, the manner in which each of these parameter c langes contributes to the transition from the aggressive smoothing stage 20 to the gentle finishing stage 22 is described below.

[0226] The argon flow rate is reduced from approximately 40 to approximately 10 standard cubic centimeters per minute between the two stages. Argon serves as the126324 / 13302-LAN#7902969.1

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[0229] primary non-reactive heavy bombardment gas in the plasma. When ionized, argon ions are chemically inert and transfer momentum to the diamond surface through purely physical impacts, thereby contributing to mechanical sputtering of surface material. Reducing the argon flow rate decreases the population of heavy bombardment ions in the plasma, which directly reduces the mechanical sputtering component of the etch, lowers momentum transfer to the surface, and reduces the degree of lattice disruption imparted to the near-surface region of the diamond wafer.

[0230] The oxygen flow rate is increased from approximately 10 to approximately 40 standard cubic centimeters per minute between the two stages. Oxygen serves as the primary reactive gas in the plasma. Under plasma conditions, oxygen dissociates into reactive atomic species that react chemically with carbon atoms at the diamond surface to form volatile reaction products such as carbon monoxide and carbon dioxide, which are subsequently removed from the chamber by the exhaust system. This chemical removal mechanism is inherently gentler than mechanical sputtering because it removes material through selective surface reactions rather than through energetic physical impacts, and does not impart significant momentum or lattice disruption to the near-surface region.

[0231] The combined effect of reducing the argon flow rate and increasing the oxygen flow rate shifts the argon-to-oxygen ratio from approximately 4: 1 in the aggressive stage to approximately 1:4 in the gentle finishing stage. This ratio represents the primary process lever controlling the balance between the mechanical and chemical components of the plasma etch. A ratio of approximately 4:1 produces a plasma environment that is predominantly bombardment-driven with a modest chemical contribution, while a ratio of approximately 1:4 inverts this balance to produce a plasma environment that is predominantly chemically driven with a reduced mechanical component.

[0232] The ICP coil power is reduced from approximately 800 watts to approximately 500 watts between the two stages. The ICP coil is responsible for generating and sustaining the plasma by ionizing the process gases within the chamber. Higher coil power produces a denser plasma with a greater flux of ions and reactive species per unit volume, which increases both the mechanical and chemical etch rates simultaneously. Reducing the coil power from approximately 800 to approximately126324 / 13302-LAN#7902969.1

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[0235] 500 watts lowers the overall plasma density, reducing the total flux of ions and reactive species arriving at the wafer surface and thereby reducing the overall intensity and removal rate of the etch.

[0236] The substrate RF bias power is reduced from approximately 300 watts to approximately 50 watts between the two stages. The substrate bias controls the kinetic energy with which ions are accelerated from the plasma toward the wafer surface. At approximately 300 watts, ions arrive at the surface with sufficient energy to penetrate slightly into the near-surface lattice, displacing atoms and creating the dislocations and implantation-type defects that characterize the subsurface damaged region produced during the aggressive stage. Reducing the substrate bias to approximately 50 watts substantially reduces the kinetic energy of arriving ions such that they arrive at the surface with energy sufficient to participate in chemical surface reactions but insufficient to cause significant lattice displacement or subsurface damage. The substrate bias reduction therefore represents the single most consequential parameter change in the transition between the two stages with respect to the introduction of subsurface lattice damage.

[0237] The chamber pressure is increased from approximately 5 milliTorr to approximately 10 milliTorr between the two stages. Chamber pressure influences the mean free path of ions within the plasma (i.e., the average distance an ion travels before colliding with another gas molecule). At lower pressure, ions travel in relatively straight trajectories from the plasma to the wafer surface and arrive with the full kinetic energy imparted by the substrate bias, producing directional and energetic bombardment. At higher pressure, ions undergo more frequent collisions with gas molecules before reaching the surface, losing energy and arriving at more varied angles. Increasing chamber pressure from approximately 5 to approximately 10 milliTorr therefore further reduces the effective mechanical aggressiveness of the etch beyond the reduction achieved by lowering the substrate bias alone, and reinforces the transition toward the gentler finishing regime. This pressure effect is secondary in magnitude to the substrate bias reduction but acts in a complementary manner to further soften the bombardment character of the finishing stage.

[0238] Taken together, these parameter changes, reduced argon flow rate, increased oxygen flow rate, reduced ICP coil power, reduced substrate RF bias, and increased126324 / 13302-LAN#7902969.1

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[0241] chamber pressure, all act in concert to transition the plasma processing environment from a high-removal-rate, mechanically aggressive regime to a lower-removal-rate, chemically dominated finishing regime. In various embodiments, the combination of these adjustments may produces the functional difference between the two stages described herein.

[0242] In another illustrative example, the aggressive stage 20 may be performed using an argon flow rate of approximately 30 standard cubic centimeters per minute, an oxygen flow rate of approximately 30 standard cubic centimeters per minute, and a sulfur hexafluoride flow rate of approximately 30 standard cubic centimeters per minute, with an ICP coil power in the range of approximately 35 to 65 watts and a substrate RF bias power of approximately 250 watts. In the gentle finishing stage 22, the argon flow rate may be reduced to approximately 10 standard cubic centimeters per minute, the oxygen flow rate reduced to approximately 20 standard cubic centimeters per minute, and the sulfur hexafluoride flow rate reduced to approximately 20 standard cubic centimeters per minute, with the ICP coil power reduced to a range of approximately 10 to 20 watts and the substrate RF bias power reduced to approximately 100 watts. This example illustrates an embodiment in which the plasma gas mixture comprises both an oxygen-containing reactive gas and a fluorine-containing reactive gas in the form of sulfur hexafluoride, and demonstrates that the transition from the aggressive to the gentle regime may be achieved through concurrent reduction of the non-reactive bombardment gas fraction, the reactive gas flow rates, the ICP source power, and the substrate bias power. The ICP power values in this example are representative of a smaller or differently configured plasma processing tool than the example described in Table 1, and illustrate that the process parameters may vary across different tool configurations while the functional relationship between the aggressive and gentle stages remains consistent.

[0243] It should be noted that while the illustrative examples described above and set forth in Table 1 refer specifically to argon as the non-reactive heavy bombardment gas and oxygen as the primary reactive gas, these specific gases are representative examples only and are not intended to limit the scope of the invention. As described elsewhere in this specification, the non-reactive heavy bombardment gas may comprise any sufficiently heavy inert gas capable of providing a meaningful126324 / 13302-LAN#7902969.1

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[0246] mechanical sputtering component under plasma conditions, including but not limited to argon and xenon, and the reactive gas may comprise any gas capable of chemically etching diamond under plasma conditions, including but not limited to oxygen, fluorine-containing gases, chlorine-containing gases, and sulfur-containing gases including sulfur hexafluoride. Additional diluent or plasma-modifying gases may also be present in the mixture without departing from the scope of the invention.

[0247] Accordingly, the parameter ranges set forth below are expressed in generic terms referring to the functional class of each gas component rather than to any specific gas species, and the total gas flow rates, ratios, and power conditions described herein should be understood as applicable to any combination of gases falling within the functional classes described.

[0248] In some embodiments, for the aggressive smoothing stage 20, the total non-reactive heavy bombardment gas flow rate may range from approximately 20 to 60 standard cubic centimeters per minute, the total reactive gas flow rate may range from approximately 5 to 40 standard cubic centimeters per minute, the ratio of non-reactive bombardment gas to reactive gas may range from approximately 2:1 to 6:1, the ICP coil power may range from approximately 20 to 1000 watts, the substrate RF bias power may range from approximately 150 to 400 watts, and the chamber pressure may range from approximately 2 to 15 milliTorr. For the gentle finishing stage 22, the total non-reactive heavy bombardment gas flow rate may range from approximately 5 to 20 standard cubic centimeters per minute, the total reactive gas flow rate may range from approximately 15 to 60 standard cubic centimeters per minute, the ratio of non-reactive bombardment gas to reactive gas may range from approximately 1 :2 to 1 :6, the ICP coil power may range from approximately 5 to 250 watts, the substrate RF bias power may range from approximately 25 to 150 watts, and the chamber pressure may range from approximately 5 to 20 milliTorr.

[0249] The multi-stage dry plasma polishing process described herein may be implemented under the control of a controller configured to automate one or more aspects of the process. The controller may comprise a programmable logic controller, a dedicated process controller, a general-purpose computer executing process control software, or any other suitable control system capable of receiving inputs and generating outputs to control the plasma processing apparatus. In various126324 / 13302-LAN#7902969.1

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[0252] embodiments, the controller may execute one or more of the logic functions described below, individually or in combination, to automate the transition between the aggressive smoothing stage and the gentle finishing stage, to adapt the process to different wafer conditions, and to coordinate operations across multiple processing chambers.

[0253] Figure 7 schematically shows details of the reactor controller 150 of Figure 4 configured in accordance with illustrative embodiments. Each of these components is operatively connected by any conventional interconnect mechanism. Figure 7 simply shows a bus communicating each the components. Those skilled in the art should understand that this generalized representation can be modified to include other conventional direct or indirect connections. Accordingly, discussion of a bus is not intended to limit various embodiments.

[0254] Indeed, it should be noted that Figure 7 only schematically shows each of these components. Those skilled in the art should understand that each of these components can be implemented in a variety of conventional manners, such as by using hardware, software, or a combination of hardware and software, across one or more other functional components. For example, the reactor controller 150 (discussed in detail below) may be implemented using a plurality of microprocessors executing firmware. As another example, the reactor controller 150 may be implemented using one or more application specific integrated circuits (i.e., “ASICs”) and related software, or a combination of ASICs, discrete electronic components (e.g., integrated circuits), and microprocessors. Accordingly, the representation of the controller 150 and other components in a single box of Figure 7 is for simplicity purposes only. In fact, in some embodiments, the controller of Figure 7 is distributed across a plurality of different components — not necessarily within the same housing or chassis.

[0255] It should be reiterated that the representation of Figure 7 is a significantly simplified representation of an actual reactor controller 150. Those skilled in the art should understand that such a device has other physical and / or functional components, such as central processing units, other packet processing modules, and short-term memory. Accordingly, this discussion is not intended to suggest that Figure 7 represents all of the elements of the reactor controller 150.126324 / 13302-LAN#7902969.1

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[0258] In various embodiments, the controller may include stage transition trigger logic 94 configured to determine when to initiate the transition from the first plasma stage 20 to the second plasma stage 22. Because the transition point represents the moment at which the wafer surface 32 has reached a sufficient intermediate roughness level for the finishing stage 22 to operate effectively, accurate detection of this transition point may improve process consistency and wafer quality.

[0259] In one example, the stage transition trigger logic 94 may be configured to initiate the transition after a predetermined elapsed process time. In such embodiments, the controller 150 may store a recipe specifying a fixed duration for the first plasma stage, after which the controller automatically transitions to the second stage parameters. Although simple to implement, time-based triggering may be less adaptive to variations in starting surface condition or removal rate.

[0260] In another embodiment, the stage transition trigger logic 94 may be configured to initiate the transition based on a calculated etch depth. In such embodiments, the controller 150 may calculate the amount of material removed during the first stage 20 based on a known or measured material removal rate and elapsed time, and may initiate the transition when the calculated etch depth reaches a predetermined threshold consistent with achieving the desired intermediate roughness level.

[0261] In a further embodiment, the stage transition trigger logic 94 may be configured to monitor one or more real-time process signals and to initiate the transition in response to a detected change in those signals. For example, the controller 150 may monitor optical emission signals from the plasma, interferometric signals reflecting changes in surface condition, or other in-situ measurement signals that correlate with the evolving surface morphology of the wafer. When the monitored signal indicates that the wafer surface 32 has reached the desired intermediate roughness condition, the controller 150 may automatically initiate the transition to the second plasma stage. This feedback-based approach may provide greater process robustness and adaptability compared with time-based or calculated-depth approaches.

[0262] In various embodiments, the controller 150 may include parameter ramp and gradient transition logic 96 configured to control the manner in which process parameters change during the transition between the first and second plasma stages.126324 / 13302-LAN#7902969.1

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[0265] Rather than switching parameters instantaneously at a discrete transition point, the controller 150 may be configured to vary one or more process parameters continuously or in a stepwise manner over a defined transition period.

[0266] For example, the parameter ramp logic 96 may be configured to gradually reduce substrate RF bias over a defined ramp period, thereby progressively reducing the mechanical component of the plasma etch and transitioning the process toward a more chemically dominated regime. Similarly, the controller 150 may be configured to gradually increase the flow rate of reactive gas while simultaneously decreasing the flow rate of non-reactive heavy bombardment gas over the same ramp period, thereby shifting the gas composition progressively from an argon-dominated mixture toward an oxygen-dominated or otherwise reactive-gas-dominated mixture.

[0267] The parameter ramp logic 96 may also be configured to adjust ICP coil power, chamber pressure, or substrate temperature in a gradual or stepwise manner during the transition period. In some embodiments, multiple parameters may be ramped simultaneously according to predefined ramp profiles, allowing the controller to execute a smooth and controlled transition from the aggressive smoothing regime to the gentle finishing regime. Such gradient transition embodiments may reduce abrupt changes in etch conditions that could introduce surface non-uniformities at the transition point, and may provide a smoother evolution of surface morphology through the transition region.

[0268] In various embodiments, the controller 150 may include feedback control logic 98 configured to monitor one or more real-time process signals during the aggressive and gentle plasma stages and to dynamically adjust process parameters in response to measured deviations from desired process conditions.

[0269] For example, the feedback control logic 98 may monitor optical emission spectroscopy signals from the plasma to detect changes in the chemical composition of etch byproducts, which may correlate with changes in the surface condition of the wafer. As the surface morphology evolves during the first plasma stage, characteristic emission peaks associated with carbon-containing etch products may change in intensity, providing a real-time indication of the etch rate and surface condition. The controller 150 may compare the monitored signal against a stored reference profile126324 / 13302-LAN#7902969.1

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[0272] and may adjust gas composition, bias power, or other process parameters dynamically to maintain the desired etch conditions.

[0273] Similarly, the feedback control logic 98 may monitor interferometric signals, reflectometry signals, or other optical measurements that provide information about the surface roughness or etch depth in real time. In such embodiments, the controller may use the monitored surface condition data to dynamically adjust the aggressiveness of the etch, e.g., increasing or decreasing the substrate bias or adjusting the reactive-to-non-reactive gas ratio, in order to maintain a desired removal rate profile or to ensure that the transition between stages occurs at the optimal surface condition.

[0274] The feedback control logic 98 may also be configured to detect process anomalies or out-of-specification conditions and to respond by adjusting parameters, pausing the process, or generating an alert. Such anomaly detection may improve process robustness and reduce the likelihood of wafer damage due to unexpected process variations.

[0275] In various embodiments, the controller 150 may include orientation-adjusted recipe logic 100 configured to select or modify process parameters based on the crystallographic orientation of the diamond wafer being processed. As described previously, different crystallographic orientations of diamond, including the (100), (110), and (111) orientations, may exhibit different mechanical hardness and chemical reactivity under plasma processing conditions, and may therefore require different process parameters to achieve the desired surface condition.

[0276] In such embodiments, the controller 150 may store a plurality of process recipes, each corresponding to a different crystallographic orientation or a range of orientations. Upon receiving an input identifying the orientation of the incoming wafer 30, for example, from an operator input, a wafer identification system, or an in-situ measurement, the orientation-adjusted recipe logic 100 may automatically select the appropriate process recipe and apply the corresponding process parameters during the aggressive and gentle plasma stages.

[0277] For example, when processing a wafer having a (111) orientation, the orientation-adjusted recipe logic 100 may select a recipe that applies a greater mechanical component during the aggressive stage, for example through higher126324 / 13302-LAN#7902969.1

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[0280] substrate bias or a higher fraction of non-reactive heavy bombardment gas, to account for the greater mechanical hardness of the (111) surface. Similarly, the recipe for the (111) orientation may adjust the reactive gas fraction or bias conditions during the gentle finishing stage to account for the higher chemical reactivity of the (111) surface.

[0281] In various embodiments, the controller 150 may include wafer size scaling logic 102 configured to adjust process parameters based on the diameter or surface area of the diamond wafer being processed. One of the advantages of the dry plasma polishing process described herein is its scalability to larger wafer diameters.

[0282] However, certain process parameters may require adjustment as wafer size increases in order to maintain consistent and uniform etch conditions across the full wafer surface.

[0283] For example, the wafer size scaling logic 102 may be configured to adjust plasma density, gas flow rates, chamber pressure, or bias power based on the diameter of the incoming wafer, so that the flux of reactive species and bombardment ions arriving at the wafer surface remains substantially uniform across wafers of different sizes. In some embodiments, the scaling logic 102 may apply scaling factors derived from empirical process data collected across a range of wafer sizes, or may apply theoretical scaling relationships based on the geometry of the plasma processing chamber and the wafer surface area.

[0284] In addition, the wafer size scaling logic 102 may be configured to adjust the durations of the first and second plasma stages based on wafer size, so that the total material removed during each stage remains consistent with the desired intermediate and final roughness targets regardless of wafer diameter. Such size-based adjustments may allow the same plasma processing tool to process wafers of different diameters while maintaining consistent output surface quality.

[0285] In various embodiments, the controller may include integrated tool sequencing logic 104 configured to coordinate the movement of wafers through the multiple chambers of an integrated multi-chamber processing tool without breaking vacuum between process steps.126324 / 13302-LAN#7902969.1

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[0288] The integrated tool sequencing logic 104 may be configured to control the operation of the robotic transfer arm, the opening and closing of gate valves between chambers, and the sequencing of process operations across the planarization chamber, the aggressive etch chamber, and the gentle finishing chamber. In a typical sequence, the logic 104 may first direct the robotic arm to transfer a wafer from the load lock into the planarization chamber , where the pre-planarization operation is performed. Upon completion of the planarization step, the logic 104 may open the gate valve between the planarization chamber and the vacuum transfer module, direct the robotic arm to retrieve the wafer and transfer it to the aggressive etch chamber, and then close the gate valve to maintain vacuum integrity.

[0289] Following completion of the first plasma stage in the aggressive etch chamber, the integrated tool sequencing logic 104 may similarly coordinate transfer of the wafer to the gentle finishing chamber for the second plasma stage, again without breaking vacuum. Upon completion of the finishing stage, the logic 104 may coordinate transfer of the finished wafer back through the vacuum transfer module to the load lock for removal from the tool.

[0290] In some embodiments, the integrated tool sequencing logic 104 may also be configured to coordinate parallel processing of multiple wafers within the tool, for example by simultaneously processing one wafer in the planarization chamber, a second wafer in the aggressive etch chamber, and a third wafer in the finishing chamber, thereby improving tool throughput. The sequencing logic 104 may track the processing state of each wafer independently and may coordinate inter-chamber transfers so that each wafer progresses through the full processing sequence without interference from other wafers being processed concurrently.

[0291] The controller 150 may receive input signals from and transmit control signals to a variety of hardware components within the plasma processing system. Sensing and measurement hardware 106 from which the controller may receive feedback includes process timers and clocks, mass flow controller monitors, optical emission spectrometers, laser interferometers and reflectometers, RF power and impedance monitors, wafer temperature sensors including infrared pyrometers and chuck-embedded thermocouples, endpoint detection systems, wafer identification systems including barcode and RFID readers, wafer diameter measurement systems, wafer126324 / 13302-LAN#7902969.1

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[0294] presence sensors, and chamber status monitors. Process actuation hardware 108 to which the controller may transmit control signals includes mass flow controllers, the RF bias power supply 68, the ICP coil power supply 66, RF match networks, pressure controllers and throttle valves, substrate temperature controllers, the robotic transfer arm, gate valves, and load lock pump and vent valves. In production environments, the controller may additionally communicate with higher-level systems such as a manufacturing execution system or process scheduling system, from which it may receive lot and wafer processing instructions and to which it may report process completion status, wafer quality data, and tool availability.

[0295] It should be apparent that illustrative embodiments provide a number of advantages. For example, many plasma processes are applied to wafers that have already undergone extensive mechanical polishing and therefore exhibit very low starting roughness. The plasma process is then used primarily to remove subsurface polishing damage or perform minor surface refinement. In contrast, various embodiments allows plasma processing to begin from a comparatively rougher but planarized surface. The aggressive plasma stage reduces roughness from this moderately rough starting condition to an intermediate regime, after which the finishing stage removes damage introduced by the aggressive stage while achieving very low final roughness.

[0296] Additionally, the aggressive stage 20 provides substantially higher material removal rates than the finishing stage 22, enabling efficient removal of surface high spots. If the finishing stage 22 were applied directly to a rough surface, the low removal rate and more conformal etching behavior would make roughness reduction impractically slow. Furthermore, the aggressive and finishing stages cooperate to produce a surface condition that neither stage can practically achieve alone. The aggressive regime efficiently reduces roughness but introduces subsurface lattice damage due to energetic ion bombardment, while the finishing regime removes this damaged near-surface material while further smoothing the surface.

[0297] Various embodiments of the invention may be implemented at least in part in any conventional computer programming language. For example, some embodiments may be implemented in a procedural programming language (e.g., “C”), or in an object oriented programming language (e.g., “C++”). Other embodiments of the126324 / 13302-LAN#7902969.1

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[0300] invention may be implemented as preprogrammed hardware elements (e.g., application specific integrated circuits, FPGAs, programmable analog circuitry, and digital signal processors), or other related components.

[0301] In an alternative embodiment, the disclosed apparatus and methods (e.g., see the various flow charts described above) may be implemented as a computer program product for use with a computer system. Such implementation may include a series of computer instructions fixed either on a tangible, non-transitory medium, such as a computer readable medium (e.g., a diskette, CD-ROM, ROM, or fixed disk). The series of computer instructions can embody all or part of the functionality previously described herein with respect to the system.

[0302] Those skilled in the art should appreciate that such computer instructions can be written in a number of programming languages for use with many computer architectures or operating systems. Furthermore, such instructions may be stored in any memory device, such as semiconductor, magnetic, optical or other memory devices, and may be transmitted using any communications technology, such as optical, infrared, microwave, or other transmission technologies.

[0303] Among other ways, such a computer program product may be distributed as a removable medium with accompanying printed or electronic documentation (e.g., shrink wrapped software), preloaded with a computer system (e.g., on system ROM or fixed disk), or distributed from a server or electronic bulletin board over the network (e.g., the Internet or World Wide Web). In fact, some embodiments may be implemented in a software-as-a-service model (“SAAS”) or cloud computing model. Of course, some embodiments of the invention may be implemented as a combination of both software (e.g., a computer program product) and hardware. Still other embodiments of the invention are implemented as entirely hardware, or entirely software.

[0304] In some implementations, the processor 150 includes one or more processors (or one or more processor cores) that each are configured to perform a series of instructions that result in manipulated data and / or control the operation of the other components of the controller 150. In some implementations, when executing a specific process, the processor 150 can be configured to make specific logic-based determinations based on input data received, and be further configured to provide one126324 / 13302-LAN#7902969.1

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[0307] or more outputs that can be used to control or otherwise inform subsequent processing to be carried out by the processor 150 and / or other processors or circuitry with which processor 150 is communicatively coupled. Thus, the processor 150 reacts to specific input stimulus in a specific way and generates a corresponding output based on that input stimulus. In some example cases, the processor 150 can proceed through a sequence of logical transitions in which various internal register states and / or other bit cell states internal or external to the processor 150 may be set to logic high or logic low. As referred to herein, the processor 150 can be configured to execute a function where software is stored in a data store coupled to the processor 150, the software being configured to cause the processor 150 to proceed through a sequence of various logic decisions that result in the function being executed. The various components that are described herein as being executable by the processor 150 can be implemented in various forms of specialized hardware, software, or a combination thereof. For example, the processor can be a digital signal processor (DSP) such as a 24-bit DSP processor. The processor can be a multi-core processor, e.g., having two or more processing cores. The processor can be an Advanced RISC Machine (ARM) processor such as a 32-bit ARM processor. The processor can execute an embedded operating system, and include services provided by the operating system that can be used for file system manipulation, display & audio generation, basic networking, firewalling, data encryption and communications.

[0308] References to components or embodiments as alternatives are for illustrative purposes only and do not imply that such components or embodiments are mutually exclusive, unless explicitly stated.

[0309] As used in this specification and the claims, the singular forms "a," "an," and "the" refer to plural referents unless the context clearly dictates otherwise. For example, reference to "the wafer" in the singular includes a plurality of wafers, and reference to "the inlet" in the singular includes one or more inlets and equivalents known to those skilled in the art. Thus, in various embodiments, any reference to the singular includes a plurality, and any reference to more than one component can include the singular.

[0310] While various inventive embodiments have been described and illustrated herein, those of ordinary skill in the art will readily envision a variety of other means126324 / 13302-LAN#7902969.1

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[0313] and / or structures for performing the function and / or obtaining the results and / or one or more of the advantages described herein, and each of such variations and / or modifications is deemed to be within the scope of the inventive embodiments described herein. More generally, those skilled in the art will readily appreciate that all parameters, dimensions, materials, and configurations described herein are meant to be exemplary and that the actual parameters, dimensions, materials, and / or configurations will depend upon the specific application or applications for which the inventive teachings is / are used. Those skilled in the art will recognize, or be able to ascertain using no more than routine experimentation, many equivalents to the specific inventive embodiments described herein.

[0314] It is, therefore, to be understood that the foregoing embodiments are presented by way of example only and that, within the scope of the appended claims and equivalents thereto, inventive embodiments may be practiced otherwise than as specifically described and claimed. Illustrative embodiments of the present disclosure are directed to each individual feature, system, article, material, kit, and / or method described herein. In addition, any combination of two or more such features, systems, articles, materials, kits, and / or methods, if such features, systems, articles, materials, kits, and / or methods are not mutually inconsistent, is included within the inventive scope of the present disclosure. Disclosed embodiments, or portions thereof, may be combined in ways not listed above and / or not explicitly claimed. Thus, one or more features from variously disclosed examples and embodiments may be combined in various ways. For example, it is to be understood that the present disclosure contemplates that, to the extent possible, one or more features of any embodiment can be combined with one or more features of any other embodiment.

[0315] Various inventive concepts may be embodied as one or more methods, of which examples have been provided. The acts performed as part of the method may be ordered in any suitable way. Accordingly, embodiments may be constructed in which acts are performed in an order different than illustrated, which may include performing some acts simultaneously, even though shown as sequential acts in illustrative embodiments.

[0316] Although the above discussion discloses various exemplary embodiments of the invention, it should be apparent that those skilled in the art can make various126324 / 13302-LAN#7902969.1

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[0319] modifications that will achieve some of the advantages of the invention without departing from the true scope of the invention.

Claims

126324 / 13302-LAN#7902969.13 / 17 / 202646What is claimed is:

1. A method of polishing a surface of a diamond wafer, comprising:providing a diamond wafer having a top surface;performing a first dry plasma etching stage on the top surface of the diamond wafer within a plasma processing chamber, the first dry plasma etching stage operating under a first set of conditions configured to provide a relatively higher mechanical etch component and a relatively higher material removal rate, wherein the first dry plasma etching stage is configured to reduce surface roughness of the top surface from an initial roughness value to an intermediate roughness value; andperforming a second dry plasma etching stage on the top surface of the diamond wafer within a plasma processing chamber, the second dry plasma etching stage operating under a second set of conditions configured to provide a relatively greater chemical etch contribution and a relatively lower material removal rate than the first dry plasma etching stage,wherein the second dry plasma etching stage is configured to reduce surface roughness of the top surface to a final roughness value lower than the intermediate roughness value and producing a near-surface region of the diamond wafer having a defect density no greater than about 1.5 times the bulk defect density of the diamond wafer.

2. The method of claim 1, wherein the first set of conditions comprises a first ratio of non-reactive heavy bombardment gas to reactive gas and a first substrate bias level, and the second set of conditions comprises a second ratio of non-reactive heavy bombardment gas to reactive gas lower than the first ratio and a second substrate bias level lower than the first substrate bias level,wherein the non-reactive heavy bombardment gas comprises argon, xenon, or a combination thereof, andthe reactive gas comprises oxygen, a fluorine-containing gas, a chlorine-containing gas, a sulfur-containing gas, or a combination thereof.126324 / 13302-LAN#7902969.13 / 17 / 2026473. The method of claim 1, further comprising, prior to performing the first dry plasma etching stage, planarizing the top surface of the diamond wafer to reduce surface roughness to an initial roughness value suitable for the first dry plasma etching stage, wherein planarizing comprises at least one of lapping, grinding, laserbased surface preparation, and reactive ion beam etching.

4. The method of claim 1, wherein transitioning from the first dry plasma etching stage to the second dry plasma etching stage comprises continuously varying at least one of substrate bias level, ratio of non-reactive heavy bombardment gas to reactive gas, and / or inductive coil power, over a predetermined transition period such that the first set of conditions transitions gradually to the second set of conditions without a discrete parameter step change.

5. The method of claim 1, wherein the final roughness value is less than about 5 nanometers Ra, and wherein the near-surface region produced by the second dry plasma etching stage is substantially free of subsurface lattice damage beyond that intrinsic to the bulk crystal structure of the diamond wafer.

6. The method of claim 1, wherein the diamond wafer has a diameter of at least about 42 millimeters, and wherein the first dry plasma etching stage and the second dry plasma etching stage are performed without mechanical contact between a polishing surface and the top surface of the diamond wafer.

7. A plasma processing system for polishing a surface of a diamond wafer, comprising:one or more gas flow controllers configured to control the flow of a non-reactive heavy bombardment gas and a reactive gas into the plasma processing chamber;a substrate bias power supply configured to apply a bias voltage to a substrate electrode to accelerate ions toward the surface of a diamond wafer;an inductive coil power supply configured to drive an induction coil to generate the plasma within the chamber; and126324 / 13302-LAN#7902969.13 / 17 / 202648a controller comprising a processor and a non-transitory computer-readable medium storing instructions that, when executed by the processor, cause the system to:operate the one or more gas flow controllers and the substrate bias power supply to perform a first plasma stage in which the plasma processing chamber etches the surface of the diamond wafer under a first set of conditions comprising a first ratio of heavy bombardment gas to reactive gas and a first substrate bias level, the first set of conditions providing a relatively higher mechanical etch component and a relatively higher material removal rate sufficient to reduce surface roughness of the diamond wafer from an initial value to an intermediate value;receive one or more process signals indicative of a condition of the surface of the diamond wafer or a condition of the plasma within the chamber; andin response to the one or more process signals satisfying a predetermined transition criterion, operate the one or more mass flow controllers and the substrate bias power supply to transition to a second plasma stage in which the plasma processing chamber etches the surface of the diamond wafer under a second set of conditions comprising a second ratio of non-reactive heavy bombardment gas to reactive gas and a second substrate bias level, the second set of conditions providing a relatively greater chemical etch contribution and a relatively lower material removal rate than the first set of conditions,thereby further reducing surface roughness and producing a near-surface region having a defect density no greater than about 1.5 times the bulk defect density of the diamond wafer.

8. The system of claim 7, wherein the at least one sensing device comprises at least one of: an optical emission spectrometer configured to detect emission signals from plasma byproducts at wavelengths associated with carbon-containing etch products, a laser interferometer configured to measure etch depth in real time, and an RF impedance monitor configured to detect changes in plasma impedance, and126324 / 13302-LAN#7902969.13 / 17 / 202649wherein the predetermined transition criterion comprises at least one of a detected change in an optical emission signal indicative of a change in material removal rate, a calculated etch depth reaching a predetermined threshold, a detected change in plasma impedance correlating with a change in surface condition, and an elapsed process time reaching a predetermined duration.

9. The system of claim 7, wherein the instructions further cause the system to:transition from the first set of conditions to the second set of conditions by continuously varying at least one of the substrate bias level, the ratio of non-reactive heavy bombardment gas to reactive gas, the inductive coil power supply output, and the chamber pressure over a predetermined ramp period,such that the system transitions gradually from the first set of conditions to the second set of conditions without a discrete parameter step change, thereby implementing a gradient transition between the first plasma stage and the second plasma stage.

10. The system of claim 7, wherein the instructions further cause the system to, prior to performing the first plasma stage,receive a wafer characteristic input identifying at least one of a crystallographic orientation of the diamond wafer and a diameter of the diamond wafer,and in response to the wafer characteristic input, select from a plurality of stored process recipes a process recipe specifying the first set of conditions and the second set of conditions corresponding to the identified crystallographic orientation or diameter,wherein for a diamond wafer having a (111) crystallographic orientation the selected process recipe specifies a greater mechanical etch component during the first plasma stage relative to a process recipe selected for a diamond wafer having a (100) or (110) crystallographic orientation.

11. The method of claim 7, wherein the one or more process signals are received from at least one sensing device coupled to the plasma processing chamber.126324 / 13302-LAN#7902969.13 / 17 / 20265012. A method of finishing a diamond wafer, comprising:providing a diamond wafer having a planarized surface;subjecting the planarized surface to a first plasma etching stage configured to operate in an aggressive regime having a first material removal rate, the first plasma etching stage comprising ion bombardment sufficient to reduce the surface roughness of the planarized surface to an intermediate roughness between about 10 nanometers and about 20 nanometers, wherein the first plasma etching stage produces a near-surface region containing lattice damage resulting from energetic ion impacts; and subjecting the surface to a second plasma etching stage configured to operate in a gentle regime having a second material removal rate lower than the first material removal rate, the second plasma etching stage being more chemically dominated and less mechanically aggressive than the first plasma etching stage,wherein the second plasma etching stage removes material from the near-surface region containing the lattice damage produced during the first plasma etching stage and produces a finished surface having:an average surface roughness of less than about 5 nanometers, and a surface defect density no greater than about 1.5 times a bulk defect density of the diamond wafer.

13. The method of claim 12, wherein the planarized surface has an average surface roughness of less than about 200 nanometers.

14. The method of claim 12, wherein the planarized surface has an average surface roughness greater than about 30 nm.

15. A method of polishing a diamond wafer comprising:(a) planarizing a diamond wafer to a first surface roughness of less than approximately 150 nm Ra;(b) performing a first plasma dry etch step with a higher ratio of non-reactive gas to reactive gas and / or higher RF bias, reducing Ra to approximately 10-15 nm; and126324 / 13302-LAN#7902969.13 / 17 / 202651(c) performing a second plasma dry etch step with a higher ratio of reactive gas to non-reactive gas and / or lower RF bias, reducing Ra to less than 5 nm and achieving a surface defect density no greater than approximately 1.5x the bulk crystal defect density.

16. The method of claim 15, wherein the second plasma dry etch step has reduced RF bias applied to the plasma chamber as compared to the first plasma dry etch step.

17. The method of claim 15, wherein the second plasma dry etch step has increased the ratio of reactive gas relative to non-reactive gas as compared to the first plasma dry etch step.

18. The method of claim 15, wherein the planarization step comprises reactive ion beam etching (RIBE) using co-etching of a resist layer and diamond surface.

19. The method of claim 15, wherein a diamond wafer produced by the method has a surface Ra of less than 1 nm and a surface defect density no greater than 1.5x bulk defect density.

20. The method of claim 15, wherein the diamond wafer has a diameter of at least 50 mm and less than 300 mm.

21. A diamond wafer comprising:a bulk diamond crystal body having an intrinsic bulk defect density; and a top surface produced by a dry plasma polishing process, the top surface exhibiting an average surface roughness of less than about 5 nanometers Ra and a near-surface region having a defect density no greater than about 1.5 times the intrinsic bulk defect density of the bulk diamond crystal body, wherein the near-surface region is substantially free of subsurface lattice damage beyond that intrinsic to the bulk crystal structure.126324 / 13302-LAN#7902969.13 / 17 / 20265222. The diamond wafer of claim 21, wherein the average surface roughness of the top surface is less than about 1 nanometer Ra, and wherein in some embodiments the average surface roughness is less than or equal to about 0.5 nanometers Ra or approaches angstrom-scale roughness of approximately 2 A or lower.

23. The diamond wafer of claim 21, wherein the diamond wafer has a diameter of at least about 42 millimeters, and wherein the top surface exhibits the average surface roughness substantially uniformly across the full diameter of the top surface.

24. The diamond wafer of claim 21, wherein the bulk diamond crystal body is a single-crystal diamond body formed by chemical vapor deposition or high-pressure high-temperature growth, and wherein the top surface corresponds to a crystallographic orientation selected from the group consisting of the (100) orientation, the (110) orientation, the (111) orientation, and combinations thereof.

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