Display panel and display apparatus

Abstract

A display panel (100) and a display apparatus (1000). The display panel (100) comprises a first substrate (10), a second substrate (20), and a plurality of sub-pixels (30). The first substrate (10) and the second substrate (20) are arranged opposite to each other. The plurality of sub-pixels (30) are located between the first substrate (10) and the second substrate (20); each sub-pixel (30) has a display area (301) and at least one storage area (302) located on at least one side of the display area (301). Each sub-pixel (30) comprises a barrier wall structure (31), a plurality of particles (32), and electrode assemblies (33). The barrier wall structure (31) is provided with a first recess (1); the first recess (1) is located in the storage area (302); the plurality of particles (32) comprise first particles (321), and a color of the first particles (321) is a first color; and an electric field is generated between the electrode assemblies (33), wherein under the action of the electric field, the plurality of first particles (321) are located in the display area (301), and the sub-pixel (30) displays the first color; or under the action of the electric field, the plurality of first particles (321) are located in the first recess (1), and the sub-pixel (30) displays a second color.

Description

Display panel and display device Technical Field

[0001] This disclosure relates to the field of display technology, and more particularly to a display panel and display device. Background Technology

[0002] Electrophoretic display devices (EPDs) have advantages such as low power consumption, portability, eye protection, and the ability to update display content at any time, and are gradually being applied in many fields such as education, medical care, and people's daily reading. Summary of the Invention

[0003] On one hand, a display panel is provided. The display panel includes a first substrate, a second substrate, and a plurality of sub-pixels. The first substrate and the second substrate are disposed opposite to each other. The plurality of sub-pixels are located between the first substrate and the second substrate; each sub-pixel has a display area and at least one storage area located on at least one side of the display area. Each sub-pixel includes a barrier structure, a plurality of particles, and an electrode assembly. The barrier structure has a first groove; the first groove is located in the storage area; the plurality of particles include first particles of a first color; an electric field is generated between the electrode assemblies, and under the action of the electric field, the plurality of first particles are located in the display area, and the sub-pixel displays the first color; or under the action of the electric field, the plurality of first particles are located in the first groove, and the sub-pixel displays a second color.

[0004] In some embodiments, the barrier structure includes a first dielectric layer and a first barrier. The first dielectric layer extends from the display area to the storage area; the first barrier is disposed around the first dielectric layer; one end of the first barrier near the first substrate is connected to the first substrate, and the other end away from the first substrate abuts against the second substrate; wherein the first groove penetrates the first dielectric layer and exposes the first barrier.

[0005] In some embodiments, the surface of the first dielectric layer away from the first substrate is black, and the color of the first particles is different from black.

[0006] In some embodiments, the first dielectric layer is a single-piece structure, and the color of the first dielectric layer is black.

[0007] In some embodiments, the first dielectric layer includes a first sublayer and a first black matrix. The first black matrix is ​​located on the side of the first sublayer away from the first substrate and is located in the display area.

[0008] In some embodiments, the electrode assembly includes a first electrode and a second electrode. The first electrode is located on the inner sidewall of the first retaining wall and within the first groove. The second electrode is located on the inner sidewall of the first retaining wall and is disposed opposite to the first electrode.

[0009] In some embodiments, the first retaining wall is black.

[0010] In some embodiments, the first electrode is a transparent electrode or the second electrode is a transparent electrode.

[0011] In some embodiments, the sub-pixel has a plurality of storage areas, the plurality of storage areas including a first storage area and a second storage area; the first groove is located in the first storage area; the barrier structure further includes a second groove, the second groove being spaced apart from the first groove, and the second groove being located in the second storage area; the plurality of particles further includes a plurality of second particles, the second particles being black and different in color from the first particles; wherein, under the action of the electric field, the plurality of first particles are located in the display area, the plurality of second particles are located in the second groove, and the sub-pixel displays a first color; or, under the action of the electric field, the plurality of first particles are located in the first groove, the plurality of second particles are located in the display area, and the sub-pixel displays black.

[0012] In some embodiments, the second groove penetrates the first medium layer and exposes the first retaining wall.

[0013] In some embodiments, the electrode assembly includes a first electrode, a second electrode, and a third electrode. The first electrode is located on the inner sidewall of the first barrier and within the first groove; the second electrode is located on the inner sidewall of the first barrier and is disposed opposite to the first electrode; the second electrode is located within the second groove; the third electrode is located between the first dielectric layer and the second substrate and is located on the second substrate; the third electrode is a transparent electrode and is located in the display area.

[0014] In some embodiments, the electrode assembly includes a first electrode, a second electrode, and a third electrode. The first electrode is located on the inner sidewall of the first barrier and within the first groove; the second electrode is located on the inner sidewall of the first barrier and is disposed opposite to the first electrode; the second electrode is located within the second groove; the third electrode is located between the first dielectric layer and the second substrate and is located on the first dielectric layer; the third electrode is located in the display area.

[0015] In some embodiments, the first particle is white or black, and the plurality of storage areas further includes a third storage area; the barrier structure is further provided with a third groove, the third groove being spaced apart from the first groove, and the third groove being located in the third storage area; the plurality of particles further includes a plurality of third particles, the third particles being a third color, and the third color being one of the colors; wherein, under the action of the electric field, the plurality of first particles are located in the display area, the plurality of third particles are located in the third groove, and the sub-pixel displays the first color; or, under the action of the electric field, the plurality of first particles are located in the first groove, the plurality of third particles are located in the display area, and the sub-pixel displays the third color.

[0016] In some embodiments, the distance between the first dielectric layer and the second substrate in the display area is 1 μm to 4 μm.

[0017] In some embodiments, the storage areas in a plurality of adjacent sub-pixels overlap.

[0018] In some embodiments, the barrier structure includes a first barrier surrounding the display area; one end of the first barrier near the first substrate is connected to the first substrate, and the other end away from the first substrate has a gap with the second substrate; the first groove penetrates the first barrier.

[0019] In some embodiments, the electrode assembly includes a fourth electrode, a fifth electrode, and a sixth electrode. The fourth electrode is located on the bottom wall of the first groove; the fifth electrode is located between the first substrate and the second substrate, and is located on the second substrate, with the fifth electrode disposed opposite to the fourth electrode; the sixth electrode is located between the first substrate and the second substrate, and is located on the first substrate, with the sixth electrode located in the display area.

[0020] In some embodiments, the barrier structure further includes a first dielectric layer located between the first substrate and the sixth electrode, wherein the sixth electrode is located on the first dielectric layer.

[0021] In some embodiments, the electrode assembly includes a fourth electrode, a fifth electrode, and a sixth electrode. The fourth electrode is located on the bottom wall of the first groove; the fifth electrode is located between the first substrate and the second substrate, and is located on the second substrate, with the fifth electrode opposite to the fourth electrode; the sixth electrode is located between the first substrate and the second substrate, and is located on the second substrate; the sixth electrode is located in the display area, and the sixth electrode is a transparent electrode.

[0022] In some embodiments, the sub-pixel further includes a second black matrix located between the barrier structure and the second substrate, and on the second substrate, the second black matrix covering the storage area and offset from the display area.

[0023] On the other hand, a display device is provided. The display device includes a display panel as described in any of the above embodiments.

[0024] In another aspect, a driving method for a display panel is provided. This method is used to drive a display panel as described in any of the above embodiments. A plurality of sub-pixels form a pixel unit, each sub-pixel having N gray levels. The driving method includes: adjusting the pixel unit from a first gray level to a second gray level; changing the number of first particles in the pixel unit when the absolute value of the difference between the first and second gray levels is less than N; changing the number of sub-pixels in the pixel unit in a bright state when the absolute value of the difference between the first and second gray levels is a multiple of N; and changing the number of sub-pixels in the pixel unit in a bright state and the number of first particles in the pixel unit when the absolute value of the difference between the first and second gray levels is greater than or equal to N and not a multiple of N. Attached Figure Description

[0025] To more clearly illustrate the technical solutions in this disclosure, the accompanying drawings used in some embodiments of this disclosure will be briefly described below. Obviously, the drawings described below are only drawings of some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings. In addition, the drawings described below can be regarded as schematic diagrams and are not intended to limit the actual size of the product, the actual flow of the method, the actual timing of the signals, etc. involved in the embodiments of this disclosure.

[0026] Figure 1A is a structural diagram of a display device according to some embodiments;

[0027] Figure 1B is another structural diagram of a display device according to some embodiments;

[0028] Figure 2 is a structural diagram of a display panel according to some embodiments;

[0029] Figure 3 is a cross-sectional view along the cutting plane AA in Figure 2;

[0030] Figure 4 is another cross-sectional view along the cutting plane AA in Figure 2;

[0031] Figure 5A is another cross-sectional view along the cutting plane AA in Figure 2;

[0032] Figure 5B is another cross-sectional view along the cutting plane AA in Figure 2;

[0033] Figure 6A is another cross-sectional view along the cutting plane AA in Figure 2;

[0034] Figure 6B is another cross-sectional view along the cutting plane AA in Figure 2;

[0035] Figure 7 is a magnified view of part B in Figure 2;

[0036] Figure 8A is a cross-sectional view along the cutting plane CC in Figure 7;

[0037] Figure 8B is another cross-sectional view along the cutting plane CC in Figure 7;

[0038] Figure 8C is another cross-sectional view along the cutting plane CC in Figure 7;

[0039] Figure 9A is a cross-sectional view along the cutting plane DD in Figure 7;

[0040] Figure 9B is another cross-sectional view along the cutting plane DD in Figure 7;

[0041] Figure 9C is another cross-sectional view along the cutting plane DD in Figure 7;

[0042] Figure 10 is a magnified view of part E in Figure 2;

[0043] Figure 11A is a cross-sectional view along the cutting plane FF in Figure 10;

[0044] Figure 11B is another cross-sectional view along the cutting plane FF in Figure 10;

[0045] Figure 11C is another cross-sectional view along the cutting plane FF in Figure 10;

[0046] Figure 12 is another cross-sectional view along the cutting plane FF in Figure 10;

[0047] Figure 13A is another cross-sectional view along the cutting plane FF in Figure 10;

[0048] Figure 13B is another cross-sectional view along the cutting plane FF in Figure 10;

[0049] Figure 13C is another cross-sectional view along the cutting plane FF in Figure 10;

[0050] Figure 14 is a magnified view of a portion of G in Figure 2;

[0051] Figure 15 is a structural diagram of a pixel unit according to some embodiments;

[0052] Figure 16 is another enlarged view of G in Figure 2;

[0053] Figure 17 is a flowchart of the manufacturing process of a display panel according to some embodiments;

[0054] Figure 18 is another fabrication process diagram of the first substrate according to some embodiments;

[0055] Figures 19A to 19D are structural diagrams after steps S111 to S114 are completed according to some embodiments;

[0056] Figure 20 is a flowchart of the fabrication process of the second substrate according to some embodiments;

[0057] Figure 21 is a structural diagram after step S210 is completed according to some embodiments;

[0058] Figure 22 is a structural diagram after step S300 is completed according to some embodiments. Detailed Implementation

[0059] The technical solutions in some embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments provided in this disclosure are within the scope of protection of this disclosure.

[0060] Unless the context otherwise requires, throughout the specification and claims, the term "comprise" and its other forms, such as the third-person singular "comprises" and the present participle "comprising," are interpreted as open-ended and encompassing, meaning "including, but not limited to." In the description of the specification, terms such as "one embodiment," "some embodiments," "exemplary embodiments," "example," "specific example," or "some examples," etc., are intended to indicate that a particular feature, structure, material, or characteristic associated with that embodiment or example is included in at least one embodiment or example of this disclosure. The illustrative representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics mentioned may be included in any suitable manner in any one or more embodiments or examples.

[0061] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of embodiments of this disclosure, unless otherwise stated, "a plurality of" means two or more.

[0062] In describing some embodiments, the term "connection" and its derivative expressions may be used. The term "connection" should be interpreted broadly; for example, "connection" can be a fixed connection, a detachable connection, or an integral part; it can be a direct connection or an indirect connection through an intermediate medium. The embodiments disclosed herein are not necessarily limited to the content of this document.

[0063] "At least one of A, B and C" has the same meaning as "at least one of A, B or C", both including the following combinations of A, B and C: only A, only B, only C, combinations of A and B, combinations of A and C, combinations of B and C, and combinations of A, B and C.

[0064] "A and / or B" includes the following three combinations: A only, B only, and a combination of A and B.

[0065] The use of “applies to” or “configured to” in this article implies an open and inclusive language that does not preclude applicability to or configuration to devices that perform additional tasks or steps.

[0066] In addition, the use of “based on” implies openness and inclusivity, because processes, steps, calculations or other actions “based on” one or more of the stated conditions or values ​​may in practice be based on additional conditions or values ​​beyond those stated.

[0067] As used herein, “about,” “approximately,” or “approximately” includes the stated value and the average value within an acceptable range of deviation from the given value, wherein the acceptable range of deviation is determined by a person skilled in the art taking into account the measurement under discussion and the error associated with the measurement of the given quantity (i.e., the limitations of the measurement system).

[0068] As used herein, “parallel,” “perpendicular,” and “equal” include the described situation and situations that are similar to the described situation, within an acceptable range of deviation, which is determined by those skilled in the art taking into account the measurement under discussion and the error associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, “parallel” includes absolute parallelism and approximate parallelism, where an acceptable range of deviation for approximate parallelism may be, for example, within 5°; “perpendicular” includes absolute perpendicularity and approximate perpendicularity, where an acceptable range of deviation for approximate perpendicularity may also be, for example, within 5°; “equal” includes absolute equality and approximate equality, where an acceptable range of deviation for approximate equality may be, for example, a difference between the two equals being less than or equal to 5% of either one.

[0069] It should be understood that when a layer or element is referred to as being on another layer or substrate, it can mean that the layer or element is directly on the other layer or substrate, or that there is an intermediate layer between the layer or element and the other layer or substrate.

[0070] This document describes exemplary embodiments with reference to cross-sectional views and / or plan views, which are idealized exemplary drawings. In the drawings, the thickness of layers and the area of ​​regions are enlarged for clarity. Therefore, variations in shape relative to the drawings are contemplated due to, for example, manufacturing techniques and / or tolerances. Thus, exemplary embodiments should not be construed as being limited to the shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing processes. For example, etched areas shown as rectangular would typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to show the actual shapes of the areas of the device, nor are they intended to limit the scope of the exemplary embodiments.

[0071] Some embodiments of this disclosure provide a display device, wherein the display device 1000 is a product having image display functionality. Exemplarily, the display device 1000 may be any device that displays either moving (e.g., video) or fixed (e.g., still image) content, and whether it is text or an image.

[0072] For example, the display device 1000 can be any product or component with display function, such as a mobile phone, e-reader, smartwatch, health monitoring bracelet, electronic price tag, electronic billboard, hospital bedside card, medicine label, electronic paper tablet, personal digital assistant (PDA), clock, calculator, GPS receiver / navigator, in-vehicle display, or in-flight display.

[0073] In some examples, as shown in Figure 1A, the display device 1000 can be a portable display product. For example, the display device 1000 can be a mobile phone as shown in Figure 1A.

[0074] In some other examples, as shown in Figure 1B, the display device 1000 can be a wearable device. For instance, the display device 1000 can be a smartwatch as shown in Figure 1B.

[0075] In some embodiments, as shown in FIG2, the display device 1000 includes a display panel 100 and a driving circuit board (not shown in the figure). The driving circuit board may include, for example, a timing controller (TCON), a power management chip, and an adjustable resistor voltage divider circuit, etc. Of course, the driving circuit board may also include other circuit structures, which will not be listed here. The driving circuit board is electrically connected to the display panel 100 and is used to transmit control signals to the display panel 100 to drive the display panel 100 to achieve image display. In addition, the display device 1000 may also include, but is not limited to, a touch structure, an under-display camera, and an under-display fingerprint sensor, enabling the display device 1000 to realize various functions such as touch control, photography, video recording, or fingerprint recognition, which will not be listed here.

[0076] As shown in Figures 2 and 3, the display panel 100 includes a first substrate 10, a second substrate 20, and a plurality of sub-pixels 30.

[0077] The material used for the first substrate 10 may include polymer resin or glass. Exemplarily, the first substrate 10 may be flexible, and the material used for the substrate 10 may include polymer resins such as polyethersulfone (PES), polyarylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenyl sulfide granules (PPS), polyimide (PI), polycarbonate (PC), and cellulose acetate propionate (CAP). For example, the first substrate 10 may be rigid and may include a glass material containing SiO2 as the main component.

[0078] The second substrate 20 is located on one side of the first substrate 10 and is disposed opposite to the first substrate 10. The material of the second substrate 20 can be the same as that of the first substrate 10, which can improve the uniformity of materials in the display panel 100 and reduce the manufacturing cost of the display panel 100.

[0079] As shown in Figures 2 and 3, a plurality of sub-pixels 30 are located between the first substrate 10 and the second substrate 20. As shown in Figure 2, the plurality of sub-pixels 30 can be arranged in multiple rows and columns, for example, each row of sub-pixels 30 includes at least two sub-pixels 30 arranged along a first direction X, and each column of sub-pixels 30 includes at least two sub-pixels 30 arranged along a second direction Y. The first direction X intersects the second direction Y, for example, the first direction X is perpendicular to the second direction Y.

[0080] In some embodiments, as shown in FIG3, the sub-pixel 30 has a display area 301 and at least one storage area 302 located on at least one side of the display area 301.

[0081] As shown in Figure 3, the sub-pixel 30 includes a barrier structure 31, multiple particles 32, and an electrode assembly 33. The barrier structure 31 has a first groove 1 located in the storage area 302. The multiple particles 32 include a first particle 321, and the color of the first particle 321 is a first color.

[0082] An electric field is generated between the electrode components 33. Under the influence of the electric field, multiple first particles 321 are located in the display area 301. When natural light shines on the first particles 321, the first particles 321 reflect the light of the first color in the natural light and absorb the light of other colors, or the first particles 321 absorb all the natural light. At this time, under the reflection of natural light, the display area 301 displays the first color, that is, the sub-pixel 30 displays the first color.

[0083] Alternatively, under the influence of an electric field, multiple first particles 321 are located in the first groove 1. At this time, under the reflection of natural light, the display area 301 displays a second color (the second color is different from the first color), that is, the sub-pixel 30 displays the second color. Thus, the display panel 100 can perform different controls on each sub-pixel 30 to achieve the display of text and images.

[0084] In some examples, the first color is black, white, red, green, blue, purple, pink, or yellow. The second color is black, white, red, green, blue, purple, pink, or yellow.

[0085] In some examples, the first color is white and the second color is black.

[0086] In some examples, subpixel 30 has one, two, three, four, or five storage areas 302.

[0087] In some embodiments, as shown in FIG3, the barrier structure 31 includes a first dielectric layer 311 and a first barrier 312. The first dielectric layer 311 extends from the display area 301 to the storage area 302. The first barrier 312 is disposed around the first dielectric layer 311, with one end of the first barrier 312 near the first substrate 10 connected to the first substrate 10 and the other end away from the first substrate 10 abutting against the second substrate 20. In this way, the first barrier 312 separates the multiple sub-pixels 30, so that the multiple sub-pixels 30 do not affect each other.

[0088] Based on this, when the sub-pixel 30 displays the first color, a plurality of first particles 321 are located between the first dielectric layer 311 and the second substrate 20.

[0089] It should be noted that the term "abutment" should be interpreted broadly, encompassing fixed connections, detachable connections, and mating or adhering relationships. Furthermore, "abutment" can be direct, meaning there are no other components (or areas, layers, or parts) between the two parts (or sections, layers, or portions), or indirect, meaning there are other components (or areas, layers, or portions) between the two parts (or sections, layers, or portions).

[0090] In some examples, as shown in Figure 3, the first groove 1 penetrates the first dielectric layer 311 and exposes the first barrier 312. In this case, the first barrier 312, the first dielectric layer 311, and the first substrate 10 form the first groove 1.

[0091] In other examples, the first groove 1 extends only through the first dielectric layer 311 and is spaced from the first barrier 312. In this case, the first dielectric layer 311 and the first substrate form the first groove 1.

[0092] Understandably, the larger the slope angle of the first barrier wall 312, the smaller its width and volume, and the larger the first dielectric layer 311 between the first barrier walls 312 can be. This increases the area of ​​the display area 301 and the aperture ratio of the sub-pixels 30, which is beneficial for improving the display brightness and display effect of the display panel 100. Conversely, the smaller the slope angle of the first barrier wall 312, the easier it is to deposit conductive metal to form electrodes on the sidewalls of the first barrier wall 312.

[0093] In some examples, taking into account both the aperture ratio of the sub-pixel 30 and electrode formation, the slope angle of the first barrier 312 is 60° to 80°. For example, the slope angle of the first barrier 312 is 60°, 61°, 62°, 65°, 66°, 68°, 69°, 70°, 71°, 74°, 75°, 89°, or 80°. Thus, during the formation of the first barrier 312, the portion of the first barrier 312 with a smaller slope angle (e.g., 60° to 70°) is conducive to electrode formation, while the portion with a larger slope angle (e.g., 70° to 80°) is conducive to increasing the aperture ratio of the sub-pixel.

[0094] In some examples, as shown in Figure 3, the height of the first retaining wall 312 is 5 μm to 100 μm. For example, the height of the first retaining wall 312 is 5 μm, 10 μm, 18 μm, 22 μm, 25 μm, 30 μm, 40 μm, 47 μm, 50 μm, 54 μm, 60 μm, 63 μm, 67 μm, 70 μm, 75 μm, 80 μm, 90 μm, or 100 μm.

[0095] In some examples, as shown in Figure 3, the width of the first retaining wall 312 is 5μm to 15μm. For example, the width of the first retaining wall 312 is 5μm, 6μm, 7μm, 8μm, 9μm, 10μm, 11μm, 12μm, 13μm, 14μm or 15μm.

[0096] In some embodiments, as shown in FIG3, the distance between the first dielectric layer 311 and the second substrate 20 is 1 μm to 4 μm. For example, the distance between the first dielectric layer 311 and the second substrate 20 is 1 μm, 2 μm, 3 μm or 4 μm.

[0097] In this configuration, the number of first particles 321 between the first dielectric layer 311 and the second substrate 20 is not too large. This shortens the response time of the first particles 321, which is beneficial to improving the response speed of the display panel 100. At the same time, the number of first particles 321 is not too small, which increases the reflectivity of multiple first particles 321, resulting in a larger amount of light reflected by the particles 321, which is beneficial to improving the display effect of the display panel 100.

[0098] Understandably, the smaller the ratio of the distance between the first dielectric layer 311 and the second substrate 20 to the height of the first barrier 312, the larger the gap between the first dielectric layer 311 and the second substrate 20, the larger the number of first particles 321 between the first dielectric layer 311 and the second substrate 20, the thicker the stack of multiple first particles 321, and the higher the reflectivity of multiple first particles 321. However, in order to store multiple first particles 321, the first groove 1 needs to be made larger, the area of ​​the storage area 302 needs to be larger, the area of ​​the display area 301 needs to be larger, and the aperture ratio of the sub-pixel needs to be smaller.

[0099] In practical applications, the ratio of the distance between the first dielectric layer 311 and the second substrate 20 to the height of the first barrier 312 needs to be determined based on the characteristics of the first particle 321. For example, if the first particle 321 has a high reflectivity, the ratio of the distance between the first dielectric layer 311 and the second substrate 20 to the height of the first barrier 312 can be smaller.

[0100] In some examples, taking into account both the aperture ratio and reflectivity of the sub-pixel 30, the ratio of the distance between the first dielectric layer 311 and the second substrate 20 to the height of the first barrier 312 is 0.5 to 0.667. For example, the ratio of the distance between the first dielectric layer 311 and the second substrate 20 to the height of the first barrier 312 is 0.5, 0.51, 0.53, 0.54, 0.55, 0.58, 0.6, 0.62, 0.63, 0.64, 0.65, 0.66, or 0.667. This ensures that the aperture ratio of the sub-pixel 30 is not too small, nor is the reflectivity too small, which is beneficial to improving the display effect of the display panel 100.

[0101] In some examples, the first dielectric layer 311 is a planarization layer, that is, the surface of the first dielectric layer 311 away from the first substrate 10 is parallel to the first substrate 10.

[0102] In some examples, the first barrier 312 is black, so that the first barrier 312 can absorb all the light. When natural light shines on the first barrier 312, the first barrier 312 absorbs the natural light, thereby reducing the risk that the light reflected by the first barrier 312 will affect the normal display of the sub-pixel 30, which is beneficial to improving the display effect of the display panel 100.

[0103] In some embodiments, as shown in Figures 3 and 4, the surface of the first dielectric layer 311 away from the first substrate 10 is black, and the color of the first particle 321 is different from black, for example, the color of the first particle 321 is white.

[0104] In this configuration, when multiple first particles 321 are located in the display area 301, the first particles 321 reflect light of the first color from natural light and absorb light of other colors. The light reflected by the multiple first particles 321 is diffuse, meaning the light reflected by the multiple first particles 321 is diffuse. This results in soft, comfortable, and uniform light, which is beneficial for improving the display effect of the display panel 100. When the multiple first particles 321 are located in the storage area 302, natural light shines on the first dielectric layer 311. The surface of the first dielectric layer 311, away from the first substrate 10, absorbs all visible light, and the sub-pixel 30 displays black.

[0105] In some examples, as shown in Figure 3, the first dielectric layer 311 is an integral structure, that is, the first dielectric layer 311 is a single-layer structure, and the color of the first dielectric layer 311 is black, so that the surface of the first dielectric layer 311 away from the first substrate 10 is black.

[0106] For example, the material of the first dielectric layer 311 can be a black organic material. For instance, the material of the first dielectric layer 311 includes aniline black, polydimethylsiloxane, or organic stamp material.

[0107] In other examples, as shown in FIG4, the first dielectric layer 311 includes a first sublayer 3111 and a first black matrix 3112. The first black matrix 3112 is located on the side of the first sublayer 3111 away from the first substrate 10 and is located in the display area 301. Thus, the surface of the first black matrix 3112 away from the first substrate 10 is the surface of the first dielectric layer 311 away from the first substrate 10, thereby making the surface of the first dielectric layer 311 away from the first substrate 10 black.

[0108] For example, the material of the first sublayer 3111 includes at least one of silicon dioxide, aluminum oxide, titanium dioxide, silicon nitride, silicon oxide, aluminum nitride, polyimide, epoxy resin, tantalum oxide, and hafnium oxide.

[0109] For example, the material of the first black matrix 3112 includes black resin photoresist or a silicon dioxide nanoparticle-polydimethylsiloxane composite layer.

[0110] In some embodiments, as shown in Figures 3 and 4, the electrode assembly 33 includes a first electrode 331 and a second electrode 332. The first electrode 331 is located on the inner sidewall of the first baffle 312 and within the first groove 1. The second electrode 332 is located on the inner sidewall of the first baffle 312 and is disposed opposite to the first electrode 331.

[0111] In this configuration, when there is a voltage difference between the first electrode 331 and the second electrode 332, an electric field is formed between the first electrode 331 and the second electrode 332. Under the influence of this electric field, multiple first particles 321 will move in the direction from the first electrode 331 to the second electrode 332, at which time the multiple first particles 321 are located in the display area 301. Alternatively, under the influence of this electric field, multiple first particles 321 will move in the direction from the second electrode 332 to the first electrode 331, at which time the multiple first particles 321 are located in the storage area 302.

[0112] In some examples, the first particle 321 carries a positive charge. If a positive voltage is applied to the first electrode 331 and a negative voltage is applied to the second electrode 332, multiple first particles 321 will move in the direction from the first electrode 331 to the second electrode 332. These multiple first particles 321 are located in the display area 301, and under the reflection of natural light, the sub-pixel 30 displays a first color. If a negative voltage is applied to the first electrode 331 and a positive voltage is applied to the second electrode 332, multiple first particles 321 will move in the direction from the second electrode 332 to the first electrode 331. These multiple first particles 321 are located in the storage area 302, and under the reflection of natural light, the sub-pixel 30 displays a second color.

[0113] In some embodiments, as shown in Figures 3 and 4, the sub-pixel 30 further includes a pixel circuit 34, which includes a first pixel circuit 341 and a second pixel circuit 342. The driving circuit board and the first electrode 331 are connected through the first pixel circuit 341, so that electrical signals on the driving circuit board can be transmitted to the first electrode 331 through the first pixel circuit 341. The driving circuit board and the second electrode 332 are connected through the second pixel circuit 342, so that electrical signals on the driving circuit board can be transmitted to the second electrode 332 through the second pixel circuit 342.

[0114] In some embodiments, pixel circuit 34 (first pixel circuit 341 and second pixel circuit 342) includes transistor 343.

[0115] The transistors used in the pixel circuit 34 provided in the embodiments of this disclosure can be thin-film transistors, field-effect transistors, or other switching devices with the same characteristics. In the embodiments of this disclosure, thin-film transistors are used as an example for illustration.

[0116] In some examples, transistor 343 can be an oxide thin-film transistor, an amorphous silicon thin-film transistor, or a low-temperature polycrystalline silicon thin-film transistor.

[0117] For example, transistor 343 is an oxide thin-film transistor, which has a high carrier mobility, thus improving the response speed of transistor 343.

[0118] As shown in Figures 3 and 4, transistor 343 includes an active portion 3431, a source 3432, a drain 3433, and a gate 3434, with the source 3432 and drain 3433 respectively in contact with the active portion 3431.

[0119] It should be noted that the source 3432 and drain 3433 mentioned above can be interchanged, that is, 3432 in Figures 3 and 4 represents the drain and 3433 represents the source.

[0120] Based on this, as shown in Figures 3 and 4, the first groove 1 exposes the drain 3433 in the first pixel circuit 341, and the end of the first electrode 331 near the first substrate 10 is connected to the drain 3433 in the first pixel circuit 341. The end of the second electrode 332 near the first substrate 10 is connected to the drain 3433 in the second pixel circuit 342.

[0121] In some embodiments, with the first barrier 312 being black, the first electrode 331 is a transparent electrode (e.g., the light transmittance of the first electrode is greater than or equal to 85%). In this way, natural light can pass through the first electrode 331 and illuminate the first barrier 312. The first barrier 312 absorbs the natural light passing through the first electrode 331, which can reduce the risk of the light reflected by the first electrode 331 affecting the normal display of the sub-pixel 30 and is beneficial to improving the display effect of the display panel 100.

[0122] For example, the material of the first electrode 331 is indium zinc oxide.

[0123] In some embodiments, with the first barrier 312 being black, the second electrode 332 is a transparent electrode. (For example, the light transmittance of the first electrode is greater than or equal to 85%). In this way, natural light can pass through the second electrode 332 and illuminate the first barrier 312. The first barrier 312 absorbs the natural light passing through the second electrode 332, which can reduce the risk of the light reflected by the second electrode 332 affecting the normal display of the sub-pixel 30, and is beneficial to improving the display effect of the display panel 100.

[0124] For example, the material of the second electrode 332 is indium zinc oxide.

[0125] In some embodiments, the inner boundary of the inner sidewall of the first barrier 312 projected onto the first substrate 10 is rectangular, and the first electrode 331 and the second electrode 332 are arranged at intervals along the width direction of the rectangle.

[0126] With this configuration, the distance between the first electrode 331 and the second electrode 332 is small, and the electric field formed by the first electrode 331 and the second electrode 332 is strong. Under the action of this electric field, the first particle 321 moves at a high speed and has a short response time, which helps to shorten the response time of the display panel 100 and improve the response speed of the display panel 100.

[0127] Understandably, with the pixel resolution of the display panel 100 remaining constant, a larger ratio of the rectangle's length to its width, and a smaller distance between the first electrode 331 and the second electrode 332, can reduce the voltage required to move the first particle 321, thus lowering the power consumption of the display panel 100. Furthermore, it allows for a shorter path for the first particle 321, resulting in a shorter response time and thus reducing the response time and speed of the display panel 100. However, a smaller distance between the first electrode 331 and the second electrode 332 leads to a smaller aperture ratio for the sub-pixels.

[0128] In some examples, taking into account both the aperture ratio of the sub-pixel 30 and the response speed of the first particle 321, the ratio of the length to the width of the rectangle is between 1.5 and 3. For example, the ratio of the length to the width of the rectangle is 1.5, 1.6, 1.8, 1.9, 2, 2.3, 2.5, 2.8, or 3. This ensures that the aperture ratio of the sub-pixel 30 is not too small, nor that the response speed of the first particle 321 is not too small, which is beneficial to improving the display effect of the display panel 100.

[0129] In some embodiments, as shown in Figures 5A, 5B, 6A, and 6B, the sub-pixel 30 has a plurality of storage areas 302, including a first storage area 3021 and a second storage area 3022. A first groove 1 is located in the first storage area 3021. The barrier structure 31 also has a second groove 2, which is spaced apart from the first groove 1 and is located in the second storage area 3022. The plurality of particles 32 also includes a plurality of second particles 322, which are black in color and different in color from the first particles 321.

[0130] Under the influence of the electric field, as shown in Figures 5A and 6A, multiple first particles 321 are located in the display area 301, and multiple second particles 322 are located in the second groove 2. When natural light shines on the first particles 321, the first particles 321 reflect the light of the first color in the natural light and absorb the light of other colors. At this time, under the reflection of natural light, the display area 301 displays the first color, that is, the sub-pixel 30 displays the first color.

[0131] Alternatively, under the influence of an electric field, as shown in Figures 5B and 6B, multiple first particles 321 are located in the first groove 1, and multiple second particles 322 are located in the display area 301. When natural light shines on the second particles 322, the second particles 322 absorb the natural light. At this time, under the reflection of natural light, the display area 301 displays black, that is, the sub-pixel 30 displays black.

[0132] Based on this, the color of the surface of the first dielectric layer 311 away from the first substrate 10 does not need to be set to black.

[0133] In some examples, as shown in Figures 5A, 5B, 6A, and 6B, the second groove 2 penetrates the first dielectric layer 311 and exposes the first barrier 312. In this case, the first barrier 312, the first dielectric layer 311, and the first substrate 10 form the second groove 2.

[0134] In other examples, the second groove 2 extends only through the first dielectric layer 311 and is spaced from the first barrier 312. In this case, the first dielectric layer 311 and the first substrate 10 form the second groove 21.

[0135] In some embodiments, as shown in Figures 5A and 5B, the electrode assembly 33 includes a first electrode 331, a second electrode 332, and a third electrode 333. The first electrode 331 is located on the inner sidewall of the first baffle 312 and is situated within a first groove 1. The second electrode 332 is located on the inner sidewall of the first baffle 312 and is disposed opposite to the first electrode 331, situated within a second groove 2. The third electrode 333 is located between the first dielectric layer 311 and the second substrate 20, and is situated on the second substrate 20. The third electrode 333 is a transparent electrode (e.g., the light transmittance of the third electrode 333 is greater than 85%), and is located in the display area 301.

[0136] Based on the above structure, under the action of an electric field, as shown in Figure 5A, multiple first particles 321 are located between the first dielectric layer 311 and the third electrode 333 within the display area 301, and are attached to the surface of the third electrode 333 near the first substrate 10, while multiple second particles 322 are located in the second groove 2. Natural light passes through the third electrode 333 and illuminates the first particles 321. The first particles 321 reflect the first color of the natural light and absorb the other colors. At this time, under the reflection of natural light, the display area 301 displays the first color, that is, the sub-pixel 30 displays the first color.

[0137] Alternatively, under the influence of an electric field, as shown in Figure 5B, multiple second particles 322 are located between the first dielectric layer 311 and the third electrode 333 in the display area 301, and are attached to the surface of the third electrode 333 near the first substrate 10. Multiple first particles 321 are located in the first groove 1. Natural light passes through the third electrode 333 and irradiates the second particles 322. The second particles 322 absorb the natural light. At this time, under the reflection of natural light, the display area 301 displays black, that is, the sub-pixel 30 displays black.

[0138] In some examples, as shown in Figures 5A and 5B, the first particle 321 carries a positive charge, and the second particle 322 carries a negative charge. A negative voltage is applied to the first electrode 331, a positive voltage is applied to the second electrode 332, and no voltage is applied to the third electrode 333. In this case, the first particle 321 is attracted by the first electrode 331 and is located in the first groove 1, while the second particle 322 is attracted by the second electrode 332 and is located in the second groove 2.

[0139] As shown in Figure 5A, the negative voltage of the first electrode 331 is changed to a positive voltage, a negative voltage is applied to the third electrode 333, and the second electrode 332 remains at a positive voltage. At this time, the first particle 321 is repelled by the first electrode 331 and attracted by the third electrode 333. The first particle 321 moves towards the second electrode 332 and then towards the third electrode 333. Multiple first particles 321 are located between the first dielectric layer 311 and the third electrode 333 within the display area 301, and are attached to the surface of the third electrode 333 near the first substrate 10. The second particle 322 is attracted by the second electrode 332 and is located in the second groove 2. At this time, the first particle 321 reflects the first color light from natural light and absorbs other colors of light, and the sub-pixel 30 displays the first color.

[0140] Alternatively, as shown in Figure 5B, the positive voltage of the second electrode 332 is changed to a negative voltage, a positive voltage is applied to the third electrode 333, and the first electrode 331 remains at a negative voltage. In this case, the second particles 322 are repelled by the second electrode 332 and attracted by the third electrode 333. The second particles 322 move towards the first electrode 331 and then towards the third electrode 333. Multiple second particles 322 are located between the first dielectric layer 311 and the third electrode 333 within the display area 301, and are attached to the surface of the third electrode 333 near the first substrate 10. The first particles 321 are attracted by the first electrode 331 and are located in the first groove 1. At this time, the second particles 322 absorb natural light, and the sub-pixel 30 displays black.

[0141] In some other embodiments, unlike the embodiments described above, as shown in Figures 6A and 6B, the third electrode 333 is disposed on the first dielectric layer 311. In this case, the third electrode 333 may not be a transparent electrode.

[0142] Based on the above structure, under the action of an electric field, as shown in Figure 6A, multiple first particles 321 are located between the first dielectric layer 311 and the third electrode 333 within the display area 301, and are attached to the surface of the third electrode 333 near the second substrate 20. Multiple second particles 322 are located in the second groove 2. When natural light shines on the first particles 321, the first particles 321 reflect the first color of the natural light and absorb other colors. At this time, under the reflection of natural light, the display area 301 displays the first color, that is, the sub-pixel 30 displays the first color.

[0143] Alternatively, under the influence of an electric field, as shown in Figure 6B, multiple second particles 322 are located between the first dielectric layer 311 and the third electrode 333 in the display area 301, and are attached to the surface of the third electrode 333 near the second substrate 20. Multiple first particles 321 are located in the first groove 1. When natural light shines on the second particles 322, the second particles 322 absorb the natural light. At this time, under the reflection of natural light, the display area 301 displays black, that is, the sub-pixel 30 displays black.

[0144] In some examples, as shown in Figures 6A and 6B, the first particle 321 carries a positive charge, and the second particle 322 carries a negative charge. A negative voltage is applied to the first electrode 331, a positive voltage is applied to the second electrode 332, and no voltage is applied to the third electrode 333. In this case, the first particle 321 is attracted by the first electrode 331 and is located in the first groove 1, while the second particle 322 is attracted by the second electrode 332 and is located in the second groove 2.

[0145] As shown in Figure 6A, the negative voltage of the first electrode 331 is changed to a positive voltage, a negative voltage is applied to the third electrode 333, and the second electrode 332 remains at a positive voltage. At this time, the first particle 321 is repelled by the first electrode 331 and attracted by the third electrode 333. The first particle 321 moves towards the second electrode 332 and then towards the third electrode 333. Multiple first particles 321 are located between the first dielectric layer 311 and the third electrode 333 within the display area 301, and are attached to the surface of the third electrode 333 near the second substrate 20. The second particle 322 is attracted by the second electrode 332 and is located in the second groove 2. At this time, the first particle 321 reflects the first color light from natural light and absorbs other colors of light, and the sub-pixel 30 displays the first color.

[0146] Alternatively, as shown in Figure 6B, the positive voltage of the second electrode 332 is changed to a negative voltage, a positive voltage is applied to the third electrode 333, and the first electrode 331 remains at a negative voltage. In this case, the second particles 322 are repelled by the second electrode 332 and attracted by the third electrode 333. The second particles 322 move towards the first electrode 331 and then towards the third electrode 333. Multiple second particles 322 are located between the first dielectric layer 311 and the third electrode 333 within the display area 301, and are attached to the surface of the third electrode 333 near the second substrate 20. The first particles 321 are attracted by the first electrode 331 and are located in the first groove 1. At this time, the second particles 322 absorb natural light, and the sub-pixel 30 displays black.

[0147] In some embodiments, as shown in Figures 7 and 8A, the first particle 321 is white or black, and the plurality of storage areas 302 further includes a third storage area 3023. The barrier structure 31 has a third groove 3, which is spaced apart from the first groove 1. The third groove 3 is located in the third storage area 3023. The plurality of particles 32 also includes a plurality of third particles 323, the third particles 323 being a third color, which is one of the colors. For example, the color of the third particles 323 could be red, green, blue, yellow, purple, or cyan.

[0148] Under the influence of an electric field, as shown in Figure 8B, multiple first particles 321 are located in the display area 301, and multiple third particles 323 are located in the third groove 3. When natural light shines on the first particles 321, the first particles 321 reflect the light of the first color in the natural light and absorb the light of other colors, or the first particles 321 absorb all the natural light. At this time, under the reflection of natural light, the display area 301 displays the first color, that is, the sub-pixel 30 displays the first color.

[0149] Alternatively, under the influence of an electric field, as shown in Figure 8C, multiple first particles 321 are located in the first groove 1, and multiple third particles 323 are located in the display area 301. When natural light shines on the first particles 321, the third particles 323 reflect the third color of the natural light and absorb other colors. Under the reflection of natural light, the display area 301 displays the third color, that is, the sub-pixel 30 can display color, thereby enabling the display panel 100 to display a color image.

[0150] In some embodiments, as shown in Figures 7 and 9A, the first particle 321 is white, the third particle 323 is red, and the plurality of storage areas 302 further includes a fourth storage area 3024 and a fifth storage area 3025. The retaining wall structure 31 is provided with a fourth groove 4 and a fifth groove 5, the first groove 1, the third groove 3, the fourth groove 4 and the fifth groove 5 are spaced apart, the fourth groove 4 is located in the fourth storage area 3024, and the fifth groove 5 is located in the fifth storage area 3025. The plurality of particles 32 also includes a plurality of fourth particles 324 and fifth particles 325, the fourth particles 324 are blue, and the fifth particles 325 are green.

[0151] Under the influence of an electric field, as shown in Figure 9B, multiple fourth particles 324 are located in the display area 301. When natural light shines on the fourth particles 324, the fourth particles 324 reflect the blue light in the natural light and absorb the light of other colors. At this time, under the reflection of natural light, the display area 301 displays blue.

[0152] Alternatively, under the influence of an electric field, as shown in Figure 9C, multiple fifth particles 325 display areas 301 are illuminated by natural light. The fifth particles 325 reflect the green light from the natural light and absorb the light of other colors. At this time, under the reflection of natural light, the display area 301 displays green.

[0153] Based on the above structure, the display panel 100 can display multiple colors, making the displayed image more colorful and improving the display effect of the display panel 100.

[0154] In some examples, as shown in Figure 7, the display area 301 is rectangular in shape, the first storage area 3021 and the third storage area 3023 are located on both sides of the display area 301 along the first direction X, and the fourth storage area 3024 and the fifth storage area 3025 are located on both sides of the display area 301 along the second direction Y.

[0155] In some embodiments, as shown in Figures 10 and 11A-11C, the storage areas 302 overlap in adjacent sub-pixels 30. This increases the area of ​​the display area 301, which is beneficial for improving the display brightness of the display panel 100 and enhancing its display effect.

[0156] In some embodiments, as shown in Figures 11A to 11C, the barrier structure 31 includes a first barrier 312. The first barrier 312 surrounds the display area 301. One end of the first barrier 312 near the first substrate 10 is connected to the first substrate 10, and the other end away from the first substrate 10 has a gap between it and the second substrate 20. The first groove 1 penetrates through the first barrier 312.

[0157] In some embodiments, as shown in Figures 11A-11C, the electrode assembly 33 includes a fourth electrode 334, a fifth electrode 335, and a sixth electrode 336. The fourth electrode 334 is located within the first groove 1 and on the bottom wall of the first groove 1. The fifth electrode 335 is located between the first substrate 10 and the second substrate 20 and is disposed on the second substrate 20, with the fifth electrode 335 disposed opposite to the fourth electrode 334. The sixth electrode 336 is located between the first substrate 10 and the second substrate 20 and is disposed on the first substrate 10, and is located in the display area 301.

[0158] Under the influence of an electric field, as shown in Figure 11C, multiple first particles 321 are located between the sixth electrode 336 and the second substrate 20, and are attached to the surface of the sixth electrode 336 near the second substrate 20. When natural light shines on the first particles 321, the first particles 321 reflect the first color of the natural light and absorb the other colors of the light, or absorb the natural light. At this time, under the reflection of natural light, the display area 301 displays the first color.

[0159] In some examples, as shown in Figure 11A, the first particle 321 carries a positive charge and applies a negative voltage to the fourth electrode 334, while the fifth electrode 335 applies a positive voltage, and the sixth electrode 336 does not apply a voltage. At this time, the fourth electrode 334 attracts the first particle 321, and the fifth electrode 335 repels the first particle 321, thereby placing the first particle 321 within the first groove 1.

[0160] As shown in Figure 11B, the negative voltage on the fourth electrode 334 is changed to a positive voltage, the positive voltage on the fifth electrode 335 is changed to a negative voltage, and no voltage is applied to the sixth electrode 336. At this time, the fourth electrode 334 repels the first particle 321, the fifth electrode 335 attracts the first particle 321, and multiple first particles 321 attach to the surface of the fifth electrode 335 near the first substrate 10 and to the edge of the fifth electrode 335.

[0161] As shown in Figure 11C, the negative voltage on the fifth electrode 335 is then changed to a positive voltage, a negative voltage is applied to the sixth electrode 336, and the positive voltage on the fourth electrode 334 remains unchanged. At this time, both the fourth electrode 334 and the fifth electrode 335 repel the first particle 321, and the first particle 321 will not move towards the fourth electrode 334. The sixth electrode 336 attracts the first particle 321, and multiple first particles 321 will move towards the sixth electrode 336. These multiple first particles 321 will be located between the sixth electrode 336 and the second substrate 20, and will adhere to the surface of the sixth electrode 336 near the second substrate 20. At this time, the first particle 321 reflects the first color of light in natural light and absorbs other colors of light, and the display area 301 displays the first color.

[0162] As shown in Figure 11A, the positive voltage on the fifth electrode 335 is changed to a negative voltage, the negative voltage on the sixth electrode 336 is changed to a positive voltage, and the positive voltage on the fourth electrode 334 remains unchanged. At this time, the fourth electrode 334 and the sixth electrode 336 repel the first particle 321, while the fifth electrode 335 attracts the first particle 321. The first particle 321 moves towards the fifth electrode 335, and multiple first particles 321 adhere to the surface of the fifth electrode 335 near the first substrate 10, as well as the edge of the fifth electrode 335. Then, the negative voltage on the fifth electrode 335 is changed to a positive voltage, the positive voltage on the fourth electrode 334 is changed to a negative voltage, and the positive voltage on the sixth electrode 336 remains unchanged. At this time, the fourth electrode 334 attracts the first particle 321, while the fifth electrode 335 and the sixth electrode 336 repel the first particle 321. The first particle 321 moves towards the fourth electrode 334, and multiple first particles 321 are located in the first groove 1, and the display area 301 displays the second color.

[0163] In some embodiments, as shown in FIG12, the barrier structure 31 further includes a first dielectric layer 311, which is located between the first substrate 10 and the sixth electrode 336, and the sixth electrode 336 is disposed on the first dielectric layer 311.

[0164] With this configuration, on the one hand, the smaller distance between the fifth electrode 335 and the sixth electrode 336 shortens the movement time of the first particle 321 and the response time of the display panel 100, thus reducing the response time and improving the response speed of the display panel 100. On the other hand, the smaller distance between the fifth electrode 335 and the sixth electrode 336 results in a stronger electric field formed by the first electrode 331 and the second electrode 332. Under the influence of this electric field, the first particle 321 moves at a higher speed, which further reduces the response time and improves the response speed of the display panel 100.

[0165] In some embodiments, as shown in FIG10 and FIG13A-13C, the sixth electrode 336 is disposed on the second substrate 20, and the sixth electrode 336 is a transparent electrode (the light transmittance of the sixth electrode 336 is greater than or equal to 85%).

[0166] Under the influence of an electric field, as shown in Figure 13C, multiple first particles 321 are located between the sixth electrode 336 and the second substrate 20, and are attached to the surface of the sixth electrode 336 near the first substrate 1020. Natural light passes through the sixth electrode 336 and shines on the first particles 321. The first particles 321 reflect the first color of the natural light and absorb other colors of light, or absorb the natural light. At this time, under the reflection of natural light, the display area 301 displays the first color.

[0167] In some examples, as shown in Figure 13A, the first particle 321 carries a positive charge and applies a negative voltage to the fourth electrode 334, while the fifth electrode 335 applies a positive voltage, and the sixth electrode 336 does not apply a voltage. At this time, the fourth electrode 334 attracts the first particle 321, and the fifth electrode 335 repels the first particle 321, thereby placing the first particle 321 within the first groove 1.

[0168] As shown in Figure 13B, the negative voltage on the fourth electrode 334 is changed to a positive voltage, the positive voltage on the fifth electrode 335 is changed to a negative voltage, and no voltage is applied to the sixth electrode 336. At this time, the fourth electrode 334 repels the first particle 321, the fifth electrode 335 attracts the first particle 321, and multiple first particles 321 attach to the surface of the fifth electrode 335 near the first substrate 10 and to the edge of the fifth electrode 335.

[0169] As shown in Figure 13C, the negative voltage on the fifth electrode 335 is then changed to a positive voltage, a negative voltage is applied to the sixth electrode 336, and the positive voltage on the fourth electrode 334 remains unchanged. At this time, both the fourth electrode 334 and the fifth electrode 335 repel the first particle 321, and the first particle 321 will not move towards the fourth electrode 334. The sixth electrode 336 attracts the first particle 321, and multiple first particles 321 will move towards the sixth electrode 336. Multiple first particles 321 will be located between the sixth electrode 336 and the second substrate 20, and will be attached to the surface of the sixth electrode 336 near the first substrate 1020. At this time, the first particle 321 reflects the first color of light in natural light and absorbs other colors of light, and the display area 301 displays the first color.

[0170] As shown in Figure 13A, the positive voltage on the fifth electrode 335 is changed to a negative voltage, the negative voltage on the sixth electrode 336 is changed to a positive voltage, and the positive voltage on the fourth electrode 334 remains unchanged. At this time, the fourth electrode 334 and the sixth electrode 336 repel the first particle 321, while the fifth electrode 335 attracts the first particle 321. The first particle 321 moves towards the fifth electrode 335, and multiple first particles 321 attach to the surface of the fifth electrode 335 near the first substrate 10, as well as the edge of the fifth electrode 335. Then, the negative voltage on the fifth electrode 335 is changed to a positive voltage, the positive voltage on the fourth electrode 334 is changed to a negative voltage, and the positive voltage on the sixth electrode 336 remains unchanged. At this time, the fourth electrode 334 attracts the first particle 321, while the fifth electrode 335 and the sixth electrode 336 repel the first particle 321. The first particle 321 moves towards the fourth electrode 334, and multiple first particles 321 are located in the first groove 1. At this time, multiple first particles 321 are blocked by the first black matrix 3112, and the display area 301 displays the second color.

[0171] In some embodiments, as shown in Figures 10 and 14, a plurality of display areas 301 are arranged in multiple rows and columns. Each row of display areas 301 includes at least two display areas 301 arranged along a first direction X, and each column of display areas 301 includes at least two display areas 301 arranged along a second direction Y. The sub-pixel 30 also has a first storage area 3021 (the color of the first particle 321 is white), a third storage area 3023 (the color of the third particle 323 is red), a fourth storage area 3024 (the color of the fourth particle 324 is blue), and a fifth storage area 3025 (the color of the fifth particle 325 is green).

[0172] In some examples, as shown in Figure 10, the display area 301 is rectangular in shape. Along the first direction X, multiple fourth storage areas 3024 and multiple fifth storage areas 3025 are alternately arranged, and a display area 301 is positioned between the fourth storage areas 3024 and the fifth storage areas 3025. Along the second direction Y, multiple first storage areas 3021 and multiple third storage areas 3023 are alternately arranged, and a display area 301 is positioned between the first storage areas 3021 and the third storage areas 3023.

[0173] In other examples, as shown in Figure 14, the display area 301 is a regular hexagon, and multiple first storage areas 3021, third storage area 3023, fourth storage area 3024 and fifth storage area 3025 are arranged in multiple rows along the first direction X and in multiple columns along the second direction Y.

[0174] Each row of storage area 302 includes a first storage area 3021 and a fourth storage area 3024 arranged alternately along the first direction X, or each row of storage area 302 includes a fifth storage area 3025 and a third storage area 3023 arranged alternately along the first direction X. The storage area 302 row formed by multiple first storage areas 3021 and fourth storage areas 3024 and the storage area 302 row formed by multiple fifth storage areas 3025 and third storage areas 3023 are arranged alternately.

[0175] Each column of storage area 302 includes a first storage area 3021 and a fifth storage area 3025 arranged alternately along the second direction Y, or each column of storage area 302 includes a fourth storage area 3024 and a third storage area 3023 arranged alternately along the first direction X. Columns of storage areas 302 formed by multiple first storage areas 3021 and fifth storage areas 3025, and columns of storage areas 302 formed by multiple fourth storage areas 3024 and third storage areas 3023 are arranged alternately.

[0176] The multi-row display area 301 and the multi-row storage area 302 are arranged alternately, and the multi-column display area 301 and the multi-column storage area 302 are arranged alternately, with four display areas 301 arranged around one storage area 302.

[0177] This configuration allows for a further increase in the area of ​​the display area 301 and an increase in the brightness of the display area 301, which is beneficial for improving the display effect of the display panel 100.

[0178] In some embodiments, as shown in FIG3, the sub-pixel 30 further includes a second black matrix 36, which is located between the barrier structure 31 and the second substrate 20 and is disposed on the second substrate 20. The second black matrix 36 covers the storage area 302 and is offset from the display area 301. That is, the second black matrix 36 does not overlap with the display area 301.

[0179] With this configuration, under natural light reflection, the storage area 302 of sub-pixel 30 displays black, while the display area 301 can display normally. This reduces the risk of light reflected from particles in storage area 302 affecting the normal display of sub-pixel 30, thus improving the display effect of display panel 100.

[0180] For example, the material of the second black matrix 36 is the same as that of the first black matrix 3112. This can improve the uniformity of materials in the display panel 100 and reduce the manufacturing cost of the display panel 100.

[0181] In some examples, the second black matrix 36 also covers the first electrode 331. This prevents natural light from reaching the first electrode 331, and the first electrode 331 does not reflect natural light, reducing the risk of reflected light from the first electrode 331 affecting the normal display of the sub-pixels 30, thus improving the display effect of the display panel 100. In this case, the first electrode 331 does not need to be configured as a transparent electrode.

[0182] Some embodiments of this disclosure also provide a driving method for a display panel 100, which is used to drive the display panel of any of the above embodiments.

[0183] As shown in Figure 15, multiple sub-pixels 30 form a pixel unit 101. Each sub-pixel 30 has N gray levels. The driving method includes: during the adjustment of pixel unit 101 from a first gray level to a second gray level, if the absolute value of the difference between the first gray level and the second gray level is less than N, changing the number of first particles 321 in pixel unit 101. If the absolute value of the difference between the first gray level and the second gray level is a multiple of N, changing the number of sub-pixels 30 in the bright state in pixel unit 101. If the absolute value of the difference between the first gray level and the second gray level is greater than N and not a multiple of N, changing the number of sub-pixels 30 in the bright state in pixel unit 101 and changing the number of first particles 321 in pixel unit 101. It should be noted that a sub-pixel 30 being in the bright state means that the sub-pixel displays the Nth gray level.

[0184] This setting allows the pixel unit 101 to be quickly and accurately adjusted to the required grayscale, which can reduce the response time of the display panel 100 and improve the display effect of the display panel 100.

[0185] In some embodiments, as shown in Figures 15 and 16, four sub-pixels 30 form a pixel unit 101, each sub-pixel 30 having 64 gray levels, and the pixel unit 101 having 256 gray levels.

[0186] In some examples, the absolute value of the difference between the first gray level and the second gray level is less than N. For example, the absolute value of the difference between the first gray level and the second gray level is 8, 16, 32, 40 or 56. Changing the number of the first particles 321 within the pixel unit 101 achieves gray level changes.

[0187] In other examples, the absolute value of the difference between the first gray level and the second gray level is a multiple of N. For example, if the absolute value of the difference between the first gray level and the second gray level is 64, increasing or decreasing the position of one sub-pixel 30 in the bright state in pixel unit 101 achieves a 64-level gray level change in pixel unit 101. As another example, if the absolute value of the difference between the first gray level and the second gray level is 128, increasing or decreasing the position of two bright states in pixel unit 101 achieves a 128-level gray level change in pixel unit 101.

[0188] In some other examples, the absolute value of the difference between the first gray level and the second gray level is greater than N, but not a multiple of N. For example, if the absolute value of the difference between the first gray level and the second gray level is 80, changing one pixel unit 101 in a bright state achieves a 64-level gray level change in pixel unit 101, and changing the number of first particles 321 within pixel unit 101 achieves a 16-level gray level change in the remaining pixel units 101. As another example, if the absolute value of the difference between the first gray level and the second gray level is 120, increasing or decreasing the position of one sub-pixel 30 in a bright state in pixel unit 101 achieves a 64-level gray level change in sub-pixel 30. Changing the number of first particles 321 within pixel unit 101 achieves a 56-level gray level change in the remaining pixel units 101. For example, if the absolute value of the difference between the first gray level and the second gray level is 136, the two display brightness states in the pixel unit 101 can be increased or decreased to achieve a 128-gray level change in the sub-pixel 30, and the number of the first particles 321 in the pixel unit 101 can be changed to achieve an 8-gray level change in the remaining pixel unit 101.

[0189] In other embodiments, eight sub-pixels 30 form a pixel unit 101, each sub-pixel 30 having 32 gray levels, and pixel unit 101 having 256 gray levels.

[0190] In some other embodiments, sixteen sub-pixels 30 form a pixel unit 101, each sub-pixel 30 having 16 gray levels, and pixel unit 101 having 256 gray levels.

[0191] In some examples, as shown in Figure 16, the shape of sub-pixel 30 is a regular hexagon, and multiple sub-pixels 30 are arranged in an array.

[0192] For example, nine sub-pixels 30 form a pixel unit 101.

[0193] In some embodiments of this disclosure, a method for preparing a display panel 100 is also provided, as shown in FIG17. The preparation method S1000 includes S100 to S300.

[0194] S100, Form the first substrate 6.

[0195] In some examples, as shown in Figure 18, S100 includes S111 to S114.

[0196] S111, As shown in FIG19A, a driving circuit layer 8 is formed on one side of the first substrate 10.

[0197] In the above steps, the driving circuit layer 8 includes multiple pixel circuits 34, and the pixel circuits 34 include a first pixel circuit 341 and a second pixel circuit 342.

[0198] S112, as shown in Figure 19B, a first barrier 312 is formed on the side of the driving circuit layer 8 away from the first substrate 10.

[0199] In the above steps, the first barrier 312 is located between two adjacent pixel circuits 34 and is arranged around the pixel circuits 34.

[0200] In some examples, as shown in Figure 3, the slope angle of the first retaining wall 312 is 60° to 80°.

[0201] For example, the slope angle of the first retaining wall 312 is 60°, 61°, 62°, 65°, 66°, 68°, 69°, 70°, 71°, 74°, 75°, 89° or 80°.

[0202] In some examples, as shown in Figure 3, the height of the first retaining wall 312 is 5 μm to 100 μm.

[0203] For example, the height of the first retaining wall 312 is 5μm, 10μm, 18μm, 22μm, 25μm, 30μm, 40μm, 47μm, 50μm, 54μm, 60μm, 63μm, 67μm, 70μm, 75μm, 80μm, 90μm or 100μm.

[0204] In some examples, as shown in Figure 3, the width of the first retaining wall 312 is 5μm to 15μm.

[0205] For example, the width of the first retaining wall 312 is 5μm, 6μm, 7μm, 8μm, 9μm, 10μm, 11μm, 12μm, 13μm, 14μm or 15μm.

[0206] S113, As shown in FIG19C, a first electrode 331 and a second electrode 332 are formed on the side of the driving circuit layer 8 away from the first substrate 10.

[0207] In the above steps, the first electrode 331 is located on the inner wall of the first barrier 312 and is connected to the first pixel circuit 341. The second electrode 332 is located on the inner wall of the first barrier 312 and is disposed opposite to the first electrode 331. The second electrode 332 is connected to the second pixel circuit 342.

[0208] S114. As shown in FIG19D, a first dielectric layer 311 is formed on the side of the driving circuit layer 8 away from the first substrate 10.

[0209] In the above steps, the first dielectric layer 311 is located within the first barrier 312 surrounding the pixel circuit 34. The first dielectric layer 311 has a first groove 1 that penetrates the first dielectric layer 311 and exposes the first barrier 312. At this time, the first electrode 331 is located in the first groove 1.

[0210] In some examples, as shown in Figure 3, the first dielectric layer 311 is an integral structure, that is, the first dielectric layer 311 is a single-layer structure, and the color of the first dielectric layer 311 is black.

[0211] For example, the material of the first dielectric layer 311 can be a black organic material. For instance, the material of the first dielectric layer 311 includes aniline black, polydimethylsiloxane, or organic stamp material.

[0212] In other examples, as shown in FIG4, the first dielectric layer 311 includes a first sublayer 3111 and a first black matrix 3112. The first black matrix 3112 is located on the side of the first sublayer 3111 away from the first substrate 10 and is located in the display area 301, so that the surface of the first black matrix 3113 away from the first substrate 10 is the surface of the first dielectric layer 311 away from the first substrate 10.

[0213] S200, Forming the second substrate 7.

[0214] It is understandable that steps S100 and S200 can be performed simultaneously; or steps S100 can be performed first and then steps S200 can be performed; or steps S200 can be performed first and then steps S100 can be performed.

[0215] In some examples, as shown in Figure 20, S200 includes S210.

[0216] S210, as shown in Figure 21, a second black matrix 36 is formed on the second substrate 20.

[0217] In the above steps, the second black matrix 36 includes a plurality of light-shielding strips 361, which extend along the second direction Y and are spaced apart along the first direction X.

[0218] S300, as shown in Figure 22, the first substrate 6 and the second substrate 7 are joined together, and a plurality of particles 32 are disposed between the first substrate 6 and the second substrate 7.

[0219] In the above steps, in the orthographic projection onto the first substrate 10, the second black matrix 36 covers the first groove 1, and the first dielectric layer 311 is located between two adjacent light-shielding strips 361.

[0220] For example, a plurality of particles 32 are disposed between the first substrate 6 and the second substrate 7 using a liquid crystal droplet injection method (English: One Drop Fi, abbreviated as: ODF).

[0221] In the description of this specification, specific features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments or examples.

[0222] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. A display panel, comprising: The first and second substrates are positioned opposite each other; Multiple sub-pixels are located between the first substrate and the second substrate; The sub-pixel has a display area and at least one storage area located on at least one side of the display area; The sub-pixels include: A retaining wall structure, wherein the retaining wall structure is provided with a first groove; the first groove is located in the storage area; Multiple particles, including a first particle, the first particle having the first color; An electrode assembly generates an electric field between the electrode assemblies. Under the action of the electric field, the plurality of first particles are located in the display area, and the sub-pixel displays a first color; or under the action of the electric field, the plurality of first particles are located in the first groove, and the sub-pixel displays a second color.

2. The display panel according to claim 1, wherein, The retaining wall structure includes: A first medium layer extends from the display area to the storage area; A first barrier wall is disposed around the first dielectric layer; the end of the first barrier wall near the first substrate is connected to the first substrate, and the end away from the first substrate abuts against the second substrate; The first groove penetrates the first medium layer and exposes the first retaining wall.

3. The display panel according to claim 2, wherein, The surface of the first dielectric layer away from the first substrate is black, and the color of the first particle is different from black.

4. The display panel according to claim 3, wherein, The first dielectric layer is a single-piece structure, and the color of the first dielectric layer is black.

5. The display panel according to claim 3, wherein, The first dielectric layer includes: First sub-layer; The first black matrix is ​​located on the side of the first sublayer away from the first substrate and is located in the display area.

6. The display panel according to any one of claims 2 to 5, wherein, The electrode assembly includes: The first electrode is located on the inner sidewall of the first retaining wall and within the first groove. The second electrode is located on the inner wall of the first retaining wall and is positioned opposite to the first electrode.

7. The display panel according to any one of claims 2 to 6, wherein, The first retaining wall is black.

8. The display panel according to claim 7, wherein, The first electrode is a transparent electrode or the second electrode is a transparent electrode.

9. The display panel according to claim 1 or 2, wherein, The sub-pixel has a plurality of storage areas, the plurality of storage areas including a first storage area and a second storage area; the first groove is located in the first storage area; The retaining wall structure is also provided with a second groove, which is spaced apart from the first groove, and the second groove is located in the second storage area; The plurality of particles also includes a plurality of second particles, the second particles being black in color and different in color from the first particles; Wherein, under the action of the electric field, the plurality of first particles are located in the display area, the plurality of second particles are located in the second groove, and the sub-pixel displays a first color; or, under the action of the electric field, the plurality of first particles are located in the first groove, the plurality of second particles are located in the display area, and the sub-pixel displays black.

10. The display panel according to claim 9, wherein, The second groove penetrates the first medium layer and exposes the first retaining wall.

11. The display panel according to claim 10, wherein, The electrode assembly includes: The first electrode is located on the inner sidewall of the first retaining wall and within the first groove; The second electrode is located on the inner sidewall of the first retaining wall and is disposed opposite to the first electrode; the second electrode is located in the second groove. The third electrode is located between the first dielectric layer and the second substrate, and is located on the second substrate; the third electrode is a transparent electrode, and the third electrode is located in the display area.

12. The display panel according to claim 10, wherein, The electrode assembly includes: The first electrode is located on the inner sidewall of the first retaining wall and within the first groove; The second electrode is located on the inner sidewall of the first retaining wall and is disposed opposite to the first electrode; the second electrode is located in the second groove. The third electrode is located between the first dielectric layer and the second substrate, and is located on the first dielectric layer; the third electrode is located in the display area.

13. The display panel according to claim 1 or 2, wherein, The first particle is white or black, and the plurality of storage areas also includes a third storage area; The retaining wall structure is also provided with a third groove, which is spaced apart from the first groove and is located in the third storage area; The plurality of particles also includes a plurality of third particles, wherein the color of the third particles is a third color, and the third color is one of the colors; Wherein, under the action of the electric field, the plurality of first particles are located in the display area, the plurality of third particles are located in the third groove, and the sub-pixel displays a first color; or, under the action of the electric field, the plurality of first particles are located in the first groove, the plurality of third particles are located in the display area, and the sub-pixel displays a third color.

14. The display panel according to any one of claims 2 to 13, wherein, The distance between the first dielectric layer and the second substrate in the display area is 1 μm to 4 μm.

15. The display panel according to claim 1, wherein, The storage areas in a plurality of adjacent sub-pixels overlap.

16. The display panel according to claim 15, wherein, The retaining wall structure includes: A first barrier wall surrounds the display area; one end of the first barrier wall near the first substrate is connected to the first substrate, and the other end away from the first substrate has a gap with the second substrate; the first groove penetrates the first barrier wall.

17. The display panel according to claim 16, wherein, The electrode assembly includes: The fourth electrode is located on the bottom wall of the first groove; The fifth electrode is located between the first substrate and the second substrate, and is located on the second substrate. The fifth electrode is disposed opposite to the fourth electrode. A sixth electrode is located between the first substrate and the second substrate, and is located on the first substrate, the sixth electrode being located in the display area.

18. The display panel according to claim 17, wherein, The retaining wall structure also includes: A first dielectric layer is located between the first substrate and the sixth electrode, wherein the sixth electrode is located on the first dielectric layer.

19. The display panel according to claim 16, wherein, The electrode assembly includes: The fourth electrode is located on the bottom wall of the first groove; The fifth electrode is located between the first substrate and the second substrate, and is located on the second substrate. The fifth electrode is disposed opposite to the fourth electrode. The sixth electrode is located between the first substrate and the second substrate, and is located on the second substrate; the sixth electrode is located in the display area, and the sixth electrode is a transparent electrode.

20. The display panel according to any one of claims 1 to 19, wherein, The sub-pixel also includes: The second black matrix is ​​located between the barrier structure and the second substrate, and is located on the second substrate. The second black matrix covers the storage area and is offset from the display area.

21. A display device comprising a display panel as described in any one of claims 1 to 20.

22. A driving method for a display panel, used to drive the display panel as described in any one of claims 1 to 20, wherein, Multiple sub-pixels form a pixel unit, and each sub-pixel has N gray levels. The driving method includes: During the process of adjusting the pixel unit from the first gray level to the second gray level; when the absolute value of the difference between the first gray level and the second gray level is less than N, the number of first particles in the pixel unit is changed; when the absolute value of the difference between the first gray level and the second gray level is a multiple of N, the number of sub-pixels in the pixel unit that are in the bright state is changed; when the absolute value of the difference between the first gray level and the second gray level is greater than or equal to N, but not a multiple of N, the number of sub-pixels in the pixel unit that are in the bright state and the number of first particles in the pixel unit are both changed.

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