Method and apparatus for level-signal-based data transmission using polling, and device
Patent Information
- Application Number
- PCT/CN2025/089949
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2025-03-27
- Filing Date
- 2025-04-18
- Publication Date
- 2026-10-01
Smart Images
Figure CN2025089949_01102026_PF_FP_ABST
Abstract
Description
A data polling transmission method, apparatus, and device based on level signals Technical Field
[0001] This invention relates to the field of data transmission, and in particular to a data polling transmission method, apparatus, and device based on level signals. Background Technology
[0002] In modern electronic systems, bus communication systems play a crucial role, especially in multi-slave scenarios, where an effective data transmission management method is needed to ensure orderly data transmission and stable system operation. Polling, as a widely used data transmission management method in bus communication systems, can provide an orderly scheduling strategy for communication between the master and slave devices in a multi-slave environment.
[0003] In the traditional polling mechanism, the host queries the slave devices one by one in a preset order to ensure that each slave device has the opportunity to upload data, thereby achieving fair communication scheduling.
[0004] Traditional polling mechanisms have many drawbacks. The master needs to query each slave device one by one. Even if some slave devices have no data to upload, the master still needs to send query commands and wait for responses, which overloads the master and significantly reduces communication efficiency. Furthermore, in terms of system scalability, adding slave devices requires reconfiguring the master's polling list and adjusting the address allocation of existing slave devices, increasing system maintenance costs and complexity. Summary of the Invention
[0005] This invention provides a data polling transmission method, apparatus, and device based on level signals. By using level signals, the slave module can autonomously allocate time slots, avoiding the master module from querying each slot individually, thus improving communication efficiency and reducing the burden on the master module.
[0006] According to one aspect of the present invention, a data polling transmission method based on level signals is provided, applied to a bus system, comprising: a master module and a slave module, the method comprising:
[0007] The master module and each slave module listen to the level signal. When the level signal is detected to be in a specified state, the zero time slot is determined and the polling process is started.
[0008] Determine the upload timeslot order for each slave module;
[0009] Based on the upload time slot order, the target slave module is selected sequentially from each slave module, and data is uploaded to the master module through the target slave module.
[0010] Optionally, the upload timeslot order corresponding to each slave module is determined, including: obtaining the slave number of each slave module; arranging each slave module in ascending order of slave number to generate the upload timeslot order.
[0011] Optionally, data can be uploaded from the target slave module to the master module, including: determining whether there is data in the target slave module; if so, uploading the data to the master module via the communication bus; otherwise, directly adjusting the level signal from the first level position to the second level position, and resetting the level signal to the first level position after a preset unit time slot.
[0012] Optionally, data can be uploaded to the host module via the communication bus, including: adjusting the level signal from a first level position to a second level position; uploading data to the host module via the communication bus, and resetting the level signal to the first level position after the upload is completed.
[0013] Optionally, the first level position is high level, the second level position is low level, the level signal is high level by default, and the specified state is high level for two preset time slots.
[0014] Optionally, adjusting the level signal from a first level position to a second level position includes: connecting a pin of the target slave module to a level signal line, wherein the pin operates in an open-drain output mode; and grounding the level signal line based on the pin, so that the level signal is adjusted from the first level position to the second level position.
[0015] Optionally, after uploading data from the target slave module to the master module, the method further includes: after each slave module has completed the data upload for this round, resetting the level signal to the first level position to enter the monitoring of the zero time slot start point of the next round of polling.
[0016] According to another aspect of the present invention, a data polling transmission device based on a level signal is provided, the device comprising:
[0017] The level signal monitoring module is used to monitor level signals through the master module and each slave module. When the level signal is detected to be in a specified state, the zero time slot is determined and the polling process is started.
[0018] The upload timeslot order determination module is used to determine the upload timeslot order corresponding to each slave module;
[0019] The data polling upload module is used to select the target slave module from each slave module in sequence based on the upload time slot order, and then upload data to the master module through the target slave module.
[0020] According to another aspect of the present invention, an electronic device is provided, the electronic device comprising:
[0021] At least one processor;
[0022] and a memory communicatively connected to the at least one processor;
[0023] The memory stores a computer program that can be executed by the at least one processor, which is then executed by the at least one processor to enable the at least one processor to perform a data polling transmission method based on a level signal as described in any embodiment of the present invention.
[0024] According to another aspect of the present invention, a computer-readable storage medium is provided, the computer-readable storage medium storing computer instructions for causing a processor to execute and implement a data polling transmission method based on a level signal as described in any embodiment of the present invention.
[0025] The technical solution of this invention determines the zero time slot by monitoring the level signals of the master and slave modules, enabling each module to simultaneously initiate the polling process, thus avoiding data transmission errors or conflicts caused by asynchrony. By clearly defining the upload time slot order for each slave module, data uploads are conducted in an orderly manner, and each slave module can occupy the bus in a predetermined order, effectively avoiding bus conflicts and ensuring the stability and reliability of communication. Slave modules upload data autonomously based on their own data requirements, eliminating the need for the master to query each module individually, reducing the master's workload, thereby alleviating the master's burden and improving communication efficiency.
[0026] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description
[0027] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0028] Figure 1 is a flowchart of a data polling transmission method based on level signals according to Embodiment 1 of the present invention;
[0029] Figure 2 is a flowchart of another data polling transmission method based on level signals provided in Embodiment 2 of the present invention;
[0030] Figure 3 is a schematic diagram of a bus system according to Embodiment 2 of the present invention;
[0031] Figure 4 is a schematic diagram of a level signal according to Embodiment 2 of the present invention;
[0032] Figure 5 is a schematic diagram of a data polling transmission device based on a level signal according to Embodiment 3 of the present invention;
[0033] Figure 6 is a schematic diagram of the structure of an electronic device that implements a data polling transmission method based on level signals according to an embodiment of the present invention. Detailed Implementation
[0034] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.
[0035] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.
[0036] Example 1
[0037] Figure 1 is a flowchart of a data polling transmission method based on level signals provided in Embodiment 1 of the present invention. This embodiment is applicable to a bus system and includes a master module and a slave module. The method can be executed by a data polling transmission device based on level signals, which can be implemented in hardware and / or software and can be configured in a computer controller. As shown in Figure 1, the method includes:
[0038] S110. The master module and each slave module listen to the level signal. When the level signal is detected to be in a specified state, the zero time slot is determined and the polling process is started.
[0039] It should be noted that in a bus system, both the master and slave modules are connected to the communication bus. Level signals refer to signals generated on the Transmit Line (TXL), typically represented by high and low levels. The default state of the level signal is high, indicating that no slave module is requesting to upload data. The TXL is configured in parallel with the bus communication line and is the key signal carrier for the entire data polling transmission, used to synchronize the time slot status of all master and slave modules in real time, avoiding bus conflicts.
[0040] The master module is the core control unit in the bus system, responsible for monitoring the shared level signal line and receiving data uploaded by the slave modules. It plays a role in data aggregation and coordination throughout the data transmission process. The slave modules are the data transmitters in the bus system, and multiple slave modules together form the slave section of the system. Each slave module has a unique number, such as slot1, slot2, ..., slotN. Within a preset time slot, a slave module can occupy the communication bus by pulling a low-level signal to upload data to the master module. The specified state can be a high level for two preset time slots. When the master and slave modules detect this state, they determine that it is time slot zero. Time slot zero refers to the special time slot determined when the master and slave modules detect the specified state, marking the start of a polling process and serving as the starting reference point for the entire data transmission polling mechanism. The polling process means that starting from time slot zero, each slave module is given the opportunity to occupy the communication bus and upload data to the master module in the preset upload time slot order. After completing one round of uploads, the next round begins, and the process continues continuously.
[0041] S120. Determine the upload time slot sequence for each slave module.
[0042] The upload slot order refers to the order in which each slave module occupies the communication bus to upload data, determined by its slot number. The slave module with the earlier slot number occupies the bus first; that is, the slave module numbered slot1 occupies the bus first, and so on, ensuring that each slave module can upload data fairly and in an orderly manner.
[0043] S130. Select the target slave module from each slave module in sequence based on the upload time slot order, and upload data to the master module through the target slave module.
[0044] The communication bus is used for data transmission and interaction between the master and slave modules. The communication bus can be an RS-422 bus system, or a full-duplex or half-duplex RS-485 bus system. In serial communication, especially in bus communication protocols like RS-485 and RS-422, data is typically transmitted in frames, with the start and end of each frame identified by start and stop bits. In this case, slave modules usually use asynchronous communication, and there is no global synchronization clock between modules, leading to clock skew. These skews may cause multiple slaves to miss the correct upload timing when concurrently uploading data, or even send data at the same time, resulting in data conflicts and reducing system stability and reliability.
[0045] Optionally, data can be uploaded from the target slave module to the master module, including: determining whether there is data in the target slave module; if so, uploading the data to the master module via the communication bus; otherwise, directly adjusting the level signal from the first level position to the second level position, and resetting the level signal to the first level position after a preset unit time slot.
[0046] In a target slave module, there is usually a specific data storage area or caching mechanism. The storage area is checked to determine if there is data waiting to be uploaded. For example, in some embedded systems, the slave module's memory has a dedicated buffer for storing data to be sent. The status of the buffer, such as whether the data counter is zero or whether there is a new data write flag, is checked to determine if there is data to upload. When it is determined that the target slave module has data, it will upload the data to the master module via the communication bus. When it is determined that the target slave module has no data, it will also adjust its voltage level signal from the first level position to the second level position. Even though no data is being uploaded, the target slave module will still adjust its voltage level signal to follow the polling mechanism and indicate to the system that the target slave module has responded within its corresponding upload time slot. After adjustment, the voltage level signal will continue for a preset time slot. The preset time slot setting is to ensure that the system has enough time to identify and process the state changes of the slave module, ensuring the stability and accuracy of the polling mechanism. The preset time slot is determined by the MCU performance of the master and slave modules and the accuracy of the system clock; the preset time slot can be 50μs. After a preset time slot, the signal level is reset to the first level position. This indicates that although the slave module has not uploaded any data, it has completed its response in this round of polling, and the bus returns to a state where it can be used by other slave modules.
[0047] Optionally, data can be uploaded to the host module via the communication bus, including: adjusting the level signal from a first level position to a second level position; uploading data to the host module via the communication bus, and resetting the level signal to the first level position after the upload is completed.
[0048] Specifically, the voltage level signal is initially at the first voltage level. When the target slave module needs to upload data, it first adjusts the voltage level signal from the first voltage level to the second voltage level. After the voltage level signal changes to the second voltage level, the target slave module begins uploading data to the master module via the communication bus. The communication bus, as the data transmission channel, ensures stable and accurate data transmission from the slave module to the master module. During the upload process, the master module continuously monitors the bus, receiving and processing the data sent by the slave module. Once the target slave module has completed the data upload, it needs to reset the voltage level signal to the first voltage level. This indicates that the target slave module has finished occupying the communication bus, and the bus returns to an idle state, waiting for the next slave module to upload data according to the upload time slot sequence.
[0049] Optionally, the first level position is high level, the second level position is low level, the level signal is high level by default, and the specified state is high level for two preset time slots.
[0050] The default level signal is high, meaning it remains high when the system is not polling or no slave module is using the bus. The first high level indicates the bus is idle, meaning no slave module is using it for data transmission. Each slave module can use this state to determine if it can prepare to upload data. The second low level acts as an "occupancy flag," indicating to other slave and master modules that the bus is currently occupied, preventing other slave modules from competing for bus resources and thus avoiding data transmission conflicts. A designated state refers to a high level lasting two preset time slots. When the master and slave modules detect a high level for two preset time slots, they determine this as time slot zero. Time slot zero is the starting point of the entire polling process, providing a unified time reference for the system, allowing all master and slave modules to synchronously begin a new round of polling. By setting a designated state as the condition for zero time slot, the polling process can be effectively avoided due to accidental high-level fluctuations, improving system stability and reliability.
[0051] Optionally, adjusting the level signal from a first level position to a second level position includes: connecting a pin of the target slave module to a level signal line, wherein the pin operates in an open-drain output mode; and grounding the level signal line based on the pin, so that the level signal is adjusted from the first level position to the second level position.
[0052] Specifically, by connecting the pins of the target slave module to the level signal lines, the slave module can control the level signals and thus occupy the bus. The pin's operating mode is set to open-drain output. Open-drain output is a circuit output mode in which the pin can only output a low level or be in a high-impedance state, and cannot actively output a high level. When the pin is in a high-impedance state, the level signal line is held high by a pull-up resistor, i.e., the first level position; when the pin needs to output a low level, the level signal line can be pulled low.
[0053] Furthermore, when the target slave module needs to occupy the bus for data upload, it will ground the level signal line based on this pin. Due to the characteristics of the open-drain output pin, once the pin grounds the level signal line, the level signal will change from a high level maintained by the pull-up resistor to a low level. At this time, other slave modules and the master module can detect the change in the level signal, thus knowing that the current bus has been occupied by the target slave module.
[0054] Optionally, after uploading data from the target slave module to the master module, the method further includes: after each slave module has completed the data upload for this round, resetting the level signal to the first level position to enter the monitoring of the zero time slot start point of the next round of polling.
[0055] Specifically, after all slave modules complete one round of data upload, the TXL level returns to high, and the system enters the next round of monitoring at the zero-timeslot start point. As long as the system continues to run, it will continuously execute the above steps, repeatedly transmitting data to ensure that the data from each slave module can be uploaded to the master module in a timely and orderly manner, achieving efficient and stable bus communication.
[0056] In summary, this application achieves autonomous time slot allocation for slave modules through level signals, eliminating the need for the master module to query each slave module individually. This effectively solves the problem of excessive burden on the master module in traditional polling mechanisms, improves bus utilization and real-time data transmission, avoids bus conflicts caused by clock differences, and significantly enhances the system's communication efficiency and reliability. Furthermore, this application relies on only a simple shared level signal line to synchronize slave module time slots, resulting in a simple hardware circuit design, easy fault location and troubleshooting, and good scalability, making it suitable for scenarios with multiple slave modules. When the system needs to increase the number of slave modules, the new slave module only needs to be connected to the TXL control circuit, without requiring complex modifications to the existing master and slave modules, thus reducing system maintenance costs.
[0057] The technical solution of this invention determines the zero time slot by monitoring the level signals of the master and slave modules, enabling each module to simultaneously initiate the polling process, thus avoiding data transmission errors or conflicts caused by asynchrony. By clearly defining the upload time slot order for each slave module, data uploads are conducted in an orderly manner, and each slave module can occupy the bus in a predetermined order, effectively avoiding bus conflicts and ensuring communication stability and reliability. Slave modules upload data autonomously based on their own data requirements, eliminating the need for the master to query each module individually, reducing the master's workload, thereby lowering the master's burden and improving communication efficiency.
[0058] Example 2
[0059] Figure 2 is a flowchart of a data polling transmission method based on level signals provided in Embodiment 2 of the present invention. This embodiment adds a specific process for determining the upload time slot order corresponding to each slave module based on Embodiment 1. The specific content of steps S210 and S240 is largely the same as steps S110 and S130 in Embodiment 1, and therefore will not be described again in this embodiment. As shown in Figure 2, the method includes:
[0060] S210. By monitoring the level signal through the master module and each slave module, when the level signal is detected to be in a specified state, the zero time slot is determined and the polling process is started.
[0061] S220. Obtain the slave number of each slave module.
[0062] Among them, the slave module number refers to the identification information of the slave module. Each slave module can be numbered sequentially according to its distance from the master module or its functional priority.
[0063] S230. Arrange each slave module in ascending order of slave number to generate the upload time slot sequence.
[0064] Specifically, the upload time slot order for each slave module is determined by its serial number. The system obtains the slave number of each module, which is a unique identifier for each module. Then, the slave modules are arranged in ascending order of their slave numbers to generate the upload time slot order. For example, if the slave modules are numbered slot1, slot2, and slot3, the upload time slot order is slot1 first, then slot2, and finally slot3. This number-based order setting method is simple and direct, ensuring that each slave module has a fair opportunity to upload data while facilitating unified management and scheduling by the system.
[0065] It is known that the upload timeslot order remains relatively stable during system operation unless the system is reconfigured or expanded. When the system needs to add more slave modules, the new slave modules are assigned new numbers according to the rules and inserted into the original sequence system. There is no need to adjust the address allocation of existing slaves, which reduces system maintenance costs and demonstrates good scalability.
[0066] S240. Select the target slave module from each slave module in sequence based on the upload time slot order, and upload data to the master module through the target slave module.
[0067] Optionally, data can be uploaded from the target slave module to the master module, including: determining whether there is data in the target slave module; if so, uploading the data to the master module via the communication bus; otherwise, directly adjusting the level signal from the first level position to the second level position, and resetting the level signal to the first level position after a preset unit time slot.
[0068] Optionally, data can be uploaded to the host module via the communication bus, including: adjusting the level signal from a first level position to a second level position; uploading data to the host module via the communication bus, and resetting the level signal to the first level position after the upload is completed.
[0069] Optionally, the first level position is high level, the second level position is low level, the level signal is high level by default, and the specified state is high level for two preset time slots.
[0070] Optionally, adjusting the level signal from a first level position to a second level position includes: connecting a pin of the target slave module to a level signal line, wherein the pin operates in an open-drain output mode; and grounding the level signal line based on the pin, so that the level signal is adjusted from the first level position to the second level position.
[0071] Optionally, after uploading data from the target slave module to the master module, the method further includes: after each slave module has completed the data upload for this round, resetting the level signal to the first level position to enter the monitoring of the zero time slot start point of the next round of polling.
[0072] Specific application scenario: Figure 3 is a schematic diagram of a bus system provided in Embodiment 2 of the present invention, including: a master module 1, several slave modules 2, a communication bus 3, and a level signal line TXL 4; the signal transceiver of the master module 1 is connected to the communication bus 3; the level signal line TXL 4 exists in parallel with the communication bus 3, and is connected to the master module 1 and all slave modules 2, for the master module and each slave module to listen to the level signal to determine the zero time slot and the bus occupancy status, etc., to assist in the orderly implementation of data polling transmission; the communication bus 3 is used for data transmission interaction between the master module 1 and the slave modules 2.
[0073] Specifically, Figure 4 is a schematic diagram of a level signal provided in Embodiment 2 of the present invention. The figure shows the change of the TXL level signal over a duration of 15 unit time slots. The horizontal axis represents time slots, from 1 to 15 and beyond, used to divide time segments. The vertical axis is divided into two states, H and L, where H represents a high level and L represents a low level. The level signal is high by default. When a slave module occupies the bus, it will pull the level signal low. The "Polling 1 Start Flag" and "Polling 2 Start Flag" marked in the figure indicate the starting point of the data polling transmission process. When a high level is detected for two consecutive preset unit time slots, it indicates the start of polling. At this time, the zero time slot can be determined and polling can be started. Slot 1, slot 2, and slot 3 represent different slave modules. Time slots 1-2 are continuously high, marking the start of the first polling. Time slot 3 is a low level caused by the pull-down of slot 1, lasting only one time slot, then time slot 4 returns to a high level; time slots 5-7 are for data upload from slot 2, and time slot 8 returns to a high level; similarly, time slot 9 is a low level caused by the pull-down of slot 3, lasting one time slot, then time slot 10 returns to a high level. When a high level of TXL is detected again for two seconds, such as in time slots 10-11, it marks the start of the second polling, and then the cycle repeats.
[0074] The technical solution of this invention determines the zero time slot by listening to the level signals of the master and slave modules, enabling each module to start the polling process simultaneously, avoiding data transmission errors or conflicts caused by asynchrony. By clearly defining the upload time slot order for each slave module, data upload is carried out in an orderly manner, and each slave module can occupy the bus in a predetermined order, effectively avoiding bus conflicts and ensuring communication stability and reliability. Slave modules upload autonomously according to their own data situation, eliminating the need for the master to query each module individually, reducing the master's workload, thereby reducing the master's burden and improving communication efficiency. The upload time slot order is determined based on the slave number. When the number of slaves is increased, the new slave only needs to be assigned a number and inserted in the correct order, without reconfiguring the master's polling list or adjusting the existing slave addresses, reducing system maintenance costs and complexity, and providing good scalability.
[0075] Example 3
[0076] Figure 5 is a schematic diagram of a data polling transmission device based on a level signal provided in Embodiment 3 of the present invention. As shown in Figure 5, the device includes: a level signal monitoring module 310, which is used to monitor the level signal through the host module and each slave module, and when the level signal is detected to be in a specified state, it determines the zero time slot and starts the polling process;
[0077] The upload timeslot order determination module 320 is used to determine the upload timeslot order corresponding to each slave module;
[0078] The data polling upload module 330 is used to select the target slave module from each slave module in sequence based on the upload time slot order, and upload data to the master module through the target slave module.
[0079] Optionally, the upload timeslot order determination module 320 is specifically used to: obtain the slave number of each slave module; and arrange the slave modules in ascending order of slave number to generate the upload timeslot order.
[0080] Optionally, the data polling upload module 330 is specifically used to: determine whether there is data in the target slave module; if so, upload the data to the master module through the communication bus; otherwise, directly adjust the level signal from the first level position to the second level position, and reset the level signal to the first level position after a preset unit time slot.
[0081] Optionally, the data polling upload module 330 specifically includes: a data upload unit, used to: adjust the level signal from a first level position to a second level position; upload data to the host module through the communication bus; and reset the level signal to the first level position after the upload is completed.
[0082] Optionally, the data polling upload module 330 specifically includes: a level signal adjustment unit, used to: connect the pins of the target slave module to the level signal line, wherein the pins operate in open-drain output mode; and ground the level signal line based on the pins, so that the level signal is adjusted from a first level position to a second level position.
[0083] Optionally, the device further includes: a level signal reset module, used to: after the target slave module uploads data to the master module, and after each slave module has completed the data upload for this round, reset the level signal to the first level position so as to enter the monitoring of the zero time slot start point of the next round of polling.
[0084] The technical solution of this invention determines the zero time slot by monitoring the level signals of the master and slave modules, enabling each module to start the polling process simultaneously, avoiding data transmission errors or conflicts caused by asynchrony. By clearly defining the upload time slot order for each slave module, data uploads are conducted in an orderly manner, and each slave module can occupy the bus in a predetermined order, effectively avoiding bus conflicts and ensuring communication stability and reliability. Slave modules upload data autonomously based on their own data requirements, eliminating the need for the master to query each module individually, reducing the master's workload, thereby lowering the master's burden and improving communication efficiency.
[0085] The data polling transmission device based on level signals provided in the embodiments of the present invention can execute the data polling transmission method based on level signals provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of executing the method.
[0086] Example 4
[0087] Figure 6 illustrates a schematic diagram of an electronic device 10 that can be used to implement embodiments of the present invention. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital assistants, cellular phones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the invention described and / or claimed herein.
[0088] As shown in Figure 6, the electronic device 10 includes at least one processor 11 and a memory, such as a read-only memory (ROM) 12 or a random access memory (RAM) 13, communicatively connected to the at least one processor 11. The memory stores computer programs executable by the at least one processor. The processor 11 can perform various appropriate actions and processes based on the computer program stored in the ROM 12 or loaded from storage unit 18 into the RAM 13. The RAM 13 can also store various programs and data required for the operation of the electronic device 10. The processor 11, ROM 12, and RAM 13 are interconnected via a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.
[0089] Multiple components in electronic device 10 are connected to I / O interface 15, including: input unit 16, such as keyboard, mouse, etc.; output unit 17, such as various types of displays, speakers, etc.; storage unit 18, such as disk, optical disk, etc.; and communication unit 19, such as network card, modem, wireless transceiver, etc. Communication unit 19 allows electronic device 10 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.
[0090] Processor 11 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. Processor 11 performs the various methods and processes described above, such as a data polling transmission method based on level signals.
[0091] In some embodiments, a level-signal-based data polling method can be implemented as a computer program tangibly contained in a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program can be loaded and / or installed on electronic device 10 via ROM 12 and / or communication unit 19. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of the level-signal-based data polling method described above can be performed. Alternatively, in other embodiments, processor 11 can be configured to perform a level-signal-based data polling method by any other suitable means (e.g., by means of firmware).
[0092] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), payload-programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.
[0093] Computer programs used to implement the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when executed by the processor, the computer programs cause the functions / operations specified in the flowcharts and / or block diagrams to be performed. The computer programs may be executed entirely on a machine, partially on a machine, or as a standalone software package, partially on a machine and partially on a remote machine, or entirely on a remote machine or server.
[0094] In the context of this invention, a computer-readable storage medium can be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, apparatus, or device. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination thereof. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.
[0095] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).
[0096] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as data servers), or middleware components (e.g., application servers), or frontend components (e.g., user computers with graphical user interfaces or web browsers through which users can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., communication networks). Examples of communication networks include local area networks (LANs), wide area networks (WANs), blockchain networks, and the Internet.
[0097] A computing system can include clients and servers. Clients and servers are generally located far apart and typically interact through communication networks. The client-server relationship is created by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a cloud server, also known as a cloud computing server or cloud host, which is a hosting product within the cloud computing service system to address the shortcomings of traditional physical hosts and VPS services, such as high management difficulty and weak business scalability.
[0098] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.
[0099] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.
Claims
1. A data polling transmission method based on level signals, characterized in that, Applied to bus systems, including master modules and slave modules, the methods include: The master module and each slave module listen to the level signal. When the level signal is detected to be in a specified state, the zero time slot is determined and the polling process is started. Determine the upload timeslot order for each slave module; Based on the upload time slot order, the target slave module is selected sequentially from each slave module, and data is uploaded to the master module through the target slave module.
2. The method according to claim 1, characterized in that, Determining the upload time slot order corresponding to each slave module includes: Obtain the slave number of each slave module; The slave modules are arranged in ascending order of slave number to generate the upload time slot sequence.
3. The method according to claim 1, characterized in that, The process of uploading data from the target slave module to the host module includes: Determine if there is data in the target slave module; if so, upload the data to the master module via the communication bus. Otherwise, the level signal is directly adjusted from the first level position to the second level position, and after a preset unit time slot, the level signal is reset to the first level position.
4. The method according to claim 3, characterized in that, The process of uploading data to the host module via the communication bus includes: Adjust the level signal from the first level position to the second level position; Data is uploaded to the host module via the communication bus, and the level signal is reset to the first level position after the upload is completed.
5. The method according to claim 3, characterized in that, The first level position is high level, the second level position is low level, the level signal is high level by default, and the specified state is a high level for two preset time slots.
6. The method according to claim 4, characterized in that, The step of adjusting the level signal from the first level position to the second level position includes: Connect the pins of the target slave module to the level signal lines, wherein the pins operate in open-drain output mode; The level signal line is grounded based on the pin, so that the level signal is adjusted from a first level position to a second level position.
7. The method according to claim 1, characterized in that, After uploading data from the target slave module to the host module, the method further includes: After each slave module completes its data upload for the current round, it resets the level signal to the first level position to begin monitoring the zero-slot start point of the next round of polling.
8. A data polling transmission device based on level signals, characterized in that, include: The level signal monitoring module is used to monitor level signals through the master module and each slave module. When the level signal is detected to be in a specified state, the zero time slot is determined and the polling process is started. The upload timeslot order determination module is used to determine the upload timeslot order corresponding to each slave module; The data polling upload module is used to select a target slave module from each slave module in sequence based on the upload time slot order, and upload data to the master module through the target slave module.
9. An electronic device, characterized in that, The electronic device includes: At least one processor; and a memory communicatively connected to the at least one processor; The memory stores a computer program that can be executed by the at least one processor, the computer program being executed by the at least one processor to enable the at least one processor to perform the method of any one of claims 1-7.
10. A computer storage medium, characterized in that, The computer storage medium stores computer instructions that are used to cause a processor to execute the method of any one of claims 1-7.